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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static DEVICE_ATTR_WO(dev_rescan);
468
469static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473
474 if (kstrtoul(buf, 0, &val) < 0)
475 return -EINVAL;
476
477 if (val && device_remove_file_self(dev, attr))
478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 return count;
480}
481static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 remove_store);
483
484static ssize_t bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503}
504static DEVICE_ATTR_WO(bus_rescan);
505
506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533}
534static DEVICE_ATTR_RW(d3cold_allowed);
535#endif
536
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
551static ssize_t driver_override_store(struct device *dev,
552 struct device_attribute *attr,
553 const char *buf, size_t count)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 char *driver_override, *old, *cp;
557
558 /* We need to keep extra room for a newline */
559 if (count >= (PAGE_SIZE - 1))
560 return -EINVAL;
561
562 driver_override = kstrndup(buf, count, GFP_KERNEL);
563 if (!driver_override)
564 return -ENOMEM;
565
566 cp = strchr(driver_override, '\n');
567 if (cp)
568 *cp = '\0';
569
570 device_lock(dev);
571 old = pdev->driver_override;
572 if (strlen(driver_override)) {
573 pdev->driver_override = driver_override;
574 } else {
575 kfree(driver_override);
576 pdev->driver_override = NULL;
577 }
578 device_unlock(dev);
579
580 kfree(old);
581
582 return count;
583}
584
585static ssize_t driver_override_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589 ssize_t len;
590
591 device_lock(dev);
592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 device_unlock(dev);
594 return len;
595}
596static DEVICE_ATTR_RW(driver_override);
597
598static struct attribute *pci_dev_attrs[] = {
599 &dev_attr_resource.attr,
600 &dev_attr_vendor.attr,
601 &dev_attr_device.attr,
602 &dev_attr_subsystem_vendor.attr,
603 &dev_attr_subsystem_device.attr,
604 &dev_attr_revision.attr,
605 &dev_attr_class.attr,
606 &dev_attr_irq.attr,
607 &dev_attr_local_cpus.attr,
608 &dev_attr_local_cpulist.attr,
609 &dev_attr_modalias.attr,
610#ifdef CONFIG_NUMA
611 &dev_attr_numa_node.attr,
612#endif
613 &dev_attr_dma_mask_bits.attr,
614 &dev_attr_consistent_dma_mask_bits.attr,
615 &dev_attr_enable.attr,
616 &dev_attr_broken_parity_status.attr,
617 &dev_attr_msi_bus.attr,
618#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 &dev_attr_d3cold_allowed.attr,
620#endif
621#ifdef CONFIG_OF
622 &dev_attr_devspec.attr,
623#endif
624 &dev_attr_driver_override.attr,
625 &dev_attr_ari_enabled.attr,
626 NULL,
627};
628
629static struct attribute *pci_bridge_attrs[] = {
630 &dev_attr_subordinate_bus_number.attr,
631 &dev_attr_secondary_bus_number.attr,
632 NULL,
633};
634
635static struct attribute *pcie_dev_attrs[] = {
636 &dev_attr_current_link_speed.attr,
637 &dev_attr_current_link_width.attr,
638 &dev_attr_max_link_width.attr,
639 &dev_attr_max_link_speed.attr,
640 NULL,
641};
642
643static struct attribute *pcibus_attrs[] = {
644 &dev_attr_bus_rescan.attr,
645 &dev_attr_cpuaffinity.attr,
646 &dev_attr_cpulistaffinity.attr,
647 NULL,
648};
649
650static const struct attribute_group pcibus_group = {
651 .attrs = pcibus_attrs,
652};
653
654const struct attribute_group *pcibus_groups[] = {
655 &pcibus_group,
656 NULL,
657};
658
659static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663 struct pci_dev *vga_dev = vga_default_device();
664
665 if (vga_dev)
666 return sprintf(buf, "%u\n", (pdev == vga_dev));
667
668 return sprintf(buf, "%u\n",
669 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 IORESOURCE_ROM_SHADOW));
671}
672static DEVICE_ATTR_RO(boot_vga);
673
674static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr, char *buf,
676 loff_t off, size_t count)
677{
678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 unsigned int size = 64;
680 loff_t init_off = off;
681 u8 *data = (u8 *) buf;
682
683 /* Several chips lock up trying to read undefined config space */
684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 size = dev->cfg_size;
686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 size = 128;
688
689 if (off > size)
690 return 0;
691 if (off + count > size) {
692 size -= off;
693 count = size;
694 } else {
695 size = count;
696 }
697
698 pci_config_pm_runtime_get(dev);
699
700 if ((off & 1) && size) {
701 u8 val;
702 pci_user_read_config_byte(dev, off, &val);
703 data[off - init_off] = val;
704 off++;
705 size--;
706 }
707
708 if ((off & 3) && size > 2) {
709 u16 val;
710 pci_user_read_config_word(dev, off, &val);
711 data[off - init_off] = val & 0xff;
712 data[off - init_off + 1] = (val >> 8) & 0xff;
713 off += 2;
714 size -= 2;
715 }
716
717 while (size > 3) {
718 u32 val;
719 pci_user_read_config_dword(dev, off, &val);
720 data[off - init_off] = val & 0xff;
721 data[off - init_off + 1] = (val >> 8) & 0xff;
722 data[off - init_off + 2] = (val >> 16) & 0xff;
723 data[off - init_off + 3] = (val >> 24) & 0xff;
724 off += 4;
725 size -= 4;
726 }
727
728 if (size >= 2) {
729 u16 val;
730 pci_user_read_config_word(dev, off, &val);
731 data[off - init_off] = val & 0xff;
732 data[off - init_off + 1] = (val >> 8) & 0xff;
733 off += 2;
734 size -= 2;
735 }
736
737 if (size > 0) {
738 u8 val;
739 pci_user_read_config_byte(dev, off, &val);
740 data[off - init_off] = val;
741 off++;
742 --size;
743 }
744
745 pci_config_pm_runtime_put(dev);
746
747 return count;
748}
749
750static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 struct bin_attribute *bin_attr, char *buf,
752 loff_t off, size_t count)
753{
754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 unsigned int size = count;
756 loff_t init_off = off;
757 u8 *data = (u8 *) buf;
758 int ret;
759
760 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 if (ret)
762 return ret;
763
764 if (off > dev->cfg_size)
765 return 0;
766 if (off + count > dev->cfg_size) {
767 size = dev->cfg_size - off;
768 count = size;
769 }
770
771 pci_config_pm_runtime_get(dev);
772
773 if ((off & 1) && size) {
774 pci_user_write_config_byte(dev, off, data[off - init_off]);
775 off++;
776 size--;
777 }
778
779 if ((off & 3) && size > 2) {
780 u16 val = data[off - init_off];
781 val |= (u16) data[off - init_off + 1] << 8;
782 pci_user_write_config_word(dev, off, val);
783 off += 2;
784 size -= 2;
785 }
786
787 while (size > 3) {
788 u32 val = data[off - init_off];
789 val |= (u32) data[off - init_off + 1] << 8;
790 val |= (u32) data[off - init_off + 2] << 16;
791 val |= (u32) data[off - init_off + 3] << 24;
792 pci_user_write_config_dword(dev, off, val);
793 off += 4;
794 size -= 4;
795 }
796
797 if (size >= 2) {
798 u16 val = data[off - init_off];
799 val |= (u16) data[off - init_off + 1] << 8;
800 pci_user_write_config_word(dev, off, val);
801 off += 2;
802 size -= 2;
803 }
804
805 if (size) {
806 pci_user_write_config_byte(dev, off, data[off - init_off]);
807 off++;
808 --size;
809 }
810
811 pci_config_pm_runtime_put(dev);
812
813 return count;
814}
815
816#ifdef HAVE_PCI_LEGACY
817/**
818 * pci_read_legacy_io - read byte(s) from legacy I/O port space
819 * @filp: open sysfs file
820 * @kobj: kobject corresponding to file to read from
821 * @bin_attr: struct bin_attribute for this file
822 * @buf: buffer to store results
823 * @off: offset into legacy I/O port space
824 * @count: number of bytes to read
825 *
826 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827 * callback routine (pci_legacy_read).
828 */
829static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 struct bin_attribute *bin_attr, char *buf,
831 loff_t off, size_t count)
832{
833 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834
835 /* Only support 1, 2 or 4 byte accesses */
836 if (count != 1 && count != 2 && count != 4)
837 return -EINVAL;
838
839 return pci_legacy_read(bus, off, (u32 *)buf, count);
840}
841
842/**
843 * pci_write_legacy_io - write byte(s) to legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer containing value to be written
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to write
850 *
851 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_write).
853 */
854static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_write(bus, off, *(u32 *)buf, count);
865}
866
867/**
868 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to device to be mapped
871 * @attr: struct bin_attribute for this file
872 * @vma: struct vm_area_struct passed to mmap
873 *
874 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875 * legacy memory space (first meg of bus space) into application virtual
876 * memory space.
877 */
878static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 struct bin_attribute *attr,
880 struct vm_area_struct *vma)
881{
882 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883
884 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885}
886
887/**
888 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889 * @filp: open sysfs file
890 * @kobj: kobject corresponding to device to be mapped
891 * @attr: struct bin_attribute for this file
892 * @vma: struct vm_area_struct passed to mmap
893 *
894 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895 * legacy IO space (first meg of bus space) into application virtual
896 * memory space. Returns -ENOSYS if the operation isn't supported
897 */
898static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *attr,
900 struct vm_area_struct *vma)
901{
902 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903
904 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905}
906
907/**
908 * pci_adjust_legacy_attr - adjustment of legacy file attributes
909 * @b: bus to create files under
910 * @mmap_type: I/O port or memory
911 *
912 * Stub implementation. Can be overridden by arch if necessary.
913 */
914void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 enum pci_mmap_state mmap_type)
916{
917}
918
919/**
920 * pci_create_legacy_files - create legacy I/O port and memory files
921 * @b: bus to create files under
922 *
923 * Some platforms allow access to legacy I/O port and ISA memory space on
924 * a per-bus basis. This routine creates the files and ties them into
925 * their associated read, write and mmap files from pci-sysfs.c
926 *
927 * On error unwind, but don't propagate the error to the caller
928 * as it is ok to set up the PCI bus without these files.
929 */
930void pci_create_legacy_files(struct pci_bus *b)
931{
932 int error;
933
934 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 GFP_ATOMIC);
936 if (!b->legacy_io)
937 goto kzalloc_err;
938
939 sysfs_bin_attr_init(b->legacy_io);
940 b->legacy_io->attr.name = "legacy_io";
941 b->legacy_io->size = 0xffff;
942 b->legacy_io->attr.mode = 0600;
943 b->legacy_io->read = pci_read_legacy_io;
944 b->legacy_io->write = pci_write_legacy_io;
945 b->legacy_io->mmap = pci_mmap_legacy_io;
946 pci_adjust_legacy_attr(b, pci_mmap_io);
947 error = device_create_bin_file(&b->dev, b->legacy_io);
948 if (error)
949 goto legacy_io_err;
950
951 /* Allocated above after the legacy_io struct */
952 b->legacy_mem = b->legacy_io + 1;
953 sysfs_bin_attr_init(b->legacy_mem);
954 b->legacy_mem->attr.name = "legacy_mem";
955 b->legacy_mem->size = 1024*1024;
956 b->legacy_mem->attr.mode = 0600;
957 b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 pci_adjust_legacy_attr(b, pci_mmap_mem);
959 error = device_create_bin_file(&b->dev, b->legacy_mem);
960 if (error)
961 goto legacy_mem_err;
962
963 return;
964
965legacy_mem_err:
966 device_remove_bin_file(&b->dev, b->legacy_io);
967legacy_io_err:
968 kfree(b->legacy_io);
969 b->legacy_io = NULL;
970kzalloc_err:
971 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972}
973
974void pci_remove_legacy_files(struct pci_bus *b)
975{
976 if (b->legacy_io) {
977 device_remove_bin_file(&b->dev, b->legacy_io);
978 device_remove_bin_file(&b->dev, b->legacy_mem);
979 kfree(b->legacy_io); /* both are allocated here */
980 }
981}
982#endif /* HAVE_PCI_LEGACY */
983
984#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985
986int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 enum pci_mmap_api mmap_api)
988{
989 unsigned long nr, start, size;
990 resource_size_t pci_start = 0, pci_end;
991
992 if (pci_resource_len(pdev, resno) == 0)
993 return 0;
994 nr = vma_pages(vma);
995 start = vma->vm_pgoff;
996 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 if (mmap_api == PCI_MMAP_PROCFS) {
998 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 &pci_start, &pci_end);
1000 pci_start >>= PAGE_SHIFT;
1001 }
1002 if (start >= pci_start && start < pci_start + size &&
1003 start + nr <= pci_start + size)
1004 return 1;
1005 return 0;
1006}
1007
1008/**
1009 * pci_mmap_resource - map a PCI resource into user memory space
1010 * @kobj: kobject for mapping
1011 * @attr: struct bin_attribute for the file being mapped
1012 * @vma: struct vm_area_struct passed into the mmap
1013 * @write_combine: 1 for write_combine mapping
1014 *
1015 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016 */
1017static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 struct vm_area_struct *vma, int write_combine)
1019{
1020 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 int bar = (unsigned long)attr->private;
1022 enum pci_mmap_state mmap_type;
1023 struct resource *res = &pdev->resource[bar];
1024 int ret;
1025
1026 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 if (ret)
1028 return ret;
1029
1030 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 return -EINVAL;
1032
1033 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 return -EINVAL;
1035
1036 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037
1038 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039}
1040
1041static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 0);
1046}
1047
1048static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr,
1050 struct vm_area_struct *vma)
1051{
1052 return pci_mmap_resource(kobj, attr, vma, 1);
1053}
1054
1055static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 struct bin_attribute *attr, char *buf,
1057 loff_t off, size_t count, bool write)
1058{
1059 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 int bar = (unsigned long)attr->private;
1061 unsigned long port = off;
1062
1063 port += pci_resource_start(pdev, bar);
1064
1065 if (port > pci_resource_end(pdev, bar))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, bar))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 int ret;
1106
1107 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 if (ret)
1109 return ret;
1110
1111 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112}
1113
1114/**
1115 * pci_remove_resource_files - cleanup resource files
1116 * @pdev: dev to cleanup
1117 *
1118 * If we created resource files for @pdev, remove them from sysfs and
1119 * free their resources.
1120 */
1121static void pci_remove_resource_files(struct pci_dev *pdev)
1122{
1123 int i;
1124
1125 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1126 struct bin_attribute *res_attr;
1127
1128 res_attr = pdev->res_attr[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133
1134 res_attr = pdev->res_attr_wc[i];
1135 if (res_attr) {
1136 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 kfree(res_attr);
1138 }
1139 }
1140}
1141
1142static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143{
1144 /* allocate attribute structure, piggyback attribute name */
1145 int name_len = write_combine ? 13 : 10;
1146 struct bin_attribute *res_attr;
1147 char *res_attr_name;
1148 int retval;
1149
1150 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 if (!res_attr)
1152 return -ENOMEM;
1153
1154 res_attr_name = (char *)(res_attr + 1);
1155
1156 sysfs_bin_attr_init(res_attr);
1157 if (write_combine) {
1158 pdev->res_attr_wc[num] = res_attr;
1159 sprintf(res_attr_name, "resource%d_wc", num);
1160 res_attr->mmap = pci_mmap_resource_wc;
1161 } else {
1162 pdev->res_attr[num] = res_attr;
1163 sprintf(res_attr_name, "resource%d", num);
1164 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 res_attr->read = pci_read_resource_io;
1166 res_attr->write = pci_write_resource_io;
1167 if (arch_can_pci_mmap_io())
1168 res_attr->mmap = pci_mmap_resource_uc;
1169 } else {
1170 res_attr->mmap = pci_mmap_resource_uc;
1171 }
1172 }
1173 res_attr->attr.name = res_attr_name;
1174 res_attr->attr.mode = 0600;
1175 res_attr->size = pci_resource_len(pdev, num);
1176 res_attr->private = (void *)(unsigned long)num;
1177 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 if (retval)
1179 kfree(res_attr);
1180
1181 return retval;
1182}
1183
1184/**
1185 * pci_create_resource_files - create resource files in sysfs for @dev
1186 * @pdev: dev in question
1187 *
1188 * Walk the resources in @pdev creating files for each resource available.
1189 */
1190static int pci_create_resource_files(struct pci_dev *pdev)
1191{
1192 int i;
1193 int retval;
1194
1195 /* Expose the PCI resources from this device as files */
1196 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1197
1198 /* skip empty resources */
1199 if (!pci_resource_len(pdev, i))
1200 continue;
1201
1202 retval = pci_create_attr(pdev, i, 0);
1203 /* for prefetchable resources, create a WC mappable file */
1204 if (!retval && arch_can_pci_mmap_wc() &&
1205 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 retval = pci_create_attr(pdev, i, 1);
1207 if (retval) {
1208 pci_remove_resource_files(pdev);
1209 return retval;
1210 }
1211 }
1212 return 0;
1213}
1214#else /* !HAVE_PCI_MMAP */
1215int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217#endif /* HAVE_PCI_MMAP */
1218
1219/**
1220 * pci_write_rom - used to enable access to the PCI ROM display
1221 * @filp: sysfs file
1222 * @kobj: kernel object handle
1223 * @bin_attr: struct bin_attribute for this file
1224 * @buf: user input
1225 * @off: file offset
1226 * @count: number of byte in input
1227 *
1228 * writing anything except 0 enables it
1229 */
1230static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 struct bin_attribute *bin_attr, char *buf,
1232 loff_t off, size_t count)
1233{
1234 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235
1236 if ((off == 0) && (*buf == '0') && (count == 2))
1237 pdev->rom_attr_enabled = 0;
1238 else
1239 pdev->rom_attr_enabled = 1;
1240
1241 return count;
1242}
1243
1244/**
1245 * pci_read_rom - read a PCI ROM
1246 * @filp: sysfs file
1247 * @kobj: kernel object handle
1248 * @bin_attr: struct bin_attribute for this file
1249 * @buf: where to put the data we read from the ROM
1250 * @off: file offset
1251 * @count: number of bytes to read
1252 *
1253 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254 * device corresponding to @kobj.
1255 */
1256static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 struct bin_attribute *bin_attr, char *buf,
1258 loff_t off, size_t count)
1259{
1260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 void __iomem *rom;
1262 size_t size;
1263
1264 if (!pdev->rom_attr_enabled)
1265 return -EINVAL;
1266
1267 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1268 if (!rom || !size)
1269 return -EIO;
1270
1271 if (off >= size)
1272 count = 0;
1273 else {
1274 if (off + count > size)
1275 count = size - off;
1276
1277 memcpy_fromio(buf, rom + off, count);
1278 }
1279 pci_unmap_rom(pdev, rom);
1280
1281 return count;
1282}
1283
1284static const struct bin_attribute pci_config_attr = {
1285 .attr = {
1286 .name = "config",
1287 .mode = 0644,
1288 },
1289 .size = PCI_CFG_SPACE_SIZE,
1290 .read = pci_read_config,
1291 .write = pci_write_config,
1292};
1293
1294static const struct bin_attribute pcie_config_attr = {
1295 .attr = {
1296 .name = "config",
1297 .mode = 0644,
1298 },
1299 .size = PCI_CFG_SPACE_EXP_SIZE,
1300 .read = pci_read_config,
1301 .write = pci_write_config,
1302};
1303
1304static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct pci_dev *pdev = to_pci_dev(dev);
1308 unsigned long val;
1309 ssize_t result = kstrtoul(buf, 0, &val);
1310
1311 if (result < 0)
1312 return result;
1313
1314 if (val != 1)
1315 return -EINVAL;
1316
1317 pm_runtime_get_sync(dev);
1318 result = pci_reset_function(pdev);
1319 pm_runtime_put(dev);
1320 if (result < 0)
1321 return result;
1322
1323 return count;
1324}
1325
1326static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327
1328static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329{
1330 int retval;
1331
1332 pcie_vpd_create_sysfs_dev_files(dev);
1333 pcie_aspm_create_sysfs_dev_files(dev);
1334
1335 if (dev->reset_fn) {
1336 retval = device_create_file(&dev->dev, &dev_attr_reset);
1337 if (retval)
1338 goto error;
1339 }
1340 return 0;
1341
1342error:
1343 pcie_aspm_remove_sysfs_dev_files(dev);
1344 pcie_vpd_remove_sysfs_dev_files(dev);
1345 return retval;
1346}
1347
1348int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1349{
1350 int retval;
1351 int rom_size;
1352 struct bin_attribute *attr;
1353
1354 if (!sysfs_initialized)
1355 return -EACCES;
1356
1357 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1358 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1359 else
1360 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1361 if (retval)
1362 goto err;
1363
1364 retval = pci_create_resource_files(pdev);
1365 if (retval)
1366 goto err_config_file;
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
1369 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 if (rom_size) {
1371 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1372 if (!attr) {
1373 retval = -ENOMEM;
1374 goto err_resource_files;
1375 }
1376 sysfs_bin_attr_init(attr);
1377 attr->size = rom_size;
1378 attr->attr.name = "rom";
1379 attr->attr.mode = 0600;
1380 attr->read = pci_read_rom;
1381 attr->write = pci_write_rom;
1382 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1383 if (retval) {
1384 kfree(attr);
1385 goto err_resource_files;
1386 }
1387 pdev->rom_attr = attr;
1388 }
1389
1390 /* add sysfs entries for various capabilities */
1391 retval = pci_create_capabilities_sysfs(pdev);
1392 if (retval)
1393 goto err_rom_file;
1394
1395 pci_create_firmware_label_files(pdev);
1396
1397 return 0;
1398
1399err_rom_file:
1400 if (pdev->rom_attr) {
1401 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1402 kfree(pdev->rom_attr);
1403 pdev->rom_attr = NULL;
1404 }
1405err_resource_files:
1406 pci_remove_resource_files(pdev);
1407err_config_file:
1408 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1410 else
1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1412err:
1413 return retval;
1414}
1415
1416static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1417{
1418 pcie_vpd_remove_sysfs_dev_files(dev);
1419 pcie_aspm_remove_sysfs_dev_files(dev);
1420 if (dev->reset_fn) {
1421 device_remove_file(&dev->dev, &dev_attr_reset);
1422 dev->reset_fn = 0;
1423 }
1424}
1425
1426/**
1427 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1428 * @pdev: device whose entries we should free
1429 *
1430 * Cleanup when @pdev is removed from sysfs.
1431 */
1432void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1433{
1434 if (!sysfs_initialized)
1435 return;
1436
1437 pci_remove_capabilities_sysfs(pdev);
1438
1439 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1440 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1441 else
1442 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1443
1444 pci_remove_resource_files(pdev);
1445
1446 if (pdev->rom_attr) {
1447 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1448 kfree(pdev->rom_attr);
1449 pdev->rom_attr = NULL;
1450 }
1451
1452 pci_remove_firmware_label_files(pdev);
1453}
1454
1455static int __init pci_sysfs_init(void)
1456{
1457 struct pci_dev *pdev = NULL;
1458 int retval;
1459
1460 sysfs_initialized = 1;
1461 for_each_pci_dev(pdev) {
1462 retval = pci_create_sysfs_dev_files(pdev);
1463 if (retval) {
1464 pci_dev_put(pdev);
1465 return retval;
1466 }
1467 }
1468
1469 return 0;
1470}
1471late_initcall(pci_sysfs_init);
1472
1473static struct attribute *pci_dev_dev_attrs[] = {
1474 &dev_attr_boot_vga.attr,
1475 NULL,
1476};
1477
1478static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1479 struct attribute *a, int n)
1480{
1481 struct device *dev = kobj_to_dev(kobj);
1482 struct pci_dev *pdev = to_pci_dev(dev);
1483
1484 if (a == &dev_attr_boot_vga.attr)
1485 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static struct attribute *pci_dev_hp_attrs[] = {
1492 &dev_attr_remove.attr,
1493 &dev_attr_dev_rescan.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (pdev->is_virtfn)
1504 return 0;
1505
1506 return a->mode;
1507}
1508
1509static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1510 struct attribute *a, int n)
1511{
1512 struct device *dev = kobj_to_dev(kobj);
1513 struct pci_dev *pdev = to_pci_dev(dev);
1514
1515 if (pci_is_bridge(pdev))
1516 return a->mode;
1517
1518 return 0;
1519}
1520
1521static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1522 struct attribute *a, int n)
1523{
1524 struct device *dev = kobj_to_dev(kobj);
1525 struct pci_dev *pdev = to_pci_dev(dev);
1526
1527 if (pci_is_pcie(pdev))
1528 return a->mode;
1529
1530 return 0;
1531}
1532
1533static const struct attribute_group pci_dev_group = {
1534 .attrs = pci_dev_attrs,
1535};
1536
1537const struct attribute_group *pci_dev_groups[] = {
1538 &pci_dev_group,
1539 NULL,
1540};
1541
1542static const struct attribute_group pci_bridge_group = {
1543 .attrs = pci_bridge_attrs,
1544};
1545
1546const struct attribute_group *pci_bridge_groups[] = {
1547 &pci_bridge_group,
1548 NULL,
1549};
1550
1551static const struct attribute_group pcie_dev_group = {
1552 .attrs = pcie_dev_attrs,
1553};
1554
1555const struct attribute_group *pcie_dev_groups[] = {
1556 &pcie_dev_group,
1557 NULL,
1558};
1559
1560static const struct attribute_group pci_dev_hp_attr_group = {
1561 .attrs = pci_dev_hp_attrs,
1562 .is_visible = pci_dev_hp_attrs_are_visible,
1563};
1564
1565static const struct attribute_group pci_dev_attr_group = {
1566 .attrs = pci_dev_dev_attrs,
1567 .is_visible = pci_dev_attrs_are_visible,
1568};
1569
1570static const struct attribute_group pci_bridge_attr_group = {
1571 .attrs = pci_bridge_attrs,
1572 .is_visible = pci_bridge_attrs_are_visible,
1573};
1574
1575static const struct attribute_group pcie_dev_attr_group = {
1576 .attrs = pcie_dev_attrs,
1577 .is_visible = pcie_dev_attrs_are_visible,
1578};
1579
1580static const struct attribute_group *pci_dev_attr_groups[] = {
1581 &pci_dev_attr_group,
1582 &pci_dev_hp_attr_group,
1583#ifdef CONFIG_PCI_IOV
1584 &sriov_dev_attr_group,
1585#endif
1586 &pci_bridge_attr_group,
1587 &pcie_dev_attr_group,
1588#ifdef CONFIG_PCIEAER
1589 &aer_stats_attr_group,
1590#endif
1591 NULL,
1592};
1593
1594const struct device_type pci_dev_type = {
1595 .groups = pci_dev_attr_groups,
1596};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15#include <linux/bitfield.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/msi.h>
30#include <linux/of.h>
31#include <linux/aperture.h>
32#include "pci.h"
33
34#ifndef ARCH_PCI_DEV_GROUPS
35#define ARCH_PCI_DEV_GROUPS
36#endif
37
38static int sysfs_initialized; /* = 0 */
39
40/* show configuration fields */
41#define pci_config_attr(field, format_string) \
42static ssize_t \
43field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
44{ \
45 struct pci_dev *pdev; \
46 \
47 pdev = to_pci_dev(dev); \
48 return sysfs_emit(buf, format_string, pdev->field); \
49} \
50static DEVICE_ATTR_RO(field)
51
52pci_config_attr(vendor, "0x%04x\n");
53pci_config_attr(device, "0x%04x\n");
54pci_config_attr(subsystem_vendor, "0x%04x\n");
55pci_config_attr(subsystem_device, "0x%04x\n");
56pci_config_attr(revision, "0x%02x\n");
57pci_config_attr(class, "0x%06x\n");
58
59static ssize_t irq_show(struct device *dev,
60 struct device_attribute *attr,
61 char *buf)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
64
65#ifdef CONFIG_PCI_MSI
66 /*
67 * For MSI, show the first MSI IRQ; for all other cases including
68 * MSI-X, show the legacy INTx IRQ.
69 */
70 if (pdev->msi_enabled)
71 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
72#endif
73
74 return sysfs_emit(buf, "%u\n", pdev->irq);
75}
76static DEVICE_ATTR_RO(irq);
77
78static ssize_t broken_parity_status_show(struct device *dev,
79 struct device_attribute *attr,
80 char *buf)
81{
82 struct pci_dev *pdev = to_pci_dev(dev);
83 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
84}
85
86static ssize_t broken_parity_status_store(struct device *dev,
87 struct device_attribute *attr,
88 const char *buf, size_t count)
89{
90 struct pci_dev *pdev = to_pci_dev(dev);
91 unsigned long val;
92
93 if (kstrtoul(buf, 0, &val) < 0)
94 return -EINVAL;
95
96 pdev->broken_parity_status = !!val;
97
98 return count;
99}
100static DEVICE_ATTR_RW(broken_parity_status);
101
102static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
103 struct device_attribute *attr, char *buf)
104{
105 const struct cpumask *mask;
106
107#ifdef CONFIG_NUMA
108 if (dev_to_node(dev) == NUMA_NO_NODE)
109 mask = cpu_online_mask;
110 else
111 mask = cpumask_of_node(dev_to_node(dev));
112#else
113 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
114#endif
115 return cpumap_print_to_pagebuf(list, buf, mask);
116}
117
118static ssize_t local_cpus_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 return pci_dev_show_local_cpu(dev, false, attr, buf);
122}
123static DEVICE_ATTR_RO(local_cpus);
124
125static ssize_t local_cpulist_show(struct device *dev,
126 struct device_attribute *attr, char *buf)
127{
128 return pci_dev_show_local_cpu(dev, true, attr, buf);
129}
130static DEVICE_ATTR_RO(local_cpulist);
131
132/*
133 * PCI Bus Class Devices
134 */
135static ssize_t cpuaffinity_show(struct device *dev,
136 struct device_attribute *attr, char *buf)
137{
138 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
139
140 return cpumap_print_to_pagebuf(false, buf, cpumask);
141}
142static DEVICE_ATTR_RO(cpuaffinity);
143
144static ssize_t cpulistaffinity_show(struct device *dev,
145 struct device_attribute *attr, char *buf)
146{
147 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
148
149 return cpumap_print_to_pagebuf(true, buf, cpumask);
150}
151static DEVICE_ATTR_RO(cpulistaffinity);
152
153static ssize_t power_state_show(struct device *dev,
154 struct device_attribute *attr, char *buf)
155{
156 struct pci_dev *pdev = to_pci_dev(dev);
157
158 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
159}
160static DEVICE_ATTR_RO(power_state);
161
162/* show resources */
163static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
164 char *buf)
165{
166 struct pci_dev *pci_dev = to_pci_dev(dev);
167 int i;
168 int max;
169 resource_size_t start, end;
170 size_t len = 0;
171
172 if (pci_dev->subordinate)
173 max = DEVICE_COUNT_RESOURCE;
174 else
175 max = PCI_BRIDGE_RESOURCES;
176
177 for (i = 0; i < max; i++) {
178 struct resource *res = &pci_dev->resource[i];
179 pci_resource_to_user(pci_dev, i, res, &start, &end);
180 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
181 (unsigned long long)start,
182 (unsigned long long)end,
183 (unsigned long long)res->flags);
184 }
185 return len;
186}
187static DEVICE_ATTR_RO(resource);
188
189static ssize_t max_link_speed_show(struct device *dev,
190 struct device_attribute *attr, char *buf)
191{
192 struct pci_dev *pdev = to_pci_dev(dev);
193
194 return sysfs_emit(buf, "%s\n",
195 pci_speed_string(pcie_get_speed_cap(pdev)));
196}
197static DEVICE_ATTR_RO(max_link_speed);
198
199static ssize_t max_link_width_show(struct device *dev,
200 struct device_attribute *attr, char *buf)
201{
202 struct pci_dev *pdev = to_pci_dev(dev);
203
204 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
205}
206static DEVICE_ATTR_RO(max_link_width);
207
208static ssize_t current_link_speed_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214 enum pci_bus_speed speed;
215
216 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
217 if (err)
218 return -EINVAL;
219
220 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
221
222 return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
223}
224static DEVICE_ATTR_RO(current_link_speed);
225
226static ssize_t current_link_width_show(struct device *dev,
227 struct device_attribute *attr, char *buf)
228{
229 struct pci_dev *pci_dev = to_pci_dev(dev);
230 u16 linkstat;
231 int err;
232
233 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
234 if (err)
235 return -EINVAL;
236
237 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
238}
239static DEVICE_ATTR_RO(current_link_width);
240
241static ssize_t secondary_bus_number_show(struct device *dev,
242 struct device_attribute *attr,
243 char *buf)
244{
245 struct pci_dev *pci_dev = to_pci_dev(dev);
246 u8 sec_bus;
247 int err;
248
249 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
250 if (err)
251 return -EINVAL;
252
253 return sysfs_emit(buf, "%u\n", sec_bus);
254}
255static DEVICE_ATTR_RO(secondary_bus_number);
256
257static ssize_t subordinate_bus_number_show(struct device *dev,
258 struct device_attribute *attr,
259 char *buf)
260{
261 struct pci_dev *pci_dev = to_pci_dev(dev);
262 u8 sub_bus;
263 int err;
264
265 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
266 if (err)
267 return -EINVAL;
268
269 return sysfs_emit(buf, "%u\n", sub_bus);
270}
271static DEVICE_ATTR_RO(subordinate_bus_number);
272
273static ssize_t ari_enabled_show(struct device *dev,
274 struct device_attribute *attr,
275 char *buf)
276{
277 struct pci_dev *pci_dev = to_pci_dev(dev);
278
279 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
280}
281static DEVICE_ATTR_RO(ari_enabled);
282
283static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
284 char *buf)
285{
286 struct pci_dev *pci_dev = to_pci_dev(dev);
287
288 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
289 pci_dev->vendor, pci_dev->device,
290 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
291 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
292 (u8)(pci_dev->class));
293}
294static DEVICE_ATTR_RO(modalias);
295
296static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
297 const char *buf, size_t count)
298{
299 struct pci_dev *pdev = to_pci_dev(dev);
300 unsigned long val;
301 ssize_t result = 0;
302
303 /* this can crash the machine when done on the "wrong" device */
304 if (!capable(CAP_SYS_ADMIN))
305 return -EPERM;
306
307 if (kstrtoul(buf, 0, &val) < 0)
308 return -EINVAL;
309
310 device_lock(dev);
311 if (dev->driver)
312 result = -EBUSY;
313 else if (val)
314 result = pci_enable_device(pdev);
315 else if (pci_is_enabled(pdev))
316 pci_disable_device(pdev);
317 else
318 result = -EIO;
319 device_unlock(dev);
320
321 return result < 0 ? result : count;
322}
323
324static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
325 char *buf)
326{
327 struct pci_dev *pdev;
328
329 pdev = to_pci_dev(dev);
330 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
331}
332static DEVICE_ATTR_RW(enable);
333
334#ifdef CONFIG_NUMA
335static ssize_t numa_node_store(struct device *dev,
336 struct device_attribute *attr, const char *buf,
337 size_t count)
338{
339 struct pci_dev *pdev = to_pci_dev(dev);
340 int node;
341
342 if (!capable(CAP_SYS_ADMIN))
343 return -EPERM;
344
345 if (kstrtoint(buf, 0, &node) < 0)
346 return -EINVAL;
347
348 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
349 return -EINVAL;
350
351 if (node != NUMA_NO_NODE && !node_online(node))
352 return -EINVAL;
353
354 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
355 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
356 node);
357
358 dev->numa_node = node;
359 return count;
360}
361
362static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
363 char *buf)
364{
365 return sysfs_emit(buf, "%d\n", dev->numa_node);
366}
367static DEVICE_ATTR_RW(numa_node);
368#endif
369
370static ssize_t dma_mask_bits_show(struct device *dev,
371 struct device_attribute *attr, char *buf)
372{
373 struct pci_dev *pdev = to_pci_dev(dev);
374
375 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
376}
377static DEVICE_ATTR_RO(dma_mask_bits);
378
379static ssize_t consistent_dma_mask_bits_show(struct device *dev,
380 struct device_attribute *attr,
381 char *buf)
382{
383 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
384}
385static DEVICE_ATTR_RO(consistent_dma_mask_bits);
386
387static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
388 char *buf)
389{
390 struct pci_dev *pdev = to_pci_dev(dev);
391 struct pci_bus *subordinate = pdev->subordinate;
392
393 return sysfs_emit(buf, "%u\n", subordinate ?
394 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
395 : !pdev->no_msi);
396}
397
398static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
399 const char *buf, size_t count)
400{
401 struct pci_dev *pdev = to_pci_dev(dev);
402 struct pci_bus *subordinate = pdev->subordinate;
403 unsigned long val;
404
405 if (!capable(CAP_SYS_ADMIN))
406 return -EPERM;
407
408 if (kstrtoul(buf, 0, &val) < 0)
409 return -EINVAL;
410
411 /*
412 * "no_msi" and "bus_flags" only affect what happens when a driver
413 * requests MSI or MSI-X. They don't affect any drivers that have
414 * already requested MSI or MSI-X.
415 */
416 if (!subordinate) {
417 pdev->no_msi = !val;
418 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
419 val ? "allowed" : "disallowed");
420 return count;
421 }
422
423 if (val)
424 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
425 else
426 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
427
428 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
429 val ? "allowed" : "disallowed");
430 return count;
431}
432static DEVICE_ATTR_RW(msi_bus);
433
434static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count)
435{
436 unsigned long val;
437 struct pci_bus *b = NULL;
438
439 if (kstrtoul(buf, 0, &val) < 0)
440 return -EINVAL;
441
442 if (val) {
443 pci_lock_rescan_remove();
444 while ((b = pci_find_next_bus(b)) != NULL)
445 pci_rescan_bus(b);
446 pci_unlock_rescan_remove();
447 }
448 return count;
449}
450static BUS_ATTR_WO(rescan);
451
452static struct attribute *pci_bus_attrs[] = {
453 &bus_attr_rescan.attr,
454 NULL,
455};
456
457static const struct attribute_group pci_bus_group = {
458 .attrs = pci_bus_attrs,
459};
460
461const struct attribute_group *pci_bus_groups[] = {
462 &pci_bus_group,
463 NULL,
464};
465
466static ssize_t dev_rescan_store(struct device *dev,
467 struct device_attribute *attr, const char *buf,
468 size_t count)
469{
470 unsigned long val;
471 struct pci_dev *pdev = to_pci_dev(dev);
472
473 if (kstrtoul(buf, 0, &val) < 0)
474 return -EINVAL;
475
476 if (val) {
477 pci_lock_rescan_remove();
478 pci_rescan_bus(pdev->bus);
479 pci_unlock_rescan_remove();
480 }
481 return count;
482}
483static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
484 dev_rescan_store);
485
486static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
487 const char *buf, size_t count)
488{
489 unsigned long val;
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val && device_remove_file_self(dev, attr))
495 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
496 return count;
497}
498static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
499 remove_store);
500
501static ssize_t bus_rescan_store(struct device *dev,
502 struct device_attribute *attr,
503 const char *buf, size_t count)
504{
505 unsigned long val;
506 struct pci_bus *bus = to_pci_bus(dev);
507
508 if (kstrtoul(buf, 0, &val) < 0)
509 return -EINVAL;
510
511 if (val) {
512 pci_lock_rescan_remove();
513 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
514 pci_rescan_bus_bridge_resize(bus->self);
515 else
516 pci_rescan_bus(bus);
517 pci_unlock_rescan_remove();
518 }
519 return count;
520}
521static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
522 bus_rescan_store);
523
524static ssize_t reset_subordinate_store(struct device *dev,
525 struct device_attribute *attr,
526 const char *buf, size_t count)
527{
528 struct pci_dev *pdev = to_pci_dev(dev);
529 struct pci_bus *bus = pdev->subordinate;
530 unsigned long val;
531
532 if (!capable(CAP_SYS_ADMIN))
533 return -EPERM;
534
535 if (kstrtoul(buf, 0, &val) < 0)
536 return -EINVAL;
537
538 if (val) {
539 int ret = __pci_reset_bus(bus);
540
541 if (ret)
542 return ret;
543 }
544
545 return count;
546}
547static DEVICE_ATTR_WO(reset_subordinate);
548
549#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
550static ssize_t d3cold_allowed_store(struct device *dev,
551 struct device_attribute *attr,
552 const char *buf, size_t count)
553{
554 struct pci_dev *pdev = to_pci_dev(dev);
555 unsigned long val;
556
557 if (kstrtoul(buf, 0, &val) < 0)
558 return -EINVAL;
559
560 pdev->d3cold_allowed = !!val;
561 pci_bridge_d3_update(pdev);
562
563 pm_runtime_resume(dev);
564
565 return count;
566}
567
568static ssize_t d3cold_allowed_show(struct device *dev,
569 struct device_attribute *attr, char *buf)
570{
571 struct pci_dev *pdev = to_pci_dev(dev);
572 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
573}
574static DEVICE_ATTR_RW(d3cold_allowed);
575#endif
576
577#ifdef CONFIG_OF
578static ssize_t devspec_show(struct device *dev,
579 struct device_attribute *attr, char *buf)
580{
581 struct pci_dev *pdev = to_pci_dev(dev);
582 struct device_node *np = pci_device_to_OF_node(pdev);
583
584 if (np == NULL)
585 return 0;
586 return sysfs_emit(buf, "%pOF\n", np);
587}
588static DEVICE_ATTR_RO(devspec);
589#endif
590
591static ssize_t driver_override_store(struct device *dev,
592 struct device_attribute *attr,
593 const char *buf, size_t count)
594{
595 struct pci_dev *pdev = to_pci_dev(dev);
596 int ret;
597
598 ret = driver_set_override(dev, &pdev->driver_override, buf, count);
599 if (ret)
600 return ret;
601
602 return count;
603}
604
605static ssize_t driver_override_show(struct device *dev,
606 struct device_attribute *attr, char *buf)
607{
608 struct pci_dev *pdev = to_pci_dev(dev);
609 ssize_t len;
610
611 device_lock(dev);
612 len = sysfs_emit(buf, "%s\n", pdev->driver_override);
613 device_unlock(dev);
614 return len;
615}
616static DEVICE_ATTR_RW(driver_override);
617
618static struct attribute *pci_dev_attrs[] = {
619 &dev_attr_power_state.attr,
620 &dev_attr_resource.attr,
621 &dev_attr_vendor.attr,
622 &dev_attr_device.attr,
623 &dev_attr_subsystem_vendor.attr,
624 &dev_attr_subsystem_device.attr,
625 &dev_attr_revision.attr,
626 &dev_attr_class.attr,
627 &dev_attr_irq.attr,
628 &dev_attr_local_cpus.attr,
629 &dev_attr_local_cpulist.attr,
630 &dev_attr_modalias.attr,
631#ifdef CONFIG_NUMA
632 &dev_attr_numa_node.attr,
633#endif
634 &dev_attr_dma_mask_bits.attr,
635 &dev_attr_consistent_dma_mask_bits.attr,
636 &dev_attr_enable.attr,
637 &dev_attr_broken_parity_status.attr,
638 &dev_attr_msi_bus.attr,
639#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
640 &dev_attr_d3cold_allowed.attr,
641#endif
642#ifdef CONFIG_OF
643 &dev_attr_devspec.attr,
644#endif
645 &dev_attr_driver_override.attr,
646 &dev_attr_ari_enabled.attr,
647 NULL,
648};
649
650static struct attribute *pci_bridge_attrs[] = {
651 &dev_attr_subordinate_bus_number.attr,
652 &dev_attr_secondary_bus_number.attr,
653 &dev_attr_reset_subordinate.attr,
654 NULL,
655};
656
657static struct attribute *pcie_dev_attrs[] = {
658 &dev_attr_current_link_speed.attr,
659 &dev_attr_current_link_width.attr,
660 &dev_attr_max_link_width.attr,
661 &dev_attr_max_link_speed.attr,
662 NULL,
663};
664
665static struct attribute *pcibus_attrs[] = {
666 &dev_attr_bus_rescan.attr,
667 &dev_attr_cpuaffinity.attr,
668 &dev_attr_cpulistaffinity.attr,
669 NULL,
670};
671
672static const struct attribute_group pcibus_group = {
673 .attrs = pcibus_attrs,
674};
675
676const struct attribute_group *pcibus_groups[] = {
677 &pcibus_group,
678 NULL,
679};
680
681static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
682 char *buf)
683{
684 struct pci_dev *pdev = to_pci_dev(dev);
685 struct pci_dev *vga_dev = vga_default_device();
686
687 if (vga_dev)
688 return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
689
690 return sysfs_emit(buf, "%u\n",
691 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
692 IORESOURCE_ROM_SHADOW));
693}
694static DEVICE_ATTR_RO(boot_vga);
695
696static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
697 struct bin_attribute *bin_attr, char *buf,
698 loff_t off, size_t count)
699{
700 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
701 unsigned int size = 64;
702 loff_t init_off = off;
703 u8 *data = (u8 *) buf;
704
705 /* Several chips lock up trying to read undefined config space */
706 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
707 size = dev->cfg_size;
708 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
709 size = 128;
710
711 if (off > size)
712 return 0;
713 if (off + count > size) {
714 size -= off;
715 count = size;
716 } else {
717 size = count;
718 }
719
720 pci_config_pm_runtime_get(dev);
721
722 if ((off & 1) && size) {
723 u8 val;
724 pci_user_read_config_byte(dev, off, &val);
725 data[off - init_off] = val;
726 off++;
727 size--;
728 }
729
730 if ((off & 3) && size > 2) {
731 u16 val;
732 pci_user_read_config_word(dev, off, &val);
733 data[off - init_off] = val & 0xff;
734 data[off - init_off + 1] = (val >> 8) & 0xff;
735 off += 2;
736 size -= 2;
737 }
738
739 while (size > 3) {
740 u32 val;
741 pci_user_read_config_dword(dev, off, &val);
742 data[off - init_off] = val & 0xff;
743 data[off - init_off + 1] = (val >> 8) & 0xff;
744 data[off - init_off + 2] = (val >> 16) & 0xff;
745 data[off - init_off + 3] = (val >> 24) & 0xff;
746 off += 4;
747 size -= 4;
748 cond_resched();
749 }
750
751 if (size >= 2) {
752 u16 val;
753 pci_user_read_config_word(dev, off, &val);
754 data[off - init_off] = val & 0xff;
755 data[off - init_off + 1] = (val >> 8) & 0xff;
756 off += 2;
757 size -= 2;
758 }
759
760 if (size > 0) {
761 u8 val;
762 pci_user_read_config_byte(dev, off, &val);
763 data[off - init_off] = val;
764 }
765
766 pci_config_pm_runtime_put(dev);
767
768 return count;
769}
770
771static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
772 struct bin_attribute *bin_attr, char *buf,
773 loff_t off, size_t count)
774{
775 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
776 unsigned int size = count;
777 loff_t init_off = off;
778 u8 *data = (u8 *) buf;
779 int ret;
780
781 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
782 if (ret)
783 return ret;
784
785 if (resource_is_exclusive(&dev->driver_exclusive_resource, off,
786 count)) {
787 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",
788 current->comm, off);
789 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
790 }
791
792 if (off > dev->cfg_size)
793 return 0;
794 if (off + count > dev->cfg_size) {
795 size = dev->cfg_size - off;
796 count = size;
797 }
798
799 pci_config_pm_runtime_get(dev);
800
801 if ((off & 1) && size) {
802 pci_user_write_config_byte(dev, off, data[off - init_off]);
803 off++;
804 size--;
805 }
806
807 if ((off & 3) && size > 2) {
808 u16 val = data[off - init_off];
809 val |= (u16) data[off - init_off + 1] << 8;
810 pci_user_write_config_word(dev, off, val);
811 off += 2;
812 size -= 2;
813 }
814
815 while (size > 3) {
816 u32 val = data[off - init_off];
817 val |= (u32) data[off - init_off + 1] << 8;
818 val |= (u32) data[off - init_off + 2] << 16;
819 val |= (u32) data[off - init_off + 3] << 24;
820 pci_user_write_config_dword(dev, off, val);
821 off += 4;
822 size -= 4;
823 }
824
825 if (size >= 2) {
826 u16 val = data[off - init_off];
827 val |= (u16) data[off - init_off + 1] << 8;
828 pci_user_write_config_word(dev, off, val);
829 off += 2;
830 size -= 2;
831 }
832
833 if (size)
834 pci_user_write_config_byte(dev, off, data[off - init_off]);
835
836 pci_config_pm_runtime_put(dev);
837
838 return count;
839}
840static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
841
842static struct bin_attribute *pci_dev_config_attrs[] = {
843 &bin_attr_config,
844 NULL,
845};
846
847static size_t pci_dev_config_attr_bin_size(struct kobject *kobj,
848 const struct bin_attribute *a,
849 int n)
850{
851 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
852
853 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
854 return PCI_CFG_SPACE_EXP_SIZE;
855 return PCI_CFG_SPACE_SIZE;
856}
857
858static const struct attribute_group pci_dev_config_attr_group = {
859 .bin_attrs = pci_dev_config_attrs,
860 .bin_size = pci_dev_config_attr_bin_size,
861};
862
863/*
864 * llseek operation for mmappable PCI resources.
865 * May be left unused if the arch doesn't provide them.
866 */
867static __maybe_unused loff_t
868pci_llseek_resource(struct file *filep,
869 struct kobject *kobj __always_unused,
870 const struct bin_attribute *attr,
871 loff_t offset, int whence)
872{
873 return fixed_size_llseek(filep, offset, whence, attr->size);
874}
875
876#ifdef HAVE_PCI_LEGACY
877/**
878 * pci_read_legacy_io - read byte(s) from legacy I/O port space
879 * @filp: open sysfs file
880 * @kobj: kobject corresponding to file to read from
881 * @bin_attr: struct bin_attribute for this file
882 * @buf: buffer to store results
883 * @off: offset into legacy I/O port space
884 * @count: number of bytes to read
885 *
886 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
887 * callback routine (pci_legacy_read).
888 */
889static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
890 struct bin_attribute *bin_attr, char *buf,
891 loff_t off, size_t count)
892{
893 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
894
895 /* Only support 1, 2 or 4 byte accesses */
896 if (count != 1 && count != 2 && count != 4)
897 return -EINVAL;
898
899 return pci_legacy_read(bus, off, (u32 *)buf, count);
900}
901
902/**
903 * pci_write_legacy_io - write byte(s) to legacy I/O port space
904 * @filp: open sysfs file
905 * @kobj: kobject corresponding to file to read from
906 * @bin_attr: struct bin_attribute for this file
907 * @buf: buffer containing value to be written
908 * @off: offset into legacy I/O port space
909 * @count: number of bytes to write
910 *
911 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
912 * callback routine (pci_legacy_write).
913 */
914static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
915 struct bin_attribute *bin_attr, char *buf,
916 loff_t off, size_t count)
917{
918 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
919
920 /* Only support 1, 2 or 4 byte accesses */
921 if (count != 1 && count != 2 && count != 4)
922 return -EINVAL;
923
924 return pci_legacy_write(bus, off, *(u32 *)buf, count);
925}
926
927/**
928 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
929 * @filp: open sysfs file
930 * @kobj: kobject corresponding to device to be mapped
931 * @attr: struct bin_attribute for this file
932 * @vma: struct vm_area_struct passed to mmap
933 *
934 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
935 * legacy memory space (first meg of bus space) into application virtual
936 * memory space.
937 */
938static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
939 const struct bin_attribute *attr,
940 struct vm_area_struct *vma)
941{
942 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
943
944 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
945}
946
947/**
948 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
949 * @filp: open sysfs file
950 * @kobj: kobject corresponding to device to be mapped
951 * @attr: struct bin_attribute for this file
952 * @vma: struct vm_area_struct passed to mmap
953 *
954 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
955 * legacy IO space (first meg of bus space) into application virtual
956 * memory space. Returns -ENOSYS if the operation isn't supported
957 */
958static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
959 const struct bin_attribute *attr,
960 struct vm_area_struct *vma)
961{
962 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
963
964 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
965}
966
967/**
968 * pci_adjust_legacy_attr - adjustment of legacy file attributes
969 * @b: bus to create files under
970 * @mmap_type: I/O port or memory
971 *
972 * Stub implementation. Can be overridden by arch if necessary.
973 */
974void __weak pci_adjust_legacy_attr(struct pci_bus *b,
975 enum pci_mmap_state mmap_type)
976{
977}
978
979/**
980 * pci_create_legacy_files - create legacy I/O port and memory files
981 * @b: bus to create files under
982 *
983 * Some platforms allow access to legacy I/O port and ISA memory space on
984 * a per-bus basis. This routine creates the files and ties them into
985 * their associated read, write and mmap files from pci-sysfs.c
986 *
987 * On error unwind, but don't propagate the error to the caller
988 * as it is ok to set up the PCI bus without these files.
989 */
990void pci_create_legacy_files(struct pci_bus *b)
991{
992 int error;
993
994 if (!sysfs_initialized)
995 return;
996
997 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
998 GFP_ATOMIC);
999 if (!b->legacy_io)
1000 goto kzalloc_err;
1001
1002 sysfs_bin_attr_init(b->legacy_io);
1003 b->legacy_io->attr.name = "legacy_io";
1004 b->legacy_io->size = 0xffff;
1005 b->legacy_io->attr.mode = 0600;
1006 b->legacy_io->read = pci_read_legacy_io;
1007 b->legacy_io->write = pci_write_legacy_io;
1008 /* See pci_create_attr() for motivation */
1009 b->legacy_io->llseek = pci_llseek_resource;
1010 b->legacy_io->mmap = pci_mmap_legacy_io;
1011 b->legacy_io->f_mapping = iomem_get_mapping;
1012 pci_adjust_legacy_attr(b, pci_mmap_io);
1013 error = device_create_bin_file(&b->dev, b->legacy_io);
1014 if (error)
1015 goto legacy_io_err;
1016
1017 /* Allocated above after the legacy_io struct */
1018 b->legacy_mem = b->legacy_io + 1;
1019 sysfs_bin_attr_init(b->legacy_mem);
1020 b->legacy_mem->attr.name = "legacy_mem";
1021 b->legacy_mem->size = 1024*1024;
1022 b->legacy_mem->attr.mode = 0600;
1023 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1024 /* See pci_create_attr() for motivation */
1025 b->legacy_mem->llseek = pci_llseek_resource;
1026 b->legacy_mem->f_mapping = iomem_get_mapping;
1027 pci_adjust_legacy_attr(b, pci_mmap_mem);
1028 error = device_create_bin_file(&b->dev, b->legacy_mem);
1029 if (error)
1030 goto legacy_mem_err;
1031
1032 return;
1033
1034legacy_mem_err:
1035 device_remove_bin_file(&b->dev, b->legacy_io);
1036legacy_io_err:
1037 kfree(b->legacy_io);
1038 b->legacy_io = NULL;
1039kzalloc_err:
1040 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
1041}
1042
1043void pci_remove_legacy_files(struct pci_bus *b)
1044{
1045 if (b->legacy_io) {
1046 device_remove_bin_file(&b->dev, b->legacy_io);
1047 device_remove_bin_file(&b->dev, b->legacy_mem);
1048 kfree(b->legacy_io); /* both are allocated here */
1049 }
1050}
1051#endif /* HAVE_PCI_LEGACY */
1052
1053#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1054/**
1055 * pci_mmap_resource - map a PCI resource into user memory space
1056 * @kobj: kobject for mapping
1057 * @attr: struct bin_attribute for the file being mapped
1058 * @vma: struct vm_area_struct passed into the mmap
1059 * @write_combine: 1 for write_combine mapping
1060 *
1061 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1062 */
1063static int pci_mmap_resource(struct kobject *kobj, const struct bin_attribute *attr,
1064 struct vm_area_struct *vma, int write_combine)
1065{
1066 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1067 int bar = (unsigned long)attr->private;
1068 enum pci_mmap_state mmap_type;
1069 struct resource *res = &pdev->resource[bar];
1070 int ret;
1071
1072 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1073 if (ret)
1074 return ret;
1075
1076 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1077 return -EINVAL;
1078
1079 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1080 return -EINVAL;
1081
1082 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1083
1084 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1085}
1086
1087static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1088 const struct bin_attribute *attr,
1089 struct vm_area_struct *vma)
1090{
1091 return pci_mmap_resource(kobj, attr, vma, 0);
1092}
1093
1094static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1095 const struct bin_attribute *attr,
1096 struct vm_area_struct *vma)
1097{
1098 return pci_mmap_resource(kobj, attr, vma, 1);
1099}
1100
1101static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count, bool write)
1104{
1105#ifdef CONFIG_HAS_IOPORT
1106 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1107 int bar = (unsigned long)attr->private;
1108 unsigned long port = off;
1109
1110 port += pci_resource_start(pdev, bar);
1111
1112 if (port > pci_resource_end(pdev, bar))
1113 return 0;
1114
1115 if (port + count - 1 > pci_resource_end(pdev, bar))
1116 return -EINVAL;
1117
1118 switch (count) {
1119 case 1:
1120 if (write)
1121 outb(*(u8 *)buf, port);
1122 else
1123 *(u8 *)buf = inb(port);
1124 return 1;
1125 case 2:
1126 if (write)
1127 outw(*(u16 *)buf, port);
1128 else
1129 *(u16 *)buf = inw(port);
1130 return 2;
1131 case 4:
1132 if (write)
1133 outl(*(u32 *)buf, port);
1134 else
1135 *(u32 *)buf = inl(port);
1136 return 4;
1137 }
1138 return -EINVAL;
1139#else
1140 return -ENXIO;
1141#endif
1142}
1143
1144static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1145 struct bin_attribute *attr, char *buf,
1146 loff_t off, size_t count)
1147{
1148 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1149}
1150
1151static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1152 struct bin_attribute *attr, char *buf,
1153 loff_t off, size_t count)
1154{
1155 int ret;
1156
1157 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1158 if (ret)
1159 return ret;
1160
1161 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1162}
1163
1164/**
1165 * pci_remove_resource_files - cleanup resource files
1166 * @pdev: dev to cleanup
1167 *
1168 * If we created resource files for @pdev, remove them from sysfs and
1169 * free their resources.
1170 */
1171static void pci_remove_resource_files(struct pci_dev *pdev)
1172{
1173 int i;
1174
1175 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1176 struct bin_attribute *res_attr;
1177
1178 res_attr = pdev->res_attr[i];
1179 if (res_attr) {
1180 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1181 kfree(res_attr);
1182 }
1183
1184 res_attr = pdev->res_attr_wc[i];
1185 if (res_attr) {
1186 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1187 kfree(res_attr);
1188 }
1189 }
1190}
1191
1192static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1193{
1194 /* allocate attribute structure, piggyback attribute name */
1195 int name_len = write_combine ? 13 : 10;
1196 struct bin_attribute *res_attr;
1197 char *res_attr_name;
1198 int retval;
1199
1200 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1201 if (!res_attr)
1202 return -ENOMEM;
1203
1204 res_attr_name = (char *)(res_attr + 1);
1205
1206 sysfs_bin_attr_init(res_attr);
1207 if (write_combine) {
1208 sprintf(res_attr_name, "resource%d_wc", num);
1209 res_attr->mmap = pci_mmap_resource_wc;
1210 } else {
1211 sprintf(res_attr_name, "resource%d", num);
1212 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1213 res_attr->read = pci_read_resource_io;
1214 res_attr->write = pci_write_resource_io;
1215 if (arch_can_pci_mmap_io())
1216 res_attr->mmap = pci_mmap_resource_uc;
1217 } else {
1218 res_attr->mmap = pci_mmap_resource_uc;
1219 }
1220 }
1221 if (res_attr->mmap) {
1222 res_attr->f_mapping = iomem_get_mapping;
1223 /*
1224 * generic_file_llseek() consults f_mapping->host to determine
1225 * the file size. As iomem_inode knows nothing about the
1226 * attribute, it's not going to work, so override it as well.
1227 */
1228 res_attr->llseek = pci_llseek_resource;
1229 }
1230 res_attr->attr.name = res_attr_name;
1231 res_attr->attr.mode = 0600;
1232 res_attr->size = pci_resource_len(pdev, num);
1233 res_attr->private = (void *)(unsigned long)num;
1234 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1235 if (retval) {
1236 kfree(res_attr);
1237 return retval;
1238 }
1239
1240 if (write_combine)
1241 pdev->res_attr_wc[num] = res_attr;
1242 else
1243 pdev->res_attr[num] = res_attr;
1244
1245 return 0;
1246}
1247
1248/**
1249 * pci_create_resource_files - create resource files in sysfs for @dev
1250 * @pdev: dev in question
1251 *
1252 * Walk the resources in @pdev creating files for each resource available.
1253 */
1254static int pci_create_resource_files(struct pci_dev *pdev)
1255{
1256 int i;
1257 int retval;
1258
1259 /* Expose the PCI resources from this device as files */
1260 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1261
1262 /* skip empty resources */
1263 if (!pci_resource_len(pdev, i))
1264 continue;
1265
1266 retval = pci_create_attr(pdev, i, 0);
1267 /* for prefetchable resources, create a WC mappable file */
1268 if (!retval && arch_can_pci_mmap_wc() &&
1269 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1270 retval = pci_create_attr(pdev, i, 1);
1271 if (retval) {
1272 pci_remove_resource_files(pdev);
1273 return retval;
1274 }
1275 }
1276 return 0;
1277}
1278#else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
1279int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1280void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1281#endif
1282
1283/**
1284 * pci_write_rom - used to enable access to the PCI ROM display
1285 * @filp: sysfs file
1286 * @kobj: kernel object handle
1287 * @bin_attr: struct bin_attribute for this file
1288 * @buf: user input
1289 * @off: file offset
1290 * @count: number of byte in input
1291 *
1292 * writing anything except 0 enables it
1293 */
1294static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1295 struct bin_attribute *bin_attr, char *buf,
1296 loff_t off, size_t count)
1297{
1298 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1299
1300 if ((off == 0) && (*buf == '0') && (count == 2))
1301 pdev->rom_attr_enabled = 0;
1302 else
1303 pdev->rom_attr_enabled = 1;
1304
1305 return count;
1306}
1307
1308/**
1309 * pci_read_rom - read a PCI ROM
1310 * @filp: sysfs file
1311 * @kobj: kernel object handle
1312 * @bin_attr: struct bin_attribute for this file
1313 * @buf: where to put the data we read from the ROM
1314 * @off: file offset
1315 * @count: number of bytes to read
1316 *
1317 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1318 * device corresponding to @kobj.
1319 */
1320static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1321 struct bin_attribute *bin_attr, char *buf,
1322 loff_t off, size_t count)
1323{
1324 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1325 void __iomem *rom;
1326 size_t size;
1327
1328 if (!pdev->rom_attr_enabled)
1329 return -EINVAL;
1330
1331 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1332 if (!rom || !size)
1333 return -EIO;
1334
1335 if (off >= size)
1336 count = 0;
1337 else {
1338 if (off + count > size)
1339 count = size - off;
1340
1341 memcpy_fromio(buf, rom + off, count);
1342 }
1343 pci_unmap_rom(pdev, rom);
1344
1345 return count;
1346}
1347static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
1348
1349static struct bin_attribute *pci_dev_rom_attrs[] = {
1350 &bin_attr_rom,
1351 NULL,
1352};
1353
1354static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
1355 const struct bin_attribute *a, int n)
1356{
1357 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1358
1359 /* If the device has a ROM, try to expose it in sysfs. */
1360 if (!pci_resource_end(pdev, PCI_ROM_RESOURCE))
1361 return 0;
1362
1363 return a->attr.mode;
1364}
1365
1366static size_t pci_dev_rom_attr_bin_size(struct kobject *kobj,
1367 const struct bin_attribute *a, int n)
1368{
1369 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1370
1371 return pci_resource_len(pdev, PCI_ROM_RESOURCE);
1372}
1373
1374static const struct attribute_group pci_dev_rom_attr_group = {
1375 .bin_attrs = pci_dev_rom_attrs,
1376 .is_bin_visible = pci_dev_rom_attr_is_visible,
1377 .bin_size = pci_dev_rom_attr_bin_size,
1378};
1379
1380static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1381 const char *buf, size_t count)
1382{
1383 struct pci_dev *pdev = to_pci_dev(dev);
1384 unsigned long val;
1385 ssize_t result;
1386
1387 if (kstrtoul(buf, 0, &val) < 0)
1388 return -EINVAL;
1389
1390 if (val != 1)
1391 return -EINVAL;
1392
1393 pm_runtime_get_sync(dev);
1394 result = pci_reset_function(pdev);
1395 pm_runtime_put(dev);
1396 if (result < 0)
1397 return result;
1398
1399 return count;
1400}
1401static DEVICE_ATTR_WO(reset);
1402
1403static struct attribute *pci_dev_reset_attrs[] = {
1404 &dev_attr_reset.attr,
1405 NULL,
1406};
1407
1408static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
1409 struct attribute *a, int n)
1410{
1411 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1412
1413 if (!pci_reset_supported(pdev))
1414 return 0;
1415
1416 return a->mode;
1417}
1418
1419static const struct attribute_group pci_dev_reset_attr_group = {
1420 .attrs = pci_dev_reset_attrs,
1421 .is_visible = pci_dev_reset_attr_is_visible,
1422};
1423
1424static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)
1425{
1426 struct pci_dev *pdev = to_pci_dev(dev);
1427 ssize_t ret;
1428
1429 pci_config_pm_runtime_get(pdev);
1430
1431 ret = sysfs_emit(buf, "%016llx\n",
1432 (u64)pci_rebar_get_possible_sizes(pdev, n));
1433
1434 pci_config_pm_runtime_put(pdev);
1435
1436 return ret;
1437}
1438
1439static ssize_t __resource_resize_store(struct device *dev, int n,
1440 const char *buf, size_t count)
1441{
1442 struct pci_dev *pdev = to_pci_dev(dev);
1443 unsigned long size, flags;
1444 int ret, i;
1445 u16 cmd;
1446
1447 if (kstrtoul(buf, 0, &size) < 0)
1448 return -EINVAL;
1449
1450 device_lock(dev);
1451 if (dev->driver) {
1452 ret = -EBUSY;
1453 goto unlock;
1454 }
1455
1456 pci_config_pm_runtime_get(pdev);
1457
1458 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1459 ret = aperture_remove_conflicting_pci_devices(pdev,
1460 "resourceN_resize");
1461 if (ret)
1462 goto pm_put;
1463 }
1464
1465 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1466 pci_write_config_word(pdev, PCI_COMMAND,
1467 cmd & ~PCI_COMMAND_MEMORY);
1468
1469 flags = pci_resource_flags(pdev, n);
1470
1471 pci_remove_resource_files(pdev);
1472
1473 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1474 if (pci_resource_len(pdev, i) &&
1475 pci_resource_flags(pdev, i) == flags)
1476 pci_release_resource(pdev, i);
1477 }
1478
1479 ret = pci_resize_resource(pdev, n, size);
1480
1481 pci_assign_unassigned_bus_resources(pdev->bus);
1482
1483 if (pci_create_resource_files(pdev))
1484 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");
1485
1486 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1487pm_put:
1488 pci_config_pm_runtime_put(pdev);
1489unlock:
1490 device_unlock(dev);
1491
1492 return ret ? ret : count;
1493}
1494
1495#define pci_dev_resource_resize_attr(n) \
1496static ssize_t resource##n##_resize_show(struct device *dev, \
1497 struct device_attribute *attr, \
1498 char *buf) \
1499{ \
1500 return __resource_resize_show(dev, n, buf); \
1501} \
1502static ssize_t resource##n##_resize_store(struct device *dev, \
1503 struct device_attribute *attr,\
1504 const char *buf, size_t count)\
1505{ \
1506 return __resource_resize_store(dev, n, buf, count); \
1507} \
1508static DEVICE_ATTR_RW(resource##n##_resize)
1509
1510pci_dev_resource_resize_attr(0);
1511pci_dev_resource_resize_attr(1);
1512pci_dev_resource_resize_attr(2);
1513pci_dev_resource_resize_attr(3);
1514pci_dev_resource_resize_attr(4);
1515pci_dev_resource_resize_attr(5);
1516
1517static struct attribute *resource_resize_attrs[] = {
1518 &dev_attr_resource0_resize.attr,
1519 &dev_attr_resource1_resize.attr,
1520 &dev_attr_resource2_resize.attr,
1521 &dev_attr_resource3_resize.attr,
1522 &dev_attr_resource4_resize.attr,
1523 &dev_attr_resource5_resize.attr,
1524 NULL,
1525};
1526
1527static umode_t resource_resize_is_visible(struct kobject *kobj,
1528 struct attribute *a, int n)
1529{
1530 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1531
1532 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
1533}
1534
1535static const struct attribute_group pci_dev_resource_resize_group = {
1536 .attrs = resource_resize_attrs,
1537 .is_visible = resource_resize_is_visible,
1538};
1539
1540int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1541{
1542 if (!sysfs_initialized)
1543 return -EACCES;
1544
1545 return pci_create_resource_files(pdev);
1546}
1547
1548/**
1549 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1550 * @pdev: device whose entries we should free
1551 *
1552 * Cleanup when @pdev is removed from sysfs.
1553 */
1554void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1555{
1556 if (!sysfs_initialized)
1557 return;
1558
1559 pci_remove_resource_files(pdev);
1560}
1561
1562static int __init pci_sysfs_init(void)
1563{
1564 struct pci_dev *pdev = NULL;
1565 struct pci_bus *pbus = NULL;
1566 int retval;
1567
1568 sysfs_initialized = 1;
1569 for_each_pci_dev(pdev) {
1570 retval = pci_create_sysfs_dev_files(pdev);
1571 if (retval) {
1572 pci_dev_put(pdev);
1573 return retval;
1574 }
1575 }
1576
1577 while ((pbus = pci_find_next_bus(pbus)))
1578 pci_create_legacy_files(pbus);
1579
1580 return 0;
1581}
1582late_initcall(pci_sysfs_init);
1583
1584static struct attribute *pci_dev_dev_attrs[] = {
1585 &dev_attr_boot_vga.attr,
1586 NULL,
1587};
1588
1589static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1590 struct attribute *a, int n)
1591{
1592 struct device *dev = kobj_to_dev(kobj);
1593 struct pci_dev *pdev = to_pci_dev(dev);
1594
1595 if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev))
1596 return a->mode;
1597
1598 return 0;
1599}
1600
1601static struct attribute *pci_dev_hp_attrs[] = {
1602 &dev_attr_remove.attr,
1603 &dev_attr_dev_rescan.attr,
1604 NULL,
1605};
1606
1607static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1608 struct attribute *a, int n)
1609{
1610 struct device *dev = kobj_to_dev(kobj);
1611 struct pci_dev *pdev = to_pci_dev(dev);
1612
1613 if (pdev->is_virtfn)
1614 return 0;
1615
1616 return a->mode;
1617}
1618
1619static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1620 struct attribute *a, int n)
1621{
1622 struct device *dev = kobj_to_dev(kobj);
1623 struct pci_dev *pdev = to_pci_dev(dev);
1624
1625 if (pci_is_bridge(pdev))
1626 return a->mode;
1627
1628 return 0;
1629}
1630
1631static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1632 struct attribute *a, int n)
1633{
1634 struct device *dev = kobj_to_dev(kobj);
1635 struct pci_dev *pdev = to_pci_dev(dev);
1636
1637 if (pci_is_pcie(pdev))
1638 return a->mode;
1639
1640 return 0;
1641}
1642
1643static const struct attribute_group pci_dev_group = {
1644 .attrs = pci_dev_attrs,
1645};
1646
1647const struct attribute_group *pci_dev_groups[] = {
1648 &pci_dev_group,
1649 &pci_dev_config_attr_group,
1650 &pci_dev_rom_attr_group,
1651 &pci_dev_reset_attr_group,
1652 &pci_dev_reset_method_attr_group,
1653 &pci_dev_vpd_attr_group,
1654#ifdef CONFIG_DMI
1655 &pci_dev_smbios_attr_group,
1656#endif
1657#ifdef CONFIG_ACPI
1658 &pci_dev_acpi_attr_group,
1659#endif
1660 &pci_dev_resource_resize_group,
1661 ARCH_PCI_DEV_GROUPS
1662 NULL,
1663};
1664
1665static const struct attribute_group pci_dev_hp_attr_group = {
1666 .attrs = pci_dev_hp_attrs,
1667 .is_visible = pci_dev_hp_attrs_are_visible,
1668};
1669
1670static const struct attribute_group pci_dev_attr_group = {
1671 .attrs = pci_dev_dev_attrs,
1672 .is_visible = pci_dev_attrs_are_visible,
1673};
1674
1675static const struct attribute_group pci_bridge_attr_group = {
1676 .attrs = pci_bridge_attrs,
1677 .is_visible = pci_bridge_attrs_are_visible,
1678};
1679
1680static const struct attribute_group pcie_dev_attr_group = {
1681 .attrs = pcie_dev_attrs,
1682 .is_visible = pcie_dev_attrs_are_visible,
1683};
1684
1685const struct attribute_group *pci_dev_attr_groups[] = {
1686 &pci_dev_attr_group,
1687 &pci_dev_hp_attr_group,
1688#ifdef CONFIG_PCI_IOV
1689 &sriov_pf_dev_attr_group,
1690 &sriov_vf_dev_attr_group,
1691#endif
1692 &pci_bridge_attr_group,
1693 &pcie_dev_attr_group,
1694#ifdef CONFIG_PCIEAER
1695 &aer_stats_attr_group,
1696#endif
1697#ifdef CONFIG_PCIEASPM
1698 &aspm_ctrl_attr_group,
1699#endif
1700 NULL,
1701};