Loading...
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static DEVICE_ATTR_WO(dev_rescan);
468
469static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473
474 if (kstrtoul(buf, 0, &val) < 0)
475 return -EINVAL;
476
477 if (val && device_remove_file_self(dev, attr))
478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 return count;
480}
481static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 remove_store);
483
484static ssize_t bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503}
504static DEVICE_ATTR_WO(bus_rescan);
505
506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533}
534static DEVICE_ATTR_RW(d3cold_allowed);
535#endif
536
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
551static ssize_t driver_override_store(struct device *dev,
552 struct device_attribute *attr,
553 const char *buf, size_t count)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 char *driver_override, *old, *cp;
557
558 /* We need to keep extra room for a newline */
559 if (count >= (PAGE_SIZE - 1))
560 return -EINVAL;
561
562 driver_override = kstrndup(buf, count, GFP_KERNEL);
563 if (!driver_override)
564 return -ENOMEM;
565
566 cp = strchr(driver_override, '\n');
567 if (cp)
568 *cp = '\0';
569
570 device_lock(dev);
571 old = pdev->driver_override;
572 if (strlen(driver_override)) {
573 pdev->driver_override = driver_override;
574 } else {
575 kfree(driver_override);
576 pdev->driver_override = NULL;
577 }
578 device_unlock(dev);
579
580 kfree(old);
581
582 return count;
583}
584
585static ssize_t driver_override_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589 ssize_t len;
590
591 device_lock(dev);
592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 device_unlock(dev);
594 return len;
595}
596static DEVICE_ATTR_RW(driver_override);
597
598static struct attribute *pci_dev_attrs[] = {
599 &dev_attr_resource.attr,
600 &dev_attr_vendor.attr,
601 &dev_attr_device.attr,
602 &dev_attr_subsystem_vendor.attr,
603 &dev_attr_subsystem_device.attr,
604 &dev_attr_revision.attr,
605 &dev_attr_class.attr,
606 &dev_attr_irq.attr,
607 &dev_attr_local_cpus.attr,
608 &dev_attr_local_cpulist.attr,
609 &dev_attr_modalias.attr,
610#ifdef CONFIG_NUMA
611 &dev_attr_numa_node.attr,
612#endif
613 &dev_attr_dma_mask_bits.attr,
614 &dev_attr_consistent_dma_mask_bits.attr,
615 &dev_attr_enable.attr,
616 &dev_attr_broken_parity_status.attr,
617 &dev_attr_msi_bus.attr,
618#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 &dev_attr_d3cold_allowed.attr,
620#endif
621#ifdef CONFIG_OF
622 &dev_attr_devspec.attr,
623#endif
624 &dev_attr_driver_override.attr,
625 &dev_attr_ari_enabled.attr,
626 NULL,
627};
628
629static struct attribute *pci_bridge_attrs[] = {
630 &dev_attr_subordinate_bus_number.attr,
631 &dev_attr_secondary_bus_number.attr,
632 NULL,
633};
634
635static struct attribute *pcie_dev_attrs[] = {
636 &dev_attr_current_link_speed.attr,
637 &dev_attr_current_link_width.attr,
638 &dev_attr_max_link_width.attr,
639 &dev_attr_max_link_speed.attr,
640 NULL,
641};
642
643static struct attribute *pcibus_attrs[] = {
644 &dev_attr_bus_rescan.attr,
645 &dev_attr_cpuaffinity.attr,
646 &dev_attr_cpulistaffinity.attr,
647 NULL,
648};
649
650static const struct attribute_group pcibus_group = {
651 .attrs = pcibus_attrs,
652};
653
654const struct attribute_group *pcibus_groups[] = {
655 &pcibus_group,
656 NULL,
657};
658
659static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663 struct pci_dev *vga_dev = vga_default_device();
664
665 if (vga_dev)
666 return sprintf(buf, "%u\n", (pdev == vga_dev));
667
668 return sprintf(buf, "%u\n",
669 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 IORESOURCE_ROM_SHADOW));
671}
672static DEVICE_ATTR_RO(boot_vga);
673
674static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr, char *buf,
676 loff_t off, size_t count)
677{
678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 unsigned int size = 64;
680 loff_t init_off = off;
681 u8 *data = (u8 *) buf;
682
683 /* Several chips lock up trying to read undefined config space */
684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 size = dev->cfg_size;
686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 size = 128;
688
689 if (off > size)
690 return 0;
691 if (off + count > size) {
692 size -= off;
693 count = size;
694 } else {
695 size = count;
696 }
697
698 pci_config_pm_runtime_get(dev);
699
700 if ((off & 1) && size) {
701 u8 val;
702 pci_user_read_config_byte(dev, off, &val);
703 data[off - init_off] = val;
704 off++;
705 size--;
706 }
707
708 if ((off & 3) && size > 2) {
709 u16 val;
710 pci_user_read_config_word(dev, off, &val);
711 data[off - init_off] = val & 0xff;
712 data[off - init_off + 1] = (val >> 8) & 0xff;
713 off += 2;
714 size -= 2;
715 }
716
717 while (size > 3) {
718 u32 val;
719 pci_user_read_config_dword(dev, off, &val);
720 data[off - init_off] = val & 0xff;
721 data[off - init_off + 1] = (val >> 8) & 0xff;
722 data[off - init_off + 2] = (val >> 16) & 0xff;
723 data[off - init_off + 3] = (val >> 24) & 0xff;
724 off += 4;
725 size -= 4;
726 }
727
728 if (size >= 2) {
729 u16 val;
730 pci_user_read_config_word(dev, off, &val);
731 data[off - init_off] = val & 0xff;
732 data[off - init_off + 1] = (val >> 8) & 0xff;
733 off += 2;
734 size -= 2;
735 }
736
737 if (size > 0) {
738 u8 val;
739 pci_user_read_config_byte(dev, off, &val);
740 data[off - init_off] = val;
741 off++;
742 --size;
743 }
744
745 pci_config_pm_runtime_put(dev);
746
747 return count;
748}
749
750static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 struct bin_attribute *bin_attr, char *buf,
752 loff_t off, size_t count)
753{
754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 unsigned int size = count;
756 loff_t init_off = off;
757 u8 *data = (u8 *) buf;
758 int ret;
759
760 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 if (ret)
762 return ret;
763
764 if (off > dev->cfg_size)
765 return 0;
766 if (off + count > dev->cfg_size) {
767 size = dev->cfg_size - off;
768 count = size;
769 }
770
771 pci_config_pm_runtime_get(dev);
772
773 if ((off & 1) && size) {
774 pci_user_write_config_byte(dev, off, data[off - init_off]);
775 off++;
776 size--;
777 }
778
779 if ((off & 3) && size > 2) {
780 u16 val = data[off - init_off];
781 val |= (u16) data[off - init_off + 1] << 8;
782 pci_user_write_config_word(dev, off, val);
783 off += 2;
784 size -= 2;
785 }
786
787 while (size > 3) {
788 u32 val = data[off - init_off];
789 val |= (u32) data[off - init_off + 1] << 8;
790 val |= (u32) data[off - init_off + 2] << 16;
791 val |= (u32) data[off - init_off + 3] << 24;
792 pci_user_write_config_dword(dev, off, val);
793 off += 4;
794 size -= 4;
795 }
796
797 if (size >= 2) {
798 u16 val = data[off - init_off];
799 val |= (u16) data[off - init_off + 1] << 8;
800 pci_user_write_config_word(dev, off, val);
801 off += 2;
802 size -= 2;
803 }
804
805 if (size) {
806 pci_user_write_config_byte(dev, off, data[off - init_off]);
807 off++;
808 --size;
809 }
810
811 pci_config_pm_runtime_put(dev);
812
813 return count;
814}
815
816#ifdef HAVE_PCI_LEGACY
817/**
818 * pci_read_legacy_io - read byte(s) from legacy I/O port space
819 * @filp: open sysfs file
820 * @kobj: kobject corresponding to file to read from
821 * @bin_attr: struct bin_attribute for this file
822 * @buf: buffer to store results
823 * @off: offset into legacy I/O port space
824 * @count: number of bytes to read
825 *
826 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827 * callback routine (pci_legacy_read).
828 */
829static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 struct bin_attribute *bin_attr, char *buf,
831 loff_t off, size_t count)
832{
833 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834
835 /* Only support 1, 2 or 4 byte accesses */
836 if (count != 1 && count != 2 && count != 4)
837 return -EINVAL;
838
839 return pci_legacy_read(bus, off, (u32 *)buf, count);
840}
841
842/**
843 * pci_write_legacy_io - write byte(s) to legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer containing value to be written
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to write
850 *
851 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_write).
853 */
854static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_write(bus, off, *(u32 *)buf, count);
865}
866
867/**
868 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to device to be mapped
871 * @attr: struct bin_attribute for this file
872 * @vma: struct vm_area_struct passed to mmap
873 *
874 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875 * legacy memory space (first meg of bus space) into application virtual
876 * memory space.
877 */
878static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 struct bin_attribute *attr,
880 struct vm_area_struct *vma)
881{
882 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883
884 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885}
886
887/**
888 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889 * @filp: open sysfs file
890 * @kobj: kobject corresponding to device to be mapped
891 * @attr: struct bin_attribute for this file
892 * @vma: struct vm_area_struct passed to mmap
893 *
894 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895 * legacy IO space (first meg of bus space) into application virtual
896 * memory space. Returns -ENOSYS if the operation isn't supported
897 */
898static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *attr,
900 struct vm_area_struct *vma)
901{
902 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903
904 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905}
906
907/**
908 * pci_adjust_legacy_attr - adjustment of legacy file attributes
909 * @b: bus to create files under
910 * @mmap_type: I/O port or memory
911 *
912 * Stub implementation. Can be overridden by arch if necessary.
913 */
914void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 enum pci_mmap_state mmap_type)
916{
917}
918
919/**
920 * pci_create_legacy_files - create legacy I/O port and memory files
921 * @b: bus to create files under
922 *
923 * Some platforms allow access to legacy I/O port and ISA memory space on
924 * a per-bus basis. This routine creates the files and ties them into
925 * their associated read, write and mmap files from pci-sysfs.c
926 *
927 * On error unwind, but don't propagate the error to the caller
928 * as it is ok to set up the PCI bus without these files.
929 */
930void pci_create_legacy_files(struct pci_bus *b)
931{
932 int error;
933
934 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 GFP_ATOMIC);
936 if (!b->legacy_io)
937 goto kzalloc_err;
938
939 sysfs_bin_attr_init(b->legacy_io);
940 b->legacy_io->attr.name = "legacy_io";
941 b->legacy_io->size = 0xffff;
942 b->legacy_io->attr.mode = 0600;
943 b->legacy_io->read = pci_read_legacy_io;
944 b->legacy_io->write = pci_write_legacy_io;
945 b->legacy_io->mmap = pci_mmap_legacy_io;
946 pci_adjust_legacy_attr(b, pci_mmap_io);
947 error = device_create_bin_file(&b->dev, b->legacy_io);
948 if (error)
949 goto legacy_io_err;
950
951 /* Allocated above after the legacy_io struct */
952 b->legacy_mem = b->legacy_io + 1;
953 sysfs_bin_attr_init(b->legacy_mem);
954 b->legacy_mem->attr.name = "legacy_mem";
955 b->legacy_mem->size = 1024*1024;
956 b->legacy_mem->attr.mode = 0600;
957 b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 pci_adjust_legacy_attr(b, pci_mmap_mem);
959 error = device_create_bin_file(&b->dev, b->legacy_mem);
960 if (error)
961 goto legacy_mem_err;
962
963 return;
964
965legacy_mem_err:
966 device_remove_bin_file(&b->dev, b->legacy_io);
967legacy_io_err:
968 kfree(b->legacy_io);
969 b->legacy_io = NULL;
970kzalloc_err:
971 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972}
973
974void pci_remove_legacy_files(struct pci_bus *b)
975{
976 if (b->legacy_io) {
977 device_remove_bin_file(&b->dev, b->legacy_io);
978 device_remove_bin_file(&b->dev, b->legacy_mem);
979 kfree(b->legacy_io); /* both are allocated here */
980 }
981}
982#endif /* HAVE_PCI_LEGACY */
983
984#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985
986int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 enum pci_mmap_api mmap_api)
988{
989 unsigned long nr, start, size;
990 resource_size_t pci_start = 0, pci_end;
991
992 if (pci_resource_len(pdev, resno) == 0)
993 return 0;
994 nr = vma_pages(vma);
995 start = vma->vm_pgoff;
996 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 if (mmap_api == PCI_MMAP_PROCFS) {
998 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 &pci_start, &pci_end);
1000 pci_start >>= PAGE_SHIFT;
1001 }
1002 if (start >= pci_start && start < pci_start + size &&
1003 start + nr <= pci_start + size)
1004 return 1;
1005 return 0;
1006}
1007
1008/**
1009 * pci_mmap_resource - map a PCI resource into user memory space
1010 * @kobj: kobject for mapping
1011 * @attr: struct bin_attribute for the file being mapped
1012 * @vma: struct vm_area_struct passed into the mmap
1013 * @write_combine: 1 for write_combine mapping
1014 *
1015 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016 */
1017static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 struct vm_area_struct *vma, int write_combine)
1019{
1020 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 int bar = (unsigned long)attr->private;
1022 enum pci_mmap_state mmap_type;
1023 struct resource *res = &pdev->resource[bar];
1024 int ret;
1025
1026 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 if (ret)
1028 return ret;
1029
1030 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 return -EINVAL;
1032
1033 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 return -EINVAL;
1035
1036 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037
1038 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039}
1040
1041static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 0);
1046}
1047
1048static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr,
1050 struct vm_area_struct *vma)
1051{
1052 return pci_mmap_resource(kobj, attr, vma, 1);
1053}
1054
1055static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 struct bin_attribute *attr, char *buf,
1057 loff_t off, size_t count, bool write)
1058{
1059 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 int bar = (unsigned long)attr->private;
1061 unsigned long port = off;
1062
1063 port += pci_resource_start(pdev, bar);
1064
1065 if (port > pci_resource_end(pdev, bar))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, bar))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 int ret;
1106
1107 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 if (ret)
1109 return ret;
1110
1111 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112}
1113
1114/**
1115 * pci_remove_resource_files - cleanup resource files
1116 * @pdev: dev to cleanup
1117 *
1118 * If we created resource files for @pdev, remove them from sysfs and
1119 * free their resources.
1120 */
1121static void pci_remove_resource_files(struct pci_dev *pdev)
1122{
1123 int i;
1124
1125 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1126 struct bin_attribute *res_attr;
1127
1128 res_attr = pdev->res_attr[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133
1134 res_attr = pdev->res_attr_wc[i];
1135 if (res_attr) {
1136 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 kfree(res_attr);
1138 }
1139 }
1140}
1141
1142static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143{
1144 /* allocate attribute structure, piggyback attribute name */
1145 int name_len = write_combine ? 13 : 10;
1146 struct bin_attribute *res_attr;
1147 char *res_attr_name;
1148 int retval;
1149
1150 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 if (!res_attr)
1152 return -ENOMEM;
1153
1154 res_attr_name = (char *)(res_attr + 1);
1155
1156 sysfs_bin_attr_init(res_attr);
1157 if (write_combine) {
1158 pdev->res_attr_wc[num] = res_attr;
1159 sprintf(res_attr_name, "resource%d_wc", num);
1160 res_attr->mmap = pci_mmap_resource_wc;
1161 } else {
1162 pdev->res_attr[num] = res_attr;
1163 sprintf(res_attr_name, "resource%d", num);
1164 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 res_attr->read = pci_read_resource_io;
1166 res_attr->write = pci_write_resource_io;
1167 if (arch_can_pci_mmap_io())
1168 res_attr->mmap = pci_mmap_resource_uc;
1169 } else {
1170 res_attr->mmap = pci_mmap_resource_uc;
1171 }
1172 }
1173 res_attr->attr.name = res_attr_name;
1174 res_attr->attr.mode = 0600;
1175 res_attr->size = pci_resource_len(pdev, num);
1176 res_attr->private = (void *)(unsigned long)num;
1177 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 if (retval)
1179 kfree(res_attr);
1180
1181 return retval;
1182}
1183
1184/**
1185 * pci_create_resource_files - create resource files in sysfs for @dev
1186 * @pdev: dev in question
1187 *
1188 * Walk the resources in @pdev creating files for each resource available.
1189 */
1190static int pci_create_resource_files(struct pci_dev *pdev)
1191{
1192 int i;
1193 int retval;
1194
1195 /* Expose the PCI resources from this device as files */
1196 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1197
1198 /* skip empty resources */
1199 if (!pci_resource_len(pdev, i))
1200 continue;
1201
1202 retval = pci_create_attr(pdev, i, 0);
1203 /* for prefetchable resources, create a WC mappable file */
1204 if (!retval && arch_can_pci_mmap_wc() &&
1205 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 retval = pci_create_attr(pdev, i, 1);
1207 if (retval) {
1208 pci_remove_resource_files(pdev);
1209 return retval;
1210 }
1211 }
1212 return 0;
1213}
1214#else /* !HAVE_PCI_MMAP */
1215int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217#endif /* HAVE_PCI_MMAP */
1218
1219/**
1220 * pci_write_rom - used to enable access to the PCI ROM display
1221 * @filp: sysfs file
1222 * @kobj: kernel object handle
1223 * @bin_attr: struct bin_attribute for this file
1224 * @buf: user input
1225 * @off: file offset
1226 * @count: number of byte in input
1227 *
1228 * writing anything except 0 enables it
1229 */
1230static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 struct bin_attribute *bin_attr, char *buf,
1232 loff_t off, size_t count)
1233{
1234 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235
1236 if ((off == 0) && (*buf == '0') && (count == 2))
1237 pdev->rom_attr_enabled = 0;
1238 else
1239 pdev->rom_attr_enabled = 1;
1240
1241 return count;
1242}
1243
1244/**
1245 * pci_read_rom - read a PCI ROM
1246 * @filp: sysfs file
1247 * @kobj: kernel object handle
1248 * @bin_attr: struct bin_attribute for this file
1249 * @buf: where to put the data we read from the ROM
1250 * @off: file offset
1251 * @count: number of bytes to read
1252 *
1253 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254 * device corresponding to @kobj.
1255 */
1256static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 struct bin_attribute *bin_attr, char *buf,
1258 loff_t off, size_t count)
1259{
1260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 void __iomem *rom;
1262 size_t size;
1263
1264 if (!pdev->rom_attr_enabled)
1265 return -EINVAL;
1266
1267 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1268 if (!rom || !size)
1269 return -EIO;
1270
1271 if (off >= size)
1272 count = 0;
1273 else {
1274 if (off + count > size)
1275 count = size - off;
1276
1277 memcpy_fromio(buf, rom + off, count);
1278 }
1279 pci_unmap_rom(pdev, rom);
1280
1281 return count;
1282}
1283
1284static const struct bin_attribute pci_config_attr = {
1285 .attr = {
1286 .name = "config",
1287 .mode = 0644,
1288 },
1289 .size = PCI_CFG_SPACE_SIZE,
1290 .read = pci_read_config,
1291 .write = pci_write_config,
1292};
1293
1294static const struct bin_attribute pcie_config_attr = {
1295 .attr = {
1296 .name = "config",
1297 .mode = 0644,
1298 },
1299 .size = PCI_CFG_SPACE_EXP_SIZE,
1300 .read = pci_read_config,
1301 .write = pci_write_config,
1302};
1303
1304static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct pci_dev *pdev = to_pci_dev(dev);
1308 unsigned long val;
1309 ssize_t result = kstrtoul(buf, 0, &val);
1310
1311 if (result < 0)
1312 return result;
1313
1314 if (val != 1)
1315 return -EINVAL;
1316
1317 pm_runtime_get_sync(dev);
1318 result = pci_reset_function(pdev);
1319 pm_runtime_put(dev);
1320 if (result < 0)
1321 return result;
1322
1323 return count;
1324}
1325
1326static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327
1328static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329{
1330 int retval;
1331
1332 pcie_vpd_create_sysfs_dev_files(dev);
1333 pcie_aspm_create_sysfs_dev_files(dev);
1334
1335 if (dev->reset_fn) {
1336 retval = device_create_file(&dev->dev, &dev_attr_reset);
1337 if (retval)
1338 goto error;
1339 }
1340 return 0;
1341
1342error:
1343 pcie_aspm_remove_sysfs_dev_files(dev);
1344 pcie_vpd_remove_sysfs_dev_files(dev);
1345 return retval;
1346}
1347
1348int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1349{
1350 int retval;
1351 int rom_size;
1352 struct bin_attribute *attr;
1353
1354 if (!sysfs_initialized)
1355 return -EACCES;
1356
1357 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1358 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1359 else
1360 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1361 if (retval)
1362 goto err;
1363
1364 retval = pci_create_resource_files(pdev);
1365 if (retval)
1366 goto err_config_file;
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
1369 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 if (rom_size) {
1371 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1372 if (!attr) {
1373 retval = -ENOMEM;
1374 goto err_resource_files;
1375 }
1376 sysfs_bin_attr_init(attr);
1377 attr->size = rom_size;
1378 attr->attr.name = "rom";
1379 attr->attr.mode = 0600;
1380 attr->read = pci_read_rom;
1381 attr->write = pci_write_rom;
1382 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1383 if (retval) {
1384 kfree(attr);
1385 goto err_resource_files;
1386 }
1387 pdev->rom_attr = attr;
1388 }
1389
1390 /* add sysfs entries for various capabilities */
1391 retval = pci_create_capabilities_sysfs(pdev);
1392 if (retval)
1393 goto err_rom_file;
1394
1395 pci_create_firmware_label_files(pdev);
1396
1397 return 0;
1398
1399err_rom_file:
1400 if (pdev->rom_attr) {
1401 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1402 kfree(pdev->rom_attr);
1403 pdev->rom_attr = NULL;
1404 }
1405err_resource_files:
1406 pci_remove_resource_files(pdev);
1407err_config_file:
1408 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1410 else
1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1412err:
1413 return retval;
1414}
1415
1416static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1417{
1418 pcie_vpd_remove_sysfs_dev_files(dev);
1419 pcie_aspm_remove_sysfs_dev_files(dev);
1420 if (dev->reset_fn) {
1421 device_remove_file(&dev->dev, &dev_attr_reset);
1422 dev->reset_fn = 0;
1423 }
1424}
1425
1426/**
1427 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1428 * @pdev: device whose entries we should free
1429 *
1430 * Cleanup when @pdev is removed from sysfs.
1431 */
1432void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1433{
1434 if (!sysfs_initialized)
1435 return;
1436
1437 pci_remove_capabilities_sysfs(pdev);
1438
1439 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1440 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1441 else
1442 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1443
1444 pci_remove_resource_files(pdev);
1445
1446 if (pdev->rom_attr) {
1447 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1448 kfree(pdev->rom_attr);
1449 pdev->rom_attr = NULL;
1450 }
1451
1452 pci_remove_firmware_label_files(pdev);
1453}
1454
1455static int __init pci_sysfs_init(void)
1456{
1457 struct pci_dev *pdev = NULL;
1458 int retval;
1459
1460 sysfs_initialized = 1;
1461 for_each_pci_dev(pdev) {
1462 retval = pci_create_sysfs_dev_files(pdev);
1463 if (retval) {
1464 pci_dev_put(pdev);
1465 return retval;
1466 }
1467 }
1468
1469 return 0;
1470}
1471late_initcall(pci_sysfs_init);
1472
1473static struct attribute *pci_dev_dev_attrs[] = {
1474 &dev_attr_boot_vga.attr,
1475 NULL,
1476};
1477
1478static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1479 struct attribute *a, int n)
1480{
1481 struct device *dev = kobj_to_dev(kobj);
1482 struct pci_dev *pdev = to_pci_dev(dev);
1483
1484 if (a == &dev_attr_boot_vga.attr)
1485 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static struct attribute *pci_dev_hp_attrs[] = {
1492 &dev_attr_remove.attr,
1493 &dev_attr_dev_rescan.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (pdev->is_virtfn)
1504 return 0;
1505
1506 return a->mode;
1507}
1508
1509static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1510 struct attribute *a, int n)
1511{
1512 struct device *dev = kobj_to_dev(kobj);
1513 struct pci_dev *pdev = to_pci_dev(dev);
1514
1515 if (pci_is_bridge(pdev))
1516 return a->mode;
1517
1518 return 0;
1519}
1520
1521static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1522 struct attribute *a, int n)
1523{
1524 struct device *dev = kobj_to_dev(kobj);
1525 struct pci_dev *pdev = to_pci_dev(dev);
1526
1527 if (pci_is_pcie(pdev))
1528 return a->mode;
1529
1530 return 0;
1531}
1532
1533static const struct attribute_group pci_dev_group = {
1534 .attrs = pci_dev_attrs,
1535};
1536
1537const struct attribute_group *pci_dev_groups[] = {
1538 &pci_dev_group,
1539 NULL,
1540};
1541
1542static const struct attribute_group pci_bridge_group = {
1543 .attrs = pci_bridge_attrs,
1544};
1545
1546const struct attribute_group *pci_bridge_groups[] = {
1547 &pci_bridge_group,
1548 NULL,
1549};
1550
1551static const struct attribute_group pcie_dev_group = {
1552 .attrs = pcie_dev_attrs,
1553};
1554
1555const struct attribute_group *pcie_dev_groups[] = {
1556 &pcie_dev_group,
1557 NULL,
1558};
1559
1560static const struct attribute_group pci_dev_hp_attr_group = {
1561 .attrs = pci_dev_hp_attrs,
1562 .is_visible = pci_dev_hp_attrs_are_visible,
1563};
1564
1565static const struct attribute_group pci_dev_attr_group = {
1566 .attrs = pci_dev_dev_attrs,
1567 .is_visible = pci_dev_attrs_are_visible,
1568};
1569
1570static const struct attribute_group pci_bridge_attr_group = {
1571 .attrs = pci_bridge_attrs,
1572 .is_visible = pci_bridge_attrs_are_visible,
1573};
1574
1575static const struct attribute_group pcie_dev_attr_group = {
1576 .attrs = pcie_dev_attrs,
1577 .is_visible = pcie_dev_attrs_are_visible,
1578};
1579
1580static const struct attribute_group *pci_dev_attr_groups[] = {
1581 &pci_dev_attr_group,
1582 &pci_dev_hp_attr_group,
1583#ifdef CONFIG_PCI_IOV
1584 &sriov_dev_attr_group,
1585#endif
1586 &pci_bridge_attr_group,
1587 &pcie_dev_attr_group,
1588#ifdef CONFIG_PCIEAER
1589 &aer_stats_attr_group,
1590#endif
1591 NULL,
1592};
1593
1594const struct device_type pci_dev_type = {
1595 .groups = pci_dev_attr_groups,
1596};
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/export.h>
23#include <linux/topology.h>
24#include <linux/mm.h>
25#include <linux/fs.h>
26#include <linux/capability.h>
27#include <linux/security.h>
28#include <linux/pci-aspm.h>
29#include <linux/slab.h>
30#include <linux/vgaarb.h>
31#include <linux/pm_runtime.h>
32#include <linux/of.h>
33#include "pci.h"
34
35static int sysfs_initialized; /* = 0 */
36
37/* show configuration fields */
38#define pci_config_attr(field, format_string) \
39static ssize_t \
40field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
41{ \
42 struct pci_dev *pdev; \
43 \
44 pdev = to_pci_dev(dev); \
45 return sprintf(buf, format_string, pdev->field); \
46} \
47static DEVICE_ATTR_RO(field)
48
49pci_config_attr(vendor, "0x%04x\n");
50pci_config_attr(device, "0x%04x\n");
51pci_config_attr(subsystem_vendor, "0x%04x\n");
52pci_config_attr(subsystem_device, "0x%04x\n");
53pci_config_attr(class, "0x%06x\n");
54pci_config_attr(irq, "%u\n");
55
56static ssize_t broken_parity_status_show(struct device *dev,
57 struct device_attribute *attr,
58 char *buf)
59{
60 struct pci_dev *pdev = to_pci_dev(dev);
61 return sprintf(buf, "%u\n", pdev->broken_parity_status);
62}
63
64static ssize_t broken_parity_status_store(struct device *dev,
65 struct device_attribute *attr,
66 const char *buf, size_t count)
67{
68 struct pci_dev *pdev = to_pci_dev(dev);
69 unsigned long val;
70
71 if (kstrtoul(buf, 0, &val) < 0)
72 return -EINVAL;
73
74 pdev->broken_parity_status = !!val;
75
76 return count;
77}
78static DEVICE_ATTR_RW(broken_parity_status);
79
80static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
81 struct device_attribute *attr, char *buf)
82{
83 const struct cpumask *mask;
84
85#ifdef CONFIG_NUMA
86 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
87 cpumask_of_node(dev_to_node(dev));
88#else
89 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
90#endif
91 return cpumap_print_to_pagebuf(list, buf, mask);
92}
93
94static ssize_t local_cpus_show(struct device *dev,
95 struct device_attribute *attr, char *buf)
96{
97 return pci_dev_show_local_cpu(dev, false, attr, buf);
98}
99static DEVICE_ATTR_RO(local_cpus);
100
101static ssize_t local_cpulist_show(struct device *dev,
102 struct device_attribute *attr, char *buf)
103{
104 return pci_dev_show_local_cpu(dev, true, attr, buf);
105}
106static DEVICE_ATTR_RO(local_cpulist);
107
108/*
109 * PCI Bus Class Devices
110 */
111static ssize_t cpuaffinity_show(struct device *dev,
112 struct device_attribute *attr, char *buf)
113{
114 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
115
116 return cpumap_print_to_pagebuf(false, buf, cpumask);
117}
118static DEVICE_ATTR_RO(cpuaffinity);
119
120static ssize_t cpulistaffinity_show(struct device *dev,
121 struct device_attribute *attr, char *buf)
122{
123 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
124
125 return cpumap_print_to_pagebuf(true, buf, cpumask);
126}
127static DEVICE_ATTR_RO(cpulistaffinity);
128
129/* show resources */
130static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
131 char *buf)
132{
133 struct pci_dev *pci_dev = to_pci_dev(dev);
134 char *str = buf;
135 int i;
136 int max;
137 resource_size_t start, end;
138
139 if (pci_dev->subordinate)
140 max = DEVICE_COUNT_RESOURCE;
141 else
142 max = PCI_BRIDGE_RESOURCES;
143
144 for (i = 0; i < max; i++) {
145 struct resource *res = &pci_dev->resource[i];
146 pci_resource_to_user(pci_dev, i, res, &start, &end);
147 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
148 (unsigned long long)start,
149 (unsigned long long)end,
150 (unsigned long long)res->flags);
151 }
152 return (str - buf);
153}
154static DEVICE_ATTR_RO(resource);
155
156static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
157 char *buf)
158{
159 struct pci_dev *pci_dev = to_pci_dev(dev);
160
161 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
162 pci_dev->vendor, pci_dev->device,
163 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
164 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
165 (u8)(pci_dev->class));
166}
167static DEVICE_ATTR_RO(modalias);
168
169static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
170 const char *buf, size_t count)
171{
172 struct pci_dev *pdev = to_pci_dev(dev);
173 unsigned long val;
174 ssize_t result = kstrtoul(buf, 0, &val);
175
176 if (result < 0)
177 return result;
178
179 /* this can crash the machine when done on the "wrong" device */
180 if (!capable(CAP_SYS_ADMIN))
181 return -EPERM;
182
183 if (!val) {
184 if (pci_is_enabled(pdev))
185 pci_disable_device(pdev);
186 else
187 result = -EIO;
188 } else
189 result = pci_enable_device(pdev);
190
191 return result < 0 ? result : count;
192}
193
194static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
195 char *buf)
196{
197 struct pci_dev *pdev;
198
199 pdev = to_pci_dev(dev);
200 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
201}
202static DEVICE_ATTR_RW(enable);
203
204#ifdef CONFIG_NUMA
205static ssize_t numa_node_store(struct device *dev,
206 struct device_attribute *attr, const char *buf,
207 size_t count)
208{
209 struct pci_dev *pdev = to_pci_dev(dev);
210 int node, ret;
211
212 if (!capable(CAP_SYS_ADMIN))
213 return -EPERM;
214
215 ret = kstrtoint(buf, 0, &node);
216 if (ret)
217 return ret;
218
219 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
220 return -EINVAL;
221
222 if (node != NUMA_NO_NODE && !node_online(node))
223 return -EINVAL;
224
225 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
226 dev_alert(&pdev->dev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
227 node);
228
229 dev->numa_node = node;
230 return count;
231}
232
233static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
234 char *buf)
235{
236 return sprintf(buf, "%d\n", dev->numa_node);
237}
238static DEVICE_ATTR_RW(numa_node);
239#endif
240
241static ssize_t dma_mask_bits_show(struct device *dev,
242 struct device_attribute *attr, char *buf)
243{
244 struct pci_dev *pdev = to_pci_dev(dev);
245
246 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
247}
248static DEVICE_ATTR_RO(dma_mask_bits);
249
250static ssize_t consistent_dma_mask_bits_show(struct device *dev,
251 struct device_attribute *attr,
252 char *buf)
253{
254 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
255}
256static DEVICE_ATTR_RO(consistent_dma_mask_bits);
257
258static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
259 char *buf)
260{
261 struct pci_dev *pdev = to_pci_dev(dev);
262 struct pci_bus *subordinate = pdev->subordinate;
263
264 return sprintf(buf, "%u\n", subordinate ?
265 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
266 : !pdev->no_msi);
267}
268
269static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
270 const char *buf, size_t count)
271{
272 struct pci_dev *pdev = to_pci_dev(dev);
273 struct pci_bus *subordinate = pdev->subordinate;
274 unsigned long val;
275
276 if (kstrtoul(buf, 0, &val) < 0)
277 return -EINVAL;
278
279 if (!capable(CAP_SYS_ADMIN))
280 return -EPERM;
281
282 /*
283 * "no_msi" and "bus_flags" only affect what happens when a driver
284 * requests MSI or MSI-X. They don't affect any drivers that have
285 * already requested MSI or MSI-X.
286 */
287 if (!subordinate) {
288 pdev->no_msi = !val;
289 dev_info(&pdev->dev, "MSI/MSI-X %s for future drivers\n",
290 val ? "allowed" : "disallowed");
291 return count;
292 }
293
294 if (val)
295 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
296 else
297 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
298
299 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
300 val ? "allowed" : "disallowed");
301 return count;
302}
303static DEVICE_ATTR_RW(msi_bus);
304
305static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
306 size_t count)
307{
308 unsigned long val;
309 struct pci_bus *b = NULL;
310
311 if (kstrtoul(buf, 0, &val) < 0)
312 return -EINVAL;
313
314 if (val) {
315 pci_lock_rescan_remove();
316 while ((b = pci_find_next_bus(b)) != NULL)
317 pci_rescan_bus(b);
318 pci_unlock_rescan_remove();
319 }
320 return count;
321}
322static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
323
324static struct attribute *pci_bus_attrs[] = {
325 &bus_attr_rescan.attr,
326 NULL,
327};
328
329static const struct attribute_group pci_bus_group = {
330 .attrs = pci_bus_attrs,
331};
332
333const struct attribute_group *pci_bus_groups[] = {
334 &pci_bus_group,
335 NULL,
336};
337
338static ssize_t dev_rescan_store(struct device *dev,
339 struct device_attribute *attr, const char *buf,
340 size_t count)
341{
342 unsigned long val;
343 struct pci_dev *pdev = to_pci_dev(dev);
344
345 if (kstrtoul(buf, 0, &val) < 0)
346 return -EINVAL;
347
348 if (val) {
349 pci_lock_rescan_remove();
350 pci_rescan_bus(pdev->bus);
351 pci_unlock_rescan_remove();
352 }
353 return count;
354}
355static struct device_attribute dev_rescan_attr = __ATTR(rescan,
356 (S_IWUSR|S_IWGRP),
357 NULL, dev_rescan_store);
358
359static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
360 const char *buf, size_t count)
361{
362 unsigned long val;
363
364 if (kstrtoul(buf, 0, &val) < 0)
365 return -EINVAL;
366
367 if (val && device_remove_file_self(dev, attr))
368 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
369 return count;
370}
371static struct device_attribute dev_remove_attr = __ATTR(remove,
372 (S_IWUSR|S_IWGRP),
373 NULL, remove_store);
374
375static ssize_t dev_bus_rescan_store(struct device *dev,
376 struct device_attribute *attr,
377 const char *buf, size_t count)
378{
379 unsigned long val;
380 struct pci_bus *bus = to_pci_bus(dev);
381
382 if (kstrtoul(buf, 0, &val) < 0)
383 return -EINVAL;
384
385 if (val) {
386 pci_lock_rescan_remove();
387 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
388 pci_rescan_bus_bridge_resize(bus->self);
389 else
390 pci_rescan_bus(bus);
391 pci_unlock_rescan_remove();
392 }
393 return count;
394}
395static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
396
397#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
398static ssize_t d3cold_allowed_store(struct device *dev,
399 struct device_attribute *attr,
400 const char *buf, size_t count)
401{
402 struct pci_dev *pdev = to_pci_dev(dev);
403 unsigned long val;
404
405 if (kstrtoul(buf, 0, &val) < 0)
406 return -EINVAL;
407
408 pdev->d3cold_allowed = !!val;
409 pm_runtime_resume(dev);
410
411 return count;
412}
413
414static ssize_t d3cold_allowed_show(struct device *dev,
415 struct device_attribute *attr, char *buf)
416{
417 struct pci_dev *pdev = to_pci_dev(dev);
418 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
419}
420static DEVICE_ATTR_RW(d3cold_allowed);
421#endif
422
423#ifdef CONFIG_OF
424static ssize_t devspec_show(struct device *dev,
425 struct device_attribute *attr, char *buf)
426{
427 struct pci_dev *pdev = to_pci_dev(dev);
428 struct device_node *np = pci_device_to_OF_node(pdev);
429
430 if (np == NULL || np->full_name == NULL)
431 return 0;
432 return sprintf(buf, "%s", np->full_name);
433}
434static DEVICE_ATTR_RO(devspec);
435#endif
436
437#ifdef CONFIG_PCI_IOV
438static ssize_t sriov_totalvfs_show(struct device *dev,
439 struct device_attribute *attr,
440 char *buf)
441{
442 struct pci_dev *pdev = to_pci_dev(dev);
443
444 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
445}
446
447
448static ssize_t sriov_numvfs_show(struct device *dev,
449 struct device_attribute *attr,
450 char *buf)
451{
452 struct pci_dev *pdev = to_pci_dev(dev);
453
454 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
455}
456
457/*
458 * num_vfs > 0; number of VFs to enable
459 * num_vfs = 0; disable all VFs
460 *
461 * Note: SRIOV spec doesn't allow partial VF
462 * disable, so it's all or none.
463 */
464static ssize_t sriov_numvfs_store(struct device *dev,
465 struct device_attribute *attr,
466 const char *buf, size_t count)
467{
468 struct pci_dev *pdev = to_pci_dev(dev);
469 int ret;
470 u16 num_vfs;
471
472 ret = kstrtou16(buf, 0, &num_vfs);
473 if (ret < 0)
474 return ret;
475
476 if (num_vfs > pci_sriov_get_totalvfs(pdev))
477 return -ERANGE;
478
479 if (num_vfs == pdev->sriov->num_VFs)
480 return count; /* no change */
481
482 /* is PF driver loaded w/callback */
483 if (!pdev->driver || !pdev->driver->sriov_configure) {
484 dev_info(&pdev->dev, "Driver doesn't support SRIOV configuration via sysfs\n");
485 return -ENOSYS;
486 }
487
488 if (num_vfs == 0) {
489 /* disable VFs */
490 ret = pdev->driver->sriov_configure(pdev, 0);
491 if (ret < 0)
492 return ret;
493 return count;
494 }
495
496 /* enable VFs */
497 if (pdev->sriov->num_VFs) {
498 dev_warn(&pdev->dev, "%d VFs already enabled. Disable before enabling %d VFs\n",
499 pdev->sriov->num_VFs, num_vfs);
500 return -EBUSY;
501 }
502
503 ret = pdev->driver->sriov_configure(pdev, num_vfs);
504 if (ret < 0)
505 return ret;
506
507 if (ret != num_vfs)
508 dev_warn(&pdev->dev, "%d VFs requested; only %d enabled\n",
509 num_vfs, ret);
510
511 return count;
512}
513
514static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
515static struct device_attribute sriov_numvfs_attr =
516 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
517 sriov_numvfs_show, sriov_numvfs_store);
518#endif /* CONFIG_PCI_IOV */
519
520static ssize_t driver_override_store(struct device *dev,
521 struct device_attribute *attr,
522 const char *buf, size_t count)
523{
524 struct pci_dev *pdev = to_pci_dev(dev);
525 char *driver_override, *old = pdev->driver_override, *cp;
526
527 /* We need to keep extra room for a newline */
528 if (count >= (PAGE_SIZE - 1))
529 return -EINVAL;
530
531 driver_override = kstrndup(buf, count, GFP_KERNEL);
532 if (!driver_override)
533 return -ENOMEM;
534
535 cp = strchr(driver_override, '\n');
536 if (cp)
537 *cp = '\0';
538
539 if (strlen(driver_override)) {
540 pdev->driver_override = driver_override;
541 } else {
542 kfree(driver_override);
543 pdev->driver_override = NULL;
544 }
545
546 kfree(old);
547
548 return count;
549}
550
551static ssize_t driver_override_show(struct device *dev,
552 struct device_attribute *attr, char *buf)
553{
554 struct pci_dev *pdev = to_pci_dev(dev);
555
556 return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
557}
558static DEVICE_ATTR_RW(driver_override);
559
560static struct attribute *pci_dev_attrs[] = {
561 &dev_attr_resource.attr,
562 &dev_attr_vendor.attr,
563 &dev_attr_device.attr,
564 &dev_attr_subsystem_vendor.attr,
565 &dev_attr_subsystem_device.attr,
566 &dev_attr_class.attr,
567 &dev_attr_irq.attr,
568 &dev_attr_local_cpus.attr,
569 &dev_attr_local_cpulist.attr,
570 &dev_attr_modalias.attr,
571#ifdef CONFIG_NUMA
572 &dev_attr_numa_node.attr,
573#endif
574 &dev_attr_dma_mask_bits.attr,
575 &dev_attr_consistent_dma_mask_bits.attr,
576 &dev_attr_enable.attr,
577 &dev_attr_broken_parity_status.attr,
578 &dev_attr_msi_bus.attr,
579#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
580 &dev_attr_d3cold_allowed.attr,
581#endif
582#ifdef CONFIG_OF
583 &dev_attr_devspec.attr,
584#endif
585 &dev_attr_driver_override.attr,
586 NULL,
587};
588
589static const struct attribute_group pci_dev_group = {
590 .attrs = pci_dev_attrs,
591};
592
593const struct attribute_group *pci_dev_groups[] = {
594 &pci_dev_group,
595 NULL,
596};
597
598static struct attribute *pcibus_attrs[] = {
599 &dev_attr_rescan.attr,
600 &dev_attr_cpuaffinity.attr,
601 &dev_attr_cpulistaffinity.attr,
602 NULL,
603};
604
605static const struct attribute_group pcibus_group = {
606 .attrs = pcibus_attrs,
607};
608
609const struct attribute_group *pcibus_groups[] = {
610 &pcibus_group,
611 NULL,
612};
613
614static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
615 char *buf)
616{
617 struct pci_dev *pdev = to_pci_dev(dev);
618 struct pci_dev *vga_dev = vga_default_device();
619
620 if (vga_dev)
621 return sprintf(buf, "%u\n", (pdev == vga_dev));
622
623 return sprintf(buf, "%u\n",
624 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
625 IORESOURCE_ROM_SHADOW));
626}
627static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
628
629static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
630 struct bin_attribute *bin_attr, char *buf,
631 loff_t off, size_t count)
632{
633 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
634 unsigned int size = 64;
635 loff_t init_off = off;
636 u8 *data = (u8 *) buf;
637
638 /* Several chips lock up trying to read undefined config space */
639 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
640 size = dev->cfg_size;
641 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
642 size = 128;
643
644 if (off > size)
645 return 0;
646 if (off + count > size) {
647 size -= off;
648 count = size;
649 } else {
650 size = count;
651 }
652
653 pci_config_pm_runtime_get(dev);
654
655 if ((off & 1) && size) {
656 u8 val;
657 pci_user_read_config_byte(dev, off, &val);
658 data[off - init_off] = val;
659 off++;
660 size--;
661 }
662
663 if ((off & 3) && size > 2) {
664 u16 val;
665 pci_user_read_config_word(dev, off, &val);
666 data[off - init_off] = val & 0xff;
667 data[off - init_off + 1] = (val >> 8) & 0xff;
668 off += 2;
669 size -= 2;
670 }
671
672 while (size > 3) {
673 u32 val;
674 pci_user_read_config_dword(dev, off, &val);
675 data[off - init_off] = val & 0xff;
676 data[off - init_off + 1] = (val >> 8) & 0xff;
677 data[off - init_off + 2] = (val >> 16) & 0xff;
678 data[off - init_off + 3] = (val >> 24) & 0xff;
679 off += 4;
680 size -= 4;
681 }
682
683 if (size >= 2) {
684 u16 val;
685 pci_user_read_config_word(dev, off, &val);
686 data[off - init_off] = val & 0xff;
687 data[off - init_off + 1] = (val >> 8) & 0xff;
688 off += 2;
689 size -= 2;
690 }
691
692 if (size > 0) {
693 u8 val;
694 pci_user_read_config_byte(dev, off, &val);
695 data[off - init_off] = val;
696 off++;
697 --size;
698 }
699
700 pci_config_pm_runtime_put(dev);
701
702 return count;
703}
704
705static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
706 struct bin_attribute *bin_attr, char *buf,
707 loff_t off, size_t count)
708{
709 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
710 unsigned int size = count;
711 loff_t init_off = off;
712 u8 *data = (u8 *) buf;
713
714 if (off > dev->cfg_size)
715 return 0;
716 if (off + count > dev->cfg_size) {
717 size = dev->cfg_size - off;
718 count = size;
719 }
720
721 pci_config_pm_runtime_get(dev);
722
723 if ((off & 1) && size) {
724 pci_user_write_config_byte(dev, off, data[off - init_off]);
725 off++;
726 size--;
727 }
728
729 if ((off & 3) && size > 2) {
730 u16 val = data[off - init_off];
731 val |= (u16) data[off - init_off + 1] << 8;
732 pci_user_write_config_word(dev, off, val);
733 off += 2;
734 size -= 2;
735 }
736
737 while (size > 3) {
738 u32 val = data[off - init_off];
739 val |= (u32) data[off - init_off + 1] << 8;
740 val |= (u32) data[off - init_off + 2] << 16;
741 val |= (u32) data[off - init_off + 3] << 24;
742 pci_user_write_config_dword(dev, off, val);
743 off += 4;
744 size -= 4;
745 }
746
747 if (size >= 2) {
748 u16 val = data[off - init_off];
749 val |= (u16) data[off - init_off + 1] << 8;
750 pci_user_write_config_word(dev, off, val);
751 off += 2;
752 size -= 2;
753 }
754
755 if (size) {
756 pci_user_write_config_byte(dev, off, data[off - init_off]);
757 off++;
758 --size;
759 }
760
761 pci_config_pm_runtime_put(dev);
762
763 return count;
764}
765
766static ssize_t read_vpd_attr(struct file *filp, struct kobject *kobj,
767 struct bin_attribute *bin_attr, char *buf,
768 loff_t off, size_t count)
769{
770 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
771
772 if (bin_attr->size > 0) {
773 if (off > bin_attr->size)
774 count = 0;
775 else if (count > bin_attr->size - off)
776 count = bin_attr->size - off;
777 }
778
779 return pci_read_vpd(dev, off, count, buf);
780}
781
782static ssize_t write_vpd_attr(struct file *filp, struct kobject *kobj,
783 struct bin_attribute *bin_attr, char *buf,
784 loff_t off, size_t count)
785{
786 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
787
788 if (bin_attr->size > 0) {
789 if (off > bin_attr->size)
790 count = 0;
791 else if (count > bin_attr->size - off)
792 count = bin_attr->size - off;
793 }
794
795 return pci_write_vpd(dev, off, count, buf);
796}
797
798#ifdef HAVE_PCI_LEGACY
799/**
800 * pci_read_legacy_io - read byte(s) from legacy I/O port space
801 * @filp: open sysfs file
802 * @kobj: kobject corresponding to file to read from
803 * @bin_attr: struct bin_attribute for this file
804 * @buf: buffer to store results
805 * @off: offset into legacy I/O port space
806 * @count: number of bytes to read
807 *
808 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
809 * callback routine (pci_legacy_read).
810 */
811static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
812 struct bin_attribute *bin_attr, char *buf,
813 loff_t off, size_t count)
814{
815 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
816
817 /* Only support 1, 2 or 4 byte accesses */
818 if (count != 1 && count != 2 && count != 4)
819 return -EINVAL;
820
821 return pci_legacy_read(bus, off, (u32 *)buf, count);
822}
823
824/**
825 * pci_write_legacy_io - write byte(s) to legacy I/O port space
826 * @filp: open sysfs file
827 * @kobj: kobject corresponding to file to read from
828 * @bin_attr: struct bin_attribute for this file
829 * @buf: buffer containing value to be written
830 * @off: offset into legacy I/O port space
831 * @count: number of bytes to write
832 *
833 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
834 * callback routine (pci_legacy_write).
835 */
836static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
837 struct bin_attribute *bin_attr, char *buf,
838 loff_t off, size_t count)
839{
840 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
841
842 /* Only support 1, 2 or 4 byte accesses */
843 if (count != 1 && count != 2 && count != 4)
844 return -EINVAL;
845
846 return pci_legacy_write(bus, off, *(u32 *)buf, count);
847}
848
849/**
850 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
851 * @filp: open sysfs file
852 * @kobj: kobject corresponding to device to be mapped
853 * @attr: struct bin_attribute for this file
854 * @vma: struct vm_area_struct passed to mmap
855 *
856 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
857 * legacy memory space (first meg of bus space) into application virtual
858 * memory space.
859 */
860static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
861 struct bin_attribute *attr,
862 struct vm_area_struct *vma)
863{
864 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
865
866 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
867}
868
869/**
870 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
871 * @filp: open sysfs file
872 * @kobj: kobject corresponding to device to be mapped
873 * @attr: struct bin_attribute for this file
874 * @vma: struct vm_area_struct passed to mmap
875 *
876 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
877 * legacy IO space (first meg of bus space) into application virtual
878 * memory space. Returns -ENOSYS if the operation isn't supported
879 */
880static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
881 struct bin_attribute *attr,
882 struct vm_area_struct *vma)
883{
884 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
885
886 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
887}
888
889/**
890 * pci_adjust_legacy_attr - adjustment of legacy file attributes
891 * @b: bus to create files under
892 * @mmap_type: I/O port or memory
893 *
894 * Stub implementation. Can be overridden by arch if necessary.
895 */
896void __weak pci_adjust_legacy_attr(struct pci_bus *b,
897 enum pci_mmap_state mmap_type)
898{
899}
900
901/**
902 * pci_create_legacy_files - create legacy I/O port and memory files
903 * @b: bus to create files under
904 *
905 * Some platforms allow access to legacy I/O port and ISA memory space on
906 * a per-bus basis. This routine creates the files and ties them into
907 * their associated read, write and mmap files from pci-sysfs.c
908 *
909 * On error unwind, but don't propagate the error to the caller
910 * as it is ok to set up the PCI bus without these files.
911 */
912void pci_create_legacy_files(struct pci_bus *b)
913{
914 int error;
915
916 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
917 GFP_ATOMIC);
918 if (!b->legacy_io)
919 goto kzalloc_err;
920
921 sysfs_bin_attr_init(b->legacy_io);
922 b->legacy_io->attr.name = "legacy_io";
923 b->legacy_io->size = 0xffff;
924 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
925 b->legacy_io->read = pci_read_legacy_io;
926 b->legacy_io->write = pci_write_legacy_io;
927 b->legacy_io->mmap = pci_mmap_legacy_io;
928 pci_adjust_legacy_attr(b, pci_mmap_io);
929 error = device_create_bin_file(&b->dev, b->legacy_io);
930 if (error)
931 goto legacy_io_err;
932
933 /* Allocated above after the legacy_io struct */
934 b->legacy_mem = b->legacy_io + 1;
935 sysfs_bin_attr_init(b->legacy_mem);
936 b->legacy_mem->attr.name = "legacy_mem";
937 b->legacy_mem->size = 1024*1024;
938 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
939 b->legacy_mem->mmap = pci_mmap_legacy_mem;
940 pci_adjust_legacy_attr(b, pci_mmap_mem);
941 error = device_create_bin_file(&b->dev, b->legacy_mem);
942 if (error)
943 goto legacy_mem_err;
944
945 return;
946
947legacy_mem_err:
948 device_remove_bin_file(&b->dev, b->legacy_io);
949legacy_io_err:
950 kfree(b->legacy_io);
951 b->legacy_io = NULL;
952kzalloc_err:
953 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
954 return;
955}
956
957void pci_remove_legacy_files(struct pci_bus *b)
958{
959 if (b->legacy_io) {
960 device_remove_bin_file(&b->dev, b->legacy_io);
961 device_remove_bin_file(&b->dev, b->legacy_mem);
962 kfree(b->legacy_io); /* both are allocated here */
963 }
964}
965#endif /* HAVE_PCI_LEGACY */
966
967#ifdef HAVE_PCI_MMAP
968
969int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
970 enum pci_mmap_api mmap_api)
971{
972 unsigned long nr, start, size, pci_start;
973
974 if (pci_resource_len(pdev, resno) == 0)
975 return 0;
976 nr = vma_pages(vma);
977 start = vma->vm_pgoff;
978 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
979 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
980 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
981 if (start >= pci_start && start < pci_start + size &&
982 start + nr <= pci_start + size)
983 return 1;
984 return 0;
985}
986
987/**
988 * pci_mmap_resource - map a PCI resource into user memory space
989 * @kobj: kobject for mapping
990 * @attr: struct bin_attribute for the file being mapped
991 * @vma: struct vm_area_struct passed into the mmap
992 * @write_combine: 1 for write_combine mapping
993 *
994 * Use the regular PCI mapping routines to map a PCI resource into userspace.
995 */
996static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
997 struct vm_area_struct *vma, int write_combine)
998{
999 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1000 struct resource *res = attr->private;
1001 enum pci_mmap_state mmap_type;
1002 resource_size_t start, end;
1003 int i;
1004
1005 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1006 if (res == &pdev->resource[i])
1007 break;
1008 if (i >= PCI_ROM_RESOURCE)
1009 return -ENODEV;
1010
1011 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
1012 WARN(1, "process \"%s\" tried to map 0x%08lx bytes at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
1013 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
1014 pci_name(pdev), i,
1015 (u64)pci_resource_start(pdev, i),
1016 (u64)pci_resource_len(pdev, i));
1017 return -EINVAL;
1018 }
1019
1020 /* pci_mmap_page_range() expects the same kind of entry as coming
1021 * from /proc/bus/pci/ which is a "user visible" value. If this is
1022 * different from the resource itself, arch will do necessary fixup.
1023 */
1024 pci_resource_to_user(pdev, i, res, &start, &end);
1025 vma->vm_pgoff += start >> PAGE_SHIFT;
1026 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1027
1028 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
1029 return -EINVAL;
1030
1031 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
1032}
1033
1034static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1035 struct bin_attribute *attr,
1036 struct vm_area_struct *vma)
1037{
1038 return pci_mmap_resource(kobj, attr, vma, 0);
1039}
1040
1041static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 1);
1046}
1047
1048static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr, char *buf,
1050 loff_t off, size_t count, bool write)
1051{
1052 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1053 struct resource *res = attr->private;
1054 unsigned long port = off;
1055 int i;
1056
1057 for (i = 0; i < PCI_ROM_RESOURCE; i++)
1058 if (res == &pdev->resource[i])
1059 break;
1060 if (i >= PCI_ROM_RESOURCE)
1061 return -ENODEV;
1062
1063 port += pci_resource_start(pdev, i);
1064
1065 if (port > pci_resource_end(pdev, i))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, i))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1106}
1107
1108/**
1109 * pci_remove_resource_files - cleanup resource files
1110 * @pdev: dev to cleanup
1111 *
1112 * If we created resource files for @pdev, remove them from sysfs and
1113 * free their resources.
1114 */
1115static void pci_remove_resource_files(struct pci_dev *pdev)
1116{
1117 int i;
1118
1119 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1120 struct bin_attribute *res_attr;
1121
1122 res_attr = pdev->res_attr[i];
1123 if (res_attr) {
1124 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1125 kfree(res_attr);
1126 }
1127
1128 res_attr = pdev->res_attr_wc[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133 }
1134}
1135
1136static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1137{
1138 /* allocate attribute structure, piggyback attribute name */
1139 int name_len = write_combine ? 13 : 10;
1140 struct bin_attribute *res_attr;
1141 char *res_attr_name;
1142 int retval;
1143
1144 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1145 if (!res_attr)
1146 return -ENOMEM;
1147
1148 res_attr_name = (char *)(res_attr + 1);
1149
1150 sysfs_bin_attr_init(res_attr);
1151 if (write_combine) {
1152 pdev->res_attr_wc[num] = res_attr;
1153 sprintf(res_attr_name, "resource%d_wc", num);
1154 res_attr->mmap = pci_mmap_resource_wc;
1155 } else {
1156 pdev->res_attr[num] = res_attr;
1157 sprintf(res_attr_name, "resource%d", num);
1158 res_attr->mmap = pci_mmap_resource_uc;
1159 }
1160 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1161 res_attr->read = pci_read_resource_io;
1162 res_attr->write = pci_write_resource_io;
1163 }
1164 res_attr->attr.name = res_attr_name;
1165 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1166 res_attr->size = pci_resource_len(pdev, num);
1167 res_attr->private = &pdev->resource[num];
1168 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1169 if (retval)
1170 kfree(res_attr);
1171
1172 return retval;
1173}
1174
1175/**
1176 * pci_create_resource_files - create resource files in sysfs for @dev
1177 * @pdev: dev in question
1178 *
1179 * Walk the resources in @pdev creating files for each resource available.
1180 */
1181static int pci_create_resource_files(struct pci_dev *pdev)
1182{
1183 int i;
1184 int retval;
1185
1186 /* Expose the PCI resources from this device as files */
1187 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1188
1189 /* skip empty resources */
1190 if (!pci_resource_len(pdev, i))
1191 continue;
1192
1193 retval = pci_create_attr(pdev, i, 0);
1194 /* for prefetchable resources, create a WC mappable file */
1195 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1196 retval = pci_create_attr(pdev, i, 1);
1197
1198 if (retval) {
1199 pci_remove_resource_files(pdev);
1200 return retval;
1201 }
1202 }
1203 return 0;
1204}
1205#else /* !HAVE_PCI_MMAP */
1206int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1207void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1208#endif /* HAVE_PCI_MMAP */
1209
1210/**
1211 * pci_write_rom - used to enable access to the PCI ROM display
1212 * @filp: sysfs file
1213 * @kobj: kernel object handle
1214 * @bin_attr: struct bin_attribute for this file
1215 * @buf: user input
1216 * @off: file offset
1217 * @count: number of byte in input
1218 *
1219 * writing anything except 0 enables it
1220 */
1221static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1222 struct bin_attribute *bin_attr, char *buf,
1223 loff_t off, size_t count)
1224{
1225 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1226
1227 if ((off == 0) && (*buf == '0') && (count == 2))
1228 pdev->rom_attr_enabled = 0;
1229 else
1230 pdev->rom_attr_enabled = 1;
1231
1232 return count;
1233}
1234
1235/**
1236 * pci_read_rom - read a PCI ROM
1237 * @filp: sysfs file
1238 * @kobj: kernel object handle
1239 * @bin_attr: struct bin_attribute for this file
1240 * @buf: where to put the data we read from the ROM
1241 * @off: file offset
1242 * @count: number of bytes to read
1243 *
1244 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1245 * device corresponding to @kobj.
1246 */
1247static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1248 struct bin_attribute *bin_attr, char *buf,
1249 loff_t off, size_t count)
1250{
1251 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1252 void __iomem *rom;
1253 size_t size;
1254
1255 if (!pdev->rom_attr_enabled)
1256 return -EINVAL;
1257
1258 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1259 if (!rom || !size)
1260 return -EIO;
1261
1262 if (off >= size)
1263 count = 0;
1264 else {
1265 if (off + count > size)
1266 count = size - off;
1267
1268 memcpy_fromio(buf, rom + off, count);
1269 }
1270 pci_unmap_rom(pdev, rom);
1271
1272 return count;
1273}
1274
1275static struct bin_attribute pci_config_attr = {
1276 .attr = {
1277 .name = "config",
1278 .mode = S_IRUGO | S_IWUSR,
1279 },
1280 .size = PCI_CFG_SPACE_SIZE,
1281 .read = pci_read_config,
1282 .write = pci_write_config,
1283};
1284
1285static struct bin_attribute pcie_config_attr = {
1286 .attr = {
1287 .name = "config",
1288 .mode = S_IRUGO | S_IWUSR,
1289 },
1290 .size = PCI_CFG_SPACE_EXP_SIZE,
1291 .read = pci_read_config,
1292 .write = pci_write_config,
1293};
1294
1295static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1296 const char *buf, size_t count)
1297{
1298 struct pci_dev *pdev = to_pci_dev(dev);
1299 unsigned long val;
1300 ssize_t result = kstrtoul(buf, 0, &val);
1301
1302 if (result < 0)
1303 return result;
1304
1305 if (val != 1)
1306 return -EINVAL;
1307
1308 result = pci_reset_function(pdev);
1309 if (result < 0)
1310 return result;
1311
1312 return count;
1313}
1314
1315static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1316
1317static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1318{
1319 int retval;
1320 struct bin_attribute *attr;
1321
1322 /* If the device has VPD, try to expose it in sysfs. */
1323 if (dev->vpd) {
1324 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1325 if (!attr)
1326 return -ENOMEM;
1327
1328 sysfs_bin_attr_init(attr);
1329 attr->size = 0;
1330 attr->attr.name = "vpd";
1331 attr->attr.mode = S_IRUSR | S_IWUSR;
1332 attr->read = read_vpd_attr;
1333 attr->write = write_vpd_attr;
1334 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1335 if (retval) {
1336 kfree(attr);
1337 return retval;
1338 }
1339 dev->vpd->attr = attr;
1340 }
1341
1342 /* Active State Power Management */
1343 pcie_aspm_create_sysfs_dev_files(dev);
1344
1345 if (!pci_probe_reset_function(dev)) {
1346 retval = device_create_file(&dev->dev, &reset_attr);
1347 if (retval)
1348 goto error;
1349 dev->reset_fn = 1;
1350 }
1351 return 0;
1352
1353error:
1354 pcie_aspm_remove_sysfs_dev_files(dev);
1355 if (dev->vpd && dev->vpd->attr) {
1356 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1357 kfree(dev->vpd->attr);
1358 }
1359
1360 return retval;
1361}
1362
1363int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1364{
1365 int retval;
1366 int rom_size;
1367 struct bin_attribute *attr;
1368
1369 if (!sysfs_initialized)
1370 return -EACCES;
1371
1372 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1373 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1374 else
1375 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1376 if (retval)
1377 goto err;
1378
1379 retval = pci_create_resource_files(pdev);
1380 if (retval)
1381 goto err_config_file;
1382
1383 /* If the device has a ROM, try to expose it in sysfs. */
1384 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1385 if (rom_size) {
1386 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1387 if (!attr) {
1388 retval = -ENOMEM;
1389 goto err_resource_files;
1390 }
1391 sysfs_bin_attr_init(attr);
1392 attr->size = rom_size;
1393 attr->attr.name = "rom";
1394 attr->attr.mode = S_IRUSR | S_IWUSR;
1395 attr->read = pci_read_rom;
1396 attr->write = pci_write_rom;
1397 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1398 if (retval) {
1399 kfree(attr);
1400 goto err_resource_files;
1401 }
1402 pdev->rom_attr = attr;
1403 }
1404
1405 /* add sysfs entries for various capabilities */
1406 retval = pci_create_capabilities_sysfs(pdev);
1407 if (retval)
1408 goto err_rom_file;
1409
1410 pci_create_firmware_label_files(pdev);
1411
1412 return 0;
1413
1414err_rom_file:
1415 if (pdev->rom_attr) {
1416 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1417 kfree(pdev->rom_attr);
1418 pdev->rom_attr = NULL;
1419 }
1420err_resource_files:
1421 pci_remove_resource_files(pdev);
1422err_config_file:
1423 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1424 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1425 else
1426 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1427err:
1428 return retval;
1429}
1430
1431static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1432{
1433 if (dev->vpd && dev->vpd->attr) {
1434 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1435 kfree(dev->vpd->attr);
1436 }
1437
1438 pcie_aspm_remove_sysfs_dev_files(dev);
1439 if (dev->reset_fn) {
1440 device_remove_file(&dev->dev, &reset_attr);
1441 dev->reset_fn = 0;
1442 }
1443}
1444
1445/**
1446 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1447 * @pdev: device whose entries we should free
1448 *
1449 * Cleanup when @pdev is removed from sysfs.
1450 */
1451void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1452{
1453 if (!sysfs_initialized)
1454 return;
1455
1456 pci_remove_capabilities_sysfs(pdev);
1457
1458 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1459 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1460 else
1461 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1462
1463 pci_remove_resource_files(pdev);
1464
1465 if (pdev->rom_attr) {
1466 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1467 kfree(pdev->rom_attr);
1468 pdev->rom_attr = NULL;
1469 }
1470
1471 pci_remove_firmware_label_files(pdev);
1472}
1473
1474static int __init pci_sysfs_init(void)
1475{
1476 struct pci_dev *pdev = NULL;
1477 int retval;
1478
1479 sysfs_initialized = 1;
1480 for_each_pci_dev(pdev) {
1481 retval = pci_create_sysfs_dev_files(pdev);
1482 if (retval) {
1483 pci_dev_put(pdev);
1484 return retval;
1485 }
1486 }
1487
1488 return 0;
1489}
1490late_initcall(pci_sysfs_init);
1491
1492static struct attribute *pci_dev_dev_attrs[] = {
1493 &vga_attr.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (a == &vga_attr.attr)
1504 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1505 return 0;
1506
1507 return a->mode;
1508}
1509
1510static struct attribute *pci_dev_hp_attrs[] = {
1511 &dev_remove_attr.attr,
1512 &dev_rescan_attr.attr,
1513 NULL,
1514};
1515
1516static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1517 struct attribute *a, int n)
1518{
1519 struct device *dev = kobj_to_dev(kobj);
1520 struct pci_dev *pdev = to_pci_dev(dev);
1521
1522 if (pdev->is_virtfn)
1523 return 0;
1524
1525 return a->mode;
1526}
1527
1528static struct attribute_group pci_dev_hp_attr_group = {
1529 .attrs = pci_dev_hp_attrs,
1530 .is_visible = pci_dev_hp_attrs_are_visible,
1531};
1532
1533#ifdef CONFIG_PCI_IOV
1534static struct attribute *sriov_dev_attrs[] = {
1535 &sriov_totalvfs_attr.attr,
1536 &sriov_numvfs_attr.attr,
1537 NULL,
1538};
1539
1540static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1541 struct attribute *a, int n)
1542{
1543 struct device *dev = kobj_to_dev(kobj);
1544
1545 if (!dev_is_pf(dev))
1546 return 0;
1547
1548 return a->mode;
1549}
1550
1551static struct attribute_group sriov_dev_attr_group = {
1552 .attrs = sriov_dev_attrs,
1553 .is_visible = sriov_attrs_are_visible,
1554};
1555#endif /* CONFIG_PCI_IOV */
1556
1557static struct attribute_group pci_dev_attr_group = {
1558 .attrs = pci_dev_dev_attrs,
1559 .is_visible = pci_dev_attrs_are_visible,
1560};
1561
1562static const struct attribute_group *pci_dev_attr_groups[] = {
1563 &pci_dev_attr_group,
1564 &pci_dev_hp_attr_group,
1565#ifdef CONFIG_PCI_IOV
1566 &sriov_dev_attr_group,
1567#endif
1568 NULL,
1569};
1570
1571struct device_type pci_dev_type = {
1572 .groups = pci_dev_attr_groups,
1573};