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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static DEVICE_ATTR_WO(dev_rescan);
468
469static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473
474 if (kstrtoul(buf, 0, &val) < 0)
475 return -EINVAL;
476
477 if (val && device_remove_file_self(dev, attr))
478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 return count;
480}
481static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 remove_store);
483
484static ssize_t bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503}
504static DEVICE_ATTR_WO(bus_rescan);
505
506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533}
534static DEVICE_ATTR_RW(d3cold_allowed);
535#endif
536
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
551static ssize_t driver_override_store(struct device *dev,
552 struct device_attribute *attr,
553 const char *buf, size_t count)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 char *driver_override, *old, *cp;
557
558 /* We need to keep extra room for a newline */
559 if (count >= (PAGE_SIZE - 1))
560 return -EINVAL;
561
562 driver_override = kstrndup(buf, count, GFP_KERNEL);
563 if (!driver_override)
564 return -ENOMEM;
565
566 cp = strchr(driver_override, '\n');
567 if (cp)
568 *cp = '\0';
569
570 device_lock(dev);
571 old = pdev->driver_override;
572 if (strlen(driver_override)) {
573 pdev->driver_override = driver_override;
574 } else {
575 kfree(driver_override);
576 pdev->driver_override = NULL;
577 }
578 device_unlock(dev);
579
580 kfree(old);
581
582 return count;
583}
584
585static ssize_t driver_override_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589 ssize_t len;
590
591 device_lock(dev);
592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 device_unlock(dev);
594 return len;
595}
596static DEVICE_ATTR_RW(driver_override);
597
598static struct attribute *pci_dev_attrs[] = {
599 &dev_attr_resource.attr,
600 &dev_attr_vendor.attr,
601 &dev_attr_device.attr,
602 &dev_attr_subsystem_vendor.attr,
603 &dev_attr_subsystem_device.attr,
604 &dev_attr_revision.attr,
605 &dev_attr_class.attr,
606 &dev_attr_irq.attr,
607 &dev_attr_local_cpus.attr,
608 &dev_attr_local_cpulist.attr,
609 &dev_attr_modalias.attr,
610#ifdef CONFIG_NUMA
611 &dev_attr_numa_node.attr,
612#endif
613 &dev_attr_dma_mask_bits.attr,
614 &dev_attr_consistent_dma_mask_bits.attr,
615 &dev_attr_enable.attr,
616 &dev_attr_broken_parity_status.attr,
617 &dev_attr_msi_bus.attr,
618#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 &dev_attr_d3cold_allowed.attr,
620#endif
621#ifdef CONFIG_OF
622 &dev_attr_devspec.attr,
623#endif
624 &dev_attr_driver_override.attr,
625 &dev_attr_ari_enabled.attr,
626 NULL,
627};
628
629static struct attribute *pci_bridge_attrs[] = {
630 &dev_attr_subordinate_bus_number.attr,
631 &dev_attr_secondary_bus_number.attr,
632 NULL,
633};
634
635static struct attribute *pcie_dev_attrs[] = {
636 &dev_attr_current_link_speed.attr,
637 &dev_attr_current_link_width.attr,
638 &dev_attr_max_link_width.attr,
639 &dev_attr_max_link_speed.attr,
640 NULL,
641};
642
643static struct attribute *pcibus_attrs[] = {
644 &dev_attr_bus_rescan.attr,
645 &dev_attr_cpuaffinity.attr,
646 &dev_attr_cpulistaffinity.attr,
647 NULL,
648};
649
650static const struct attribute_group pcibus_group = {
651 .attrs = pcibus_attrs,
652};
653
654const struct attribute_group *pcibus_groups[] = {
655 &pcibus_group,
656 NULL,
657};
658
659static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663 struct pci_dev *vga_dev = vga_default_device();
664
665 if (vga_dev)
666 return sprintf(buf, "%u\n", (pdev == vga_dev));
667
668 return sprintf(buf, "%u\n",
669 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 IORESOURCE_ROM_SHADOW));
671}
672static DEVICE_ATTR_RO(boot_vga);
673
674static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr, char *buf,
676 loff_t off, size_t count)
677{
678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 unsigned int size = 64;
680 loff_t init_off = off;
681 u8 *data = (u8 *) buf;
682
683 /* Several chips lock up trying to read undefined config space */
684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 size = dev->cfg_size;
686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 size = 128;
688
689 if (off > size)
690 return 0;
691 if (off + count > size) {
692 size -= off;
693 count = size;
694 } else {
695 size = count;
696 }
697
698 pci_config_pm_runtime_get(dev);
699
700 if ((off & 1) && size) {
701 u8 val;
702 pci_user_read_config_byte(dev, off, &val);
703 data[off - init_off] = val;
704 off++;
705 size--;
706 }
707
708 if ((off & 3) && size > 2) {
709 u16 val;
710 pci_user_read_config_word(dev, off, &val);
711 data[off - init_off] = val & 0xff;
712 data[off - init_off + 1] = (val >> 8) & 0xff;
713 off += 2;
714 size -= 2;
715 }
716
717 while (size > 3) {
718 u32 val;
719 pci_user_read_config_dword(dev, off, &val);
720 data[off - init_off] = val & 0xff;
721 data[off - init_off + 1] = (val >> 8) & 0xff;
722 data[off - init_off + 2] = (val >> 16) & 0xff;
723 data[off - init_off + 3] = (val >> 24) & 0xff;
724 off += 4;
725 size -= 4;
726 }
727
728 if (size >= 2) {
729 u16 val;
730 pci_user_read_config_word(dev, off, &val);
731 data[off - init_off] = val & 0xff;
732 data[off - init_off + 1] = (val >> 8) & 0xff;
733 off += 2;
734 size -= 2;
735 }
736
737 if (size > 0) {
738 u8 val;
739 pci_user_read_config_byte(dev, off, &val);
740 data[off - init_off] = val;
741 off++;
742 --size;
743 }
744
745 pci_config_pm_runtime_put(dev);
746
747 return count;
748}
749
750static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 struct bin_attribute *bin_attr, char *buf,
752 loff_t off, size_t count)
753{
754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 unsigned int size = count;
756 loff_t init_off = off;
757 u8 *data = (u8 *) buf;
758 int ret;
759
760 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 if (ret)
762 return ret;
763
764 if (off > dev->cfg_size)
765 return 0;
766 if (off + count > dev->cfg_size) {
767 size = dev->cfg_size - off;
768 count = size;
769 }
770
771 pci_config_pm_runtime_get(dev);
772
773 if ((off & 1) && size) {
774 pci_user_write_config_byte(dev, off, data[off - init_off]);
775 off++;
776 size--;
777 }
778
779 if ((off & 3) && size > 2) {
780 u16 val = data[off - init_off];
781 val |= (u16) data[off - init_off + 1] << 8;
782 pci_user_write_config_word(dev, off, val);
783 off += 2;
784 size -= 2;
785 }
786
787 while (size > 3) {
788 u32 val = data[off - init_off];
789 val |= (u32) data[off - init_off + 1] << 8;
790 val |= (u32) data[off - init_off + 2] << 16;
791 val |= (u32) data[off - init_off + 3] << 24;
792 pci_user_write_config_dword(dev, off, val);
793 off += 4;
794 size -= 4;
795 }
796
797 if (size >= 2) {
798 u16 val = data[off - init_off];
799 val |= (u16) data[off - init_off + 1] << 8;
800 pci_user_write_config_word(dev, off, val);
801 off += 2;
802 size -= 2;
803 }
804
805 if (size) {
806 pci_user_write_config_byte(dev, off, data[off - init_off]);
807 off++;
808 --size;
809 }
810
811 pci_config_pm_runtime_put(dev);
812
813 return count;
814}
815
816#ifdef HAVE_PCI_LEGACY
817/**
818 * pci_read_legacy_io - read byte(s) from legacy I/O port space
819 * @filp: open sysfs file
820 * @kobj: kobject corresponding to file to read from
821 * @bin_attr: struct bin_attribute for this file
822 * @buf: buffer to store results
823 * @off: offset into legacy I/O port space
824 * @count: number of bytes to read
825 *
826 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827 * callback routine (pci_legacy_read).
828 */
829static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 struct bin_attribute *bin_attr, char *buf,
831 loff_t off, size_t count)
832{
833 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834
835 /* Only support 1, 2 or 4 byte accesses */
836 if (count != 1 && count != 2 && count != 4)
837 return -EINVAL;
838
839 return pci_legacy_read(bus, off, (u32 *)buf, count);
840}
841
842/**
843 * pci_write_legacy_io - write byte(s) to legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer containing value to be written
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to write
850 *
851 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_write).
853 */
854static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_write(bus, off, *(u32 *)buf, count);
865}
866
867/**
868 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to device to be mapped
871 * @attr: struct bin_attribute for this file
872 * @vma: struct vm_area_struct passed to mmap
873 *
874 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875 * legacy memory space (first meg of bus space) into application virtual
876 * memory space.
877 */
878static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 struct bin_attribute *attr,
880 struct vm_area_struct *vma)
881{
882 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883
884 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885}
886
887/**
888 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889 * @filp: open sysfs file
890 * @kobj: kobject corresponding to device to be mapped
891 * @attr: struct bin_attribute for this file
892 * @vma: struct vm_area_struct passed to mmap
893 *
894 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895 * legacy IO space (first meg of bus space) into application virtual
896 * memory space. Returns -ENOSYS if the operation isn't supported
897 */
898static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *attr,
900 struct vm_area_struct *vma)
901{
902 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903
904 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905}
906
907/**
908 * pci_adjust_legacy_attr - adjustment of legacy file attributes
909 * @b: bus to create files under
910 * @mmap_type: I/O port or memory
911 *
912 * Stub implementation. Can be overridden by arch if necessary.
913 */
914void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 enum pci_mmap_state mmap_type)
916{
917}
918
919/**
920 * pci_create_legacy_files - create legacy I/O port and memory files
921 * @b: bus to create files under
922 *
923 * Some platforms allow access to legacy I/O port and ISA memory space on
924 * a per-bus basis. This routine creates the files and ties them into
925 * their associated read, write and mmap files from pci-sysfs.c
926 *
927 * On error unwind, but don't propagate the error to the caller
928 * as it is ok to set up the PCI bus without these files.
929 */
930void pci_create_legacy_files(struct pci_bus *b)
931{
932 int error;
933
934 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 GFP_ATOMIC);
936 if (!b->legacy_io)
937 goto kzalloc_err;
938
939 sysfs_bin_attr_init(b->legacy_io);
940 b->legacy_io->attr.name = "legacy_io";
941 b->legacy_io->size = 0xffff;
942 b->legacy_io->attr.mode = 0600;
943 b->legacy_io->read = pci_read_legacy_io;
944 b->legacy_io->write = pci_write_legacy_io;
945 b->legacy_io->mmap = pci_mmap_legacy_io;
946 pci_adjust_legacy_attr(b, pci_mmap_io);
947 error = device_create_bin_file(&b->dev, b->legacy_io);
948 if (error)
949 goto legacy_io_err;
950
951 /* Allocated above after the legacy_io struct */
952 b->legacy_mem = b->legacy_io + 1;
953 sysfs_bin_attr_init(b->legacy_mem);
954 b->legacy_mem->attr.name = "legacy_mem";
955 b->legacy_mem->size = 1024*1024;
956 b->legacy_mem->attr.mode = 0600;
957 b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 pci_adjust_legacy_attr(b, pci_mmap_mem);
959 error = device_create_bin_file(&b->dev, b->legacy_mem);
960 if (error)
961 goto legacy_mem_err;
962
963 return;
964
965legacy_mem_err:
966 device_remove_bin_file(&b->dev, b->legacy_io);
967legacy_io_err:
968 kfree(b->legacy_io);
969 b->legacy_io = NULL;
970kzalloc_err:
971 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972}
973
974void pci_remove_legacy_files(struct pci_bus *b)
975{
976 if (b->legacy_io) {
977 device_remove_bin_file(&b->dev, b->legacy_io);
978 device_remove_bin_file(&b->dev, b->legacy_mem);
979 kfree(b->legacy_io); /* both are allocated here */
980 }
981}
982#endif /* HAVE_PCI_LEGACY */
983
984#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985
986int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 enum pci_mmap_api mmap_api)
988{
989 unsigned long nr, start, size;
990 resource_size_t pci_start = 0, pci_end;
991
992 if (pci_resource_len(pdev, resno) == 0)
993 return 0;
994 nr = vma_pages(vma);
995 start = vma->vm_pgoff;
996 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 if (mmap_api == PCI_MMAP_PROCFS) {
998 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 &pci_start, &pci_end);
1000 pci_start >>= PAGE_SHIFT;
1001 }
1002 if (start >= pci_start && start < pci_start + size &&
1003 start + nr <= pci_start + size)
1004 return 1;
1005 return 0;
1006}
1007
1008/**
1009 * pci_mmap_resource - map a PCI resource into user memory space
1010 * @kobj: kobject for mapping
1011 * @attr: struct bin_attribute for the file being mapped
1012 * @vma: struct vm_area_struct passed into the mmap
1013 * @write_combine: 1 for write_combine mapping
1014 *
1015 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016 */
1017static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 struct vm_area_struct *vma, int write_combine)
1019{
1020 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 int bar = (unsigned long)attr->private;
1022 enum pci_mmap_state mmap_type;
1023 struct resource *res = &pdev->resource[bar];
1024 int ret;
1025
1026 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 if (ret)
1028 return ret;
1029
1030 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 return -EINVAL;
1032
1033 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 return -EINVAL;
1035
1036 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037
1038 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039}
1040
1041static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 0);
1046}
1047
1048static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr,
1050 struct vm_area_struct *vma)
1051{
1052 return pci_mmap_resource(kobj, attr, vma, 1);
1053}
1054
1055static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 struct bin_attribute *attr, char *buf,
1057 loff_t off, size_t count, bool write)
1058{
1059 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 int bar = (unsigned long)attr->private;
1061 unsigned long port = off;
1062
1063 port += pci_resource_start(pdev, bar);
1064
1065 if (port > pci_resource_end(pdev, bar))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, bar))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 int ret;
1106
1107 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 if (ret)
1109 return ret;
1110
1111 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112}
1113
1114/**
1115 * pci_remove_resource_files - cleanup resource files
1116 * @pdev: dev to cleanup
1117 *
1118 * If we created resource files for @pdev, remove them from sysfs and
1119 * free their resources.
1120 */
1121static void pci_remove_resource_files(struct pci_dev *pdev)
1122{
1123 int i;
1124
1125 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1126 struct bin_attribute *res_attr;
1127
1128 res_attr = pdev->res_attr[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133
1134 res_attr = pdev->res_attr_wc[i];
1135 if (res_attr) {
1136 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 kfree(res_attr);
1138 }
1139 }
1140}
1141
1142static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143{
1144 /* allocate attribute structure, piggyback attribute name */
1145 int name_len = write_combine ? 13 : 10;
1146 struct bin_attribute *res_attr;
1147 char *res_attr_name;
1148 int retval;
1149
1150 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 if (!res_attr)
1152 return -ENOMEM;
1153
1154 res_attr_name = (char *)(res_attr + 1);
1155
1156 sysfs_bin_attr_init(res_attr);
1157 if (write_combine) {
1158 pdev->res_attr_wc[num] = res_attr;
1159 sprintf(res_attr_name, "resource%d_wc", num);
1160 res_attr->mmap = pci_mmap_resource_wc;
1161 } else {
1162 pdev->res_attr[num] = res_attr;
1163 sprintf(res_attr_name, "resource%d", num);
1164 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 res_attr->read = pci_read_resource_io;
1166 res_attr->write = pci_write_resource_io;
1167 if (arch_can_pci_mmap_io())
1168 res_attr->mmap = pci_mmap_resource_uc;
1169 } else {
1170 res_attr->mmap = pci_mmap_resource_uc;
1171 }
1172 }
1173 res_attr->attr.name = res_attr_name;
1174 res_attr->attr.mode = 0600;
1175 res_attr->size = pci_resource_len(pdev, num);
1176 res_attr->private = (void *)(unsigned long)num;
1177 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 if (retval)
1179 kfree(res_attr);
1180
1181 return retval;
1182}
1183
1184/**
1185 * pci_create_resource_files - create resource files in sysfs for @dev
1186 * @pdev: dev in question
1187 *
1188 * Walk the resources in @pdev creating files for each resource available.
1189 */
1190static int pci_create_resource_files(struct pci_dev *pdev)
1191{
1192 int i;
1193 int retval;
1194
1195 /* Expose the PCI resources from this device as files */
1196 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1197
1198 /* skip empty resources */
1199 if (!pci_resource_len(pdev, i))
1200 continue;
1201
1202 retval = pci_create_attr(pdev, i, 0);
1203 /* for prefetchable resources, create a WC mappable file */
1204 if (!retval && arch_can_pci_mmap_wc() &&
1205 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 retval = pci_create_attr(pdev, i, 1);
1207 if (retval) {
1208 pci_remove_resource_files(pdev);
1209 return retval;
1210 }
1211 }
1212 return 0;
1213}
1214#else /* !HAVE_PCI_MMAP */
1215int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217#endif /* HAVE_PCI_MMAP */
1218
1219/**
1220 * pci_write_rom - used to enable access to the PCI ROM display
1221 * @filp: sysfs file
1222 * @kobj: kernel object handle
1223 * @bin_attr: struct bin_attribute for this file
1224 * @buf: user input
1225 * @off: file offset
1226 * @count: number of byte in input
1227 *
1228 * writing anything except 0 enables it
1229 */
1230static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 struct bin_attribute *bin_attr, char *buf,
1232 loff_t off, size_t count)
1233{
1234 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235
1236 if ((off == 0) && (*buf == '0') && (count == 2))
1237 pdev->rom_attr_enabled = 0;
1238 else
1239 pdev->rom_attr_enabled = 1;
1240
1241 return count;
1242}
1243
1244/**
1245 * pci_read_rom - read a PCI ROM
1246 * @filp: sysfs file
1247 * @kobj: kernel object handle
1248 * @bin_attr: struct bin_attribute for this file
1249 * @buf: where to put the data we read from the ROM
1250 * @off: file offset
1251 * @count: number of bytes to read
1252 *
1253 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254 * device corresponding to @kobj.
1255 */
1256static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 struct bin_attribute *bin_attr, char *buf,
1258 loff_t off, size_t count)
1259{
1260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 void __iomem *rom;
1262 size_t size;
1263
1264 if (!pdev->rom_attr_enabled)
1265 return -EINVAL;
1266
1267 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1268 if (!rom || !size)
1269 return -EIO;
1270
1271 if (off >= size)
1272 count = 0;
1273 else {
1274 if (off + count > size)
1275 count = size - off;
1276
1277 memcpy_fromio(buf, rom + off, count);
1278 }
1279 pci_unmap_rom(pdev, rom);
1280
1281 return count;
1282}
1283
1284static const struct bin_attribute pci_config_attr = {
1285 .attr = {
1286 .name = "config",
1287 .mode = 0644,
1288 },
1289 .size = PCI_CFG_SPACE_SIZE,
1290 .read = pci_read_config,
1291 .write = pci_write_config,
1292};
1293
1294static const struct bin_attribute pcie_config_attr = {
1295 .attr = {
1296 .name = "config",
1297 .mode = 0644,
1298 },
1299 .size = PCI_CFG_SPACE_EXP_SIZE,
1300 .read = pci_read_config,
1301 .write = pci_write_config,
1302};
1303
1304static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct pci_dev *pdev = to_pci_dev(dev);
1308 unsigned long val;
1309 ssize_t result = kstrtoul(buf, 0, &val);
1310
1311 if (result < 0)
1312 return result;
1313
1314 if (val != 1)
1315 return -EINVAL;
1316
1317 pm_runtime_get_sync(dev);
1318 result = pci_reset_function(pdev);
1319 pm_runtime_put(dev);
1320 if (result < 0)
1321 return result;
1322
1323 return count;
1324}
1325
1326static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327
1328static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329{
1330 int retval;
1331
1332 pcie_vpd_create_sysfs_dev_files(dev);
1333 pcie_aspm_create_sysfs_dev_files(dev);
1334
1335 if (dev->reset_fn) {
1336 retval = device_create_file(&dev->dev, &dev_attr_reset);
1337 if (retval)
1338 goto error;
1339 }
1340 return 0;
1341
1342error:
1343 pcie_aspm_remove_sysfs_dev_files(dev);
1344 pcie_vpd_remove_sysfs_dev_files(dev);
1345 return retval;
1346}
1347
1348int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1349{
1350 int retval;
1351 int rom_size;
1352 struct bin_attribute *attr;
1353
1354 if (!sysfs_initialized)
1355 return -EACCES;
1356
1357 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1358 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1359 else
1360 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1361 if (retval)
1362 goto err;
1363
1364 retval = pci_create_resource_files(pdev);
1365 if (retval)
1366 goto err_config_file;
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
1369 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 if (rom_size) {
1371 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1372 if (!attr) {
1373 retval = -ENOMEM;
1374 goto err_resource_files;
1375 }
1376 sysfs_bin_attr_init(attr);
1377 attr->size = rom_size;
1378 attr->attr.name = "rom";
1379 attr->attr.mode = 0600;
1380 attr->read = pci_read_rom;
1381 attr->write = pci_write_rom;
1382 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1383 if (retval) {
1384 kfree(attr);
1385 goto err_resource_files;
1386 }
1387 pdev->rom_attr = attr;
1388 }
1389
1390 /* add sysfs entries for various capabilities */
1391 retval = pci_create_capabilities_sysfs(pdev);
1392 if (retval)
1393 goto err_rom_file;
1394
1395 pci_create_firmware_label_files(pdev);
1396
1397 return 0;
1398
1399err_rom_file:
1400 if (pdev->rom_attr) {
1401 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1402 kfree(pdev->rom_attr);
1403 pdev->rom_attr = NULL;
1404 }
1405err_resource_files:
1406 pci_remove_resource_files(pdev);
1407err_config_file:
1408 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1410 else
1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1412err:
1413 return retval;
1414}
1415
1416static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1417{
1418 pcie_vpd_remove_sysfs_dev_files(dev);
1419 pcie_aspm_remove_sysfs_dev_files(dev);
1420 if (dev->reset_fn) {
1421 device_remove_file(&dev->dev, &dev_attr_reset);
1422 dev->reset_fn = 0;
1423 }
1424}
1425
1426/**
1427 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1428 * @pdev: device whose entries we should free
1429 *
1430 * Cleanup when @pdev is removed from sysfs.
1431 */
1432void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1433{
1434 if (!sysfs_initialized)
1435 return;
1436
1437 pci_remove_capabilities_sysfs(pdev);
1438
1439 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1440 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1441 else
1442 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1443
1444 pci_remove_resource_files(pdev);
1445
1446 if (pdev->rom_attr) {
1447 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1448 kfree(pdev->rom_attr);
1449 pdev->rom_attr = NULL;
1450 }
1451
1452 pci_remove_firmware_label_files(pdev);
1453}
1454
1455static int __init pci_sysfs_init(void)
1456{
1457 struct pci_dev *pdev = NULL;
1458 int retval;
1459
1460 sysfs_initialized = 1;
1461 for_each_pci_dev(pdev) {
1462 retval = pci_create_sysfs_dev_files(pdev);
1463 if (retval) {
1464 pci_dev_put(pdev);
1465 return retval;
1466 }
1467 }
1468
1469 return 0;
1470}
1471late_initcall(pci_sysfs_init);
1472
1473static struct attribute *pci_dev_dev_attrs[] = {
1474 &dev_attr_boot_vga.attr,
1475 NULL,
1476};
1477
1478static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1479 struct attribute *a, int n)
1480{
1481 struct device *dev = kobj_to_dev(kobj);
1482 struct pci_dev *pdev = to_pci_dev(dev);
1483
1484 if (a == &dev_attr_boot_vga.attr)
1485 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static struct attribute *pci_dev_hp_attrs[] = {
1492 &dev_attr_remove.attr,
1493 &dev_attr_dev_rescan.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (pdev->is_virtfn)
1504 return 0;
1505
1506 return a->mode;
1507}
1508
1509static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1510 struct attribute *a, int n)
1511{
1512 struct device *dev = kobj_to_dev(kobj);
1513 struct pci_dev *pdev = to_pci_dev(dev);
1514
1515 if (pci_is_bridge(pdev))
1516 return a->mode;
1517
1518 return 0;
1519}
1520
1521static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1522 struct attribute *a, int n)
1523{
1524 struct device *dev = kobj_to_dev(kobj);
1525 struct pci_dev *pdev = to_pci_dev(dev);
1526
1527 if (pci_is_pcie(pdev))
1528 return a->mode;
1529
1530 return 0;
1531}
1532
1533static const struct attribute_group pci_dev_group = {
1534 .attrs = pci_dev_attrs,
1535};
1536
1537const struct attribute_group *pci_dev_groups[] = {
1538 &pci_dev_group,
1539 NULL,
1540};
1541
1542static const struct attribute_group pci_bridge_group = {
1543 .attrs = pci_bridge_attrs,
1544};
1545
1546const struct attribute_group *pci_bridge_groups[] = {
1547 &pci_bridge_group,
1548 NULL,
1549};
1550
1551static const struct attribute_group pcie_dev_group = {
1552 .attrs = pcie_dev_attrs,
1553};
1554
1555const struct attribute_group *pcie_dev_groups[] = {
1556 &pcie_dev_group,
1557 NULL,
1558};
1559
1560static const struct attribute_group pci_dev_hp_attr_group = {
1561 .attrs = pci_dev_hp_attrs,
1562 .is_visible = pci_dev_hp_attrs_are_visible,
1563};
1564
1565static const struct attribute_group pci_dev_attr_group = {
1566 .attrs = pci_dev_dev_attrs,
1567 .is_visible = pci_dev_attrs_are_visible,
1568};
1569
1570static const struct attribute_group pci_bridge_attr_group = {
1571 .attrs = pci_bridge_attrs,
1572 .is_visible = pci_bridge_attrs_are_visible,
1573};
1574
1575static const struct attribute_group pcie_dev_attr_group = {
1576 .attrs = pcie_dev_attrs,
1577 .is_visible = pcie_dev_attrs_are_visible,
1578};
1579
1580static const struct attribute_group *pci_dev_attr_groups[] = {
1581 &pci_dev_attr_group,
1582 &pci_dev_hp_attr_group,
1583#ifdef CONFIG_PCI_IOV
1584 &sriov_dev_attr_group,
1585#endif
1586 &pci_bridge_attr_group,
1587 &pcie_dev_attr_group,
1588#ifdef CONFIG_PCIEAER
1589 &aer_stats_attr_group,
1590#endif
1591 NULL,
1592};
1593
1594const struct device_type pci_dev_type = {
1595 .groups = pci_dev_attr_groups,
1596};
1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/export.h>
23#include <linux/topology.h>
24#include <linux/mm.h>
25#include <linux/fs.h>
26#include <linux/capability.h>
27#include <linux/security.h>
28#include <linux/pci-aspm.h>
29#include <linux/slab.h>
30#include <linux/vgaarb.h>
31#include "pci.h"
32
33static int sysfs_initialized; /* = 0 */
34
35/* show configuration fields */
36#define pci_config_attr(field, format_string) \
37static ssize_t \
38field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
39{ \
40 struct pci_dev *pdev; \
41 \
42 pdev = to_pci_dev (dev); \
43 return sprintf (buf, format_string, pdev->field); \
44}
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(class, "0x%06x\n");
51pci_config_attr(irq, "%u\n");
52
53static ssize_t broken_parity_status_show(struct device *dev,
54 struct device_attribute *attr,
55 char *buf)
56{
57 struct pci_dev *pdev = to_pci_dev(dev);
58 return sprintf (buf, "%u\n", pdev->broken_parity_status);
59}
60
61static ssize_t broken_parity_status_store(struct device *dev,
62 struct device_attribute *attr,
63 const char *buf, size_t count)
64{
65 struct pci_dev *pdev = to_pci_dev(dev);
66 unsigned long val;
67
68 if (strict_strtoul(buf, 0, &val) < 0)
69 return -EINVAL;
70
71 pdev->broken_parity_status = !!val;
72
73 return count;
74}
75
76static ssize_t local_cpus_show(struct device *dev,
77 struct device_attribute *attr, char *buf)
78{
79 const struct cpumask *mask;
80 int len;
81
82#ifdef CONFIG_NUMA
83 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
84 cpumask_of_node(dev_to_node(dev));
85#else
86 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
87#endif
88 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
89 buf[len++] = '\n';
90 buf[len] = '\0';
91 return len;
92}
93
94
95static ssize_t local_cpulist_show(struct device *dev,
96 struct device_attribute *attr, char *buf)
97{
98 const struct cpumask *mask;
99 int len;
100
101#ifdef CONFIG_NUMA
102 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
103 cpumask_of_node(dev_to_node(dev));
104#else
105 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
106#endif
107 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
108 buf[len++] = '\n';
109 buf[len] = '\0';
110 return len;
111}
112
113/*
114 * PCI Bus Class Devices
115 */
116static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
117 int type,
118 struct device_attribute *attr,
119 char *buf)
120{
121 int ret;
122 const struct cpumask *cpumask;
123
124 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
125 ret = type ?
126 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
127 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
128 buf[ret++] = '\n';
129 buf[ret] = '\0';
130 return ret;
131}
132
133static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
134 struct device_attribute *attr,
135 char *buf)
136{
137 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
138}
139
140static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
141 struct device_attribute *attr,
142 char *buf)
143{
144 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
145}
146
147/* show resources */
148static ssize_t
149resource_show(struct device * dev, struct device_attribute *attr, char * buf)
150{
151 struct pci_dev * pci_dev = to_pci_dev(dev);
152 char * str = buf;
153 int i;
154 int max;
155 resource_size_t start, end;
156
157 if (pci_dev->subordinate)
158 max = DEVICE_COUNT_RESOURCE;
159 else
160 max = PCI_BRIDGE_RESOURCES;
161
162 for (i = 0; i < max; i++) {
163 struct resource *res = &pci_dev->resource[i];
164 pci_resource_to_user(pci_dev, i, res, &start, &end);
165 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
166 (unsigned long long)start,
167 (unsigned long long)end,
168 (unsigned long long)res->flags);
169 }
170 return (str - buf);
171}
172
173static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176
177 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
178 pci_dev->vendor, pci_dev->device,
179 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
180 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
181 (u8)(pci_dev->class));
182}
183
184static ssize_t is_enabled_store(struct device *dev,
185 struct device_attribute *attr, const char *buf,
186 size_t count)
187{
188 struct pci_dev *pdev = to_pci_dev(dev);
189 unsigned long val;
190 ssize_t result = strict_strtoul(buf, 0, &val);
191
192 if (result < 0)
193 return result;
194
195 /* this can crash the machine when done on the "wrong" device */
196 if (!capable(CAP_SYS_ADMIN))
197 return -EPERM;
198
199 if (!val) {
200 if (pci_is_enabled(pdev))
201 pci_disable_device(pdev);
202 else
203 result = -EIO;
204 } else
205 result = pci_enable_device(pdev);
206
207 return result < 0 ? result : count;
208}
209
210static ssize_t is_enabled_show(struct device *dev,
211 struct device_attribute *attr, char *buf)
212{
213 struct pci_dev *pdev;
214
215 pdev = to_pci_dev (dev);
216 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
217}
218
219#ifdef CONFIG_NUMA
220static ssize_t
221numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
222{
223 return sprintf (buf, "%d\n", dev->numa_node);
224}
225#endif
226
227static ssize_t
228dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
229{
230 struct pci_dev *pdev = to_pci_dev(dev);
231
232 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
233}
234
235static ssize_t
236consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
237 char *buf)
238{
239 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
240}
241
242static ssize_t
243msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
244{
245 struct pci_dev *pdev = to_pci_dev(dev);
246
247 if (!pdev->subordinate)
248 return 0;
249
250 return sprintf (buf, "%u\n",
251 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
252}
253
254static ssize_t
255msi_bus_store(struct device *dev, struct device_attribute *attr,
256 const char *buf, size_t count)
257{
258 struct pci_dev *pdev = to_pci_dev(dev);
259 unsigned long val;
260
261 if (strict_strtoul(buf, 0, &val) < 0)
262 return -EINVAL;
263
264 /* bad things may happen if the no_msi flag is changed
265 * while some drivers are loaded */
266 if (!capable(CAP_SYS_ADMIN))
267 return -EPERM;
268
269 /* Maybe pci devices without subordinate busses shouldn't even have this
270 * attribute in the first place? */
271 if (!pdev->subordinate)
272 return count;
273
274 /* Is the flag going to change, or keep the value it already had? */
275 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
276 !!val) {
277 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
278
279 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
280 " bad things could happen\n", val ? "" : " not");
281 }
282
283 return count;
284}
285
286#ifdef CONFIG_HOTPLUG
287static DEFINE_MUTEX(pci_remove_rescan_mutex);
288static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
289 size_t count)
290{
291 unsigned long val;
292 struct pci_bus *b = NULL;
293
294 if (strict_strtoul(buf, 0, &val) < 0)
295 return -EINVAL;
296
297 if (val) {
298 mutex_lock(&pci_remove_rescan_mutex);
299 while ((b = pci_find_next_bus(b)) != NULL)
300 pci_rescan_bus(b);
301 mutex_unlock(&pci_remove_rescan_mutex);
302 }
303 return count;
304}
305
306struct bus_attribute pci_bus_attrs[] = {
307 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
308 __ATTR_NULL
309};
310
311static ssize_t
312dev_rescan_store(struct device *dev, struct device_attribute *attr,
313 const char *buf, size_t count)
314{
315 unsigned long val;
316 struct pci_dev *pdev = to_pci_dev(dev);
317
318 if (strict_strtoul(buf, 0, &val) < 0)
319 return -EINVAL;
320
321 if (val) {
322 mutex_lock(&pci_remove_rescan_mutex);
323 pci_rescan_bus(pdev->bus);
324 mutex_unlock(&pci_remove_rescan_mutex);
325 }
326 return count;
327}
328
329static void remove_callback(struct device *dev)
330{
331 struct pci_dev *pdev = to_pci_dev(dev);
332
333 mutex_lock(&pci_remove_rescan_mutex);
334 pci_stop_and_remove_bus_device(pdev);
335 mutex_unlock(&pci_remove_rescan_mutex);
336}
337
338static ssize_t
339remove_store(struct device *dev, struct device_attribute *dummy,
340 const char *buf, size_t count)
341{
342 int ret = 0;
343 unsigned long val;
344
345 if (strict_strtoul(buf, 0, &val) < 0)
346 return -EINVAL;
347
348 /* An attribute cannot be unregistered by one of its own methods,
349 * so we have to use this roundabout approach.
350 */
351 if (val)
352 ret = device_schedule_callback(dev, remove_callback);
353 if (ret)
354 count = ret;
355 return count;
356}
357
358static ssize_t
359dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
360 const char *buf, size_t count)
361{
362 unsigned long val;
363 struct pci_bus *bus = to_pci_bus(dev);
364
365 if (strict_strtoul(buf, 0, &val) < 0)
366 return -EINVAL;
367
368 if (val) {
369 mutex_lock(&pci_remove_rescan_mutex);
370 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
371 pci_rescan_bus_bridge_resize(bus->self);
372 else
373 pci_rescan_bus(bus);
374 mutex_unlock(&pci_remove_rescan_mutex);
375 }
376 return count;
377}
378
379#endif
380
381struct device_attribute pci_dev_attrs[] = {
382 __ATTR_RO(resource),
383 __ATTR_RO(vendor),
384 __ATTR_RO(device),
385 __ATTR_RO(subsystem_vendor),
386 __ATTR_RO(subsystem_device),
387 __ATTR_RO(class),
388 __ATTR_RO(irq),
389 __ATTR_RO(local_cpus),
390 __ATTR_RO(local_cpulist),
391 __ATTR_RO(modalias),
392#ifdef CONFIG_NUMA
393 __ATTR_RO(numa_node),
394#endif
395 __ATTR_RO(dma_mask_bits),
396 __ATTR_RO(consistent_dma_mask_bits),
397 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
398 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
399 broken_parity_status_show,broken_parity_status_store),
400 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
401#ifdef CONFIG_HOTPLUG
402 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
403 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
404#endif
405 __ATTR_NULL,
406};
407
408struct device_attribute pcibus_dev_attrs[] = {
409#ifdef CONFIG_HOTPLUG
410 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
411#endif
412 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
413 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
414 __ATTR_NULL,
415};
416
417static ssize_t
418boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
419{
420 struct pci_dev *pdev = to_pci_dev(dev);
421 struct pci_dev *vga_dev = vga_default_device();
422
423 if (vga_dev)
424 return sprintf(buf, "%u\n", (pdev == vga_dev));
425
426 return sprintf(buf, "%u\n",
427 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
428 IORESOURCE_ROM_SHADOW));
429}
430struct device_attribute vga_attr = __ATTR_RO(boot_vga);
431
432static ssize_t
433pci_read_config(struct file *filp, struct kobject *kobj,
434 struct bin_attribute *bin_attr,
435 char *buf, loff_t off, size_t count)
436{
437 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
438 unsigned int size = 64;
439 loff_t init_off = off;
440 u8 *data = (u8*) buf;
441
442 /* Several chips lock up trying to read undefined config space */
443 if (security_capable(filp->f_cred, &init_user_ns, CAP_SYS_ADMIN) == 0) {
444 size = dev->cfg_size;
445 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
446 size = 128;
447 }
448
449 if (off > size)
450 return 0;
451 if (off + count > size) {
452 size -= off;
453 count = size;
454 } else {
455 size = count;
456 }
457
458 if ((off & 1) && size) {
459 u8 val;
460 pci_user_read_config_byte(dev, off, &val);
461 data[off - init_off] = val;
462 off++;
463 size--;
464 }
465
466 if ((off & 3) && size > 2) {
467 u16 val;
468 pci_user_read_config_word(dev, off, &val);
469 data[off - init_off] = val & 0xff;
470 data[off - init_off + 1] = (val >> 8) & 0xff;
471 off += 2;
472 size -= 2;
473 }
474
475 while (size > 3) {
476 u32 val;
477 pci_user_read_config_dword(dev, off, &val);
478 data[off - init_off] = val & 0xff;
479 data[off - init_off + 1] = (val >> 8) & 0xff;
480 data[off - init_off + 2] = (val >> 16) & 0xff;
481 data[off - init_off + 3] = (val >> 24) & 0xff;
482 off += 4;
483 size -= 4;
484 }
485
486 if (size >= 2) {
487 u16 val;
488 pci_user_read_config_word(dev, off, &val);
489 data[off - init_off] = val & 0xff;
490 data[off - init_off + 1] = (val >> 8) & 0xff;
491 off += 2;
492 size -= 2;
493 }
494
495 if (size > 0) {
496 u8 val;
497 pci_user_read_config_byte(dev, off, &val);
498 data[off - init_off] = val;
499 off++;
500 --size;
501 }
502
503 return count;
504}
505
506static ssize_t
507pci_write_config(struct file* filp, struct kobject *kobj,
508 struct bin_attribute *bin_attr,
509 char *buf, loff_t off, size_t count)
510{
511 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
512 unsigned int size = count;
513 loff_t init_off = off;
514 u8 *data = (u8*) buf;
515
516 if (off > dev->cfg_size)
517 return 0;
518 if (off + count > dev->cfg_size) {
519 size = dev->cfg_size - off;
520 count = size;
521 }
522
523 if ((off & 1) && size) {
524 pci_user_write_config_byte(dev, off, data[off - init_off]);
525 off++;
526 size--;
527 }
528
529 if ((off & 3) && size > 2) {
530 u16 val = data[off - init_off];
531 val |= (u16) data[off - init_off + 1] << 8;
532 pci_user_write_config_word(dev, off, val);
533 off += 2;
534 size -= 2;
535 }
536
537 while (size > 3) {
538 u32 val = data[off - init_off];
539 val |= (u32) data[off - init_off + 1] << 8;
540 val |= (u32) data[off - init_off + 2] << 16;
541 val |= (u32) data[off - init_off + 3] << 24;
542 pci_user_write_config_dword(dev, off, val);
543 off += 4;
544 size -= 4;
545 }
546
547 if (size >= 2) {
548 u16 val = data[off - init_off];
549 val |= (u16) data[off - init_off + 1] << 8;
550 pci_user_write_config_word(dev, off, val);
551 off += 2;
552 size -= 2;
553 }
554
555 if (size) {
556 pci_user_write_config_byte(dev, off, data[off - init_off]);
557 off++;
558 --size;
559 }
560
561 return count;
562}
563
564static ssize_t
565read_vpd_attr(struct file *filp, struct kobject *kobj,
566 struct bin_attribute *bin_attr,
567 char *buf, loff_t off, size_t count)
568{
569 struct pci_dev *dev =
570 to_pci_dev(container_of(kobj, struct device, kobj));
571
572 if (off > bin_attr->size)
573 count = 0;
574 else if (count > bin_attr->size - off)
575 count = bin_attr->size - off;
576
577 return pci_read_vpd(dev, off, count, buf);
578}
579
580static ssize_t
581write_vpd_attr(struct file *filp, struct kobject *kobj,
582 struct bin_attribute *bin_attr,
583 char *buf, loff_t off, size_t count)
584{
585 struct pci_dev *dev =
586 to_pci_dev(container_of(kobj, struct device, kobj));
587
588 if (off > bin_attr->size)
589 count = 0;
590 else if (count > bin_attr->size - off)
591 count = bin_attr->size - off;
592
593 return pci_write_vpd(dev, off, count, buf);
594}
595
596#ifdef HAVE_PCI_LEGACY
597/**
598 * pci_read_legacy_io - read byte(s) from legacy I/O port space
599 * @filp: open sysfs file
600 * @kobj: kobject corresponding to file to read from
601 * @bin_attr: struct bin_attribute for this file
602 * @buf: buffer to store results
603 * @off: offset into legacy I/O port space
604 * @count: number of bytes to read
605 *
606 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
607 * callback routine (pci_legacy_read).
608 */
609static ssize_t
610pci_read_legacy_io(struct file *filp, struct kobject *kobj,
611 struct bin_attribute *bin_attr,
612 char *buf, loff_t off, size_t count)
613{
614 struct pci_bus *bus = to_pci_bus(container_of(kobj,
615 struct device,
616 kobj));
617
618 /* Only support 1, 2 or 4 byte accesses */
619 if (count != 1 && count != 2 && count != 4)
620 return -EINVAL;
621
622 return pci_legacy_read(bus, off, (u32 *)buf, count);
623}
624
625/**
626 * pci_write_legacy_io - write byte(s) to legacy I/O port space
627 * @filp: open sysfs file
628 * @kobj: kobject corresponding to file to read from
629 * @bin_attr: struct bin_attribute for this file
630 * @buf: buffer containing value to be written
631 * @off: offset into legacy I/O port space
632 * @count: number of bytes to write
633 *
634 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
635 * callback routine (pci_legacy_write).
636 */
637static ssize_t
638pci_write_legacy_io(struct file *filp, struct kobject *kobj,
639 struct bin_attribute *bin_attr,
640 char *buf, loff_t off, size_t count)
641{
642 struct pci_bus *bus = to_pci_bus(container_of(kobj,
643 struct device,
644 kobj));
645 /* Only support 1, 2 or 4 byte accesses */
646 if (count != 1 && count != 2 && count != 4)
647 return -EINVAL;
648
649 return pci_legacy_write(bus, off, *(u32 *)buf, count);
650}
651
652/**
653 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
654 * @filp: open sysfs file
655 * @kobj: kobject corresponding to device to be mapped
656 * @attr: struct bin_attribute for this file
657 * @vma: struct vm_area_struct passed to mmap
658 *
659 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
660 * legacy memory space (first meg of bus space) into application virtual
661 * memory space.
662 */
663static int
664pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
665 struct bin_attribute *attr,
666 struct vm_area_struct *vma)
667{
668 struct pci_bus *bus = to_pci_bus(container_of(kobj,
669 struct device,
670 kobj));
671
672 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
673}
674
675/**
676 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
677 * @filp: open sysfs file
678 * @kobj: kobject corresponding to device to be mapped
679 * @attr: struct bin_attribute for this file
680 * @vma: struct vm_area_struct passed to mmap
681 *
682 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
683 * legacy IO space (first meg of bus space) into application virtual
684 * memory space. Returns -ENOSYS if the operation isn't supported
685 */
686static int
687pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
688 struct bin_attribute *attr,
689 struct vm_area_struct *vma)
690{
691 struct pci_bus *bus = to_pci_bus(container_of(kobj,
692 struct device,
693 kobj));
694
695 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
696}
697
698/**
699 * pci_adjust_legacy_attr - adjustment of legacy file attributes
700 * @b: bus to create files under
701 * @mmap_type: I/O port or memory
702 *
703 * Stub implementation. Can be overridden by arch if necessary.
704 */
705void __weak
706pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
707{
708 return;
709}
710
711/**
712 * pci_create_legacy_files - create legacy I/O port and memory files
713 * @b: bus to create files under
714 *
715 * Some platforms allow access to legacy I/O port and ISA memory space on
716 * a per-bus basis. This routine creates the files and ties them into
717 * their associated read, write and mmap files from pci-sysfs.c
718 *
719 * On error unwind, but don't propagate the error to the caller
720 * as it is ok to set up the PCI bus without these files.
721 */
722void pci_create_legacy_files(struct pci_bus *b)
723{
724 int error;
725
726 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
727 GFP_ATOMIC);
728 if (!b->legacy_io)
729 goto kzalloc_err;
730
731 sysfs_bin_attr_init(b->legacy_io);
732 b->legacy_io->attr.name = "legacy_io";
733 b->legacy_io->size = 0xffff;
734 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
735 b->legacy_io->read = pci_read_legacy_io;
736 b->legacy_io->write = pci_write_legacy_io;
737 b->legacy_io->mmap = pci_mmap_legacy_io;
738 pci_adjust_legacy_attr(b, pci_mmap_io);
739 error = device_create_bin_file(&b->dev, b->legacy_io);
740 if (error)
741 goto legacy_io_err;
742
743 /* Allocated above after the legacy_io struct */
744 b->legacy_mem = b->legacy_io + 1;
745 sysfs_bin_attr_init(b->legacy_mem);
746 b->legacy_mem->attr.name = "legacy_mem";
747 b->legacy_mem->size = 1024*1024;
748 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
749 b->legacy_mem->mmap = pci_mmap_legacy_mem;
750 pci_adjust_legacy_attr(b, pci_mmap_mem);
751 error = device_create_bin_file(&b->dev, b->legacy_mem);
752 if (error)
753 goto legacy_mem_err;
754
755 return;
756
757legacy_mem_err:
758 device_remove_bin_file(&b->dev, b->legacy_io);
759legacy_io_err:
760 kfree(b->legacy_io);
761 b->legacy_io = NULL;
762kzalloc_err:
763 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
764 "and ISA memory resources to sysfs\n");
765 return;
766}
767
768void pci_remove_legacy_files(struct pci_bus *b)
769{
770 if (b->legacy_io) {
771 device_remove_bin_file(&b->dev, b->legacy_io);
772 device_remove_bin_file(&b->dev, b->legacy_mem);
773 kfree(b->legacy_io); /* both are allocated here */
774 }
775}
776#endif /* HAVE_PCI_LEGACY */
777
778#ifdef HAVE_PCI_MMAP
779
780int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
781 enum pci_mmap_api mmap_api)
782{
783 unsigned long nr, start, size, pci_start;
784
785 if (pci_resource_len(pdev, resno) == 0)
786 return 0;
787 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
788 start = vma->vm_pgoff;
789 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
790 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
791 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
792 if (start >= pci_start && start < pci_start + size &&
793 start + nr <= pci_start + size)
794 return 1;
795 return 0;
796}
797
798/**
799 * pci_mmap_resource - map a PCI resource into user memory space
800 * @kobj: kobject for mapping
801 * @attr: struct bin_attribute for the file being mapped
802 * @vma: struct vm_area_struct passed into the mmap
803 * @write_combine: 1 for write_combine mapping
804 *
805 * Use the regular PCI mapping routines to map a PCI resource into userspace.
806 */
807static int
808pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
809 struct vm_area_struct *vma, int write_combine)
810{
811 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
812 struct device, kobj));
813 struct resource *res = attr->private;
814 enum pci_mmap_state mmap_type;
815 resource_size_t start, end;
816 int i;
817
818 for (i = 0; i < PCI_ROM_RESOURCE; i++)
819 if (res == &pdev->resource[i])
820 break;
821 if (i >= PCI_ROM_RESOURCE)
822 return -ENODEV;
823
824 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
825 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
826 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
827 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
828 pci_name(pdev), i,
829 (u64)pci_resource_start(pdev, i),
830 (u64)pci_resource_len(pdev, i));
831 return -EINVAL;
832 }
833
834 /* pci_mmap_page_range() expects the same kind of entry as coming
835 * from /proc/bus/pci/ which is a "user visible" value. If this is
836 * different from the resource itself, arch will do necessary fixup.
837 */
838 pci_resource_to_user(pdev, i, res, &start, &end);
839 vma->vm_pgoff += start >> PAGE_SHIFT;
840 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
841
842 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
843 return -EINVAL;
844
845 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
846}
847
848static int
849pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
850 struct bin_attribute *attr,
851 struct vm_area_struct *vma)
852{
853 return pci_mmap_resource(kobj, attr, vma, 0);
854}
855
856static int
857pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
858 struct bin_attribute *attr,
859 struct vm_area_struct *vma)
860{
861 return pci_mmap_resource(kobj, attr, vma, 1);
862}
863
864static ssize_t
865pci_resource_io(struct file *filp, struct kobject *kobj,
866 struct bin_attribute *attr, char *buf,
867 loff_t off, size_t count, bool write)
868{
869 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
870 struct device, kobj));
871 struct resource *res = attr->private;
872 unsigned long port = off;
873 int i;
874
875 for (i = 0; i < PCI_ROM_RESOURCE; i++)
876 if (res == &pdev->resource[i])
877 break;
878 if (i >= PCI_ROM_RESOURCE)
879 return -ENODEV;
880
881 port += pci_resource_start(pdev, i);
882
883 if (port > pci_resource_end(pdev, i))
884 return 0;
885
886 if (port + count - 1 > pci_resource_end(pdev, i))
887 return -EINVAL;
888
889 switch (count) {
890 case 1:
891 if (write)
892 outb(*(u8 *)buf, port);
893 else
894 *(u8 *)buf = inb(port);
895 return 1;
896 case 2:
897 if (write)
898 outw(*(u16 *)buf, port);
899 else
900 *(u16 *)buf = inw(port);
901 return 2;
902 case 4:
903 if (write)
904 outl(*(u32 *)buf, port);
905 else
906 *(u32 *)buf = inl(port);
907 return 4;
908 }
909 return -EINVAL;
910}
911
912static ssize_t
913pci_read_resource_io(struct file *filp, struct kobject *kobj,
914 struct bin_attribute *attr, char *buf,
915 loff_t off, size_t count)
916{
917 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
918}
919
920static ssize_t
921pci_write_resource_io(struct file *filp, struct kobject *kobj,
922 struct bin_attribute *attr, char *buf,
923 loff_t off, size_t count)
924{
925 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
926}
927
928/**
929 * pci_remove_resource_files - cleanup resource files
930 * @pdev: dev to cleanup
931 *
932 * If we created resource files for @pdev, remove them from sysfs and
933 * free their resources.
934 */
935static void
936pci_remove_resource_files(struct pci_dev *pdev)
937{
938 int i;
939
940 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
941 struct bin_attribute *res_attr;
942
943 res_attr = pdev->res_attr[i];
944 if (res_attr) {
945 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
946 kfree(res_attr);
947 }
948
949 res_attr = pdev->res_attr_wc[i];
950 if (res_attr) {
951 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
952 kfree(res_attr);
953 }
954 }
955}
956
957static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
958{
959 /* allocate attribute structure, piggyback attribute name */
960 int name_len = write_combine ? 13 : 10;
961 struct bin_attribute *res_attr;
962 int retval;
963
964 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
965 if (res_attr) {
966 char *res_attr_name = (char *)(res_attr + 1);
967
968 sysfs_bin_attr_init(res_attr);
969 if (write_combine) {
970 pdev->res_attr_wc[num] = res_attr;
971 sprintf(res_attr_name, "resource%d_wc", num);
972 res_attr->mmap = pci_mmap_resource_wc;
973 } else {
974 pdev->res_attr[num] = res_attr;
975 sprintf(res_attr_name, "resource%d", num);
976 res_attr->mmap = pci_mmap_resource_uc;
977 }
978 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
979 res_attr->read = pci_read_resource_io;
980 res_attr->write = pci_write_resource_io;
981 }
982 res_attr->attr.name = res_attr_name;
983 res_attr->attr.mode = S_IRUSR | S_IWUSR;
984 res_attr->size = pci_resource_len(pdev, num);
985 res_attr->private = &pdev->resource[num];
986 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
987 } else
988 retval = -ENOMEM;
989
990 return retval;
991}
992
993/**
994 * pci_create_resource_files - create resource files in sysfs for @dev
995 * @pdev: dev in question
996 *
997 * Walk the resources in @pdev creating files for each resource available.
998 */
999static int pci_create_resource_files(struct pci_dev *pdev)
1000{
1001 int i;
1002 int retval;
1003
1004 /* Expose the PCI resources from this device as files */
1005 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1006
1007 /* skip empty resources */
1008 if (!pci_resource_len(pdev, i))
1009 continue;
1010
1011 retval = pci_create_attr(pdev, i, 0);
1012 /* for prefetchable resources, create a WC mappable file */
1013 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1014 retval = pci_create_attr(pdev, i, 1);
1015
1016 if (retval) {
1017 pci_remove_resource_files(pdev);
1018 return retval;
1019 }
1020 }
1021 return 0;
1022}
1023#else /* !HAVE_PCI_MMAP */
1024int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1025void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1026#endif /* HAVE_PCI_MMAP */
1027
1028/**
1029 * pci_write_rom - used to enable access to the PCI ROM display
1030 * @filp: sysfs file
1031 * @kobj: kernel object handle
1032 * @bin_attr: struct bin_attribute for this file
1033 * @buf: user input
1034 * @off: file offset
1035 * @count: number of byte in input
1036 *
1037 * writing anything except 0 enables it
1038 */
1039static ssize_t
1040pci_write_rom(struct file *filp, struct kobject *kobj,
1041 struct bin_attribute *bin_attr,
1042 char *buf, loff_t off, size_t count)
1043{
1044 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1045
1046 if ((off == 0) && (*buf == '0') && (count == 2))
1047 pdev->rom_attr_enabled = 0;
1048 else
1049 pdev->rom_attr_enabled = 1;
1050
1051 return count;
1052}
1053
1054/**
1055 * pci_read_rom - read a PCI ROM
1056 * @filp: sysfs file
1057 * @kobj: kernel object handle
1058 * @bin_attr: struct bin_attribute for this file
1059 * @buf: where to put the data we read from the ROM
1060 * @off: file offset
1061 * @count: number of bytes to read
1062 *
1063 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1064 * device corresponding to @kobj.
1065 */
1066static ssize_t
1067pci_read_rom(struct file *filp, struct kobject *kobj,
1068 struct bin_attribute *bin_attr,
1069 char *buf, loff_t off, size_t count)
1070{
1071 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1072 void __iomem *rom;
1073 size_t size;
1074
1075 if (!pdev->rom_attr_enabled)
1076 return -EINVAL;
1077
1078 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1079 if (!rom || !size)
1080 return -EIO;
1081
1082 if (off >= size)
1083 count = 0;
1084 else {
1085 if (off + count > size)
1086 count = size - off;
1087
1088 memcpy_fromio(buf, rom + off, count);
1089 }
1090 pci_unmap_rom(pdev, rom);
1091
1092 return count;
1093}
1094
1095static struct bin_attribute pci_config_attr = {
1096 .attr = {
1097 .name = "config",
1098 .mode = S_IRUGO | S_IWUSR,
1099 },
1100 .size = PCI_CFG_SPACE_SIZE,
1101 .read = pci_read_config,
1102 .write = pci_write_config,
1103};
1104
1105static struct bin_attribute pcie_config_attr = {
1106 .attr = {
1107 .name = "config",
1108 .mode = S_IRUGO | S_IWUSR,
1109 },
1110 .size = PCI_CFG_SPACE_EXP_SIZE,
1111 .read = pci_read_config,
1112 .write = pci_write_config,
1113};
1114
1115int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
1116{
1117 return 0;
1118}
1119
1120static ssize_t reset_store(struct device *dev,
1121 struct device_attribute *attr, const char *buf,
1122 size_t count)
1123{
1124 struct pci_dev *pdev = to_pci_dev(dev);
1125 unsigned long val;
1126 ssize_t result = strict_strtoul(buf, 0, &val);
1127
1128 if (result < 0)
1129 return result;
1130
1131 if (val != 1)
1132 return -EINVAL;
1133
1134 result = pci_reset_function(pdev);
1135 if (result < 0)
1136 return result;
1137
1138 return count;
1139}
1140
1141static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1142
1143static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1144{
1145 int retval;
1146 struct bin_attribute *attr;
1147
1148 /* If the device has VPD, try to expose it in sysfs. */
1149 if (dev->vpd) {
1150 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1151 if (!attr)
1152 return -ENOMEM;
1153
1154 sysfs_bin_attr_init(attr);
1155 attr->size = dev->vpd->len;
1156 attr->attr.name = "vpd";
1157 attr->attr.mode = S_IRUSR | S_IWUSR;
1158 attr->read = read_vpd_attr;
1159 attr->write = write_vpd_attr;
1160 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1161 if (retval) {
1162 kfree(attr);
1163 return retval;
1164 }
1165 dev->vpd->attr = attr;
1166 }
1167
1168 /* Active State Power Management */
1169 pcie_aspm_create_sysfs_dev_files(dev);
1170
1171 if (!pci_probe_reset_function(dev)) {
1172 retval = device_create_file(&dev->dev, &reset_attr);
1173 if (retval)
1174 goto error;
1175 dev->reset_fn = 1;
1176 }
1177 return 0;
1178
1179error:
1180 pcie_aspm_remove_sysfs_dev_files(dev);
1181 if (dev->vpd && dev->vpd->attr) {
1182 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1183 kfree(dev->vpd->attr);
1184 }
1185
1186 return retval;
1187}
1188
1189int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1190{
1191 int retval;
1192 int rom_size = 0;
1193 struct bin_attribute *attr;
1194
1195 if (!sysfs_initialized)
1196 return -EACCES;
1197
1198 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1199 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1200 else
1201 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1202 if (retval)
1203 goto err;
1204
1205 retval = pci_create_resource_files(pdev);
1206 if (retval)
1207 goto err_config_file;
1208
1209 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1210 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1211 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1212 rom_size = 0x20000;
1213
1214 /* If the device has a ROM, try to expose it in sysfs. */
1215 if (rom_size) {
1216 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1217 if (!attr) {
1218 retval = -ENOMEM;
1219 goto err_resource_files;
1220 }
1221 sysfs_bin_attr_init(attr);
1222 attr->size = rom_size;
1223 attr->attr.name = "rom";
1224 attr->attr.mode = S_IRUSR | S_IWUSR;
1225 attr->read = pci_read_rom;
1226 attr->write = pci_write_rom;
1227 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1228 if (retval) {
1229 kfree(attr);
1230 goto err_resource_files;
1231 }
1232 pdev->rom_attr = attr;
1233 }
1234
1235 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1236 retval = device_create_file(&pdev->dev, &vga_attr);
1237 if (retval)
1238 goto err_rom_file;
1239 }
1240
1241 /* add platform-specific attributes */
1242 retval = pcibios_add_platform_entries(pdev);
1243 if (retval)
1244 goto err_vga_file;
1245
1246 /* add sysfs entries for various capabilities */
1247 retval = pci_create_capabilities_sysfs(pdev);
1248 if (retval)
1249 goto err_vga_file;
1250
1251 pci_create_firmware_label_files(pdev);
1252
1253 return 0;
1254
1255err_vga_file:
1256 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1257 device_remove_file(&pdev->dev, &vga_attr);
1258err_rom_file:
1259 if (rom_size) {
1260 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1261 kfree(pdev->rom_attr);
1262 pdev->rom_attr = NULL;
1263 }
1264err_resource_files:
1265 pci_remove_resource_files(pdev);
1266err_config_file:
1267 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1268 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1269 else
1270 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1271err:
1272 return retval;
1273}
1274
1275static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1276{
1277 if (dev->vpd && dev->vpd->attr) {
1278 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1279 kfree(dev->vpd->attr);
1280 }
1281
1282 pcie_aspm_remove_sysfs_dev_files(dev);
1283 if (dev->reset_fn) {
1284 device_remove_file(&dev->dev, &reset_attr);
1285 dev->reset_fn = 0;
1286 }
1287}
1288
1289/**
1290 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1291 * @pdev: device whose entries we should free
1292 *
1293 * Cleanup when @pdev is removed from sysfs.
1294 */
1295void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1296{
1297 int rom_size = 0;
1298
1299 if (!sysfs_initialized)
1300 return;
1301
1302 pci_remove_capabilities_sysfs(pdev);
1303
1304 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1305 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1306 else
1307 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1308
1309 pci_remove_resource_files(pdev);
1310
1311 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1312 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1313 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1314 rom_size = 0x20000;
1315
1316 if (rom_size && pdev->rom_attr) {
1317 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1318 kfree(pdev->rom_attr);
1319 }
1320
1321 pci_remove_firmware_label_files(pdev);
1322
1323}
1324
1325static int __init pci_sysfs_init(void)
1326{
1327 struct pci_dev *pdev = NULL;
1328 int retval;
1329
1330 sysfs_initialized = 1;
1331 for_each_pci_dev(pdev) {
1332 retval = pci_create_sysfs_dev_files(pdev);
1333 if (retval) {
1334 pci_dev_put(pdev);
1335 return retval;
1336 }
1337 }
1338
1339 return 0;
1340}
1341
1342late_initcall(pci_sysfs_init);