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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static DEVICE_ATTR_WO(dev_rescan);
468
469static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473
474 if (kstrtoul(buf, 0, &val) < 0)
475 return -EINVAL;
476
477 if (val && device_remove_file_self(dev, attr))
478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 return count;
480}
481static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 remove_store);
483
484static ssize_t bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503}
504static DEVICE_ATTR_WO(bus_rescan);
505
506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533}
534static DEVICE_ATTR_RW(d3cold_allowed);
535#endif
536
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
551static ssize_t driver_override_store(struct device *dev,
552 struct device_attribute *attr,
553 const char *buf, size_t count)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 char *driver_override, *old, *cp;
557
558 /* We need to keep extra room for a newline */
559 if (count >= (PAGE_SIZE - 1))
560 return -EINVAL;
561
562 driver_override = kstrndup(buf, count, GFP_KERNEL);
563 if (!driver_override)
564 return -ENOMEM;
565
566 cp = strchr(driver_override, '\n');
567 if (cp)
568 *cp = '\0';
569
570 device_lock(dev);
571 old = pdev->driver_override;
572 if (strlen(driver_override)) {
573 pdev->driver_override = driver_override;
574 } else {
575 kfree(driver_override);
576 pdev->driver_override = NULL;
577 }
578 device_unlock(dev);
579
580 kfree(old);
581
582 return count;
583}
584
585static ssize_t driver_override_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589 ssize_t len;
590
591 device_lock(dev);
592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 device_unlock(dev);
594 return len;
595}
596static DEVICE_ATTR_RW(driver_override);
597
598static struct attribute *pci_dev_attrs[] = {
599 &dev_attr_resource.attr,
600 &dev_attr_vendor.attr,
601 &dev_attr_device.attr,
602 &dev_attr_subsystem_vendor.attr,
603 &dev_attr_subsystem_device.attr,
604 &dev_attr_revision.attr,
605 &dev_attr_class.attr,
606 &dev_attr_irq.attr,
607 &dev_attr_local_cpus.attr,
608 &dev_attr_local_cpulist.attr,
609 &dev_attr_modalias.attr,
610#ifdef CONFIG_NUMA
611 &dev_attr_numa_node.attr,
612#endif
613 &dev_attr_dma_mask_bits.attr,
614 &dev_attr_consistent_dma_mask_bits.attr,
615 &dev_attr_enable.attr,
616 &dev_attr_broken_parity_status.attr,
617 &dev_attr_msi_bus.attr,
618#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 &dev_attr_d3cold_allowed.attr,
620#endif
621#ifdef CONFIG_OF
622 &dev_attr_devspec.attr,
623#endif
624 &dev_attr_driver_override.attr,
625 &dev_attr_ari_enabled.attr,
626 NULL,
627};
628
629static struct attribute *pci_bridge_attrs[] = {
630 &dev_attr_subordinate_bus_number.attr,
631 &dev_attr_secondary_bus_number.attr,
632 NULL,
633};
634
635static struct attribute *pcie_dev_attrs[] = {
636 &dev_attr_current_link_speed.attr,
637 &dev_attr_current_link_width.attr,
638 &dev_attr_max_link_width.attr,
639 &dev_attr_max_link_speed.attr,
640 NULL,
641};
642
643static struct attribute *pcibus_attrs[] = {
644 &dev_attr_bus_rescan.attr,
645 &dev_attr_cpuaffinity.attr,
646 &dev_attr_cpulistaffinity.attr,
647 NULL,
648};
649
650static const struct attribute_group pcibus_group = {
651 .attrs = pcibus_attrs,
652};
653
654const struct attribute_group *pcibus_groups[] = {
655 &pcibus_group,
656 NULL,
657};
658
659static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663 struct pci_dev *vga_dev = vga_default_device();
664
665 if (vga_dev)
666 return sprintf(buf, "%u\n", (pdev == vga_dev));
667
668 return sprintf(buf, "%u\n",
669 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 IORESOURCE_ROM_SHADOW));
671}
672static DEVICE_ATTR_RO(boot_vga);
673
674static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr, char *buf,
676 loff_t off, size_t count)
677{
678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 unsigned int size = 64;
680 loff_t init_off = off;
681 u8 *data = (u8 *) buf;
682
683 /* Several chips lock up trying to read undefined config space */
684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 size = dev->cfg_size;
686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 size = 128;
688
689 if (off > size)
690 return 0;
691 if (off + count > size) {
692 size -= off;
693 count = size;
694 } else {
695 size = count;
696 }
697
698 pci_config_pm_runtime_get(dev);
699
700 if ((off & 1) && size) {
701 u8 val;
702 pci_user_read_config_byte(dev, off, &val);
703 data[off - init_off] = val;
704 off++;
705 size--;
706 }
707
708 if ((off & 3) && size > 2) {
709 u16 val;
710 pci_user_read_config_word(dev, off, &val);
711 data[off - init_off] = val & 0xff;
712 data[off - init_off + 1] = (val >> 8) & 0xff;
713 off += 2;
714 size -= 2;
715 }
716
717 while (size > 3) {
718 u32 val;
719 pci_user_read_config_dword(dev, off, &val);
720 data[off - init_off] = val & 0xff;
721 data[off - init_off + 1] = (val >> 8) & 0xff;
722 data[off - init_off + 2] = (val >> 16) & 0xff;
723 data[off - init_off + 3] = (val >> 24) & 0xff;
724 off += 4;
725 size -= 4;
726 }
727
728 if (size >= 2) {
729 u16 val;
730 pci_user_read_config_word(dev, off, &val);
731 data[off - init_off] = val & 0xff;
732 data[off - init_off + 1] = (val >> 8) & 0xff;
733 off += 2;
734 size -= 2;
735 }
736
737 if (size > 0) {
738 u8 val;
739 pci_user_read_config_byte(dev, off, &val);
740 data[off - init_off] = val;
741 off++;
742 --size;
743 }
744
745 pci_config_pm_runtime_put(dev);
746
747 return count;
748}
749
750static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 struct bin_attribute *bin_attr, char *buf,
752 loff_t off, size_t count)
753{
754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 unsigned int size = count;
756 loff_t init_off = off;
757 u8 *data = (u8 *) buf;
758 int ret;
759
760 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 if (ret)
762 return ret;
763
764 if (off > dev->cfg_size)
765 return 0;
766 if (off + count > dev->cfg_size) {
767 size = dev->cfg_size - off;
768 count = size;
769 }
770
771 pci_config_pm_runtime_get(dev);
772
773 if ((off & 1) && size) {
774 pci_user_write_config_byte(dev, off, data[off - init_off]);
775 off++;
776 size--;
777 }
778
779 if ((off & 3) && size > 2) {
780 u16 val = data[off - init_off];
781 val |= (u16) data[off - init_off + 1] << 8;
782 pci_user_write_config_word(dev, off, val);
783 off += 2;
784 size -= 2;
785 }
786
787 while (size > 3) {
788 u32 val = data[off - init_off];
789 val |= (u32) data[off - init_off + 1] << 8;
790 val |= (u32) data[off - init_off + 2] << 16;
791 val |= (u32) data[off - init_off + 3] << 24;
792 pci_user_write_config_dword(dev, off, val);
793 off += 4;
794 size -= 4;
795 }
796
797 if (size >= 2) {
798 u16 val = data[off - init_off];
799 val |= (u16) data[off - init_off + 1] << 8;
800 pci_user_write_config_word(dev, off, val);
801 off += 2;
802 size -= 2;
803 }
804
805 if (size) {
806 pci_user_write_config_byte(dev, off, data[off - init_off]);
807 off++;
808 --size;
809 }
810
811 pci_config_pm_runtime_put(dev);
812
813 return count;
814}
815
816#ifdef HAVE_PCI_LEGACY
817/**
818 * pci_read_legacy_io - read byte(s) from legacy I/O port space
819 * @filp: open sysfs file
820 * @kobj: kobject corresponding to file to read from
821 * @bin_attr: struct bin_attribute for this file
822 * @buf: buffer to store results
823 * @off: offset into legacy I/O port space
824 * @count: number of bytes to read
825 *
826 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827 * callback routine (pci_legacy_read).
828 */
829static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 struct bin_attribute *bin_attr, char *buf,
831 loff_t off, size_t count)
832{
833 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834
835 /* Only support 1, 2 or 4 byte accesses */
836 if (count != 1 && count != 2 && count != 4)
837 return -EINVAL;
838
839 return pci_legacy_read(bus, off, (u32 *)buf, count);
840}
841
842/**
843 * pci_write_legacy_io - write byte(s) to legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer containing value to be written
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to write
850 *
851 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_write).
853 */
854static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_write(bus, off, *(u32 *)buf, count);
865}
866
867/**
868 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to device to be mapped
871 * @attr: struct bin_attribute for this file
872 * @vma: struct vm_area_struct passed to mmap
873 *
874 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875 * legacy memory space (first meg of bus space) into application virtual
876 * memory space.
877 */
878static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 struct bin_attribute *attr,
880 struct vm_area_struct *vma)
881{
882 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883
884 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885}
886
887/**
888 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889 * @filp: open sysfs file
890 * @kobj: kobject corresponding to device to be mapped
891 * @attr: struct bin_attribute for this file
892 * @vma: struct vm_area_struct passed to mmap
893 *
894 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895 * legacy IO space (first meg of bus space) into application virtual
896 * memory space. Returns -ENOSYS if the operation isn't supported
897 */
898static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *attr,
900 struct vm_area_struct *vma)
901{
902 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903
904 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905}
906
907/**
908 * pci_adjust_legacy_attr - adjustment of legacy file attributes
909 * @b: bus to create files under
910 * @mmap_type: I/O port or memory
911 *
912 * Stub implementation. Can be overridden by arch if necessary.
913 */
914void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 enum pci_mmap_state mmap_type)
916{
917}
918
919/**
920 * pci_create_legacy_files - create legacy I/O port and memory files
921 * @b: bus to create files under
922 *
923 * Some platforms allow access to legacy I/O port and ISA memory space on
924 * a per-bus basis. This routine creates the files and ties them into
925 * their associated read, write and mmap files from pci-sysfs.c
926 *
927 * On error unwind, but don't propagate the error to the caller
928 * as it is ok to set up the PCI bus without these files.
929 */
930void pci_create_legacy_files(struct pci_bus *b)
931{
932 int error;
933
934 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 GFP_ATOMIC);
936 if (!b->legacy_io)
937 goto kzalloc_err;
938
939 sysfs_bin_attr_init(b->legacy_io);
940 b->legacy_io->attr.name = "legacy_io";
941 b->legacy_io->size = 0xffff;
942 b->legacy_io->attr.mode = 0600;
943 b->legacy_io->read = pci_read_legacy_io;
944 b->legacy_io->write = pci_write_legacy_io;
945 b->legacy_io->mmap = pci_mmap_legacy_io;
946 pci_adjust_legacy_attr(b, pci_mmap_io);
947 error = device_create_bin_file(&b->dev, b->legacy_io);
948 if (error)
949 goto legacy_io_err;
950
951 /* Allocated above after the legacy_io struct */
952 b->legacy_mem = b->legacy_io + 1;
953 sysfs_bin_attr_init(b->legacy_mem);
954 b->legacy_mem->attr.name = "legacy_mem";
955 b->legacy_mem->size = 1024*1024;
956 b->legacy_mem->attr.mode = 0600;
957 b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 pci_adjust_legacy_attr(b, pci_mmap_mem);
959 error = device_create_bin_file(&b->dev, b->legacy_mem);
960 if (error)
961 goto legacy_mem_err;
962
963 return;
964
965legacy_mem_err:
966 device_remove_bin_file(&b->dev, b->legacy_io);
967legacy_io_err:
968 kfree(b->legacy_io);
969 b->legacy_io = NULL;
970kzalloc_err:
971 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972}
973
974void pci_remove_legacy_files(struct pci_bus *b)
975{
976 if (b->legacy_io) {
977 device_remove_bin_file(&b->dev, b->legacy_io);
978 device_remove_bin_file(&b->dev, b->legacy_mem);
979 kfree(b->legacy_io); /* both are allocated here */
980 }
981}
982#endif /* HAVE_PCI_LEGACY */
983
984#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985
986int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 enum pci_mmap_api mmap_api)
988{
989 unsigned long nr, start, size;
990 resource_size_t pci_start = 0, pci_end;
991
992 if (pci_resource_len(pdev, resno) == 0)
993 return 0;
994 nr = vma_pages(vma);
995 start = vma->vm_pgoff;
996 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 if (mmap_api == PCI_MMAP_PROCFS) {
998 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 &pci_start, &pci_end);
1000 pci_start >>= PAGE_SHIFT;
1001 }
1002 if (start >= pci_start && start < pci_start + size &&
1003 start + nr <= pci_start + size)
1004 return 1;
1005 return 0;
1006}
1007
1008/**
1009 * pci_mmap_resource - map a PCI resource into user memory space
1010 * @kobj: kobject for mapping
1011 * @attr: struct bin_attribute for the file being mapped
1012 * @vma: struct vm_area_struct passed into the mmap
1013 * @write_combine: 1 for write_combine mapping
1014 *
1015 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016 */
1017static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 struct vm_area_struct *vma, int write_combine)
1019{
1020 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 int bar = (unsigned long)attr->private;
1022 enum pci_mmap_state mmap_type;
1023 struct resource *res = &pdev->resource[bar];
1024 int ret;
1025
1026 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 if (ret)
1028 return ret;
1029
1030 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 return -EINVAL;
1032
1033 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 return -EINVAL;
1035
1036 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037
1038 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039}
1040
1041static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 0);
1046}
1047
1048static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr,
1050 struct vm_area_struct *vma)
1051{
1052 return pci_mmap_resource(kobj, attr, vma, 1);
1053}
1054
1055static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 struct bin_attribute *attr, char *buf,
1057 loff_t off, size_t count, bool write)
1058{
1059 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 int bar = (unsigned long)attr->private;
1061 unsigned long port = off;
1062
1063 port += pci_resource_start(pdev, bar);
1064
1065 if (port > pci_resource_end(pdev, bar))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, bar))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 int ret;
1106
1107 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 if (ret)
1109 return ret;
1110
1111 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112}
1113
1114/**
1115 * pci_remove_resource_files - cleanup resource files
1116 * @pdev: dev to cleanup
1117 *
1118 * If we created resource files for @pdev, remove them from sysfs and
1119 * free their resources.
1120 */
1121static void pci_remove_resource_files(struct pci_dev *pdev)
1122{
1123 int i;
1124
1125 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1126 struct bin_attribute *res_attr;
1127
1128 res_attr = pdev->res_attr[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133
1134 res_attr = pdev->res_attr_wc[i];
1135 if (res_attr) {
1136 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 kfree(res_attr);
1138 }
1139 }
1140}
1141
1142static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143{
1144 /* allocate attribute structure, piggyback attribute name */
1145 int name_len = write_combine ? 13 : 10;
1146 struct bin_attribute *res_attr;
1147 char *res_attr_name;
1148 int retval;
1149
1150 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 if (!res_attr)
1152 return -ENOMEM;
1153
1154 res_attr_name = (char *)(res_attr + 1);
1155
1156 sysfs_bin_attr_init(res_attr);
1157 if (write_combine) {
1158 pdev->res_attr_wc[num] = res_attr;
1159 sprintf(res_attr_name, "resource%d_wc", num);
1160 res_attr->mmap = pci_mmap_resource_wc;
1161 } else {
1162 pdev->res_attr[num] = res_attr;
1163 sprintf(res_attr_name, "resource%d", num);
1164 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 res_attr->read = pci_read_resource_io;
1166 res_attr->write = pci_write_resource_io;
1167 if (arch_can_pci_mmap_io())
1168 res_attr->mmap = pci_mmap_resource_uc;
1169 } else {
1170 res_attr->mmap = pci_mmap_resource_uc;
1171 }
1172 }
1173 res_attr->attr.name = res_attr_name;
1174 res_attr->attr.mode = 0600;
1175 res_attr->size = pci_resource_len(pdev, num);
1176 res_attr->private = (void *)(unsigned long)num;
1177 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 if (retval)
1179 kfree(res_attr);
1180
1181 return retval;
1182}
1183
1184/**
1185 * pci_create_resource_files - create resource files in sysfs for @dev
1186 * @pdev: dev in question
1187 *
1188 * Walk the resources in @pdev creating files for each resource available.
1189 */
1190static int pci_create_resource_files(struct pci_dev *pdev)
1191{
1192 int i;
1193 int retval;
1194
1195 /* Expose the PCI resources from this device as files */
1196 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1197
1198 /* skip empty resources */
1199 if (!pci_resource_len(pdev, i))
1200 continue;
1201
1202 retval = pci_create_attr(pdev, i, 0);
1203 /* for prefetchable resources, create a WC mappable file */
1204 if (!retval && arch_can_pci_mmap_wc() &&
1205 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 retval = pci_create_attr(pdev, i, 1);
1207 if (retval) {
1208 pci_remove_resource_files(pdev);
1209 return retval;
1210 }
1211 }
1212 return 0;
1213}
1214#else /* !HAVE_PCI_MMAP */
1215int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217#endif /* HAVE_PCI_MMAP */
1218
1219/**
1220 * pci_write_rom - used to enable access to the PCI ROM display
1221 * @filp: sysfs file
1222 * @kobj: kernel object handle
1223 * @bin_attr: struct bin_attribute for this file
1224 * @buf: user input
1225 * @off: file offset
1226 * @count: number of byte in input
1227 *
1228 * writing anything except 0 enables it
1229 */
1230static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 struct bin_attribute *bin_attr, char *buf,
1232 loff_t off, size_t count)
1233{
1234 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235
1236 if ((off == 0) && (*buf == '0') && (count == 2))
1237 pdev->rom_attr_enabled = 0;
1238 else
1239 pdev->rom_attr_enabled = 1;
1240
1241 return count;
1242}
1243
1244/**
1245 * pci_read_rom - read a PCI ROM
1246 * @filp: sysfs file
1247 * @kobj: kernel object handle
1248 * @bin_attr: struct bin_attribute for this file
1249 * @buf: where to put the data we read from the ROM
1250 * @off: file offset
1251 * @count: number of bytes to read
1252 *
1253 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254 * device corresponding to @kobj.
1255 */
1256static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 struct bin_attribute *bin_attr, char *buf,
1258 loff_t off, size_t count)
1259{
1260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 void __iomem *rom;
1262 size_t size;
1263
1264 if (!pdev->rom_attr_enabled)
1265 return -EINVAL;
1266
1267 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1268 if (!rom || !size)
1269 return -EIO;
1270
1271 if (off >= size)
1272 count = 0;
1273 else {
1274 if (off + count > size)
1275 count = size - off;
1276
1277 memcpy_fromio(buf, rom + off, count);
1278 }
1279 pci_unmap_rom(pdev, rom);
1280
1281 return count;
1282}
1283
1284static const struct bin_attribute pci_config_attr = {
1285 .attr = {
1286 .name = "config",
1287 .mode = 0644,
1288 },
1289 .size = PCI_CFG_SPACE_SIZE,
1290 .read = pci_read_config,
1291 .write = pci_write_config,
1292};
1293
1294static const struct bin_attribute pcie_config_attr = {
1295 .attr = {
1296 .name = "config",
1297 .mode = 0644,
1298 },
1299 .size = PCI_CFG_SPACE_EXP_SIZE,
1300 .read = pci_read_config,
1301 .write = pci_write_config,
1302};
1303
1304static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct pci_dev *pdev = to_pci_dev(dev);
1308 unsigned long val;
1309 ssize_t result = kstrtoul(buf, 0, &val);
1310
1311 if (result < 0)
1312 return result;
1313
1314 if (val != 1)
1315 return -EINVAL;
1316
1317 pm_runtime_get_sync(dev);
1318 result = pci_reset_function(pdev);
1319 pm_runtime_put(dev);
1320 if (result < 0)
1321 return result;
1322
1323 return count;
1324}
1325
1326static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327
1328static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329{
1330 int retval;
1331
1332 pcie_vpd_create_sysfs_dev_files(dev);
1333 pcie_aspm_create_sysfs_dev_files(dev);
1334
1335 if (dev->reset_fn) {
1336 retval = device_create_file(&dev->dev, &dev_attr_reset);
1337 if (retval)
1338 goto error;
1339 }
1340 return 0;
1341
1342error:
1343 pcie_aspm_remove_sysfs_dev_files(dev);
1344 pcie_vpd_remove_sysfs_dev_files(dev);
1345 return retval;
1346}
1347
1348int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1349{
1350 int retval;
1351 int rom_size;
1352 struct bin_attribute *attr;
1353
1354 if (!sysfs_initialized)
1355 return -EACCES;
1356
1357 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1358 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1359 else
1360 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1361 if (retval)
1362 goto err;
1363
1364 retval = pci_create_resource_files(pdev);
1365 if (retval)
1366 goto err_config_file;
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
1369 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 if (rom_size) {
1371 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1372 if (!attr) {
1373 retval = -ENOMEM;
1374 goto err_resource_files;
1375 }
1376 sysfs_bin_attr_init(attr);
1377 attr->size = rom_size;
1378 attr->attr.name = "rom";
1379 attr->attr.mode = 0600;
1380 attr->read = pci_read_rom;
1381 attr->write = pci_write_rom;
1382 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1383 if (retval) {
1384 kfree(attr);
1385 goto err_resource_files;
1386 }
1387 pdev->rom_attr = attr;
1388 }
1389
1390 /* add sysfs entries for various capabilities */
1391 retval = pci_create_capabilities_sysfs(pdev);
1392 if (retval)
1393 goto err_rom_file;
1394
1395 pci_create_firmware_label_files(pdev);
1396
1397 return 0;
1398
1399err_rom_file:
1400 if (pdev->rom_attr) {
1401 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1402 kfree(pdev->rom_attr);
1403 pdev->rom_attr = NULL;
1404 }
1405err_resource_files:
1406 pci_remove_resource_files(pdev);
1407err_config_file:
1408 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1410 else
1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1412err:
1413 return retval;
1414}
1415
1416static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1417{
1418 pcie_vpd_remove_sysfs_dev_files(dev);
1419 pcie_aspm_remove_sysfs_dev_files(dev);
1420 if (dev->reset_fn) {
1421 device_remove_file(&dev->dev, &dev_attr_reset);
1422 dev->reset_fn = 0;
1423 }
1424}
1425
1426/**
1427 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1428 * @pdev: device whose entries we should free
1429 *
1430 * Cleanup when @pdev is removed from sysfs.
1431 */
1432void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1433{
1434 if (!sysfs_initialized)
1435 return;
1436
1437 pci_remove_capabilities_sysfs(pdev);
1438
1439 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1440 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1441 else
1442 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1443
1444 pci_remove_resource_files(pdev);
1445
1446 if (pdev->rom_attr) {
1447 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1448 kfree(pdev->rom_attr);
1449 pdev->rom_attr = NULL;
1450 }
1451
1452 pci_remove_firmware_label_files(pdev);
1453}
1454
1455static int __init pci_sysfs_init(void)
1456{
1457 struct pci_dev *pdev = NULL;
1458 int retval;
1459
1460 sysfs_initialized = 1;
1461 for_each_pci_dev(pdev) {
1462 retval = pci_create_sysfs_dev_files(pdev);
1463 if (retval) {
1464 pci_dev_put(pdev);
1465 return retval;
1466 }
1467 }
1468
1469 return 0;
1470}
1471late_initcall(pci_sysfs_init);
1472
1473static struct attribute *pci_dev_dev_attrs[] = {
1474 &dev_attr_boot_vga.attr,
1475 NULL,
1476};
1477
1478static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1479 struct attribute *a, int n)
1480{
1481 struct device *dev = kobj_to_dev(kobj);
1482 struct pci_dev *pdev = to_pci_dev(dev);
1483
1484 if (a == &dev_attr_boot_vga.attr)
1485 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static struct attribute *pci_dev_hp_attrs[] = {
1492 &dev_attr_remove.attr,
1493 &dev_attr_dev_rescan.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (pdev->is_virtfn)
1504 return 0;
1505
1506 return a->mode;
1507}
1508
1509static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1510 struct attribute *a, int n)
1511{
1512 struct device *dev = kobj_to_dev(kobj);
1513 struct pci_dev *pdev = to_pci_dev(dev);
1514
1515 if (pci_is_bridge(pdev))
1516 return a->mode;
1517
1518 return 0;
1519}
1520
1521static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1522 struct attribute *a, int n)
1523{
1524 struct device *dev = kobj_to_dev(kobj);
1525 struct pci_dev *pdev = to_pci_dev(dev);
1526
1527 if (pci_is_pcie(pdev))
1528 return a->mode;
1529
1530 return 0;
1531}
1532
1533static const struct attribute_group pci_dev_group = {
1534 .attrs = pci_dev_attrs,
1535};
1536
1537const struct attribute_group *pci_dev_groups[] = {
1538 &pci_dev_group,
1539 NULL,
1540};
1541
1542static const struct attribute_group pci_bridge_group = {
1543 .attrs = pci_bridge_attrs,
1544};
1545
1546const struct attribute_group *pci_bridge_groups[] = {
1547 &pci_bridge_group,
1548 NULL,
1549};
1550
1551static const struct attribute_group pcie_dev_group = {
1552 .attrs = pcie_dev_attrs,
1553};
1554
1555const struct attribute_group *pcie_dev_groups[] = {
1556 &pcie_dev_group,
1557 NULL,
1558};
1559
1560static const struct attribute_group pci_dev_hp_attr_group = {
1561 .attrs = pci_dev_hp_attrs,
1562 .is_visible = pci_dev_hp_attrs_are_visible,
1563};
1564
1565static const struct attribute_group pci_dev_attr_group = {
1566 .attrs = pci_dev_dev_attrs,
1567 .is_visible = pci_dev_attrs_are_visible,
1568};
1569
1570static const struct attribute_group pci_bridge_attr_group = {
1571 .attrs = pci_bridge_attrs,
1572 .is_visible = pci_bridge_attrs_are_visible,
1573};
1574
1575static const struct attribute_group pcie_dev_attr_group = {
1576 .attrs = pcie_dev_attrs,
1577 .is_visible = pcie_dev_attrs_are_visible,
1578};
1579
1580static const struct attribute_group *pci_dev_attr_groups[] = {
1581 &pci_dev_attr_group,
1582 &pci_dev_hp_attr_group,
1583#ifdef CONFIG_PCI_IOV
1584 &sriov_dev_attr_group,
1585#endif
1586 &pci_bridge_attr_group,
1587 &pcie_dev_attr_group,
1588#ifdef CONFIG_PCIEAER
1589 &aer_stats_attr_group,
1590#endif
1591 NULL,
1592};
1593
1594const struct device_type pci_dev_type = {
1595 .groups = pci_dev_attr_groups,
1596};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15#include <linux/bitfield.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/msi.h>
30#include <linux/of.h>
31#include <linux/aperture.h>
32#include "pci.h"
33
34static int sysfs_initialized; /* = 0 */
35
36/* show configuration fields */
37#define pci_config_attr(field, format_string) \
38static ssize_t \
39field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
40{ \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev(dev); \
44 return sysfs_emit(buf, format_string, pdev->field); \
45} \
46static DEVICE_ATTR_RO(field)
47
48pci_config_attr(vendor, "0x%04x\n");
49pci_config_attr(device, "0x%04x\n");
50pci_config_attr(subsystem_vendor, "0x%04x\n");
51pci_config_attr(subsystem_device, "0x%04x\n");
52pci_config_attr(revision, "0x%02x\n");
53pci_config_attr(class, "0x%06x\n");
54
55static ssize_t irq_show(struct device *dev,
56 struct device_attribute *attr,
57 char *buf)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60
61#ifdef CONFIG_PCI_MSI
62 /*
63 * For MSI, show the first MSI IRQ; for all other cases including
64 * MSI-X, show the legacy INTx IRQ.
65 */
66 if (pdev->msi_enabled)
67 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
68#endif
69
70 return sysfs_emit(buf, "%u\n", pdev->irq);
71}
72static DEVICE_ATTR_RO(irq);
73
74static ssize_t broken_parity_status_show(struct device *dev,
75 struct device_attribute *attr,
76 char *buf)
77{
78 struct pci_dev *pdev = to_pci_dev(dev);
79 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
80}
81
82static ssize_t broken_parity_status_store(struct device *dev,
83 struct device_attribute *attr,
84 const char *buf, size_t count)
85{
86 struct pci_dev *pdev = to_pci_dev(dev);
87 unsigned long val;
88
89 if (kstrtoul(buf, 0, &val) < 0)
90 return -EINVAL;
91
92 pdev->broken_parity_status = !!val;
93
94 return count;
95}
96static DEVICE_ATTR_RW(broken_parity_status);
97
98static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
99 struct device_attribute *attr, char *buf)
100{
101 const struct cpumask *mask;
102
103#ifdef CONFIG_NUMA
104 if (dev_to_node(dev) == NUMA_NO_NODE)
105 mask = cpu_online_mask;
106 else
107 mask = cpumask_of_node(dev_to_node(dev));
108#else
109 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
110#endif
111 return cpumap_print_to_pagebuf(list, buf, mask);
112}
113
114static ssize_t local_cpus_show(struct device *dev,
115 struct device_attribute *attr, char *buf)
116{
117 return pci_dev_show_local_cpu(dev, false, attr, buf);
118}
119static DEVICE_ATTR_RO(local_cpus);
120
121static ssize_t local_cpulist_show(struct device *dev,
122 struct device_attribute *attr, char *buf)
123{
124 return pci_dev_show_local_cpu(dev, true, attr, buf);
125}
126static DEVICE_ATTR_RO(local_cpulist);
127
128/*
129 * PCI Bus Class Devices
130 */
131static ssize_t cpuaffinity_show(struct device *dev,
132 struct device_attribute *attr, char *buf)
133{
134 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
135
136 return cpumap_print_to_pagebuf(false, buf, cpumask);
137}
138static DEVICE_ATTR_RO(cpuaffinity);
139
140static ssize_t cpulistaffinity_show(struct device *dev,
141 struct device_attribute *attr, char *buf)
142{
143 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
144
145 return cpumap_print_to_pagebuf(true, buf, cpumask);
146}
147static DEVICE_ATTR_RO(cpulistaffinity);
148
149static ssize_t power_state_show(struct device *dev,
150 struct device_attribute *attr, char *buf)
151{
152 struct pci_dev *pdev = to_pci_dev(dev);
153
154 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
155}
156static DEVICE_ATTR_RO(power_state);
157
158/* show resources */
159static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
160 char *buf)
161{
162 struct pci_dev *pci_dev = to_pci_dev(dev);
163 int i;
164 int max;
165 resource_size_t start, end;
166 size_t len = 0;
167
168 if (pci_dev->subordinate)
169 max = DEVICE_COUNT_RESOURCE;
170 else
171 max = PCI_BRIDGE_RESOURCES;
172
173 for (i = 0; i < max; i++) {
174 struct resource *res = &pci_dev->resource[i];
175 pci_resource_to_user(pci_dev, i, res, &start, &end);
176 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
177 (unsigned long long)start,
178 (unsigned long long)end,
179 (unsigned long long)res->flags);
180 }
181 return len;
182}
183static DEVICE_ATTR_RO(resource);
184
185static ssize_t max_link_speed_show(struct device *dev,
186 struct device_attribute *attr, char *buf)
187{
188 struct pci_dev *pdev = to_pci_dev(dev);
189
190 return sysfs_emit(buf, "%s\n",
191 pci_speed_string(pcie_get_speed_cap(pdev)));
192}
193static DEVICE_ATTR_RO(max_link_speed);
194
195static ssize_t max_link_width_show(struct device *dev,
196 struct device_attribute *attr, char *buf)
197{
198 struct pci_dev *pdev = to_pci_dev(dev);
199
200 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
201}
202static DEVICE_ATTR_RO(max_link_width);
203
204static ssize_t current_link_speed_show(struct device *dev,
205 struct device_attribute *attr, char *buf)
206{
207 struct pci_dev *pci_dev = to_pci_dev(dev);
208 u16 linkstat;
209 int err;
210 enum pci_bus_speed speed;
211
212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
213 if (err)
214 return -EINVAL;
215
216 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
217
218 return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
219}
220static DEVICE_ATTR_RO(current_link_speed);
221
222static ssize_t current_link_width_show(struct device *dev,
223 struct device_attribute *attr, char *buf)
224{
225 struct pci_dev *pci_dev = to_pci_dev(dev);
226 u16 linkstat;
227 int err;
228
229 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
230 if (err)
231 return -EINVAL;
232
233 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
234}
235static DEVICE_ATTR_RO(current_link_width);
236
237static ssize_t secondary_bus_number_show(struct device *dev,
238 struct device_attribute *attr,
239 char *buf)
240{
241 struct pci_dev *pci_dev = to_pci_dev(dev);
242 u8 sec_bus;
243 int err;
244
245 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
246 if (err)
247 return -EINVAL;
248
249 return sysfs_emit(buf, "%u\n", sec_bus);
250}
251static DEVICE_ATTR_RO(secondary_bus_number);
252
253static ssize_t subordinate_bus_number_show(struct device *dev,
254 struct device_attribute *attr,
255 char *buf)
256{
257 struct pci_dev *pci_dev = to_pci_dev(dev);
258 u8 sub_bus;
259 int err;
260
261 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
262 if (err)
263 return -EINVAL;
264
265 return sysfs_emit(buf, "%u\n", sub_bus);
266}
267static DEVICE_ATTR_RO(subordinate_bus_number);
268
269static ssize_t ari_enabled_show(struct device *dev,
270 struct device_attribute *attr,
271 char *buf)
272{
273 struct pci_dev *pci_dev = to_pci_dev(dev);
274
275 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
276}
277static DEVICE_ATTR_RO(ari_enabled);
278
279static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
280 char *buf)
281{
282 struct pci_dev *pci_dev = to_pci_dev(dev);
283
284 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
285 pci_dev->vendor, pci_dev->device,
286 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
287 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
288 (u8)(pci_dev->class));
289}
290static DEVICE_ATTR_RO(modalias);
291
292static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
293 const char *buf, size_t count)
294{
295 struct pci_dev *pdev = to_pci_dev(dev);
296 unsigned long val;
297 ssize_t result = 0;
298
299 /* this can crash the machine when done on the "wrong" device */
300 if (!capable(CAP_SYS_ADMIN))
301 return -EPERM;
302
303 if (kstrtoul(buf, 0, &val) < 0)
304 return -EINVAL;
305
306 device_lock(dev);
307 if (dev->driver)
308 result = -EBUSY;
309 else if (val)
310 result = pci_enable_device(pdev);
311 else if (pci_is_enabled(pdev))
312 pci_disable_device(pdev);
313 else
314 result = -EIO;
315 device_unlock(dev);
316
317 return result < 0 ? result : count;
318}
319
320static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
321 char *buf)
322{
323 struct pci_dev *pdev;
324
325 pdev = to_pci_dev(dev);
326 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
327}
328static DEVICE_ATTR_RW(enable);
329
330#ifdef CONFIG_NUMA
331static ssize_t numa_node_store(struct device *dev,
332 struct device_attribute *attr, const char *buf,
333 size_t count)
334{
335 struct pci_dev *pdev = to_pci_dev(dev);
336 int node;
337
338 if (!capable(CAP_SYS_ADMIN))
339 return -EPERM;
340
341 if (kstrtoint(buf, 0, &node) < 0)
342 return -EINVAL;
343
344 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
345 return -EINVAL;
346
347 if (node != NUMA_NO_NODE && !node_online(node))
348 return -EINVAL;
349
350 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
351 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
352 node);
353
354 dev->numa_node = node;
355 return count;
356}
357
358static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
359 char *buf)
360{
361 return sysfs_emit(buf, "%d\n", dev->numa_node);
362}
363static DEVICE_ATTR_RW(numa_node);
364#endif
365
366static ssize_t dma_mask_bits_show(struct device *dev,
367 struct device_attribute *attr, char *buf)
368{
369 struct pci_dev *pdev = to_pci_dev(dev);
370
371 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
372}
373static DEVICE_ATTR_RO(dma_mask_bits);
374
375static ssize_t consistent_dma_mask_bits_show(struct device *dev,
376 struct device_attribute *attr,
377 char *buf)
378{
379 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
380}
381static DEVICE_ATTR_RO(consistent_dma_mask_bits);
382
383static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
384 char *buf)
385{
386 struct pci_dev *pdev = to_pci_dev(dev);
387 struct pci_bus *subordinate = pdev->subordinate;
388
389 return sysfs_emit(buf, "%u\n", subordinate ?
390 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
391 : !pdev->no_msi);
392}
393
394static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
395 const char *buf, size_t count)
396{
397 struct pci_dev *pdev = to_pci_dev(dev);
398 struct pci_bus *subordinate = pdev->subordinate;
399 unsigned long val;
400
401 if (!capable(CAP_SYS_ADMIN))
402 return -EPERM;
403
404 if (kstrtoul(buf, 0, &val) < 0)
405 return -EINVAL;
406
407 /*
408 * "no_msi" and "bus_flags" only affect what happens when a driver
409 * requests MSI or MSI-X. They don't affect any drivers that have
410 * already requested MSI or MSI-X.
411 */
412 if (!subordinate) {
413 pdev->no_msi = !val;
414 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
415 val ? "allowed" : "disallowed");
416 return count;
417 }
418
419 if (val)
420 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
421 else
422 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
423
424 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
425 val ? "allowed" : "disallowed");
426 return count;
427}
428static DEVICE_ATTR_RW(msi_bus);
429
430static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count)
431{
432 unsigned long val;
433 struct pci_bus *b = NULL;
434
435 if (kstrtoul(buf, 0, &val) < 0)
436 return -EINVAL;
437
438 if (val) {
439 pci_lock_rescan_remove();
440 while ((b = pci_find_next_bus(b)) != NULL)
441 pci_rescan_bus(b);
442 pci_unlock_rescan_remove();
443 }
444 return count;
445}
446static BUS_ATTR_WO(rescan);
447
448static struct attribute *pci_bus_attrs[] = {
449 &bus_attr_rescan.attr,
450 NULL,
451};
452
453static const struct attribute_group pci_bus_group = {
454 .attrs = pci_bus_attrs,
455};
456
457const struct attribute_group *pci_bus_groups[] = {
458 &pci_bus_group,
459 NULL,
460};
461
462static ssize_t dev_rescan_store(struct device *dev,
463 struct device_attribute *attr, const char *buf,
464 size_t count)
465{
466 unsigned long val;
467 struct pci_dev *pdev = to_pci_dev(dev);
468
469 if (kstrtoul(buf, 0, &val) < 0)
470 return -EINVAL;
471
472 if (val) {
473 pci_lock_rescan_remove();
474 pci_rescan_bus(pdev->bus);
475 pci_unlock_rescan_remove();
476 }
477 return count;
478}
479static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
480 dev_rescan_store);
481
482static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
483 const char *buf, size_t count)
484{
485 unsigned long val;
486
487 if (kstrtoul(buf, 0, &val) < 0)
488 return -EINVAL;
489
490 if (val && device_remove_file_self(dev, attr))
491 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
492 return count;
493}
494static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
495 remove_store);
496
497static ssize_t bus_rescan_store(struct device *dev,
498 struct device_attribute *attr,
499 const char *buf, size_t count)
500{
501 unsigned long val;
502 struct pci_bus *bus = to_pci_bus(dev);
503
504 if (kstrtoul(buf, 0, &val) < 0)
505 return -EINVAL;
506
507 if (val) {
508 pci_lock_rescan_remove();
509 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
510 pci_rescan_bus_bridge_resize(bus->self);
511 else
512 pci_rescan_bus(bus);
513 pci_unlock_rescan_remove();
514 }
515 return count;
516}
517static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
518 bus_rescan_store);
519
520#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
521static ssize_t d3cold_allowed_store(struct device *dev,
522 struct device_attribute *attr,
523 const char *buf, size_t count)
524{
525 struct pci_dev *pdev = to_pci_dev(dev);
526 unsigned long val;
527
528 if (kstrtoul(buf, 0, &val) < 0)
529 return -EINVAL;
530
531 pdev->d3cold_allowed = !!val;
532 pci_bridge_d3_update(pdev);
533
534 pm_runtime_resume(dev);
535
536 return count;
537}
538
539static ssize_t d3cold_allowed_show(struct device *dev,
540 struct device_attribute *attr, char *buf)
541{
542 struct pci_dev *pdev = to_pci_dev(dev);
543 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
544}
545static DEVICE_ATTR_RW(d3cold_allowed);
546#endif
547
548#ifdef CONFIG_OF
549static ssize_t devspec_show(struct device *dev,
550 struct device_attribute *attr, char *buf)
551{
552 struct pci_dev *pdev = to_pci_dev(dev);
553 struct device_node *np = pci_device_to_OF_node(pdev);
554
555 if (np == NULL)
556 return 0;
557 return sysfs_emit(buf, "%pOF\n", np);
558}
559static DEVICE_ATTR_RO(devspec);
560#endif
561
562static ssize_t driver_override_store(struct device *dev,
563 struct device_attribute *attr,
564 const char *buf, size_t count)
565{
566 struct pci_dev *pdev = to_pci_dev(dev);
567 int ret;
568
569 ret = driver_set_override(dev, &pdev->driver_override, buf, count);
570 if (ret)
571 return ret;
572
573 return count;
574}
575
576static ssize_t driver_override_show(struct device *dev,
577 struct device_attribute *attr, char *buf)
578{
579 struct pci_dev *pdev = to_pci_dev(dev);
580 ssize_t len;
581
582 device_lock(dev);
583 len = sysfs_emit(buf, "%s\n", pdev->driver_override);
584 device_unlock(dev);
585 return len;
586}
587static DEVICE_ATTR_RW(driver_override);
588
589static struct attribute *pci_dev_attrs[] = {
590 &dev_attr_power_state.attr,
591 &dev_attr_resource.attr,
592 &dev_attr_vendor.attr,
593 &dev_attr_device.attr,
594 &dev_attr_subsystem_vendor.attr,
595 &dev_attr_subsystem_device.attr,
596 &dev_attr_revision.attr,
597 &dev_attr_class.attr,
598 &dev_attr_irq.attr,
599 &dev_attr_local_cpus.attr,
600 &dev_attr_local_cpulist.attr,
601 &dev_attr_modalias.attr,
602#ifdef CONFIG_NUMA
603 &dev_attr_numa_node.attr,
604#endif
605 &dev_attr_dma_mask_bits.attr,
606 &dev_attr_consistent_dma_mask_bits.attr,
607 &dev_attr_enable.attr,
608 &dev_attr_broken_parity_status.attr,
609 &dev_attr_msi_bus.attr,
610#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
611 &dev_attr_d3cold_allowed.attr,
612#endif
613#ifdef CONFIG_OF
614 &dev_attr_devspec.attr,
615#endif
616 &dev_attr_driver_override.attr,
617 &dev_attr_ari_enabled.attr,
618 NULL,
619};
620
621static struct attribute *pci_bridge_attrs[] = {
622 &dev_attr_subordinate_bus_number.attr,
623 &dev_attr_secondary_bus_number.attr,
624 NULL,
625};
626
627static struct attribute *pcie_dev_attrs[] = {
628 &dev_attr_current_link_speed.attr,
629 &dev_attr_current_link_width.attr,
630 &dev_attr_max_link_width.attr,
631 &dev_attr_max_link_speed.attr,
632 NULL,
633};
634
635static struct attribute *pcibus_attrs[] = {
636 &dev_attr_bus_rescan.attr,
637 &dev_attr_cpuaffinity.attr,
638 &dev_attr_cpulistaffinity.attr,
639 NULL,
640};
641
642static const struct attribute_group pcibus_group = {
643 .attrs = pcibus_attrs,
644};
645
646const struct attribute_group *pcibus_groups[] = {
647 &pcibus_group,
648 NULL,
649};
650
651static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
652 char *buf)
653{
654 struct pci_dev *pdev = to_pci_dev(dev);
655 struct pci_dev *vga_dev = vga_default_device();
656
657 if (vga_dev)
658 return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
659
660 return sysfs_emit(buf, "%u\n",
661 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
662 IORESOURCE_ROM_SHADOW));
663}
664static DEVICE_ATTR_RO(boot_vga);
665
666static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
667 struct bin_attribute *bin_attr, char *buf,
668 loff_t off, size_t count)
669{
670 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
671 unsigned int size = 64;
672 loff_t init_off = off;
673 u8 *data = (u8 *) buf;
674
675 /* Several chips lock up trying to read undefined config space */
676 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
677 size = dev->cfg_size;
678 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
679 size = 128;
680
681 if (off > size)
682 return 0;
683 if (off + count > size) {
684 size -= off;
685 count = size;
686 } else {
687 size = count;
688 }
689
690 pci_config_pm_runtime_get(dev);
691
692 if ((off & 1) && size) {
693 u8 val;
694 pci_user_read_config_byte(dev, off, &val);
695 data[off - init_off] = val;
696 off++;
697 size--;
698 }
699
700 if ((off & 3) && size > 2) {
701 u16 val;
702 pci_user_read_config_word(dev, off, &val);
703 data[off - init_off] = val & 0xff;
704 data[off - init_off + 1] = (val >> 8) & 0xff;
705 off += 2;
706 size -= 2;
707 }
708
709 while (size > 3) {
710 u32 val;
711 pci_user_read_config_dword(dev, off, &val);
712 data[off - init_off] = val & 0xff;
713 data[off - init_off + 1] = (val >> 8) & 0xff;
714 data[off - init_off + 2] = (val >> 16) & 0xff;
715 data[off - init_off + 3] = (val >> 24) & 0xff;
716 off += 4;
717 size -= 4;
718 cond_resched();
719 }
720
721 if (size >= 2) {
722 u16 val;
723 pci_user_read_config_word(dev, off, &val);
724 data[off - init_off] = val & 0xff;
725 data[off - init_off + 1] = (val >> 8) & 0xff;
726 off += 2;
727 size -= 2;
728 }
729
730 if (size > 0) {
731 u8 val;
732 pci_user_read_config_byte(dev, off, &val);
733 data[off - init_off] = val;
734 }
735
736 pci_config_pm_runtime_put(dev);
737
738 return count;
739}
740
741static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
742 struct bin_attribute *bin_attr, char *buf,
743 loff_t off, size_t count)
744{
745 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
746 unsigned int size = count;
747 loff_t init_off = off;
748 u8 *data = (u8 *) buf;
749 int ret;
750
751 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
752 if (ret)
753 return ret;
754
755 if (resource_is_exclusive(&dev->driver_exclusive_resource, off,
756 count)) {
757 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",
758 current->comm, off);
759 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
760 }
761
762 if (off > dev->cfg_size)
763 return 0;
764 if (off + count > dev->cfg_size) {
765 size = dev->cfg_size - off;
766 count = size;
767 }
768
769 pci_config_pm_runtime_get(dev);
770
771 if ((off & 1) && size) {
772 pci_user_write_config_byte(dev, off, data[off - init_off]);
773 off++;
774 size--;
775 }
776
777 if ((off & 3) && size > 2) {
778 u16 val = data[off - init_off];
779 val |= (u16) data[off - init_off + 1] << 8;
780 pci_user_write_config_word(dev, off, val);
781 off += 2;
782 size -= 2;
783 }
784
785 while (size > 3) {
786 u32 val = data[off - init_off];
787 val |= (u32) data[off - init_off + 1] << 8;
788 val |= (u32) data[off - init_off + 2] << 16;
789 val |= (u32) data[off - init_off + 3] << 24;
790 pci_user_write_config_dword(dev, off, val);
791 off += 4;
792 size -= 4;
793 }
794
795 if (size >= 2) {
796 u16 val = data[off - init_off];
797 val |= (u16) data[off - init_off + 1] << 8;
798 pci_user_write_config_word(dev, off, val);
799 off += 2;
800 size -= 2;
801 }
802
803 if (size)
804 pci_user_write_config_byte(dev, off, data[off - init_off]);
805
806 pci_config_pm_runtime_put(dev);
807
808 return count;
809}
810static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
811
812static struct bin_attribute *pci_dev_config_attrs[] = {
813 &bin_attr_config,
814 NULL,
815};
816
817static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj,
818 struct bin_attribute *a, int n)
819{
820 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
821
822 a->size = PCI_CFG_SPACE_SIZE;
823 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
824 a->size = PCI_CFG_SPACE_EXP_SIZE;
825
826 return a->attr.mode;
827}
828
829static const struct attribute_group pci_dev_config_attr_group = {
830 .bin_attrs = pci_dev_config_attrs,
831 .is_bin_visible = pci_dev_config_attr_is_visible,
832};
833
834/*
835 * llseek operation for mmappable PCI resources.
836 * May be left unused if the arch doesn't provide them.
837 */
838static __maybe_unused loff_t
839pci_llseek_resource(struct file *filep,
840 struct kobject *kobj __always_unused,
841 struct bin_attribute *attr,
842 loff_t offset, int whence)
843{
844 return fixed_size_llseek(filep, offset, whence, attr->size);
845}
846
847#ifdef HAVE_PCI_LEGACY
848/**
849 * pci_read_legacy_io - read byte(s) from legacy I/O port space
850 * @filp: open sysfs file
851 * @kobj: kobject corresponding to file to read from
852 * @bin_attr: struct bin_attribute for this file
853 * @buf: buffer to store results
854 * @off: offset into legacy I/O port space
855 * @count: number of bytes to read
856 *
857 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
858 * callback routine (pci_legacy_read).
859 */
860static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
861 struct bin_attribute *bin_attr, char *buf,
862 loff_t off, size_t count)
863{
864 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
865
866 /* Only support 1, 2 or 4 byte accesses */
867 if (count != 1 && count != 2 && count != 4)
868 return -EINVAL;
869
870 return pci_legacy_read(bus, off, (u32 *)buf, count);
871}
872
873/**
874 * pci_write_legacy_io - write byte(s) to legacy I/O port space
875 * @filp: open sysfs file
876 * @kobj: kobject corresponding to file to read from
877 * @bin_attr: struct bin_attribute for this file
878 * @buf: buffer containing value to be written
879 * @off: offset into legacy I/O port space
880 * @count: number of bytes to write
881 *
882 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
883 * callback routine (pci_legacy_write).
884 */
885static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
886 struct bin_attribute *bin_attr, char *buf,
887 loff_t off, size_t count)
888{
889 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
890
891 /* Only support 1, 2 or 4 byte accesses */
892 if (count != 1 && count != 2 && count != 4)
893 return -EINVAL;
894
895 return pci_legacy_write(bus, off, *(u32 *)buf, count);
896}
897
898/**
899 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
900 * @filp: open sysfs file
901 * @kobj: kobject corresponding to device to be mapped
902 * @attr: struct bin_attribute for this file
903 * @vma: struct vm_area_struct passed to mmap
904 *
905 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
906 * legacy memory space (first meg of bus space) into application virtual
907 * memory space.
908 */
909static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
910 struct bin_attribute *attr,
911 struct vm_area_struct *vma)
912{
913 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
914
915 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
916}
917
918/**
919 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
920 * @filp: open sysfs file
921 * @kobj: kobject corresponding to device to be mapped
922 * @attr: struct bin_attribute for this file
923 * @vma: struct vm_area_struct passed to mmap
924 *
925 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
926 * legacy IO space (first meg of bus space) into application virtual
927 * memory space. Returns -ENOSYS if the operation isn't supported
928 */
929static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
930 struct bin_attribute *attr,
931 struct vm_area_struct *vma)
932{
933 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
934
935 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
936}
937
938/**
939 * pci_adjust_legacy_attr - adjustment of legacy file attributes
940 * @b: bus to create files under
941 * @mmap_type: I/O port or memory
942 *
943 * Stub implementation. Can be overridden by arch if necessary.
944 */
945void __weak pci_adjust_legacy_attr(struct pci_bus *b,
946 enum pci_mmap_state mmap_type)
947{
948}
949
950/**
951 * pci_create_legacy_files - create legacy I/O port and memory files
952 * @b: bus to create files under
953 *
954 * Some platforms allow access to legacy I/O port and ISA memory space on
955 * a per-bus basis. This routine creates the files and ties them into
956 * their associated read, write and mmap files from pci-sysfs.c
957 *
958 * On error unwind, but don't propagate the error to the caller
959 * as it is ok to set up the PCI bus without these files.
960 */
961void pci_create_legacy_files(struct pci_bus *b)
962{
963 int error;
964
965 if (!sysfs_initialized)
966 return;
967
968 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
969 GFP_ATOMIC);
970 if (!b->legacy_io)
971 goto kzalloc_err;
972
973 sysfs_bin_attr_init(b->legacy_io);
974 b->legacy_io->attr.name = "legacy_io";
975 b->legacy_io->size = 0xffff;
976 b->legacy_io->attr.mode = 0600;
977 b->legacy_io->read = pci_read_legacy_io;
978 b->legacy_io->write = pci_write_legacy_io;
979 /* See pci_create_attr() for motivation */
980 b->legacy_io->llseek = pci_llseek_resource;
981 b->legacy_io->mmap = pci_mmap_legacy_io;
982 b->legacy_io->f_mapping = iomem_get_mapping;
983 pci_adjust_legacy_attr(b, pci_mmap_io);
984 error = device_create_bin_file(&b->dev, b->legacy_io);
985 if (error)
986 goto legacy_io_err;
987
988 /* Allocated above after the legacy_io struct */
989 b->legacy_mem = b->legacy_io + 1;
990 sysfs_bin_attr_init(b->legacy_mem);
991 b->legacy_mem->attr.name = "legacy_mem";
992 b->legacy_mem->size = 1024*1024;
993 b->legacy_mem->attr.mode = 0600;
994 b->legacy_mem->mmap = pci_mmap_legacy_mem;
995 /* See pci_create_attr() for motivation */
996 b->legacy_mem->llseek = pci_llseek_resource;
997 b->legacy_mem->f_mapping = iomem_get_mapping;
998 pci_adjust_legacy_attr(b, pci_mmap_mem);
999 error = device_create_bin_file(&b->dev, b->legacy_mem);
1000 if (error)
1001 goto legacy_mem_err;
1002
1003 return;
1004
1005legacy_mem_err:
1006 device_remove_bin_file(&b->dev, b->legacy_io);
1007legacy_io_err:
1008 kfree(b->legacy_io);
1009 b->legacy_io = NULL;
1010kzalloc_err:
1011 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
1012}
1013
1014void pci_remove_legacy_files(struct pci_bus *b)
1015{
1016 if (b->legacy_io) {
1017 device_remove_bin_file(&b->dev, b->legacy_io);
1018 device_remove_bin_file(&b->dev, b->legacy_mem);
1019 kfree(b->legacy_io); /* both are allocated here */
1020 }
1021}
1022#endif /* HAVE_PCI_LEGACY */
1023
1024#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1025/**
1026 * pci_mmap_resource - map a PCI resource into user memory space
1027 * @kobj: kobject for mapping
1028 * @attr: struct bin_attribute for the file being mapped
1029 * @vma: struct vm_area_struct passed into the mmap
1030 * @write_combine: 1 for write_combine mapping
1031 *
1032 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1033 */
1034static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1035 struct vm_area_struct *vma, int write_combine)
1036{
1037 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1038 int bar = (unsigned long)attr->private;
1039 enum pci_mmap_state mmap_type;
1040 struct resource *res = &pdev->resource[bar];
1041 int ret;
1042
1043 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1044 if (ret)
1045 return ret;
1046
1047 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1048 return -EINVAL;
1049
1050 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1051 return -EINVAL;
1052
1053 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1054
1055 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1056}
1057
1058static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1059 struct bin_attribute *attr,
1060 struct vm_area_struct *vma)
1061{
1062 return pci_mmap_resource(kobj, attr, vma, 0);
1063}
1064
1065static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1066 struct bin_attribute *attr,
1067 struct vm_area_struct *vma)
1068{
1069 return pci_mmap_resource(kobj, attr, vma, 1);
1070}
1071
1072static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1073 struct bin_attribute *attr, char *buf,
1074 loff_t off, size_t count, bool write)
1075{
1076#ifdef CONFIG_HAS_IOPORT
1077 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1078 int bar = (unsigned long)attr->private;
1079 unsigned long port = off;
1080
1081 port += pci_resource_start(pdev, bar);
1082
1083 if (port > pci_resource_end(pdev, bar))
1084 return 0;
1085
1086 if (port + count - 1 > pci_resource_end(pdev, bar))
1087 return -EINVAL;
1088
1089 switch (count) {
1090 case 1:
1091 if (write)
1092 outb(*(u8 *)buf, port);
1093 else
1094 *(u8 *)buf = inb(port);
1095 return 1;
1096 case 2:
1097 if (write)
1098 outw(*(u16 *)buf, port);
1099 else
1100 *(u16 *)buf = inw(port);
1101 return 2;
1102 case 4:
1103 if (write)
1104 outl(*(u32 *)buf, port);
1105 else
1106 *(u32 *)buf = inl(port);
1107 return 4;
1108 }
1109 return -EINVAL;
1110#else
1111 return -ENXIO;
1112#endif
1113}
1114
1115static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1116 struct bin_attribute *attr, char *buf,
1117 loff_t off, size_t count)
1118{
1119 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1120}
1121
1122static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1123 struct bin_attribute *attr, char *buf,
1124 loff_t off, size_t count)
1125{
1126 int ret;
1127
1128 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1129 if (ret)
1130 return ret;
1131
1132 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1133}
1134
1135/**
1136 * pci_remove_resource_files - cleanup resource files
1137 * @pdev: dev to cleanup
1138 *
1139 * If we created resource files for @pdev, remove them from sysfs and
1140 * free their resources.
1141 */
1142static void pci_remove_resource_files(struct pci_dev *pdev)
1143{
1144 int i;
1145
1146 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1147 struct bin_attribute *res_attr;
1148
1149 res_attr = pdev->res_attr[i];
1150 if (res_attr) {
1151 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1152 kfree(res_attr);
1153 }
1154
1155 res_attr = pdev->res_attr_wc[i];
1156 if (res_attr) {
1157 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1158 kfree(res_attr);
1159 }
1160 }
1161}
1162
1163static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1164{
1165 /* allocate attribute structure, piggyback attribute name */
1166 int name_len = write_combine ? 13 : 10;
1167 struct bin_attribute *res_attr;
1168 char *res_attr_name;
1169 int retval;
1170
1171 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1172 if (!res_attr)
1173 return -ENOMEM;
1174
1175 res_attr_name = (char *)(res_attr + 1);
1176
1177 sysfs_bin_attr_init(res_attr);
1178 if (write_combine) {
1179 sprintf(res_attr_name, "resource%d_wc", num);
1180 res_attr->mmap = pci_mmap_resource_wc;
1181 } else {
1182 sprintf(res_attr_name, "resource%d", num);
1183 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1184 res_attr->read = pci_read_resource_io;
1185 res_attr->write = pci_write_resource_io;
1186 if (arch_can_pci_mmap_io())
1187 res_attr->mmap = pci_mmap_resource_uc;
1188 } else {
1189 res_attr->mmap = pci_mmap_resource_uc;
1190 }
1191 }
1192 if (res_attr->mmap) {
1193 res_attr->f_mapping = iomem_get_mapping;
1194 /*
1195 * generic_file_llseek() consults f_mapping->host to determine
1196 * the file size. As iomem_inode knows nothing about the
1197 * attribute, it's not going to work, so override it as well.
1198 */
1199 res_attr->llseek = pci_llseek_resource;
1200 }
1201 res_attr->attr.name = res_attr_name;
1202 res_attr->attr.mode = 0600;
1203 res_attr->size = pci_resource_len(pdev, num);
1204 res_attr->private = (void *)(unsigned long)num;
1205 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1206 if (retval) {
1207 kfree(res_attr);
1208 return retval;
1209 }
1210
1211 if (write_combine)
1212 pdev->res_attr_wc[num] = res_attr;
1213 else
1214 pdev->res_attr[num] = res_attr;
1215
1216 return 0;
1217}
1218
1219/**
1220 * pci_create_resource_files - create resource files in sysfs for @dev
1221 * @pdev: dev in question
1222 *
1223 * Walk the resources in @pdev creating files for each resource available.
1224 */
1225static int pci_create_resource_files(struct pci_dev *pdev)
1226{
1227 int i;
1228 int retval;
1229
1230 /* Expose the PCI resources from this device as files */
1231 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1232
1233 /* skip empty resources */
1234 if (!pci_resource_len(pdev, i))
1235 continue;
1236
1237 retval = pci_create_attr(pdev, i, 0);
1238 /* for prefetchable resources, create a WC mappable file */
1239 if (!retval && arch_can_pci_mmap_wc() &&
1240 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1241 retval = pci_create_attr(pdev, i, 1);
1242 if (retval) {
1243 pci_remove_resource_files(pdev);
1244 return retval;
1245 }
1246 }
1247 return 0;
1248}
1249#else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
1250int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1251void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1252#endif
1253
1254/**
1255 * pci_write_rom - used to enable access to the PCI ROM display
1256 * @filp: sysfs file
1257 * @kobj: kernel object handle
1258 * @bin_attr: struct bin_attribute for this file
1259 * @buf: user input
1260 * @off: file offset
1261 * @count: number of byte in input
1262 *
1263 * writing anything except 0 enables it
1264 */
1265static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1266 struct bin_attribute *bin_attr, char *buf,
1267 loff_t off, size_t count)
1268{
1269 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1270
1271 if ((off == 0) && (*buf == '0') && (count == 2))
1272 pdev->rom_attr_enabled = 0;
1273 else
1274 pdev->rom_attr_enabled = 1;
1275
1276 return count;
1277}
1278
1279/**
1280 * pci_read_rom - read a PCI ROM
1281 * @filp: sysfs file
1282 * @kobj: kernel object handle
1283 * @bin_attr: struct bin_attribute for this file
1284 * @buf: where to put the data we read from the ROM
1285 * @off: file offset
1286 * @count: number of bytes to read
1287 *
1288 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1289 * device corresponding to @kobj.
1290 */
1291static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1292 struct bin_attribute *bin_attr, char *buf,
1293 loff_t off, size_t count)
1294{
1295 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1296 void __iomem *rom;
1297 size_t size;
1298
1299 if (!pdev->rom_attr_enabled)
1300 return -EINVAL;
1301
1302 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1303 if (!rom || !size)
1304 return -EIO;
1305
1306 if (off >= size)
1307 count = 0;
1308 else {
1309 if (off + count > size)
1310 count = size - off;
1311
1312 memcpy_fromio(buf, rom + off, count);
1313 }
1314 pci_unmap_rom(pdev, rom);
1315
1316 return count;
1317}
1318static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
1319
1320static struct bin_attribute *pci_dev_rom_attrs[] = {
1321 &bin_attr_rom,
1322 NULL,
1323};
1324
1325static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
1326 struct bin_attribute *a, int n)
1327{
1328 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1329 size_t rom_size;
1330
1331 /* If the device has a ROM, try to expose it in sysfs. */
1332 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1333 if (!rom_size)
1334 return 0;
1335
1336 a->size = rom_size;
1337
1338 return a->attr.mode;
1339}
1340
1341static const struct attribute_group pci_dev_rom_attr_group = {
1342 .bin_attrs = pci_dev_rom_attrs,
1343 .is_bin_visible = pci_dev_rom_attr_is_visible,
1344};
1345
1346static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1347 const char *buf, size_t count)
1348{
1349 struct pci_dev *pdev = to_pci_dev(dev);
1350 unsigned long val;
1351 ssize_t result;
1352
1353 if (kstrtoul(buf, 0, &val) < 0)
1354 return -EINVAL;
1355
1356 if (val != 1)
1357 return -EINVAL;
1358
1359 pm_runtime_get_sync(dev);
1360 result = pci_reset_function(pdev);
1361 pm_runtime_put(dev);
1362 if (result < 0)
1363 return result;
1364
1365 return count;
1366}
1367static DEVICE_ATTR_WO(reset);
1368
1369static struct attribute *pci_dev_reset_attrs[] = {
1370 &dev_attr_reset.attr,
1371 NULL,
1372};
1373
1374static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
1375 struct attribute *a, int n)
1376{
1377 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1378
1379 if (!pci_reset_supported(pdev))
1380 return 0;
1381
1382 return a->mode;
1383}
1384
1385static const struct attribute_group pci_dev_reset_attr_group = {
1386 .attrs = pci_dev_reset_attrs,
1387 .is_visible = pci_dev_reset_attr_is_visible,
1388};
1389
1390static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)
1391{
1392 struct pci_dev *pdev = to_pci_dev(dev);
1393 ssize_t ret;
1394
1395 pci_config_pm_runtime_get(pdev);
1396
1397 ret = sysfs_emit(buf, "%016llx\n",
1398 (u64)pci_rebar_get_possible_sizes(pdev, n));
1399
1400 pci_config_pm_runtime_put(pdev);
1401
1402 return ret;
1403}
1404
1405static ssize_t __resource_resize_store(struct device *dev, int n,
1406 const char *buf, size_t count)
1407{
1408 struct pci_dev *pdev = to_pci_dev(dev);
1409 unsigned long size, flags;
1410 int ret, i;
1411 u16 cmd;
1412
1413 if (kstrtoul(buf, 0, &size) < 0)
1414 return -EINVAL;
1415
1416 device_lock(dev);
1417 if (dev->driver) {
1418 ret = -EBUSY;
1419 goto unlock;
1420 }
1421
1422 pci_config_pm_runtime_get(pdev);
1423
1424 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1425 ret = aperture_remove_conflicting_pci_devices(pdev,
1426 "resourceN_resize");
1427 if (ret)
1428 goto pm_put;
1429 }
1430
1431 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1432 pci_write_config_word(pdev, PCI_COMMAND,
1433 cmd & ~PCI_COMMAND_MEMORY);
1434
1435 flags = pci_resource_flags(pdev, n);
1436
1437 pci_remove_resource_files(pdev);
1438
1439 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1440 if (pci_resource_len(pdev, i) &&
1441 pci_resource_flags(pdev, i) == flags)
1442 pci_release_resource(pdev, i);
1443 }
1444
1445 ret = pci_resize_resource(pdev, n, size);
1446
1447 pci_assign_unassigned_bus_resources(pdev->bus);
1448
1449 if (pci_create_resource_files(pdev))
1450 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");
1451
1452 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1453pm_put:
1454 pci_config_pm_runtime_put(pdev);
1455unlock:
1456 device_unlock(dev);
1457
1458 return ret ? ret : count;
1459}
1460
1461#define pci_dev_resource_resize_attr(n) \
1462static ssize_t resource##n##_resize_show(struct device *dev, \
1463 struct device_attribute *attr, \
1464 char *buf) \
1465{ \
1466 return __resource_resize_show(dev, n, buf); \
1467} \
1468static ssize_t resource##n##_resize_store(struct device *dev, \
1469 struct device_attribute *attr,\
1470 const char *buf, size_t count)\
1471{ \
1472 return __resource_resize_store(dev, n, buf, count); \
1473} \
1474static DEVICE_ATTR_RW(resource##n##_resize)
1475
1476pci_dev_resource_resize_attr(0);
1477pci_dev_resource_resize_attr(1);
1478pci_dev_resource_resize_attr(2);
1479pci_dev_resource_resize_attr(3);
1480pci_dev_resource_resize_attr(4);
1481pci_dev_resource_resize_attr(5);
1482
1483static struct attribute *resource_resize_attrs[] = {
1484 &dev_attr_resource0_resize.attr,
1485 &dev_attr_resource1_resize.attr,
1486 &dev_attr_resource2_resize.attr,
1487 &dev_attr_resource3_resize.attr,
1488 &dev_attr_resource4_resize.attr,
1489 &dev_attr_resource5_resize.attr,
1490 NULL,
1491};
1492
1493static umode_t resource_resize_is_visible(struct kobject *kobj,
1494 struct attribute *a, int n)
1495{
1496 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1497
1498 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
1499}
1500
1501static const struct attribute_group pci_dev_resource_resize_group = {
1502 .attrs = resource_resize_attrs,
1503 .is_visible = resource_resize_is_visible,
1504};
1505
1506int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1507{
1508 if (!sysfs_initialized)
1509 return -EACCES;
1510
1511 return pci_create_resource_files(pdev);
1512}
1513
1514/**
1515 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1516 * @pdev: device whose entries we should free
1517 *
1518 * Cleanup when @pdev is removed from sysfs.
1519 */
1520void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1521{
1522 if (!sysfs_initialized)
1523 return;
1524
1525 pci_remove_resource_files(pdev);
1526}
1527
1528static int __init pci_sysfs_init(void)
1529{
1530 struct pci_dev *pdev = NULL;
1531 struct pci_bus *pbus = NULL;
1532 int retval;
1533
1534 sysfs_initialized = 1;
1535 for_each_pci_dev(pdev) {
1536 retval = pci_create_sysfs_dev_files(pdev);
1537 if (retval) {
1538 pci_dev_put(pdev);
1539 return retval;
1540 }
1541 }
1542
1543 while ((pbus = pci_find_next_bus(pbus)))
1544 pci_create_legacy_files(pbus);
1545
1546 return 0;
1547}
1548late_initcall(pci_sysfs_init);
1549
1550static struct attribute *pci_dev_dev_attrs[] = {
1551 &dev_attr_boot_vga.attr,
1552 NULL,
1553};
1554
1555static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1556 struct attribute *a, int n)
1557{
1558 struct device *dev = kobj_to_dev(kobj);
1559 struct pci_dev *pdev = to_pci_dev(dev);
1560
1561 if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev))
1562 return a->mode;
1563
1564 return 0;
1565}
1566
1567static struct attribute *pci_dev_hp_attrs[] = {
1568 &dev_attr_remove.attr,
1569 &dev_attr_dev_rescan.attr,
1570 NULL,
1571};
1572
1573static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1574 struct attribute *a, int n)
1575{
1576 struct device *dev = kobj_to_dev(kobj);
1577 struct pci_dev *pdev = to_pci_dev(dev);
1578
1579 if (pdev->is_virtfn)
1580 return 0;
1581
1582 return a->mode;
1583}
1584
1585static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1586 struct attribute *a, int n)
1587{
1588 struct device *dev = kobj_to_dev(kobj);
1589 struct pci_dev *pdev = to_pci_dev(dev);
1590
1591 if (pci_is_bridge(pdev))
1592 return a->mode;
1593
1594 return 0;
1595}
1596
1597static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1598 struct attribute *a, int n)
1599{
1600 struct device *dev = kobj_to_dev(kobj);
1601 struct pci_dev *pdev = to_pci_dev(dev);
1602
1603 if (pci_is_pcie(pdev))
1604 return a->mode;
1605
1606 return 0;
1607}
1608
1609static const struct attribute_group pci_dev_group = {
1610 .attrs = pci_dev_attrs,
1611};
1612
1613const struct attribute_group *pci_dev_groups[] = {
1614 &pci_dev_group,
1615 &pci_dev_config_attr_group,
1616 &pci_dev_rom_attr_group,
1617 &pci_dev_reset_attr_group,
1618 &pci_dev_reset_method_attr_group,
1619 &pci_dev_vpd_attr_group,
1620#ifdef CONFIG_DMI
1621 &pci_dev_smbios_attr_group,
1622#endif
1623#ifdef CONFIG_ACPI
1624 &pci_dev_acpi_attr_group,
1625#endif
1626 &pci_dev_resource_resize_group,
1627 NULL,
1628};
1629
1630static const struct attribute_group pci_dev_hp_attr_group = {
1631 .attrs = pci_dev_hp_attrs,
1632 .is_visible = pci_dev_hp_attrs_are_visible,
1633};
1634
1635static const struct attribute_group pci_dev_attr_group = {
1636 .attrs = pci_dev_dev_attrs,
1637 .is_visible = pci_dev_attrs_are_visible,
1638};
1639
1640static const struct attribute_group pci_bridge_attr_group = {
1641 .attrs = pci_bridge_attrs,
1642 .is_visible = pci_bridge_attrs_are_visible,
1643};
1644
1645static const struct attribute_group pcie_dev_attr_group = {
1646 .attrs = pcie_dev_attrs,
1647 .is_visible = pcie_dev_attrs_are_visible,
1648};
1649
1650const struct attribute_group *pci_dev_attr_groups[] = {
1651 &pci_dev_attr_group,
1652 &pci_dev_hp_attr_group,
1653#ifdef CONFIG_PCI_IOV
1654 &sriov_pf_dev_attr_group,
1655 &sriov_vf_dev_attr_group,
1656#endif
1657 &pci_bridge_attr_group,
1658 &pcie_dev_attr_group,
1659#ifdef CONFIG_PCIEAER
1660 &aer_stats_attr_group,
1661#endif
1662#ifdef CONFIG_PCIEASPM
1663 &aspm_ctrl_attr_group,
1664#endif
1665 NULL,
1666};