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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
160}
161static DEVICE_ATTR_RO(max_link_speed);
162
163static ssize_t max_link_width_show(struct device *dev,
164 struct device_attribute *attr, char *buf)
165{
166 struct pci_dev *pdev = to_pci_dev(dev);
167
168 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
169}
170static DEVICE_ATTR_RO(max_link_width);
171
172static ssize_t current_link_speed_show(struct device *dev,
173 struct device_attribute *attr, char *buf)
174{
175 struct pci_dev *pci_dev = to_pci_dev(dev);
176 u16 linkstat;
177 int err;
178 const char *speed;
179
180 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
181 if (err)
182 return -EINVAL;
183
184 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
185 case PCI_EXP_LNKSTA_CLS_32_0GB:
186 speed = "32 GT/s";
187 break;
188 case PCI_EXP_LNKSTA_CLS_16_0GB:
189 speed = "16 GT/s";
190 break;
191 case PCI_EXP_LNKSTA_CLS_8_0GB:
192 speed = "8 GT/s";
193 break;
194 case PCI_EXP_LNKSTA_CLS_5_0GB:
195 speed = "5 GT/s";
196 break;
197 case PCI_EXP_LNKSTA_CLS_2_5GB:
198 speed = "2.5 GT/s";
199 break;
200 default:
201 speed = "Unknown speed";
202 }
203
204 return sprintf(buf, "%s\n", speed);
205}
206static DEVICE_ATTR_RO(current_link_speed);
207
208static ssize_t current_link_width_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214
215 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n",
220 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
221}
222static DEVICE_ATTR_RO(current_link_width);
223
224static ssize_t secondary_bus_number_show(struct device *dev,
225 struct device_attribute *attr,
226 char *buf)
227{
228 struct pci_dev *pci_dev = to_pci_dev(dev);
229 u8 sec_bus;
230 int err;
231
232 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
233 if (err)
234 return -EINVAL;
235
236 return sprintf(buf, "%u\n", sec_bus);
237}
238static DEVICE_ATTR_RO(secondary_bus_number);
239
240static ssize_t subordinate_bus_number_show(struct device *dev,
241 struct device_attribute *attr,
242 char *buf)
243{
244 struct pci_dev *pci_dev = to_pci_dev(dev);
245 u8 sub_bus;
246 int err;
247
248 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
249 if (err)
250 return -EINVAL;
251
252 return sprintf(buf, "%u\n", sub_bus);
253}
254static DEVICE_ATTR_RO(subordinate_bus_number);
255
256static ssize_t ari_enabled_show(struct device *dev,
257 struct device_attribute *attr,
258 char *buf)
259{
260 struct pci_dev *pci_dev = to_pci_dev(dev);
261
262 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
263}
264static DEVICE_ATTR_RO(ari_enabled);
265
266static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
267 char *buf)
268{
269 struct pci_dev *pci_dev = to_pci_dev(dev);
270
271 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
272 pci_dev->vendor, pci_dev->device,
273 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
274 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
275 (u8)(pci_dev->class));
276}
277static DEVICE_ATTR_RO(modalias);
278
279static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
280 const char *buf, size_t count)
281{
282 struct pci_dev *pdev = to_pci_dev(dev);
283 unsigned long val;
284 ssize_t result = kstrtoul(buf, 0, &val);
285
286 if (result < 0)
287 return result;
288
289 /* this can crash the machine when done on the "wrong" device */
290 if (!capable(CAP_SYS_ADMIN))
291 return -EPERM;
292
293 device_lock(dev);
294 if (dev->driver)
295 result = -EBUSY;
296 else if (val)
297 result = pci_enable_device(pdev);
298 else if (pci_is_enabled(pdev))
299 pci_disable_device(pdev);
300 else
301 result = -EIO;
302 device_unlock(dev);
303
304 return result < 0 ? result : count;
305}
306
307static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
308 char *buf)
309{
310 struct pci_dev *pdev;
311
312 pdev = to_pci_dev(dev);
313 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
314}
315static DEVICE_ATTR_RW(enable);
316
317#ifdef CONFIG_NUMA
318static ssize_t numa_node_store(struct device *dev,
319 struct device_attribute *attr, const char *buf,
320 size_t count)
321{
322 struct pci_dev *pdev = to_pci_dev(dev);
323 int node, ret;
324
325 if (!capable(CAP_SYS_ADMIN))
326 return -EPERM;
327
328 ret = kstrtoint(buf, 0, &node);
329 if (ret)
330 return ret;
331
332 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
333 return -EINVAL;
334
335 if (node != NUMA_NO_NODE && !node_online(node))
336 return -EINVAL;
337
338 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
339 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
340 node);
341
342 dev->numa_node = node;
343 return count;
344}
345
346static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
347 char *buf)
348{
349 return sprintf(buf, "%d\n", dev->numa_node);
350}
351static DEVICE_ATTR_RW(numa_node);
352#endif
353
354static ssize_t dma_mask_bits_show(struct device *dev,
355 struct device_attribute *attr, char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358
359 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
360}
361static DEVICE_ATTR_RO(dma_mask_bits);
362
363static ssize_t consistent_dma_mask_bits_show(struct device *dev,
364 struct device_attribute *attr,
365 char *buf)
366{
367 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
368}
369static DEVICE_ATTR_RO(consistent_dma_mask_bits);
370
371static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
372 char *buf)
373{
374 struct pci_dev *pdev = to_pci_dev(dev);
375 struct pci_bus *subordinate = pdev->subordinate;
376
377 return sprintf(buf, "%u\n", subordinate ?
378 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
379 : !pdev->no_msi);
380}
381
382static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
383 const char *buf, size_t count)
384{
385 struct pci_dev *pdev = to_pci_dev(dev);
386 struct pci_bus *subordinate = pdev->subordinate;
387 unsigned long val;
388
389 if (kstrtoul(buf, 0, &val) < 0)
390 return -EINVAL;
391
392 if (!capable(CAP_SYS_ADMIN))
393 return -EPERM;
394
395 /*
396 * "no_msi" and "bus_flags" only affect what happens when a driver
397 * requests MSI or MSI-X. They don't affect any drivers that have
398 * already requested MSI or MSI-X.
399 */
400 if (!subordinate) {
401 pdev->no_msi = !val;
402 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
403 val ? "allowed" : "disallowed");
404 return count;
405 }
406
407 if (val)
408 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
409 else
410 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
411
412 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
413 val ? "allowed" : "disallowed");
414 return count;
415}
416static DEVICE_ATTR_RW(msi_bus);
417
418static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
419{
420 unsigned long val;
421 struct pci_bus *b = NULL;
422
423 if (kstrtoul(buf, 0, &val) < 0)
424 return -EINVAL;
425
426 if (val) {
427 pci_lock_rescan_remove();
428 while ((b = pci_find_next_bus(b)) != NULL)
429 pci_rescan_bus(b);
430 pci_unlock_rescan_remove();
431 }
432 return count;
433}
434static BUS_ATTR_WO(rescan);
435
436static struct attribute *pci_bus_attrs[] = {
437 &bus_attr_rescan.attr,
438 NULL,
439};
440
441static const struct attribute_group pci_bus_group = {
442 .attrs = pci_bus_attrs,
443};
444
445const struct attribute_group *pci_bus_groups[] = {
446 &pci_bus_group,
447 NULL,
448};
449
450static ssize_t dev_rescan_store(struct device *dev,
451 struct device_attribute *attr, const char *buf,
452 size_t count)
453{
454 unsigned long val;
455 struct pci_dev *pdev = to_pci_dev(dev);
456
457 if (kstrtoul(buf, 0, &val) < 0)
458 return -EINVAL;
459
460 if (val) {
461 pci_lock_rescan_remove();
462 pci_rescan_bus(pdev->bus);
463 pci_unlock_rescan_remove();
464 }
465 return count;
466}
467static DEVICE_ATTR_WO(dev_rescan);
468
469static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473
474 if (kstrtoul(buf, 0, &val) < 0)
475 return -EINVAL;
476
477 if (val && device_remove_file_self(dev, attr))
478 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
479 return count;
480}
481static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
482 remove_store);
483
484static ssize_t bus_rescan_store(struct device *dev,
485 struct device_attribute *attr,
486 const char *buf, size_t count)
487{
488 unsigned long val;
489 struct pci_bus *bus = to_pci_bus(dev);
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val) {
495 pci_lock_rescan_remove();
496 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
497 pci_rescan_bus_bridge_resize(bus->self);
498 else
499 pci_rescan_bus(bus);
500 pci_unlock_rescan_remove();
501 }
502 return count;
503}
504static DEVICE_ATTR_WO(bus_rescan);
505
506#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
507static ssize_t d3cold_allowed_store(struct device *dev,
508 struct device_attribute *attr,
509 const char *buf, size_t count)
510{
511 struct pci_dev *pdev = to_pci_dev(dev);
512 unsigned long val;
513
514 if (kstrtoul(buf, 0, &val) < 0)
515 return -EINVAL;
516
517 pdev->d3cold_allowed = !!val;
518 if (pdev->d3cold_allowed)
519 pci_d3cold_enable(pdev);
520 else
521 pci_d3cold_disable(pdev);
522
523 pm_runtime_resume(dev);
524
525 return count;
526}
527
528static ssize_t d3cold_allowed_show(struct device *dev,
529 struct device_attribute *attr, char *buf)
530{
531 struct pci_dev *pdev = to_pci_dev(dev);
532 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
533}
534static DEVICE_ATTR_RW(d3cold_allowed);
535#endif
536
537#ifdef CONFIG_OF
538static ssize_t devspec_show(struct device *dev,
539 struct device_attribute *attr, char *buf)
540{
541 struct pci_dev *pdev = to_pci_dev(dev);
542 struct device_node *np = pci_device_to_OF_node(pdev);
543
544 if (np == NULL)
545 return 0;
546 return sprintf(buf, "%pOF", np);
547}
548static DEVICE_ATTR_RO(devspec);
549#endif
550
551static ssize_t driver_override_store(struct device *dev,
552 struct device_attribute *attr,
553 const char *buf, size_t count)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556 char *driver_override, *old, *cp;
557
558 /* We need to keep extra room for a newline */
559 if (count >= (PAGE_SIZE - 1))
560 return -EINVAL;
561
562 driver_override = kstrndup(buf, count, GFP_KERNEL);
563 if (!driver_override)
564 return -ENOMEM;
565
566 cp = strchr(driver_override, '\n');
567 if (cp)
568 *cp = '\0';
569
570 device_lock(dev);
571 old = pdev->driver_override;
572 if (strlen(driver_override)) {
573 pdev->driver_override = driver_override;
574 } else {
575 kfree(driver_override);
576 pdev->driver_override = NULL;
577 }
578 device_unlock(dev);
579
580 kfree(old);
581
582 return count;
583}
584
585static ssize_t driver_override_show(struct device *dev,
586 struct device_attribute *attr, char *buf)
587{
588 struct pci_dev *pdev = to_pci_dev(dev);
589 ssize_t len;
590
591 device_lock(dev);
592 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
593 device_unlock(dev);
594 return len;
595}
596static DEVICE_ATTR_RW(driver_override);
597
598static struct attribute *pci_dev_attrs[] = {
599 &dev_attr_resource.attr,
600 &dev_attr_vendor.attr,
601 &dev_attr_device.attr,
602 &dev_attr_subsystem_vendor.attr,
603 &dev_attr_subsystem_device.attr,
604 &dev_attr_revision.attr,
605 &dev_attr_class.attr,
606 &dev_attr_irq.attr,
607 &dev_attr_local_cpus.attr,
608 &dev_attr_local_cpulist.attr,
609 &dev_attr_modalias.attr,
610#ifdef CONFIG_NUMA
611 &dev_attr_numa_node.attr,
612#endif
613 &dev_attr_dma_mask_bits.attr,
614 &dev_attr_consistent_dma_mask_bits.attr,
615 &dev_attr_enable.attr,
616 &dev_attr_broken_parity_status.attr,
617 &dev_attr_msi_bus.attr,
618#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
619 &dev_attr_d3cold_allowed.attr,
620#endif
621#ifdef CONFIG_OF
622 &dev_attr_devspec.attr,
623#endif
624 &dev_attr_driver_override.attr,
625 &dev_attr_ari_enabled.attr,
626 NULL,
627};
628
629static struct attribute *pci_bridge_attrs[] = {
630 &dev_attr_subordinate_bus_number.attr,
631 &dev_attr_secondary_bus_number.attr,
632 NULL,
633};
634
635static struct attribute *pcie_dev_attrs[] = {
636 &dev_attr_current_link_speed.attr,
637 &dev_attr_current_link_width.attr,
638 &dev_attr_max_link_width.attr,
639 &dev_attr_max_link_speed.attr,
640 NULL,
641};
642
643static struct attribute *pcibus_attrs[] = {
644 &dev_attr_bus_rescan.attr,
645 &dev_attr_cpuaffinity.attr,
646 &dev_attr_cpulistaffinity.attr,
647 NULL,
648};
649
650static const struct attribute_group pcibus_group = {
651 .attrs = pcibus_attrs,
652};
653
654const struct attribute_group *pcibus_groups[] = {
655 &pcibus_group,
656 NULL,
657};
658
659static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
660 char *buf)
661{
662 struct pci_dev *pdev = to_pci_dev(dev);
663 struct pci_dev *vga_dev = vga_default_device();
664
665 if (vga_dev)
666 return sprintf(buf, "%u\n", (pdev == vga_dev));
667
668 return sprintf(buf, "%u\n",
669 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
670 IORESOURCE_ROM_SHADOW));
671}
672static DEVICE_ATTR_RO(boot_vga);
673
674static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
675 struct bin_attribute *bin_attr, char *buf,
676 loff_t off, size_t count)
677{
678 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
679 unsigned int size = 64;
680 loff_t init_off = off;
681 u8 *data = (u8 *) buf;
682
683 /* Several chips lock up trying to read undefined config space */
684 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
685 size = dev->cfg_size;
686 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
687 size = 128;
688
689 if (off > size)
690 return 0;
691 if (off + count > size) {
692 size -= off;
693 count = size;
694 } else {
695 size = count;
696 }
697
698 pci_config_pm_runtime_get(dev);
699
700 if ((off & 1) && size) {
701 u8 val;
702 pci_user_read_config_byte(dev, off, &val);
703 data[off - init_off] = val;
704 off++;
705 size--;
706 }
707
708 if ((off & 3) && size > 2) {
709 u16 val;
710 pci_user_read_config_word(dev, off, &val);
711 data[off - init_off] = val & 0xff;
712 data[off - init_off + 1] = (val >> 8) & 0xff;
713 off += 2;
714 size -= 2;
715 }
716
717 while (size > 3) {
718 u32 val;
719 pci_user_read_config_dword(dev, off, &val);
720 data[off - init_off] = val & 0xff;
721 data[off - init_off + 1] = (val >> 8) & 0xff;
722 data[off - init_off + 2] = (val >> 16) & 0xff;
723 data[off - init_off + 3] = (val >> 24) & 0xff;
724 off += 4;
725 size -= 4;
726 }
727
728 if (size >= 2) {
729 u16 val;
730 pci_user_read_config_word(dev, off, &val);
731 data[off - init_off] = val & 0xff;
732 data[off - init_off + 1] = (val >> 8) & 0xff;
733 off += 2;
734 size -= 2;
735 }
736
737 if (size > 0) {
738 u8 val;
739 pci_user_read_config_byte(dev, off, &val);
740 data[off - init_off] = val;
741 off++;
742 --size;
743 }
744
745 pci_config_pm_runtime_put(dev);
746
747 return count;
748}
749
750static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
751 struct bin_attribute *bin_attr, char *buf,
752 loff_t off, size_t count)
753{
754 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
755 unsigned int size = count;
756 loff_t init_off = off;
757 u8 *data = (u8 *) buf;
758 int ret;
759
760 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
761 if (ret)
762 return ret;
763
764 if (off > dev->cfg_size)
765 return 0;
766 if (off + count > dev->cfg_size) {
767 size = dev->cfg_size - off;
768 count = size;
769 }
770
771 pci_config_pm_runtime_get(dev);
772
773 if ((off & 1) && size) {
774 pci_user_write_config_byte(dev, off, data[off - init_off]);
775 off++;
776 size--;
777 }
778
779 if ((off & 3) && size > 2) {
780 u16 val = data[off - init_off];
781 val |= (u16) data[off - init_off + 1] << 8;
782 pci_user_write_config_word(dev, off, val);
783 off += 2;
784 size -= 2;
785 }
786
787 while (size > 3) {
788 u32 val = data[off - init_off];
789 val |= (u32) data[off - init_off + 1] << 8;
790 val |= (u32) data[off - init_off + 2] << 16;
791 val |= (u32) data[off - init_off + 3] << 24;
792 pci_user_write_config_dword(dev, off, val);
793 off += 4;
794 size -= 4;
795 }
796
797 if (size >= 2) {
798 u16 val = data[off - init_off];
799 val |= (u16) data[off - init_off + 1] << 8;
800 pci_user_write_config_word(dev, off, val);
801 off += 2;
802 size -= 2;
803 }
804
805 if (size) {
806 pci_user_write_config_byte(dev, off, data[off - init_off]);
807 off++;
808 --size;
809 }
810
811 pci_config_pm_runtime_put(dev);
812
813 return count;
814}
815
816#ifdef HAVE_PCI_LEGACY
817/**
818 * pci_read_legacy_io - read byte(s) from legacy I/O port space
819 * @filp: open sysfs file
820 * @kobj: kobject corresponding to file to read from
821 * @bin_attr: struct bin_attribute for this file
822 * @buf: buffer to store results
823 * @off: offset into legacy I/O port space
824 * @count: number of bytes to read
825 *
826 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
827 * callback routine (pci_legacy_read).
828 */
829static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
830 struct bin_attribute *bin_attr, char *buf,
831 loff_t off, size_t count)
832{
833 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
834
835 /* Only support 1, 2 or 4 byte accesses */
836 if (count != 1 && count != 2 && count != 4)
837 return -EINVAL;
838
839 return pci_legacy_read(bus, off, (u32 *)buf, count);
840}
841
842/**
843 * pci_write_legacy_io - write byte(s) to legacy I/O port space
844 * @filp: open sysfs file
845 * @kobj: kobject corresponding to file to read from
846 * @bin_attr: struct bin_attribute for this file
847 * @buf: buffer containing value to be written
848 * @off: offset into legacy I/O port space
849 * @count: number of bytes to write
850 *
851 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
852 * callback routine (pci_legacy_write).
853 */
854static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
855 struct bin_attribute *bin_attr, char *buf,
856 loff_t off, size_t count)
857{
858 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
859
860 /* Only support 1, 2 or 4 byte accesses */
861 if (count != 1 && count != 2 && count != 4)
862 return -EINVAL;
863
864 return pci_legacy_write(bus, off, *(u32 *)buf, count);
865}
866
867/**
868 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
869 * @filp: open sysfs file
870 * @kobj: kobject corresponding to device to be mapped
871 * @attr: struct bin_attribute for this file
872 * @vma: struct vm_area_struct passed to mmap
873 *
874 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
875 * legacy memory space (first meg of bus space) into application virtual
876 * memory space.
877 */
878static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
879 struct bin_attribute *attr,
880 struct vm_area_struct *vma)
881{
882 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
883
884 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
885}
886
887/**
888 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
889 * @filp: open sysfs file
890 * @kobj: kobject corresponding to device to be mapped
891 * @attr: struct bin_attribute for this file
892 * @vma: struct vm_area_struct passed to mmap
893 *
894 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
895 * legacy IO space (first meg of bus space) into application virtual
896 * memory space. Returns -ENOSYS if the operation isn't supported
897 */
898static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
899 struct bin_attribute *attr,
900 struct vm_area_struct *vma)
901{
902 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
903
904 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
905}
906
907/**
908 * pci_adjust_legacy_attr - adjustment of legacy file attributes
909 * @b: bus to create files under
910 * @mmap_type: I/O port or memory
911 *
912 * Stub implementation. Can be overridden by arch if necessary.
913 */
914void __weak pci_adjust_legacy_attr(struct pci_bus *b,
915 enum pci_mmap_state mmap_type)
916{
917}
918
919/**
920 * pci_create_legacy_files - create legacy I/O port and memory files
921 * @b: bus to create files under
922 *
923 * Some platforms allow access to legacy I/O port and ISA memory space on
924 * a per-bus basis. This routine creates the files and ties them into
925 * their associated read, write and mmap files from pci-sysfs.c
926 *
927 * On error unwind, but don't propagate the error to the caller
928 * as it is ok to set up the PCI bus without these files.
929 */
930void pci_create_legacy_files(struct pci_bus *b)
931{
932 int error;
933
934 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
935 GFP_ATOMIC);
936 if (!b->legacy_io)
937 goto kzalloc_err;
938
939 sysfs_bin_attr_init(b->legacy_io);
940 b->legacy_io->attr.name = "legacy_io";
941 b->legacy_io->size = 0xffff;
942 b->legacy_io->attr.mode = 0600;
943 b->legacy_io->read = pci_read_legacy_io;
944 b->legacy_io->write = pci_write_legacy_io;
945 b->legacy_io->mmap = pci_mmap_legacy_io;
946 pci_adjust_legacy_attr(b, pci_mmap_io);
947 error = device_create_bin_file(&b->dev, b->legacy_io);
948 if (error)
949 goto legacy_io_err;
950
951 /* Allocated above after the legacy_io struct */
952 b->legacy_mem = b->legacy_io + 1;
953 sysfs_bin_attr_init(b->legacy_mem);
954 b->legacy_mem->attr.name = "legacy_mem";
955 b->legacy_mem->size = 1024*1024;
956 b->legacy_mem->attr.mode = 0600;
957 b->legacy_mem->mmap = pci_mmap_legacy_mem;
958 pci_adjust_legacy_attr(b, pci_mmap_mem);
959 error = device_create_bin_file(&b->dev, b->legacy_mem);
960 if (error)
961 goto legacy_mem_err;
962
963 return;
964
965legacy_mem_err:
966 device_remove_bin_file(&b->dev, b->legacy_io);
967legacy_io_err:
968 kfree(b->legacy_io);
969 b->legacy_io = NULL;
970kzalloc_err:
971 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
972}
973
974void pci_remove_legacy_files(struct pci_bus *b)
975{
976 if (b->legacy_io) {
977 device_remove_bin_file(&b->dev, b->legacy_io);
978 device_remove_bin_file(&b->dev, b->legacy_mem);
979 kfree(b->legacy_io); /* both are allocated here */
980 }
981}
982#endif /* HAVE_PCI_LEGACY */
983
984#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
985
986int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
987 enum pci_mmap_api mmap_api)
988{
989 unsigned long nr, start, size;
990 resource_size_t pci_start = 0, pci_end;
991
992 if (pci_resource_len(pdev, resno) == 0)
993 return 0;
994 nr = vma_pages(vma);
995 start = vma->vm_pgoff;
996 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
997 if (mmap_api == PCI_MMAP_PROCFS) {
998 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
999 &pci_start, &pci_end);
1000 pci_start >>= PAGE_SHIFT;
1001 }
1002 if (start >= pci_start && start < pci_start + size &&
1003 start + nr <= pci_start + size)
1004 return 1;
1005 return 0;
1006}
1007
1008/**
1009 * pci_mmap_resource - map a PCI resource into user memory space
1010 * @kobj: kobject for mapping
1011 * @attr: struct bin_attribute for the file being mapped
1012 * @vma: struct vm_area_struct passed into the mmap
1013 * @write_combine: 1 for write_combine mapping
1014 *
1015 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1016 */
1017static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1018 struct vm_area_struct *vma, int write_combine)
1019{
1020 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1021 int bar = (unsigned long)attr->private;
1022 enum pci_mmap_state mmap_type;
1023 struct resource *res = &pdev->resource[bar];
1024 int ret;
1025
1026 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1027 if (ret)
1028 return ret;
1029
1030 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1031 return -EINVAL;
1032
1033 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1034 return -EINVAL;
1035
1036 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1037
1038 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1039}
1040
1041static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1042 struct bin_attribute *attr,
1043 struct vm_area_struct *vma)
1044{
1045 return pci_mmap_resource(kobj, attr, vma, 0);
1046}
1047
1048static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1049 struct bin_attribute *attr,
1050 struct vm_area_struct *vma)
1051{
1052 return pci_mmap_resource(kobj, attr, vma, 1);
1053}
1054
1055static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1056 struct bin_attribute *attr, char *buf,
1057 loff_t off, size_t count, bool write)
1058{
1059 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1060 int bar = (unsigned long)attr->private;
1061 unsigned long port = off;
1062
1063 port += pci_resource_start(pdev, bar);
1064
1065 if (port > pci_resource_end(pdev, bar))
1066 return 0;
1067
1068 if (port + count - 1 > pci_resource_end(pdev, bar))
1069 return -EINVAL;
1070
1071 switch (count) {
1072 case 1:
1073 if (write)
1074 outb(*(u8 *)buf, port);
1075 else
1076 *(u8 *)buf = inb(port);
1077 return 1;
1078 case 2:
1079 if (write)
1080 outw(*(u16 *)buf, port);
1081 else
1082 *(u16 *)buf = inw(port);
1083 return 2;
1084 case 4:
1085 if (write)
1086 outl(*(u32 *)buf, port);
1087 else
1088 *(u32 *)buf = inl(port);
1089 return 4;
1090 }
1091 return -EINVAL;
1092}
1093
1094static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1095 struct bin_attribute *attr, char *buf,
1096 loff_t off, size_t count)
1097{
1098 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1099}
1100
1101static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count)
1104{
1105 int ret;
1106
1107 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1108 if (ret)
1109 return ret;
1110
1111 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1112}
1113
1114/**
1115 * pci_remove_resource_files - cleanup resource files
1116 * @pdev: dev to cleanup
1117 *
1118 * If we created resource files for @pdev, remove them from sysfs and
1119 * free their resources.
1120 */
1121static void pci_remove_resource_files(struct pci_dev *pdev)
1122{
1123 int i;
1124
1125 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1126 struct bin_attribute *res_attr;
1127
1128 res_attr = pdev->res_attr[i];
1129 if (res_attr) {
1130 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1131 kfree(res_attr);
1132 }
1133
1134 res_attr = pdev->res_attr_wc[i];
1135 if (res_attr) {
1136 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1137 kfree(res_attr);
1138 }
1139 }
1140}
1141
1142static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1143{
1144 /* allocate attribute structure, piggyback attribute name */
1145 int name_len = write_combine ? 13 : 10;
1146 struct bin_attribute *res_attr;
1147 char *res_attr_name;
1148 int retval;
1149
1150 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1151 if (!res_attr)
1152 return -ENOMEM;
1153
1154 res_attr_name = (char *)(res_attr + 1);
1155
1156 sysfs_bin_attr_init(res_attr);
1157 if (write_combine) {
1158 pdev->res_attr_wc[num] = res_attr;
1159 sprintf(res_attr_name, "resource%d_wc", num);
1160 res_attr->mmap = pci_mmap_resource_wc;
1161 } else {
1162 pdev->res_attr[num] = res_attr;
1163 sprintf(res_attr_name, "resource%d", num);
1164 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1165 res_attr->read = pci_read_resource_io;
1166 res_attr->write = pci_write_resource_io;
1167 if (arch_can_pci_mmap_io())
1168 res_attr->mmap = pci_mmap_resource_uc;
1169 } else {
1170 res_attr->mmap = pci_mmap_resource_uc;
1171 }
1172 }
1173 res_attr->attr.name = res_attr_name;
1174 res_attr->attr.mode = 0600;
1175 res_attr->size = pci_resource_len(pdev, num);
1176 res_attr->private = (void *)(unsigned long)num;
1177 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1178 if (retval)
1179 kfree(res_attr);
1180
1181 return retval;
1182}
1183
1184/**
1185 * pci_create_resource_files - create resource files in sysfs for @dev
1186 * @pdev: dev in question
1187 *
1188 * Walk the resources in @pdev creating files for each resource available.
1189 */
1190static int pci_create_resource_files(struct pci_dev *pdev)
1191{
1192 int i;
1193 int retval;
1194
1195 /* Expose the PCI resources from this device as files */
1196 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1197
1198 /* skip empty resources */
1199 if (!pci_resource_len(pdev, i))
1200 continue;
1201
1202 retval = pci_create_attr(pdev, i, 0);
1203 /* for prefetchable resources, create a WC mappable file */
1204 if (!retval && arch_can_pci_mmap_wc() &&
1205 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1206 retval = pci_create_attr(pdev, i, 1);
1207 if (retval) {
1208 pci_remove_resource_files(pdev);
1209 return retval;
1210 }
1211 }
1212 return 0;
1213}
1214#else /* !HAVE_PCI_MMAP */
1215int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1216void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1217#endif /* HAVE_PCI_MMAP */
1218
1219/**
1220 * pci_write_rom - used to enable access to the PCI ROM display
1221 * @filp: sysfs file
1222 * @kobj: kernel object handle
1223 * @bin_attr: struct bin_attribute for this file
1224 * @buf: user input
1225 * @off: file offset
1226 * @count: number of byte in input
1227 *
1228 * writing anything except 0 enables it
1229 */
1230static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1231 struct bin_attribute *bin_attr, char *buf,
1232 loff_t off, size_t count)
1233{
1234 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1235
1236 if ((off == 0) && (*buf == '0') && (count == 2))
1237 pdev->rom_attr_enabled = 0;
1238 else
1239 pdev->rom_attr_enabled = 1;
1240
1241 return count;
1242}
1243
1244/**
1245 * pci_read_rom - read a PCI ROM
1246 * @filp: sysfs file
1247 * @kobj: kernel object handle
1248 * @bin_attr: struct bin_attribute for this file
1249 * @buf: where to put the data we read from the ROM
1250 * @off: file offset
1251 * @count: number of bytes to read
1252 *
1253 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1254 * device corresponding to @kobj.
1255 */
1256static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1257 struct bin_attribute *bin_attr, char *buf,
1258 loff_t off, size_t count)
1259{
1260 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1261 void __iomem *rom;
1262 size_t size;
1263
1264 if (!pdev->rom_attr_enabled)
1265 return -EINVAL;
1266
1267 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1268 if (!rom || !size)
1269 return -EIO;
1270
1271 if (off >= size)
1272 count = 0;
1273 else {
1274 if (off + count > size)
1275 count = size - off;
1276
1277 memcpy_fromio(buf, rom + off, count);
1278 }
1279 pci_unmap_rom(pdev, rom);
1280
1281 return count;
1282}
1283
1284static const struct bin_attribute pci_config_attr = {
1285 .attr = {
1286 .name = "config",
1287 .mode = 0644,
1288 },
1289 .size = PCI_CFG_SPACE_SIZE,
1290 .read = pci_read_config,
1291 .write = pci_write_config,
1292};
1293
1294static const struct bin_attribute pcie_config_attr = {
1295 .attr = {
1296 .name = "config",
1297 .mode = 0644,
1298 },
1299 .size = PCI_CFG_SPACE_EXP_SIZE,
1300 .read = pci_read_config,
1301 .write = pci_write_config,
1302};
1303
1304static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1305 const char *buf, size_t count)
1306{
1307 struct pci_dev *pdev = to_pci_dev(dev);
1308 unsigned long val;
1309 ssize_t result = kstrtoul(buf, 0, &val);
1310
1311 if (result < 0)
1312 return result;
1313
1314 if (val != 1)
1315 return -EINVAL;
1316
1317 pm_runtime_get_sync(dev);
1318 result = pci_reset_function(pdev);
1319 pm_runtime_put(dev);
1320 if (result < 0)
1321 return result;
1322
1323 return count;
1324}
1325
1326static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1327
1328static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1329{
1330 int retval;
1331
1332 pcie_vpd_create_sysfs_dev_files(dev);
1333 pcie_aspm_create_sysfs_dev_files(dev);
1334
1335 if (dev->reset_fn) {
1336 retval = device_create_file(&dev->dev, &dev_attr_reset);
1337 if (retval)
1338 goto error;
1339 }
1340 return 0;
1341
1342error:
1343 pcie_aspm_remove_sysfs_dev_files(dev);
1344 pcie_vpd_remove_sysfs_dev_files(dev);
1345 return retval;
1346}
1347
1348int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1349{
1350 int retval;
1351 int rom_size;
1352 struct bin_attribute *attr;
1353
1354 if (!sysfs_initialized)
1355 return -EACCES;
1356
1357 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1358 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1359 else
1360 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1361 if (retval)
1362 goto err;
1363
1364 retval = pci_create_resource_files(pdev);
1365 if (retval)
1366 goto err_config_file;
1367
1368 /* If the device has a ROM, try to expose it in sysfs. */
1369 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1370 if (rom_size) {
1371 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1372 if (!attr) {
1373 retval = -ENOMEM;
1374 goto err_resource_files;
1375 }
1376 sysfs_bin_attr_init(attr);
1377 attr->size = rom_size;
1378 attr->attr.name = "rom";
1379 attr->attr.mode = 0600;
1380 attr->read = pci_read_rom;
1381 attr->write = pci_write_rom;
1382 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1383 if (retval) {
1384 kfree(attr);
1385 goto err_resource_files;
1386 }
1387 pdev->rom_attr = attr;
1388 }
1389
1390 /* add sysfs entries for various capabilities */
1391 retval = pci_create_capabilities_sysfs(pdev);
1392 if (retval)
1393 goto err_rom_file;
1394
1395 pci_create_firmware_label_files(pdev);
1396
1397 return 0;
1398
1399err_rom_file:
1400 if (pdev->rom_attr) {
1401 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1402 kfree(pdev->rom_attr);
1403 pdev->rom_attr = NULL;
1404 }
1405err_resource_files:
1406 pci_remove_resource_files(pdev);
1407err_config_file:
1408 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1409 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1410 else
1411 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1412err:
1413 return retval;
1414}
1415
1416static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1417{
1418 pcie_vpd_remove_sysfs_dev_files(dev);
1419 pcie_aspm_remove_sysfs_dev_files(dev);
1420 if (dev->reset_fn) {
1421 device_remove_file(&dev->dev, &dev_attr_reset);
1422 dev->reset_fn = 0;
1423 }
1424}
1425
1426/**
1427 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1428 * @pdev: device whose entries we should free
1429 *
1430 * Cleanup when @pdev is removed from sysfs.
1431 */
1432void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1433{
1434 if (!sysfs_initialized)
1435 return;
1436
1437 pci_remove_capabilities_sysfs(pdev);
1438
1439 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1440 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1441 else
1442 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1443
1444 pci_remove_resource_files(pdev);
1445
1446 if (pdev->rom_attr) {
1447 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1448 kfree(pdev->rom_attr);
1449 pdev->rom_attr = NULL;
1450 }
1451
1452 pci_remove_firmware_label_files(pdev);
1453}
1454
1455static int __init pci_sysfs_init(void)
1456{
1457 struct pci_dev *pdev = NULL;
1458 int retval;
1459
1460 sysfs_initialized = 1;
1461 for_each_pci_dev(pdev) {
1462 retval = pci_create_sysfs_dev_files(pdev);
1463 if (retval) {
1464 pci_dev_put(pdev);
1465 return retval;
1466 }
1467 }
1468
1469 return 0;
1470}
1471late_initcall(pci_sysfs_init);
1472
1473static struct attribute *pci_dev_dev_attrs[] = {
1474 &dev_attr_boot_vga.attr,
1475 NULL,
1476};
1477
1478static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1479 struct attribute *a, int n)
1480{
1481 struct device *dev = kobj_to_dev(kobj);
1482 struct pci_dev *pdev = to_pci_dev(dev);
1483
1484 if (a == &dev_attr_boot_vga.attr)
1485 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static struct attribute *pci_dev_hp_attrs[] = {
1492 &dev_attr_remove.attr,
1493 &dev_attr_dev_rescan.attr,
1494 NULL,
1495};
1496
1497static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1498 struct attribute *a, int n)
1499{
1500 struct device *dev = kobj_to_dev(kobj);
1501 struct pci_dev *pdev = to_pci_dev(dev);
1502
1503 if (pdev->is_virtfn)
1504 return 0;
1505
1506 return a->mode;
1507}
1508
1509static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1510 struct attribute *a, int n)
1511{
1512 struct device *dev = kobj_to_dev(kobj);
1513 struct pci_dev *pdev = to_pci_dev(dev);
1514
1515 if (pci_is_bridge(pdev))
1516 return a->mode;
1517
1518 return 0;
1519}
1520
1521static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1522 struct attribute *a, int n)
1523{
1524 struct device *dev = kobj_to_dev(kobj);
1525 struct pci_dev *pdev = to_pci_dev(dev);
1526
1527 if (pci_is_pcie(pdev))
1528 return a->mode;
1529
1530 return 0;
1531}
1532
1533static const struct attribute_group pci_dev_group = {
1534 .attrs = pci_dev_attrs,
1535};
1536
1537const struct attribute_group *pci_dev_groups[] = {
1538 &pci_dev_group,
1539 NULL,
1540};
1541
1542static const struct attribute_group pci_bridge_group = {
1543 .attrs = pci_bridge_attrs,
1544};
1545
1546const struct attribute_group *pci_bridge_groups[] = {
1547 &pci_bridge_group,
1548 NULL,
1549};
1550
1551static const struct attribute_group pcie_dev_group = {
1552 .attrs = pcie_dev_attrs,
1553};
1554
1555const struct attribute_group *pcie_dev_groups[] = {
1556 &pcie_dev_group,
1557 NULL,
1558};
1559
1560static const struct attribute_group pci_dev_hp_attr_group = {
1561 .attrs = pci_dev_hp_attrs,
1562 .is_visible = pci_dev_hp_attrs_are_visible,
1563};
1564
1565static const struct attribute_group pci_dev_attr_group = {
1566 .attrs = pci_dev_dev_attrs,
1567 .is_visible = pci_dev_attrs_are_visible,
1568};
1569
1570static const struct attribute_group pci_bridge_attr_group = {
1571 .attrs = pci_bridge_attrs,
1572 .is_visible = pci_bridge_attrs_are_visible,
1573};
1574
1575static const struct attribute_group pcie_dev_attr_group = {
1576 .attrs = pcie_dev_attrs,
1577 .is_visible = pcie_dev_attrs_are_visible,
1578};
1579
1580static const struct attribute_group *pci_dev_attr_groups[] = {
1581 &pci_dev_attr_group,
1582 &pci_dev_hp_attr_group,
1583#ifdef CONFIG_PCI_IOV
1584 &sriov_dev_attr_group,
1585#endif
1586 &pci_bridge_attr_group,
1587 &pcie_dev_attr_group,
1588#ifdef CONFIG_PCIEAER
1589 &aer_stats_attr_group,
1590#endif
1591 NULL,
1592};
1593
1594const struct device_type pci_dev_type = {
1595 .groups = pci_dev_attr_groups,
1596};
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/pci-aspm.h>
27#include <linux/slab.h>
28#include <linux/vgaarb.h>
29#include <linux/pm_runtime.h>
30#include <linux/of.h>
31#include "pci.h"
32
33static int sysfs_initialized; /* = 0 */
34
35/* show configuration fields */
36#define pci_config_attr(field, format_string) \
37static ssize_t \
38field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
39{ \
40 struct pci_dev *pdev; \
41 \
42 pdev = to_pci_dev(dev); \
43 return sprintf(buf, format_string, pdev->field); \
44} \
45static DEVICE_ATTR_RO(field)
46
47pci_config_attr(vendor, "0x%04x\n");
48pci_config_attr(device, "0x%04x\n");
49pci_config_attr(subsystem_vendor, "0x%04x\n");
50pci_config_attr(subsystem_device, "0x%04x\n");
51pci_config_attr(revision, "0x%02x\n");
52pci_config_attr(class, "0x%06x\n");
53pci_config_attr(irq, "%u\n");
54
55static ssize_t broken_parity_status_show(struct device *dev,
56 struct device_attribute *attr,
57 char *buf)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60 return sprintf(buf, "%u\n", pdev->broken_parity_status);
61}
62
63static ssize_t broken_parity_status_store(struct device *dev,
64 struct device_attribute *attr,
65 const char *buf, size_t count)
66{
67 struct pci_dev *pdev = to_pci_dev(dev);
68 unsigned long val;
69
70 if (kstrtoul(buf, 0, &val) < 0)
71 return -EINVAL;
72
73 pdev->broken_parity_status = !!val;
74
75 return count;
76}
77static DEVICE_ATTR_RW(broken_parity_status);
78
79static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
80 struct device_attribute *attr, char *buf)
81{
82 const struct cpumask *mask;
83
84#ifdef CONFIG_NUMA
85 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
86 cpumask_of_node(dev_to_node(dev));
87#else
88 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
89#endif
90 return cpumap_print_to_pagebuf(list, buf, mask);
91}
92
93static ssize_t local_cpus_show(struct device *dev,
94 struct device_attribute *attr, char *buf)
95{
96 return pci_dev_show_local_cpu(dev, false, attr, buf);
97}
98static DEVICE_ATTR_RO(local_cpus);
99
100static ssize_t local_cpulist_show(struct device *dev,
101 struct device_attribute *attr, char *buf)
102{
103 return pci_dev_show_local_cpu(dev, true, attr, buf);
104}
105static DEVICE_ATTR_RO(local_cpulist);
106
107/*
108 * PCI Bus Class Devices
109 */
110static ssize_t cpuaffinity_show(struct device *dev,
111 struct device_attribute *attr, char *buf)
112{
113 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
114
115 return cpumap_print_to_pagebuf(false, buf, cpumask);
116}
117static DEVICE_ATTR_RO(cpuaffinity);
118
119static ssize_t cpulistaffinity_show(struct device *dev,
120 struct device_attribute *attr, char *buf)
121{
122 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
123
124 return cpumap_print_to_pagebuf(true, buf, cpumask);
125}
126static DEVICE_ATTR_RO(cpulistaffinity);
127
128/* show resources */
129static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
130 char *buf)
131{
132 struct pci_dev *pci_dev = to_pci_dev(dev);
133 char *str = buf;
134 int i;
135 int max;
136 resource_size_t start, end;
137
138 if (pci_dev->subordinate)
139 max = DEVICE_COUNT_RESOURCE;
140 else
141 max = PCI_BRIDGE_RESOURCES;
142
143 for (i = 0; i < max; i++) {
144 struct resource *res = &pci_dev->resource[i];
145 pci_resource_to_user(pci_dev, i, res, &start, &end);
146 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
147 (unsigned long long)start,
148 (unsigned long long)end,
149 (unsigned long long)res->flags);
150 }
151 return (str - buf);
152}
153static DEVICE_ATTR_RO(resource);
154
155static ssize_t max_link_speed_show(struct device *dev,
156 struct device_attribute *attr, char *buf)
157{
158 struct pci_dev *pdev = to_pci_dev(dev);
159
160 return sprintf(buf, "%s\n", PCIE_SPEED2STR(pcie_get_speed_cap(pdev)));
161}
162static DEVICE_ATTR_RO(max_link_speed);
163
164static ssize_t max_link_width_show(struct device *dev,
165 struct device_attribute *attr, char *buf)
166{
167 struct pci_dev *pdev = to_pci_dev(dev);
168
169 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
170}
171static DEVICE_ATTR_RO(max_link_width);
172
173static ssize_t current_link_speed_show(struct device *dev,
174 struct device_attribute *attr, char *buf)
175{
176 struct pci_dev *pci_dev = to_pci_dev(dev);
177 u16 linkstat;
178 int err;
179 const char *speed;
180
181 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
182 if (err)
183 return -EINVAL;
184
185 switch (linkstat & PCI_EXP_LNKSTA_CLS) {
186 case PCI_EXP_LNKSTA_CLS_16_0GB:
187 speed = "16 GT/s";
188 break;
189 case PCI_EXP_LNKSTA_CLS_8_0GB:
190 speed = "8 GT/s";
191 break;
192 case PCI_EXP_LNKSTA_CLS_5_0GB:
193 speed = "5 GT/s";
194 break;
195 case PCI_EXP_LNKSTA_CLS_2_5GB:
196 speed = "2.5 GT/s";
197 break;
198 default:
199 speed = "Unknown speed";
200 }
201
202 return sprintf(buf, "%s\n", speed);
203}
204static DEVICE_ATTR_RO(current_link_speed);
205
206static ssize_t current_link_width_show(struct device *dev,
207 struct device_attribute *attr, char *buf)
208{
209 struct pci_dev *pci_dev = to_pci_dev(dev);
210 u16 linkstat;
211 int err;
212
213 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
214 if (err)
215 return -EINVAL;
216
217 return sprintf(buf, "%u\n",
218 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
219}
220static DEVICE_ATTR_RO(current_link_width);
221
222static ssize_t secondary_bus_number_show(struct device *dev,
223 struct device_attribute *attr,
224 char *buf)
225{
226 struct pci_dev *pci_dev = to_pci_dev(dev);
227 u8 sec_bus;
228 int err;
229
230 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
231 if (err)
232 return -EINVAL;
233
234 return sprintf(buf, "%u\n", sec_bus);
235}
236static DEVICE_ATTR_RO(secondary_bus_number);
237
238static ssize_t subordinate_bus_number_show(struct device *dev,
239 struct device_attribute *attr,
240 char *buf)
241{
242 struct pci_dev *pci_dev = to_pci_dev(dev);
243 u8 sub_bus;
244 int err;
245
246 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
247 if (err)
248 return -EINVAL;
249
250 return sprintf(buf, "%u\n", sub_bus);
251}
252static DEVICE_ATTR_RO(subordinate_bus_number);
253
254static ssize_t ari_enabled_show(struct device *dev,
255 struct device_attribute *attr,
256 char *buf)
257{
258 struct pci_dev *pci_dev = to_pci_dev(dev);
259
260 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
261}
262static DEVICE_ATTR_RO(ari_enabled);
263
264static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
265 char *buf)
266{
267 struct pci_dev *pci_dev = to_pci_dev(dev);
268
269 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
270 pci_dev->vendor, pci_dev->device,
271 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
272 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
273 (u8)(pci_dev->class));
274}
275static DEVICE_ATTR_RO(modalias);
276
277static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
278 const char *buf, size_t count)
279{
280 struct pci_dev *pdev = to_pci_dev(dev);
281 unsigned long val;
282 ssize_t result = kstrtoul(buf, 0, &val);
283
284 if (result < 0)
285 return result;
286
287 /* this can crash the machine when done on the "wrong" device */
288 if (!capable(CAP_SYS_ADMIN))
289 return -EPERM;
290
291 if (!val) {
292 if (pci_is_enabled(pdev))
293 pci_disable_device(pdev);
294 else
295 result = -EIO;
296 } else
297 result = pci_enable_device(pdev);
298
299 return result < 0 ? result : count;
300}
301
302static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
303 char *buf)
304{
305 struct pci_dev *pdev;
306
307 pdev = to_pci_dev(dev);
308 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
309}
310static DEVICE_ATTR_RW(enable);
311
312#ifdef CONFIG_NUMA
313static ssize_t numa_node_store(struct device *dev,
314 struct device_attribute *attr, const char *buf,
315 size_t count)
316{
317 struct pci_dev *pdev = to_pci_dev(dev);
318 int node, ret;
319
320 if (!capable(CAP_SYS_ADMIN))
321 return -EPERM;
322
323 ret = kstrtoint(buf, 0, &node);
324 if (ret)
325 return ret;
326
327 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
328 return -EINVAL;
329
330 if (node != NUMA_NO_NODE && !node_online(node))
331 return -EINVAL;
332
333 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
334 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
335 node);
336
337 dev->numa_node = node;
338 return count;
339}
340
341static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
342 char *buf)
343{
344 return sprintf(buf, "%d\n", dev->numa_node);
345}
346static DEVICE_ATTR_RW(numa_node);
347#endif
348
349static ssize_t dma_mask_bits_show(struct device *dev,
350 struct device_attribute *attr, char *buf)
351{
352 struct pci_dev *pdev = to_pci_dev(dev);
353
354 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
355}
356static DEVICE_ATTR_RO(dma_mask_bits);
357
358static ssize_t consistent_dma_mask_bits_show(struct device *dev,
359 struct device_attribute *attr,
360 char *buf)
361{
362 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
363}
364static DEVICE_ATTR_RO(consistent_dma_mask_bits);
365
366static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
367 char *buf)
368{
369 struct pci_dev *pdev = to_pci_dev(dev);
370 struct pci_bus *subordinate = pdev->subordinate;
371
372 return sprintf(buf, "%u\n", subordinate ?
373 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
374 : !pdev->no_msi);
375}
376
377static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
378 const char *buf, size_t count)
379{
380 struct pci_dev *pdev = to_pci_dev(dev);
381 struct pci_bus *subordinate = pdev->subordinate;
382 unsigned long val;
383
384 if (kstrtoul(buf, 0, &val) < 0)
385 return -EINVAL;
386
387 if (!capable(CAP_SYS_ADMIN))
388 return -EPERM;
389
390 /*
391 * "no_msi" and "bus_flags" only affect what happens when a driver
392 * requests MSI or MSI-X. They don't affect any drivers that have
393 * already requested MSI or MSI-X.
394 */
395 if (!subordinate) {
396 pdev->no_msi = !val;
397 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
398 val ? "allowed" : "disallowed");
399 return count;
400 }
401
402 if (val)
403 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
404 else
405 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
406
407 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
408 val ? "allowed" : "disallowed");
409 return count;
410}
411static DEVICE_ATTR_RW(msi_bus);
412
413static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
414 size_t count)
415{
416 unsigned long val;
417 struct pci_bus *b = NULL;
418
419 if (kstrtoul(buf, 0, &val) < 0)
420 return -EINVAL;
421
422 if (val) {
423 pci_lock_rescan_remove();
424 while ((b = pci_find_next_bus(b)) != NULL)
425 pci_rescan_bus(b);
426 pci_unlock_rescan_remove();
427 }
428 return count;
429}
430static BUS_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store);
431
432static struct attribute *pci_bus_attrs[] = {
433 &bus_attr_rescan.attr,
434 NULL,
435};
436
437static const struct attribute_group pci_bus_group = {
438 .attrs = pci_bus_attrs,
439};
440
441const struct attribute_group *pci_bus_groups[] = {
442 &pci_bus_group,
443 NULL,
444};
445
446static ssize_t dev_rescan_store(struct device *dev,
447 struct device_attribute *attr, const char *buf,
448 size_t count)
449{
450 unsigned long val;
451 struct pci_dev *pdev = to_pci_dev(dev);
452
453 if (kstrtoul(buf, 0, &val) < 0)
454 return -EINVAL;
455
456 if (val) {
457 pci_lock_rescan_remove();
458 pci_rescan_bus(pdev->bus);
459 pci_unlock_rescan_remove();
460 }
461 return count;
462}
463static struct device_attribute dev_rescan_attr = __ATTR(rescan,
464 (S_IWUSR|S_IWGRP),
465 NULL, dev_rescan_store);
466
467static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
468 const char *buf, size_t count)
469{
470 unsigned long val;
471
472 if (kstrtoul(buf, 0, &val) < 0)
473 return -EINVAL;
474
475 if (val && device_remove_file_self(dev, attr))
476 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
477 return count;
478}
479static struct device_attribute dev_remove_attr = __ATTR(remove,
480 (S_IWUSR|S_IWGRP),
481 NULL, remove_store);
482
483static ssize_t dev_bus_rescan_store(struct device *dev,
484 struct device_attribute *attr,
485 const char *buf, size_t count)
486{
487 unsigned long val;
488 struct pci_bus *bus = to_pci_bus(dev);
489
490 if (kstrtoul(buf, 0, &val) < 0)
491 return -EINVAL;
492
493 if (val) {
494 pci_lock_rescan_remove();
495 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
496 pci_rescan_bus_bridge_resize(bus->self);
497 else
498 pci_rescan_bus(bus);
499 pci_unlock_rescan_remove();
500 }
501 return count;
502}
503static DEVICE_ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store);
504
505#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
506static ssize_t d3cold_allowed_store(struct device *dev,
507 struct device_attribute *attr,
508 const char *buf, size_t count)
509{
510 struct pci_dev *pdev = to_pci_dev(dev);
511 unsigned long val;
512
513 if (kstrtoul(buf, 0, &val) < 0)
514 return -EINVAL;
515
516 pdev->d3cold_allowed = !!val;
517 if (pdev->d3cold_allowed)
518 pci_d3cold_enable(pdev);
519 else
520 pci_d3cold_disable(pdev);
521
522 pm_runtime_resume(dev);
523
524 return count;
525}
526
527static ssize_t d3cold_allowed_show(struct device *dev,
528 struct device_attribute *attr, char *buf)
529{
530 struct pci_dev *pdev = to_pci_dev(dev);
531 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
532}
533static DEVICE_ATTR_RW(d3cold_allowed);
534#endif
535
536#ifdef CONFIG_OF
537static ssize_t devspec_show(struct device *dev,
538 struct device_attribute *attr, char *buf)
539{
540 struct pci_dev *pdev = to_pci_dev(dev);
541 struct device_node *np = pci_device_to_OF_node(pdev);
542
543 if (np == NULL)
544 return 0;
545 return sprintf(buf, "%pOF", np);
546}
547static DEVICE_ATTR_RO(devspec);
548#endif
549
550#ifdef CONFIG_PCI_IOV
551static ssize_t sriov_totalvfs_show(struct device *dev,
552 struct device_attribute *attr,
553 char *buf)
554{
555 struct pci_dev *pdev = to_pci_dev(dev);
556
557 return sprintf(buf, "%u\n", pci_sriov_get_totalvfs(pdev));
558}
559
560
561static ssize_t sriov_numvfs_show(struct device *dev,
562 struct device_attribute *attr,
563 char *buf)
564{
565 struct pci_dev *pdev = to_pci_dev(dev);
566
567 return sprintf(buf, "%u\n", pdev->sriov->num_VFs);
568}
569
570/*
571 * num_vfs > 0; number of VFs to enable
572 * num_vfs = 0; disable all VFs
573 *
574 * Note: SRIOV spec doesn't allow partial VF
575 * disable, so it's all or none.
576 */
577static ssize_t sriov_numvfs_store(struct device *dev,
578 struct device_attribute *attr,
579 const char *buf, size_t count)
580{
581 struct pci_dev *pdev = to_pci_dev(dev);
582 int ret;
583 u16 num_vfs;
584
585 ret = kstrtou16(buf, 0, &num_vfs);
586 if (ret < 0)
587 return ret;
588
589 if (num_vfs > pci_sriov_get_totalvfs(pdev))
590 return -ERANGE;
591
592 device_lock(&pdev->dev);
593
594 if (num_vfs == pdev->sriov->num_VFs)
595 goto exit;
596
597 /* is PF driver loaded w/callback */
598 if (!pdev->driver || !pdev->driver->sriov_configure) {
599 pci_info(pdev, "Driver doesn't support SRIOV configuration via sysfs\n");
600 ret = -ENOENT;
601 goto exit;
602 }
603
604 if (num_vfs == 0) {
605 /* disable VFs */
606 ret = pdev->driver->sriov_configure(pdev, 0);
607 goto exit;
608 }
609
610 /* enable VFs */
611 if (pdev->sriov->num_VFs) {
612 pci_warn(pdev, "%d VFs already enabled. Disable before enabling %d VFs\n",
613 pdev->sriov->num_VFs, num_vfs);
614 ret = -EBUSY;
615 goto exit;
616 }
617
618 ret = pdev->driver->sriov_configure(pdev, num_vfs);
619 if (ret < 0)
620 goto exit;
621
622 if (ret != num_vfs)
623 pci_warn(pdev, "%d VFs requested; only %d enabled\n",
624 num_vfs, ret);
625
626exit:
627 device_unlock(&pdev->dev);
628
629 if (ret < 0)
630 return ret;
631
632 return count;
633}
634
635static ssize_t sriov_offset_show(struct device *dev,
636 struct device_attribute *attr,
637 char *buf)
638{
639 struct pci_dev *pdev = to_pci_dev(dev);
640
641 return sprintf(buf, "%u\n", pdev->sriov->offset);
642}
643
644static ssize_t sriov_stride_show(struct device *dev,
645 struct device_attribute *attr,
646 char *buf)
647{
648 struct pci_dev *pdev = to_pci_dev(dev);
649
650 return sprintf(buf, "%u\n", pdev->sriov->stride);
651}
652
653static ssize_t sriov_vf_device_show(struct device *dev,
654 struct device_attribute *attr,
655 char *buf)
656{
657 struct pci_dev *pdev = to_pci_dev(dev);
658
659 return sprintf(buf, "%x\n", pdev->sriov->vf_device);
660}
661
662static ssize_t sriov_drivers_autoprobe_show(struct device *dev,
663 struct device_attribute *attr,
664 char *buf)
665{
666 struct pci_dev *pdev = to_pci_dev(dev);
667
668 return sprintf(buf, "%u\n", pdev->sriov->drivers_autoprobe);
669}
670
671static ssize_t sriov_drivers_autoprobe_store(struct device *dev,
672 struct device_attribute *attr,
673 const char *buf, size_t count)
674{
675 struct pci_dev *pdev = to_pci_dev(dev);
676 bool drivers_autoprobe;
677
678 if (kstrtobool(buf, &drivers_autoprobe) < 0)
679 return -EINVAL;
680
681 pdev->sriov->drivers_autoprobe = drivers_autoprobe;
682
683 return count;
684}
685
686static struct device_attribute sriov_totalvfs_attr = __ATTR_RO(sriov_totalvfs);
687static struct device_attribute sriov_numvfs_attr =
688 __ATTR(sriov_numvfs, (S_IRUGO|S_IWUSR|S_IWGRP),
689 sriov_numvfs_show, sriov_numvfs_store);
690static struct device_attribute sriov_offset_attr = __ATTR_RO(sriov_offset);
691static struct device_attribute sriov_stride_attr = __ATTR_RO(sriov_stride);
692static struct device_attribute sriov_vf_device_attr = __ATTR_RO(sriov_vf_device);
693static struct device_attribute sriov_drivers_autoprobe_attr =
694 __ATTR(sriov_drivers_autoprobe, (S_IRUGO|S_IWUSR|S_IWGRP),
695 sriov_drivers_autoprobe_show, sriov_drivers_autoprobe_store);
696#endif /* CONFIG_PCI_IOV */
697
698static ssize_t driver_override_store(struct device *dev,
699 struct device_attribute *attr,
700 const char *buf, size_t count)
701{
702 struct pci_dev *pdev = to_pci_dev(dev);
703 char *driver_override, *old, *cp;
704
705 /* We need to keep extra room for a newline */
706 if (count >= (PAGE_SIZE - 1))
707 return -EINVAL;
708
709 driver_override = kstrndup(buf, count, GFP_KERNEL);
710 if (!driver_override)
711 return -ENOMEM;
712
713 cp = strchr(driver_override, '\n');
714 if (cp)
715 *cp = '\0';
716
717 device_lock(dev);
718 old = pdev->driver_override;
719 if (strlen(driver_override)) {
720 pdev->driver_override = driver_override;
721 } else {
722 kfree(driver_override);
723 pdev->driver_override = NULL;
724 }
725 device_unlock(dev);
726
727 kfree(old);
728
729 return count;
730}
731
732static ssize_t driver_override_show(struct device *dev,
733 struct device_attribute *attr, char *buf)
734{
735 struct pci_dev *pdev = to_pci_dev(dev);
736 ssize_t len;
737
738 device_lock(dev);
739 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
740 device_unlock(dev);
741 return len;
742}
743static DEVICE_ATTR_RW(driver_override);
744
745static struct attribute *pci_dev_attrs[] = {
746 &dev_attr_resource.attr,
747 &dev_attr_vendor.attr,
748 &dev_attr_device.attr,
749 &dev_attr_subsystem_vendor.attr,
750 &dev_attr_subsystem_device.attr,
751 &dev_attr_revision.attr,
752 &dev_attr_class.attr,
753 &dev_attr_irq.attr,
754 &dev_attr_local_cpus.attr,
755 &dev_attr_local_cpulist.attr,
756 &dev_attr_modalias.attr,
757#ifdef CONFIG_NUMA
758 &dev_attr_numa_node.attr,
759#endif
760 &dev_attr_dma_mask_bits.attr,
761 &dev_attr_consistent_dma_mask_bits.attr,
762 &dev_attr_enable.attr,
763 &dev_attr_broken_parity_status.attr,
764 &dev_attr_msi_bus.attr,
765#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
766 &dev_attr_d3cold_allowed.attr,
767#endif
768#ifdef CONFIG_OF
769 &dev_attr_devspec.attr,
770#endif
771 &dev_attr_driver_override.attr,
772 &dev_attr_ari_enabled.attr,
773 NULL,
774};
775
776static struct attribute *pci_bridge_attrs[] = {
777 &dev_attr_subordinate_bus_number.attr,
778 &dev_attr_secondary_bus_number.attr,
779 NULL,
780};
781
782static struct attribute *pcie_dev_attrs[] = {
783 &dev_attr_current_link_speed.attr,
784 &dev_attr_current_link_width.attr,
785 &dev_attr_max_link_width.attr,
786 &dev_attr_max_link_speed.attr,
787 NULL,
788};
789
790static struct attribute *pcibus_attrs[] = {
791 &dev_attr_rescan.attr,
792 &dev_attr_cpuaffinity.attr,
793 &dev_attr_cpulistaffinity.attr,
794 NULL,
795};
796
797static const struct attribute_group pcibus_group = {
798 .attrs = pcibus_attrs,
799};
800
801const struct attribute_group *pcibus_groups[] = {
802 &pcibus_group,
803 NULL,
804};
805
806static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
807 char *buf)
808{
809 struct pci_dev *pdev = to_pci_dev(dev);
810 struct pci_dev *vga_dev = vga_default_device();
811
812 if (vga_dev)
813 return sprintf(buf, "%u\n", (pdev == vga_dev));
814
815 return sprintf(buf, "%u\n",
816 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
817 IORESOURCE_ROM_SHADOW));
818}
819static struct device_attribute vga_attr = __ATTR_RO(boot_vga);
820
821static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
822 struct bin_attribute *bin_attr, char *buf,
823 loff_t off, size_t count)
824{
825 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
826 unsigned int size = 64;
827 loff_t init_off = off;
828 u8 *data = (u8 *) buf;
829
830 /* Several chips lock up trying to read undefined config space */
831 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
832 size = dev->cfg_size;
833 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
834 size = 128;
835
836 if (off > size)
837 return 0;
838 if (off + count > size) {
839 size -= off;
840 count = size;
841 } else {
842 size = count;
843 }
844
845 pci_config_pm_runtime_get(dev);
846
847 if ((off & 1) && size) {
848 u8 val;
849 pci_user_read_config_byte(dev, off, &val);
850 data[off - init_off] = val;
851 off++;
852 size--;
853 }
854
855 if ((off & 3) && size > 2) {
856 u16 val;
857 pci_user_read_config_word(dev, off, &val);
858 data[off - init_off] = val & 0xff;
859 data[off - init_off + 1] = (val >> 8) & 0xff;
860 off += 2;
861 size -= 2;
862 }
863
864 while (size > 3) {
865 u32 val;
866 pci_user_read_config_dword(dev, off, &val);
867 data[off - init_off] = val & 0xff;
868 data[off - init_off + 1] = (val >> 8) & 0xff;
869 data[off - init_off + 2] = (val >> 16) & 0xff;
870 data[off - init_off + 3] = (val >> 24) & 0xff;
871 off += 4;
872 size -= 4;
873 }
874
875 if (size >= 2) {
876 u16 val;
877 pci_user_read_config_word(dev, off, &val);
878 data[off - init_off] = val & 0xff;
879 data[off - init_off + 1] = (val >> 8) & 0xff;
880 off += 2;
881 size -= 2;
882 }
883
884 if (size > 0) {
885 u8 val;
886 pci_user_read_config_byte(dev, off, &val);
887 data[off - init_off] = val;
888 off++;
889 --size;
890 }
891
892 pci_config_pm_runtime_put(dev);
893
894 return count;
895}
896
897static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
898 struct bin_attribute *bin_attr, char *buf,
899 loff_t off, size_t count)
900{
901 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
902 unsigned int size = count;
903 loff_t init_off = off;
904 u8 *data = (u8 *) buf;
905
906 if (off > dev->cfg_size)
907 return 0;
908 if (off + count > dev->cfg_size) {
909 size = dev->cfg_size - off;
910 count = size;
911 }
912
913 pci_config_pm_runtime_get(dev);
914
915 if ((off & 1) && size) {
916 pci_user_write_config_byte(dev, off, data[off - init_off]);
917 off++;
918 size--;
919 }
920
921 if ((off & 3) && size > 2) {
922 u16 val = data[off - init_off];
923 val |= (u16) data[off - init_off + 1] << 8;
924 pci_user_write_config_word(dev, off, val);
925 off += 2;
926 size -= 2;
927 }
928
929 while (size > 3) {
930 u32 val = data[off - init_off];
931 val |= (u32) data[off - init_off + 1] << 8;
932 val |= (u32) data[off - init_off + 2] << 16;
933 val |= (u32) data[off - init_off + 3] << 24;
934 pci_user_write_config_dword(dev, off, val);
935 off += 4;
936 size -= 4;
937 }
938
939 if (size >= 2) {
940 u16 val = data[off - init_off];
941 val |= (u16) data[off - init_off + 1] << 8;
942 pci_user_write_config_word(dev, off, val);
943 off += 2;
944 size -= 2;
945 }
946
947 if (size) {
948 pci_user_write_config_byte(dev, off, data[off - init_off]);
949 off++;
950 --size;
951 }
952
953 pci_config_pm_runtime_put(dev);
954
955 return count;
956}
957
958#ifdef HAVE_PCI_LEGACY
959/**
960 * pci_read_legacy_io - read byte(s) from legacy I/O port space
961 * @filp: open sysfs file
962 * @kobj: kobject corresponding to file to read from
963 * @bin_attr: struct bin_attribute for this file
964 * @buf: buffer to store results
965 * @off: offset into legacy I/O port space
966 * @count: number of bytes to read
967 *
968 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
969 * callback routine (pci_legacy_read).
970 */
971static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
972 struct bin_attribute *bin_attr, char *buf,
973 loff_t off, size_t count)
974{
975 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
976
977 /* Only support 1, 2 or 4 byte accesses */
978 if (count != 1 && count != 2 && count != 4)
979 return -EINVAL;
980
981 return pci_legacy_read(bus, off, (u32 *)buf, count);
982}
983
984/**
985 * pci_write_legacy_io - write byte(s) to legacy I/O port space
986 * @filp: open sysfs file
987 * @kobj: kobject corresponding to file to read from
988 * @bin_attr: struct bin_attribute for this file
989 * @buf: buffer containing value to be written
990 * @off: offset into legacy I/O port space
991 * @count: number of bytes to write
992 *
993 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
994 * callback routine (pci_legacy_write).
995 */
996static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
997 struct bin_attribute *bin_attr, char *buf,
998 loff_t off, size_t count)
999{
1000 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1001
1002 /* Only support 1, 2 or 4 byte accesses */
1003 if (count != 1 && count != 2 && count != 4)
1004 return -EINVAL;
1005
1006 return pci_legacy_write(bus, off, *(u32 *)buf, count);
1007}
1008
1009/**
1010 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
1011 * @filp: open sysfs file
1012 * @kobj: kobject corresponding to device to be mapped
1013 * @attr: struct bin_attribute for this file
1014 * @vma: struct vm_area_struct passed to mmap
1015 *
1016 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
1017 * legacy memory space (first meg of bus space) into application virtual
1018 * memory space.
1019 */
1020static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
1021 struct bin_attribute *attr,
1022 struct vm_area_struct *vma)
1023{
1024 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1025
1026 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
1027}
1028
1029/**
1030 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
1031 * @filp: open sysfs file
1032 * @kobj: kobject corresponding to device to be mapped
1033 * @attr: struct bin_attribute for this file
1034 * @vma: struct vm_area_struct passed to mmap
1035 *
1036 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
1037 * legacy IO space (first meg of bus space) into application virtual
1038 * memory space. Returns -ENOSYS if the operation isn't supported
1039 */
1040static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
1041 struct bin_attribute *attr,
1042 struct vm_area_struct *vma)
1043{
1044 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
1045
1046 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
1047}
1048
1049/**
1050 * pci_adjust_legacy_attr - adjustment of legacy file attributes
1051 * @b: bus to create files under
1052 * @mmap_type: I/O port or memory
1053 *
1054 * Stub implementation. Can be overridden by arch if necessary.
1055 */
1056void __weak pci_adjust_legacy_attr(struct pci_bus *b,
1057 enum pci_mmap_state mmap_type)
1058{
1059}
1060
1061/**
1062 * pci_create_legacy_files - create legacy I/O port and memory files
1063 * @b: bus to create files under
1064 *
1065 * Some platforms allow access to legacy I/O port and ISA memory space on
1066 * a per-bus basis. This routine creates the files and ties them into
1067 * their associated read, write and mmap files from pci-sysfs.c
1068 *
1069 * On error unwind, but don't propagate the error to the caller
1070 * as it is ok to set up the PCI bus without these files.
1071 */
1072void pci_create_legacy_files(struct pci_bus *b)
1073{
1074 int error;
1075
1076 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
1077 GFP_ATOMIC);
1078 if (!b->legacy_io)
1079 goto kzalloc_err;
1080
1081 sysfs_bin_attr_init(b->legacy_io);
1082 b->legacy_io->attr.name = "legacy_io";
1083 b->legacy_io->size = 0xffff;
1084 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
1085 b->legacy_io->read = pci_read_legacy_io;
1086 b->legacy_io->write = pci_write_legacy_io;
1087 b->legacy_io->mmap = pci_mmap_legacy_io;
1088 pci_adjust_legacy_attr(b, pci_mmap_io);
1089 error = device_create_bin_file(&b->dev, b->legacy_io);
1090 if (error)
1091 goto legacy_io_err;
1092
1093 /* Allocated above after the legacy_io struct */
1094 b->legacy_mem = b->legacy_io + 1;
1095 sysfs_bin_attr_init(b->legacy_mem);
1096 b->legacy_mem->attr.name = "legacy_mem";
1097 b->legacy_mem->size = 1024*1024;
1098 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
1099 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1100 pci_adjust_legacy_attr(b, pci_mmap_mem);
1101 error = device_create_bin_file(&b->dev, b->legacy_mem);
1102 if (error)
1103 goto legacy_mem_err;
1104
1105 return;
1106
1107legacy_mem_err:
1108 device_remove_bin_file(&b->dev, b->legacy_io);
1109legacy_io_err:
1110 kfree(b->legacy_io);
1111 b->legacy_io = NULL;
1112kzalloc_err:
1113 printk(KERN_WARNING "pci: warning: could not create legacy I/O port and ISA memory resources to sysfs\n");
1114 return;
1115}
1116
1117void pci_remove_legacy_files(struct pci_bus *b)
1118{
1119 if (b->legacy_io) {
1120 device_remove_bin_file(&b->dev, b->legacy_io);
1121 device_remove_bin_file(&b->dev, b->legacy_mem);
1122 kfree(b->legacy_io); /* both are allocated here */
1123 }
1124}
1125#endif /* HAVE_PCI_LEGACY */
1126
1127#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1128
1129int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1130 enum pci_mmap_api mmap_api)
1131{
1132 unsigned long nr, start, size;
1133 resource_size_t pci_start = 0, pci_end;
1134
1135 if (pci_resource_len(pdev, resno) == 0)
1136 return 0;
1137 nr = vma_pages(vma);
1138 start = vma->vm_pgoff;
1139 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1140 if (mmap_api == PCI_MMAP_PROCFS) {
1141 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1142 &pci_start, &pci_end);
1143 pci_start >>= PAGE_SHIFT;
1144 }
1145 if (start >= pci_start && start < pci_start + size &&
1146 start + nr <= pci_start + size)
1147 return 1;
1148 return 0;
1149}
1150
1151/**
1152 * pci_mmap_resource - map a PCI resource into user memory space
1153 * @kobj: kobject for mapping
1154 * @attr: struct bin_attribute for the file being mapped
1155 * @vma: struct vm_area_struct passed into the mmap
1156 * @write_combine: 1 for write_combine mapping
1157 *
1158 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1159 */
1160static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1161 struct vm_area_struct *vma, int write_combine)
1162{
1163 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1164 int bar = (unsigned long)attr->private;
1165 enum pci_mmap_state mmap_type;
1166 struct resource *res = &pdev->resource[bar];
1167
1168 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1169 return -EINVAL;
1170
1171 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1172 return -EINVAL;
1173
1174 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1175
1176 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1177}
1178
1179static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1180 struct bin_attribute *attr,
1181 struct vm_area_struct *vma)
1182{
1183 return pci_mmap_resource(kobj, attr, vma, 0);
1184}
1185
1186static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1187 struct bin_attribute *attr,
1188 struct vm_area_struct *vma)
1189{
1190 return pci_mmap_resource(kobj, attr, vma, 1);
1191}
1192
1193static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1194 struct bin_attribute *attr, char *buf,
1195 loff_t off, size_t count, bool write)
1196{
1197 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1198 int bar = (unsigned long)attr->private;
1199 unsigned long port = off;
1200
1201 port += pci_resource_start(pdev, bar);
1202
1203 if (port > pci_resource_end(pdev, bar))
1204 return 0;
1205
1206 if (port + count - 1 > pci_resource_end(pdev, bar))
1207 return -EINVAL;
1208
1209 switch (count) {
1210 case 1:
1211 if (write)
1212 outb(*(u8 *)buf, port);
1213 else
1214 *(u8 *)buf = inb(port);
1215 return 1;
1216 case 2:
1217 if (write)
1218 outw(*(u16 *)buf, port);
1219 else
1220 *(u16 *)buf = inw(port);
1221 return 2;
1222 case 4:
1223 if (write)
1224 outl(*(u32 *)buf, port);
1225 else
1226 *(u32 *)buf = inl(port);
1227 return 4;
1228 }
1229 return -EINVAL;
1230}
1231
1232static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1233 struct bin_attribute *attr, char *buf,
1234 loff_t off, size_t count)
1235{
1236 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1237}
1238
1239static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1240 struct bin_attribute *attr, char *buf,
1241 loff_t off, size_t count)
1242{
1243 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1244}
1245
1246/**
1247 * pci_remove_resource_files - cleanup resource files
1248 * @pdev: dev to cleanup
1249 *
1250 * If we created resource files for @pdev, remove them from sysfs and
1251 * free their resources.
1252 */
1253static void pci_remove_resource_files(struct pci_dev *pdev)
1254{
1255 int i;
1256
1257 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1258 struct bin_attribute *res_attr;
1259
1260 res_attr = pdev->res_attr[i];
1261 if (res_attr) {
1262 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1263 kfree(res_attr);
1264 }
1265
1266 res_attr = pdev->res_attr_wc[i];
1267 if (res_attr) {
1268 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1269 kfree(res_attr);
1270 }
1271 }
1272}
1273
1274static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1275{
1276 /* allocate attribute structure, piggyback attribute name */
1277 int name_len = write_combine ? 13 : 10;
1278 struct bin_attribute *res_attr;
1279 char *res_attr_name;
1280 int retval;
1281
1282 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1283 if (!res_attr)
1284 return -ENOMEM;
1285
1286 res_attr_name = (char *)(res_attr + 1);
1287
1288 sysfs_bin_attr_init(res_attr);
1289 if (write_combine) {
1290 pdev->res_attr_wc[num] = res_attr;
1291 sprintf(res_attr_name, "resource%d_wc", num);
1292 res_attr->mmap = pci_mmap_resource_wc;
1293 } else {
1294 pdev->res_attr[num] = res_attr;
1295 sprintf(res_attr_name, "resource%d", num);
1296 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1297 res_attr->read = pci_read_resource_io;
1298 res_attr->write = pci_write_resource_io;
1299 if (arch_can_pci_mmap_io())
1300 res_attr->mmap = pci_mmap_resource_uc;
1301 } else {
1302 res_attr->mmap = pci_mmap_resource_uc;
1303 }
1304 }
1305 res_attr->attr.name = res_attr_name;
1306 res_attr->attr.mode = S_IRUSR | S_IWUSR;
1307 res_attr->size = pci_resource_len(pdev, num);
1308 res_attr->private = (void *)(unsigned long)num;
1309 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1310 if (retval)
1311 kfree(res_attr);
1312
1313 return retval;
1314}
1315
1316/**
1317 * pci_create_resource_files - create resource files in sysfs for @dev
1318 * @pdev: dev in question
1319 *
1320 * Walk the resources in @pdev creating files for each resource available.
1321 */
1322static int pci_create_resource_files(struct pci_dev *pdev)
1323{
1324 int i;
1325 int retval;
1326
1327 /* Expose the PCI resources from this device as files */
1328 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
1329
1330 /* skip empty resources */
1331 if (!pci_resource_len(pdev, i))
1332 continue;
1333
1334 retval = pci_create_attr(pdev, i, 0);
1335 /* for prefetchable resources, create a WC mappable file */
1336 if (!retval && arch_can_pci_mmap_wc() &&
1337 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1338 retval = pci_create_attr(pdev, i, 1);
1339 if (retval) {
1340 pci_remove_resource_files(pdev);
1341 return retval;
1342 }
1343 }
1344 return 0;
1345}
1346#else /* !HAVE_PCI_MMAP */
1347int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1348void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1349#endif /* HAVE_PCI_MMAP */
1350
1351/**
1352 * pci_write_rom - used to enable access to the PCI ROM display
1353 * @filp: sysfs file
1354 * @kobj: kernel object handle
1355 * @bin_attr: struct bin_attribute for this file
1356 * @buf: user input
1357 * @off: file offset
1358 * @count: number of byte in input
1359 *
1360 * writing anything except 0 enables it
1361 */
1362static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1363 struct bin_attribute *bin_attr, char *buf,
1364 loff_t off, size_t count)
1365{
1366 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1367
1368 if ((off == 0) && (*buf == '0') && (count == 2))
1369 pdev->rom_attr_enabled = 0;
1370 else
1371 pdev->rom_attr_enabled = 1;
1372
1373 return count;
1374}
1375
1376/**
1377 * pci_read_rom - read a PCI ROM
1378 * @filp: sysfs file
1379 * @kobj: kernel object handle
1380 * @bin_attr: struct bin_attribute for this file
1381 * @buf: where to put the data we read from the ROM
1382 * @off: file offset
1383 * @count: number of bytes to read
1384 *
1385 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1386 * device corresponding to @kobj.
1387 */
1388static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1389 struct bin_attribute *bin_attr, char *buf,
1390 loff_t off, size_t count)
1391{
1392 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1393 void __iomem *rom;
1394 size_t size;
1395
1396 if (!pdev->rom_attr_enabled)
1397 return -EINVAL;
1398
1399 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1400 if (!rom || !size)
1401 return -EIO;
1402
1403 if (off >= size)
1404 count = 0;
1405 else {
1406 if (off + count > size)
1407 count = size - off;
1408
1409 memcpy_fromio(buf, rom + off, count);
1410 }
1411 pci_unmap_rom(pdev, rom);
1412
1413 return count;
1414}
1415
1416static const struct bin_attribute pci_config_attr = {
1417 .attr = {
1418 .name = "config",
1419 .mode = S_IRUGO | S_IWUSR,
1420 },
1421 .size = PCI_CFG_SPACE_SIZE,
1422 .read = pci_read_config,
1423 .write = pci_write_config,
1424};
1425
1426static const struct bin_attribute pcie_config_attr = {
1427 .attr = {
1428 .name = "config",
1429 .mode = S_IRUGO | S_IWUSR,
1430 },
1431 .size = PCI_CFG_SPACE_EXP_SIZE,
1432 .read = pci_read_config,
1433 .write = pci_write_config,
1434};
1435
1436static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1437 const char *buf, size_t count)
1438{
1439 struct pci_dev *pdev = to_pci_dev(dev);
1440 unsigned long val;
1441 ssize_t result = kstrtoul(buf, 0, &val);
1442
1443 if (result < 0)
1444 return result;
1445
1446 if (val != 1)
1447 return -EINVAL;
1448
1449 result = pci_reset_function(pdev);
1450 if (result < 0)
1451 return result;
1452
1453 return count;
1454}
1455
1456static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1457
1458static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1459{
1460 int retval;
1461
1462 pcie_vpd_create_sysfs_dev_files(dev);
1463 pcie_aspm_create_sysfs_dev_files(dev);
1464
1465 if (dev->reset_fn) {
1466 retval = device_create_file(&dev->dev, &reset_attr);
1467 if (retval)
1468 goto error;
1469 }
1470 return 0;
1471
1472error:
1473 pcie_aspm_remove_sysfs_dev_files(dev);
1474 pcie_vpd_remove_sysfs_dev_files(dev);
1475 return retval;
1476}
1477
1478int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1479{
1480 int retval;
1481 int rom_size;
1482 struct bin_attribute *attr;
1483
1484 if (!sysfs_initialized)
1485 return -EACCES;
1486
1487 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1488 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1489 else
1490 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1491 if (retval)
1492 goto err;
1493
1494 retval = pci_create_resource_files(pdev);
1495 if (retval)
1496 goto err_config_file;
1497
1498 /* If the device has a ROM, try to expose it in sysfs. */
1499 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1500 if (rom_size) {
1501 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1502 if (!attr) {
1503 retval = -ENOMEM;
1504 goto err_resource_files;
1505 }
1506 sysfs_bin_attr_init(attr);
1507 attr->size = rom_size;
1508 attr->attr.name = "rom";
1509 attr->attr.mode = S_IRUSR | S_IWUSR;
1510 attr->read = pci_read_rom;
1511 attr->write = pci_write_rom;
1512 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1513 if (retval) {
1514 kfree(attr);
1515 goto err_resource_files;
1516 }
1517 pdev->rom_attr = attr;
1518 }
1519
1520 /* add sysfs entries for various capabilities */
1521 retval = pci_create_capabilities_sysfs(pdev);
1522 if (retval)
1523 goto err_rom_file;
1524
1525 pci_create_firmware_label_files(pdev);
1526
1527 return 0;
1528
1529err_rom_file:
1530 if (pdev->rom_attr) {
1531 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1532 kfree(pdev->rom_attr);
1533 pdev->rom_attr = NULL;
1534 }
1535err_resource_files:
1536 pci_remove_resource_files(pdev);
1537err_config_file:
1538 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1539 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1540 else
1541 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1542err:
1543 return retval;
1544}
1545
1546static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1547{
1548 pcie_vpd_remove_sysfs_dev_files(dev);
1549 pcie_aspm_remove_sysfs_dev_files(dev);
1550 if (dev->reset_fn) {
1551 device_remove_file(&dev->dev, &reset_attr);
1552 dev->reset_fn = 0;
1553 }
1554}
1555
1556/**
1557 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1558 * @pdev: device whose entries we should free
1559 *
1560 * Cleanup when @pdev is removed from sysfs.
1561 */
1562void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1563{
1564 if (!sysfs_initialized)
1565 return;
1566
1567 pci_remove_capabilities_sysfs(pdev);
1568
1569 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1570 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1571 else
1572 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1573
1574 pci_remove_resource_files(pdev);
1575
1576 if (pdev->rom_attr) {
1577 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1578 kfree(pdev->rom_attr);
1579 pdev->rom_attr = NULL;
1580 }
1581
1582 pci_remove_firmware_label_files(pdev);
1583}
1584
1585static int __init pci_sysfs_init(void)
1586{
1587 struct pci_dev *pdev = NULL;
1588 int retval;
1589
1590 sysfs_initialized = 1;
1591 for_each_pci_dev(pdev) {
1592 retval = pci_create_sysfs_dev_files(pdev);
1593 if (retval) {
1594 pci_dev_put(pdev);
1595 return retval;
1596 }
1597 }
1598
1599 return 0;
1600}
1601late_initcall(pci_sysfs_init);
1602
1603static struct attribute *pci_dev_dev_attrs[] = {
1604 &vga_attr.attr,
1605 NULL,
1606};
1607
1608static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1609 struct attribute *a, int n)
1610{
1611 struct device *dev = kobj_to_dev(kobj);
1612 struct pci_dev *pdev = to_pci_dev(dev);
1613
1614 if (a == &vga_attr.attr)
1615 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1616 return 0;
1617
1618 return a->mode;
1619}
1620
1621static struct attribute *pci_dev_hp_attrs[] = {
1622 &dev_remove_attr.attr,
1623 &dev_rescan_attr.attr,
1624 NULL,
1625};
1626
1627static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1628 struct attribute *a, int n)
1629{
1630 struct device *dev = kobj_to_dev(kobj);
1631 struct pci_dev *pdev = to_pci_dev(dev);
1632
1633 if (pdev->is_virtfn)
1634 return 0;
1635
1636 return a->mode;
1637}
1638
1639static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1640 struct attribute *a, int n)
1641{
1642 struct device *dev = kobj_to_dev(kobj);
1643 struct pci_dev *pdev = to_pci_dev(dev);
1644
1645 if (pci_is_bridge(pdev))
1646 return a->mode;
1647
1648 return 0;
1649}
1650
1651static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1652 struct attribute *a, int n)
1653{
1654 struct device *dev = kobj_to_dev(kobj);
1655 struct pci_dev *pdev = to_pci_dev(dev);
1656
1657 if (pci_is_pcie(pdev))
1658 return a->mode;
1659
1660 return 0;
1661}
1662
1663static const struct attribute_group pci_dev_group = {
1664 .attrs = pci_dev_attrs,
1665};
1666
1667const struct attribute_group *pci_dev_groups[] = {
1668 &pci_dev_group,
1669 NULL,
1670};
1671
1672static const struct attribute_group pci_bridge_group = {
1673 .attrs = pci_bridge_attrs,
1674};
1675
1676const struct attribute_group *pci_bridge_groups[] = {
1677 &pci_bridge_group,
1678 NULL,
1679};
1680
1681static const struct attribute_group pcie_dev_group = {
1682 .attrs = pcie_dev_attrs,
1683};
1684
1685const struct attribute_group *pcie_dev_groups[] = {
1686 &pcie_dev_group,
1687 NULL,
1688};
1689
1690static const struct attribute_group pci_dev_hp_attr_group = {
1691 .attrs = pci_dev_hp_attrs,
1692 .is_visible = pci_dev_hp_attrs_are_visible,
1693};
1694
1695#ifdef CONFIG_PCI_IOV
1696static struct attribute *sriov_dev_attrs[] = {
1697 &sriov_totalvfs_attr.attr,
1698 &sriov_numvfs_attr.attr,
1699 &sriov_offset_attr.attr,
1700 &sriov_stride_attr.attr,
1701 &sriov_vf_device_attr.attr,
1702 &sriov_drivers_autoprobe_attr.attr,
1703 NULL,
1704};
1705
1706static umode_t sriov_attrs_are_visible(struct kobject *kobj,
1707 struct attribute *a, int n)
1708{
1709 struct device *dev = kobj_to_dev(kobj);
1710
1711 if (!dev_is_pf(dev))
1712 return 0;
1713
1714 return a->mode;
1715}
1716
1717static const struct attribute_group sriov_dev_attr_group = {
1718 .attrs = sriov_dev_attrs,
1719 .is_visible = sriov_attrs_are_visible,
1720};
1721#endif /* CONFIG_PCI_IOV */
1722
1723static const struct attribute_group pci_dev_attr_group = {
1724 .attrs = pci_dev_dev_attrs,
1725 .is_visible = pci_dev_attrs_are_visible,
1726};
1727
1728static const struct attribute_group pci_bridge_attr_group = {
1729 .attrs = pci_bridge_attrs,
1730 .is_visible = pci_bridge_attrs_are_visible,
1731};
1732
1733static const struct attribute_group pcie_dev_attr_group = {
1734 .attrs = pcie_dev_attrs,
1735 .is_visible = pcie_dev_attrs_are_visible,
1736};
1737
1738static const struct attribute_group *pci_dev_attr_groups[] = {
1739 &pci_dev_attr_group,
1740 &pci_dev_hp_attr_group,
1741#ifdef CONFIG_PCI_IOV
1742 &sriov_dev_attr_group,
1743#endif
1744 &pci_bridge_attr_group,
1745 &pcie_dev_attr_group,
1746 NULL,
1747};
1748
1749const struct device_type pci_dev_type = {
1750 .groups = pci_dev_attr_groups,
1751};