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1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/export.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/sched/task_stack.h>
33#include <linux/timer.h>
34#include <linux/init.h>
35#include <linux/bug.h>
36#include <linux/nmi.h>
37#include <linux/mm.h>
38#include <linux/smp.h>
39#include <linux/io.h>
40
41#if defined(CONFIG_EDAC)
42#include <linux/edac.h>
43#endif
44
45#include <asm/stacktrace.h>
46#include <asm/processor.h>
47#include <asm/debugreg.h>
48#include <linux/atomic.h>
49#include <asm/text-patching.h>
50#include <asm/ftrace.h>
51#include <asm/traps.h>
52#include <asm/desc.h>
53#include <asm/fpu/internal.h>
54#include <asm/cpu_entry_area.h>
55#include <asm/mce.h>
56#include <asm/fixmap.h>
57#include <asm/mach_traps.h>
58#include <asm/alternative.h>
59#include <asm/fpu/xstate.h>
60#include <asm/trace/mpx.h>
61#include <asm/mpx.h>
62#include <asm/vm86.h>
63#include <asm/umip.h>
64
65#ifdef CONFIG_X86_64
66#include <asm/x86_init.h>
67#include <asm/pgalloc.h>
68#include <asm/proto.h>
69#else
70#include <asm/processor-flags.h>
71#include <asm/setup.h>
72#include <asm/proto.h>
73#endif
74
75DECLARE_BITMAP(system_vectors, NR_VECTORS);
76
77static inline void cond_local_irq_enable(struct pt_regs *regs)
78{
79 if (regs->flags & X86_EFLAGS_IF)
80 local_irq_enable();
81}
82
83static inline void cond_local_irq_disable(struct pt_regs *regs)
84{
85 if (regs->flags & X86_EFLAGS_IF)
86 local_irq_disable();
87}
88
89/*
90 * In IST context, we explicitly disable preemption. This serves two
91 * purposes: it makes it much less likely that we would accidentally
92 * schedule in IST context and it will force a warning if we somehow
93 * manage to schedule by accident.
94 */
95void ist_enter(struct pt_regs *regs)
96{
97 if (user_mode(regs)) {
98 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
99 } else {
100 /*
101 * We might have interrupted pretty much anything. In
102 * fact, if we're a machine check, we can even interrupt
103 * NMI processing. We don't want in_nmi() to return true,
104 * but we need to notify RCU.
105 */
106 rcu_nmi_enter();
107 }
108
109 preempt_disable();
110
111 /* This code is a bit fragile. Test it. */
112 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
113}
114NOKPROBE_SYMBOL(ist_enter);
115
116void ist_exit(struct pt_regs *regs)
117{
118 preempt_enable_no_resched();
119
120 if (!user_mode(regs))
121 rcu_nmi_exit();
122}
123
124/**
125 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
126 * @regs: regs passed to the IST exception handler
127 *
128 * IST exception handlers normally cannot schedule. As a special
129 * exception, if the exception interrupted userspace code (i.e.
130 * user_mode(regs) would return true) and the exception was not
131 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
132 * begins a non-atomic section within an ist_enter()/ist_exit() region.
133 * Callers are responsible for enabling interrupts themselves inside
134 * the non-atomic section, and callers must call ist_end_non_atomic()
135 * before ist_exit().
136 */
137void ist_begin_non_atomic(struct pt_regs *regs)
138{
139 BUG_ON(!user_mode(regs));
140
141 /*
142 * Sanity check: we need to be on the normal thread stack. This
143 * will catch asm bugs and any attempt to use ist_preempt_enable
144 * from double_fault.
145 */
146 BUG_ON(!on_thread_stack());
147
148 preempt_enable_no_resched();
149}
150
151/**
152 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
153 *
154 * Ends a non-atomic section started with ist_begin_non_atomic().
155 */
156void ist_end_non_atomic(void)
157{
158 preempt_disable();
159}
160
161int is_valid_bugaddr(unsigned long addr)
162{
163 unsigned short ud;
164
165 if (addr < TASK_SIZE_MAX)
166 return 0;
167
168 if (probe_kernel_address((unsigned short *)addr, ud))
169 return 0;
170
171 return ud == INSN_UD0 || ud == INSN_UD2;
172}
173
174int fixup_bug(struct pt_regs *regs, int trapnr)
175{
176 if (trapnr != X86_TRAP_UD)
177 return 0;
178
179 switch (report_bug(regs->ip, regs)) {
180 case BUG_TRAP_TYPE_NONE:
181 case BUG_TRAP_TYPE_BUG:
182 break;
183
184 case BUG_TRAP_TYPE_WARN:
185 regs->ip += LEN_UD2;
186 return 1;
187 }
188
189 return 0;
190}
191
192static nokprobe_inline int
193do_trap_no_signal(struct task_struct *tsk, int trapnr, const char *str,
194 struct pt_regs *regs, long error_code)
195{
196 if (v8086_mode(regs)) {
197 /*
198 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
199 * On nmi (interrupt 2), do_trap should not be called.
200 */
201 if (trapnr < X86_TRAP_UD) {
202 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
203 error_code, trapnr))
204 return 0;
205 }
206 } else if (!user_mode(regs)) {
207 if (fixup_exception(regs, trapnr, error_code, 0))
208 return 0;
209
210 tsk->thread.error_code = error_code;
211 tsk->thread.trap_nr = trapnr;
212 die(str, regs, error_code);
213 }
214
215 /*
216 * We want error_code and trap_nr set for userspace faults and
217 * kernelspace faults which result in die(), but not
218 * kernelspace faults which are fixed up. die() gives the
219 * process no chance to handle the signal and notice the
220 * kernel fault information, so that won't result in polluting
221 * the information about previously queued, but not yet
222 * delivered, faults. See also do_general_protection below.
223 */
224 tsk->thread.error_code = error_code;
225 tsk->thread.trap_nr = trapnr;
226
227 return -1;
228}
229
230static void show_signal(struct task_struct *tsk, int signr,
231 const char *type, const char *desc,
232 struct pt_regs *regs, long error_code)
233{
234 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
235 printk_ratelimit()) {
236 pr_info("%s[%d] %s%s ip:%lx sp:%lx error:%lx",
237 tsk->comm, task_pid_nr(tsk), type, desc,
238 regs->ip, regs->sp, error_code);
239 print_vma_addr(KERN_CONT " in ", regs->ip);
240 pr_cont("\n");
241 }
242}
243
244static void
245do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
246 long error_code, int sicode, void __user *addr)
247{
248 struct task_struct *tsk = current;
249
250
251 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
252 return;
253
254 show_signal(tsk, signr, "trap ", str, regs, error_code);
255
256 if (!sicode)
257 force_sig(signr);
258 else
259 force_sig_fault(signr, sicode, addr);
260}
261NOKPROBE_SYMBOL(do_trap);
262
263static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
264 unsigned long trapnr, int signr, int sicode, void __user *addr)
265{
266 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
267
268 /*
269 * WARN*()s end up here; fix them up before we call the
270 * notifier chain.
271 */
272 if (!user_mode(regs) && fixup_bug(regs, trapnr))
273 return;
274
275 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
276 NOTIFY_STOP) {
277 cond_local_irq_enable(regs);
278 do_trap(trapnr, signr, str, regs, error_code, sicode, addr);
279 }
280}
281
282#define IP ((void __user *)uprobe_get_trap_addr(regs))
283#define DO_ERROR(trapnr, signr, sicode, addr, str, name) \
284dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
285{ \
286 do_error_trap(regs, error_code, str, trapnr, signr, sicode, addr); \
287}
288
289DO_ERROR(X86_TRAP_DE, SIGFPE, FPE_INTDIV, IP, "divide error", divide_error)
290DO_ERROR(X86_TRAP_OF, SIGSEGV, 0, NULL, "overflow", overflow)
291DO_ERROR(X86_TRAP_UD, SIGILL, ILL_ILLOPN, IP, "invalid opcode", invalid_op)
292DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, 0, NULL, "coprocessor segment overrun", coprocessor_segment_overrun)
293DO_ERROR(X86_TRAP_TS, SIGSEGV, 0, NULL, "invalid TSS", invalid_TSS)
294DO_ERROR(X86_TRAP_NP, SIGBUS, 0, NULL, "segment not present", segment_not_present)
295DO_ERROR(X86_TRAP_SS, SIGBUS, 0, NULL, "stack segment", stack_segment)
296DO_ERROR(X86_TRAP_AC, SIGBUS, BUS_ADRALN, NULL, "alignment check", alignment_check)
297#undef IP
298
299#ifdef CONFIG_VMAP_STACK
300__visible void __noreturn handle_stack_overflow(const char *message,
301 struct pt_regs *regs,
302 unsigned long fault_address)
303{
304 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
305 (void *)fault_address, current->stack,
306 (char *)current->stack + THREAD_SIZE - 1);
307 die(message, regs, 0);
308
309 /* Be absolutely certain we don't return. */
310 panic("%s", message);
311}
312#endif
313
314#ifdef CONFIG_X86_64
315/* Runs on IST stack */
316dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code, unsigned long cr2)
317{
318 static const char str[] = "double fault";
319 struct task_struct *tsk = current;
320
321#ifdef CONFIG_X86_ESPFIX64
322 extern unsigned char native_irq_return_iret[];
323
324 /*
325 * If IRET takes a non-IST fault on the espfix64 stack, then we
326 * end up promoting it to a doublefault. In that case, take
327 * advantage of the fact that we're not using the normal (TSS.sp0)
328 * stack right now. We can write a fake #GP(0) frame at TSS.sp0
329 * and then modify our own IRET frame so that, when we return,
330 * we land directly at the #GP(0) vector with the stack already
331 * set up according to its expectations.
332 *
333 * The net result is that our #GP handler will think that we
334 * entered from usermode with the bad user context.
335 *
336 * No need for ist_enter here because we don't use RCU.
337 */
338 if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY &&
339 regs->cs == __KERNEL_CS &&
340 regs->ip == (unsigned long)native_irq_return_iret)
341 {
342 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
343
344 /*
345 * regs->sp points to the failing IRET frame on the
346 * ESPFIX64 stack. Copy it to the entry stack. This fills
347 * in gpregs->ss through gpregs->ip.
348 *
349 */
350 memmove(&gpregs->ip, (void *)regs->sp, 5*8);
351 gpregs->orig_ax = 0; /* Missing (lost) #GP error code */
352
353 /*
354 * Adjust our frame so that we return straight to the #GP
355 * vector with the expected RSP value. This is safe because
356 * we won't enable interupts or schedule before we invoke
357 * general_protection, so nothing will clobber the stack
358 * frame we just set up.
359 *
360 * We will enter general_protection with kernel GSBASE,
361 * which is what the stub expects, given that the faulting
362 * RIP will be the IRET instruction.
363 */
364 regs->ip = (unsigned long)general_protection;
365 regs->sp = (unsigned long)&gpregs->orig_ax;
366
367 return;
368 }
369#endif
370
371 ist_enter(regs);
372 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
373
374 tsk->thread.error_code = error_code;
375 tsk->thread.trap_nr = X86_TRAP_DF;
376
377#ifdef CONFIG_VMAP_STACK
378 /*
379 * If we overflow the stack into a guard page, the CPU will fail
380 * to deliver #PF and will send #DF instead. Similarly, if we
381 * take any non-IST exception while too close to the bottom of
382 * the stack, the processor will get a page fault while
383 * delivering the exception and will generate a double fault.
384 *
385 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
386 * Page-Fault Exception (#PF):
387 *
388 * Processors update CR2 whenever a page fault is detected. If a
389 * second page fault occurs while an earlier page fault is being
390 * delivered, the faulting linear address of the second fault will
391 * overwrite the contents of CR2 (replacing the previous
392 * address). These updates to CR2 occur even if the page fault
393 * results in a double fault or occurs during the delivery of a
394 * double fault.
395 *
396 * The logic below has a small possibility of incorrectly diagnosing
397 * some errors as stack overflows. For example, if the IDT or GDT
398 * gets corrupted such that #GP delivery fails due to a bad descriptor
399 * causing #GP and we hit this condition while CR2 coincidentally
400 * points to the stack guard page, we'll think we overflowed the
401 * stack. Given that we're going to panic one way or another
402 * if this happens, this isn't necessarily worth fixing.
403 *
404 * If necessary, we could improve the test by only diagnosing
405 * a stack overflow if the saved RSP points within 47 bytes of
406 * the bottom of the stack: if RSP == tsk_stack + 48 and we
407 * take an exception, the stack is already aligned and there
408 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
409 * possible error code, so a stack overflow would *not* double
410 * fault. With any less space left, exception delivery could
411 * fail, and, as a practical matter, we've overflowed the
412 * stack even if the actual trigger for the double fault was
413 * something else.
414 */
415 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
416 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
417#endif
418
419#ifdef CONFIG_DOUBLEFAULT
420 df_debug(regs, error_code);
421#endif
422 /*
423 * This is always a kernel trap and never fixable (and thus must
424 * never return).
425 */
426 for (;;)
427 die(str, regs, error_code);
428}
429#endif
430
431dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
432{
433 const struct mpx_bndcsr *bndcsr;
434
435 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
436 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
437 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
438 return;
439 cond_local_irq_enable(regs);
440
441 if (!user_mode(regs))
442 die("bounds", regs, error_code);
443
444 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
445 /* The exception is not from Intel MPX */
446 goto exit_trap;
447 }
448
449 /*
450 * We need to look at BNDSTATUS to resolve this exception.
451 * A NULL here might mean that it is in its 'init state',
452 * which is all zeros which indicates MPX was not
453 * responsible for the exception.
454 */
455 bndcsr = get_xsave_field_ptr(XFEATURE_BNDCSR);
456 if (!bndcsr)
457 goto exit_trap;
458
459 trace_bounds_exception_mpx(bndcsr);
460 /*
461 * The error code field of the BNDSTATUS register communicates status
462 * information of a bound range exception #BR or operation involving
463 * bound directory.
464 */
465 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
466 case 2: /* Bound directory has invalid entry. */
467 if (mpx_handle_bd_fault())
468 goto exit_trap;
469 break; /* Success, it was handled */
470 case 1: /* Bound violation. */
471 {
472 struct task_struct *tsk = current;
473 struct mpx_fault_info mpx;
474
475 if (mpx_fault_info(&mpx, regs)) {
476 /*
477 * We failed to decode the MPX instruction. Act as if
478 * the exception was not caused by MPX.
479 */
480 goto exit_trap;
481 }
482 /*
483 * Success, we decoded the instruction and retrieved
484 * an 'mpx' containing the address being accessed
485 * which caused the exception. This information
486 * allows and application to possibly handle the
487 * #BR exception itself.
488 */
489 if (!do_trap_no_signal(tsk, X86_TRAP_BR, "bounds", regs,
490 error_code))
491 break;
492
493 show_signal(tsk, SIGSEGV, "trap ", "bounds", regs, error_code);
494
495 force_sig_bnderr(mpx.addr, mpx.lower, mpx.upper);
496 break;
497 }
498 case 0: /* No exception caused by Intel MPX operations. */
499 goto exit_trap;
500 default:
501 die("bounds", regs, error_code);
502 }
503
504 return;
505
506exit_trap:
507 /*
508 * This path out is for all the cases where we could not
509 * handle the exception in some way (like allocating a
510 * table or telling userspace about it. We will also end
511 * up here if the kernel has MPX turned off at compile
512 * time..
513 */
514 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, 0, NULL);
515}
516
517dotraplinkage void
518do_general_protection(struct pt_regs *regs, long error_code)
519{
520 const char *desc = "general protection fault";
521 struct task_struct *tsk;
522
523 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
524 cond_local_irq_enable(regs);
525
526 if (static_cpu_has(X86_FEATURE_UMIP)) {
527 if (user_mode(regs) && fixup_umip_exception(regs))
528 return;
529 }
530
531 if (v8086_mode(regs)) {
532 local_irq_enable();
533 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
534 return;
535 }
536
537 tsk = current;
538 if (!user_mode(regs)) {
539 if (fixup_exception(regs, X86_TRAP_GP, error_code, 0))
540 return;
541
542 tsk->thread.error_code = error_code;
543 tsk->thread.trap_nr = X86_TRAP_GP;
544
545 /*
546 * To be potentially processing a kprobe fault and to
547 * trust the result from kprobe_running(), we have to
548 * be non-preemptible.
549 */
550 if (!preemptible() && kprobe_running() &&
551 kprobe_fault_handler(regs, X86_TRAP_GP))
552 return;
553
554 if (notify_die(DIE_GPF, desc, regs, error_code,
555 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
556 die(desc, regs, error_code);
557 return;
558 }
559
560 tsk->thread.error_code = error_code;
561 tsk->thread.trap_nr = X86_TRAP_GP;
562
563 show_signal(tsk, SIGSEGV, "", desc, regs, error_code);
564
565 force_sig(SIGSEGV);
566}
567NOKPROBE_SYMBOL(do_general_protection);
568
569dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
570{
571#ifdef CONFIG_DYNAMIC_FTRACE
572 /*
573 * ftrace must be first, everything else may cause a recursive crash.
574 * See note by declaration of modifying_ftrace_code in ftrace.c
575 */
576 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
577 ftrace_int3_handler(regs))
578 return;
579#endif
580 if (poke_int3_handler(regs))
581 return;
582
583 /*
584 * Use ist_enter despite the fact that we don't use an IST stack.
585 * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
586 * mode or even during context tracking state changes.
587 *
588 * This means that we can't schedule. That's okay.
589 */
590 ist_enter(regs);
591 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
592#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
593 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
594 SIGTRAP) == NOTIFY_STOP)
595 goto exit;
596#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
597
598#ifdef CONFIG_KPROBES
599 if (kprobe_int3_handler(regs))
600 goto exit;
601#endif
602
603 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
604 SIGTRAP) == NOTIFY_STOP)
605 goto exit;
606
607 cond_local_irq_enable(regs);
608 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, 0, NULL);
609 cond_local_irq_disable(regs);
610
611exit:
612 ist_exit(regs);
613}
614NOKPROBE_SYMBOL(do_int3);
615
616#ifdef CONFIG_X86_64
617/*
618 * Help handler running on a per-cpu (IST or entry trampoline) stack
619 * to switch to the normal thread stack if the interrupted code was in
620 * user mode. The actual stack switch is done in entry_64.S
621 */
622asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
623{
624 struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
625 if (regs != eregs)
626 *regs = *eregs;
627 return regs;
628}
629NOKPROBE_SYMBOL(sync_regs);
630
631struct bad_iret_stack {
632 void *error_entry_ret;
633 struct pt_regs regs;
634};
635
636asmlinkage __visible notrace
637struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
638{
639 /*
640 * This is called from entry_64.S early in handling a fault
641 * caused by a bad iret to user mode. To handle the fault
642 * correctly, we want to move our stack frame to where it would
643 * be had we entered directly on the entry stack (rather than
644 * just below the IRET frame) and we want to pretend that the
645 * exception came from the IRET target.
646 */
647 struct bad_iret_stack *new_stack =
648 (struct bad_iret_stack *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
649
650 /* Copy the IRET target to the new stack. */
651 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
652
653 /* Copy the remainder of the stack from the current stack. */
654 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
655
656 BUG_ON(!user_mode(&new_stack->regs));
657 return new_stack;
658}
659NOKPROBE_SYMBOL(fixup_bad_iret);
660#endif
661
662static bool is_sysenter_singlestep(struct pt_regs *regs)
663{
664 /*
665 * We don't try for precision here. If we're anywhere in the region of
666 * code that can be single-stepped in the SYSENTER entry path, then
667 * assume that this is a useless single-step trap due to SYSENTER
668 * being invoked with TF set. (We don't know in advance exactly
669 * which instructions will be hit because BTF could plausibly
670 * be set.)
671 */
672#ifdef CONFIG_X86_32
673 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
674 (unsigned long)__end_SYSENTER_singlestep_region -
675 (unsigned long)__begin_SYSENTER_singlestep_region;
676#elif defined(CONFIG_IA32_EMULATION)
677 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
678 (unsigned long)__end_entry_SYSENTER_compat -
679 (unsigned long)entry_SYSENTER_compat;
680#else
681 return false;
682#endif
683}
684
685/*
686 * Our handling of the processor debug registers is non-trivial.
687 * We do not clear them on entry and exit from the kernel. Therefore
688 * it is possible to get a watchpoint trap here from inside the kernel.
689 * However, the code in ./ptrace.c has ensured that the user can
690 * only set watchpoints on userspace addresses. Therefore the in-kernel
691 * watchpoint trap can only occur in code which is reading/writing
692 * from user space. Such code must not hold kernel locks (since it
693 * can equally take a page fault), therefore it is safe to call
694 * force_sig_info even though that claims and releases locks.
695 *
696 * Code in ./signal.c ensures that the debug control register
697 * is restored before we deliver any signal, and therefore that
698 * user code runs with the correct debug control register even though
699 * we clear it here.
700 *
701 * Being careful here means that we don't have to be as careful in a
702 * lot of more complicated places (task switching can be a bit lazy
703 * about restoring all the debug state, and ptrace doesn't have to
704 * find every occurrence of the TF bit that could be saved away even
705 * by user code)
706 *
707 * May run on IST stack.
708 */
709dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
710{
711 struct task_struct *tsk = current;
712 int user_icebp = 0;
713 unsigned long dr6;
714 int si_code;
715
716 ist_enter(regs);
717
718 get_debugreg(dr6, 6);
719 /*
720 * The Intel SDM says:
721 *
722 * Certain debug exceptions may clear bits 0-3. The remaining
723 * contents of the DR6 register are never cleared by the
724 * processor. To avoid confusion in identifying debug
725 * exceptions, debug handlers should clear the register before
726 * returning to the interrupted task.
727 *
728 * Keep it simple: clear DR6 immediately.
729 */
730 set_debugreg(0, 6);
731
732 /* Filter out all the reserved bits which are preset to 1 */
733 dr6 &= ~DR6_RESERVED;
734
735 /*
736 * The SDM says "The processor clears the BTF flag when it
737 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
738 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
739 */
740 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
741
742 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
743 is_sysenter_singlestep(regs))) {
744 dr6 &= ~DR_STEP;
745 if (!dr6)
746 goto exit;
747 /*
748 * else we might have gotten a single-step trap and hit a
749 * watchpoint at the same time, in which case we should fall
750 * through and handle the watchpoint.
751 */
752 }
753
754 /*
755 * If dr6 has no reason to give us about the origin of this trap,
756 * then it's very likely the result of an icebp/int01 trap.
757 * User wants a sigtrap for that.
758 */
759 if (!dr6 && user_mode(regs))
760 user_icebp = 1;
761
762 /* Store the virtualized DR6 value */
763 tsk->thread.debugreg6 = dr6;
764
765#ifdef CONFIG_KPROBES
766 if (kprobe_debug_handler(regs))
767 goto exit;
768#endif
769
770 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
771 SIGTRAP) == NOTIFY_STOP)
772 goto exit;
773
774 /*
775 * Let others (NMI) know that the debug stack is in use
776 * as we may switch to the interrupt stack.
777 */
778 debug_stack_usage_inc();
779
780 /* It's safe to allow irq's after DR6 has been saved */
781 cond_local_irq_enable(regs);
782
783 if (v8086_mode(regs)) {
784 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
785 X86_TRAP_DB);
786 cond_local_irq_disable(regs);
787 debug_stack_usage_dec();
788 goto exit;
789 }
790
791 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
792 /*
793 * Historical junk that used to handle SYSENTER single-stepping.
794 * This should be unreachable now. If we survive for a while
795 * without anyone hitting this warning, we'll turn this into
796 * an oops.
797 */
798 tsk->thread.debugreg6 &= ~DR_STEP;
799 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
800 regs->flags &= ~X86_EFLAGS_TF;
801 }
802 si_code = get_si_code(tsk->thread.debugreg6);
803 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
804 send_sigtrap(regs, error_code, si_code);
805 cond_local_irq_disable(regs);
806 debug_stack_usage_dec();
807
808exit:
809 ist_exit(regs);
810}
811NOKPROBE_SYMBOL(do_debug);
812
813/*
814 * Note that we play around with the 'TS' bit in an attempt to get
815 * the correct behaviour even in the presence of the asynchronous
816 * IRQ13 behaviour
817 */
818static void math_error(struct pt_regs *regs, int error_code, int trapnr)
819{
820 struct task_struct *task = current;
821 struct fpu *fpu = &task->thread.fpu;
822 int si_code;
823 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
824 "simd exception";
825
826 cond_local_irq_enable(regs);
827
828 if (!user_mode(regs)) {
829 if (fixup_exception(regs, trapnr, error_code, 0))
830 return;
831
832 task->thread.error_code = error_code;
833 task->thread.trap_nr = trapnr;
834
835 if (notify_die(DIE_TRAP, str, regs, error_code,
836 trapnr, SIGFPE) != NOTIFY_STOP)
837 die(str, regs, error_code);
838 return;
839 }
840
841 /*
842 * Save the info for the exception handler and clear the error.
843 */
844 fpu__save(fpu);
845
846 task->thread.trap_nr = trapnr;
847 task->thread.error_code = error_code;
848
849 si_code = fpu__exception_code(fpu, trapnr);
850 /* Retry when we get spurious exceptions: */
851 if (!si_code)
852 return;
853
854 force_sig_fault(SIGFPE, si_code,
855 (void __user *)uprobe_get_trap_addr(regs));
856}
857
858dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
859{
860 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
861 math_error(regs, error_code, X86_TRAP_MF);
862}
863
864dotraplinkage void
865do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
866{
867 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
868 math_error(regs, error_code, X86_TRAP_XF);
869}
870
871dotraplinkage void
872do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
873{
874 cond_local_irq_enable(regs);
875}
876
877dotraplinkage void
878do_device_not_available(struct pt_regs *regs, long error_code)
879{
880 unsigned long cr0 = read_cr0();
881
882 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
883
884#ifdef CONFIG_MATH_EMULATION
885 if (!boot_cpu_has(X86_FEATURE_FPU) && (cr0 & X86_CR0_EM)) {
886 struct math_emu_info info = { };
887
888 cond_local_irq_enable(regs);
889
890 info.regs = regs;
891 math_emulate(&info);
892 return;
893 }
894#endif
895
896 /* This should not happen. */
897 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
898 /* Try to fix it up and carry on. */
899 write_cr0(cr0 & ~X86_CR0_TS);
900 } else {
901 /*
902 * Something terrible happened, and we're better off trying
903 * to kill the task than getting stuck in a never-ending
904 * loop of #NM faults.
905 */
906 die("unexpected #NM exception", regs, error_code);
907 }
908}
909NOKPROBE_SYMBOL(do_device_not_available);
910
911#ifdef CONFIG_X86_32
912dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
913{
914 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
915 local_irq_enable();
916
917 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
918 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
919 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
920 ILL_BADSTK, (void __user *)NULL);
921 }
922}
923#endif
924
925void __init trap_init(void)
926{
927 /* Init cpu_entry_area before IST entries are set up */
928 setup_cpu_entry_areas();
929
930 idt_setup_traps();
931
932 /*
933 * Set the IDT descriptor to a fixed read-only location, so that the
934 * "sidt" instruction will not leak the location of the kernel, and
935 * to defend the IDT against arbitrary memory write vulnerabilities.
936 * It will be reloaded in cpu_init() */
937 cea_set_pte(CPU_ENTRY_AREA_RO_IDT_VADDR, __pa_symbol(idt_table),
938 PAGE_KERNEL_RO);
939 idt_descr.address = CPU_ENTRY_AREA_RO_IDT;
940
941 /*
942 * Should be a barrier for any external CPU state:
943 */
944 cpu_init();
945
946 idt_setup_ist_traps();
947
948 x86_init.irqs.trap_init();
949
950 idt_setup_debugidt_traps();
951}
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/export.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/init.h>
34#include <linux/bug.h>
35#include <linux/nmi.h>
36#include <linux/mm.h>
37#include <linux/smp.h>
38#include <linux/io.h>
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
49#include <asm/kmemcheck.h>
50#include <asm/stacktrace.h>
51#include <asm/processor.h>
52#include <asm/debugreg.h>
53#include <linux/atomic.h>
54#include <asm/text-patching.h>
55#include <asm/ftrace.h>
56#include <asm/traps.h>
57#include <asm/desc.h>
58#include <asm/fpu/internal.h>
59#include <asm/mce.h>
60#include <asm/fixmap.h>
61#include <asm/mach_traps.h>
62#include <asm/alternative.h>
63#include <asm/fpu/xstate.h>
64#include <asm/trace/mpx.h>
65#include <asm/mpx.h>
66#include <asm/vm86.h>
67
68#ifdef CONFIG_X86_64
69#include <asm/x86_init.h>
70#include <asm/pgalloc.h>
71#include <asm/proto.h>
72
73/* No need to be aligned, but done to keep all IDTs defined the same way. */
74gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
75#else
76#include <asm/processor-flags.h>
77#include <asm/setup.h>
78#include <asm/proto.h>
79#endif
80
81/* Must be page-aligned because the real IDT is used in a fixmap. */
82gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
83
84DECLARE_BITMAP(used_vectors, NR_VECTORS);
85EXPORT_SYMBOL_GPL(used_vectors);
86
87static inline void cond_local_irq_enable(struct pt_regs *regs)
88{
89 if (regs->flags & X86_EFLAGS_IF)
90 local_irq_enable();
91}
92
93static inline void cond_local_irq_disable(struct pt_regs *regs)
94{
95 if (regs->flags & X86_EFLAGS_IF)
96 local_irq_disable();
97}
98
99/*
100 * In IST context, we explicitly disable preemption. This serves two
101 * purposes: it makes it much less likely that we would accidentally
102 * schedule in IST context and it will force a warning if we somehow
103 * manage to schedule by accident.
104 */
105void ist_enter(struct pt_regs *regs)
106{
107 if (user_mode(regs)) {
108 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
109 } else {
110 /*
111 * We might have interrupted pretty much anything. In
112 * fact, if we're a machine check, we can even interrupt
113 * NMI processing. We don't want in_nmi() to return true,
114 * but we need to notify RCU.
115 */
116 rcu_nmi_enter();
117 }
118
119 preempt_disable();
120
121 /* This code is a bit fragile. Test it. */
122 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
123}
124
125void ist_exit(struct pt_regs *regs)
126{
127 preempt_enable_no_resched();
128
129 if (!user_mode(regs))
130 rcu_nmi_exit();
131}
132
133/**
134 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
135 * @regs: regs passed to the IST exception handler
136 *
137 * IST exception handlers normally cannot schedule. As a special
138 * exception, if the exception interrupted userspace code (i.e.
139 * user_mode(regs) would return true) and the exception was not
140 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
141 * begins a non-atomic section within an ist_enter()/ist_exit() region.
142 * Callers are responsible for enabling interrupts themselves inside
143 * the non-atomic section, and callers must call ist_end_non_atomic()
144 * before ist_exit().
145 */
146void ist_begin_non_atomic(struct pt_regs *regs)
147{
148 BUG_ON(!user_mode(regs));
149
150 /*
151 * Sanity check: we need to be on the normal thread stack. This
152 * will catch asm bugs and any attempt to use ist_preempt_enable
153 * from double_fault.
154 */
155 BUG_ON((unsigned long)(current_top_of_stack() -
156 current_stack_pointer()) >= THREAD_SIZE);
157
158 preempt_enable_no_resched();
159}
160
161/**
162 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
163 *
164 * Ends a non-atomic section started with ist_begin_non_atomic().
165 */
166void ist_end_non_atomic(void)
167{
168 preempt_disable();
169}
170
171static nokprobe_inline int
172do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
173 struct pt_regs *regs, long error_code)
174{
175 if (v8086_mode(regs)) {
176 /*
177 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
178 * On nmi (interrupt 2), do_trap should not be called.
179 */
180 if (trapnr < X86_TRAP_UD) {
181 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
182 error_code, trapnr))
183 return 0;
184 }
185 return -1;
186 }
187
188 if (!user_mode(regs)) {
189 if (!fixup_exception(regs, trapnr)) {
190 tsk->thread.error_code = error_code;
191 tsk->thread.trap_nr = trapnr;
192 die(str, regs, error_code);
193 }
194 return 0;
195 }
196
197 return -1;
198}
199
200static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
201 siginfo_t *info)
202{
203 unsigned long siaddr;
204 int sicode;
205
206 switch (trapnr) {
207 default:
208 return SEND_SIG_PRIV;
209
210 case X86_TRAP_DE:
211 sicode = FPE_INTDIV;
212 siaddr = uprobe_get_trap_addr(regs);
213 break;
214 case X86_TRAP_UD:
215 sicode = ILL_ILLOPN;
216 siaddr = uprobe_get_trap_addr(regs);
217 break;
218 case X86_TRAP_AC:
219 sicode = BUS_ADRALN;
220 siaddr = 0;
221 break;
222 }
223
224 info->si_signo = signr;
225 info->si_errno = 0;
226 info->si_code = sicode;
227 info->si_addr = (void __user *)siaddr;
228 return info;
229}
230
231static void
232do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
233 long error_code, siginfo_t *info)
234{
235 struct task_struct *tsk = current;
236
237
238 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
239 return;
240 /*
241 * We want error_code and trap_nr set for userspace faults and
242 * kernelspace faults which result in die(), but not
243 * kernelspace faults which are fixed up. die() gives the
244 * process no chance to handle the signal and notice the
245 * kernel fault information, so that won't result in polluting
246 * the information about previously queued, but not yet
247 * delivered, faults. See also do_general_protection below.
248 */
249 tsk->thread.error_code = error_code;
250 tsk->thread.trap_nr = trapnr;
251
252 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
253 printk_ratelimit()) {
254 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
255 tsk->comm, tsk->pid, str,
256 regs->ip, regs->sp, error_code);
257 print_vma_addr(" in ", regs->ip);
258 pr_cont("\n");
259 }
260
261 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
262}
263NOKPROBE_SYMBOL(do_trap);
264
265static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
266 unsigned long trapnr, int signr)
267{
268 siginfo_t info;
269
270 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
271
272 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
273 NOTIFY_STOP) {
274 cond_local_irq_enable(regs);
275 do_trap(trapnr, signr, str, regs, error_code,
276 fill_trap_info(regs, signr, trapnr, &info));
277 }
278}
279
280#define DO_ERROR(trapnr, signr, str, name) \
281dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
282{ \
283 do_error_trap(regs, error_code, str, trapnr, signr); \
284}
285
286DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
287DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
288DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
289DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
290DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
291DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
292DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
293DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
294
295#ifdef CONFIG_VMAP_STACK
296__visible void __noreturn handle_stack_overflow(const char *message,
297 struct pt_regs *regs,
298 unsigned long fault_address)
299{
300 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
301 (void *)fault_address, current->stack,
302 (char *)current->stack + THREAD_SIZE - 1);
303 die(message, regs, 0);
304
305 /* Be absolutely certain we don't return. */
306 panic(message);
307}
308#endif
309
310#ifdef CONFIG_X86_64
311/* Runs on IST stack */
312dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
313{
314 static const char str[] = "double fault";
315 struct task_struct *tsk = current;
316#ifdef CONFIG_VMAP_STACK
317 unsigned long cr2;
318#endif
319
320#ifdef CONFIG_X86_ESPFIX64
321 extern unsigned char native_irq_return_iret[];
322
323 /*
324 * If IRET takes a non-IST fault on the espfix64 stack, then we
325 * end up promoting it to a doublefault. In that case, modify
326 * the stack to make it look like we just entered the #GP
327 * handler from user space, similar to bad_iret.
328 *
329 * No need for ist_enter here because we don't use RCU.
330 */
331 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
332 regs->cs == __KERNEL_CS &&
333 regs->ip == (unsigned long)native_irq_return_iret)
334 {
335 struct pt_regs *normal_regs = task_pt_regs(current);
336
337 /* Fake a #GP(0) from userspace. */
338 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
339 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
340 regs->ip = (unsigned long)general_protection;
341 regs->sp = (unsigned long)&normal_regs->orig_ax;
342
343 return;
344 }
345#endif
346
347 ist_enter(regs);
348 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
349
350 tsk->thread.error_code = error_code;
351 tsk->thread.trap_nr = X86_TRAP_DF;
352
353#ifdef CONFIG_VMAP_STACK
354 /*
355 * If we overflow the stack into a guard page, the CPU will fail
356 * to deliver #PF and will send #DF instead. Similarly, if we
357 * take any non-IST exception while too close to the bottom of
358 * the stack, the processor will get a page fault while
359 * delivering the exception and will generate a double fault.
360 *
361 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
362 * Page-Fault Exception (#PF):
363 *
364 * Processors update CR2 whenever a page fault is detected. If a
365 * second page fault occurs while an earlier page fault is being
366 * deliv- ered, the faulting linear address of the second fault will
367 * overwrite the contents of CR2 (replacing the previous
368 * address). These updates to CR2 occur even if the page fault
369 * results in a double fault or occurs during the delivery of a
370 * double fault.
371 *
372 * The logic below has a small possibility of incorrectly diagnosing
373 * some errors as stack overflows. For example, if the IDT or GDT
374 * gets corrupted such that #GP delivery fails due to a bad descriptor
375 * causing #GP and we hit this condition while CR2 coincidentally
376 * points to the stack guard page, we'll think we overflowed the
377 * stack. Given that we're going to panic one way or another
378 * if this happens, this isn't necessarily worth fixing.
379 *
380 * If necessary, we could improve the test by only diagnosing
381 * a stack overflow if the saved RSP points within 47 bytes of
382 * the bottom of the stack: if RSP == tsk_stack + 48 and we
383 * take an exception, the stack is already aligned and there
384 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
385 * possible error code, so a stack overflow would *not* double
386 * fault. With any less space left, exception delivery could
387 * fail, and, as a practical matter, we've overflowed the
388 * stack even if the actual trigger for the double fault was
389 * something else.
390 */
391 cr2 = read_cr2();
392 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
393 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
394#endif
395
396#ifdef CONFIG_DOUBLEFAULT
397 df_debug(regs, error_code);
398#endif
399 /*
400 * This is always a kernel trap and never fixable (and thus must
401 * never return).
402 */
403 for (;;)
404 die(str, regs, error_code);
405}
406#endif
407
408dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
409{
410 const struct mpx_bndcsr *bndcsr;
411 siginfo_t *info;
412
413 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
414 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
415 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
416 return;
417 cond_local_irq_enable(regs);
418
419 if (!user_mode(regs))
420 die("bounds", regs, error_code);
421
422 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
423 /* The exception is not from Intel MPX */
424 goto exit_trap;
425 }
426
427 /*
428 * We need to look at BNDSTATUS to resolve this exception.
429 * A NULL here might mean that it is in its 'init state',
430 * which is all zeros which indicates MPX was not
431 * responsible for the exception.
432 */
433 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
434 if (!bndcsr)
435 goto exit_trap;
436
437 trace_bounds_exception_mpx(bndcsr);
438 /*
439 * The error code field of the BNDSTATUS register communicates status
440 * information of a bound range exception #BR or operation involving
441 * bound directory.
442 */
443 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
444 case 2: /* Bound directory has invalid entry. */
445 if (mpx_handle_bd_fault())
446 goto exit_trap;
447 break; /* Success, it was handled */
448 case 1: /* Bound violation. */
449 info = mpx_generate_siginfo(regs);
450 if (IS_ERR(info)) {
451 /*
452 * We failed to decode the MPX instruction. Act as if
453 * the exception was not caused by MPX.
454 */
455 goto exit_trap;
456 }
457 /*
458 * Success, we decoded the instruction and retrieved
459 * an 'info' containing the address being accessed
460 * which caused the exception. This information
461 * allows and application to possibly handle the
462 * #BR exception itself.
463 */
464 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
465 kfree(info);
466 break;
467 case 0: /* No exception caused by Intel MPX operations. */
468 goto exit_trap;
469 default:
470 die("bounds", regs, error_code);
471 }
472
473 return;
474
475exit_trap:
476 /*
477 * This path out is for all the cases where we could not
478 * handle the exception in some way (like allocating a
479 * table or telling userspace about it. We will also end
480 * up here if the kernel has MPX turned off at compile
481 * time..
482 */
483 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
484}
485
486dotraplinkage void
487do_general_protection(struct pt_regs *regs, long error_code)
488{
489 struct task_struct *tsk;
490
491 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
492 cond_local_irq_enable(regs);
493
494 if (v8086_mode(regs)) {
495 local_irq_enable();
496 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
497 return;
498 }
499
500 tsk = current;
501 if (!user_mode(regs)) {
502 if (fixup_exception(regs, X86_TRAP_GP))
503 return;
504
505 tsk->thread.error_code = error_code;
506 tsk->thread.trap_nr = X86_TRAP_GP;
507 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
508 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
509 die("general protection fault", regs, error_code);
510 return;
511 }
512
513 tsk->thread.error_code = error_code;
514 tsk->thread.trap_nr = X86_TRAP_GP;
515
516 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
517 printk_ratelimit()) {
518 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
519 tsk->comm, task_pid_nr(tsk),
520 regs->ip, regs->sp, error_code);
521 print_vma_addr(" in ", regs->ip);
522 pr_cont("\n");
523 }
524
525 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
526}
527NOKPROBE_SYMBOL(do_general_protection);
528
529/* May run on IST stack. */
530dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
531{
532#ifdef CONFIG_DYNAMIC_FTRACE
533 /*
534 * ftrace must be first, everything else may cause a recursive crash.
535 * See note by declaration of modifying_ftrace_code in ftrace.c
536 */
537 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
538 ftrace_int3_handler(regs))
539 return;
540#endif
541 if (poke_int3_handler(regs))
542 return;
543
544 ist_enter(regs);
545 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
546#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
547 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
548 SIGTRAP) == NOTIFY_STOP)
549 goto exit;
550#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
551
552#ifdef CONFIG_KPROBES
553 if (kprobe_int3_handler(regs))
554 goto exit;
555#endif
556
557 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
558 SIGTRAP) == NOTIFY_STOP)
559 goto exit;
560
561 /*
562 * Let others (NMI) know that the debug stack is in use
563 * as we may switch to the interrupt stack.
564 */
565 debug_stack_usage_inc();
566 preempt_disable();
567 cond_local_irq_enable(regs);
568 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
569 cond_local_irq_disable(regs);
570 preempt_enable_no_resched();
571 debug_stack_usage_dec();
572exit:
573 ist_exit(regs);
574}
575NOKPROBE_SYMBOL(do_int3);
576
577#ifdef CONFIG_X86_64
578/*
579 * Help handler running on IST stack to switch off the IST stack if the
580 * interrupted code was in user mode. The actual stack switch is done in
581 * entry_64.S
582 */
583asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
584{
585 struct pt_regs *regs = task_pt_regs(current);
586 *regs = *eregs;
587 return regs;
588}
589NOKPROBE_SYMBOL(sync_regs);
590
591struct bad_iret_stack {
592 void *error_entry_ret;
593 struct pt_regs regs;
594};
595
596asmlinkage __visible notrace
597struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
598{
599 /*
600 * This is called from entry_64.S early in handling a fault
601 * caused by a bad iret to user mode. To handle the fault
602 * correctly, we want move our stack frame to task_pt_regs
603 * and we want to pretend that the exception came from the
604 * iret target.
605 */
606 struct bad_iret_stack *new_stack =
607 container_of(task_pt_regs(current),
608 struct bad_iret_stack, regs);
609
610 /* Copy the IRET target to the new stack. */
611 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
612
613 /* Copy the remainder of the stack from the current stack. */
614 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
615
616 BUG_ON(!user_mode(&new_stack->regs));
617 return new_stack;
618}
619NOKPROBE_SYMBOL(fixup_bad_iret);
620#endif
621
622static bool is_sysenter_singlestep(struct pt_regs *regs)
623{
624 /*
625 * We don't try for precision here. If we're anywhere in the region of
626 * code that can be single-stepped in the SYSENTER entry path, then
627 * assume that this is a useless single-step trap due to SYSENTER
628 * being invoked with TF set. (We don't know in advance exactly
629 * which instructions will be hit because BTF could plausibly
630 * be set.)
631 */
632#ifdef CONFIG_X86_32
633 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
634 (unsigned long)__end_SYSENTER_singlestep_region -
635 (unsigned long)__begin_SYSENTER_singlestep_region;
636#elif defined(CONFIG_IA32_EMULATION)
637 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
638 (unsigned long)__end_entry_SYSENTER_compat -
639 (unsigned long)entry_SYSENTER_compat;
640#else
641 return false;
642#endif
643}
644
645/*
646 * Our handling of the processor debug registers is non-trivial.
647 * We do not clear them on entry and exit from the kernel. Therefore
648 * it is possible to get a watchpoint trap here from inside the kernel.
649 * However, the code in ./ptrace.c has ensured that the user can
650 * only set watchpoints on userspace addresses. Therefore the in-kernel
651 * watchpoint trap can only occur in code which is reading/writing
652 * from user space. Such code must not hold kernel locks (since it
653 * can equally take a page fault), therefore it is safe to call
654 * force_sig_info even though that claims and releases locks.
655 *
656 * Code in ./signal.c ensures that the debug control register
657 * is restored before we deliver any signal, and therefore that
658 * user code runs with the correct debug control register even though
659 * we clear it here.
660 *
661 * Being careful here means that we don't have to be as careful in a
662 * lot of more complicated places (task switching can be a bit lazy
663 * about restoring all the debug state, and ptrace doesn't have to
664 * find every occurrence of the TF bit that could be saved away even
665 * by user code)
666 *
667 * May run on IST stack.
668 */
669dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
670{
671 struct task_struct *tsk = current;
672 int user_icebp = 0;
673 unsigned long dr6;
674 int si_code;
675
676 ist_enter(regs);
677
678 get_debugreg(dr6, 6);
679 /*
680 * The Intel SDM says:
681 *
682 * Certain debug exceptions may clear bits 0-3. The remaining
683 * contents of the DR6 register are never cleared by the
684 * processor. To avoid confusion in identifying debug
685 * exceptions, debug handlers should clear the register before
686 * returning to the interrupted task.
687 *
688 * Keep it simple: clear DR6 immediately.
689 */
690 set_debugreg(0, 6);
691
692 /* Filter out all the reserved bits which are preset to 1 */
693 dr6 &= ~DR6_RESERVED;
694
695 /*
696 * The SDM says "The processor clears the BTF flag when it
697 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
698 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
699 */
700 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
701
702 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
703 is_sysenter_singlestep(regs))) {
704 dr6 &= ~DR_STEP;
705 if (!dr6)
706 goto exit;
707 /*
708 * else we might have gotten a single-step trap and hit a
709 * watchpoint at the same time, in which case we should fall
710 * through and handle the watchpoint.
711 */
712 }
713
714 /*
715 * If dr6 has no reason to give us about the origin of this trap,
716 * then it's very likely the result of an icebp/int01 trap.
717 * User wants a sigtrap for that.
718 */
719 if (!dr6 && user_mode(regs))
720 user_icebp = 1;
721
722 /* Catch kmemcheck conditions! */
723 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
724 goto exit;
725
726 /* Store the virtualized DR6 value */
727 tsk->thread.debugreg6 = dr6;
728
729#ifdef CONFIG_KPROBES
730 if (kprobe_debug_handler(regs))
731 goto exit;
732#endif
733
734 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
735 SIGTRAP) == NOTIFY_STOP)
736 goto exit;
737
738 /*
739 * Let others (NMI) know that the debug stack is in use
740 * as we may switch to the interrupt stack.
741 */
742 debug_stack_usage_inc();
743
744 /* It's safe to allow irq's after DR6 has been saved */
745 preempt_disable();
746 cond_local_irq_enable(regs);
747
748 if (v8086_mode(regs)) {
749 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
750 X86_TRAP_DB);
751 cond_local_irq_disable(regs);
752 preempt_enable_no_resched();
753 debug_stack_usage_dec();
754 goto exit;
755 }
756
757 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
758 /*
759 * Historical junk that used to handle SYSENTER single-stepping.
760 * This should be unreachable now. If we survive for a while
761 * without anyone hitting this warning, we'll turn this into
762 * an oops.
763 */
764 tsk->thread.debugreg6 &= ~DR_STEP;
765 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
766 regs->flags &= ~X86_EFLAGS_TF;
767 }
768 si_code = get_si_code(tsk->thread.debugreg6);
769 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
770 send_sigtrap(tsk, regs, error_code, si_code);
771 cond_local_irq_disable(regs);
772 preempt_enable_no_resched();
773 debug_stack_usage_dec();
774
775exit:
776#if defined(CONFIG_X86_32)
777 /*
778 * This is the most likely code path that involves non-trivial use
779 * of the SYSENTER stack. Check that we haven't overrun it.
780 */
781 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
782 "Overran or corrupted SYSENTER stack\n");
783#endif
784 ist_exit(regs);
785}
786NOKPROBE_SYMBOL(do_debug);
787
788/*
789 * Note that we play around with the 'TS' bit in an attempt to get
790 * the correct behaviour even in the presence of the asynchronous
791 * IRQ13 behaviour
792 */
793static void math_error(struct pt_regs *regs, int error_code, int trapnr)
794{
795 struct task_struct *task = current;
796 struct fpu *fpu = &task->thread.fpu;
797 siginfo_t info;
798 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
799 "simd exception";
800
801 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
802 return;
803 cond_local_irq_enable(regs);
804
805 if (!user_mode(regs)) {
806 if (!fixup_exception(regs, trapnr)) {
807 task->thread.error_code = error_code;
808 task->thread.trap_nr = trapnr;
809 die(str, regs, error_code);
810 }
811 return;
812 }
813
814 /*
815 * Save the info for the exception handler and clear the error.
816 */
817 fpu__save(fpu);
818
819 task->thread.trap_nr = trapnr;
820 task->thread.error_code = error_code;
821 info.si_signo = SIGFPE;
822 info.si_errno = 0;
823 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
824
825 info.si_code = fpu__exception_code(fpu, trapnr);
826
827 /* Retry when we get spurious exceptions: */
828 if (!info.si_code)
829 return;
830
831 force_sig_info(SIGFPE, &info, task);
832}
833
834dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
835{
836 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
837 math_error(regs, error_code, X86_TRAP_MF);
838}
839
840dotraplinkage void
841do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
842{
843 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
844 math_error(regs, error_code, X86_TRAP_XF);
845}
846
847dotraplinkage void
848do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
849{
850 cond_local_irq_enable(regs);
851}
852
853dotraplinkage void
854do_device_not_available(struct pt_regs *regs, long error_code)
855{
856 unsigned long cr0;
857
858 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
859
860#ifdef CONFIG_MATH_EMULATION
861 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
862 struct math_emu_info info = { };
863
864 cond_local_irq_enable(regs);
865
866 info.regs = regs;
867 math_emulate(&info);
868 return;
869 }
870#endif
871
872 /* This should not happen. */
873 cr0 = read_cr0();
874 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
875 /* Try to fix it up and carry on. */
876 write_cr0(cr0 & ~X86_CR0_TS);
877 } else {
878 /*
879 * Something terrible happened, and we're better off trying
880 * to kill the task than getting stuck in a never-ending
881 * loop of #NM faults.
882 */
883 die("unexpected #NM exception", regs, error_code);
884 }
885}
886NOKPROBE_SYMBOL(do_device_not_available);
887
888#ifdef CONFIG_X86_32
889dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
890{
891 siginfo_t info;
892
893 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
894 local_irq_enable();
895
896 info.si_signo = SIGILL;
897 info.si_errno = 0;
898 info.si_code = ILL_BADSTK;
899 info.si_addr = NULL;
900 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
901 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
902 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
903 &info);
904 }
905}
906#endif
907
908/* Set of traps needed for early debugging. */
909void __init early_trap_init(void)
910{
911 /*
912 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
913 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
914 * CPU runs at ring 0 so it is impossible to hit an invalid
915 * stack. Using the original stack works well enough at this
916 * early stage. DEBUG_STACK will be equipped after cpu_init() in
917 * trap_init().
918 *
919 * We don't need to set trace_idt_table like set_intr_gate(),
920 * since we don't have trace_debug and it will be reset to
921 * 'debug' in trap_init() by set_intr_gate_ist().
922 */
923 set_intr_gate_notrace(X86_TRAP_DB, debug);
924 /* int3 can be called from all */
925 set_system_intr_gate(X86_TRAP_BP, &int3);
926#ifdef CONFIG_X86_32
927 set_intr_gate(X86_TRAP_PF, page_fault);
928#endif
929 load_idt(&idt_descr);
930}
931
932void __init early_trap_pf_init(void)
933{
934#ifdef CONFIG_X86_64
935 set_intr_gate(X86_TRAP_PF, page_fault);
936#endif
937}
938
939void __init trap_init(void)
940{
941 int i;
942
943#ifdef CONFIG_EISA
944 void __iomem *p = early_ioremap(0x0FFFD9, 4);
945
946 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
947 EISA_bus = 1;
948 early_iounmap(p, 4);
949#endif
950
951 set_intr_gate(X86_TRAP_DE, divide_error);
952 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
953 /* int4 can be called from all */
954 set_system_intr_gate(X86_TRAP_OF, &overflow);
955 set_intr_gate(X86_TRAP_BR, bounds);
956 set_intr_gate(X86_TRAP_UD, invalid_op);
957 set_intr_gate(X86_TRAP_NM, device_not_available);
958#ifdef CONFIG_X86_32
959 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
960#else
961 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
962#endif
963 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
964 set_intr_gate(X86_TRAP_TS, invalid_TSS);
965 set_intr_gate(X86_TRAP_NP, segment_not_present);
966 set_intr_gate(X86_TRAP_SS, stack_segment);
967 set_intr_gate(X86_TRAP_GP, general_protection);
968 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
969 set_intr_gate(X86_TRAP_MF, coprocessor_error);
970 set_intr_gate(X86_TRAP_AC, alignment_check);
971#ifdef CONFIG_X86_MCE
972 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
973#endif
974 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
975
976 /* Reserve all the builtin and the syscall vector: */
977 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
978 set_bit(i, used_vectors);
979
980#ifdef CONFIG_IA32_EMULATION
981 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
982 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
983#endif
984
985#ifdef CONFIG_X86_32
986 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
987 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
988#endif
989
990 /*
991 * Set the IDT descriptor to a fixed read-only location, so that the
992 * "sidt" instruction will not leak the location of the kernel, and
993 * to defend the IDT against arbitrary memory write vulnerabilities.
994 * It will be reloaded in cpu_init() */
995 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
996 idt_descr.address = fix_to_virt(FIX_RO_IDT);
997
998 /*
999 * Should be a barrier for any external CPU state:
1000 */
1001 cpu_init();
1002
1003 /*
1004 * X86_TRAP_DB and X86_TRAP_BP have been set
1005 * in early_trap_init(). However, ITS works only after
1006 * cpu_init() loads TSS. See comments in early_trap_init().
1007 */
1008 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
1009 /* int3 can be called from all */
1010 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
1011
1012 x86_init.irqs.trap_init();
1013
1014#ifdef CONFIG_X86_64
1015 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
1016 set_nmi_gate(X86_TRAP_DB, &debug);
1017 set_nmi_gate(X86_TRAP_BP, &int3);
1018#endif
1019}