Loading...
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/export.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/sched/task_stack.h>
33#include <linux/timer.h>
34#include <linux/init.h>
35#include <linux/bug.h>
36#include <linux/nmi.h>
37#include <linux/mm.h>
38#include <linux/smp.h>
39#include <linux/io.h>
40
41#if defined(CONFIG_EDAC)
42#include <linux/edac.h>
43#endif
44
45#include <asm/stacktrace.h>
46#include <asm/processor.h>
47#include <asm/debugreg.h>
48#include <linux/atomic.h>
49#include <asm/text-patching.h>
50#include <asm/ftrace.h>
51#include <asm/traps.h>
52#include <asm/desc.h>
53#include <asm/fpu/internal.h>
54#include <asm/cpu_entry_area.h>
55#include <asm/mce.h>
56#include <asm/fixmap.h>
57#include <asm/mach_traps.h>
58#include <asm/alternative.h>
59#include <asm/fpu/xstate.h>
60#include <asm/trace/mpx.h>
61#include <asm/mpx.h>
62#include <asm/vm86.h>
63#include <asm/umip.h>
64
65#ifdef CONFIG_X86_64
66#include <asm/x86_init.h>
67#include <asm/pgalloc.h>
68#include <asm/proto.h>
69#else
70#include <asm/processor-flags.h>
71#include <asm/setup.h>
72#include <asm/proto.h>
73#endif
74
75DECLARE_BITMAP(system_vectors, NR_VECTORS);
76
77static inline void cond_local_irq_enable(struct pt_regs *regs)
78{
79 if (regs->flags & X86_EFLAGS_IF)
80 local_irq_enable();
81}
82
83static inline void cond_local_irq_disable(struct pt_regs *regs)
84{
85 if (regs->flags & X86_EFLAGS_IF)
86 local_irq_disable();
87}
88
89/*
90 * In IST context, we explicitly disable preemption. This serves two
91 * purposes: it makes it much less likely that we would accidentally
92 * schedule in IST context and it will force a warning if we somehow
93 * manage to schedule by accident.
94 */
95void ist_enter(struct pt_regs *regs)
96{
97 if (user_mode(regs)) {
98 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
99 } else {
100 /*
101 * We might have interrupted pretty much anything. In
102 * fact, if we're a machine check, we can even interrupt
103 * NMI processing. We don't want in_nmi() to return true,
104 * but we need to notify RCU.
105 */
106 rcu_nmi_enter();
107 }
108
109 preempt_disable();
110
111 /* This code is a bit fragile. Test it. */
112 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
113}
114NOKPROBE_SYMBOL(ist_enter);
115
116void ist_exit(struct pt_regs *regs)
117{
118 preempt_enable_no_resched();
119
120 if (!user_mode(regs))
121 rcu_nmi_exit();
122}
123
124/**
125 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
126 * @regs: regs passed to the IST exception handler
127 *
128 * IST exception handlers normally cannot schedule. As a special
129 * exception, if the exception interrupted userspace code (i.e.
130 * user_mode(regs) would return true) and the exception was not
131 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
132 * begins a non-atomic section within an ist_enter()/ist_exit() region.
133 * Callers are responsible for enabling interrupts themselves inside
134 * the non-atomic section, and callers must call ist_end_non_atomic()
135 * before ist_exit().
136 */
137void ist_begin_non_atomic(struct pt_regs *regs)
138{
139 BUG_ON(!user_mode(regs));
140
141 /*
142 * Sanity check: we need to be on the normal thread stack. This
143 * will catch asm bugs and any attempt to use ist_preempt_enable
144 * from double_fault.
145 */
146 BUG_ON(!on_thread_stack());
147
148 preempt_enable_no_resched();
149}
150
151/**
152 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
153 *
154 * Ends a non-atomic section started with ist_begin_non_atomic().
155 */
156void ist_end_non_atomic(void)
157{
158 preempt_disable();
159}
160
161int is_valid_bugaddr(unsigned long addr)
162{
163 unsigned short ud;
164
165 if (addr < TASK_SIZE_MAX)
166 return 0;
167
168 if (probe_kernel_address((unsigned short *)addr, ud))
169 return 0;
170
171 return ud == INSN_UD0 || ud == INSN_UD2;
172}
173
174int fixup_bug(struct pt_regs *regs, int trapnr)
175{
176 if (trapnr != X86_TRAP_UD)
177 return 0;
178
179 switch (report_bug(regs->ip, regs)) {
180 case BUG_TRAP_TYPE_NONE:
181 case BUG_TRAP_TYPE_BUG:
182 break;
183
184 case BUG_TRAP_TYPE_WARN:
185 regs->ip += LEN_UD2;
186 return 1;
187 }
188
189 return 0;
190}
191
192static nokprobe_inline int
193do_trap_no_signal(struct task_struct *tsk, int trapnr, const char *str,
194 struct pt_regs *regs, long error_code)
195{
196 if (v8086_mode(regs)) {
197 /*
198 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
199 * On nmi (interrupt 2), do_trap should not be called.
200 */
201 if (trapnr < X86_TRAP_UD) {
202 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
203 error_code, trapnr))
204 return 0;
205 }
206 } else if (!user_mode(regs)) {
207 if (fixup_exception(regs, trapnr, error_code, 0))
208 return 0;
209
210 tsk->thread.error_code = error_code;
211 tsk->thread.trap_nr = trapnr;
212 die(str, regs, error_code);
213 }
214
215 /*
216 * We want error_code and trap_nr set for userspace faults and
217 * kernelspace faults which result in die(), but not
218 * kernelspace faults which are fixed up. die() gives the
219 * process no chance to handle the signal and notice the
220 * kernel fault information, so that won't result in polluting
221 * the information about previously queued, but not yet
222 * delivered, faults. See also do_general_protection below.
223 */
224 tsk->thread.error_code = error_code;
225 tsk->thread.trap_nr = trapnr;
226
227 return -1;
228}
229
230static void show_signal(struct task_struct *tsk, int signr,
231 const char *type, const char *desc,
232 struct pt_regs *regs, long error_code)
233{
234 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
235 printk_ratelimit()) {
236 pr_info("%s[%d] %s%s ip:%lx sp:%lx error:%lx",
237 tsk->comm, task_pid_nr(tsk), type, desc,
238 regs->ip, regs->sp, error_code);
239 print_vma_addr(KERN_CONT " in ", regs->ip);
240 pr_cont("\n");
241 }
242}
243
244static void
245do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
246 long error_code, int sicode, void __user *addr)
247{
248 struct task_struct *tsk = current;
249
250
251 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
252 return;
253
254 show_signal(tsk, signr, "trap ", str, regs, error_code);
255
256 if (!sicode)
257 force_sig(signr);
258 else
259 force_sig_fault(signr, sicode, addr);
260}
261NOKPROBE_SYMBOL(do_trap);
262
263static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
264 unsigned long trapnr, int signr, int sicode, void __user *addr)
265{
266 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
267
268 /*
269 * WARN*()s end up here; fix them up before we call the
270 * notifier chain.
271 */
272 if (!user_mode(regs) && fixup_bug(regs, trapnr))
273 return;
274
275 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
276 NOTIFY_STOP) {
277 cond_local_irq_enable(regs);
278 do_trap(trapnr, signr, str, regs, error_code, sicode, addr);
279 }
280}
281
282#define IP ((void __user *)uprobe_get_trap_addr(regs))
283#define DO_ERROR(trapnr, signr, sicode, addr, str, name) \
284dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
285{ \
286 do_error_trap(regs, error_code, str, trapnr, signr, sicode, addr); \
287}
288
289DO_ERROR(X86_TRAP_DE, SIGFPE, FPE_INTDIV, IP, "divide error", divide_error)
290DO_ERROR(X86_TRAP_OF, SIGSEGV, 0, NULL, "overflow", overflow)
291DO_ERROR(X86_TRAP_UD, SIGILL, ILL_ILLOPN, IP, "invalid opcode", invalid_op)
292DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, 0, NULL, "coprocessor segment overrun", coprocessor_segment_overrun)
293DO_ERROR(X86_TRAP_TS, SIGSEGV, 0, NULL, "invalid TSS", invalid_TSS)
294DO_ERROR(X86_TRAP_NP, SIGBUS, 0, NULL, "segment not present", segment_not_present)
295DO_ERROR(X86_TRAP_SS, SIGBUS, 0, NULL, "stack segment", stack_segment)
296DO_ERROR(X86_TRAP_AC, SIGBUS, BUS_ADRALN, NULL, "alignment check", alignment_check)
297#undef IP
298
299#ifdef CONFIG_VMAP_STACK
300__visible void __noreturn handle_stack_overflow(const char *message,
301 struct pt_regs *regs,
302 unsigned long fault_address)
303{
304 printk(KERN_EMERG "BUG: stack guard page was hit at %p (stack is %p..%p)\n",
305 (void *)fault_address, current->stack,
306 (char *)current->stack + THREAD_SIZE - 1);
307 die(message, regs, 0);
308
309 /* Be absolutely certain we don't return. */
310 panic("%s", message);
311}
312#endif
313
314#ifdef CONFIG_X86_64
315/* Runs on IST stack */
316dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code, unsigned long cr2)
317{
318 static const char str[] = "double fault";
319 struct task_struct *tsk = current;
320
321#ifdef CONFIG_X86_ESPFIX64
322 extern unsigned char native_irq_return_iret[];
323
324 /*
325 * If IRET takes a non-IST fault on the espfix64 stack, then we
326 * end up promoting it to a doublefault. In that case, take
327 * advantage of the fact that we're not using the normal (TSS.sp0)
328 * stack right now. We can write a fake #GP(0) frame at TSS.sp0
329 * and then modify our own IRET frame so that, when we return,
330 * we land directly at the #GP(0) vector with the stack already
331 * set up according to its expectations.
332 *
333 * The net result is that our #GP handler will think that we
334 * entered from usermode with the bad user context.
335 *
336 * No need for ist_enter here because we don't use RCU.
337 */
338 if (((long)regs->sp >> P4D_SHIFT) == ESPFIX_PGD_ENTRY &&
339 regs->cs == __KERNEL_CS &&
340 regs->ip == (unsigned long)native_irq_return_iret)
341 {
342 struct pt_regs *gpregs = (struct pt_regs *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
343
344 /*
345 * regs->sp points to the failing IRET frame on the
346 * ESPFIX64 stack. Copy it to the entry stack. This fills
347 * in gpregs->ss through gpregs->ip.
348 *
349 */
350 memmove(&gpregs->ip, (void *)regs->sp, 5*8);
351 gpregs->orig_ax = 0; /* Missing (lost) #GP error code */
352
353 /*
354 * Adjust our frame so that we return straight to the #GP
355 * vector with the expected RSP value. This is safe because
356 * we won't enable interupts or schedule before we invoke
357 * general_protection, so nothing will clobber the stack
358 * frame we just set up.
359 *
360 * We will enter general_protection with kernel GSBASE,
361 * which is what the stub expects, given that the faulting
362 * RIP will be the IRET instruction.
363 */
364 regs->ip = (unsigned long)general_protection;
365 regs->sp = (unsigned long)&gpregs->orig_ax;
366
367 return;
368 }
369#endif
370
371 ist_enter(regs);
372 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
373
374 tsk->thread.error_code = error_code;
375 tsk->thread.trap_nr = X86_TRAP_DF;
376
377#ifdef CONFIG_VMAP_STACK
378 /*
379 * If we overflow the stack into a guard page, the CPU will fail
380 * to deliver #PF and will send #DF instead. Similarly, if we
381 * take any non-IST exception while too close to the bottom of
382 * the stack, the processor will get a page fault while
383 * delivering the exception and will generate a double fault.
384 *
385 * According to the SDM (footnote in 6.15 under "Interrupt 14 -
386 * Page-Fault Exception (#PF):
387 *
388 * Processors update CR2 whenever a page fault is detected. If a
389 * second page fault occurs while an earlier page fault is being
390 * delivered, the faulting linear address of the second fault will
391 * overwrite the contents of CR2 (replacing the previous
392 * address). These updates to CR2 occur even if the page fault
393 * results in a double fault or occurs during the delivery of a
394 * double fault.
395 *
396 * The logic below has a small possibility of incorrectly diagnosing
397 * some errors as stack overflows. For example, if the IDT or GDT
398 * gets corrupted such that #GP delivery fails due to a bad descriptor
399 * causing #GP and we hit this condition while CR2 coincidentally
400 * points to the stack guard page, we'll think we overflowed the
401 * stack. Given that we're going to panic one way or another
402 * if this happens, this isn't necessarily worth fixing.
403 *
404 * If necessary, we could improve the test by only diagnosing
405 * a stack overflow if the saved RSP points within 47 bytes of
406 * the bottom of the stack: if RSP == tsk_stack + 48 and we
407 * take an exception, the stack is already aligned and there
408 * will be enough room SS, RSP, RFLAGS, CS, RIP, and a
409 * possible error code, so a stack overflow would *not* double
410 * fault. With any less space left, exception delivery could
411 * fail, and, as a practical matter, we've overflowed the
412 * stack even if the actual trigger for the double fault was
413 * something else.
414 */
415 if ((unsigned long)task_stack_page(tsk) - 1 - cr2 < PAGE_SIZE)
416 handle_stack_overflow("kernel stack overflow (double-fault)", regs, cr2);
417#endif
418
419#ifdef CONFIG_DOUBLEFAULT
420 df_debug(regs, error_code);
421#endif
422 /*
423 * This is always a kernel trap and never fixable (and thus must
424 * never return).
425 */
426 for (;;)
427 die(str, regs, error_code);
428}
429#endif
430
431dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
432{
433 const struct mpx_bndcsr *bndcsr;
434
435 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
436 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
437 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
438 return;
439 cond_local_irq_enable(regs);
440
441 if (!user_mode(regs))
442 die("bounds", regs, error_code);
443
444 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
445 /* The exception is not from Intel MPX */
446 goto exit_trap;
447 }
448
449 /*
450 * We need to look at BNDSTATUS to resolve this exception.
451 * A NULL here might mean that it is in its 'init state',
452 * which is all zeros which indicates MPX was not
453 * responsible for the exception.
454 */
455 bndcsr = get_xsave_field_ptr(XFEATURE_BNDCSR);
456 if (!bndcsr)
457 goto exit_trap;
458
459 trace_bounds_exception_mpx(bndcsr);
460 /*
461 * The error code field of the BNDSTATUS register communicates status
462 * information of a bound range exception #BR or operation involving
463 * bound directory.
464 */
465 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
466 case 2: /* Bound directory has invalid entry. */
467 if (mpx_handle_bd_fault())
468 goto exit_trap;
469 break; /* Success, it was handled */
470 case 1: /* Bound violation. */
471 {
472 struct task_struct *tsk = current;
473 struct mpx_fault_info mpx;
474
475 if (mpx_fault_info(&mpx, regs)) {
476 /*
477 * We failed to decode the MPX instruction. Act as if
478 * the exception was not caused by MPX.
479 */
480 goto exit_trap;
481 }
482 /*
483 * Success, we decoded the instruction and retrieved
484 * an 'mpx' containing the address being accessed
485 * which caused the exception. This information
486 * allows and application to possibly handle the
487 * #BR exception itself.
488 */
489 if (!do_trap_no_signal(tsk, X86_TRAP_BR, "bounds", regs,
490 error_code))
491 break;
492
493 show_signal(tsk, SIGSEGV, "trap ", "bounds", regs, error_code);
494
495 force_sig_bnderr(mpx.addr, mpx.lower, mpx.upper);
496 break;
497 }
498 case 0: /* No exception caused by Intel MPX operations. */
499 goto exit_trap;
500 default:
501 die("bounds", regs, error_code);
502 }
503
504 return;
505
506exit_trap:
507 /*
508 * This path out is for all the cases where we could not
509 * handle the exception in some way (like allocating a
510 * table or telling userspace about it. We will also end
511 * up here if the kernel has MPX turned off at compile
512 * time..
513 */
514 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, 0, NULL);
515}
516
517dotraplinkage void
518do_general_protection(struct pt_regs *regs, long error_code)
519{
520 const char *desc = "general protection fault";
521 struct task_struct *tsk;
522
523 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
524 cond_local_irq_enable(regs);
525
526 if (static_cpu_has(X86_FEATURE_UMIP)) {
527 if (user_mode(regs) && fixup_umip_exception(regs))
528 return;
529 }
530
531 if (v8086_mode(regs)) {
532 local_irq_enable();
533 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
534 return;
535 }
536
537 tsk = current;
538 if (!user_mode(regs)) {
539 if (fixup_exception(regs, X86_TRAP_GP, error_code, 0))
540 return;
541
542 tsk->thread.error_code = error_code;
543 tsk->thread.trap_nr = X86_TRAP_GP;
544
545 /*
546 * To be potentially processing a kprobe fault and to
547 * trust the result from kprobe_running(), we have to
548 * be non-preemptible.
549 */
550 if (!preemptible() && kprobe_running() &&
551 kprobe_fault_handler(regs, X86_TRAP_GP))
552 return;
553
554 if (notify_die(DIE_GPF, desc, regs, error_code,
555 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
556 die(desc, regs, error_code);
557 return;
558 }
559
560 tsk->thread.error_code = error_code;
561 tsk->thread.trap_nr = X86_TRAP_GP;
562
563 show_signal(tsk, SIGSEGV, "", desc, regs, error_code);
564
565 force_sig(SIGSEGV);
566}
567NOKPROBE_SYMBOL(do_general_protection);
568
569dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
570{
571#ifdef CONFIG_DYNAMIC_FTRACE
572 /*
573 * ftrace must be first, everything else may cause a recursive crash.
574 * See note by declaration of modifying_ftrace_code in ftrace.c
575 */
576 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
577 ftrace_int3_handler(regs))
578 return;
579#endif
580 if (poke_int3_handler(regs))
581 return;
582
583 /*
584 * Use ist_enter despite the fact that we don't use an IST stack.
585 * We can be called from a kprobe in non-CONTEXT_KERNEL kernel
586 * mode or even during context tracking state changes.
587 *
588 * This means that we can't schedule. That's okay.
589 */
590 ist_enter(regs);
591 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
592#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
593 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
594 SIGTRAP) == NOTIFY_STOP)
595 goto exit;
596#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
597
598#ifdef CONFIG_KPROBES
599 if (kprobe_int3_handler(regs))
600 goto exit;
601#endif
602
603 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
604 SIGTRAP) == NOTIFY_STOP)
605 goto exit;
606
607 cond_local_irq_enable(regs);
608 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, 0, NULL);
609 cond_local_irq_disable(regs);
610
611exit:
612 ist_exit(regs);
613}
614NOKPROBE_SYMBOL(do_int3);
615
616#ifdef CONFIG_X86_64
617/*
618 * Help handler running on a per-cpu (IST or entry trampoline) stack
619 * to switch to the normal thread stack if the interrupted code was in
620 * user mode. The actual stack switch is done in entry_64.S
621 */
622asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
623{
624 struct pt_regs *regs = (struct pt_regs *)this_cpu_read(cpu_current_top_of_stack) - 1;
625 if (regs != eregs)
626 *regs = *eregs;
627 return regs;
628}
629NOKPROBE_SYMBOL(sync_regs);
630
631struct bad_iret_stack {
632 void *error_entry_ret;
633 struct pt_regs regs;
634};
635
636asmlinkage __visible notrace
637struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
638{
639 /*
640 * This is called from entry_64.S early in handling a fault
641 * caused by a bad iret to user mode. To handle the fault
642 * correctly, we want to move our stack frame to where it would
643 * be had we entered directly on the entry stack (rather than
644 * just below the IRET frame) and we want to pretend that the
645 * exception came from the IRET target.
646 */
647 struct bad_iret_stack *new_stack =
648 (struct bad_iret_stack *)this_cpu_read(cpu_tss_rw.x86_tss.sp0) - 1;
649
650 /* Copy the IRET target to the new stack. */
651 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
652
653 /* Copy the remainder of the stack from the current stack. */
654 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
655
656 BUG_ON(!user_mode(&new_stack->regs));
657 return new_stack;
658}
659NOKPROBE_SYMBOL(fixup_bad_iret);
660#endif
661
662static bool is_sysenter_singlestep(struct pt_regs *regs)
663{
664 /*
665 * We don't try for precision here. If we're anywhere in the region of
666 * code that can be single-stepped in the SYSENTER entry path, then
667 * assume that this is a useless single-step trap due to SYSENTER
668 * being invoked with TF set. (We don't know in advance exactly
669 * which instructions will be hit because BTF could plausibly
670 * be set.)
671 */
672#ifdef CONFIG_X86_32
673 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
674 (unsigned long)__end_SYSENTER_singlestep_region -
675 (unsigned long)__begin_SYSENTER_singlestep_region;
676#elif defined(CONFIG_IA32_EMULATION)
677 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
678 (unsigned long)__end_entry_SYSENTER_compat -
679 (unsigned long)entry_SYSENTER_compat;
680#else
681 return false;
682#endif
683}
684
685/*
686 * Our handling of the processor debug registers is non-trivial.
687 * We do not clear them on entry and exit from the kernel. Therefore
688 * it is possible to get a watchpoint trap here from inside the kernel.
689 * However, the code in ./ptrace.c has ensured that the user can
690 * only set watchpoints on userspace addresses. Therefore the in-kernel
691 * watchpoint trap can only occur in code which is reading/writing
692 * from user space. Such code must not hold kernel locks (since it
693 * can equally take a page fault), therefore it is safe to call
694 * force_sig_info even though that claims and releases locks.
695 *
696 * Code in ./signal.c ensures that the debug control register
697 * is restored before we deliver any signal, and therefore that
698 * user code runs with the correct debug control register even though
699 * we clear it here.
700 *
701 * Being careful here means that we don't have to be as careful in a
702 * lot of more complicated places (task switching can be a bit lazy
703 * about restoring all the debug state, and ptrace doesn't have to
704 * find every occurrence of the TF bit that could be saved away even
705 * by user code)
706 *
707 * May run on IST stack.
708 */
709dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
710{
711 struct task_struct *tsk = current;
712 int user_icebp = 0;
713 unsigned long dr6;
714 int si_code;
715
716 ist_enter(regs);
717
718 get_debugreg(dr6, 6);
719 /*
720 * The Intel SDM says:
721 *
722 * Certain debug exceptions may clear bits 0-3. The remaining
723 * contents of the DR6 register are never cleared by the
724 * processor. To avoid confusion in identifying debug
725 * exceptions, debug handlers should clear the register before
726 * returning to the interrupted task.
727 *
728 * Keep it simple: clear DR6 immediately.
729 */
730 set_debugreg(0, 6);
731
732 /* Filter out all the reserved bits which are preset to 1 */
733 dr6 &= ~DR6_RESERVED;
734
735 /*
736 * The SDM says "The processor clears the BTF flag when it
737 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
738 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
739 */
740 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
741
742 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
743 is_sysenter_singlestep(regs))) {
744 dr6 &= ~DR_STEP;
745 if (!dr6)
746 goto exit;
747 /*
748 * else we might have gotten a single-step trap and hit a
749 * watchpoint at the same time, in which case we should fall
750 * through and handle the watchpoint.
751 */
752 }
753
754 /*
755 * If dr6 has no reason to give us about the origin of this trap,
756 * then it's very likely the result of an icebp/int01 trap.
757 * User wants a sigtrap for that.
758 */
759 if (!dr6 && user_mode(regs))
760 user_icebp = 1;
761
762 /* Store the virtualized DR6 value */
763 tsk->thread.debugreg6 = dr6;
764
765#ifdef CONFIG_KPROBES
766 if (kprobe_debug_handler(regs))
767 goto exit;
768#endif
769
770 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
771 SIGTRAP) == NOTIFY_STOP)
772 goto exit;
773
774 /*
775 * Let others (NMI) know that the debug stack is in use
776 * as we may switch to the interrupt stack.
777 */
778 debug_stack_usage_inc();
779
780 /* It's safe to allow irq's after DR6 has been saved */
781 cond_local_irq_enable(regs);
782
783 if (v8086_mode(regs)) {
784 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
785 X86_TRAP_DB);
786 cond_local_irq_disable(regs);
787 debug_stack_usage_dec();
788 goto exit;
789 }
790
791 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
792 /*
793 * Historical junk that used to handle SYSENTER single-stepping.
794 * This should be unreachable now. If we survive for a while
795 * without anyone hitting this warning, we'll turn this into
796 * an oops.
797 */
798 tsk->thread.debugreg6 &= ~DR_STEP;
799 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
800 regs->flags &= ~X86_EFLAGS_TF;
801 }
802 si_code = get_si_code(tsk->thread.debugreg6);
803 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
804 send_sigtrap(regs, error_code, si_code);
805 cond_local_irq_disable(regs);
806 debug_stack_usage_dec();
807
808exit:
809 ist_exit(regs);
810}
811NOKPROBE_SYMBOL(do_debug);
812
813/*
814 * Note that we play around with the 'TS' bit in an attempt to get
815 * the correct behaviour even in the presence of the asynchronous
816 * IRQ13 behaviour
817 */
818static void math_error(struct pt_regs *regs, int error_code, int trapnr)
819{
820 struct task_struct *task = current;
821 struct fpu *fpu = &task->thread.fpu;
822 int si_code;
823 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
824 "simd exception";
825
826 cond_local_irq_enable(regs);
827
828 if (!user_mode(regs)) {
829 if (fixup_exception(regs, trapnr, error_code, 0))
830 return;
831
832 task->thread.error_code = error_code;
833 task->thread.trap_nr = trapnr;
834
835 if (notify_die(DIE_TRAP, str, regs, error_code,
836 trapnr, SIGFPE) != NOTIFY_STOP)
837 die(str, regs, error_code);
838 return;
839 }
840
841 /*
842 * Save the info for the exception handler and clear the error.
843 */
844 fpu__save(fpu);
845
846 task->thread.trap_nr = trapnr;
847 task->thread.error_code = error_code;
848
849 si_code = fpu__exception_code(fpu, trapnr);
850 /* Retry when we get spurious exceptions: */
851 if (!si_code)
852 return;
853
854 force_sig_fault(SIGFPE, si_code,
855 (void __user *)uprobe_get_trap_addr(regs));
856}
857
858dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
859{
860 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
861 math_error(regs, error_code, X86_TRAP_MF);
862}
863
864dotraplinkage void
865do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
866{
867 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
868 math_error(regs, error_code, X86_TRAP_XF);
869}
870
871dotraplinkage void
872do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
873{
874 cond_local_irq_enable(regs);
875}
876
877dotraplinkage void
878do_device_not_available(struct pt_regs *regs, long error_code)
879{
880 unsigned long cr0 = read_cr0();
881
882 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
883
884#ifdef CONFIG_MATH_EMULATION
885 if (!boot_cpu_has(X86_FEATURE_FPU) && (cr0 & X86_CR0_EM)) {
886 struct math_emu_info info = { };
887
888 cond_local_irq_enable(regs);
889
890 info.regs = regs;
891 math_emulate(&info);
892 return;
893 }
894#endif
895
896 /* This should not happen. */
897 if (WARN(cr0 & X86_CR0_TS, "CR0.TS was set")) {
898 /* Try to fix it up and carry on. */
899 write_cr0(cr0 & ~X86_CR0_TS);
900 } else {
901 /*
902 * Something terrible happened, and we're better off trying
903 * to kill the task than getting stuck in a never-ending
904 * loop of #NM faults.
905 */
906 die("unexpected #NM exception", regs, error_code);
907 }
908}
909NOKPROBE_SYMBOL(do_device_not_available);
910
911#ifdef CONFIG_X86_32
912dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
913{
914 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
915 local_irq_enable();
916
917 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
918 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
919 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
920 ILL_BADSTK, (void __user *)NULL);
921 }
922}
923#endif
924
925void __init trap_init(void)
926{
927 /* Init cpu_entry_area before IST entries are set up */
928 setup_cpu_entry_areas();
929
930 idt_setup_traps();
931
932 /*
933 * Set the IDT descriptor to a fixed read-only location, so that the
934 * "sidt" instruction will not leak the location of the kernel, and
935 * to defend the IDT against arbitrary memory write vulnerabilities.
936 * It will be reloaded in cpu_init() */
937 cea_set_pte(CPU_ENTRY_AREA_RO_IDT_VADDR, __pa_symbol(idt_table),
938 PAGE_KERNEL_RO);
939 idt_descr.address = CPU_ENTRY_AREA_RO_IDT;
940
941 /*
942 * Should be a barrier for any external CPU state:
943 */
944 cpu_init();
945
946 idt_setup_ist_traps();
947
948 x86_init.irqs.trap_init();
949
950 idt_setup_debugidt_traps();
951}
1/*
2 * Copyright (C) 1991, 1992 Linus Torvalds
3 * Copyright (C) 2000, 2001, 2002 Andi Kleen, SuSE Labs
4 *
5 * Pentium III FXSR, SSE support
6 * Gareth Hughes <gareth@valinux.com>, May 2000
7 */
8
9/*
10 * Handle hardware traps and faults.
11 */
12
13#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
14
15#include <linux/context_tracking.h>
16#include <linux/interrupt.h>
17#include <linux/kallsyms.h>
18#include <linux/spinlock.h>
19#include <linux/kprobes.h>
20#include <linux/uaccess.h>
21#include <linux/kdebug.h>
22#include <linux/kgdb.h>
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/ptrace.h>
26#include <linux/uprobes.h>
27#include <linux/string.h>
28#include <linux/delay.h>
29#include <linux/errno.h>
30#include <linux/kexec.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/init.h>
34#include <linux/bug.h>
35#include <linux/nmi.h>
36#include <linux/mm.h>
37#include <linux/smp.h>
38#include <linux/io.h>
39
40#ifdef CONFIG_EISA
41#include <linux/ioport.h>
42#include <linux/eisa.h>
43#endif
44
45#if defined(CONFIG_EDAC)
46#include <linux/edac.h>
47#endif
48
49#include <asm/kmemcheck.h>
50#include <asm/stacktrace.h>
51#include <asm/processor.h>
52#include <asm/debugreg.h>
53#include <linux/atomic.h>
54#include <asm/ftrace.h>
55#include <asm/traps.h>
56#include <asm/desc.h>
57#include <asm/fpu/internal.h>
58#include <asm/mce.h>
59#include <asm/fixmap.h>
60#include <asm/mach_traps.h>
61#include <asm/alternative.h>
62#include <asm/fpu/xstate.h>
63#include <asm/trace/mpx.h>
64#include <asm/mpx.h>
65#include <asm/vm86.h>
66
67#ifdef CONFIG_X86_64
68#include <asm/x86_init.h>
69#include <asm/pgalloc.h>
70#include <asm/proto.h>
71
72/* No need to be aligned, but done to keep all IDTs defined the same way. */
73gate_desc debug_idt_table[NR_VECTORS] __page_aligned_bss;
74#else
75#include <asm/processor-flags.h>
76#include <asm/setup.h>
77#include <asm/proto.h>
78#endif
79
80/* Must be page-aligned because the real IDT is used in a fixmap. */
81gate_desc idt_table[NR_VECTORS] __page_aligned_bss;
82
83DECLARE_BITMAP(used_vectors, NR_VECTORS);
84EXPORT_SYMBOL_GPL(used_vectors);
85
86static inline void cond_local_irq_enable(struct pt_regs *regs)
87{
88 if (regs->flags & X86_EFLAGS_IF)
89 local_irq_enable();
90}
91
92static inline void cond_local_irq_disable(struct pt_regs *regs)
93{
94 if (regs->flags & X86_EFLAGS_IF)
95 local_irq_disable();
96}
97
98void ist_enter(struct pt_regs *regs)
99{
100 if (user_mode(regs)) {
101 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
102 } else {
103 /*
104 * We might have interrupted pretty much anything. In
105 * fact, if we're a machine check, we can even interrupt
106 * NMI processing. We don't want in_nmi() to return true,
107 * but we need to notify RCU.
108 */
109 rcu_nmi_enter();
110 }
111
112 /*
113 * We are atomic because we're on the IST stack; or we're on
114 * x86_32, in which case we still shouldn't schedule; or we're
115 * on x86_64 and entered from user mode, in which case we're
116 * still atomic unless ist_begin_non_atomic is called.
117 */
118 preempt_count_add(HARDIRQ_OFFSET);
119
120 /* This code is a bit fragile. Test it. */
121 RCU_LOCKDEP_WARN(!rcu_is_watching(), "ist_enter didn't work");
122}
123
124void ist_exit(struct pt_regs *regs)
125{
126 preempt_count_sub(HARDIRQ_OFFSET);
127
128 if (!user_mode(regs))
129 rcu_nmi_exit();
130}
131
132/**
133 * ist_begin_non_atomic() - begin a non-atomic section in an IST exception
134 * @regs: regs passed to the IST exception handler
135 *
136 * IST exception handlers normally cannot schedule. As a special
137 * exception, if the exception interrupted userspace code (i.e.
138 * user_mode(regs) would return true) and the exception was not
139 * a double fault, it can be safe to schedule. ist_begin_non_atomic()
140 * begins a non-atomic section within an ist_enter()/ist_exit() region.
141 * Callers are responsible for enabling interrupts themselves inside
142 * the non-atomic section, and callers must call ist_end_non_atomic()
143 * before ist_exit().
144 */
145void ist_begin_non_atomic(struct pt_regs *regs)
146{
147 BUG_ON(!user_mode(regs));
148
149 /*
150 * Sanity check: we need to be on the normal thread stack. This
151 * will catch asm bugs and any attempt to use ist_preempt_enable
152 * from double_fault.
153 */
154 BUG_ON((unsigned long)(current_top_of_stack() -
155 current_stack_pointer()) >= THREAD_SIZE);
156
157 preempt_count_sub(HARDIRQ_OFFSET);
158}
159
160/**
161 * ist_end_non_atomic() - begin a non-atomic section in an IST exception
162 *
163 * Ends a non-atomic section started with ist_begin_non_atomic().
164 */
165void ist_end_non_atomic(void)
166{
167 preempt_count_add(HARDIRQ_OFFSET);
168}
169
170static nokprobe_inline int
171do_trap_no_signal(struct task_struct *tsk, int trapnr, char *str,
172 struct pt_regs *regs, long error_code)
173{
174 if (v8086_mode(regs)) {
175 /*
176 * Traps 0, 1, 3, 4, and 5 should be forwarded to vm86.
177 * On nmi (interrupt 2), do_trap should not be called.
178 */
179 if (trapnr < X86_TRAP_UD) {
180 if (!handle_vm86_trap((struct kernel_vm86_regs *) regs,
181 error_code, trapnr))
182 return 0;
183 }
184 return -1;
185 }
186
187 if (!user_mode(regs)) {
188 if (!fixup_exception(regs, trapnr)) {
189 tsk->thread.error_code = error_code;
190 tsk->thread.trap_nr = trapnr;
191 die(str, regs, error_code);
192 }
193 return 0;
194 }
195
196 return -1;
197}
198
199static siginfo_t *fill_trap_info(struct pt_regs *regs, int signr, int trapnr,
200 siginfo_t *info)
201{
202 unsigned long siaddr;
203 int sicode;
204
205 switch (trapnr) {
206 default:
207 return SEND_SIG_PRIV;
208
209 case X86_TRAP_DE:
210 sicode = FPE_INTDIV;
211 siaddr = uprobe_get_trap_addr(regs);
212 break;
213 case X86_TRAP_UD:
214 sicode = ILL_ILLOPN;
215 siaddr = uprobe_get_trap_addr(regs);
216 break;
217 case X86_TRAP_AC:
218 sicode = BUS_ADRALN;
219 siaddr = 0;
220 break;
221 }
222
223 info->si_signo = signr;
224 info->si_errno = 0;
225 info->si_code = sicode;
226 info->si_addr = (void __user *)siaddr;
227 return info;
228}
229
230static void
231do_trap(int trapnr, int signr, char *str, struct pt_regs *regs,
232 long error_code, siginfo_t *info)
233{
234 struct task_struct *tsk = current;
235
236
237 if (!do_trap_no_signal(tsk, trapnr, str, regs, error_code))
238 return;
239 /*
240 * We want error_code and trap_nr set for userspace faults and
241 * kernelspace faults which result in die(), but not
242 * kernelspace faults which are fixed up. die() gives the
243 * process no chance to handle the signal and notice the
244 * kernel fault information, so that won't result in polluting
245 * the information about previously queued, but not yet
246 * delivered, faults. See also do_general_protection below.
247 */
248 tsk->thread.error_code = error_code;
249 tsk->thread.trap_nr = trapnr;
250
251 if (show_unhandled_signals && unhandled_signal(tsk, signr) &&
252 printk_ratelimit()) {
253 pr_info("%s[%d] trap %s ip:%lx sp:%lx error:%lx",
254 tsk->comm, tsk->pid, str,
255 regs->ip, regs->sp, error_code);
256 print_vma_addr(" in ", regs->ip);
257 pr_cont("\n");
258 }
259
260 force_sig_info(signr, info ?: SEND_SIG_PRIV, tsk);
261}
262NOKPROBE_SYMBOL(do_trap);
263
264static void do_error_trap(struct pt_regs *regs, long error_code, char *str,
265 unsigned long trapnr, int signr)
266{
267 siginfo_t info;
268
269 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
270
271 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, signr) !=
272 NOTIFY_STOP) {
273 cond_local_irq_enable(regs);
274 do_trap(trapnr, signr, str, regs, error_code,
275 fill_trap_info(regs, signr, trapnr, &info));
276 }
277}
278
279#define DO_ERROR(trapnr, signr, str, name) \
280dotraplinkage void do_##name(struct pt_regs *regs, long error_code) \
281{ \
282 do_error_trap(regs, error_code, str, trapnr, signr); \
283}
284
285DO_ERROR(X86_TRAP_DE, SIGFPE, "divide error", divide_error)
286DO_ERROR(X86_TRAP_OF, SIGSEGV, "overflow", overflow)
287DO_ERROR(X86_TRAP_UD, SIGILL, "invalid opcode", invalid_op)
288DO_ERROR(X86_TRAP_OLD_MF, SIGFPE, "coprocessor segment overrun",coprocessor_segment_overrun)
289DO_ERROR(X86_TRAP_TS, SIGSEGV, "invalid TSS", invalid_TSS)
290DO_ERROR(X86_TRAP_NP, SIGBUS, "segment not present", segment_not_present)
291DO_ERROR(X86_TRAP_SS, SIGBUS, "stack segment", stack_segment)
292DO_ERROR(X86_TRAP_AC, SIGBUS, "alignment check", alignment_check)
293
294#ifdef CONFIG_X86_64
295/* Runs on IST stack */
296dotraplinkage void do_double_fault(struct pt_regs *regs, long error_code)
297{
298 static const char str[] = "double fault";
299 struct task_struct *tsk = current;
300
301#ifdef CONFIG_X86_ESPFIX64
302 extern unsigned char native_irq_return_iret[];
303
304 /*
305 * If IRET takes a non-IST fault on the espfix64 stack, then we
306 * end up promoting it to a doublefault. In that case, modify
307 * the stack to make it look like we just entered the #GP
308 * handler from user space, similar to bad_iret.
309 *
310 * No need for ist_enter here because we don't use RCU.
311 */
312 if (((long)regs->sp >> PGDIR_SHIFT) == ESPFIX_PGD_ENTRY &&
313 regs->cs == __KERNEL_CS &&
314 regs->ip == (unsigned long)native_irq_return_iret)
315 {
316 struct pt_regs *normal_regs = task_pt_regs(current);
317
318 /* Fake a #GP(0) from userspace. */
319 memmove(&normal_regs->ip, (void *)regs->sp, 5*8);
320 normal_regs->orig_ax = 0; /* Missing (lost) #GP error code */
321 regs->ip = (unsigned long)general_protection;
322 regs->sp = (unsigned long)&normal_regs->orig_ax;
323
324 return;
325 }
326#endif
327
328 ist_enter(regs);
329 notify_die(DIE_TRAP, str, regs, error_code, X86_TRAP_DF, SIGSEGV);
330
331 tsk->thread.error_code = error_code;
332 tsk->thread.trap_nr = X86_TRAP_DF;
333
334#ifdef CONFIG_DOUBLEFAULT
335 df_debug(regs, error_code);
336#endif
337 /*
338 * This is always a kernel trap and never fixable (and thus must
339 * never return).
340 */
341 for (;;)
342 die(str, regs, error_code);
343}
344#endif
345
346dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
347{
348 const struct mpx_bndcsr *bndcsr;
349 siginfo_t *info;
350
351 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
352 if (notify_die(DIE_TRAP, "bounds", regs, error_code,
353 X86_TRAP_BR, SIGSEGV) == NOTIFY_STOP)
354 return;
355 cond_local_irq_enable(regs);
356
357 if (!user_mode(regs))
358 die("bounds", regs, error_code);
359
360 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
361 /* The exception is not from Intel MPX */
362 goto exit_trap;
363 }
364
365 /*
366 * We need to look at BNDSTATUS to resolve this exception.
367 * A NULL here might mean that it is in its 'init state',
368 * which is all zeros which indicates MPX was not
369 * responsible for the exception.
370 */
371 bndcsr = get_xsave_field_ptr(XFEATURE_MASK_BNDCSR);
372 if (!bndcsr)
373 goto exit_trap;
374
375 trace_bounds_exception_mpx(bndcsr);
376 /*
377 * The error code field of the BNDSTATUS register communicates status
378 * information of a bound range exception #BR or operation involving
379 * bound directory.
380 */
381 switch (bndcsr->bndstatus & MPX_BNDSTA_ERROR_CODE) {
382 case 2: /* Bound directory has invalid entry. */
383 if (mpx_handle_bd_fault())
384 goto exit_trap;
385 break; /* Success, it was handled */
386 case 1: /* Bound violation. */
387 info = mpx_generate_siginfo(regs);
388 if (IS_ERR(info)) {
389 /*
390 * We failed to decode the MPX instruction. Act as if
391 * the exception was not caused by MPX.
392 */
393 goto exit_trap;
394 }
395 /*
396 * Success, we decoded the instruction and retrieved
397 * an 'info' containing the address being accessed
398 * which caused the exception. This information
399 * allows and application to possibly handle the
400 * #BR exception itself.
401 */
402 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, info);
403 kfree(info);
404 break;
405 case 0: /* No exception caused by Intel MPX operations. */
406 goto exit_trap;
407 default:
408 die("bounds", regs, error_code);
409 }
410
411 return;
412
413exit_trap:
414 /*
415 * This path out is for all the cases where we could not
416 * handle the exception in some way (like allocating a
417 * table or telling userspace about it. We will also end
418 * up here if the kernel has MPX turned off at compile
419 * time..
420 */
421 do_trap(X86_TRAP_BR, SIGSEGV, "bounds", regs, error_code, NULL);
422}
423
424dotraplinkage void
425do_general_protection(struct pt_regs *regs, long error_code)
426{
427 struct task_struct *tsk;
428
429 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
430 cond_local_irq_enable(regs);
431
432 if (v8086_mode(regs)) {
433 local_irq_enable();
434 handle_vm86_fault((struct kernel_vm86_regs *) regs, error_code);
435 return;
436 }
437
438 tsk = current;
439 if (!user_mode(regs)) {
440 if (fixup_exception(regs, X86_TRAP_GP))
441 return;
442
443 tsk->thread.error_code = error_code;
444 tsk->thread.trap_nr = X86_TRAP_GP;
445 if (notify_die(DIE_GPF, "general protection fault", regs, error_code,
446 X86_TRAP_GP, SIGSEGV) != NOTIFY_STOP)
447 die("general protection fault", regs, error_code);
448 return;
449 }
450
451 tsk->thread.error_code = error_code;
452 tsk->thread.trap_nr = X86_TRAP_GP;
453
454 if (show_unhandled_signals && unhandled_signal(tsk, SIGSEGV) &&
455 printk_ratelimit()) {
456 pr_info("%s[%d] general protection ip:%lx sp:%lx error:%lx",
457 tsk->comm, task_pid_nr(tsk),
458 regs->ip, regs->sp, error_code);
459 print_vma_addr(" in ", regs->ip);
460 pr_cont("\n");
461 }
462
463 force_sig_info(SIGSEGV, SEND_SIG_PRIV, tsk);
464}
465NOKPROBE_SYMBOL(do_general_protection);
466
467/* May run on IST stack. */
468dotraplinkage void notrace do_int3(struct pt_regs *regs, long error_code)
469{
470#ifdef CONFIG_DYNAMIC_FTRACE
471 /*
472 * ftrace must be first, everything else may cause a recursive crash.
473 * See note by declaration of modifying_ftrace_code in ftrace.c
474 */
475 if (unlikely(atomic_read(&modifying_ftrace_code)) &&
476 ftrace_int3_handler(regs))
477 return;
478#endif
479 if (poke_int3_handler(regs))
480 return;
481
482 ist_enter(regs);
483 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
484#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
485 if (kgdb_ll_trap(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
486 SIGTRAP) == NOTIFY_STOP)
487 goto exit;
488#endif /* CONFIG_KGDB_LOW_LEVEL_TRAP */
489
490#ifdef CONFIG_KPROBES
491 if (kprobe_int3_handler(regs))
492 goto exit;
493#endif
494
495 if (notify_die(DIE_INT3, "int3", regs, error_code, X86_TRAP_BP,
496 SIGTRAP) == NOTIFY_STOP)
497 goto exit;
498
499 /*
500 * Let others (NMI) know that the debug stack is in use
501 * as we may switch to the interrupt stack.
502 */
503 debug_stack_usage_inc();
504 preempt_disable();
505 cond_local_irq_enable(regs);
506 do_trap(X86_TRAP_BP, SIGTRAP, "int3", regs, error_code, NULL);
507 cond_local_irq_disable(regs);
508 preempt_enable_no_resched();
509 debug_stack_usage_dec();
510exit:
511 ist_exit(regs);
512}
513NOKPROBE_SYMBOL(do_int3);
514
515#ifdef CONFIG_X86_64
516/*
517 * Help handler running on IST stack to switch off the IST stack if the
518 * interrupted code was in user mode. The actual stack switch is done in
519 * entry_64.S
520 */
521asmlinkage __visible notrace struct pt_regs *sync_regs(struct pt_regs *eregs)
522{
523 struct pt_regs *regs = task_pt_regs(current);
524 *regs = *eregs;
525 return regs;
526}
527NOKPROBE_SYMBOL(sync_regs);
528
529struct bad_iret_stack {
530 void *error_entry_ret;
531 struct pt_regs regs;
532};
533
534asmlinkage __visible notrace
535struct bad_iret_stack *fixup_bad_iret(struct bad_iret_stack *s)
536{
537 /*
538 * This is called from entry_64.S early in handling a fault
539 * caused by a bad iret to user mode. To handle the fault
540 * correctly, we want move our stack frame to task_pt_regs
541 * and we want to pretend that the exception came from the
542 * iret target.
543 */
544 struct bad_iret_stack *new_stack =
545 container_of(task_pt_regs(current),
546 struct bad_iret_stack, regs);
547
548 /* Copy the IRET target to the new stack. */
549 memmove(&new_stack->regs.ip, (void *)s->regs.sp, 5*8);
550
551 /* Copy the remainder of the stack from the current stack. */
552 memmove(new_stack, s, offsetof(struct bad_iret_stack, regs.ip));
553
554 BUG_ON(!user_mode(&new_stack->regs));
555 return new_stack;
556}
557NOKPROBE_SYMBOL(fixup_bad_iret);
558#endif
559
560static bool is_sysenter_singlestep(struct pt_regs *regs)
561{
562 /*
563 * We don't try for precision here. If we're anywhere in the region of
564 * code that can be single-stepped in the SYSENTER entry path, then
565 * assume that this is a useless single-step trap due to SYSENTER
566 * being invoked with TF set. (We don't know in advance exactly
567 * which instructions will be hit because BTF could plausibly
568 * be set.)
569 */
570#ifdef CONFIG_X86_32
571 return (regs->ip - (unsigned long)__begin_SYSENTER_singlestep_region) <
572 (unsigned long)__end_SYSENTER_singlestep_region -
573 (unsigned long)__begin_SYSENTER_singlestep_region;
574#elif defined(CONFIG_IA32_EMULATION)
575 return (regs->ip - (unsigned long)entry_SYSENTER_compat) <
576 (unsigned long)__end_entry_SYSENTER_compat -
577 (unsigned long)entry_SYSENTER_compat;
578#else
579 return false;
580#endif
581}
582
583/*
584 * Our handling of the processor debug registers is non-trivial.
585 * We do not clear them on entry and exit from the kernel. Therefore
586 * it is possible to get a watchpoint trap here from inside the kernel.
587 * However, the code in ./ptrace.c has ensured that the user can
588 * only set watchpoints on userspace addresses. Therefore the in-kernel
589 * watchpoint trap can only occur in code which is reading/writing
590 * from user space. Such code must not hold kernel locks (since it
591 * can equally take a page fault), therefore it is safe to call
592 * force_sig_info even though that claims and releases locks.
593 *
594 * Code in ./signal.c ensures that the debug control register
595 * is restored before we deliver any signal, and therefore that
596 * user code runs with the correct debug control register even though
597 * we clear it here.
598 *
599 * Being careful here means that we don't have to be as careful in a
600 * lot of more complicated places (task switching can be a bit lazy
601 * about restoring all the debug state, and ptrace doesn't have to
602 * find every occurrence of the TF bit that could be saved away even
603 * by user code)
604 *
605 * May run on IST stack.
606 */
607dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
608{
609 struct task_struct *tsk = current;
610 int user_icebp = 0;
611 unsigned long dr6;
612 int si_code;
613
614 ist_enter(regs);
615
616 get_debugreg(dr6, 6);
617 /*
618 * The Intel SDM says:
619 *
620 * Certain debug exceptions may clear bits 0-3. The remaining
621 * contents of the DR6 register are never cleared by the
622 * processor. To avoid confusion in identifying debug
623 * exceptions, debug handlers should clear the register before
624 * returning to the interrupted task.
625 *
626 * Keep it simple: clear DR6 immediately.
627 */
628 set_debugreg(0, 6);
629
630 /* Filter out all the reserved bits which are preset to 1 */
631 dr6 &= ~DR6_RESERVED;
632
633 /*
634 * The SDM says "The processor clears the BTF flag when it
635 * generates a debug exception." Clear TIF_BLOCKSTEP to keep
636 * TIF_BLOCKSTEP in sync with the hardware BTF flag.
637 */
638 clear_tsk_thread_flag(tsk, TIF_BLOCKSTEP);
639
640 if (unlikely(!user_mode(regs) && (dr6 & DR_STEP) &&
641 is_sysenter_singlestep(regs))) {
642 dr6 &= ~DR_STEP;
643 if (!dr6)
644 goto exit;
645 /*
646 * else we might have gotten a single-step trap and hit a
647 * watchpoint at the same time, in which case we should fall
648 * through and handle the watchpoint.
649 */
650 }
651
652 /*
653 * If dr6 has no reason to give us about the origin of this trap,
654 * then it's very likely the result of an icebp/int01 trap.
655 * User wants a sigtrap for that.
656 */
657 if (!dr6 && user_mode(regs))
658 user_icebp = 1;
659
660 /* Catch kmemcheck conditions! */
661 if ((dr6 & DR_STEP) && kmemcheck_trap(regs))
662 goto exit;
663
664 /* Store the virtualized DR6 value */
665 tsk->thread.debugreg6 = dr6;
666
667#ifdef CONFIG_KPROBES
668 if (kprobe_debug_handler(regs))
669 goto exit;
670#endif
671
672 if (notify_die(DIE_DEBUG, "debug", regs, (long)&dr6, error_code,
673 SIGTRAP) == NOTIFY_STOP)
674 goto exit;
675
676 /*
677 * Let others (NMI) know that the debug stack is in use
678 * as we may switch to the interrupt stack.
679 */
680 debug_stack_usage_inc();
681
682 /* It's safe to allow irq's after DR6 has been saved */
683 preempt_disable();
684 cond_local_irq_enable(regs);
685
686 if (v8086_mode(regs)) {
687 handle_vm86_trap((struct kernel_vm86_regs *) regs, error_code,
688 X86_TRAP_DB);
689 cond_local_irq_disable(regs);
690 preempt_enable_no_resched();
691 debug_stack_usage_dec();
692 goto exit;
693 }
694
695 if (WARN_ON_ONCE((dr6 & DR_STEP) && !user_mode(regs))) {
696 /*
697 * Historical junk that used to handle SYSENTER single-stepping.
698 * This should be unreachable now. If we survive for a while
699 * without anyone hitting this warning, we'll turn this into
700 * an oops.
701 */
702 tsk->thread.debugreg6 &= ~DR_STEP;
703 set_tsk_thread_flag(tsk, TIF_SINGLESTEP);
704 regs->flags &= ~X86_EFLAGS_TF;
705 }
706 si_code = get_si_code(tsk->thread.debugreg6);
707 if (tsk->thread.debugreg6 & (DR_STEP | DR_TRAP_BITS) || user_icebp)
708 send_sigtrap(tsk, regs, error_code, si_code);
709 cond_local_irq_disable(regs);
710 preempt_enable_no_resched();
711 debug_stack_usage_dec();
712
713exit:
714#if defined(CONFIG_X86_32)
715 /*
716 * This is the most likely code path that involves non-trivial use
717 * of the SYSENTER stack. Check that we haven't overrun it.
718 */
719 WARN(this_cpu_read(cpu_tss.SYSENTER_stack_canary) != STACK_END_MAGIC,
720 "Overran or corrupted SYSENTER stack\n");
721#endif
722 ist_exit(regs);
723}
724NOKPROBE_SYMBOL(do_debug);
725
726/*
727 * Note that we play around with the 'TS' bit in an attempt to get
728 * the correct behaviour even in the presence of the asynchronous
729 * IRQ13 behaviour
730 */
731static void math_error(struct pt_regs *regs, int error_code, int trapnr)
732{
733 struct task_struct *task = current;
734 struct fpu *fpu = &task->thread.fpu;
735 siginfo_t info;
736 char *str = (trapnr == X86_TRAP_MF) ? "fpu exception" :
737 "simd exception";
738
739 if (notify_die(DIE_TRAP, str, regs, error_code, trapnr, SIGFPE) == NOTIFY_STOP)
740 return;
741 cond_local_irq_enable(regs);
742
743 if (!user_mode(regs)) {
744 if (!fixup_exception(regs, trapnr)) {
745 task->thread.error_code = error_code;
746 task->thread.trap_nr = trapnr;
747 die(str, regs, error_code);
748 }
749 return;
750 }
751
752 /*
753 * Save the info for the exception handler and clear the error.
754 */
755 fpu__save(fpu);
756
757 task->thread.trap_nr = trapnr;
758 task->thread.error_code = error_code;
759 info.si_signo = SIGFPE;
760 info.si_errno = 0;
761 info.si_addr = (void __user *)uprobe_get_trap_addr(regs);
762
763 info.si_code = fpu__exception_code(fpu, trapnr);
764
765 /* Retry when we get spurious exceptions: */
766 if (!info.si_code)
767 return;
768
769 force_sig_info(SIGFPE, &info, task);
770}
771
772dotraplinkage void do_coprocessor_error(struct pt_regs *regs, long error_code)
773{
774 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
775 math_error(regs, error_code, X86_TRAP_MF);
776}
777
778dotraplinkage void
779do_simd_coprocessor_error(struct pt_regs *regs, long error_code)
780{
781 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
782 math_error(regs, error_code, X86_TRAP_XF);
783}
784
785dotraplinkage void
786do_spurious_interrupt_bug(struct pt_regs *regs, long error_code)
787{
788 cond_local_irq_enable(regs);
789}
790
791dotraplinkage void
792do_device_not_available(struct pt_regs *regs, long error_code)
793{
794 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
795
796#ifdef CONFIG_MATH_EMULATION
797 if (!boot_cpu_has(X86_FEATURE_FPU) && (read_cr0() & X86_CR0_EM)) {
798 struct math_emu_info info = { };
799
800 cond_local_irq_enable(regs);
801
802 info.regs = regs;
803 math_emulate(&info);
804 return;
805 }
806#endif
807 fpu__restore(¤t->thread.fpu); /* interrupts still off */
808#ifdef CONFIG_X86_32
809 cond_local_irq_enable(regs);
810#endif
811}
812NOKPROBE_SYMBOL(do_device_not_available);
813
814#ifdef CONFIG_X86_32
815dotraplinkage void do_iret_error(struct pt_regs *regs, long error_code)
816{
817 siginfo_t info;
818
819 RCU_LOCKDEP_WARN(!rcu_is_watching(), "entry code didn't wake RCU");
820 local_irq_enable();
821
822 info.si_signo = SIGILL;
823 info.si_errno = 0;
824 info.si_code = ILL_BADSTK;
825 info.si_addr = NULL;
826 if (notify_die(DIE_TRAP, "iret exception", regs, error_code,
827 X86_TRAP_IRET, SIGILL) != NOTIFY_STOP) {
828 do_trap(X86_TRAP_IRET, SIGILL, "iret exception", regs, error_code,
829 &info);
830 }
831}
832#endif
833
834/* Set of traps needed for early debugging. */
835void __init early_trap_init(void)
836{
837 /*
838 * Don't use IST to set DEBUG_STACK as it doesn't work until TSS
839 * is ready in cpu_init() <-- trap_init(). Before trap_init(),
840 * CPU runs at ring 0 so it is impossible to hit an invalid
841 * stack. Using the original stack works well enough at this
842 * early stage. DEBUG_STACK will be equipped after cpu_init() in
843 * trap_init().
844 *
845 * We don't need to set trace_idt_table like set_intr_gate(),
846 * since we don't have trace_debug and it will be reset to
847 * 'debug' in trap_init() by set_intr_gate_ist().
848 */
849 set_intr_gate_notrace(X86_TRAP_DB, debug);
850 /* int3 can be called from all */
851 set_system_intr_gate(X86_TRAP_BP, &int3);
852#ifdef CONFIG_X86_32
853 set_intr_gate(X86_TRAP_PF, page_fault);
854#endif
855 load_idt(&idt_descr);
856}
857
858void __init early_trap_pf_init(void)
859{
860#ifdef CONFIG_X86_64
861 set_intr_gate(X86_TRAP_PF, page_fault);
862#endif
863}
864
865void __init trap_init(void)
866{
867 int i;
868
869#ifdef CONFIG_EISA
870 void __iomem *p = early_ioremap(0x0FFFD9, 4);
871
872 if (readl(p) == 'E' + ('I'<<8) + ('S'<<16) + ('A'<<24))
873 EISA_bus = 1;
874 early_iounmap(p, 4);
875#endif
876
877 set_intr_gate(X86_TRAP_DE, divide_error);
878 set_intr_gate_ist(X86_TRAP_NMI, &nmi, NMI_STACK);
879 /* int4 can be called from all */
880 set_system_intr_gate(X86_TRAP_OF, &overflow);
881 set_intr_gate(X86_TRAP_BR, bounds);
882 set_intr_gate(X86_TRAP_UD, invalid_op);
883 set_intr_gate(X86_TRAP_NM, device_not_available);
884#ifdef CONFIG_X86_32
885 set_task_gate(X86_TRAP_DF, GDT_ENTRY_DOUBLEFAULT_TSS);
886#else
887 set_intr_gate_ist(X86_TRAP_DF, &double_fault, DOUBLEFAULT_STACK);
888#endif
889 set_intr_gate(X86_TRAP_OLD_MF, coprocessor_segment_overrun);
890 set_intr_gate(X86_TRAP_TS, invalid_TSS);
891 set_intr_gate(X86_TRAP_NP, segment_not_present);
892 set_intr_gate(X86_TRAP_SS, stack_segment);
893 set_intr_gate(X86_TRAP_GP, general_protection);
894 set_intr_gate(X86_TRAP_SPURIOUS, spurious_interrupt_bug);
895 set_intr_gate(X86_TRAP_MF, coprocessor_error);
896 set_intr_gate(X86_TRAP_AC, alignment_check);
897#ifdef CONFIG_X86_MCE
898 set_intr_gate_ist(X86_TRAP_MC, &machine_check, MCE_STACK);
899#endif
900 set_intr_gate(X86_TRAP_XF, simd_coprocessor_error);
901
902 /* Reserve all the builtin and the syscall vector: */
903 for (i = 0; i < FIRST_EXTERNAL_VECTOR; i++)
904 set_bit(i, used_vectors);
905
906#ifdef CONFIG_IA32_EMULATION
907 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_compat);
908 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
909#endif
910
911#ifdef CONFIG_X86_32
912 set_system_intr_gate(IA32_SYSCALL_VECTOR, entry_INT80_32);
913 set_bit(IA32_SYSCALL_VECTOR, used_vectors);
914#endif
915
916 /*
917 * Set the IDT descriptor to a fixed read-only location, so that the
918 * "sidt" instruction will not leak the location of the kernel, and
919 * to defend the IDT against arbitrary memory write vulnerabilities.
920 * It will be reloaded in cpu_init() */
921 __set_fixmap(FIX_RO_IDT, __pa_symbol(idt_table), PAGE_KERNEL_RO);
922 idt_descr.address = fix_to_virt(FIX_RO_IDT);
923
924 /*
925 * Should be a barrier for any external CPU state:
926 */
927 cpu_init();
928
929 /*
930 * X86_TRAP_DB and X86_TRAP_BP have been set
931 * in early_trap_init(). However, ITS works only after
932 * cpu_init() loads TSS. See comments in early_trap_init().
933 */
934 set_intr_gate_ist(X86_TRAP_DB, &debug, DEBUG_STACK);
935 /* int3 can be called from all */
936 set_system_intr_gate_ist(X86_TRAP_BP, &int3, DEBUG_STACK);
937
938 x86_init.irqs.trap_init();
939
940#ifdef CONFIG_X86_64
941 memcpy(&debug_idt_table, &idt_table, IDT_ENTRIES * 16);
942 set_nmi_gate(X86_TRAP_DB, &debug);
943 set_nmi_gate(X86_TRAP_BP, &int3);
944#endif
945}