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1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/device.h>
14#include <linux/slab.h>
15#include <linux/export.h>
16#include <linux/mutex.h>
17#include <linux/err.h>
18#include <linux/of.h>
19#include <linux/rbtree.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/log2.h>
23
24#define CREATE_TRACE_POINTS
25#include "trace.h"
26
27#include "internal.h"
28
29/*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35#undef LOG_DEVICE
36
37static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
52bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55{
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63}
64EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
66bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68{
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79}
80EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
82bool regmap_writeable(struct regmap *map, unsigned int reg)
83{
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94}
95
96bool regmap_readable(struct regmap *map, unsigned int reg)
97{
98 if (!map->reg_read)
99 return false;
100
101 if (map->max_register && reg > map->max_register)
102 return false;
103
104 if (map->format.format_write)
105 return false;
106
107 if (map->readable_reg)
108 return map->readable_reg(map->dev, reg);
109
110 if (map->rd_table)
111 return regmap_check_range_table(map, reg, map->rd_table);
112
113 return true;
114}
115
116bool regmap_volatile(struct regmap *map, unsigned int reg)
117{
118 if (!map->format.format_write && !regmap_readable(map, reg))
119 return false;
120
121 if (map->volatile_reg)
122 return map->volatile_reg(map->dev, reg);
123
124 if (map->volatile_table)
125 return regmap_check_range_table(map, reg, map->volatile_table);
126
127 if (map->cache_ops)
128 return false;
129 else
130 return true;
131}
132
133bool regmap_precious(struct regmap *map, unsigned int reg)
134{
135 if (!regmap_readable(map, reg))
136 return false;
137
138 if (map->precious_reg)
139 return map->precious_reg(map->dev, reg);
140
141 if (map->precious_table)
142 return regmap_check_range_table(map, reg, map->precious_table);
143
144 return false;
145}
146
147static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
148 size_t num)
149{
150 unsigned int i;
151
152 for (i = 0; i < num; i++)
153 if (!regmap_volatile(map, reg + i))
154 return false;
155
156 return true;
157}
158
159static void regmap_format_2_6_write(struct regmap *map,
160 unsigned int reg, unsigned int val)
161{
162 u8 *out = map->work_buf;
163
164 *out = (reg << 6) | val;
165}
166
167static void regmap_format_4_12_write(struct regmap *map,
168 unsigned int reg, unsigned int val)
169{
170 __be16 *out = map->work_buf;
171 *out = cpu_to_be16((reg << 12) | val);
172}
173
174static void regmap_format_7_9_write(struct regmap *map,
175 unsigned int reg, unsigned int val)
176{
177 __be16 *out = map->work_buf;
178 *out = cpu_to_be16((reg << 9) | val);
179}
180
181static void regmap_format_10_14_write(struct regmap *map,
182 unsigned int reg, unsigned int val)
183{
184 u8 *out = map->work_buf;
185
186 out[2] = val;
187 out[1] = (val >> 8) | (reg << 6);
188 out[0] = reg >> 2;
189}
190
191static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
192{
193 u8 *b = buf;
194
195 b[0] = val << shift;
196}
197
198static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
199{
200 __be16 *b = buf;
201
202 b[0] = cpu_to_be16(val << shift);
203}
204
205static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
206{
207 __le16 *b = buf;
208
209 b[0] = cpu_to_le16(val << shift);
210}
211
212static void regmap_format_16_native(void *buf, unsigned int val,
213 unsigned int shift)
214{
215 *(u16 *)buf = val << shift;
216}
217
218static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
219{
220 u8 *b = buf;
221
222 val <<= shift;
223
224 b[0] = val >> 16;
225 b[1] = val >> 8;
226 b[2] = val;
227}
228
229static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
230{
231 __be32 *b = buf;
232
233 b[0] = cpu_to_be32(val << shift);
234}
235
236static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
237{
238 __le32 *b = buf;
239
240 b[0] = cpu_to_le32(val << shift);
241}
242
243static void regmap_format_32_native(void *buf, unsigned int val,
244 unsigned int shift)
245{
246 *(u32 *)buf = val << shift;
247}
248
249#ifdef CONFIG_64BIT
250static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
251{
252 __be64 *b = buf;
253
254 b[0] = cpu_to_be64((u64)val << shift);
255}
256
257static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
258{
259 __le64 *b = buf;
260
261 b[0] = cpu_to_le64((u64)val << shift);
262}
263
264static void regmap_format_64_native(void *buf, unsigned int val,
265 unsigned int shift)
266{
267 *(u64 *)buf = (u64)val << shift;
268}
269#endif
270
271static void regmap_parse_inplace_noop(void *buf)
272{
273}
274
275static unsigned int regmap_parse_8(const void *buf)
276{
277 const u8 *b = buf;
278
279 return b[0];
280}
281
282static unsigned int regmap_parse_16_be(const void *buf)
283{
284 const __be16 *b = buf;
285
286 return be16_to_cpu(b[0]);
287}
288
289static unsigned int regmap_parse_16_le(const void *buf)
290{
291 const __le16 *b = buf;
292
293 return le16_to_cpu(b[0]);
294}
295
296static void regmap_parse_16_be_inplace(void *buf)
297{
298 __be16 *b = buf;
299
300 b[0] = be16_to_cpu(b[0]);
301}
302
303static void regmap_parse_16_le_inplace(void *buf)
304{
305 __le16 *b = buf;
306
307 b[0] = le16_to_cpu(b[0]);
308}
309
310static unsigned int regmap_parse_16_native(const void *buf)
311{
312 return *(u16 *)buf;
313}
314
315static unsigned int regmap_parse_24(const void *buf)
316{
317 const u8 *b = buf;
318 unsigned int ret = b[2];
319 ret |= ((unsigned int)b[1]) << 8;
320 ret |= ((unsigned int)b[0]) << 16;
321
322 return ret;
323}
324
325static unsigned int regmap_parse_32_be(const void *buf)
326{
327 const __be32 *b = buf;
328
329 return be32_to_cpu(b[0]);
330}
331
332static unsigned int regmap_parse_32_le(const void *buf)
333{
334 const __le32 *b = buf;
335
336 return le32_to_cpu(b[0]);
337}
338
339static void regmap_parse_32_be_inplace(void *buf)
340{
341 __be32 *b = buf;
342
343 b[0] = be32_to_cpu(b[0]);
344}
345
346static void regmap_parse_32_le_inplace(void *buf)
347{
348 __le32 *b = buf;
349
350 b[0] = le32_to_cpu(b[0]);
351}
352
353static unsigned int regmap_parse_32_native(const void *buf)
354{
355 return *(u32 *)buf;
356}
357
358#ifdef CONFIG_64BIT
359static unsigned int regmap_parse_64_be(const void *buf)
360{
361 const __be64 *b = buf;
362
363 return be64_to_cpu(b[0]);
364}
365
366static unsigned int regmap_parse_64_le(const void *buf)
367{
368 const __le64 *b = buf;
369
370 return le64_to_cpu(b[0]);
371}
372
373static void regmap_parse_64_be_inplace(void *buf)
374{
375 __be64 *b = buf;
376
377 b[0] = be64_to_cpu(b[0]);
378}
379
380static void regmap_parse_64_le_inplace(void *buf)
381{
382 __le64 *b = buf;
383
384 b[0] = le64_to_cpu(b[0]);
385}
386
387static unsigned int regmap_parse_64_native(const void *buf)
388{
389 return *(u64 *)buf;
390}
391#endif
392
393static void regmap_lock_mutex(void *__map)
394{
395 struct regmap *map = __map;
396 mutex_lock(&map->mutex);
397}
398
399static void regmap_unlock_mutex(void *__map)
400{
401 struct regmap *map = __map;
402 mutex_unlock(&map->mutex);
403}
404
405static void regmap_lock_spinlock(void *__map)
406__acquires(&map->spinlock)
407{
408 struct regmap *map = __map;
409 unsigned long flags;
410
411 spin_lock_irqsave(&map->spinlock, flags);
412 map->spinlock_flags = flags;
413}
414
415static void regmap_unlock_spinlock(void *__map)
416__releases(&map->spinlock)
417{
418 struct regmap *map = __map;
419 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
420}
421
422static void dev_get_regmap_release(struct device *dev, void *res)
423{
424 /*
425 * We don't actually have anything to do here; the goal here
426 * is not to manage the regmap but to provide a simple way to
427 * get the regmap back given a struct device.
428 */
429}
430
431static bool _regmap_range_add(struct regmap *map,
432 struct regmap_range_node *data)
433{
434 struct rb_root *root = &map->range_tree;
435 struct rb_node **new = &(root->rb_node), *parent = NULL;
436
437 while (*new) {
438 struct regmap_range_node *this =
439 container_of(*new, struct regmap_range_node, node);
440
441 parent = *new;
442 if (data->range_max < this->range_min)
443 new = &((*new)->rb_left);
444 else if (data->range_min > this->range_max)
445 new = &((*new)->rb_right);
446 else
447 return false;
448 }
449
450 rb_link_node(&data->node, parent, new);
451 rb_insert_color(&data->node, root);
452
453 return true;
454}
455
456static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
457 unsigned int reg)
458{
459 struct rb_node *node = map->range_tree.rb_node;
460
461 while (node) {
462 struct regmap_range_node *this =
463 container_of(node, struct regmap_range_node, node);
464
465 if (reg < this->range_min)
466 node = node->rb_left;
467 else if (reg > this->range_max)
468 node = node->rb_right;
469 else
470 return this;
471 }
472
473 return NULL;
474}
475
476static void regmap_range_exit(struct regmap *map)
477{
478 struct rb_node *next;
479 struct regmap_range_node *range_node;
480
481 next = rb_first(&map->range_tree);
482 while (next) {
483 range_node = rb_entry(next, struct regmap_range_node, node);
484 next = rb_next(&range_node->node);
485 rb_erase(&range_node->node, &map->range_tree);
486 kfree(range_node);
487 }
488
489 kfree(map->selector_work_buf);
490}
491
492int regmap_attach_dev(struct device *dev, struct regmap *map,
493 const struct regmap_config *config)
494{
495 struct regmap **m;
496
497 map->dev = dev;
498
499 regmap_debugfs_init(map, config->name);
500
501 /* Add a devres resource for dev_get_regmap() */
502 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
503 if (!m) {
504 regmap_debugfs_exit(map);
505 return -ENOMEM;
506 }
507 *m = map;
508 devres_add(dev, m);
509
510 return 0;
511}
512EXPORT_SYMBOL_GPL(regmap_attach_dev);
513
514static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
515 const struct regmap_config *config)
516{
517 enum regmap_endian endian;
518
519 /* Retrieve the endianness specification from the regmap config */
520 endian = config->reg_format_endian;
521
522 /* If the regmap config specified a non-default value, use that */
523 if (endian != REGMAP_ENDIAN_DEFAULT)
524 return endian;
525
526 /* Retrieve the endianness specification from the bus config */
527 if (bus && bus->reg_format_endian_default)
528 endian = bus->reg_format_endian_default;
529
530 /* If the bus specified a non-default value, use that */
531 if (endian != REGMAP_ENDIAN_DEFAULT)
532 return endian;
533
534 /* Use this if no other value was found */
535 return REGMAP_ENDIAN_BIG;
536}
537
538enum regmap_endian regmap_get_val_endian(struct device *dev,
539 const struct regmap_bus *bus,
540 const struct regmap_config *config)
541{
542 struct device_node *np;
543 enum regmap_endian endian;
544
545 /* Retrieve the endianness specification from the regmap config */
546 endian = config->val_format_endian;
547
548 /* If the regmap config specified a non-default value, use that */
549 if (endian != REGMAP_ENDIAN_DEFAULT)
550 return endian;
551
552 /* If the dev and dev->of_node exist try to get endianness from DT */
553 if (dev && dev->of_node) {
554 np = dev->of_node;
555
556 /* Parse the device's DT node for an endianness specification */
557 if (of_property_read_bool(np, "big-endian"))
558 endian = REGMAP_ENDIAN_BIG;
559 else if (of_property_read_bool(np, "little-endian"))
560 endian = REGMAP_ENDIAN_LITTLE;
561 else if (of_property_read_bool(np, "native-endian"))
562 endian = REGMAP_ENDIAN_NATIVE;
563
564 /* If the endianness was specified in DT, use that */
565 if (endian != REGMAP_ENDIAN_DEFAULT)
566 return endian;
567 }
568
569 /* Retrieve the endianness specification from the bus config */
570 if (bus && bus->val_format_endian_default)
571 endian = bus->val_format_endian_default;
572
573 /* If the bus specified a non-default value, use that */
574 if (endian != REGMAP_ENDIAN_DEFAULT)
575 return endian;
576
577 /* Use this if no other value was found */
578 return REGMAP_ENDIAN_BIG;
579}
580EXPORT_SYMBOL_GPL(regmap_get_val_endian);
581
582struct regmap *__regmap_init(struct device *dev,
583 const struct regmap_bus *bus,
584 void *bus_context,
585 const struct regmap_config *config,
586 struct lock_class_key *lock_key,
587 const char *lock_name)
588{
589 struct regmap *map;
590 int ret = -EINVAL;
591 enum regmap_endian reg_endian, val_endian;
592 int i, j;
593
594 if (!config)
595 goto err;
596
597 map = kzalloc(sizeof(*map), GFP_KERNEL);
598 if (map == NULL) {
599 ret = -ENOMEM;
600 goto err;
601 }
602
603 if (config->lock && config->unlock) {
604 map->lock = config->lock;
605 map->unlock = config->unlock;
606 map->lock_arg = config->lock_arg;
607 } else {
608 if ((bus && bus->fast_io) ||
609 config->fast_io) {
610 spin_lock_init(&map->spinlock);
611 map->lock = regmap_lock_spinlock;
612 map->unlock = regmap_unlock_spinlock;
613 lockdep_set_class_and_name(&map->spinlock,
614 lock_key, lock_name);
615 } else {
616 mutex_init(&map->mutex);
617 map->lock = regmap_lock_mutex;
618 map->unlock = regmap_unlock_mutex;
619 lockdep_set_class_and_name(&map->mutex,
620 lock_key, lock_name);
621 }
622 map->lock_arg = map;
623 }
624
625 /*
626 * When we write in fast-paths with regmap_bulk_write() don't allocate
627 * scratch buffers with sleeping allocations.
628 */
629 if ((bus && bus->fast_io) || config->fast_io)
630 map->alloc_flags = GFP_ATOMIC;
631 else
632 map->alloc_flags = GFP_KERNEL;
633
634 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
635 map->format.pad_bytes = config->pad_bits / 8;
636 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
637 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
638 config->val_bits + config->pad_bits, 8);
639 map->reg_shift = config->pad_bits % 8;
640 if (config->reg_stride)
641 map->reg_stride = config->reg_stride;
642 else
643 map->reg_stride = 1;
644 if (is_power_of_2(map->reg_stride))
645 map->reg_stride_order = ilog2(map->reg_stride);
646 else
647 map->reg_stride_order = -1;
648 map->use_single_read = config->use_single_rw || !bus || !bus->read;
649 map->use_single_write = config->use_single_rw || !bus || !bus->write;
650 map->can_multi_write = config->can_multi_write && bus && bus->write;
651 if (bus) {
652 map->max_raw_read = bus->max_raw_read;
653 map->max_raw_write = bus->max_raw_write;
654 }
655 map->dev = dev;
656 map->bus = bus;
657 map->bus_context = bus_context;
658 map->max_register = config->max_register;
659 map->wr_table = config->wr_table;
660 map->rd_table = config->rd_table;
661 map->volatile_table = config->volatile_table;
662 map->precious_table = config->precious_table;
663 map->writeable_reg = config->writeable_reg;
664 map->readable_reg = config->readable_reg;
665 map->volatile_reg = config->volatile_reg;
666 map->precious_reg = config->precious_reg;
667 map->cache_type = config->cache_type;
668 map->name = config->name;
669
670 spin_lock_init(&map->async_lock);
671 INIT_LIST_HEAD(&map->async_list);
672 INIT_LIST_HEAD(&map->async_free);
673 init_waitqueue_head(&map->async_waitq);
674
675 if (config->read_flag_mask || config->write_flag_mask) {
676 map->read_flag_mask = config->read_flag_mask;
677 map->write_flag_mask = config->write_flag_mask;
678 } else if (bus) {
679 map->read_flag_mask = bus->read_flag_mask;
680 }
681
682 if (!bus) {
683 map->reg_read = config->reg_read;
684 map->reg_write = config->reg_write;
685
686 map->defer_caching = false;
687 goto skip_format_initialization;
688 } else if (!bus->read || !bus->write) {
689 map->reg_read = _regmap_bus_reg_read;
690 map->reg_write = _regmap_bus_reg_write;
691
692 map->defer_caching = false;
693 goto skip_format_initialization;
694 } else {
695 map->reg_read = _regmap_bus_read;
696 map->reg_update_bits = bus->reg_update_bits;
697 }
698
699 reg_endian = regmap_get_reg_endian(bus, config);
700 val_endian = regmap_get_val_endian(dev, bus, config);
701
702 switch (config->reg_bits + map->reg_shift) {
703 case 2:
704 switch (config->val_bits) {
705 case 6:
706 map->format.format_write = regmap_format_2_6_write;
707 break;
708 default:
709 goto err_map;
710 }
711 break;
712
713 case 4:
714 switch (config->val_bits) {
715 case 12:
716 map->format.format_write = regmap_format_4_12_write;
717 break;
718 default:
719 goto err_map;
720 }
721 break;
722
723 case 7:
724 switch (config->val_bits) {
725 case 9:
726 map->format.format_write = regmap_format_7_9_write;
727 break;
728 default:
729 goto err_map;
730 }
731 break;
732
733 case 10:
734 switch (config->val_bits) {
735 case 14:
736 map->format.format_write = regmap_format_10_14_write;
737 break;
738 default:
739 goto err_map;
740 }
741 break;
742
743 case 8:
744 map->format.format_reg = regmap_format_8;
745 break;
746
747 case 16:
748 switch (reg_endian) {
749 case REGMAP_ENDIAN_BIG:
750 map->format.format_reg = regmap_format_16_be;
751 break;
752 case REGMAP_ENDIAN_NATIVE:
753 map->format.format_reg = regmap_format_16_native;
754 break;
755 default:
756 goto err_map;
757 }
758 break;
759
760 case 24:
761 if (reg_endian != REGMAP_ENDIAN_BIG)
762 goto err_map;
763 map->format.format_reg = regmap_format_24;
764 break;
765
766 case 32:
767 switch (reg_endian) {
768 case REGMAP_ENDIAN_BIG:
769 map->format.format_reg = regmap_format_32_be;
770 break;
771 case REGMAP_ENDIAN_NATIVE:
772 map->format.format_reg = regmap_format_32_native;
773 break;
774 default:
775 goto err_map;
776 }
777 break;
778
779#ifdef CONFIG_64BIT
780 case 64:
781 switch (reg_endian) {
782 case REGMAP_ENDIAN_BIG:
783 map->format.format_reg = regmap_format_64_be;
784 break;
785 case REGMAP_ENDIAN_NATIVE:
786 map->format.format_reg = regmap_format_64_native;
787 break;
788 default:
789 goto err_map;
790 }
791 break;
792#endif
793
794 default:
795 goto err_map;
796 }
797
798 if (val_endian == REGMAP_ENDIAN_NATIVE)
799 map->format.parse_inplace = regmap_parse_inplace_noop;
800
801 switch (config->val_bits) {
802 case 8:
803 map->format.format_val = regmap_format_8;
804 map->format.parse_val = regmap_parse_8;
805 map->format.parse_inplace = regmap_parse_inplace_noop;
806 break;
807 case 16:
808 switch (val_endian) {
809 case REGMAP_ENDIAN_BIG:
810 map->format.format_val = regmap_format_16_be;
811 map->format.parse_val = regmap_parse_16_be;
812 map->format.parse_inplace = regmap_parse_16_be_inplace;
813 break;
814 case REGMAP_ENDIAN_LITTLE:
815 map->format.format_val = regmap_format_16_le;
816 map->format.parse_val = regmap_parse_16_le;
817 map->format.parse_inplace = regmap_parse_16_le_inplace;
818 break;
819 case REGMAP_ENDIAN_NATIVE:
820 map->format.format_val = regmap_format_16_native;
821 map->format.parse_val = regmap_parse_16_native;
822 break;
823 default:
824 goto err_map;
825 }
826 break;
827 case 24:
828 if (val_endian != REGMAP_ENDIAN_BIG)
829 goto err_map;
830 map->format.format_val = regmap_format_24;
831 map->format.parse_val = regmap_parse_24;
832 break;
833 case 32:
834 switch (val_endian) {
835 case REGMAP_ENDIAN_BIG:
836 map->format.format_val = regmap_format_32_be;
837 map->format.parse_val = regmap_parse_32_be;
838 map->format.parse_inplace = regmap_parse_32_be_inplace;
839 break;
840 case REGMAP_ENDIAN_LITTLE:
841 map->format.format_val = regmap_format_32_le;
842 map->format.parse_val = regmap_parse_32_le;
843 map->format.parse_inplace = regmap_parse_32_le_inplace;
844 break;
845 case REGMAP_ENDIAN_NATIVE:
846 map->format.format_val = regmap_format_32_native;
847 map->format.parse_val = regmap_parse_32_native;
848 break;
849 default:
850 goto err_map;
851 }
852 break;
853#ifdef CONFIG_64BIT
854 case 64:
855 switch (val_endian) {
856 case REGMAP_ENDIAN_BIG:
857 map->format.format_val = regmap_format_64_be;
858 map->format.parse_val = regmap_parse_64_be;
859 map->format.parse_inplace = regmap_parse_64_be_inplace;
860 break;
861 case REGMAP_ENDIAN_LITTLE:
862 map->format.format_val = regmap_format_64_le;
863 map->format.parse_val = regmap_parse_64_le;
864 map->format.parse_inplace = regmap_parse_64_le_inplace;
865 break;
866 case REGMAP_ENDIAN_NATIVE:
867 map->format.format_val = regmap_format_64_native;
868 map->format.parse_val = regmap_parse_64_native;
869 break;
870 default:
871 goto err_map;
872 }
873 break;
874#endif
875 }
876
877 if (map->format.format_write) {
878 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
879 (val_endian != REGMAP_ENDIAN_BIG))
880 goto err_map;
881 map->use_single_write = true;
882 }
883
884 if (!map->format.format_write &&
885 !(map->format.format_reg && map->format.format_val))
886 goto err_map;
887
888 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
889 if (map->work_buf == NULL) {
890 ret = -ENOMEM;
891 goto err_map;
892 }
893
894 if (map->format.format_write) {
895 map->defer_caching = false;
896 map->reg_write = _regmap_bus_formatted_write;
897 } else if (map->format.format_val) {
898 map->defer_caching = true;
899 map->reg_write = _regmap_bus_raw_write;
900 }
901
902skip_format_initialization:
903
904 map->range_tree = RB_ROOT;
905 for (i = 0; i < config->num_ranges; i++) {
906 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
907 struct regmap_range_node *new;
908
909 /* Sanity check */
910 if (range_cfg->range_max < range_cfg->range_min) {
911 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
912 range_cfg->range_max, range_cfg->range_min);
913 goto err_range;
914 }
915
916 if (range_cfg->range_max > map->max_register) {
917 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
918 range_cfg->range_max, map->max_register);
919 goto err_range;
920 }
921
922 if (range_cfg->selector_reg > map->max_register) {
923 dev_err(map->dev,
924 "Invalid range %d: selector out of map\n", i);
925 goto err_range;
926 }
927
928 if (range_cfg->window_len == 0) {
929 dev_err(map->dev, "Invalid range %d: window_len 0\n",
930 i);
931 goto err_range;
932 }
933
934 /* Make sure, that this register range has no selector
935 or data window within its boundary */
936 for (j = 0; j < config->num_ranges; j++) {
937 unsigned sel_reg = config->ranges[j].selector_reg;
938 unsigned win_min = config->ranges[j].window_start;
939 unsigned win_max = win_min +
940 config->ranges[j].window_len - 1;
941
942 /* Allow data window inside its own virtual range */
943 if (j == i)
944 continue;
945
946 if (range_cfg->range_min <= sel_reg &&
947 sel_reg <= range_cfg->range_max) {
948 dev_err(map->dev,
949 "Range %d: selector for %d in window\n",
950 i, j);
951 goto err_range;
952 }
953
954 if (!(win_max < range_cfg->range_min ||
955 win_min > range_cfg->range_max)) {
956 dev_err(map->dev,
957 "Range %d: window for %d in window\n",
958 i, j);
959 goto err_range;
960 }
961 }
962
963 new = kzalloc(sizeof(*new), GFP_KERNEL);
964 if (new == NULL) {
965 ret = -ENOMEM;
966 goto err_range;
967 }
968
969 new->map = map;
970 new->name = range_cfg->name;
971 new->range_min = range_cfg->range_min;
972 new->range_max = range_cfg->range_max;
973 new->selector_reg = range_cfg->selector_reg;
974 new->selector_mask = range_cfg->selector_mask;
975 new->selector_shift = range_cfg->selector_shift;
976 new->window_start = range_cfg->window_start;
977 new->window_len = range_cfg->window_len;
978
979 if (!_regmap_range_add(map, new)) {
980 dev_err(map->dev, "Failed to add range %d\n", i);
981 kfree(new);
982 goto err_range;
983 }
984
985 if (map->selector_work_buf == NULL) {
986 map->selector_work_buf =
987 kzalloc(map->format.buf_size, GFP_KERNEL);
988 if (map->selector_work_buf == NULL) {
989 ret = -ENOMEM;
990 goto err_range;
991 }
992 }
993 }
994
995 ret = regcache_init(map, config);
996 if (ret != 0)
997 goto err_range;
998
999 if (dev) {
1000 ret = regmap_attach_dev(dev, map, config);
1001 if (ret != 0)
1002 goto err_regcache;
1003 }
1004
1005 return map;
1006
1007err_regcache:
1008 regcache_exit(map);
1009err_range:
1010 regmap_range_exit(map);
1011 kfree(map->work_buf);
1012err_map:
1013 kfree(map);
1014err:
1015 return ERR_PTR(ret);
1016}
1017EXPORT_SYMBOL_GPL(__regmap_init);
1018
1019static void devm_regmap_release(struct device *dev, void *res)
1020{
1021 regmap_exit(*(struct regmap **)res);
1022}
1023
1024struct regmap *__devm_regmap_init(struct device *dev,
1025 const struct regmap_bus *bus,
1026 void *bus_context,
1027 const struct regmap_config *config,
1028 struct lock_class_key *lock_key,
1029 const char *lock_name)
1030{
1031 struct regmap **ptr, *regmap;
1032
1033 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1034 if (!ptr)
1035 return ERR_PTR(-ENOMEM);
1036
1037 regmap = __regmap_init(dev, bus, bus_context, config,
1038 lock_key, lock_name);
1039 if (!IS_ERR(regmap)) {
1040 *ptr = regmap;
1041 devres_add(dev, ptr);
1042 } else {
1043 devres_free(ptr);
1044 }
1045
1046 return regmap;
1047}
1048EXPORT_SYMBOL_GPL(__devm_regmap_init);
1049
1050static void regmap_field_init(struct regmap_field *rm_field,
1051 struct regmap *regmap, struct reg_field reg_field)
1052{
1053 rm_field->regmap = regmap;
1054 rm_field->reg = reg_field.reg;
1055 rm_field->shift = reg_field.lsb;
1056 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1057 rm_field->id_size = reg_field.id_size;
1058 rm_field->id_offset = reg_field.id_offset;
1059}
1060
1061/**
1062 * devm_regmap_field_alloc(): Allocate and initialise a register field
1063 * in a register map.
1064 *
1065 * @dev: Device that will be interacted with
1066 * @regmap: regmap bank in which this register field is located.
1067 * @reg_field: Register field with in the bank.
1068 *
1069 * The return value will be an ERR_PTR() on error or a valid pointer
1070 * to a struct regmap_field. The regmap_field will be automatically freed
1071 * by the device management code.
1072 */
1073struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1074 struct regmap *regmap, struct reg_field reg_field)
1075{
1076 struct regmap_field *rm_field = devm_kzalloc(dev,
1077 sizeof(*rm_field), GFP_KERNEL);
1078 if (!rm_field)
1079 return ERR_PTR(-ENOMEM);
1080
1081 regmap_field_init(rm_field, regmap, reg_field);
1082
1083 return rm_field;
1084
1085}
1086EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1087
1088/**
1089 * devm_regmap_field_free(): Free register field allocated using
1090 * devm_regmap_field_alloc. Usally drivers need not call this function,
1091 * as the memory allocated via devm will be freed as per device-driver
1092 * life-cyle.
1093 *
1094 * @dev: Device that will be interacted with
1095 * @field: regmap field which should be freed.
1096 */
1097void devm_regmap_field_free(struct device *dev,
1098 struct regmap_field *field)
1099{
1100 devm_kfree(dev, field);
1101}
1102EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1103
1104/**
1105 * regmap_field_alloc(): Allocate and initialise a register field
1106 * in a register map.
1107 *
1108 * @regmap: regmap bank in which this register field is located.
1109 * @reg_field: Register field with in the bank.
1110 *
1111 * The return value will be an ERR_PTR() on error or a valid pointer
1112 * to a struct regmap_field. The regmap_field should be freed by the
1113 * user once its finished working with it using regmap_field_free().
1114 */
1115struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1116 struct reg_field reg_field)
1117{
1118 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1119
1120 if (!rm_field)
1121 return ERR_PTR(-ENOMEM);
1122
1123 regmap_field_init(rm_field, regmap, reg_field);
1124
1125 return rm_field;
1126}
1127EXPORT_SYMBOL_GPL(regmap_field_alloc);
1128
1129/**
1130 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1131 *
1132 * @field: regmap field which should be freed.
1133 */
1134void regmap_field_free(struct regmap_field *field)
1135{
1136 kfree(field);
1137}
1138EXPORT_SYMBOL_GPL(regmap_field_free);
1139
1140/**
1141 * regmap_reinit_cache(): Reinitialise the current register cache
1142 *
1143 * @map: Register map to operate on.
1144 * @config: New configuration. Only the cache data will be used.
1145 *
1146 * Discard any existing register cache for the map and initialize a
1147 * new cache. This can be used to restore the cache to defaults or to
1148 * update the cache configuration to reflect runtime discovery of the
1149 * hardware.
1150 *
1151 * No explicit locking is done here, the user needs to ensure that
1152 * this function will not race with other calls to regmap.
1153 */
1154int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1155{
1156 regcache_exit(map);
1157 regmap_debugfs_exit(map);
1158
1159 map->max_register = config->max_register;
1160 map->writeable_reg = config->writeable_reg;
1161 map->readable_reg = config->readable_reg;
1162 map->volatile_reg = config->volatile_reg;
1163 map->precious_reg = config->precious_reg;
1164 map->cache_type = config->cache_type;
1165
1166 regmap_debugfs_init(map, config->name);
1167
1168 map->cache_bypass = false;
1169 map->cache_only = false;
1170
1171 return regcache_init(map, config);
1172}
1173EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1174
1175/**
1176 * regmap_exit(): Free a previously allocated register map
1177 */
1178void regmap_exit(struct regmap *map)
1179{
1180 struct regmap_async *async;
1181
1182 regcache_exit(map);
1183 regmap_debugfs_exit(map);
1184 regmap_range_exit(map);
1185 if (map->bus && map->bus->free_context)
1186 map->bus->free_context(map->bus_context);
1187 kfree(map->work_buf);
1188 while (!list_empty(&map->async_free)) {
1189 async = list_first_entry_or_null(&map->async_free,
1190 struct regmap_async,
1191 list);
1192 list_del(&async->list);
1193 kfree(async->work_buf);
1194 kfree(async);
1195 }
1196 kfree(map);
1197}
1198EXPORT_SYMBOL_GPL(regmap_exit);
1199
1200static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1201{
1202 struct regmap **r = res;
1203 if (!r || !*r) {
1204 WARN_ON(!r || !*r);
1205 return 0;
1206 }
1207
1208 /* If the user didn't specify a name match any */
1209 if (data)
1210 return (*r)->name == data;
1211 else
1212 return 1;
1213}
1214
1215/**
1216 * dev_get_regmap(): Obtain the regmap (if any) for a device
1217 *
1218 * @dev: Device to retrieve the map for
1219 * @name: Optional name for the register map, usually NULL.
1220 *
1221 * Returns the regmap for the device if one is present, or NULL. If
1222 * name is specified then it must match the name specified when
1223 * registering the device, if it is NULL then the first regmap found
1224 * will be used. Devices with multiple register maps are very rare,
1225 * generic code should normally not need to specify a name.
1226 */
1227struct regmap *dev_get_regmap(struct device *dev, const char *name)
1228{
1229 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1230 dev_get_regmap_match, (void *)name);
1231
1232 if (!r)
1233 return NULL;
1234 return *r;
1235}
1236EXPORT_SYMBOL_GPL(dev_get_regmap);
1237
1238/**
1239 * regmap_get_device(): Obtain the device from a regmap
1240 *
1241 * @map: Register map to operate on.
1242 *
1243 * Returns the underlying device that the regmap has been created for.
1244 */
1245struct device *regmap_get_device(struct regmap *map)
1246{
1247 return map->dev;
1248}
1249EXPORT_SYMBOL_GPL(regmap_get_device);
1250
1251static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1252 struct regmap_range_node *range,
1253 unsigned int val_num)
1254{
1255 void *orig_work_buf;
1256 unsigned int win_offset;
1257 unsigned int win_page;
1258 bool page_chg;
1259 int ret;
1260
1261 win_offset = (*reg - range->range_min) % range->window_len;
1262 win_page = (*reg - range->range_min) / range->window_len;
1263
1264 if (val_num > 1) {
1265 /* Bulk write shouldn't cross range boundary */
1266 if (*reg + val_num - 1 > range->range_max)
1267 return -EINVAL;
1268
1269 /* ... or single page boundary */
1270 if (val_num > range->window_len - win_offset)
1271 return -EINVAL;
1272 }
1273
1274 /* It is possible to have selector register inside data window.
1275 In that case, selector register is located on every page and
1276 it needs no page switching, when accessed alone. */
1277 if (val_num > 1 ||
1278 range->window_start + win_offset != range->selector_reg) {
1279 /* Use separate work_buf during page switching */
1280 orig_work_buf = map->work_buf;
1281 map->work_buf = map->selector_work_buf;
1282
1283 ret = _regmap_update_bits(map, range->selector_reg,
1284 range->selector_mask,
1285 win_page << range->selector_shift,
1286 &page_chg, false);
1287
1288 map->work_buf = orig_work_buf;
1289
1290 if (ret != 0)
1291 return ret;
1292 }
1293
1294 *reg = range->window_start + win_offset;
1295
1296 return 0;
1297}
1298
1299int _regmap_raw_write(struct regmap *map, unsigned int reg,
1300 const void *val, size_t val_len)
1301{
1302 struct regmap_range_node *range;
1303 unsigned long flags;
1304 u8 *u8 = map->work_buf;
1305 void *work_val = map->work_buf + map->format.reg_bytes +
1306 map->format.pad_bytes;
1307 void *buf;
1308 int ret = -ENOTSUPP;
1309 size_t len;
1310 int i;
1311
1312 WARN_ON(!map->bus);
1313
1314 /* Check for unwritable registers before we start */
1315 if (map->writeable_reg)
1316 for (i = 0; i < val_len / map->format.val_bytes; i++)
1317 if (!map->writeable_reg(map->dev,
1318 reg + regmap_get_offset(map, i)))
1319 return -EINVAL;
1320
1321 if (!map->cache_bypass && map->format.parse_val) {
1322 unsigned int ival;
1323 int val_bytes = map->format.val_bytes;
1324 for (i = 0; i < val_len / val_bytes; i++) {
1325 ival = map->format.parse_val(val + (i * val_bytes));
1326 ret = regcache_write(map,
1327 reg + regmap_get_offset(map, i),
1328 ival);
1329 if (ret) {
1330 dev_err(map->dev,
1331 "Error in caching of register: %x ret: %d\n",
1332 reg + i, ret);
1333 return ret;
1334 }
1335 }
1336 if (map->cache_only) {
1337 map->cache_dirty = true;
1338 return 0;
1339 }
1340 }
1341
1342 range = _regmap_range_lookup(map, reg);
1343 if (range) {
1344 int val_num = val_len / map->format.val_bytes;
1345 int win_offset = (reg - range->range_min) % range->window_len;
1346 int win_residue = range->window_len - win_offset;
1347
1348 /* If the write goes beyond the end of the window split it */
1349 while (val_num > win_residue) {
1350 dev_dbg(map->dev, "Writing window %d/%zu\n",
1351 win_residue, val_len / map->format.val_bytes);
1352 ret = _regmap_raw_write(map, reg, val, win_residue *
1353 map->format.val_bytes);
1354 if (ret != 0)
1355 return ret;
1356
1357 reg += win_residue;
1358 val_num -= win_residue;
1359 val += win_residue * map->format.val_bytes;
1360 val_len -= win_residue * map->format.val_bytes;
1361
1362 win_offset = (reg - range->range_min) %
1363 range->window_len;
1364 win_residue = range->window_len - win_offset;
1365 }
1366
1367 ret = _regmap_select_page(map, ®, range, val_num);
1368 if (ret != 0)
1369 return ret;
1370 }
1371
1372 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1373
1374 u8[0] |= map->write_flag_mask;
1375
1376 /*
1377 * Essentially all I/O mechanisms will be faster with a single
1378 * buffer to write. Since register syncs often generate raw
1379 * writes of single registers optimise that case.
1380 */
1381 if (val != work_val && val_len == map->format.val_bytes) {
1382 memcpy(work_val, val, map->format.val_bytes);
1383 val = work_val;
1384 }
1385
1386 if (map->async && map->bus->async_write) {
1387 struct regmap_async *async;
1388
1389 trace_regmap_async_write_start(map, reg, val_len);
1390
1391 spin_lock_irqsave(&map->async_lock, flags);
1392 async = list_first_entry_or_null(&map->async_free,
1393 struct regmap_async,
1394 list);
1395 if (async)
1396 list_del(&async->list);
1397 spin_unlock_irqrestore(&map->async_lock, flags);
1398
1399 if (!async) {
1400 async = map->bus->async_alloc();
1401 if (!async)
1402 return -ENOMEM;
1403
1404 async->work_buf = kzalloc(map->format.buf_size,
1405 GFP_KERNEL | GFP_DMA);
1406 if (!async->work_buf) {
1407 kfree(async);
1408 return -ENOMEM;
1409 }
1410 }
1411
1412 async->map = map;
1413
1414 /* If the caller supplied the value we can use it safely. */
1415 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1416 map->format.reg_bytes + map->format.val_bytes);
1417
1418 spin_lock_irqsave(&map->async_lock, flags);
1419 list_add_tail(&async->list, &map->async_list);
1420 spin_unlock_irqrestore(&map->async_lock, flags);
1421
1422 if (val != work_val)
1423 ret = map->bus->async_write(map->bus_context,
1424 async->work_buf,
1425 map->format.reg_bytes +
1426 map->format.pad_bytes,
1427 val, val_len, async);
1428 else
1429 ret = map->bus->async_write(map->bus_context,
1430 async->work_buf,
1431 map->format.reg_bytes +
1432 map->format.pad_bytes +
1433 val_len, NULL, 0, async);
1434
1435 if (ret != 0) {
1436 dev_err(map->dev, "Failed to schedule write: %d\n",
1437 ret);
1438
1439 spin_lock_irqsave(&map->async_lock, flags);
1440 list_move(&async->list, &map->async_free);
1441 spin_unlock_irqrestore(&map->async_lock, flags);
1442 }
1443
1444 return ret;
1445 }
1446
1447 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1448
1449 /* If we're doing a single register write we can probably just
1450 * send the work_buf directly, otherwise try to do a gather
1451 * write.
1452 */
1453 if (val == work_val)
1454 ret = map->bus->write(map->bus_context, map->work_buf,
1455 map->format.reg_bytes +
1456 map->format.pad_bytes +
1457 val_len);
1458 else if (map->bus->gather_write)
1459 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1460 map->format.reg_bytes +
1461 map->format.pad_bytes,
1462 val, val_len);
1463
1464 /* If that didn't work fall back on linearising by hand. */
1465 if (ret == -ENOTSUPP) {
1466 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1467 buf = kzalloc(len, GFP_KERNEL);
1468 if (!buf)
1469 return -ENOMEM;
1470
1471 memcpy(buf, map->work_buf, map->format.reg_bytes);
1472 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1473 val, val_len);
1474 ret = map->bus->write(map->bus_context, buf, len);
1475
1476 kfree(buf);
1477 }
1478
1479 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1480
1481 return ret;
1482}
1483
1484/**
1485 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1486 *
1487 * @map: Map to check.
1488 */
1489bool regmap_can_raw_write(struct regmap *map)
1490{
1491 return map->bus && map->bus->write && map->format.format_val &&
1492 map->format.format_reg;
1493}
1494EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1495
1496/**
1497 * regmap_get_raw_read_max - Get the maximum size we can read
1498 *
1499 * @map: Map to check.
1500 */
1501size_t regmap_get_raw_read_max(struct regmap *map)
1502{
1503 return map->max_raw_read;
1504}
1505EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1506
1507/**
1508 * regmap_get_raw_write_max - Get the maximum size we can read
1509 *
1510 * @map: Map to check.
1511 */
1512size_t regmap_get_raw_write_max(struct regmap *map)
1513{
1514 return map->max_raw_write;
1515}
1516EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1517
1518static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1519 unsigned int val)
1520{
1521 int ret;
1522 struct regmap_range_node *range;
1523 struct regmap *map = context;
1524
1525 WARN_ON(!map->bus || !map->format.format_write);
1526
1527 range = _regmap_range_lookup(map, reg);
1528 if (range) {
1529 ret = _regmap_select_page(map, ®, range, 1);
1530 if (ret != 0)
1531 return ret;
1532 }
1533
1534 map->format.format_write(map, reg, val);
1535
1536 trace_regmap_hw_write_start(map, reg, 1);
1537
1538 ret = map->bus->write(map->bus_context, map->work_buf,
1539 map->format.buf_size);
1540
1541 trace_regmap_hw_write_done(map, reg, 1);
1542
1543 return ret;
1544}
1545
1546static int _regmap_bus_reg_write(void *context, unsigned int reg,
1547 unsigned int val)
1548{
1549 struct regmap *map = context;
1550
1551 return map->bus->reg_write(map->bus_context, reg, val);
1552}
1553
1554static int _regmap_bus_raw_write(void *context, unsigned int reg,
1555 unsigned int val)
1556{
1557 struct regmap *map = context;
1558
1559 WARN_ON(!map->bus || !map->format.format_val);
1560
1561 map->format.format_val(map->work_buf + map->format.reg_bytes
1562 + map->format.pad_bytes, val, 0);
1563 return _regmap_raw_write(map, reg,
1564 map->work_buf +
1565 map->format.reg_bytes +
1566 map->format.pad_bytes,
1567 map->format.val_bytes);
1568}
1569
1570static inline void *_regmap_map_get_context(struct regmap *map)
1571{
1572 return (map->bus) ? map : map->bus_context;
1573}
1574
1575int _regmap_write(struct regmap *map, unsigned int reg,
1576 unsigned int val)
1577{
1578 int ret;
1579 void *context = _regmap_map_get_context(map);
1580
1581 if (!regmap_writeable(map, reg))
1582 return -EIO;
1583
1584 if (!map->cache_bypass && !map->defer_caching) {
1585 ret = regcache_write(map, reg, val);
1586 if (ret != 0)
1587 return ret;
1588 if (map->cache_only) {
1589 map->cache_dirty = true;
1590 return 0;
1591 }
1592 }
1593
1594#ifdef LOG_DEVICE
1595 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1596 dev_info(map->dev, "%x <= %x\n", reg, val);
1597#endif
1598
1599 trace_regmap_reg_write(map, reg, val);
1600
1601 return map->reg_write(context, reg, val);
1602}
1603
1604/**
1605 * regmap_write(): Write a value to a single register
1606 *
1607 * @map: Register map to write to
1608 * @reg: Register to write to
1609 * @val: Value to be written
1610 *
1611 * A value of zero will be returned on success, a negative errno will
1612 * be returned in error cases.
1613 */
1614int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1615{
1616 int ret;
1617
1618 if (!IS_ALIGNED(reg, map->reg_stride))
1619 return -EINVAL;
1620
1621 map->lock(map->lock_arg);
1622
1623 ret = _regmap_write(map, reg, val);
1624
1625 map->unlock(map->lock_arg);
1626
1627 return ret;
1628}
1629EXPORT_SYMBOL_GPL(regmap_write);
1630
1631/**
1632 * regmap_write_async(): Write a value to a single register asynchronously
1633 *
1634 * @map: Register map to write to
1635 * @reg: Register to write to
1636 * @val: Value to be written
1637 *
1638 * A value of zero will be returned on success, a negative errno will
1639 * be returned in error cases.
1640 */
1641int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1642{
1643 int ret;
1644
1645 if (!IS_ALIGNED(reg, map->reg_stride))
1646 return -EINVAL;
1647
1648 map->lock(map->lock_arg);
1649
1650 map->async = true;
1651
1652 ret = _regmap_write(map, reg, val);
1653
1654 map->async = false;
1655
1656 map->unlock(map->lock_arg);
1657
1658 return ret;
1659}
1660EXPORT_SYMBOL_GPL(regmap_write_async);
1661
1662/**
1663 * regmap_raw_write(): Write raw values to one or more registers
1664 *
1665 * @map: Register map to write to
1666 * @reg: Initial register to write to
1667 * @val: Block of data to be written, laid out for direct transmission to the
1668 * device
1669 * @val_len: Length of data pointed to by val.
1670 *
1671 * This function is intended to be used for things like firmware
1672 * download where a large block of data needs to be transferred to the
1673 * device. No formatting will be done on the data provided.
1674 *
1675 * A value of zero will be returned on success, a negative errno will
1676 * be returned in error cases.
1677 */
1678int regmap_raw_write(struct regmap *map, unsigned int reg,
1679 const void *val, size_t val_len)
1680{
1681 int ret;
1682
1683 if (!regmap_can_raw_write(map))
1684 return -EINVAL;
1685 if (val_len % map->format.val_bytes)
1686 return -EINVAL;
1687 if (map->max_raw_write && map->max_raw_write > val_len)
1688 return -E2BIG;
1689
1690 map->lock(map->lock_arg);
1691
1692 ret = _regmap_raw_write(map, reg, val, val_len);
1693
1694 map->unlock(map->lock_arg);
1695
1696 return ret;
1697}
1698EXPORT_SYMBOL_GPL(regmap_raw_write);
1699
1700/**
1701 * regmap_field_update_bits_base():
1702 * Perform a read/modify/write cycle on the register field
1703 * with change, async, force option
1704 *
1705 * @field: Register field to write to
1706 * @mask: Bitmask to change
1707 * @val: Value to be written
1708 * @change: Boolean indicating if a write was done
1709 * @async: Boolean indicating asynchronously
1710 * @force: Boolean indicating use force update
1711 *
1712 * A value of zero will be returned on success, a negative errno will
1713 * be returned in error cases.
1714 */
1715int regmap_field_update_bits_base(struct regmap_field *field,
1716 unsigned int mask, unsigned int val,
1717 bool *change, bool async, bool force)
1718{
1719 mask = (mask << field->shift) & field->mask;
1720
1721 return regmap_update_bits_base(field->regmap, field->reg,
1722 mask, val << field->shift,
1723 change, async, force);
1724}
1725EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1726
1727/**
1728 * regmap_fields_update_bits_base():
1729 * Perform a read/modify/write cycle on the register field
1730 * with change, async, force option
1731 *
1732 * @field: Register field to write to
1733 * @id: port ID
1734 * @mask: Bitmask to change
1735 * @val: Value to be written
1736 * @change: Boolean indicating if a write was done
1737 * @async: Boolean indicating asynchronously
1738 * @force: Boolean indicating use force update
1739 *
1740 * A value of zero will be returned on success, a negative errno will
1741 * be returned in error cases.
1742 */
1743int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1744 unsigned int mask, unsigned int val,
1745 bool *change, bool async, bool force)
1746{
1747 if (id >= field->id_size)
1748 return -EINVAL;
1749
1750 mask = (mask << field->shift) & field->mask;
1751
1752 return regmap_update_bits_base(field->regmap,
1753 field->reg + (field->id_offset * id),
1754 mask, val << field->shift,
1755 change, async, force);
1756}
1757EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1758
1759/*
1760 * regmap_bulk_write(): Write multiple registers to the device
1761 *
1762 * @map: Register map to write to
1763 * @reg: First register to be write from
1764 * @val: Block of data to be written, in native register size for device
1765 * @val_count: Number of registers to write
1766 *
1767 * This function is intended to be used for writing a large block of
1768 * data to the device either in single transfer or multiple transfer.
1769 *
1770 * A value of zero will be returned on success, a negative errno will
1771 * be returned in error cases.
1772 */
1773int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1774 size_t val_count)
1775{
1776 int ret = 0, i;
1777 size_t val_bytes = map->format.val_bytes;
1778 size_t total_size = val_bytes * val_count;
1779
1780 if (map->bus && !map->format.parse_inplace)
1781 return -EINVAL;
1782 if (!IS_ALIGNED(reg, map->reg_stride))
1783 return -EINVAL;
1784
1785 /*
1786 * Some devices don't support bulk write, for
1787 * them we have a series of single write operations in the first two if
1788 * blocks.
1789 *
1790 * The first if block is used for memory mapped io. It does not allow
1791 * val_bytes of 3 for example.
1792 * The second one is used for busses which do not have this limitation
1793 * and can write arbitrary value lengths.
1794 */
1795 if (!map->bus) {
1796 map->lock(map->lock_arg);
1797 for (i = 0; i < val_count; i++) {
1798 unsigned int ival;
1799
1800 switch (val_bytes) {
1801 case 1:
1802 ival = *(u8 *)(val + (i * val_bytes));
1803 break;
1804 case 2:
1805 ival = *(u16 *)(val + (i * val_bytes));
1806 break;
1807 case 4:
1808 ival = *(u32 *)(val + (i * val_bytes));
1809 break;
1810#ifdef CONFIG_64BIT
1811 case 8:
1812 ival = *(u64 *)(val + (i * val_bytes));
1813 break;
1814#endif
1815 default:
1816 ret = -EINVAL;
1817 goto out;
1818 }
1819
1820 ret = _regmap_write(map,
1821 reg + regmap_get_offset(map, i),
1822 ival);
1823 if (ret != 0)
1824 goto out;
1825 }
1826out:
1827 map->unlock(map->lock_arg);
1828 } else if (map->use_single_write ||
1829 (map->max_raw_write && map->max_raw_write < total_size)) {
1830 int chunk_stride = map->reg_stride;
1831 size_t chunk_size = val_bytes;
1832 size_t chunk_count = val_count;
1833
1834 if (!map->use_single_write) {
1835 chunk_size = map->max_raw_write;
1836 if (chunk_size % val_bytes)
1837 chunk_size -= chunk_size % val_bytes;
1838 chunk_count = total_size / chunk_size;
1839 chunk_stride *= chunk_size / val_bytes;
1840 }
1841
1842 map->lock(map->lock_arg);
1843 /* Write as many bytes as possible with chunk_size */
1844 for (i = 0; i < chunk_count; i++) {
1845 ret = _regmap_raw_write(map,
1846 reg + (i * chunk_stride),
1847 val + (i * chunk_size),
1848 chunk_size);
1849 if (ret)
1850 break;
1851 }
1852
1853 /* Write remaining bytes */
1854 if (!ret && chunk_size * i < total_size) {
1855 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1856 val + (i * chunk_size),
1857 total_size - i * chunk_size);
1858 }
1859 map->unlock(map->lock_arg);
1860 } else {
1861 void *wval;
1862
1863 if (!val_count)
1864 return -EINVAL;
1865
1866 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1867 if (!wval) {
1868 dev_err(map->dev, "Error in memory allocation\n");
1869 return -ENOMEM;
1870 }
1871 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1872 map->format.parse_inplace(wval + i);
1873
1874 map->lock(map->lock_arg);
1875 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1876 map->unlock(map->lock_arg);
1877
1878 kfree(wval);
1879 }
1880 return ret;
1881}
1882EXPORT_SYMBOL_GPL(regmap_bulk_write);
1883
1884/*
1885 * _regmap_raw_multi_reg_write()
1886 *
1887 * the (register,newvalue) pairs in regs have not been formatted, but
1888 * they are all in the same page and have been changed to being page
1889 * relative. The page register has been written if that was necessary.
1890 */
1891static int _regmap_raw_multi_reg_write(struct regmap *map,
1892 const struct reg_sequence *regs,
1893 size_t num_regs)
1894{
1895 int ret;
1896 void *buf;
1897 int i;
1898 u8 *u8;
1899 size_t val_bytes = map->format.val_bytes;
1900 size_t reg_bytes = map->format.reg_bytes;
1901 size_t pad_bytes = map->format.pad_bytes;
1902 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1903 size_t len = pair_size * num_regs;
1904
1905 if (!len)
1906 return -EINVAL;
1907
1908 buf = kzalloc(len, GFP_KERNEL);
1909 if (!buf)
1910 return -ENOMEM;
1911
1912 /* We have to linearise by hand. */
1913
1914 u8 = buf;
1915
1916 for (i = 0; i < num_regs; i++) {
1917 unsigned int reg = regs[i].reg;
1918 unsigned int val = regs[i].def;
1919 trace_regmap_hw_write_start(map, reg, 1);
1920 map->format.format_reg(u8, reg, map->reg_shift);
1921 u8 += reg_bytes + pad_bytes;
1922 map->format.format_val(u8, val, 0);
1923 u8 += val_bytes;
1924 }
1925 u8 = buf;
1926 *u8 |= map->write_flag_mask;
1927
1928 ret = map->bus->write(map->bus_context, buf, len);
1929
1930 kfree(buf);
1931
1932 for (i = 0; i < num_regs; i++) {
1933 int reg = regs[i].reg;
1934 trace_regmap_hw_write_done(map, reg, 1);
1935 }
1936 return ret;
1937}
1938
1939static unsigned int _regmap_register_page(struct regmap *map,
1940 unsigned int reg,
1941 struct regmap_range_node *range)
1942{
1943 unsigned int win_page = (reg - range->range_min) / range->window_len;
1944
1945 return win_page;
1946}
1947
1948static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1949 struct reg_sequence *regs,
1950 size_t num_regs)
1951{
1952 int ret;
1953 int i, n;
1954 struct reg_sequence *base;
1955 unsigned int this_page = 0;
1956 unsigned int page_change = 0;
1957 /*
1958 * the set of registers are not neccessarily in order, but
1959 * since the order of write must be preserved this algorithm
1960 * chops the set each time the page changes. This also applies
1961 * if there is a delay required at any point in the sequence.
1962 */
1963 base = regs;
1964 for (i = 0, n = 0; i < num_regs; i++, n++) {
1965 unsigned int reg = regs[i].reg;
1966 struct regmap_range_node *range;
1967
1968 range = _regmap_range_lookup(map, reg);
1969 if (range) {
1970 unsigned int win_page = _regmap_register_page(map, reg,
1971 range);
1972
1973 if (i == 0)
1974 this_page = win_page;
1975 if (win_page != this_page) {
1976 this_page = win_page;
1977 page_change = 1;
1978 }
1979 }
1980
1981 /* If we have both a page change and a delay make sure to
1982 * write the regs and apply the delay before we change the
1983 * page.
1984 */
1985
1986 if (page_change || regs[i].delay_us) {
1987
1988 /* For situations where the first write requires
1989 * a delay we need to make sure we don't call
1990 * raw_multi_reg_write with n=0
1991 * This can't occur with page breaks as we
1992 * never write on the first iteration
1993 */
1994 if (regs[i].delay_us && i == 0)
1995 n = 1;
1996
1997 ret = _regmap_raw_multi_reg_write(map, base, n);
1998 if (ret != 0)
1999 return ret;
2000
2001 if (regs[i].delay_us)
2002 udelay(regs[i].delay_us);
2003
2004 base += n;
2005 n = 0;
2006
2007 if (page_change) {
2008 ret = _regmap_select_page(map,
2009 &base[n].reg,
2010 range, 1);
2011 if (ret != 0)
2012 return ret;
2013
2014 page_change = 0;
2015 }
2016
2017 }
2018
2019 }
2020 if (n > 0)
2021 return _regmap_raw_multi_reg_write(map, base, n);
2022 return 0;
2023}
2024
2025static int _regmap_multi_reg_write(struct regmap *map,
2026 const struct reg_sequence *regs,
2027 size_t num_regs)
2028{
2029 int i;
2030 int ret;
2031
2032 if (!map->can_multi_write) {
2033 for (i = 0; i < num_regs; i++) {
2034 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2035 if (ret != 0)
2036 return ret;
2037
2038 if (regs[i].delay_us)
2039 udelay(regs[i].delay_us);
2040 }
2041 return 0;
2042 }
2043
2044 if (!map->format.parse_inplace)
2045 return -EINVAL;
2046
2047 if (map->writeable_reg)
2048 for (i = 0; i < num_regs; i++) {
2049 int reg = regs[i].reg;
2050 if (!map->writeable_reg(map->dev, reg))
2051 return -EINVAL;
2052 if (!IS_ALIGNED(reg, map->reg_stride))
2053 return -EINVAL;
2054 }
2055
2056 if (!map->cache_bypass) {
2057 for (i = 0; i < num_regs; i++) {
2058 unsigned int val = regs[i].def;
2059 unsigned int reg = regs[i].reg;
2060 ret = regcache_write(map, reg, val);
2061 if (ret) {
2062 dev_err(map->dev,
2063 "Error in caching of register: %x ret: %d\n",
2064 reg, ret);
2065 return ret;
2066 }
2067 }
2068 if (map->cache_only) {
2069 map->cache_dirty = true;
2070 return 0;
2071 }
2072 }
2073
2074 WARN_ON(!map->bus);
2075
2076 for (i = 0; i < num_regs; i++) {
2077 unsigned int reg = regs[i].reg;
2078 struct regmap_range_node *range;
2079
2080 /* Coalesce all the writes between a page break or a delay
2081 * in a sequence
2082 */
2083 range = _regmap_range_lookup(map, reg);
2084 if (range || regs[i].delay_us) {
2085 size_t len = sizeof(struct reg_sequence)*num_regs;
2086 struct reg_sequence *base = kmemdup(regs, len,
2087 GFP_KERNEL);
2088 if (!base)
2089 return -ENOMEM;
2090 ret = _regmap_range_multi_paged_reg_write(map, base,
2091 num_regs);
2092 kfree(base);
2093
2094 return ret;
2095 }
2096 }
2097 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2098}
2099
2100/*
2101 * regmap_multi_reg_write(): Write multiple registers to the device
2102 *
2103 * where the set of register,value pairs are supplied in any order,
2104 * possibly not all in a single range.
2105 *
2106 * @map: Register map to write to
2107 * @regs: Array of structures containing register,value to be written
2108 * @num_regs: Number of registers to write
2109 *
2110 * The 'normal' block write mode will send ultimately send data on the
2111 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2112 * addressed. However, this alternative block multi write mode will send
2113 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2114 * must of course support the mode.
2115 *
2116 * A value of zero will be returned on success, a negative errno will be
2117 * returned in error cases.
2118 */
2119int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2120 int num_regs)
2121{
2122 int ret;
2123
2124 map->lock(map->lock_arg);
2125
2126 ret = _regmap_multi_reg_write(map, regs, num_regs);
2127
2128 map->unlock(map->lock_arg);
2129
2130 return ret;
2131}
2132EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2133
2134/*
2135 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2136 * device but not the cache
2137 *
2138 * where the set of register are supplied in any order
2139 *
2140 * @map: Register map to write to
2141 * @regs: Array of structures containing register,value to be written
2142 * @num_regs: Number of registers to write
2143 *
2144 * This function is intended to be used for writing a large block of data
2145 * atomically to the device in single transfer for those I2C client devices
2146 * that implement this alternative block write mode.
2147 *
2148 * A value of zero will be returned on success, a negative errno will
2149 * be returned in error cases.
2150 */
2151int regmap_multi_reg_write_bypassed(struct regmap *map,
2152 const struct reg_sequence *regs,
2153 int num_regs)
2154{
2155 int ret;
2156 bool bypass;
2157
2158 map->lock(map->lock_arg);
2159
2160 bypass = map->cache_bypass;
2161 map->cache_bypass = true;
2162
2163 ret = _regmap_multi_reg_write(map, regs, num_regs);
2164
2165 map->cache_bypass = bypass;
2166
2167 map->unlock(map->lock_arg);
2168
2169 return ret;
2170}
2171EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2172
2173/**
2174 * regmap_raw_write_async(): Write raw values to one or more registers
2175 * asynchronously
2176 *
2177 * @map: Register map to write to
2178 * @reg: Initial register to write to
2179 * @val: Block of data to be written, laid out for direct transmission to the
2180 * device. Must be valid until regmap_async_complete() is called.
2181 * @val_len: Length of data pointed to by val.
2182 *
2183 * This function is intended to be used for things like firmware
2184 * download where a large block of data needs to be transferred to the
2185 * device. No formatting will be done on the data provided.
2186 *
2187 * If supported by the underlying bus the write will be scheduled
2188 * asynchronously, helping maximise I/O speed on higher speed buses
2189 * like SPI. regmap_async_complete() can be called to ensure that all
2190 * asynchrnous writes have been completed.
2191 *
2192 * A value of zero will be returned on success, a negative errno will
2193 * be returned in error cases.
2194 */
2195int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2196 const void *val, size_t val_len)
2197{
2198 int ret;
2199
2200 if (val_len % map->format.val_bytes)
2201 return -EINVAL;
2202 if (!IS_ALIGNED(reg, map->reg_stride))
2203 return -EINVAL;
2204
2205 map->lock(map->lock_arg);
2206
2207 map->async = true;
2208
2209 ret = _regmap_raw_write(map, reg, val, val_len);
2210
2211 map->async = false;
2212
2213 map->unlock(map->lock_arg);
2214
2215 return ret;
2216}
2217EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2218
2219static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2220 unsigned int val_len)
2221{
2222 struct regmap_range_node *range;
2223 u8 *u8 = map->work_buf;
2224 int ret;
2225
2226 WARN_ON(!map->bus);
2227
2228 if (!map->bus || !map->bus->read)
2229 return -EINVAL;
2230
2231 range = _regmap_range_lookup(map, reg);
2232 if (range) {
2233 ret = _regmap_select_page(map, ®, range,
2234 val_len / map->format.val_bytes);
2235 if (ret != 0)
2236 return ret;
2237 }
2238
2239 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2240
2241 /*
2242 * Some buses or devices flag reads by setting the high bits in the
2243 * register address; since it's always the high bits for all
2244 * current formats we can do this here rather than in
2245 * formatting. This may break if we get interesting formats.
2246 */
2247 u8[0] |= map->read_flag_mask;
2248
2249 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2250
2251 ret = map->bus->read(map->bus_context, map->work_buf,
2252 map->format.reg_bytes + map->format.pad_bytes,
2253 val, val_len);
2254
2255 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2256
2257 return ret;
2258}
2259
2260static int _regmap_bus_reg_read(void *context, unsigned int reg,
2261 unsigned int *val)
2262{
2263 struct regmap *map = context;
2264
2265 return map->bus->reg_read(map->bus_context, reg, val);
2266}
2267
2268static int _regmap_bus_read(void *context, unsigned int reg,
2269 unsigned int *val)
2270{
2271 int ret;
2272 struct regmap *map = context;
2273
2274 if (!map->format.parse_val)
2275 return -EINVAL;
2276
2277 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2278 if (ret == 0)
2279 *val = map->format.parse_val(map->work_buf);
2280
2281 return ret;
2282}
2283
2284static int _regmap_read(struct regmap *map, unsigned int reg,
2285 unsigned int *val)
2286{
2287 int ret;
2288 void *context = _regmap_map_get_context(map);
2289
2290 if (!map->cache_bypass) {
2291 ret = regcache_read(map, reg, val);
2292 if (ret == 0)
2293 return 0;
2294 }
2295
2296 if (map->cache_only)
2297 return -EBUSY;
2298
2299 if (!regmap_readable(map, reg))
2300 return -EIO;
2301
2302 ret = map->reg_read(context, reg, val);
2303 if (ret == 0) {
2304#ifdef LOG_DEVICE
2305 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2306 dev_info(map->dev, "%x => %x\n", reg, *val);
2307#endif
2308
2309 trace_regmap_reg_read(map, reg, *val);
2310
2311 if (!map->cache_bypass)
2312 regcache_write(map, reg, *val);
2313 }
2314
2315 return ret;
2316}
2317
2318/**
2319 * regmap_read(): Read a value from a single register
2320 *
2321 * @map: Register map to read from
2322 * @reg: Register to be read from
2323 * @val: Pointer to store read value
2324 *
2325 * A value of zero will be returned on success, a negative errno will
2326 * be returned in error cases.
2327 */
2328int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2329{
2330 int ret;
2331
2332 if (!IS_ALIGNED(reg, map->reg_stride))
2333 return -EINVAL;
2334
2335 map->lock(map->lock_arg);
2336
2337 ret = _regmap_read(map, reg, val);
2338
2339 map->unlock(map->lock_arg);
2340
2341 return ret;
2342}
2343EXPORT_SYMBOL_GPL(regmap_read);
2344
2345/**
2346 * regmap_raw_read(): Read raw data from the device
2347 *
2348 * @map: Register map to read from
2349 * @reg: First register to be read from
2350 * @val: Pointer to store read value
2351 * @val_len: Size of data to read
2352 *
2353 * A value of zero will be returned on success, a negative errno will
2354 * be returned in error cases.
2355 */
2356int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2357 size_t val_len)
2358{
2359 size_t val_bytes = map->format.val_bytes;
2360 size_t val_count = val_len / val_bytes;
2361 unsigned int v;
2362 int ret, i;
2363
2364 if (!map->bus)
2365 return -EINVAL;
2366 if (val_len % map->format.val_bytes)
2367 return -EINVAL;
2368 if (!IS_ALIGNED(reg, map->reg_stride))
2369 return -EINVAL;
2370 if (val_count == 0)
2371 return -EINVAL;
2372
2373 map->lock(map->lock_arg);
2374
2375 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2376 map->cache_type == REGCACHE_NONE) {
2377 if (!map->bus->read) {
2378 ret = -ENOTSUPP;
2379 goto out;
2380 }
2381 if (map->max_raw_read && map->max_raw_read < val_len) {
2382 ret = -E2BIG;
2383 goto out;
2384 }
2385
2386 /* Physical block read if there's no cache involved */
2387 ret = _regmap_raw_read(map, reg, val, val_len);
2388
2389 } else {
2390 /* Otherwise go word by word for the cache; should be low
2391 * cost as we expect to hit the cache.
2392 */
2393 for (i = 0; i < val_count; i++) {
2394 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2395 &v);
2396 if (ret != 0)
2397 goto out;
2398
2399 map->format.format_val(val + (i * val_bytes), v, 0);
2400 }
2401 }
2402
2403 out:
2404 map->unlock(map->lock_arg);
2405
2406 return ret;
2407}
2408EXPORT_SYMBOL_GPL(regmap_raw_read);
2409
2410/**
2411 * regmap_field_read(): Read a value to a single register field
2412 *
2413 * @field: Register field to read from
2414 * @val: Pointer to store read value
2415 *
2416 * A value of zero will be returned on success, a negative errno will
2417 * be returned in error cases.
2418 */
2419int regmap_field_read(struct regmap_field *field, unsigned int *val)
2420{
2421 int ret;
2422 unsigned int reg_val;
2423 ret = regmap_read(field->regmap, field->reg, ®_val);
2424 if (ret != 0)
2425 return ret;
2426
2427 reg_val &= field->mask;
2428 reg_val >>= field->shift;
2429 *val = reg_val;
2430
2431 return ret;
2432}
2433EXPORT_SYMBOL_GPL(regmap_field_read);
2434
2435/**
2436 * regmap_fields_read(): Read a value to a single register field with port ID
2437 *
2438 * @field: Register field to read from
2439 * @id: port ID
2440 * @val: Pointer to store read value
2441 *
2442 * A value of zero will be returned on success, a negative errno will
2443 * be returned in error cases.
2444 */
2445int regmap_fields_read(struct regmap_field *field, unsigned int id,
2446 unsigned int *val)
2447{
2448 int ret;
2449 unsigned int reg_val;
2450
2451 if (id >= field->id_size)
2452 return -EINVAL;
2453
2454 ret = regmap_read(field->regmap,
2455 field->reg + (field->id_offset * id),
2456 ®_val);
2457 if (ret != 0)
2458 return ret;
2459
2460 reg_val &= field->mask;
2461 reg_val >>= field->shift;
2462 *val = reg_val;
2463
2464 return ret;
2465}
2466EXPORT_SYMBOL_GPL(regmap_fields_read);
2467
2468/**
2469 * regmap_bulk_read(): Read multiple registers from the device
2470 *
2471 * @map: Register map to read from
2472 * @reg: First register to be read from
2473 * @val: Pointer to store read value, in native register size for device
2474 * @val_count: Number of registers to read
2475 *
2476 * A value of zero will be returned on success, a negative errno will
2477 * be returned in error cases.
2478 */
2479int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2480 size_t val_count)
2481{
2482 int ret, i;
2483 size_t val_bytes = map->format.val_bytes;
2484 bool vol = regmap_volatile_range(map, reg, val_count);
2485
2486 if (!IS_ALIGNED(reg, map->reg_stride))
2487 return -EINVAL;
2488
2489 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2490 /*
2491 * Some devices does not support bulk read, for
2492 * them we have a series of single read operations.
2493 */
2494 size_t total_size = val_bytes * val_count;
2495
2496 if (!map->use_single_read &&
2497 (!map->max_raw_read || map->max_raw_read > total_size)) {
2498 ret = regmap_raw_read(map, reg, val,
2499 val_bytes * val_count);
2500 if (ret != 0)
2501 return ret;
2502 } else {
2503 /*
2504 * Some devices do not support bulk read or do not
2505 * support large bulk reads, for them we have a series
2506 * of read operations.
2507 */
2508 int chunk_stride = map->reg_stride;
2509 size_t chunk_size = val_bytes;
2510 size_t chunk_count = val_count;
2511
2512 if (!map->use_single_read) {
2513 chunk_size = map->max_raw_read;
2514 if (chunk_size % val_bytes)
2515 chunk_size -= chunk_size % val_bytes;
2516 chunk_count = total_size / chunk_size;
2517 chunk_stride *= chunk_size / val_bytes;
2518 }
2519
2520 /* Read bytes that fit into a multiple of chunk_size */
2521 for (i = 0; i < chunk_count; i++) {
2522 ret = regmap_raw_read(map,
2523 reg + (i * chunk_stride),
2524 val + (i * chunk_size),
2525 chunk_size);
2526 if (ret != 0)
2527 return ret;
2528 }
2529
2530 /* Read remaining bytes */
2531 if (chunk_size * i < total_size) {
2532 ret = regmap_raw_read(map,
2533 reg + (i * chunk_stride),
2534 val + (i * chunk_size),
2535 total_size - i * chunk_size);
2536 if (ret != 0)
2537 return ret;
2538 }
2539 }
2540
2541 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2542 map->format.parse_inplace(val + i);
2543 } else {
2544 for (i = 0; i < val_count; i++) {
2545 unsigned int ival;
2546 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2547 &ival);
2548 if (ret != 0)
2549 return ret;
2550
2551 if (map->format.format_val) {
2552 map->format.format_val(val + (i * val_bytes), ival, 0);
2553 } else {
2554 /* Devices providing read and write
2555 * operations can use the bulk I/O
2556 * functions if they define a val_bytes,
2557 * we assume that the values are native
2558 * endian.
2559 */
2560#ifdef CONFIG_64BIT
2561 u64 *u64 = val;
2562#endif
2563 u32 *u32 = val;
2564 u16 *u16 = val;
2565 u8 *u8 = val;
2566
2567 switch (map->format.val_bytes) {
2568#ifdef CONFIG_64BIT
2569 case 8:
2570 u64[i] = ival;
2571 break;
2572#endif
2573 case 4:
2574 u32[i] = ival;
2575 break;
2576 case 2:
2577 u16[i] = ival;
2578 break;
2579 case 1:
2580 u8[i] = ival;
2581 break;
2582 default:
2583 return -EINVAL;
2584 }
2585 }
2586 }
2587 }
2588
2589 return 0;
2590}
2591EXPORT_SYMBOL_GPL(regmap_bulk_read);
2592
2593static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2594 unsigned int mask, unsigned int val,
2595 bool *change, bool force_write)
2596{
2597 int ret;
2598 unsigned int tmp, orig;
2599
2600 if (change)
2601 *change = false;
2602
2603 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2604 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2605 if (ret == 0 && change)
2606 *change = true;
2607 } else {
2608 ret = _regmap_read(map, reg, &orig);
2609 if (ret != 0)
2610 return ret;
2611
2612 tmp = orig & ~mask;
2613 tmp |= val & mask;
2614
2615 if (force_write || (tmp != orig)) {
2616 ret = _regmap_write(map, reg, tmp);
2617 if (ret == 0 && change)
2618 *change = true;
2619 }
2620 }
2621
2622 return ret;
2623}
2624
2625/**
2626 * regmap_update_bits_base:
2627 * Perform a read/modify/write cycle on the
2628 * register map with change, async, force option
2629 *
2630 * @map: Register map to update
2631 * @reg: Register to update
2632 * @mask: Bitmask to change
2633 * @val: New value for bitmask
2634 * @change: Boolean indicating if a write was done
2635 * @async: Boolean indicating asynchronously
2636 * @force: Boolean indicating use force update
2637 *
2638 * if async was true,
2639 * With most buses the read must be done synchronously so this is most
2640 * useful for devices with a cache which do not need to interact with
2641 * the hardware to determine the current register value.
2642 *
2643 * Returns zero for success, a negative number on error.
2644 */
2645int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2646 unsigned int mask, unsigned int val,
2647 bool *change, bool async, bool force)
2648{
2649 int ret;
2650
2651 map->lock(map->lock_arg);
2652
2653 map->async = async;
2654
2655 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2656
2657 map->async = false;
2658
2659 map->unlock(map->lock_arg);
2660
2661 return ret;
2662}
2663EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2664
2665void regmap_async_complete_cb(struct regmap_async *async, int ret)
2666{
2667 struct regmap *map = async->map;
2668 bool wake;
2669
2670 trace_regmap_async_io_complete(map);
2671
2672 spin_lock(&map->async_lock);
2673 list_move(&async->list, &map->async_free);
2674 wake = list_empty(&map->async_list);
2675
2676 if (ret != 0)
2677 map->async_ret = ret;
2678
2679 spin_unlock(&map->async_lock);
2680
2681 if (wake)
2682 wake_up(&map->async_waitq);
2683}
2684EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2685
2686static int regmap_async_is_done(struct regmap *map)
2687{
2688 unsigned long flags;
2689 int ret;
2690
2691 spin_lock_irqsave(&map->async_lock, flags);
2692 ret = list_empty(&map->async_list);
2693 spin_unlock_irqrestore(&map->async_lock, flags);
2694
2695 return ret;
2696}
2697
2698/**
2699 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2700 *
2701 * @map: Map to operate on.
2702 *
2703 * Blocks until any pending asynchronous I/O has completed. Returns
2704 * an error code for any failed I/O operations.
2705 */
2706int regmap_async_complete(struct regmap *map)
2707{
2708 unsigned long flags;
2709 int ret;
2710
2711 /* Nothing to do with no async support */
2712 if (!map->bus || !map->bus->async_write)
2713 return 0;
2714
2715 trace_regmap_async_complete_start(map);
2716
2717 wait_event(map->async_waitq, regmap_async_is_done(map));
2718
2719 spin_lock_irqsave(&map->async_lock, flags);
2720 ret = map->async_ret;
2721 map->async_ret = 0;
2722 spin_unlock_irqrestore(&map->async_lock, flags);
2723
2724 trace_regmap_async_complete_done(map);
2725
2726 return ret;
2727}
2728EXPORT_SYMBOL_GPL(regmap_async_complete);
2729
2730/**
2731 * regmap_register_patch: Register and apply register updates to be applied
2732 * on device initialistion
2733 *
2734 * @map: Register map to apply updates to.
2735 * @regs: Values to update.
2736 * @num_regs: Number of entries in regs.
2737 *
2738 * Register a set of register updates to be applied to the device
2739 * whenever the device registers are synchronised with the cache and
2740 * apply them immediately. Typically this is used to apply
2741 * corrections to be applied to the device defaults on startup, such
2742 * as the updates some vendors provide to undocumented registers.
2743 *
2744 * The caller must ensure that this function cannot be called
2745 * concurrently with either itself or regcache_sync().
2746 */
2747int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2748 int num_regs)
2749{
2750 struct reg_sequence *p;
2751 int ret;
2752 bool bypass;
2753
2754 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2755 num_regs))
2756 return 0;
2757
2758 p = krealloc(map->patch,
2759 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2760 GFP_KERNEL);
2761 if (p) {
2762 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2763 map->patch = p;
2764 map->patch_regs += num_regs;
2765 } else {
2766 return -ENOMEM;
2767 }
2768
2769 map->lock(map->lock_arg);
2770
2771 bypass = map->cache_bypass;
2772
2773 map->cache_bypass = true;
2774 map->async = true;
2775
2776 ret = _regmap_multi_reg_write(map, regs, num_regs);
2777
2778 map->async = false;
2779 map->cache_bypass = bypass;
2780
2781 map->unlock(map->lock_arg);
2782
2783 regmap_async_complete(map);
2784
2785 return ret;
2786}
2787EXPORT_SYMBOL_GPL(regmap_register_patch);
2788
2789/*
2790 * regmap_get_val_bytes(): Report the size of a register value
2791 *
2792 * Report the size of a register value, mainly intended to for use by
2793 * generic infrastructure built on top of regmap.
2794 */
2795int regmap_get_val_bytes(struct regmap *map)
2796{
2797 if (map->format.format_write)
2798 return -EINVAL;
2799
2800 return map->format.val_bytes;
2801}
2802EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2803
2804/**
2805 * regmap_get_max_register(): Report the max register value
2806 *
2807 * Report the max register value, mainly intended to for use by
2808 * generic infrastructure built on top of regmap.
2809 */
2810int regmap_get_max_register(struct regmap *map)
2811{
2812 return map->max_register ? map->max_register : -EINVAL;
2813}
2814EXPORT_SYMBOL_GPL(regmap_get_max_register);
2815
2816/**
2817 * regmap_get_reg_stride(): Report the register address stride
2818 *
2819 * Report the register address stride, mainly intended to for use by
2820 * generic infrastructure built on top of regmap.
2821 */
2822int regmap_get_reg_stride(struct regmap *map)
2823{
2824 return map->reg_stride;
2825}
2826EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2827
2828int regmap_parse_val(struct regmap *map, const void *buf,
2829 unsigned int *val)
2830{
2831 if (!map->format.parse_val)
2832 return -EINVAL;
2833
2834 *val = map->format.parse_val(buf);
2835
2836 return 0;
2837}
2838EXPORT_SYMBOL_GPL(regmap_parse_val);
2839
2840static int __init regmap_initcall(void)
2841{
2842 regmap_debugfs_initcall();
2843
2844 return 0;
2845}
2846postcore_initcall(regmap_initcall);
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/device.h>
14#include <linux/slab.h>
15#include <linux/export.h>
16#include <linux/mutex.h>
17#include <linux/err.h>
18#include <linux/of.h>
19#include <linux/rbtree.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/log2.h>
23
24#define CREATE_TRACE_POINTS
25#include "trace.h"
26
27#include "internal.h"
28
29/*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35#undef LOG_DEVICE
36
37static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
52bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55{
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63}
64EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
66bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68{
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79}
80EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
82bool regmap_writeable(struct regmap *map, unsigned int reg)
83{
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94}
95
96bool regmap_cached(struct regmap *map, unsigned int reg)
97{
98 int ret;
99 unsigned int val;
100
101 if (map->cache == REGCACHE_NONE)
102 return false;
103
104 if (!map->cache_ops)
105 return false;
106
107 if (map->max_register && reg > map->max_register)
108 return false;
109
110 map->lock(map->lock_arg);
111 ret = regcache_read(map, reg, &val);
112 map->unlock(map->lock_arg);
113 if (ret)
114 return false;
115
116 return true;
117}
118
119bool regmap_readable(struct regmap *map, unsigned int reg)
120{
121 if (!map->reg_read)
122 return false;
123
124 if (map->max_register && reg > map->max_register)
125 return false;
126
127 if (map->format.format_write)
128 return false;
129
130 if (map->readable_reg)
131 return map->readable_reg(map->dev, reg);
132
133 if (map->rd_table)
134 return regmap_check_range_table(map, reg, map->rd_table);
135
136 return true;
137}
138
139bool regmap_volatile(struct regmap *map, unsigned int reg)
140{
141 if (!map->format.format_write && !regmap_readable(map, reg))
142 return false;
143
144 if (map->volatile_reg)
145 return map->volatile_reg(map->dev, reg);
146
147 if (map->volatile_table)
148 return regmap_check_range_table(map, reg, map->volatile_table);
149
150 if (map->cache_ops)
151 return false;
152 else
153 return true;
154}
155
156bool regmap_precious(struct regmap *map, unsigned int reg)
157{
158 if (!regmap_readable(map, reg))
159 return false;
160
161 if (map->precious_reg)
162 return map->precious_reg(map->dev, reg);
163
164 if (map->precious_table)
165 return regmap_check_range_table(map, reg, map->precious_table);
166
167 return false;
168}
169
170static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
171 size_t num)
172{
173 unsigned int i;
174
175 for (i = 0; i < num; i++)
176 if (!regmap_volatile(map, reg + i))
177 return false;
178
179 return true;
180}
181
182static void regmap_format_2_6_write(struct regmap *map,
183 unsigned int reg, unsigned int val)
184{
185 u8 *out = map->work_buf;
186
187 *out = (reg << 6) | val;
188}
189
190static void regmap_format_4_12_write(struct regmap *map,
191 unsigned int reg, unsigned int val)
192{
193 __be16 *out = map->work_buf;
194 *out = cpu_to_be16((reg << 12) | val);
195}
196
197static void regmap_format_7_9_write(struct regmap *map,
198 unsigned int reg, unsigned int val)
199{
200 __be16 *out = map->work_buf;
201 *out = cpu_to_be16((reg << 9) | val);
202}
203
204static void regmap_format_10_14_write(struct regmap *map,
205 unsigned int reg, unsigned int val)
206{
207 u8 *out = map->work_buf;
208
209 out[2] = val;
210 out[1] = (val >> 8) | (reg << 6);
211 out[0] = reg >> 2;
212}
213
214static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
215{
216 u8 *b = buf;
217
218 b[0] = val << shift;
219}
220
221static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
222{
223 __be16 *b = buf;
224
225 b[0] = cpu_to_be16(val << shift);
226}
227
228static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
229{
230 __le16 *b = buf;
231
232 b[0] = cpu_to_le16(val << shift);
233}
234
235static void regmap_format_16_native(void *buf, unsigned int val,
236 unsigned int shift)
237{
238 *(u16 *)buf = val << shift;
239}
240
241static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
242{
243 u8 *b = buf;
244
245 val <<= shift;
246
247 b[0] = val >> 16;
248 b[1] = val >> 8;
249 b[2] = val;
250}
251
252static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
253{
254 __be32 *b = buf;
255
256 b[0] = cpu_to_be32(val << shift);
257}
258
259static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
260{
261 __le32 *b = buf;
262
263 b[0] = cpu_to_le32(val << shift);
264}
265
266static void regmap_format_32_native(void *buf, unsigned int val,
267 unsigned int shift)
268{
269 *(u32 *)buf = val << shift;
270}
271
272#ifdef CONFIG_64BIT
273static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
274{
275 __be64 *b = buf;
276
277 b[0] = cpu_to_be64((u64)val << shift);
278}
279
280static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
281{
282 __le64 *b = buf;
283
284 b[0] = cpu_to_le64((u64)val << shift);
285}
286
287static void regmap_format_64_native(void *buf, unsigned int val,
288 unsigned int shift)
289{
290 *(u64 *)buf = (u64)val << shift;
291}
292#endif
293
294static void regmap_parse_inplace_noop(void *buf)
295{
296}
297
298static unsigned int regmap_parse_8(const void *buf)
299{
300 const u8 *b = buf;
301
302 return b[0];
303}
304
305static unsigned int regmap_parse_16_be(const void *buf)
306{
307 const __be16 *b = buf;
308
309 return be16_to_cpu(b[0]);
310}
311
312static unsigned int regmap_parse_16_le(const void *buf)
313{
314 const __le16 *b = buf;
315
316 return le16_to_cpu(b[0]);
317}
318
319static void regmap_parse_16_be_inplace(void *buf)
320{
321 __be16 *b = buf;
322
323 b[0] = be16_to_cpu(b[0]);
324}
325
326static void regmap_parse_16_le_inplace(void *buf)
327{
328 __le16 *b = buf;
329
330 b[0] = le16_to_cpu(b[0]);
331}
332
333static unsigned int regmap_parse_16_native(const void *buf)
334{
335 return *(u16 *)buf;
336}
337
338static unsigned int regmap_parse_24(const void *buf)
339{
340 const u8 *b = buf;
341 unsigned int ret = b[2];
342 ret |= ((unsigned int)b[1]) << 8;
343 ret |= ((unsigned int)b[0]) << 16;
344
345 return ret;
346}
347
348static unsigned int regmap_parse_32_be(const void *buf)
349{
350 const __be32 *b = buf;
351
352 return be32_to_cpu(b[0]);
353}
354
355static unsigned int regmap_parse_32_le(const void *buf)
356{
357 const __le32 *b = buf;
358
359 return le32_to_cpu(b[0]);
360}
361
362static void regmap_parse_32_be_inplace(void *buf)
363{
364 __be32 *b = buf;
365
366 b[0] = be32_to_cpu(b[0]);
367}
368
369static void regmap_parse_32_le_inplace(void *buf)
370{
371 __le32 *b = buf;
372
373 b[0] = le32_to_cpu(b[0]);
374}
375
376static unsigned int regmap_parse_32_native(const void *buf)
377{
378 return *(u32 *)buf;
379}
380
381#ifdef CONFIG_64BIT
382static unsigned int regmap_parse_64_be(const void *buf)
383{
384 const __be64 *b = buf;
385
386 return be64_to_cpu(b[0]);
387}
388
389static unsigned int regmap_parse_64_le(const void *buf)
390{
391 const __le64 *b = buf;
392
393 return le64_to_cpu(b[0]);
394}
395
396static void regmap_parse_64_be_inplace(void *buf)
397{
398 __be64 *b = buf;
399
400 b[0] = be64_to_cpu(b[0]);
401}
402
403static void regmap_parse_64_le_inplace(void *buf)
404{
405 __le64 *b = buf;
406
407 b[0] = le64_to_cpu(b[0]);
408}
409
410static unsigned int regmap_parse_64_native(const void *buf)
411{
412 return *(u64 *)buf;
413}
414#endif
415
416static void regmap_lock_mutex(void *__map)
417{
418 struct regmap *map = __map;
419 mutex_lock(&map->mutex);
420}
421
422static void regmap_unlock_mutex(void *__map)
423{
424 struct regmap *map = __map;
425 mutex_unlock(&map->mutex);
426}
427
428static void regmap_lock_spinlock(void *__map)
429__acquires(&map->spinlock)
430{
431 struct regmap *map = __map;
432 unsigned long flags;
433
434 spin_lock_irqsave(&map->spinlock, flags);
435 map->spinlock_flags = flags;
436}
437
438static void regmap_unlock_spinlock(void *__map)
439__releases(&map->spinlock)
440{
441 struct regmap *map = __map;
442 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
443}
444
445static void dev_get_regmap_release(struct device *dev, void *res)
446{
447 /*
448 * We don't actually have anything to do here; the goal here
449 * is not to manage the regmap but to provide a simple way to
450 * get the regmap back given a struct device.
451 */
452}
453
454static bool _regmap_range_add(struct regmap *map,
455 struct regmap_range_node *data)
456{
457 struct rb_root *root = &map->range_tree;
458 struct rb_node **new = &(root->rb_node), *parent = NULL;
459
460 while (*new) {
461 struct regmap_range_node *this =
462 container_of(*new, struct regmap_range_node, node);
463
464 parent = *new;
465 if (data->range_max < this->range_min)
466 new = &((*new)->rb_left);
467 else if (data->range_min > this->range_max)
468 new = &((*new)->rb_right);
469 else
470 return false;
471 }
472
473 rb_link_node(&data->node, parent, new);
474 rb_insert_color(&data->node, root);
475
476 return true;
477}
478
479static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
480 unsigned int reg)
481{
482 struct rb_node *node = map->range_tree.rb_node;
483
484 while (node) {
485 struct regmap_range_node *this =
486 container_of(node, struct regmap_range_node, node);
487
488 if (reg < this->range_min)
489 node = node->rb_left;
490 else if (reg > this->range_max)
491 node = node->rb_right;
492 else
493 return this;
494 }
495
496 return NULL;
497}
498
499static void regmap_range_exit(struct regmap *map)
500{
501 struct rb_node *next;
502 struct regmap_range_node *range_node;
503
504 next = rb_first(&map->range_tree);
505 while (next) {
506 range_node = rb_entry(next, struct regmap_range_node, node);
507 next = rb_next(&range_node->node);
508 rb_erase(&range_node->node, &map->range_tree);
509 kfree(range_node);
510 }
511
512 kfree(map->selector_work_buf);
513}
514
515int regmap_attach_dev(struct device *dev, struct regmap *map,
516 const struct regmap_config *config)
517{
518 struct regmap **m;
519
520 map->dev = dev;
521
522 regmap_debugfs_init(map, config->name);
523
524 /* Add a devres resource for dev_get_regmap() */
525 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
526 if (!m) {
527 regmap_debugfs_exit(map);
528 return -ENOMEM;
529 }
530 *m = map;
531 devres_add(dev, m);
532
533 return 0;
534}
535EXPORT_SYMBOL_GPL(regmap_attach_dev);
536
537static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
538 const struct regmap_config *config)
539{
540 enum regmap_endian endian;
541
542 /* Retrieve the endianness specification from the regmap config */
543 endian = config->reg_format_endian;
544
545 /* If the regmap config specified a non-default value, use that */
546 if (endian != REGMAP_ENDIAN_DEFAULT)
547 return endian;
548
549 /* Retrieve the endianness specification from the bus config */
550 if (bus && bus->reg_format_endian_default)
551 endian = bus->reg_format_endian_default;
552
553 /* If the bus specified a non-default value, use that */
554 if (endian != REGMAP_ENDIAN_DEFAULT)
555 return endian;
556
557 /* Use this if no other value was found */
558 return REGMAP_ENDIAN_BIG;
559}
560
561enum regmap_endian regmap_get_val_endian(struct device *dev,
562 const struct regmap_bus *bus,
563 const struct regmap_config *config)
564{
565 struct device_node *np;
566 enum regmap_endian endian;
567
568 /* Retrieve the endianness specification from the regmap config */
569 endian = config->val_format_endian;
570
571 /* If the regmap config specified a non-default value, use that */
572 if (endian != REGMAP_ENDIAN_DEFAULT)
573 return endian;
574
575 /* If the dev and dev->of_node exist try to get endianness from DT */
576 if (dev && dev->of_node) {
577 np = dev->of_node;
578
579 /* Parse the device's DT node for an endianness specification */
580 if (of_property_read_bool(np, "big-endian"))
581 endian = REGMAP_ENDIAN_BIG;
582 else if (of_property_read_bool(np, "little-endian"))
583 endian = REGMAP_ENDIAN_LITTLE;
584 else if (of_property_read_bool(np, "native-endian"))
585 endian = REGMAP_ENDIAN_NATIVE;
586
587 /* If the endianness was specified in DT, use that */
588 if (endian != REGMAP_ENDIAN_DEFAULT)
589 return endian;
590 }
591
592 /* Retrieve the endianness specification from the bus config */
593 if (bus && bus->val_format_endian_default)
594 endian = bus->val_format_endian_default;
595
596 /* If the bus specified a non-default value, use that */
597 if (endian != REGMAP_ENDIAN_DEFAULT)
598 return endian;
599
600 /* Use this if no other value was found */
601 return REGMAP_ENDIAN_BIG;
602}
603EXPORT_SYMBOL_GPL(regmap_get_val_endian);
604
605struct regmap *__regmap_init(struct device *dev,
606 const struct regmap_bus *bus,
607 void *bus_context,
608 const struct regmap_config *config,
609 struct lock_class_key *lock_key,
610 const char *lock_name)
611{
612 struct regmap *map;
613 int ret = -EINVAL;
614 enum regmap_endian reg_endian, val_endian;
615 int i, j;
616
617 if (!config)
618 goto err;
619
620 map = kzalloc(sizeof(*map), GFP_KERNEL);
621 if (map == NULL) {
622 ret = -ENOMEM;
623 goto err;
624 }
625
626 if (config->lock && config->unlock) {
627 map->lock = config->lock;
628 map->unlock = config->unlock;
629 map->lock_arg = config->lock_arg;
630 } else {
631 if ((bus && bus->fast_io) ||
632 config->fast_io) {
633 spin_lock_init(&map->spinlock);
634 map->lock = regmap_lock_spinlock;
635 map->unlock = regmap_unlock_spinlock;
636 lockdep_set_class_and_name(&map->spinlock,
637 lock_key, lock_name);
638 } else {
639 mutex_init(&map->mutex);
640 map->lock = regmap_lock_mutex;
641 map->unlock = regmap_unlock_mutex;
642 lockdep_set_class_and_name(&map->mutex,
643 lock_key, lock_name);
644 }
645 map->lock_arg = map;
646 }
647
648 /*
649 * When we write in fast-paths with regmap_bulk_write() don't allocate
650 * scratch buffers with sleeping allocations.
651 */
652 if ((bus && bus->fast_io) || config->fast_io)
653 map->alloc_flags = GFP_ATOMIC;
654 else
655 map->alloc_flags = GFP_KERNEL;
656
657 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
658 map->format.pad_bytes = config->pad_bits / 8;
659 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
660 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
661 config->val_bits + config->pad_bits, 8);
662 map->reg_shift = config->pad_bits % 8;
663 if (config->reg_stride)
664 map->reg_stride = config->reg_stride;
665 else
666 map->reg_stride = 1;
667 if (is_power_of_2(map->reg_stride))
668 map->reg_stride_order = ilog2(map->reg_stride);
669 else
670 map->reg_stride_order = -1;
671 map->use_single_read = config->use_single_rw || !bus || !bus->read;
672 map->use_single_write = config->use_single_rw || !bus || !bus->write;
673 map->can_multi_write = config->can_multi_write && bus && bus->write;
674 if (bus) {
675 map->max_raw_read = bus->max_raw_read;
676 map->max_raw_write = bus->max_raw_write;
677 }
678 map->dev = dev;
679 map->bus = bus;
680 map->bus_context = bus_context;
681 map->max_register = config->max_register;
682 map->wr_table = config->wr_table;
683 map->rd_table = config->rd_table;
684 map->volatile_table = config->volatile_table;
685 map->precious_table = config->precious_table;
686 map->writeable_reg = config->writeable_reg;
687 map->readable_reg = config->readable_reg;
688 map->volatile_reg = config->volatile_reg;
689 map->precious_reg = config->precious_reg;
690 map->cache_type = config->cache_type;
691 map->name = config->name;
692
693 spin_lock_init(&map->async_lock);
694 INIT_LIST_HEAD(&map->async_list);
695 INIT_LIST_HEAD(&map->async_free);
696 init_waitqueue_head(&map->async_waitq);
697
698 if (config->read_flag_mask || config->write_flag_mask) {
699 map->read_flag_mask = config->read_flag_mask;
700 map->write_flag_mask = config->write_flag_mask;
701 } else if (bus) {
702 map->read_flag_mask = bus->read_flag_mask;
703 }
704
705 if (!bus) {
706 map->reg_read = config->reg_read;
707 map->reg_write = config->reg_write;
708
709 map->defer_caching = false;
710 goto skip_format_initialization;
711 } else if (!bus->read || !bus->write) {
712 map->reg_read = _regmap_bus_reg_read;
713 map->reg_write = _regmap_bus_reg_write;
714
715 map->defer_caching = false;
716 goto skip_format_initialization;
717 } else {
718 map->reg_read = _regmap_bus_read;
719 map->reg_update_bits = bus->reg_update_bits;
720 }
721
722 reg_endian = regmap_get_reg_endian(bus, config);
723 val_endian = regmap_get_val_endian(dev, bus, config);
724
725 switch (config->reg_bits + map->reg_shift) {
726 case 2:
727 switch (config->val_bits) {
728 case 6:
729 map->format.format_write = regmap_format_2_6_write;
730 break;
731 default:
732 goto err_map;
733 }
734 break;
735
736 case 4:
737 switch (config->val_bits) {
738 case 12:
739 map->format.format_write = regmap_format_4_12_write;
740 break;
741 default:
742 goto err_map;
743 }
744 break;
745
746 case 7:
747 switch (config->val_bits) {
748 case 9:
749 map->format.format_write = regmap_format_7_9_write;
750 break;
751 default:
752 goto err_map;
753 }
754 break;
755
756 case 10:
757 switch (config->val_bits) {
758 case 14:
759 map->format.format_write = regmap_format_10_14_write;
760 break;
761 default:
762 goto err_map;
763 }
764 break;
765
766 case 8:
767 map->format.format_reg = regmap_format_8;
768 break;
769
770 case 16:
771 switch (reg_endian) {
772 case REGMAP_ENDIAN_BIG:
773 map->format.format_reg = regmap_format_16_be;
774 break;
775 case REGMAP_ENDIAN_LITTLE:
776 map->format.format_reg = regmap_format_16_le;
777 break;
778 case REGMAP_ENDIAN_NATIVE:
779 map->format.format_reg = regmap_format_16_native;
780 break;
781 default:
782 goto err_map;
783 }
784 break;
785
786 case 24:
787 if (reg_endian != REGMAP_ENDIAN_BIG)
788 goto err_map;
789 map->format.format_reg = regmap_format_24;
790 break;
791
792 case 32:
793 switch (reg_endian) {
794 case REGMAP_ENDIAN_BIG:
795 map->format.format_reg = regmap_format_32_be;
796 break;
797 case REGMAP_ENDIAN_LITTLE:
798 map->format.format_reg = regmap_format_32_le;
799 break;
800 case REGMAP_ENDIAN_NATIVE:
801 map->format.format_reg = regmap_format_32_native;
802 break;
803 default:
804 goto err_map;
805 }
806 break;
807
808#ifdef CONFIG_64BIT
809 case 64:
810 switch (reg_endian) {
811 case REGMAP_ENDIAN_BIG:
812 map->format.format_reg = regmap_format_64_be;
813 break;
814 case REGMAP_ENDIAN_LITTLE:
815 map->format.format_reg = regmap_format_64_le;
816 break;
817 case REGMAP_ENDIAN_NATIVE:
818 map->format.format_reg = regmap_format_64_native;
819 break;
820 default:
821 goto err_map;
822 }
823 break;
824#endif
825
826 default:
827 goto err_map;
828 }
829
830 if (val_endian == REGMAP_ENDIAN_NATIVE)
831 map->format.parse_inplace = regmap_parse_inplace_noop;
832
833 switch (config->val_bits) {
834 case 8:
835 map->format.format_val = regmap_format_8;
836 map->format.parse_val = regmap_parse_8;
837 map->format.parse_inplace = regmap_parse_inplace_noop;
838 break;
839 case 16:
840 switch (val_endian) {
841 case REGMAP_ENDIAN_BIG:
842 map->format.format_val = regmap_format_16_be;
843 map->format.parse_val = regmap_parse_16_be;
844 map->format.parse_inplace = regmap_parse_16_be_inplace;
845 break;
846 case REGMAP_ENDIAN_LITTLE:
847 map->format.format_val = regmap_format_16_le;
848 map->format.parse_val = regmap_parse_16_le;
849 map->format.parse_inplace = regmap_parse_16_le_inplace;
850 break;
851 case REGMAP_ENDIAN_NATIVE:
852 map->format.format_val = regmap_format_16_native;
853 map->format.parse_val = regmap_parse_16_native;
854 break;
855 default:
856 goto err_map;
857 }
858 break;
859 case 24:
860 if (val_endian != REGMAP_ENDIAN_BIG)
861 goto err_map;
862 map->format.format_val = regmap_format_24;
863 map->format.parse_val = regmap_parse_24;
864 break;
865 case 32:
866 switch (val_endian) {
867 case REGMAP_ENDIAN_BIG:
868 map->format.format_val = regmap_format_32_be;
869 map->format.parse_val = regmap_parse_32_be;
870 map->format.parse_inplace = regmap_parse_32_be_inplace;
871 break;
872 case REGMAP_ENDIAN_LITTLE:
873 map->format.format_val = regmap_format_32_le;
874 map->format.parse_val = regmap_parse_32_le;
875 map->format.parse_inplace = regmap_parse_32_le_inplace;
876 break;
877 case REGMAP_ENDIAN_NATIVE:
878 map->format.format_val = regmap_format_32_native;
879 map->format.parse_val = regmap_parse_32_native;
880 break;
881 default:
882 goto err_map;
883 }
884 break;
885#ifdef CONFIG_64BIT
886 case 64:
887 switch (val_endian) {
888 case REGMAP_ENDIAN_BIG:
889 map->format.format_val = regmap_format_64_be;
890 map->format.parse_val = regmap_parse_64_be;
891 map->format.parse_inplace = regmap_parse_64_be_inplace;
892 break;
893 case REGMAP_ENDIAN_LITTLE:
894 map->format.format_val = regmap_format_64_le;
895 map->format.parse_val = regmap_parse_64_le;
896 map->format.parse_inplace = regmap_parse_64_le_inplace;
897 break;
898 case REGMAP_ENDIAN_NATIVE:
899 map->format.format_val = regmap_format_64_native;
900 map->format.parse_val = regmap_parse_64_native;
901 break;
902 default:
903 goto err_map;
904 }
905 break;
906#endif
907 }
908
909 if (map->format.format_write) {
910 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
911 (val_endian != REGMAP_ENDIAN_BIG))
912 goto err_map;
913 map->use_single_write = true;
914 }
915
916 if (!map->format.format_write &&
917 !(map->format.format_reg && map->format.format_val))
918 goto err_map;
919
920 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
921 if (map->work_buf == NULL) {
922 ret = -ENOMEM;
923 goto err_map;
924 }
925
926 if (map->format.format_write) {
927 map->defer_caching = false;
928 map->reg_write = _regmap_bus_formatted_write;
929 } else if (map->format.format_val) {
930 map->defer_caching = true;
931 map->reg_write = _regmap_bus_raw_write;
932 }
933
934skip_format_initialization:
935
936 map->range_tree = RB_ROOT;
937 for (i = 0; i < config->num_ranges; i++) {
938 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
939 struct regmap_range_node *new;
940
941 /* Sanity check */
942 if (range_cfg->range_max < range_cfg->range_min) {
943 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
944 range_cfg->range_max, range_cfg->range_min);
945 goto err_range;
946 }
947
948 if (range_cfg->range_max > map->max_register) {
949 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
950 range_cfg->range_max, map->max_register);
951 goto err_range;
952 }
953
954 if (range_cfg->selector_reg > map->max_register) {
955 dev_err(map->dev,
956 "Invalid range %d: selector out of map\n", i);
957 goto err_range;
958 }
959
960 if (range_cfg->window_len == 0) {
961 dev_err(map->dev, "Invalid range %d: window_len 0\n",
962 i);
963 goto err_range;
964 }
965
966 /* Make sure, that this register range has no selector
967 or data window within its boundary */
968 for (j = 0; j < config->num_ranges; j++) {
969 unsigned sel_reg = config->ranges[j].selector_reg;
970 unsigned win_min = config->ranges[j].window_start;
971 unsigned win_max = win_min +
972 config->ranges[j].window_len - 1;
973
974 /* Allow data window inside its own virtual range */
975 if (j == i)
976 continue;
977
978 if (range_cfg->range_min <= sel_reg &&
979 sel_reg <= range_cfg->range_max) {
980 dev_err(map->dev,
981 "Range %d: selector for %d in window\n",
982 i, j);
983 goto err_range;
984 }
985
986 if (!(win_max < range_cfg->range_min ||
987 win_min > range_cfg->range_max)) {
988 dev_err(map->dev,
989 "Range %d: window for %d in window\n",
990 i, j);
991 goto err_range;
992 }
993 }
994
995 new = kzalloc(sizeof(*new), GFP_KERNEL);
996 if (new == NULL) {
997 ret = -ENOMEM;
998 goto err_range;
999 }
1000
1001 new->map = map;
1002 new->name = range_cfg->name;
1003 new->range_min = range_cfg->range_min;
1004 new->range_max = range_cfg->range_max;
1005 new->selector_reg = range_cfg->selector_reg;
1006 new->selector_mask = range_cfg->selector_mask;
1007 new->selector_shift = range_cfg->selector_shift;
1008 new->window_start = range_cfg->window_start;
1009 new->window_len = range_cfg->window_len;
1010
1011 if (!_regmap_range_add(map, new)) {
1012 dev_err(map->dev, "Failed to add range %d\n", i);
1013 kfree(new);
1014 goto err_range;
1015 }
1016
1017 if (map->selector_work_buf == NULL) {
1018 map->selector_work_buf =
1019 kzalloc(map->format.buf_size, GFP_KERNEL);
1020 if (map->selector_work_buf == NULL) {
1021 ret = -ENOMEM;
1022 goto err_range;
1023 }
1024 }
1025 }
1026
1027 ret = regcache_init(map, config);
1028 if (ret != 0)
1029 goto err_range;
1030
1031 if (dev) {
1032 ret = regmap_attach_dev(dev, map, config);
1033 if (ret != 0)
1034 goto err_regcache;
1035 }
1036
1037 return map;
1038
1039err_regcache:
1040 regcache_exit(map);
1041err_range:
1042 regmap_range_exit(map);
1043 kfree(map->work_buf);
1044err_map:
1045 kfree(map);
1046err:
1047 return ERR_PTR(ret);
1048}
1049EXPORT_SYMBOL_GPL(__regmap_init);
1050
1051static void devm_regmap_release(struct device *dev, void *res)
1052{
1053 regmap_exit(*(struct regmap **)res);
1054}
1055
1056struct regmap *__devm_regmap_init(struct device *dev,
1057 const struct regmap_bus *bus,
1058 void *bus_context,
1059 const struct regmap_config *config,
1060 struct lock_class_key *lock_key,
1061 const char *lock_name)
1062{
1063 struct regmap **ptr, *regmap;
1064
1065 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1066 if (!ptr)
1067 return ERR_PTR(-ENOMEM);
1068
1069 regmap = __regmap_init(dev, bus, bus_context, config,
1070 lock_key, lock_name);
1071 if (!IS_ERR(regmap)) {
1072 *ptr = regmap;
1073 devres_add(dev, ptr);
1074 } else {
1075 devres_free(ptr);
1076 }
1077
1078 return regmap;
1079}
1080EXPORT_SYMBOL_GPL(__devm_regmap_init);
1081
1082static void regmap_field_init(struct regmap_field *rm_field,
1083 struct regmap *regmap, struct reg_field reg_field)
1084{
1085 rm_field->regmap = regmap;
1086 rm_field->reg = reg_field.reg;
1087 rm_field->shift = reg_field.lsb;
1088 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1089 rm_field->id_size = reg_field.id_size;
1090 rm_field->id_offset = reg_field.id_offset;
1091}
1092
1093/**
1094 * devm_regmap_field_alloc(): Allocate and initialise a register field
1095 * in a register map.
1096 *
1097 * @dev: Device that will be interacted with
1098 * @regmap: regmap bank in which this register field is located.
1099 * @reg_field: Register field with in the bank.
1100 *
1101 * The return value will be an ERR_PTR() on error or a valid pointer
1102 * to a struct regmap_field. The regmap_field will be automatically freed
1103 * by the device management code.
1104 */
1105struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1106 struct regmap *regmap, struct reg_field reg_field)
1107{
1108 struct regmap_field *rm_field = devm_kzalloc(dev,
1109 sizeof(*rm_field), GFP_KERNEL);
1110 if (!rm_field)
1111 return ERR_PTR(-ENOMEM);
1112
1113 regmap_field_init(rm_field, regmap, reg_field);
1114
1115 return rm_field;
1116
1117}
1118EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1119
1120/**
1121 * devm_regmap_field_free(): Free register field allocated using
1122 * devm_regmap_field_alloc. Usally drivers need not call this function,
1123 * as the memory allocated via devm will be freed as per device-driver
1124 * life-cyle.
1125 *
1126 * @dev: Device that will be interacted with
1127 * @field: regmap field which should be freed.
1128 */
1129void devm_regmap_field_free(struct device *dev,
1130 struct regmap_field *field)
1131{
1132 devm_kfree(dev, field);
1133}
1134EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1135
1136/**
1137 * regmap_field_alloc(): Allocate and initialise a register field
1138 * in a register map.
1139 *
1140 * @regmap: regmap bank in which this register field is located.
1141 * @reg_field: Register field with in the bank.
1142 *
1143 * The return value will be an ERR_PTR() on error or a valid pointer
1144 * to a struct regmap_field. The regmap_field should be freed by the
1145 * user once its finished working with it using regmap_field_free().
1146 */
1147struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1148 struct reg_field reg_field)
1149{
1150 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1151
1152 if (!rm_field)
1153 return ERR_PTR(-ENOMEM);
1154
1155 regmap_field_init(rm_field, regmap, reg_field);
1156
1157 return rm_field;
1158}
1159EXPORT_SYMBOL_GPL(regmap_field_alloc);
1160
1161/**
1162 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1163 *
1164 * @field: regmap field which should be freed.
1165 */
1166void regmap_field_free(struct regmap_field *field)
1167{
1168 kfree(field);
1169}
1170EXPORT_SYMBOL_GPL(regmap_field_free);
1171
1172/**
1173 * regmap_reinit_cache(): Reinitialise the current register cache
1174 *
1175 * @map: Register map to operate on.
1176 * @config: New configuration. Only the cache data will be used.
1177 *
1178 * Discard any existing register cache for the map and initialize a
1179 * new cache. This can be used to restore the cache to defaults or to
1180 * update the cache configuration to reflect runtime discovery of the
1181 * hardware.
1182 *
1183 * No explicit locking is done here, the user needs to ensure that
1184 * this function will not race with other calls to regmap.
1185 */
1186int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1187{
1188 regcache_exit(map);
1189 regmap_debugfs_exit(map);
1190
1191 map->max_register = config->max_register;
1192 map->writeable_reg = config->writeable_reg;
1193 map->readable_reg = config->readable_reg;
1194 map->volatile_reg = config->volatile_reg;
1195 map->precious_reg = config->precious_reg;
1196 map->cache_type = config->cache_type;
1197
1198 regmap_debugfs_init(map, config->name);
1199
1200 map->cache_bypass = false;
1201 map->cache_only = false;
1202
1203 return regcache_init(map, config);
1204}
1205EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1206
1207/**
1208 * regmap_exit(): Free a previously allocated register map
1209 */
1210void regmap_exit(struct regmap *map)
1211{
1212 struct regmap_async *async;
1213
1214 regcache_exit(map);
1215 regmap_debugfs_exit(map);
1216 regmap_range_exit(map);
1217 if (map->bus && map->bus->free_context)
1218 map->bus->free_context(map->bus_context);
1219 kfree(map->work_buf);
1220 while (!list_empty(&map->async_free)) {
1221 async = list_first_entry_or_null(&map->async_free,
1222 struct regmap_async,
1223 list);
1224 list_del(&async->list);
1225 kfree(async->work_buf);
1226 kfree(async);
1227 }
1228 kfree(map);
1229}
1230EXPORT_SYMBOL_GPL(regmap_exit);
1231
1232static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1233{
1234 struct regmap **r = res;
1235 if (!r || !*r) {
1236 WARN_ON(!r || !*r);
1237 return 0;
1238 }
1239
1240 /* If the user didn't specify a name match any */
1241 if (data)
1242 return (*r)->name == data;
1243 else
1244 return 1;
1245}
1246
1247/**
1248 * dev_get_regmap(): Obtain the regmap (if any) for a device
1249 *
1250 * @dev: Device to retrieve the map for
1251 * @name: Optional name for the register map, usually NULL.
1252 *
1253 * Returns the regmap for the device if one is present, or NULL. If
1254 * name is specified then it must match the name specified when
1255 * registering the device, if it is NULL then the first regmap found
1256 * will be used. Devices with multiple register maps are very rare,
1257 * generic code should normally not need to specify a name.
1258 */
1259struct regmap *dev_get_regmap(struct device *dev, const char *name)
1260{
1261 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1262 dev_get_regmap_match, (void *)name);
1263
1264 if (!r)
1265 return NULL;
1266 return *r;
1267}
1268EXPORT_SYMBOL_GPL(dev_get_regmap);
1269
1270/**
1271 * regmap_get_device(): Obtain the device from a regmap
1272 *
1273 * @map: Register map to operate on.
1274 *
1275 * Returns the underlying device that the regmap has been created for.
1276 */
1277struct device *regmap_get_device(struct regmap *map)
1278{
1279 return map->dev;
1280}
1281EXPORT_SYMBOL_GPL(regmap_get_device);
1282
1283static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1284 struct regmap_range_node *range,
1285 unsigned int val_num)
1286{
1287 void *orig_work_buf;
1288 unsigned int win_offset;
1289 unsigned int win_page;
1290 bool page_chg;
1291 int ret;
1292
1293 win_offset = (*reg - range->range_min) % range->window_len;
1294 win_page = (*reg - range->range_min) / range->window_len;
1295
1296 if (val_num > 1) {
1297 /* Bulk write shouldn't cross range boundary */
1298 if (*reg + val_num - 1 > range->range_max)
1299 return -EINVAL;
1300
1301 /* ... or single page boundary */
1302 if (val_num > range->window_len - win_offset)
1303 return -EINVAL;
1304 }
1305
1306 /* It is possible to have selector register inside data window.
1307 In that case, selector register is located on every page and
1308 it needs no page switching, when accessed alone. */
1309 if (val_num > 1 ||
1310 range->window_start + win_offset != range->selector_reg) {
1311 /* Use separate work_buf during page switching */
1312 orig_work_buf = map->work_buf;
1313 map->work_buf = map->selector_work_buf;
1314
1315 ret = _regmap_update_bits(map, range->selector_reg,
1316 range->selector_mask,
1317 win_page << range->selector_shift,
1318 &page_chg, false);
1319
1320 map->work_buf = orig_work_buf;
1321
1322 if (ret != 0)
1323 return ret;
1324 }
1325
1326 *reg = range->window_start + win_offset;
1327
1328 return 0;
1329}
1330
1331static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1332 unsigned long mask)
1333{
1334 u8 *buf;
1335 int i;
1336
1337 if (!mask || !map->work_buf)
1338 return;
1339
1340 buf = map->work_buf;
1341
1342 for (i = 0; i < max_bytes; i++)
1343 buf[i] |= (mask >> (8 * i)) & 0xff;
1344}
1345
1346int _regmap_raw_write(struct regmap *map, unsigned int reg,
1347 const void *val, size_t val_len)
1348{
1349 struct regmap_range_node *range;
1350 unsigned long flags;
1351 void *work_val = map->work_buf + map->format.reg_bytes +
1352 map->format.pad_bytes;
1353 void *buf;
1354 int ret = -ENOTSUPP;
1355 size_t len;
1356 int i;
1357
1358 WARN_ON(!map->bus);
1359
1360 /* Check for unwritable registers before we start */
1361 if (map->writeable_reg)
1362 for (i = 0; i < val_len / map->format.val_bytes; i++)
1363 if (!map->writeable_reg(map->dev,
1364 reg + regmap_get_offset(map, i)))
1365 return -EINVAL;
1366
1367 if (!map->cache_bypass && map->format.parse_val) {
1368 unsigned int ival;
1369 int val_bytes = map->format.val_bytes;
1370 for (i = 0; i < val_len / val_bytes; i++) {
1371 ival = map->format.parse_val(val + (i * val_bytes));
1372 ret = regcache_write(map,
1373 reg + regmap_get_offset(map, i),
1374 ival);
1375 if (ret) {
1376 dev_err(map->dev,
1377 "Error in caching of register: %x ret: %d\n",
1378 reg + i, ret);
1379 return ret;
1380 }
1381 }
1382 if (map->cache_only) {
1383 map->cache_dirty = true;
1384 return 0;
1385 }
1386 }
1387
1388 range = _regmap_range_lookup(map, reg);
1389 if (range) {
1390 int val_num = val_len / map->format.val_bytes;
1391 int win_offset = (reg - range->range_min) % range->window_len;
1392 int win_residue = range->window_len - win_offset;
1393
1394 /* If the write goes beyond the end of the window split it */
1395 while (val_num > win_residue) {
1396 dev_dbg(map->dev, "Writing window %d/%zu\n",
1397 win_residue, val_len / map->format.val_bytes);
1398 ret = _regmap_raw_write(map, reg, val, win_residue *
1399 map->format.val_bytes);
1400 if (ret != 0)
1401 return ret;
1402
1403 reg += win_residue;
1404 val_num -= win_residue;
1405 val += win_residue * map->format.val_bytes;
1406 val_len -= win_residue * map->format.val_bytes;
1407
1408 win_offset = (reg - range->range_min) %
1409 range->window_len;
1410 win_residue = range->window_len - win_offset;
1411 }
1412
1413 ret = _regmap_select_page(map, ®, range, val_num);
1414 if (ret != 0)
1415 return ret;
1416 }
1417
1418 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1419 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1420 map->write_flag_mask);
1421
1422 /*
1423 * Essentially all I/O mechanisms will be faster with a single
1424 * buffer to write. Since register syncs often generate raw
1425 * writes of single registers optimise that case.
1426 */
1427 if (val != work_val && val_len == map->format.val_bytes) {
1428 memcpy(work_val, val, map->format.val_bytes);
1429 val = work_val;
1430 }
1431
1432 if (map->async && map->bus->async_write) {
1433 struct regmap_async *async;
1434
1435 trace_regmap_async_write_start(map, reg, val_len);
1436
1437 spin_lock_irqsave(&map->async_lock, flags);
1438 async = list_first_entry_or_null(&map->async_free,
1439 struct regmap_async,
1440 list);
1441 if (async)
1442 list_del(&async->list);
1443 spin_unlock_irqrestore(&map->async_lock, flags);
1444
1445 if (!async) {
1446 async = map->bus->async_alloc();
1447 if (!async)
1448 return -ENOMEM;
1449
1450 async->work_buf = kzalloc(map->format.buf_size,
1451 GFP_KERNEL | GFP_DMA);
1452 if (!async->work_buf) {
1453 kfree(async);
1454 return -ENOMEM;
1455 }
1456 }
1457
1458 async->map = map;
1459
1460 /* If the caller supplied the value we can use it safely. */
1461 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1462 map->format.reg_bytes + map->format.val_bytes);
1463
1464 spin_lock_irqsave(&map->async_lock, flags);
1465 list_add_tail(&async->list, &map->async_list);
1466 spin_unlock_irqrestore(&map->async_lock, flags);
1467
1468 if (val != work_val)
1469 ret = map->bus->async_write(map->bus_context,
1470 async->work_buf,
1471 map->format.reg_bytes +
1472 map->format.pad_bytes,
1473 val, val_len, async);
1474 else
1475 ret = map->bus->async_write(map->bus_context,
1476 async->work_buf,
1477 map->format.reg_bytes +
1478 map->format.pad_bytes +
1479 val_len, NULL, 0, async);
1480
1481 if (ret != 0) {
1482 dev_err(map->dev, "Failed to schedule write: %d\n",
1483 ret);
1484
1485 spin_lock_irqsave(&map->async_lock, flags);
1486 list_move(&async->list, &map->async_free);
1487 spin_unlock_irqrestore(&map->async_lock, flags);
1488 }
1489
1490 return ret;
1491 }
1492
1493 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1494
1495 /* If we're doing a single register write we can probably just
1496 * send the work_buf directly, otherwise try to do a gather
1497 * write.
1498 */
1499 if (val == work_val)
1500 ret = map->bus->write(map->bus_context, map->work_buf,
1501 map->format.reg_bytes +
1502 map->format.pad_bytes +
1503 val_len);
1504 else if (map->bus->gather_write)
1505 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1506 map->format.reg_bytes +
1507 map->format.pad_bytes,
1508 val, val_len);
1509
1510 /* If that didn't work fall back on linearising by hand. */
1511 if (ret == -ENOTSUPP) {
1512 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1513 buf = kzalloc(len, GFP_KERNEL);
1514 if (!buf)
1515 return -ENOMEM;
1516
1517 memcpy(buf, map->work_buf, map->format.reg_bytes);
1518 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1519 val, val_len);
1520 ret = map->bus->write(map->bus_context, buf, len);
1521
1522 kfree(buf);
1523 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1524 /* regcache_drop_region() takes lock that we already have,
1525 * thus call map->cache_ops->drop() directly
1526 */
1527 if (map->cache_ops && map->cache_ops->drop)
1528 map->cache_ops->drop(map, reg, reg + 1);
1529 }
1530
1531 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1532
1533 return ret;
1534}
1535
1536/**
1537 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1538 *
1539 * @map: Map to check.
1540 */
1541bool regmap_can_raw_write(struct regmap *map)
1542{
1543 return map->bus && map->bus->write && map->format.format_val &&
1544 map->format.format_reg;
1545}
1546EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1547
1548/**
1549 * regmap_get_raw_read_max - Get the maximum size we can read
1550 *
1551 * @map: Map to check.
1552 */
1553size_t regmap_get_raw_read_max(struct regmap *map)
1554{
1555 return map->max_raw_read;
1556}
1557EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1558
1559/**
1560 * regmap_get_raw_write_max - Get the maximum size we can read
1561 *
1562 * @map: Map to check.
1563 */
1564size_t regmap_get_raw_write_max(struct regmap *map)
1565{
1566 return map->max_raw_write;
1567}
1568EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1569
1570static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1571 unsigned int val)
1572{
1573 int ret;
1574 struct regmap_range_node *range;
1575 struct regmap *map = context;
1576
1577 WARN_ON(!map->bus || !map->format.format_write);
1578
1579 range = _regmap_range_lookup(map, reg);
1580 if (range) {
1581 ret = _regmap_select_page(map, ®, range, 1);
1582 if (ret != 0)
1583 return ret;
1584 }
1585
1586 map->format.format_write(map, reg, val);
1587
1588 trace_regmap_hw_write_start(map, reg, 1);
1589
1590 ret = map->bus->write(map->bus_context, map->work_buf,
1591 map->format.buf_size);
1592
1593 trace_regmap_hw_write_done(map, reg, 1);
1594
1595 return ret;
1596}
1597
1598static int _regmap_bus_reg_write(void *context, unsigned int reg,
1599 unsigned int val)
1600{
1601 struct regmap *map = context;
1602
1603 return map->bus->reg_write(map->bus_context, reg, val);
1604}
1605
1606static int _regmap_bus_raw_write(void *context, unsigned int reg,
1607 unsigned int val)
1608{
1609 struct regmap *map = context;
1610
1611 WARN_ON(!map->bus || !map->format.format_val);
1612
1613 map->format.format_val(map->work_buf + map->format.reg_bytes
1614 + map->format.pad_bytes, val, 0);
1615 return _regmap_raw_write(map, reg,
1616 map->work_buf +
1617 map->format.reg_bytes +
1618 map->format.pad_bytes,
1619 map->format.val_bytes);
1620}
1621
1622static inline void *_regmap_map_get_context(struct regmap *map)
1623{
1624 return (map->bus) ? map : map->bus_context;
1625}
1626
1627int _regmap_write(struct regmap *map, unsigned int reg,
1628 unsigned int val)
1629{
1630 int ret;
1631 void *context = _regmap_map_get_context(map);
1632
1633 if (!regmap_writeable(map, reg))
1634 return -EIO;
1635
1636 if (!map->cache_bypass && !map->defer_caching) {
1637 ret = regcache_write(map, reg, val);
1638 if (ret != 0)
1639 return ret;
1640 if (map->cache_only) {
1641 map->cache_dirty = true;
1642 return 0;
1643 }
1644 }
1645
1646#ifdef LOG_DEVICE
1647 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1648 dev_info(map->dev, "%x <= %x\n", reg, val);
1649#endif
1650
1651 trace_regmap_reg_write(map, reg, val);
1652
1653 return map->reg_write(context, reg, val);
1654}
1655
1656/**
1657 * regmap_write(): Write a value to a single register
1658 *
1659 * @map: Register map to write to
1660 * @reg: Register to write to
1661 * @val: Value to be written
1662 *
1663 * A value of zero will be returned on success, a negative errno will
1664 * be returned in error cases.
1665 */
1666int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1667{
1668 int ret;
1669
1670 if (!IS_ALIGNED(reg, map->reg_stride))
1671 return -EINVAL;
1672
1673 map->lock(map->lock_arg);
1674
1675 ret = _regmap_write(map, reg, val);
1676
1677 map->unlock(map->lock_arg);
1678
1679 return ret;
1680}
1681EXPORT_SYMBOL_GPL(regmap_write);
1682
1683/**
1684 * regmap_write_async(): Write a value to a single register asynchronously
1685 *
1686 * @map: Register map to write to
1687 * @reg: Register to write to
1688 * @val: Value to be written
1689 *
1690 * A value of zero will be returned on success, a negative errno will
1691 * be returned in error cases.
1692 */
1693int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1694{
1695 int ret;
1696
1697 if (!IS_ALIGNED(reg, map->reg_stride))
1698 return -EINVAL;
1699
1700 map->lock(map->lock_arg);
1701
1702 map->async = true;
1703
1704 ret = _regmap_write(map, reg, val);
1705
1706 map->async = false;
1707
1708 map->unlock(map->lock_arg);
1709
1710 return ret;
1711}
1712EXPORT_SYMBOL_GPL(regmap_write_async);
1713
1714/**
1715 * regmap_raw_write(): Write raw values to one or more registers
1716 *
1717 * @map: Register map to write to
1718 * @reg: Initial register to write to
1719 * @val: Block of data to be written, laid out for direct transmission to the
1720 * device
1721 * @val_len: Length of data pointed to by val.
1722 *
1723 * This function is intended to be used for things like firmware
1724 * download where a large block of data needs to be transferred to the
1725 * device. No formatting will be done on the data provided.
1726 *
1727 * A value of zero will be returned on success, a negative errno will
1728 * be returned in error cases.
1729 */
1730int regmap_raw_write(struct regmap *map, unsigned int reg,
1731 const void *val, size_t val_len)
1732{
1733 int ret;
1734
1735 if (!regmap_can_raw_write(map))
1736 return -EINVAL;
1737 if (val_len % map->format.val_bytes)
1738 return -EINVAL;
1739 if (map->max_raw_write && map->max_raw_write > val_len)
1740 return -E2BIG;
1741
1742 map->lock(map->lock_arg);
1743
1744 ret = _regmap_raw_write(map, reg, val, val_len);
1745
1746 map->unlock(map->lock_arg);
1747
1748 return ret;
1749}
1750EXPORT_SYMBOL_GPL(regmap_raw_write);
1751
1752/**
1753 * regmap_field_update_bits_base():
1754 * Perform a read/modify/write cycle on the register field
1755 * with change, async, force option
1756 *
1757 * @field: Register field to write to
1758 * @mask: Bitmask to change
1759 * @val: Value to be written
1760 * @change: Boolean indicating if a write was done
1761 * @async: Boolean indicating asynchronously
1762 * @force: Boolean indicating use force update
1763 *
1764 * A value of zero will be returned on success, a negative errno will
1765 * be returned in error cases.
1766 */
1767int regmap_field_update_bits_base(struct regmap_field *field,
1768 unsigned int mask, unsigned int val,
1769 bool *change, bool async, bool force)
1770{
1771 mask = (mask << field->shift) & field->mask;
1772
1773 return regmap_update_bits_base(field->regmap, field->reg,
1774 mask, val << field->shift,
1775 change, async, force);
1776}
1777EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1778
1779/**
1780 * regmap_fields_update_bits_base():
1781 * Perform a read/modify/write cycle on the register field
1782 * with change, async, force option
1783 *
1784 * @field: Register field to write to
1785 * @id: port ID
1786 * @mask: Bitmask to change
1787 * @val: Value to be written
1788 * @change: Boolean indicating if a write was done
1789 * @async: Boolean indicating asynchronously
1790 * @force: Boolean indicating use force update
1791 *
1792 * A value of zero will be returned on success, a negative errno will
1793 * be returned in error cases.
1794 */
1795int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1796 unsigned int mask, unsigned int val,
1797 bool *change, bool async, bool force)
1798{
1799 if (id >= field->id_size)
1800 return -EINVAL;
1801
1802 mask = (mask << field->shift) & field->mask;
1803
1804 return regmap_update_bits_base(field->regmap,
1805 field->reg + (field->id_offset * id),
1806 mask, val << field->shift,
1807 change, async, force);
1808}
1809EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1810
1811/*
1812 * regmap_bulk_write(): Write multiple registers to the device
1813 *
1814 * @map: Register map to write to
1815 * @reg: First register to be write from
1816 * @val: Block of data to be written, in native register size for device
1817 * @val_count: Number of registers to write
1818 *
1819 * This function is intended to be used for writing a large block of
1820 * data to the device either in single transfer or multiple transfer.
1821 *
1822 * A value of zero will be returned on success, a negative errno will
1823 * be returned in error cases.
1824 */
1825int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1826 size_t val_count)
1827{
1828 int ret = 0, i;
1829 size_t val_bytes = map->format.val_bytes;
1830 size_t total_size = val_bytes * val_count;
1831
1832 if (!IS_ALIGNED(reg, map->reg_stride))
1833 return -EINVAL;
1834
1835 /*
1836 * Some devices don't support bulk write, for
1837 * them we have a series of single write operations in the first two if
1838 * blocks.
1839 *
1840 * The first if block is used for memory mapped io. It does not allow
1841 * val_bytes of 3 for example.
1842 * The second one is for busses that do not provide raw I/O.
1843 * The third one is used for busses which do not have these limitations
1844 * and can write arbitrary value lengths.
1845 */
1846 if (!map->bus) {
1847 map->lock(map->lock_arg);
1848 for (i = 0; i < val_count; i++) {
1849 unsigned int ival;
1850
1851 switch (val_bytes) {
1852 case 1:
1853 ival = *(u8 *)(val + (i * val_bytes));
1854 break;
1855 case 2:
1856 ival = *(u16 *)(val + (i * val_bytes));
1857 break;
1858 case 4:
1859 ival = *(u32 *)(val + (i * val_bytes));
1860 break;
1861#ifdef CONFIG_64BIT
1862 case 8:
1863 ival = *(u64 *)(val + (i * val_bytes));
1864 break;
1865#endif
1866 default:
1867 ret = -EINVAL;
1868 goto out;
1869 }
1870
1871 ret = _regmap_write(map,
1872 reg + regmap_get_offset(map, i),
1873 ival);
1874 if (ret != 0)
1875 goto out;
1876 }
1877out:
1878 map->unlock(map->lock_arg);
1879 } else if (map->bus && !map->format.parse_inplace) {
1880 const u8 *u8 = val;
1881 const u16 *u16 = val;
1882 const u32 *u32 = val;
1883 unsigned int ival;
1884
1885 for (i = 0; i < val_count; i++) {
1886 switch (map->format.val_bytes) {
1887 case 4:
1888 ival = u32[i];
1889 break;
1890 case 2:
1891 ival = u16[i];
1892 break;
1893 case 1:
1894 ival = u8[i];
1895 break;
1896 default:
1897 return -EINVAL;
1898 }
1899
1900 ret = regmap_write(map, reg + (i * map->reg_stride),
1901 ival);
1902 if (ret)
1903 return ret;
1904 }
1905 } else if (map->use_single_write ||
1906 (map->max_raw_write && map->max_raw_write < total_size)) {
1907 int chunk_stride = map->reg_stride;
1908 size_t chunk_size = val_bytes;
1909 size_t chunk_count = val_count;
1910
1911 if (!map->use_single_write) {
1912 chunk_size = map->max_raw_write;
1913 if (chunk_size % val_bytes)
1914 chunk_size -= chunk_size % val_bytes;
1915 chunk_count = total_size / chunk_size;
1916 chunk_stride *= chunk_size / val_bytes;
1917 }
1918
1919 map->lock(map->lock_arg);
1920 /* Write as many bytes as possible with chunk_size */
1921 for (i = 0; i < chunk_count; i++) {
1922 ret = _regmap_raw_write(map,
1923 reg + (i * chunk_stride),
1924 val + (i * chunk_size),
1925 chunk_size);
1926 if (ret)
1927 break;
1928 }
1929
1930 /* Write remaining bytes */
1931 if (!ret && chunk_size * i < total_size) {
1932 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1933 val + (i * chunk_size),
1934 total_size - i * chunk_size);
1935 }
1936 map->unlock(map->lock_arg);
1937 } else {
1938 void *wval;
1939
1940 if (!val_count)
1941 return -EINVAL;
1942
1943 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1944 if (!wval) {
1945 dev_err(map->dev, "Error in memory allocation\n");
1946 return -ENOMEM;
1947 }
1948 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1949 map->format.parse_inplace(wval + i);
1950
1951 map->lock(map->lock_arg);
1952 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1953 map->unlock(map->lock_arg);
1954
1955 kfree(wval);
1956 }
1957 return ret;
1958}
1959EXPORT_SYMBOL_GPL(regmap_bulk_write);
1960
1961/*
1962 * _regmap_raw_multi_reg_write()
1963 *
1964 * the (register,newvalue) pairs in regs have not been formatted, but
1965 * they are all in the same page and have been changed to being page
1966 * relative. The page register has been written if that was necessary.
1967 */
1968static int _regmap_raw_multi_reg_write(struct regmap *map,
1969 const struct reg_sequence *regs,
1970 size_t num_regs)
1971{
1972 int ret;
1973 void *buf;
1974 int i;
1975 u8 *u8;
1976 size_t val_bytes = map->format.val_bytes;
1977 size_t reg_bytes = map->format.reg_bytes;
1978 size_t pad_bytes = map->format.pad_bytes;
1979 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1980 size_t len = pair_size * num_regs;
1981
1982 if (!len)
1983 return -EINVAL;
1984
1985 buf = kzalloc(len, GFP_KERNEL);
1986 if (!buf)
1987 return -ENOMEM;
1988
1989 /* We have to linearise by hand. */
1990
1991 u8 = buf;
1992
1993 for (i = 0; i < num_regs; i++) {
1994 unsigned int reg = regs[i].reg;
1995 unsigned int val = regs[i].def;
1996 trace_regmap_hw_write_start(map, reg, 1);
1997 map->format.format_reg(u8, reg, map->reg_shift);
1998 u8 += reg_bytes + pad_bytes;
1999 map->format.format_val(u8, val, 0);
2000 u8 += val_bytes;
2001 }
2002 u8 = buf;
2003 *u8 |= map->write_flag_mask;
2004
2005 ret = map->bus->write(map->bus_context, buf, len);
2006
2007 kfree(buf);
2008
2009 for (i = 0; i < num_regs; i++) {
2010 int reg = regs[i].reg;
2011 trace_regmap_hw_write_done(map, reg, 1);
2012 }
2013 return ret;
2014}
2015
2016static unsigned int _regmap_register_page(struct regmap *map,
2017 unsigned int reg,
2018 struct regmap_range_node *range)
2019{
2020 unsigned int win_page = (reg - range->range_min) / range->window_len;
2021
2022 return win_page;
2023}
2024
2025static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2026 struct reg_sequence *regs,
2027 size_t num_regs)
2028{
2029 int ret;
2030 int i, n;
2031 struct reg_sequence *base;
2032 unsigned int this_page = 0;
2033 unsigned int page_change = 0;
2034 /*
2035 * the set of registers are not neccessarily in order, but
2036 * since the order of write must be preserved this algorithm
2037 * chops the set each time the page changes. This also applies
2038 * if there is a delay required at any point in the sequence.
2039 */
2040 base = regs;
2041 for (i = 0, n = 0; i < num_regs; i++, n++) {
2042 unsigned int reg = regs[i].reg;
2043 struct regmap_range_node *range;
2044
2045 range = _regmap_range_lookup(map, reg);
2046 if (range) {
2047 unsigned int win_page = _regmap_register_page(map, reg,
2048 range);
2049
2050 if (i == 0)
2051 this_page = win_page;
2052 if (win_page != this_page) {
2053 this_page = win_page;
2054 page_change = 1;
2055 }
2056 }
2057
2058 /* If we have both a page change and a delay make sure to
2059 * write the regs and apply the delay before we change the
2060 * page.
2061 */
2062
2063 if (page_change || regs[i].delay_us) {
2064
2065 /* For situations where the first write requires
2066 * a delay we need to make sure we don't call
2067 * raw_multi_reg_write with n=0
2068 * This can't occur with page breaks as we
2069 * never write on the first iteration
2070 */
2071 if (regs[i].delay_us && i == 0)
2072 n = 1;
2073
2074 ret = _regmap_raw_multi_reg_write(map, base, n);
2075 if (ret != 0)
2076 return ret;
2077
2078 if (regs[i].delay_us)
2079 udelay(regs[i].delay_us);
2080
2081 base += n;
2082 n = 0;
2083
2084 if (page_change) {
2085 ret = _regmap_select_page(map,
2086 &base[n].reg,
2087 range, 1);
2088 if (ret != 0)
2089 return ret;
2090
2091 page_change = 0;
2092 }
2093
2094 }
2095
2096 }
2097 if (n > 0)
2098 return _regmap_raw_multi_reg_write(map, base, n);
2099 return 0;
2100}
2101
2102static int _regmap_multi_reg_write(struct regmap *map,
2103 const struct reg_sequence *regs,
2104 size_t num_regs)
2105{
2106 int i;
2107 int ret;
2108
2109 if (!map->can_multi_write) {
2110 for (i = 0; i < num_regs; i++) {
2111 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2112 if (ret != 0)
2113 return ret;
2114
2115 if (regs[i].delay_us)
2116 udelay(regs[i].delay_us);
2117 }
2118 return 0;
2119 }
2120
2121 if (!map->format.parse_inplace)
2122 return -EINVAL;
2123
2124 if (map->writeable_reg)
2125 for (i = 0; i < num_regs; i++) {
2126 int reg = regs[i].reg;
2127 if (!map->writeable_reg(map->dev, reg))
2128 return -EINVAL;
2129 if (!IS_ALIGNED(reg, map->reg_stride))
2130 return -EINVAL;
2131 }
2132
2133 if (!map->cache_bypass) {
2134 for (i = 0; i < num_regs; i++) {
2135 unsigned int val = regs[i].def;
2136 unsigned int reg = regs[i].reg;
2137 ret = regcache_write(map, reg, val);
2138 if (ret) {
2139 dev_err(map->dev,
2140 "Error in caching of register: %x ret: %d\n",
2141 reg, ret);
2142 return ret;
2143 }
2144 }
2145 if (map->cache_only) {
2146 map->cache_dirty = true;
2147 return 0;
2148 }
2149 }
2150
2151 WARN_ON(!map->bus);
2152
2153 for (i = 0; i < num_regs; i++) {
2154 unsigned int reg = regs[i].reg;
2155 struct regmap_range_node *range;
2156
2157 /* Coalesce all the writes between a page break or a delay
2158 * in a sequence
2159 */
2160 range = _regmap_range_lookup(map, reg);
2161 if (range || regs[i].delay_us) {
2162 size_t len = sizeof(struct reg_sequence)*num_regs;
2163 struct reg_sequence *base = kmemdup(regs, len,
2164 GFP_KERNEL);
2165 if (!base)
2166 return -ENOMEM;
2167 ret = _regmap_range_multi_paged_reg_write(map, base,
2168 num_regs);
2169 kfree(base);
2170
2171 return ret;
2172 }
2173 }
2174 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2175}
2176
2177/*
2178 * regmap_multi_reg_write(): Write multiple registers to the device
2179 *
2180 * where the set of register,value pairs are supplied in any order,
2181 * possibly not all in a single range.
2182 *
2183 * @map: Register map to write to
2184 * @regs: Array of structures containing register,value to be written
2185 * @num_regs: Number of registers to write
2186 *
2187 * The 'normal' block write mode will send ultimately send data on the
2188 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2189 * addressed. However, this alternative block multi write mode will send
2190 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2191 * must of course support the mode.
2192 *
2193 * A value of zero will be returned on success, a negative errno will be
2194 * returned in error cases.
2195 */
2196int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2197 int num_regs)
2198{
2199 int ret;
2200
2201 map->lock(map->lock_arg);
2202
2203 ret = _regmap_multi_reg_write(map, regs, num_regs);
2204
2205 map->unlock(map->lock_arg);
2206
2207 return ret;
2208}
2209EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2210
2211/*
2212 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2213 * device but not the cache
2214 *
2215 * where the set of register are supplied in any order
2216 *
2217 * @map: Register map to write to
2218 * @regs: Array of structures containing register,value to be written
2219 * @num_regs: Number of registers to write
2220 *
2221 * This function is intended to be used for writing a large block of data
2222 * atomically to the device in single transfer for those I2C client devices
2223 * that implement this alternative block write mode.
2224 *
2225 * A value of zero will be returned on success, a negative errno will
2226 * be returned in error cases.
2227 */
2228int regmap_multi_reg_write_bypassed(struct regmap *map,
2229 const struct reg_sequence *regs,
2230 int num_regs)
2231{
2232 int ret;
2233 bool bypass;
2234
2235 map->lock(map->lock_arg);
2236
2237 bypass = map->cache_bypass;
2238 map->cache_bypass = true;
2239
2240 ret = _regmap_multi_reg_write(map, regs, num_regs);
2241
2242 map->cache_bypass = bypass;
2243
2244 map->unlock(map->lock_arg);
2245
2246 return ret;
2247}
2248EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2249
2250/**
2251 * regmap_raw_write_async(): Write raw values to one or more registers
2252 * asynchronously
2253 *
2254 * @map: Register map to write to
2255 * @reg: Initial register to write to
2256 * @val: Block of data to be written, laid out for direct transmission to the
2257 * device. Must be valid until regmap_async_complete() is called.
2258 * @val_len: Length of data pointed to by val.
2259 *
2260 * This function is intended to be used for things like firmware
2261 * download where a large block of data needs to be transferred to the
2262 * device. No formatting will be done on the data provided.
2263 *
2264 * If supported by the underlying bus the write will be scheduled
2265 * asynchronously, helping maximise I/O speed on higher speed buses
2266 * like SPI. regmap_async_complete() can be called to ensure that all
2267 * asynchrnous writes have been completed.
2268 *
2269 * A value of zero will be returned on success, a negative errno will
2270 * be returned in error cases.
2271 */
2272int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2273 const void *val, size_t val_len)
2274{
2275 int ret;
2276
2277 if (val_len % map->format.val_bytes)
2278 return -EINVAL;
2279 if (!IS_ALIGNED(reg, map->reg_stride))
2280 return -EINVAL;
2281
2282 map->lock(map->lock_arg);
2283
2284 map->async = true;
2285
2286 ret = _regmap_raw_write(map, reg, val, val_len);
2287
2288 map->async = false;
2289
2290 map->unlock(map->lock_arg);
2291
2292 return ret;
2293}
2294EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2295
2296static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2297 unsigned int val_len)
2298{
2299 struct regmap_range_node *range;
2300 int ret;
2301
2302 WARN_ON(!map->bus);
2303
2304 if (!map->bus || !map->bus->read)
2305 return -EINVAL;
2306
2307 range = _regmap_range_lookup(map, reg);
2308 if (range) {
2309 ret = _regmap_select_page(map, ®, range,
2310 val_len / map->format.val_bytes);
2311 if (ret != 0)
2312 return ret;
2313 }
2314
2315 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2316 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2317 map->read_flag_mask);
2318 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2319
2320 ret = map->bus->read(map->bus_context, map->work_buf,
2321 map->format.reg_bytes + map->format.pad_bytes,
2322 val, val_len);
2323
2324 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2325
2326 return ret;
2327}
2328
2329static int _regmap_bus_reg_read(void *context, unsigned int reg,
2330 unsigned int *val)
2331{
2332 struct regmap *map = context;
2333
2334 return map->bus->reg_read(map->bus_context, reg, val);
2335}
2336
2337static int _regmap_bus_read(void *context, unsigned int reg,
2338 unsigned int *val)
2339{
2340 int ret;
2341 struct regmap *map = context;
2342
2343 if (!map->format.parse_val)
2344 return -EINVAL;
2345
2346 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2347 if (ret == 0)
2348 *val = map->format.parse_val(map->work_buf);
2349
2350 return ret;
2351}
2352
2353static int _regmap_read(struct regmap *map, unsigned int reg,
2354 unsigned int *val)
2355{
2356 int ret;
2357 void *context = _regmap_map_get_context(map);
2358
2359 if (!map->cache_bypass) {
2360 ret = regcache_read(map, reg, val);
2361 if (ret == 0)
2362 return 0;
2363 }
2364
2365 if (map->cache_only)
2366 return -EBUSY;
2367
2368 if (!regmap_readable(map, reg))
2369 return -EIO;
2370
2371 ret = map->reg_read(context, reg, val);
2372 if (ret == 0) {
2373#ifdef LOG_DEVICE
2374 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2375 dev_info(map->dev, "%x => %x\n", reg, *val);
2376#endif
2377
2378 trace_regmap_reg_read(map, reg, *val);
2379
2380 if (!map->cache_bypass)
2381 regcache_write(map, reg, *val);
2382 }
2383
2384 return ret;
2385}
2386
2387/**
2388 * regmap_read(): Read a value from a single register
2389 *
2390 * @map: Register map to read from
2391 * @reg: Register to be read from
2392 * @val: Pointer to store read value
2393 *
2394 * A value of zero will be returned on success, a negative errno will
2395 * be returned in error cases.
2396 */
2397int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2398{
2399 int ret;
2400
2401 if (!IS_ALIGNED(reg, map->reg_stride))
2402 return -EINVAL;
2403
2404 map->lock(map->lock_arg);
2405
2406 ret = _regmap_read(map, reg, val);
2407
2408 map->unlock(map->lock_arg);
2409
2410 return ret;
2411}
2412EXPORT_SYMBOL_GPL(regmap_read);
2413
2414/**
2415 * regmap_raw_read(): Read raw data from the device
2416 *
2417 * @map: Register map to read from
2418 * @reg: First register to be read from
2419 * @val: Pointer to store read value
2420 * @val_len: Size of data to read
2421 *
2422 * A value of zero will be returned on success, a negative errno will
2423 * be returned in error cases.
2424 */
2425int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2426 size_t val_len)
2427{
2428 size_t val_bytes = map->format.val_bytes;
2429 size_t val_count = val_len / val_bytes;
2430 unsigned int v;
2431 int ret, i;
2432
2433 if (!map->bus)
2434 return -EINVAL;
2435 if (val_len % map->format.val_bytes)
2436 return -EINVAL;
2437 if (!IS_ALIGNED(reg, map->reg_stride))
2438 return -EINVAL;
2439 if (val_count == 0)
2440 return -EINVAL;
2441
2442 map->lock(map->lock_arg);
2443
2444 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2445 map->cache_type == REGCACHE_NONE) {
2446 if (!map->bus->read) {
2447 ret = -ENOTSUPP;
2448 goto out;
2449 }
2450 if (map->max_raw_read && map->max_raw_read < val_len) {
2451 ret = -E2BIG;
2452 goto out;
2453 }
2454
2455 /* Physical block read if there's no cache involved */
2456 ret = _regmap_raw_read(map, reg, val, val_len);
2457
2458 } else {
2459 /* Otherwise go word by word for the cache; should be low
2460 * cost as we expect to hit the cache.
2461 */
2462 for (i = 0; i < val_count; i++) {
2463 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2464 &v);
2465 if (ret != 0)
2466 goto out;
2467
2468 map->format.format_val(val + (i * val_bytes), v, 0);
2469 }
2470 }
2471
2472 out:
2473 map->unlock(map->lock_arg);
2474
2475 return ret;
2476}
2477EXPORT_SYMBOL_GPL(regmap_raw_read);
2478
2479/**
2480 * regmap_field_read(): Read a value to a single register field
2481 *
2482 * @field: Register field to read from
2483 * @val: Pointer to store read value
2484 *
2485 * A value of zero will be returned on success, a negative errno will
2486 * be returned in error cases.
2487 */
2488int regmap_field_read(struct regmap_field *field, unsigned int *val)
2489{
2490 int ret;
2491 unsigned int reg_val;
2492 ret = regmap_read(field->regmap, field->reg, ®_val);
2493 if (ret != 0)
2494 return ret;
2495
2496 reg_val &= field->mask;
2497 reg_val >>= field->shift;
2498 *val = reg_val;
2499
2500 return ret;
2501}
2502EXPORT_SYMBOL_GPL(regmap_field_read);
2503
2504/**
2505 * regmap_fields_read(): Read a value to a single register field with port ID
2506 *
2507 * @field: Register field to read from
2508 * @id: port ID
2509 * @val: Pointer to store read value
2510 *
2511 * A value of zero will be returned on success, a negative errno will
2512 * be returned in error cases.
2513 */
2514int regmap_fields_read(struct regmap_field *field, unsigned int id,
2515 unsigned int *val)
2516{
2517 int ret;
2518 unsigned int reg_val;
2519
2520 if (id >= field->id_size)
2521 return -EINVAL;
2522
2523 ret = regmap_read(field->regmap,
2524 field->reg + (field->id_offset * id),
2525 ®_val);
2526 if (ret != 0)
2527 return ret;
2528
2529 reg_val &= field->mask;
2530 reg_val >>= field->shift;
2531 *val = reg_val;
2532
2533 return ret;
2534}
2535EXPORT_SYMBOL_GPL(regmap_fields_read);
2536
2537/**
2538 * regmap_bulk_read(): Read multiple registers from the device
2539 *
2540 * @map: Register map to read from
2541 * @reg: First register to be read from
2542 * @val: Pointer to store read value, in native register size for device
2543 * @val_count: Number of registers to read
2544 *
2545 * A value of zero will be returned on success, a negative errno will
2546 * be returned in error cases.
2547 */
2548int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2549 size_t val_count)
2550{
2551 int ret, i;
2552 size_t val_bytes = map->format.val_bytes;
2553 bool vol = regmap_volatile_range(map, reg, val_count);
2554
2555 if (!IS_ALIGNED(reg, map->reg_stride))
2556 return -EINVAL;
2557
2558 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2559 /*
2560 * Some devices does not support bulk read, for
2561 * them we have a series of single read operations.
2562 */
2563 size_t total_size = val_bytes * val_count;
2564
2565 if (!map->use_single_read &&
2566 (!map->max_raw_read || map->max_raw_read > total_size)) {
2567 ret = regmap_raw_read(map, reg, val,
2568 val_bytes * val_count);
2569 if (ret != 0)
2570 return ret;
2571 } else {
2572 /*
2573 * Some devices do not support bulk read or do not
2574 * support large bulk reads, for them we have a series
2575 * of read operations.
2576 */
2577 int chunk_stride = map->reg_stride;
2578 size_t chunk_size = val_bytes;
2579 size_t chunk_count = val_count;
2580
2581 if (!map->use_single_read) {
2582 chunk_size = map->max_raw_read;
2583 if (chunk_size % val_bytes)
2584 chunk_size -= chunk_size % val_bytes;
2585 chunk_count = total_size / chunk_size;
2586 chunk_stride *= chunk_size / val_bytes;
2587 }
2588
2589 /* Read bytes that fit into a multiple of chunk_size */
2590 for (i = 0; i < chunk_count; i++) {
2591 ret = regmap_raw_read(map,
2592 reg + (i * chunk_stride),
2593 val + (i * chunk_size),
2594 chunk_size);
2595 if (ret != 0)
2596 return ret;
2597 }
2598
2599 /* Read remaining bytes */
2600 if (chunk_size * i < total_size) {
2601 ret = regmap_raw_read(map,
2602 reg + (i * chunk_stride),
2603 val + (i * chunk_size),
2604 total_size - i * chunk_size);
2605 if (ret != 0)
2606 return ret;
2607 }
2608 }
2609
2610 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2611 map->format.parse_inplace(val + i);
2612 } else {
2613 for (i = 0; i < val_count; i++) {
2614 unsigned int ival;
2615 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2616 &ival);
2617 if (ret != 0)
2618 return ret;
2619
2620 if (map->format.format_val) {
2621 map->format.format_val(val + (i * val_bytes), ival, 0);
2622 } else {
2623 /* Devices providing read and write
2624 * operations can use the bulk I/O
2625 * functions if they define a val_bytes,
2626 * we assume that the values are native
2627 * endian.
2628 */
2629#ifdef CONFIG_64BIT
2630 u64 *u64 = val;
2631#endif
2632 u32 *u32 = val;
2633 u16 *u16 = val;
2634 u8 *u8 = val;
2635
2636 switch (map->format.val_bytes) {
2637#ifdef CONFIG_64BIT
2638 case 8:
2639 u64[i] = ival;
2640 break;
2641#endif
2642 case 4:
2643 u32[i] = ival;
2644 break;
2645 case 2:
2646 u16[i] = ival;
2647 break;
2648 case 1:
2649 u8[i] = ival;
2650 break;
2651 default:
2652 return -EINVAL;
2653 }
2654 }
2655 }
2656 }
2657
2658 return 0;
2659}
2660EXPORT_SYMBOL_GPL(regmap_bulk_read);
2661
2662static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2663 unsigned int mask, unsigned int val,
2664 bool *change, bool force_write)
2665{
2666 int ret;
2667 unsigned int tmp, orig;
2668
2669 if (change)
2670 *change = false;
2671
2672 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2673 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2674 if (ret == 0 && change)
2675 *change = true;
2676 } else {
2677 ret = _regmap_read(map, reg, &orig);
2678 if (ret != 0)
2679 return ret;
2680
2681 tmp = orig & ~mask;
2682 tmp |= val & mask;
2683
2684 if (force_write || (tmp != orig)) {
2685 ret = _regmap_write(map, reg, tmp);
2686 if (ret == 0 && change)
2687 *change = true;
2688 }
2689 }
2690
2691 return ret;
2692}
2693
2694/**
2695 * regmap_update_bits_base:
2696 * Perform a read/modify/write cycle on the
2697 * register map with change, async, force option
2698 *
2699 * @map: Register map to update
2700 * @reg: Register to update
2701 * @mask: Bitmask to change
2702 * @val: New value for bitmask
2703 * @change: Boolean indicating if a write was done
2704 * @async: Boolean indicating asynchronously
2705 * @force: Boolean indicating use force update
2706 *
2707 * if async was true,
2708 * With most buses the read must be done synchronously so this is most
2709 * useful for devices with a cache which do not need to interact with
2710 * the hardware to determine the current register value.
2711 *
2712 * Returns zero for success, a negative number on error.
2713 */
2714int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2715 unsigned int mask, unsigned int val,
2716 bool *change, bool async, bool force)
2717{
2718 int ret;
2719
2720 map->lock(map->lock_arg);
2721
2722 map->async = async;
2723
2724 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2725
2726 map->async = false;
2727
2728 map->unlock(map->lock_arg);
2729
2730 return ret;
2731}
2732EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2733
2734void regmap_async_complete_cb(struct regmap_async *async, int ret)
2735{
2736 struct regmap *map = async->map;
2737 bool wake;
2738
2739 trace_regmap_async_io_complete(map);
2740
2741 spin_lock(&map->async_lock);
2742 list_move(&async->list, &map->async_free);
2743 wake = list_empty(&map->async_list);
2744
2745 if (ret != 0)
2746 map->async_ret = ret;
2747
2748 spin_unlock(&map->async_lock);
2749
2750 if (wake)
2751 wake_up(&map->async_waitq);
2752}
2753EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2754
2755static int regmap_async_is_done(struct regmap *map)
2756{
2757 unsigned long flags;
2758 int ret;
2759
2760 spin_lock_irqsave(&map->async_lock, flags);
2761 ret = list_empty(&map->async_list);
2762 spin_unlock_irqrestore(&map->async_lock, flags);
2763
2764 return ret;
2765}
2766
2767/**
2768 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2769 *
2770 * @map: Map to operate on.
2771 *
2772 * Blocks until any pending asynchronous I/O has completed. Returns
2773 * an error code for any failed I/O operations.
2774 */
2775int regmap_async_complete(struct regmap *map)
2776{
2777 unsigned long flags;
2778 int ret;
2779
2780 /* Nothing to do with no async support */
2781 if (!map->bus || !map->bus->async_write)
2782 return 0;
2783
2784 trace_regmap_async_complete_start(map);
2785
2786 wait_event(map->async_waitq, regmap_async_is_done(map));
2787
2788 spin_lock_irqsave(&map->async_lock, flags);
2789 ret = map->async_ret;
2790 map->async_ret = 0;
2791 spin_unlock_irqrestore(&map->async_lock, flags);
2792
2793 trace_regmap_async_complete_done(map);
2794
2795 return ret;
2796}
2797EXPORT_SYMBOL_GPL(regmap_async_complete);
2798
2799/**
2800 * regmap_register_patch: Register and apply register updates to be applied
2801 * on device initialistion
2802 *
2803 * @map: Register map to apply updates to.
2804 * @regs: Values to update.
2805 * @num_regs: Number of entries in regs.
2806 *
2807 * Register a set of register updates to be applied to the device
2808 * whenever the device registers are synchronised with the cache and
2809 * apply them immediately. Typically this is used to apply
2810 * corrections to be applied to the device defaults on startup, such
2811 * as the updates some vendors provide to undocumented registers.
2812 *
2813 * The caller must ensure that this function cannot be called
2814 * concurrently with either itself or regcache_sync().
2815 */
2816int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2817 int num_regs)
2818{
2819 struct reg_sequence *p;
2820 int ret;
2821 bool bypass;
2822
2823 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2824 num_regs))
2825 return 0;
2826
2827 p = krealloc(map->patch,
2828 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2829 GFP_KERNEL);
2830 if (p) {
2831 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2832 map->patch = p;
2833 map->patch_regs += num_regs;
2834 } else {
2835 return -ENOMEM;
2836 }
2837
2838 map->lock(map->lock_arg);
2839
2840 bypass = map->cache_bypass;
2841
2842 map->cache_bypass = true;
2843 map->async = true;
2844
2845 ret = _regmap_multi_reg_write(map, regs, num_regs);
2846
2847 map->async = false;
2848 map->cache_bypass = bypass;
2849
2850 map->unlock(map->lock_arg);
2851
2852 regmap_async_complete(map);
2853
2854 return ret;
2855}
2856EXPORT_SYMBOL_GPL(regmap_register_patch);
2857
2858/*
2859 * regmap_get_val_bytes(): Report the size of a register value
2860 *
2861 * Report the size of a register value, mainly intended to for use by
2862 * generic infrastructure built on top of regmap.
2863 */
2864int regmap_get_val_bytes(struct regmap *map)
2865{
2866 if (map->format.format_write)
2867 return -EINVAL;
2868
2869 return map->format.val_bytes;
2870}
2871EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2872
2873/**
2874 * regmap_get_max_register(): Report the max register value
2875 *
2876 * Report the max register value, mainly intended to for use by
2877 * generic infrastructure built on top of regmap.
2878 */
2879int regmap_get_max_register(struct regmap *map)
2880{
2881 return map->max_register ? map->max_register : -EINVAL;
2882}
2883EXPORT_SYMBOL_GPL(regmap_get_max_register);
2884
2885/**
2886 * regmap_get_reg_stride(): Report the register address stride
2887 *
2888 * Report the register address stride, mainly intended to for use by
2889 * generic infrastructure built on top of regmap.
2890 */
2891int regmap_get_reg_stride(struct regmap *map)
2892{
2893 return map->reg_stride;
2894}
2895EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2896
2897int regmap_parse_val(struct regmap *map, const void *buf,
2898 unsigned int *val)
2899{
2900 if (!map->format.parse_val)
2901 return -EINVAL;
2902
2903 *val = map->format.parse_val(buf);
2904
2905 return 0;
2906}
2907EXPORT_SYMBOL_GPL(regmap_parse_val);
2908
2909static int __init regmap_initcall(void)
2910{
2911 regmap_debugfs_initcall();
2912
2913 return 0;
2914}
2915postcore_initcall(regmap_initcall);