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1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/device.h>
14#include <linux/slab.h>
15#include <linux/export.h>
16#include <linux/mutex.h>
17#include <linux/err.h>
18#include <linux/of.h>
19#include <linux/rbtree.h>
20#include <linux/sched.h>
21#include <linux/delay.h>
22#include <linux/log2.h>
23
24#define CREATE_TRACE_POINTS
25#include "trace.h"
26
27#include "internal.h"
28
29/*
30 * Sometimes for failures during very early init the trace
31 * infrastructure isn't available early enough to be used. For this
32 * sort of problem defining LOG_DEVICE will add printks for basic
33 * register I/O on a specific device.
34 */
35#undef LOG_DEVICE
36
37static int _regmap_update_bits(struct regmap *map, unsigned int reg,
38 unsigned int mask, unsigned int val,
39 bool *change, bool force_write);
40
41static int _regmap_bus_reg_read(void *context, unsigned int reg,
42 unsigned int *val);
43static int _regmap_bus_read(void *context, unsigned int reg,
44 unsigned int *val);
45static int _regmap_bus_formatted_write(void *context, unsigned int reg,
46 unsigned int val);
47static int _regmap_bus_reg_write(void *context, unsigned int reg,
48 unsigned int val);
49static int _regmap_bus_raw_write(void *context, unsigned int reg,
50 unsigned int val);
51
52bool regmap_reg_in_ranges(unsigned int reg,
53 const struct regmap_range *ranges,
54 unsigned int nranges)
55{
56 const struct regmap_range *r;
57 int i;
58
59 for (i = 0, r = ranges; i < nranges; i++, r++)
60 if (regmap_reg_in_range(reg, r))
61 return true;
62 return false;
63}
64EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
65
66bool regmap_check_range_table(struct regmap *map, unsigned int reg,
67 const struct regmap_access_table *table)
68{
69 /* Check "no ranges" first */
70 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
71 return false;
72
73 /* In case zero "yes ranges" are supplied, any reg is OK */
74 if (!table->n_yes_ranges)
75 return true;
76
77 return regmap_reg_in_ranges(reg, table->yes_ranges,
78 table->n_yes_ranges);
79}
80EXPORT_SYMBOL_GPL(regmap_check_range_table);
81
82bool regmap_writeable(struct regmap *map, unsigned int reg)
83{
84 if (map->max_register && reg > map->max_register)
85 return false;
86
87 if (map->writeable_reg)
88 return map->writeable_reg(map->dev, reg);
89
90 if (map->wr_table)
91 return regmap_check_range_table(map, reg, map->wr_table);
92
93 return true;
94}
95
96bool regmap_readable(struct regmap *map, unsigned int reg)
97{
98 if (!map->reg_read)
99 return false;
100
101 if (map->max_register && reg > map->max_register)
102 return false;
103
104 if (map->format.format_write)
105 return false;
106
107 if (map->readable_reg)
108 return map->readable_reg(map->dev, reg);
109
110 if (map->rd_table)
111 return regmap_check_range_table(map, reg, map->rd_table);
112
113 return true;
114}
115
116bool regmap_volatile(struct regmap *map, unsigned int reg)
117{
118 if (!map->format.format_write && !regmap_readable(map, reg))
119 return false;
120
121 if (map->volatile_reg)
122 return map->volatile_reg(map->dev, reg);
123
124 if (map->volatile_table)
125 return regmap_check_range_table(map, reg, map->volatile_table);
126
127 if (map->cache_ops)
128 return false;
129 else
130 return true;
131}
132
133bool regmap_precious(struct regmap *map, unsigned int reg)
134{
135 if (!regmap_readable(map, reg))
136 return false;
137
138 if (map->precious_reg)
139 return map->precious_reg(map->dev, reg);
140
141 if (map->precious_table)
142 return regmap_check_range_table(map, reg, map->precious_table);
143
144 return false;
145}
146
147static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
148 size_t num)
149{
150 unsigned int i;
151
152 for (i = 0; i < num; i++)
153 if (!regmap_volatile(map, reg + i))
154 return false;
155
156 return true;
157}
158
159static void regmap_format_2_6_write(struct regmap *map,
160 unsigned int reg, unsigned int val)
161{
162 u8 *out = map->work_buf;
163
164 *out = (reg << 6) | val;
165}
166
167static void regmap_format_4_12_write(struct regmap *map,
168 unsigned int reg, unsigned int val)
169{
170 __be16 *out = map->work_buf;
171 *out = cpu_to_be16((reg << 12) | val);
172}
173
174static void regmap_format_7_9_write(struct regmap *map,
175 unsigned int reg, unsigned int val)
176{
177 __be16 *out = map->work_buf;
178 *out = cpu_to_be16((reg << 9) | val);
179}
180
181static void regmap_format_10_14_write(struct regmap *map,
182 unsigned int reg, unsigned int val)
183{
184 u8 *out = map->work_buf;
185
186 out[2] = val;
187 out[1] = (val >> 8) | (reg << 6);
188 out[0] = reg >> 2;
189}
190
191static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
192{
193 u8 *b = buf;
194
195 b[0] = val << shift;
196}
197
198static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
199{
200 __be16 *b = buf;
201
202 b[0] = cpu_to_be16(val << shift);
203}
204
205static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
206{
207 __le16 *b = buf;
208
209 b[0] = cpu_to_le16(val << shift);
210}
211
212static void regmap_format_16_native(void *buf, unsigned int val,
213 unsigned int shift)
214{
215 *(u16 *)buf = val << shift;
216}
217
218static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
219{
220 u8 *b = buf;
221
222 val <<= shift;
223
224 b[0] = val >> 16;
225 b[1] = val >> 8;
226 b[2] = val;
227}
228
229static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
230{
231 __be32 *b = buf;
232
233 b[0] = cpu_to_be32(val << shift);
234}
235
236static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
237{
238 __le32 *b = buf;
239
240 b[0] = cpu_to_le32(val << shift);
241}
242
243static void regmap_format_32_native(void *buf, unsigned int val,
244 unsigned int shift)
245{
246 *(u32 *)buf = val << shift;
247}
248
249#ifdef CONFIG_64BIT
250static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
251{
252 __be64 *b = buf;
253
254 b[0] = cpu_to_be64((u64)val << shift);
255}
256
257static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
258{
259 __le64 *b = buf;
260
261 b[0] = cpu_to_le64((u64)val << shift);
262}
263
264static void regmap_format_64_native(void *buf, unsigned int val,
265 unsigned int shift)
266{
267 *(u64 *)buf = (u64)val << shift;
268}
269#endif
270
271static void regmap_parse_inplace_noop(void *buf)
272{
273}
274
275static unsigned int regmap_parse_8(const void *buf)
276{
277 const u8 *b = buf;
278
279 return b[0];
280}
281
282static unsigned int regmap_parse_16_be(const void *buf)
283{
284 const __be16 *b = buf;
285
286 return be16_to_cpu(b[0]);
287}
288
289static unsigned int regmap_parse_16_le(const void *buf)
290{
291 const __le16 *b = buf;
292
293 return le16_to_cpu(b[0]);
294}
295
296static void regmap_parse_16_be_inplace(void *buf)
297{
298 __be16 *b = buf;
299
300 b[0] = be16_to_cpu(b[0]);
301}
302
303static void regmap_parse_16_le_inplace(void *buf)
304{
305 __le16 *b = buf;
306
307 b[0] = le16_to_cpu(b[0]);
308}
309
310static unsigned int regmap_parse_16_native(const void *buf)
311{
312 return *(u16 *)buf;
313}
314
315static unsigned int regmap_parse_24(const void *buf)
316{
317 const u8 *b = buf;
318 unsigned int ret = b[2];
319 ret |= ((unsigned int)b[1]) << 8;
320 ret |= ((unsigned int)b[0]) << 16;
321
322 return ret;
323}
324
325static unsigned int regmap_parse_32_be(const void *buf)
326{
327 const __be32 *b = buf;
328
329 return be32_to_cpu(b[0]);
330}
331
332static unsigned int regmap_parse_32_le(const void *buf)
333{
334 const __le32 *b = buf;
335
336 return le32_to_cpu(b[0]);
337}
338
339static void regmap_parse_32_be_inplace(void *buf)
340{
341 __be32 *b = buf;
342
343 b[0] = be32_to_cpu(b[0]);
344}
345
346static void regmap_parse_32_le_inplace(void *buf)
347{
348 __le32 *b = buf;
349
350 b[0] = le32_to_cpu(b[0]);
351}
352
353static unsigned int regmap_parse_32_native(const void *buf)
354{
355 return *(u32 *)buf;
356}
357
358#ifdef CONFIG_64BIT
359static unsigned int regmap_parse_64_be(const void *buf)
360{
361 const __be64 *b = buf;
362
363 return be64_to_cpu(b[0]);
364}
365
366static unsigned int regmap_parse_64_le(const void *buf)
367{
368 const __le64 *b = buf;
369
370 return le64_to_cpu(b[0]);
371}
372
373static void regmap_parse_64_be_inplace(void *buf)
374{
375 __be64 *b = buf;
376
377 b[0] = be64_to_cpu(b[0]);
378}
379
380static void regmap_parse_64_le_inplace(void *buf)
381{
382 __le64 *b = buf;
383
384 b[0] = le64_to_cpu(b[0]);
385}
386
387static unsigned int regmap_parse_64_native(const void *buf)
388{
389 return *(u64 *)buf;
390}
391#endif
392
393static void regmap_lock_mutex(void *__map)
394{
395 struct regmap *map = __map;
396 mutex_lock(&map->mutex);
397}
398
399static void regmap_unlock_mutex(void *__map)
400{
401 struct regmap *map = __map;
402 mutex_unlock(&map->mutex);
403}
404
405static void regmap_lock_spinlock(void *__map)
406__acquires(&map->spinlock)
407{
408 struct regmap *map = __map;
409 unsigned long flags;
410
411 spin_lock_irqsave(&map->spinlock, flags);
412 map->spinlock_flags = flags;
413}
414
415static void regmap_unlock_spinlock(void *__map)
416__releases(&map->spinlock)
417{
418 struct regmap *map = __map;
419 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
420}
421
422static void dev_get_regmap_release(struct device *dev, void *res)
423{
424 /*
425 * We don't actually have anything to do here; the goal here
426 * is not to manage the regmap but to provide a simple way to
427 * get the regmap back given a struct device.
428 */
429}
430
431static bool _regmap_range_add(struct regmap *map,
432 struct regmap_range_node *data)
433{
434 struct rb_root *root = &map->range_tree;
435 struct rb_node **new = &(root->rb_node), *parent = NULL;
436
437 while (*new) {
438 struct regmap_range_node *this =
439 container_of(*new, struct regmap_range_node, node);
440
441 parent = *new;
442 if (data->range_max < this->range_min)
443 new = &((*new)->rb_left);
444 else if (data->range_min > this->range_max)
445 new = &((*new)->rb_right);
446 else
447 return false;
448 }
449
450 rb_link_node(&data->node, parent, new);
451 rb_insert_color(&data->node, root);
452
453 return true;
454}
455
456static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
457 unsigned int reg)
458{
459 struct rb_node *node = map->range_tree.rb_node;
460
461 while (node) {
462 struct regmap_range_node *this =
463 container_of(node, struct regmap_range_node, node);
464
465 if (reg < this->range_min)
466 node = node->rb_left;
467 else if (reg > this->range_max)
468 node = node->rb_right;
469 else
470 return this;
471 }
472
473 return NULL;
474}
475
476static void regmap_range_exit(struct regmap *map)
477{
478 struct rb_node *next;
479 struct regmap_range_node *range_node;
480
481 next = rb_first(&map->range_tree);
482 while (next) {
483 range_node = rb_entry(next, struct regmap_range_node, node);
484 next = rb_next(&range_node->node);
485 rb_erase(&range_node->node, &map->range_tree);
486 kfree(range_node);
487 }
488
489 kfree(map->selector_work_buf);
490}
491
492int regmap_attach_dev(struct device *dev, struct regmap *map,
493 const struct regmap_config *config)
494{
495 struct regmap **m;
496
497 map->dev = dev;
498
499 regmap_debugfs_init(map, config->name);
500
501 /* Add a devres resource for dev_get_regmap() */
502 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
503 if (!m) {
504 regmap_debugfs_exit(map);
505 return -ENOMEM;
506 }
507 *m = map;
508 devres_add(dev, m);
509
510 return 0;
511}
512EXPORT_SYMBOL_GPL(regmap_attach_dev);
513
514static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
515 const struct regmap_config *config)
516{
517 enum regmap_endian endian;
518
519 /* Retrieve the endianness specification from the regmap config */
520 endian = config->reg_format_endian;
521
522 /* If the regmap config specified a non-default value, use that */
523 if (endian != REGMAP_ENDIAN_DEFAULT)
524 return endian;
525
526 /* Retrieve the endianness specification from the bus config */
527 if (bus && bus->reg_format_endian_default)
528 endian = bus->reg_format_endian_default;
529
530 /* If the bus specified a non-default value, use that */
531 if (endian != REGMAP_ENDIAN_DEFAULT)
532 return endian;
533
534 /* Use this if no other value was found */
535 return REGMAP_ENDIAN_BIG;
536}
537
538enum regmap_endian regmap_get_val_endian(struct device *dev,
539 const struct regmap_bus *bus,
540 const struct regmap_config *config)
541{
542 struct device_node *np;
543 enum regmap_endian endian;
544
545 /* Retrieve the endianness specification from the regmap config */
546 endian = config->val_format_endian;
547
548 /* If the regmap config specified a non-default value, use that */
549 if (endian != REGMAP_ENDIAN_DEFAULT)
550 return endian;
551
552 /* If the dev and dev->of_node exist try to get endianness from DT */
553 if (dev && dev->of_node) {
554 np = dev->of_node;
555
556 /* Parse the device's DT node for an endianness specification */
557 if (of_property_read_bool(np, "big-endian"))
558 endian = REGMAP_ENDIAN_BIG;
559 else if (of_property_read_bool(np, "little-endian"))
560 endian = REGMAP_ENDIAN_LITTLE;
561 else if (of_property_read_bool(np, "native-endian"))
562 endian = REGMAP_ENDIAN_NATIVE;
563
564 /* If the endianness was specified in DT, use that */
565 if (endian != REGMAP_ENDIAN_DEFAULT)
566 return endian;
567 }
568
569 /* Retrieve the endianness specification from the bus config */
570 if (bus && bus->val_format_endian_default)
571 endian = bus->val_format_endian_default;
572
573 /* If the bus specified a non-default value, use that */
574 if (endian != REGMAP_ENDIAN_DEFAULT)
575 return endian;
576
577 /* Use this if no other value was found */
578 return REGMAP_ENDIAN_BIG;
579}
580EXPORT_SYMBOL_GPL(regmap_get_val_endian);
581
582struct regmap *__regmap_init(struct device *dev,
583 const struct regmap_bus *bus,
584 void *bus_context,
585 const struct regmap_config *config,
586 struct lock_class_key *lock_key,
587 const char *lock_name)
588{
589 struct regmap *map;
590 int ret = -EINVAL;
591 enum regmap_endian reg_endian, val_endian;
592 int i, j;
593
594 if (!config)
595 goto err;
596
597 map = kzalloc(sizeof(*map), GFP_KERNEL);
598 if (map == NULL) {
599 ret = -ENOMEM;
600 goto err;
601 }
602
603 if (config->lock && config->unlock) {
604 map->lock = config->lock;
605 map->unlock = config->unlock;
606 map->lock_arg = config->lock_arg;
607 } else {
608 if ((bus && bus->fast_io) ||
609 config->fast_io) {
610 spin_lock_init(&map->spinlock);
611 map->lock = regmap_lock_spinlock;
612 map->unlock = regmap_unlock_spinlock;
613 lockdep_set_class_and_name(&map->spinlock,
614 lock_key, lock_name);
615 } else {
616 mutex_init(&map->mutex);
617 map->lock = regmap_lock_mutex;
618 map->unlock = regmap_unlock_mutex;
619 lockdep_set_class_and_name(&map->mutex,
620 lock_key, lock_name);
621 }
622 map->lock_arg = map;
623 }
624
625 /*
626 * When we write in fast-paths with regmap_bulk_write() don't allocate
627 * scratch buffers with sleeping allocations.
628 */
629 if ((bus && bus->fast_io) || config->fast_io)
630 map->alloc_flags = GFP_ATOMIC;
631 else
632 map->alloc_flags = GFP_KERNEL;
633
634 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
635 map->format.pad_bytes = config->pad_bits / 8;
636 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
637 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
638 config->val_bits + config->pad_bits, 8);
639 map->reg_shift = config->pad_bits % 8;
640 if (config->reg_stride)
641 map->reg_stride = config->reg_stride;
642 else
643 map->reg_stride = 1;
644 if (is_power_of_2(map->reg_stride))
645 map->reg_stride_order = ilog2(map->reg_stride);
646 else
647 map->reg_stride_order = -1;
648 map->use_single_read = config->use_single_rw || !bus || !bus->read;
649 map->use_single_write = config->use_single_rw || !bus || !bus->write;
650 map->can_multi_write = config->can_multi_write && bus && bus->write;
651 if (bus) {
652 map->max_raw_read = bus->max_raw_read;
653 map->max_raw_write = bus->max_raw_write;
654 }
655 map->dev = dev;
656 map->bus = bus;
657 map->bus_context = bus_context;
658 map->max_register = config->max_register;
659 map->wr_table = config->wr_table;
660 map->rd_table = config->rd_table;
661 map->volatile_table = config->volatile_table;
662 map->precious_table = config->precious_table;
663 map->writeable_reg = config->writeable_reg;
664 map->readable_reg = config->readable_reg;
665 map->volatile_reg = config->volatile_reg;
666 map->precious_reg = config->precious_reg;
667 map->cache_type = config->cache_type;
668 map->name = config->name;
669
670 spin_lock_init(&map->async_lock);
671 INIT_LIST_HEAD(&map->async_list);
672 INIT_LIST_HEAD(&map->async_free);
673 init_waitqueue_head(&map->async_waitq);
674
675 if (config->read_flag_mask || config->write_flag_mask) {
676 map->read_flag_mask = config->read_flag_mask;
677 map->write_flag_mask = config->write_flag_mask;
678 } else if (bus) {
679 map->read_flag_mask = bus->read_flag_mask;
680 }
681
682 if (!bus) {
683 map->reg_read = config->reg_read;
684 map->reg_write = config->reg_write;
685
686 map->defer_caching = false;
687 goto skip_format_initialization;
688 } else if (!bus->read || !bus->write) {
689 map->reg_read = _regmap_bus_reg_read;
690 map->reg_write = _regmap_bus_reg_write;
691
692 map->defer_caching = false;
693 goto skip_format_initialization;
694 } else {
695 map->reg_read = _regmap_bus_read;
696 map->reg_update_bits = bus->reg_update_bits;
697 }
698
699 reg_endian = regmap_get_reg_endian(bus, config);
700 val_endian = regmap_get_val_endian(dev, bus, config);
701
702 switch (config->reg_bits + map->reg_shift) {
703 case 2:
704 switch (config->val_bits) {
705 case 6:
706 map->format.format_write = regmap_format_2_6_write;
707 break;
708 default:
709 goto err_map;
710 }
711 break;
712
713 case 4:
714 switch (config->val_bits) {
715 case 12:
716 map->format.format_write = regmap_format_4_12_write;
717 break;
718 default:
719 goto err_map;
720 }
721 break;
722
723 case 7:
724 switch (config->val_bits) {
725 case 9:
726 map->format.format_write = regmap_format_7_9_write;
727 break;
728 default:
729 goto err_map;
730 }
731 break;
732
733 case 10:
734 switch (config->val_bits) {
735 case 14:
736 map->format.format_write = regmap_format_10_14_write;
737 break;
738 default:
739 goto err_map;
740 }
741 break;
742
743 case 8:
744 map->format.format_reg = regmap_format_8;
745 break;
746
747 case 16:
748 switch (reg_endian) {
749 case REGMAP_ENDIAN_BIG:
750 map->format.format_reg = regmap_format_16_be;
751 break;
752 case REGMAP_ENDIAN_NATIVE:
753 map->format.format_reg = regmap_format_16_native;
754 break;
755 default:
756 goto err_map;
757 }
758 break;
759
760 case 24:
761 if (reg_endian != REGMAP_ENDIAN_BIG)
762 goto err_map;
763 map->format.format_reg = regmap_format_24;
764 break;
765
766 case 32:
767 switch (reg_endian) {
768 case REGMAP_ENDIAN_BIG:
769 map->format.format_reg = regmap_format_32_be;
770 break;
771 case REGMAP_ENDIAN_NATIVE:
772 map->format.format_reg = regmap_format_32_native;
773 break;
774 default:
775 goto err_map;
776 }
777 break;
778
779#ifdef CONFIG_64BIT
780 case 64:
781 switch (reg_endian) {
782 case REGMAP_ENDIAN_BIG:
783 map->format.format_reg = regmap_format_64_be;
784 break;
785 case REGMAP_ENDIAN_NATIVE:
786 map->format.format_reg = regmap_format_64_native;
787 break;
788 default:
789 goto err_map;
790 }
791 break;
792#endif
793
794 default:
795 goto err_map;
796 }
797
798 if (val_endian == REGMAP_ENDIAN_NATIVE)
799 map->format.parse_inplace = regmap_parse_inplace_noop;
800
801 switch (config->val_bits) {
802 case 8:
803 map->format.format_val = regmap_format_8;
804 map->format.parse_val = regmap_parse_8;
805 map->format.parse_inplace = regmap_parse_inplace_noop;
806 break;
807 case 16:
808 switch (val_endian) {
809 case REGMAP_ENDIAN_BIG:
810 map->format.format_val = regmap_format_16_be;
811 map->format.parse_val = regmap_parse_16_be;
812 map->format.parse_inplace = regmap_parse_16_be_inplace;
813 break;
814 case REGMAP_ENDIAN_LITTLE:
815 map->format.format_val = regmap_format_16_le;
816 map->format.parse_val = regmap_parse_16_le;
817 map->format.parse_inplace = regmap_parse_16_le_inplace;
818 break;
819 case REGMAP_ENDIAN_NATIVE:
820 map->format.format_val = regmap_format_16_native;
821 map->format.parse_val = regmap_parse_16_native;
822 break;
823 default:
824 goto err_map;
825 }
826 break;
827 case 24:
828 if (val_endian != REGMAP_ENDIAN_BIG)
829 goto err_map;
830 map->format.format_val = regmap_format_24;
831 map->format.parse_val = regmap_parse_24;
832 break;
833 case 32:
834 switch (val_endian) {
835 case REGMAP_ENDIAN_BIG:
836 map->format.format_val = regmap_format_32_be;
837 map->format.parse_val = regmap_parse_32_be;
838 map->format.parse_inplace = regmap_parse_32_be_inplace;
839 break;
840 case REGMAP_ENDIAN_LITTLE:
841 map->format.format_val = regmap_format_32_le;
842 map->format.parse_val = regmap_parse_32_le;
843 map->format.parse_inplace = regmap_parse_32_le_inplace;
844 break;
845 case REGMAP_ENDIAN_NATIVE:
846 map->format.format_val = regmap_format_32_native;
847 map->format.parse_val = regmap_parse_32_native;
848 break;
849 default:
850 goto err_map;
851 }
852 break;
853#ifdef CONFIG_64BIT
854 case 64:
855 switch (val_endian) {
856 case REGMAP_ENDIAN_BIG:
857 map->format.format_val = regmap_format_64_be;
858 map->format.parse_val = regmap_parse_64_be;
859 map->format.parse_inplace = regmap_parse_64_be_inplace;
860 break;
861 case REGMAP_ENDIAN_LITTLE:
862 map->format.format_val = regmap_format_64_le;
863 map->format.parse_val = regmap_parse_64_le;
864 map->format.parse_inplace = regmap_parse_64_le_inplace;
865 break;
866 case REGMAP_ENDIAN_NATIVE:
867 map->format.format_val = regmap_format_64_native;
868 map->format.parse_val = regmap_parse_64_native;
869 break;
870 default:
871 goto err_map;
872 }
873 break;
874#endif
875 }
876
877 if (map->format.format_write) {
878 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
879 (val_endian != REGMAP_ENDIAN_BIG))
880 goto err_map;
881 map->use_single_write = true;
882 }
883
884 if (!map->format.format_write &&
885 !(map->format.format_reg && map->format.format_val))
886 goto err_map;
887
888 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
889 if (map->work_buf == NULL) {
890 ret = -ENOMEM;
891 goto err_map;
892 }
893
894 if (map->format.format_write) {
895 map->defer_caching = false;
896 map->reg_write = _regmap_bus_formatted_write;
897 } else if (map->format.format_val) {
898 map->defer_caching = true;
899 map->reg_write = _regmap_bus_raw_write;
900 }
901
902skip_format_initialization:
903
904 map->range_tree = RB_ROOT;
905 for (i = 0; i < config->num_ranges; i++) {
906 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
907 struct regmap_range_node *new;
908
909 /* Sanity check */
910 if (range_cfg->range_max < range_cfg->range_min) {
911 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
912 range_cfg->range_max, range_cfg->range_min);
913 goto err_range;
914 }
915
916 if (range_cfg->range_max > map->max_register) {
917 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
918 range_cfg->range_max, map->max_register);
919 goto err_range;
920 }
921
922 if (range_cfg->selector_reg > map->max_register) {
923 dev_err(map->dev,
924 "Invalid range %d: selector out of map\n", i);
925 goto err_range;
926 }
927
928 if (range_cfg->window_len == 0) {
929 dev_err(map->dev, "Invalid range %d: window_len 0\n",
930 i);
931 goto err_range;
932 }
933
934 /* Make sure, that this register range has no selector
935 or data window within its boundary */
936 for (j = 0; j < config->num_ranges; j++) {
937 unsigned sel_reg = config->ranges[j].selector_reg;
938 unsigned win_min = config->ranges[j].window_start;
939 unsigned win_max = win_min +
940 config->ranges[j].window_len - 1;
941
942 /* Allow data window inside its own virtual range */
943 if (j == i)
944 continue;
945
946 if (range_cfg->range_min <= sel_reg &&
947 sel_reg <= range_cfg->range_max) {
948 dev_err(map->dev,
949 "Range %d: selector for %d in window\n",
950 i, j);
951 goto err_range;
952 }
953
954 if (!(win_max < range_cfg->range_min ||
955 win_min > range_cfg->range_max)) {
956 dev_err(map->dev,
957 "Range %d: window for %d in window\n",
958 i, j);
959 goto err_range;
960 }
961 }
962
963 new = kzalloc(sizeof(*new), GFP_KERNEL);
964 if (new == NULL) {
965 ret = -ENOMEM;
966 goto err_range;
967 }
968
969 new->map = map;
970 new->name = range_cfg->name;
971 new->range_min = range_cfg->range_min;
972 new->range_max = range_cfg->range_max;
973 new->selector_reg = range_cfg->selector_reg;
974 new->selector_mask = range_cfg->selector_mask;
975 new->selector_shift = range_cfg->selector_shift;
976 new->window_start = range_cfg->window_start;
977 new->window_len = range_cfg->window_len;
978
979 if (!_regmap_range_add(map, new)) {
980 dev_err(map->dev, "Failed to add range %d\n", i);
981 kfree(new);
982 goto err_range;
983 }
984
985 if (map->selector_work_buf == NULL) {
986 map->selector_work_buf =
987 kzalloc(map->format.buf_size, GFP_KERNEL);
988 if (map->selector_work_buf == NULL) {
989 ret = -ENOMEM;
990 goto err_range;
991 }
992 }
993 }
994
995 ret = regcache_init(map, config);
996 if (ret != 0)
997 goto err_range;
998
999 if (dev) {
1000 ret = regmap_attach_dev(dev, map, config);
1001 if (ret != 0)
1002 goto err_regcache;
1003 }
1004
1005 return map;
1006
1007err_regcache:
1008 regcache_exit(map);
1009err_range:
1010 regmap_range_exit(map);
1011 kfree(map->work_buf);
1012err_map:
1013 kfree(map);
1014err:
1015 return ERR_PTR(ret);
1016}
1017EXPORT_SYMBOL_GPL(__regmap_init);
1018
1019static void devm_regmap_release(struct device *dev, void *res)
1020{
1021 regmap_exit(*(struct regmap **)res);
1022}
1023
1024struct regmap *__devm_regmap_init(struct device *dev,
1025 const struct regmap_bus *bus,
1026 void *bus_context,
1027 const struct regmap_config *config,
1028 struct lock_class_key *lock_key,
1029 const char *lock_name)
1030{
1031 struct regmap **ptr, *regmap;
1032
1033 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1034 if (!ptr)
1035 return ERR_PTR(-ENOMEM);
1036
1037 regmap = __regmap_init(dev, bus, bus_context, config,
1038 lock_key, lock_name);
1039 if (!IS_ERR(regmap)) {
1040 *ptr = regmap;
1041 devres_add(dev, ptr);
1042 } else {
1043 devres_free(ptr);
1044 }
1045
1046 return regmap;
1047}
1048EXPORT_SYMBOL_GPL(__devm_regmap_init);
1049
1050static void regmap_field_init(struct regmap_field *rm_field,
1051 struct regmap *regmap, struct reg_field reg_field)
1052{
1053 rm_field->regmap = regmap;
1054 rm_field->reg = reg_field.reg;
1055 rm_field->shift = reg_field.lsb;
1056 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1057 rm_field->id_size = reg_field.id_size;
1058 rm_field->id_offset = reg_field.id_offset;
1059}
1060
1061/**
1062 * devm_regmap_field_alloc(): Allocate and initialise a register field
1063 * in a register map.
1064 *
1065 * @dev: Device that will be interacted with
1066 * @regmap: regmap bank in which this register field is located.
1067 * @reg_field: Register field with in the bank.
1068 *
1069 * The return value will be an ERR_PTR() on error or a valid pointer
1070 * to a struct regmap_field. The regmap_field will be automatically freed
1071 * by the device management code.
1072 */
1073struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1074 struct regmap *regmap, struct reg_field reg_field)
1075{
1076 struct regmap_field *rm_field = devm_kzalloc(dev,
1077 sizeof(*rm_field), GFP_KERNEL);
1078 if (!rm_field)
1079 return ERR_PTR(-ENOMEM);
1080
1081 regmap_field_init(rm_field, regmap, reg_field);
1082
1083 return rm_field;
1084
1085}
1086EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1087
1088/**
1089 * devm_regmap_field_free(): Free register field allocated using
1090 * devm_regmap_field_alloc. Usally drivers need not call this function,
1091 * as the memory allocated via devm will be freed as per device-driver
1092 * life-cyle.
1093 *
1094 * @dev: Device that will be interacted with
1095 * @field: regmap field which should be freed.
1096 */
1097void devm_regmap_field_free(struct device *dev,
1098 struct regmap_field *field)
1099{
1100 devm_kfree(dev, field);
1101}
1102EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1103
1104/**
1105 * regmap_field_alloc(): Allocate and initialise a register field
1106 * in a register map.
1107 *
1108 * @regmap: regmap bank in which this register field is located.
1109 * @reg_field: Register field with in the bank.
1110 *
1111 * The return value will be an ERR_PTR() on error or a valid pointer
1112 * to a struct regmap_field. The regmap_field should be freed by the
1113 * user once its finished working with it using regmap_field_free().
1114 */
1115struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1116 struct reg_field reg_field)
1117{
1118 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1119
1120 if (!rm_field)
1121 return ERR_PTR(-ENOMEM);
1122
1123 regmap_field_init(rm_field, regmap, reg_field);
1124
1125 return rm_field;
1126}
1127EXPORT_SYMBOL_GPL(regmap_field_alloc);
1128
1129/**
1130 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1131 *
1132 * @field: regmap field which should be freed.
1133 */
1134void regmap_field_free(struct regmap_field *field)
1135{
1136 kfree(field);
1137}
1138EXPORT_SYMBOL_GPL(regmap_field_free);
1139
1140/**
1141 * regmap_reinit_cache(): Reinitialise the current register cache
1142 *
1143 * @map: Register map to operate on.
1144 * @config: New configuration. Only the cache data will be used.
1145 *
1146 * Discard any existing register cache for the map and initialize a
1147 * new cache. This can be used to restore the cache to defaults or to
1148 * update the cache configuration to reflect runtime discovery of the
1149 * hardware.
1150 *
1151 * No explicit locking is done here, the user needs to ensure that
1152 * this function will not race with other calls to regmap.
1153 */
1154int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1155{
1156 regcache_exit(map);
1157 regmap_debugfs_exit(map);
1158
1159 map->max_register = config->max_register;
1160 map->writeable_reg = config->writeable_reg;
1161 map->readable_reg = config->readable_reg;
1162 map->volatile_reg = config->volatile_reg;
1163 map->precious_reg = config->precious_reg;
1164 map->cache_type = config->cache_type;
1165
1166 regmap_debugfs_init(map, config->name);
1167
1168 map->cache_bypass = false;
1169 map->cache_only = false;
1170
1171 return regcache_init(map, config);
1172}
1173EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1174
1175/**
1176 * regmap_exit(): Free a previously allocated register map
1177 */
1178void regmap_exit(struct regmap *map)
1179{
1180 struct regmap_async *async;
1181
1182 regcache_exit(map);
1183 regmap_debugfs_exit(map);
1184 regmap_range_exit(map);
1185 if (map->bus && map->bus->free_context)
1186 map->bus->free_context(map->bus_context);
1187 kfree(map->work_buf);
1188 while (!list_empty(&map->async_free)) {
1189 async = list_first_entry_or_null(&map->async_free,
1190 struct regmap_async,
1191 list);
1192 list_del(&async->list);
1193 kfree(async->work_buf);
1194 kfree(async);
1195 }
1196 kfree(map);
1197}
1198EXPORT_SYMBOL_GPL(regmap_exit);
1199
1200static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1201{
1202 struct regmap **r = res;
1203 if (!r || !*r) {
1204 WARN_ON(!r || !*r);
1205 return 0;
1206 }
1207
1208 /* If the user didn't specify a name match any */
1209 if (data)
1210 return (*r)->name == data;
1211 else
1212 return 1;
1213}
1214
1215/**
1216 * dev_get_regmap(): Obtain the regmap (if any) for a device
1217 *
1218 * @dev: Device to retrieve the map for
1219 * @name: Optional name for the register map, usually NULL.
1220 *
1221 * Returns the regmap for the device if one is present, or NULL. If
1222 * name is specified then it must match the name specified when
1223 * registering the device, if it is NULL then the first regmap found
1224 * will be used. Devices with multiple register maps are very rare,
1225 * generic code should normally not need to specify a name.
1226 */
1227struct regmap *dev_get_regmap(struct device *dev, const char *name)
1228{
1229 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1230 dev_get_regmap_match, (void *)name);
1231
1232 if (!r)
1233 return NULL;
1234 return *r;
1235}
1236EXPORT_SYMBOL_GPL(dev_get_regmap);
1237
1238/**
1239 * regmap_get_device(): Obtain the device from a regmap
1240 *
1241 * @map: Register map to operate on.
1242 *
1243 * Returns the underlying device that the regmap has been created for.
1244 */
1245struct device *regmap_get_device(struct regmap *map)
1246{
1247 return map->dev;
1248}
1249EXPORT_SYMBOL_GPL(regmap_get_device);
1250
1251static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1252 struct regmap_range_node *range,
1253 unsigned int val_num)
1254{
1255 void *orig_work_buf;
1256 unsigned int win_offset;
1257 unsigned int win_page;
1258 bool page_chg;
1259 int ret;
1260
1261 win_offset = (*reg - range->range_min) % range->window_len;
1262 win_page = (*reg - range->range_min) / range->window_len;
1263
1264 if (val_num > 1) {
1265 /* Bulk write shouldn't cross range boundary */
1266 if (*reg + val_num - 1 > range->range_max)
1267 return -EINVAL;
1268
1269 /* ... or single page boundary */
1270 if (val_num > range->window_len - win_offset)
1271 return -EINVAL;
1272 }
1273
1274 /* It is possible to have selector register inside data window.
1275 In that case, selector register is located on every page and
1276 it needs no page switching, when accessed alone. */
1277 if (val_num > 1 ||
1278 range->window_start + win_offset != range->selector_reg) {
1279 /* Use separate work_buf during page switching */
1280 orig_work_buf = map->work_buf;
1281 map->work_buf = map->selector_work_buf;
1282
1283 ret = _regmap_update_bits(map, range->selector_reg,
1284 range->selector_mask,
1285 win_page << range->selector_shift,
1286 &page_chg, false);
1287
1288 map->work_buf = orig_work_buf;
1289
1290 if (ret != 0)
1291 return ret;
1292 }
1293
1294 *reg = range->window_start + win_offset;
1295
1296 return 0;
1297}
1298
1299int _regmap_raw_write(struct regmap *map, unsigned int reg,
1300 const void *val, size_t val_len)
1301{
1302 struct regmap_range_node *range;
1303 unsigned long flags;
1304 u8 *u8 = map->work_buf;
1305 void *work_val = map->work_buf + map->format.reg_bytes +
1306 map->format.pad_bytes;
1307 void *buf;
1308 int ret = -ENOTSUPP;
1309 size_t len;
1310 int i;
1311
1312 WARN_ON(!map->bus);
1313
1314 /* Check for unwritable registers before we start */
1315 if (map->writeable_reg)
1316 for (i = 0; i < val_len / map->format.val_bytes; i++)
1317 if (!map->writeable_reg(map->dev,
1318 reg + regmap_get_offset(map, i)))
1319 return -EINVAL;
1320
1321 if (!map->cache_bypass && map->format.parse_val) {
1322 unsigned int ival;
1323 int val_bytes = map->format.val_bytes;
1324 for (i = 0; i < val_len / val_bytes; i++) {
1325 ival = map->format.parse_val(val + (i * val_bytes));
1326 ret = regcache_write(map,
1327 reg + regmap_get_offset(map, i),
1328 ival);
1329 if (ret) {
1330 dev_err(map->dev,
1331 "Error in caching of register: %x ret: %d\n",
1332 reg + i, ret);
1333 return ret;
1334 }
1335 }
1336 if (map->cache_only) {
1337 map->cache_dirty = true;
1338 return 0;
1339 }
1340 }
1341
1342 range = _regmap_range_lookup(map, reg);
1343 if (range) {
1344 int val_num = val_len / map->format.val_bytes;
1345 int win_offset = (reg - range->range_min) % range->window_len;
1346 int win_residue = range->window_len - win_offset;
1347
1348 /* If the write goes beyond the end of the window split it */
1349 while (val_num > win_residue) {
1350 dev_dbg(map->dev, "Writing window %d/%zu\n",
1351 win_residue, val_len / map->format.val_bytes);
1352 ret = _regmap_raw_write(map, reg, val, win_residue *
1353 map->format.val_bytes);
1354 if (ret != 0)
1355 return ret;
1356
1357 reg += win_residue;
1358 val_num -= win_residue;
1359 val += win_residue * map->format.val_bytes;
1360 val_len -= win_residue * map->format.val_bytes;
1361
1362 win_offset = (reg - range->range_min) %
1363 range->window_len;
1364 win_residue = range->window_len - win_offset;
1365 }
1366
1367 ret = _regmap_select_page(map, ®, range, val_num);
1368 if (ret != 0)
1369 return ret;
1370 }
1371
1372 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1373
1374 u8[0] |= map->write_flag_mask;
1375
1376 /*
1377 * Essentially all I/O mechanisms will be faster with a single
1378 * buffer to write. Since register syncs often generate raw
1379 * writes of single registers optimise that case.
1380 */
1381 if (val != work_val && val_len == map->format.val_bytes) {
1382 memcpy(work_val, val, map->format.val_bytes);
1383 val = work_val;
1384 }
1385
1386 if (map->async && map->bus->async_write) {
1387 struct regmap_async *async;
1388
1389 trace_regmap_async_write_start(map, reg, val_len);
1390
1391 spin_lock_irqsave(&map->async_lock, flags);
1392 async = list_first_entry_or_null(&map->async_free,
1393 struct regmap_async,
1394 list);
1395 if (async)
1396 list_del(&async->list);
1397 spin_unlock_irqrestore(&map->async_lock, flags);
1398
1399 if (!async) {
1400 async = map->bus->async_alloc();
1401 if (!async)
1402 return -ENOMEM;
1403
1404 async->work_buf = kzalloc(map->format.buf_size,
1405 GFP_KERNEL | GFP_DMA);
1406 if (!async->work_buf) {
1407 kfree(async);
1408 return -ENOMEM;
1409 }
1410 }
1411
1412 async->map = map;
1413
1414 /* If the caller supplied the value we can use it safely. */
1415 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1416 map->format.reg_bytes + map->format.val_bytes);
1417
1418 spin_lock_irqsave(&map->async_lock, flags);
1419 list_add_tail(&async->list, &map->async_list);
1420 spin_unlock_irqrestore(&map->async_lock, flags);
1421
1422 if (val != work_val)
1423 ret = map->bus->async_write(map->bus_context,
1424 async->work_buf,
1425 map->format.reg_bytes +
1426 map->format.pad_bytes,
1427 val, val_len, async);
1428 else
1429 ret = map->bus->async_write(map->bus_context,
1430 async->work_buf,
1431 map->format.reg_bytes +
1432 map->format.pad_bytes +
1433 val_len, NULL, 0, async);
1434
1435 if (ret != 0) {
1436 dev_err(map->dev, "Failed to schedule write: %d\n",
1437 ret);
1438
1439 spin_lock_irqsave(&map->async_lock, flags);
1440 list_move(&async->list, &map->async_free);
1441 spin_unlock_irqrestore(&map->async_lock, flags);
1442 }
1443
1444 return ret;
1445 }
1446
1447 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1448
1449 /* If we're doing a single register write we can probably just
1450 * send the work_buf directly, otherwise try to do a gather
1451 * write.
1452 */
1453 if (val == work_val)
1454 ret = map->bus->write(map->bus_context, map->work_buf,
1455 map->format.reg_bytes +
1456 map->format.pad_bytes +
1457 val_len);
1458 else if (map->bus->gather_write)
1459 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1460 map->format.reg_bytes +
1461 map->format.pad_bytes,
1462 val, val_len);
1463
1464 /* If that didn't work fall back on linearising by hand. */
1465 if (ret == -ENOTSUPP) {
1466 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1467 buf = kzalloc(len, GFP_KERNEL);
1468 if (!buf)
1469 return -ENOMEM;
1470
1471 memcpy(buf, map->work_buf, map->format.reg_bytes);
1472 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1473 val, val_len);
1474 ret = map->bus->write(map->bus_context, buf, len);
1475
1476 kfree(buf);
1477 }
1478
1479 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1480
1481 return ret;
1482}
1483
1484/**
1485 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1486 *
1487 * @map: Map to check.
1488 */
1489bool regmap_can_raw_write(struct regmap *map)
1490{
1491 return map->bus && map->bus->write && map->format.format_val &&
1492 map->format.format_reg;
1493}
1494EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1495
1496/**
1497 * regmap_get_raw_read_max - Get the maximum size we can read
1498 *
1499 * @map: Map to check.
1500 */
1501size_t regmap_get_raw_read_max(struct regmap *map)
1502{
1503 return map->max_raw_read;
1504}
1505EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1506
1507/**
1508 * regmap_get_raw_write_max - Get the maximum size we can read
1509 *
1510 * @map: Map to check.
1511 */
1512size_t regmap_get_raw_write_max(struct regmap *map)
1513{
1514 return map->max_raw_write;
1515}
1516EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1517
1518static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1519 unsigned int val)
1520{
1521 int ret;
1522 struct regmap_range_node *range;
1523 struct regmap *map = context;
1524
1525 WARN_ON(!map->bus || !map->format.format_write);
1526
1527 range = _regmap_range_lookup(map, reg);
1528 if (range) {
1529 ret = _regmap_select_page(map, ®, range, 1);
1530 if (ret != 0)
1531 return ret;
1532 }
1533
1534 map->format.format_write(map, reg, val);
1535
1536 trace_regmap_hw_write_start(map, reg, 1);
1537
1538 ret = map->bus->write(map->bus_context, map->work_buf,
1539 map->format.buf_size);
1540
1541 trace_regmap_hw_write_done(map, reg, 1);
1542
1543 return ret;
1544}
1545
1546static int _regmap_bus_reg_write(void *context, unsigned int reg,
1547 unsigned int val)
1548{
1549 struct regmap *map = context;
1550
1551 return map->bus->reg_write(map->bus_context, reg, val);
1552}
1553
1554static int _regmap_bus_raw_write(void *context, unsigned int reg,
1555 unsigned int val)
1556{
1557 struct regmap *map = context;
1558
1559 WARN_ON(!map->bus || !map->format.format_val);
1560
1561 map->format.format_val(map->work_buf + map->format.reg_bytes
1562 + map->format.pad_bytes, val, 0);
1563 return _regmap_raw_write(map, reg,
1564 map->work_buf +
1565 map->format.reg_bytes +
1566 map->format.pad_bytes,
1567 map->format.val_bytes);
1568}
1569
1570static inline void *_regmap_map_get_context(struct regmap *map)
1571{
1572 return (map->bus) ? map : map->bus_context;
1573}
1574
1575int _regmap_write(struct regmap *map, unsigned int reg,
1576 unsigned int val)
1577{
1578 int ret;
1579 void *context = _regmap_map_get_context(map);
1580
1581 if (!regmap_writeable(map, reg))
1582 return -EIO;
1583
1584 if (!map->cache_bypass && !map->defer_caching) {
1585 ret = regcache_write(map, reg, val);
1586 if (ret != 0)
1587 return ret;
1588 if (map->cache_only) {
1589 map->cache_dirty = true;
1590 return 0;
1591 }
1592 }
1593
1594#ifdef LOG_DEVICE
1595 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1596 dev_info(map->dev, "%x <= %x\n", reg, val);
1597#endif
1598
1599 trace_regmap_reg_write(map, reg, val);
1600
1601 return map->reg_write(context, reg, val);
1602}
1603
1604/**
1605 * regmap_write(): Write a value to a single register
1606 *
1607 * @map: Register map to write to
1608 * @reg: Register to write to
1609 * @val: Value to be written
1610 *
1611 * A value of zero will be returned on success, a negative errno will
1612 * be returned in error cases.
1613 */
1614int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1615{
1616 int ret;
1617
1618 if (!IS_ALIGNED(reg, map->reg_stride))
1619 return -EINVAL;
1620
1621 map->lock(map->lock_arg);
1622
1623 ret = _regmap_write(map, reg, val);
1624
1625 map->unlock(map->lock_arg);
1626
1627 return ret;
1628}
1629EXPORT_SYMBOL_GPL(regmap_write);
1630
1631/**
1632 * regmap_write_async(): Write a value to a single register asynchronously
1633 *
1634 * @map: Register map to write to
1635 * @reg: Register to write to
1636 * @val: Value to be written
1637 *
1638 * A value of zero will be returned on success, a negative errno will
1639 * be returned in error cases.
1640 */
1641int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1642{
1643 int ret;
1644
1645 if (!IS_ALIGNED(reg, map->reg_stride))
1646 return -EINVAL;
1647
1648 map->lock(map->lock_arg);
1649
1650 map->async = true;
1651
1652 ret = _regmap_write(map, reg, val);
1653
1654 map->async = false;
1655
1656 map->unlock(map->lock_arg);
1657
1658 return ret;
1659}
1660EXPORT_SYMBOL_GPL(regmap_write_async);
1661
1662/**
1663 * regmap_raw_write(): Write raw values to one or more registers
1664 *
1665 * @map: Register map to write to
1666 * @reg: Initial register to write to
1667 * @val: Block of data to be written, laid out for direct transmission to the
1668 * device
1669 * @val_len: Length of data pointed to by val.
1670 *
1671 * This function is intended to be used for things like firmware
1672 * download where a large block of data needs to be transferred to the
1673 * device. No formatting will be done on the data provided.
1674 *
1675 * A value of zero will be returned on success, a negative errno will
1676 * be returned in error cases.
1677 */
1678int regmap_raw_write(struct regmap *map, unsigned int reg,
1679 const void *val, size_t val_len)
1680{
1681 int ret;
1682
1683 if (!regmap_can_raw_write(map))
1684 return -EINVAL;
1685 if (val_len % map->format.val_bytes)
1686 return -EINVAL;
1687 if (map->max_raw_write && map->max_raw_write > val_len)
1688 return -E2BIG;
1689
1690 map->lock(map->lock_arg);
1691
1692 ret = _regmap_raw_write(map, reg, val, val_len);
1693
1694 map->unlock(map->lock_arg);
1695
1696 return ret;
1697}
1698EXPORT_SYMBOL_GPL(regmap_raw_write);
1699
1700/**
1701 * regmap_field_update_bits_base():
1702 * Perform a read/modify/write cycle on the register field
1703 * with change, async, force option
1704 *
1705 * @field: Register field to write to
1706 * @mask: Bitmask to change
1707 * @val: Value to be written
1708 * @change: Boolean indicating if a write was done
1709 * @async: Boolean indicating asynchronously
1710 * @force: Boolean indicating use force update
1711 *
1712 * A value of zero will be returned on success, a negative errno will
1713 * be returned in error cases.
1714 */
1715int regmap_field_update_bits_base(struct regmap_field *field,
1716 unsigned int mask, unsigned int val,
1717 bool *change, bool async, bool force)
1718{
1719 mask = (mask << field->shift) & field->mask;
1720
1721 return regmap_update_bits_base(field->regmap, field->reg,
1722 mask, val << field->shift,
1723 change, async, force);
1724}
1725EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
1726
1727/**
1728 * regmap_fields_update_bits_base():
1729 * Perform a read/modify/write cycle on the register field
1730 * with change, async, force option
1731 *
1732 * @field: Register field to write to
1733 * @id: port ID
1734 * @mask: Bitmask to change
1735 * @val: Value to be written
1736 * @change: Boolean indicating if a write was done
1737 * @async: Boolean indicating asynchronously
1738 * @force: Boolean indicating use force update
1739 *
1740 * A value of zero will be returned on success, a negative errno will
1741 * be returned in error cases.
1742 */
1743int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
1744 unsigned int mask, unsigned int val,
1745 bool *change, bool async, bool force)
1746{
1747 if (id >= field->id_size)
1748 return -EINVAL;
1749
1750 mask = (mask << field->shift) & field->mask;
1751
1752 return regmap_update_bits_base(field->regmap,
1753 field->reg + (field->id_offset * id),
1754 mask, val << field->shift,
1755 change, async, force);
1756}
1757EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
1758
1759/*
1760 * regmap_bulk_write(): Write multiple registers to the device
1761 *
1762 * @map: Register map to write to
1763 * @reg: First register to be write from
1764 * @val: Block of data to be written, in native register size for device
1765 * @val_count: Number of registers to write
1766 *
1767 * This function is intended to be used for writing a large block of
1768 * data to the device either in single transfer or multiple transfer.
1769 *
1770 * A value of zero will be returned on success, a negative errno will
1771 * be returned in error cases.
1772 */
1773int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1774 size_t val_count)
1775{
1776 int ret = 0, i;
1777 size_t val_bytes = map->format.val_bytes;
1778 size_t total_size = val_bytes * val_count;
1779
1780 if (map->bus && !map->format.parse_inplace)
1781 return -EINVAL;
1782 if (!IS_ALIGNED(reg, map->reg_stride))
1783 return -EINVAL;
1784
1785 /*
1786 * Some devices don't support bulk write, for
1787 * them we have a series of single write operations in the first two if
1788 * blocks.
1789 *
1790 * The first if block is used for memory mapped io. It does not allow
1791 * val_bytes of 3 for example.
1792 * The second one is used for busses which do not have this limitation
1793 * and can write arbitrary value lengths.
1794 */
1795 if (!map->bus) {
1796 map->lock(map->lock_arg);
1797 for (i = 0; i < val_count; i++) {
1798 unsigned int ival;
1799
1800 switch (val_bytes) {
1801 case 1:
1802 ival = *(u8 *)(val + (i * val_bytes));
1803 break;
1804 case 2:
1805 ival = *(u16 *)(val + (i * val_bytes));
1806 break;
1807 case 4:
1808 ival = *(u32 *)(val + (i * val_bytes));
1809 break;
1810#ifdef CONFIG_64BIT
1811 case 8:
1812 ival = *(u64 *)(val + (i * val_bytes));
1813 break;
1814#endif
1815 default:
1816 ret = -EINVAL;
1817 goto out;
1818 }
1819
1820 ret = _regmap_write(map,
1821 reg + regmap_get_offset(map, i),
1822 ival);
1823 if (ret != 0)
1824 goto out;
1825 }
1826out:
1827 map->unlock(map->lock_arg);
1828 } else if (map->use_single_write ||
1829 (map->max_raw_write && map->max_raw_write < total_size)) {
1830 int chunk_stride = map->reg_stride;
1831 size_t chunk_size = val_bytes;
1832 size_t chunk_count = val_count;
1833
1834 if (!map->use_single_write) {
1835 chunk_size = map->max_raw_write;
1836 if (chunk_size % val_bytes)
1837 chunk_size -= chunk_size % val_bytes;
1838 chunk_count = total_size / chunk_size;
1839 chunk_stride *= chunk_size / val_bytes;
1840 }
1841
1842 map->lock(map->lock_arg);
1843 /* Write as many bytes as possible with chunk_size */
1844 for (i = 0; i < chunk_count; i++) {
1845 ret = _regmap_raw_write(map,
1846 reg + (i * chunk_stride),
1847 val + (i * chunk_size),
1848 chunk_size);
1849 if (ret)
1850 break;
1851 }
1852
1853 /* Write remaining bytes */
1854 if (!ret && chunk_size * i < total_size) {
1855 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1856 val + (i * chunk_size),
1857 total_size - i * chunk_size);
1858 }
1859 map->unlock(map->lock_arg);
1860 } else {
1861 void *wval;
1862
1863 if (!val_count)
1864 return -EINVAL;
1865
1866 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
1867 if (!wval) {
1868 dev_err(map->dev, "Error in memory allocation\n");
1869 return -ENOMEM;
1870 }
1871 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1872 map->format.parse_inplace(wval + i);
1873
1874 map->lock(map->lock_arg);
1875 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1876 map->unlock(map->lock_arg);
1877
1878 kfree(wval);
1879 }
1880 return ret;
1881}
1882EXPORT_SYMBOL_GPL(regmap_bulk_write);
1883
1884/*
1885 * _regmap_raw_multi_reg_write()
1886 *
1887 * the (register,newvalue) pairs in regs have not been formatted, but
1888 * they are all in the same page and have been changed to being page
1889 * relative. The page register has been written if that was necessary.
1890 */
1891static int _regmap_raw_multi_reg_write(struct regmap *map,
1892 const struct reg_sequence *regs,
1893 size_t num_regs)
1894{
1895 int ret;
1896 void *buf;
1897 int i;
1898 u8 *u8;
1899 size_t val_bytes = map->format.val_bytes;
1900 size_t reg_bytes = map->format.reg_bytes;
1901 size_t pad_bytes = map->format.pad_bytes;
1902 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1903 size_t len = pair_size * num_regs;
1904
1905 if (!len)
1906 return -EINVAL;
1907
1908 buf = kzalloc(len, GFP_KERNEL);
1909 if (!buf)
1910 return -ENOMEM;
1911
1912 /* We have to linearise by hand. */
1913
1914 u8 = buf;
1915
1916 for (i = 0; i < num_regs; i++) {
1917 unsigned int reg = regs[i].reg;
1918 unsigned int val = regs[i].def;
1919 trace_regmap_hw_write_start(map, reg, 1);
1920 map->format.format_reg(u8, reg, map->reg_shift);
1921 u8 += reg_bytes + pad_bytes;
1922 map->format.format_val(u8, val, 0);
1923 u8 += val_bytes;
1924 }
1925 u8 = buf;
1926 *u8 |= map->write_flag_mask;
1927
1928 ret = map->bus->write(map->bus_context, buf, len);
1929
1930 kfree(buf);
1931
1932 for (i = 0; i < num_regs; i++) {
1933 int reg = regs[i].reg;
1934 trace_regmap_hw_write_done(map, reg, 1);
1935 }
1936 return ret;
1937}
1938
1939static unsigned int _regmap_register_page(struct regmap *map,
1940 unsigned int reg,
1941 struct regmap_range_node *range)
1942{
1943 unsigned int win_page = (reg - range->range_min) / range->window_len;
1944
1945 return win_page;
1946}
1947
1948static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1949 struct reg_sequence *regs,
1950 size_t num_regs)
1951{
1952 int ret;
1953 int i, n;
1954 struct reg_sequence *base;
1955 unsigned int this_page = 0;
1956 unsigned int page_change = 0;
1957 /*
1958 * the set of registers are not neccessarily in order, but
1959 * since the order of write must be preserved this algorithm
1960 * chops the set each time the page changes. This also applies
1961 * if there is a delay required at any point in the sequence.
1962 */
1963 base = regs;
1964 for (i = 0, n = 0; i < num_regs; i++, n++) {
1965 unsigned int reg = regs[i].reg;
1966 struct regmap_range_node *range;
1967
1968 range = _regmap_range_lookup(map, reg);
1969 if (range) {
1970 unsigned int win_page = _regmap_register_page(map, reg,
1971 range);
1972
1973 if (i == 0)
1974 this_page = win_page;
1975 if (win_page != this_page) {
1976 this_page = win_page;
1977 page_change = 1;
1978 }
1979 }
1980
1981 /* If we have both a page change and a delay make sure to
1982 * write the regs and apply the delay before we change the
1983 * page.
1984 */
1985
1986 if (page_change || regs[i].delay_us) {
1987
1988 /* For situations where the first write requires
1989 * a delay we need to make sure we don't call
1990 * raw_multi_reg_write with n=0
1991 * This can't occur with page breaks as we
1992 * never write on the first iteration
1993 */
1994 if (regs[i].delay_us && i == 0)
1995 n = 1;
1996
1997 ret = _regmap_raw_multi_reg_write(map, base, n);
1998 if (ret != 0)
1999 return ret;
2000
2001 if (regs[i].delay_us)
2002 udelay(regs[i].delay_us);
2003
2004 base += n;
2005 n = 0;
2006
2007 if (page_change) {
2008 ret = _regmap_select_page(map,
2009 &base[n].reg,
2010 range, 1);
2011 if (ret != 0)
2012 return ret;
2013
2014 page_change = 0;
2015 }
2016
2017 }
2018
2019 }
2020 if (n > 0)
2021 return _regmap_raw_multi_reg_write(map, base, n);
2022 return 0;
2023}
2024
2025static int _regmap_multi_reg_write(struct regmap *map,
2026 const struct reg_sequence *regs,
2027 size_t num_regs)
2028{
2029 int i;
2030 int ret;
2031
2032 if (!map->can_multi_write) {
2033 for (i = 0; i < num_regs; i++) {
2034 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2035 if (ret != 0)
2036 return ret;
2037
2038 if (regs[i].delay_us)
2039 udelay(regs[i].delay_us);
2040 }
2041 return 0;
2042 }
2043
2044 if (!map->format.parse_inplace)
2045 return -EINVAL;
2046
2047 if (map->writeable_reg)
2048 for (i = 0; i < num_regs; i++) {
2049 int reg = regs[i].reg;
2050 if (!map->writeable_reg(map->dev, reg))
2051 return -EINVAL;
2052 if (!IS_ALIGNED(reg, map->reg_stride))
2053 return -EINVAL;
2054 }
2055
2056 if (!map->cache_bypass) {
2057 for (i = 0; i < num_regs; i++) {
2058 unsigned int val = regs[i].def;
2059 unsigned int reg = regs[i].reg;
2060 ret = regcache_write(map, reg, val);
2061 if (ret) {
2062 dev_err(map->dev,
2063 "Error in caching of register: %x ret: %d\n",
2064 reg, ret);
2065 return ret;
2066 }
2067 }
2068 if (map->cache_only) {
2069 map->cache_dirty = true;
2070 return 0;
2071 }
2072 }
2073
2074 WARN_ON(!map->bus);
2075
2076 for (i = 0; i < num_regs; i++) {
2077 unsigned int reg = regs[i].reg;
2078 struct regmap_range_node *range;
2079
2080 /* Coalesce all the writes between a page break or a delay
2081 * in a sequence
2082 */
2083 range = _regmap_range_lookup(map, reg);
2084 if (range || regs[i].delay_us) {
2085 size_t len = sizeof(struct reg_sequence)*num_regs;
2086 struct reg_sequence *base = kmemdup(regs, len,
2087 GFP_KERNEL);
2088 if (!base)
2089 return -ENOMEM;
2090 ret = _regmap_range_multi_paged_reg_write(map, base,
2091 num_regs);
2092 kfree(base);
2093
2094 return ret;
2095 }
2096 }
2097 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2098}
2099
2100/*
2101 * regmap_multi_reg_write(): Write multiple registers to the device
2102 *
2103 * where the set of register,value pairs are supplied in any order,
2104 * possibly not all in a single range.
2105 *
2106 * @map: Register map to write to
2107 * @regs: Array of structures containing register,value to be written
2108 * @num_regs: Number of registers to write
2109 *
2110 * The 'normal' block write mode will send ultimately send data on the
2111 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2112 * addressed. However, this alternative block multi write mode will send
2113 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2114 * must of course support the mode.
2115 *
2116 * A value of zero will be returned on success, a negative errno will be
2117 * returned in error cases.
2118 */
2119int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2120 int num_regs)
2121{
2122 int ret;
2123
2124 map->lock(map->lock_arg);
2125
2126 ret = _regmap_multi_reg_write(map, regs, num_regs);
2127
2128 map->unlock(map->lock_arg);
2129
2130 return ret;
2131}
2132EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2133
2134/*
2135 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2136 * device but not the cache
2137 *
2138 * where the set of register are supplied in any order
2139 *
2140 * @map: Register map to write to
2141 * @regs: Array of structures containing register,value to be written
2142 * @num_regs: Number of registers to write
2143 *
2144 * This function is intended to be used for writing a large block of data
2145 * atomically to the device in single transfer for those I2C client devices
2146 * that implement this alternative block write mode.
2147 *
2148 * A value of zero will be returned on success, a negative errno will
2149 * be returned in error cases.
2150 */
2151int regmap_multi_reg_write_bypassed(struct regmap *map,
2152 const struct reg_sequence *regs,
2153 int num_regs)
2154{
2155 int ret;
2156 bool bypass;
2157
2158 map->lock(map->lock_arg);
2159
2160 bypass = map->cache_bypass;
2161 map->cache_bypass = true;
2162
2163 ret = _regmap_multi_reg_write(map, regs, num_regs);
2164
2165 map->cache_bypass = bypass;
2166
2167 map->unlock(map->lock_arg);
2168
2169 return ret;
2170}
2171EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2172
2173/**
2174 * regmap_raw_write_async(): Write raw values to one or more registers
2175 * asynchronously
2176 *
2177 * @map: Register map to write to
2178 * @reg: Initial register to write to
2179 * @val: Block of data to be written, laid out for direct transmission to the
2180 * device. Must be valid until regmap_async_complete() is called.
2181 * @val_len: Length of data pointed to by val.
2182 *
2183 * This function is intended to be used for things like firmware
2184 * download where a large block of data needs to be transferred to the
2185 * device. No formatting will be done on the data provided.
2186 *
2187 * If supported by the underlying bus the write will be scheduled
2188 * asynchronously, helping maximise I/O speed on higher speed buses
2189 * like SPI. regmap_async_complete() can be called to ensure that all
2190 * asynchrnous writes have been completed.
2191 *
2192 * A value of zero will be returned on success, a negative errno will
2193 * be returned in error cases.
2194 */
2195int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2196 const void *val, size_t val_len)
2197{
2198 int ret;
2199
2200 if (val_len % map->format.val_bytes)
2201 return -EINVAL;
2202 if (!IS_ALIGNED(reg, map->reg_stride))
2203 return -EINVAL;
2204
2205 map->lock(map->lock_arg);
2206
2207 map->async = true;
2208
2209 ret = _regmap_raw_write(map, reg, val, val_len);
2210
2211 map->async = false;
2212
2213 map->unlock(map->lock_arg);
2214
2215 return ret;
2216}
2217EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2218
2219static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2220 unsigned int val_len)
2221{
2222 struct regmap_range_node *range;
2223 u8 *u8 = map->work_buf;
2224 int ret;
2225
2226 WARN_ON(!map->bus);
2227
2228 if (!map->bus || !map->bus->read)
2229 return -EINVAL;
2230
2231 range = _regmap_range_lookup(map, reg);
2232 if (range) {
2233 ret = _regmap_select_page(map, ®, range,
2234 val_len / map->format.val_bytes);
2235 if (ret != 0)
2236 return ret;
2237 }
2238
2239 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2240
2241 /*
2242 * Some buses or devices flag reads by setting the high bits in the
2243 * register address; since it's always the high bits for all
2244 * current formats we can do this here rather than in
2245 * formatting. This may break if we get interesting formats.
2246 */
2247 u8[0] |= map->read_flag_mask;
2248
2249 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2250
2251 ret = map->bus->read(map->bus_context, map->work_buf,
2252 map->format.reg_bytes + map->format.pad_bytes,
2253 val, val_len);
2254
2255 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2256
2257 return ret;
2258}
2259
2260static int _regmap_bus_reg_read(void *context, unsigned int reg,
2261 unsigned int *val)
2262{
2263 struct regmap *map = context;
2264
2265 return map->bus->reg_read(map->bus_context, reg, val);
2266}
2267
2268static int _regmap_bus_read(void *context, unsigned int reg,
2269 unsigned int *val)
2270{
2271 int ret;
2272 struct regmap *map = context;
2273
2274 if (!map->format.parse_val)
2275 return -EINVAL;
2276
2277 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2278 if (ret == 0)
2279 *val = map->format.parse_val(map->work_buf);
2280
2281 return ret;
2282}
2283
2284static int _regmap_read(struct regmap *map, unsigned int reg,
2285 unsigned int *val)
2286{
2287 int ret;
2288 void *context = _regmap_map_get_context(map);
2289
2290 if (!map->cache_bypass) {
2291 ret = regcache_read(map, reg, val);
2292 if (ret == 0)
2293 return 0;
2294 }
2295
2296 if (map->cache_only)
2297 return -EBUSY;
2298
2299 if (!regmap_readable(map, reg))
2300 return -EIO;
2301
2302 ret = map->reg_read(context, reg, val);
2303 if (ret == 0) {
2304#ifdef LOG_DEVICE
2305 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
2306 dev_info(map->dev, "%x => %x\n", reg, *val);
2307#endif
2308
2309 trace_regmap_reg_read(map, reg, *val);
2310
2311 if (!map->cache_bypass)
2312 regcache_write(map, reg, *val);
2313 }
2314
2315 return ret;
2316}
2317
2318/**
2319 * regmap_read(): Read a value from a single register
2320 *
2321 * @map: Register map to read from
2322 * @reg: Register to be read from
2323 * @val: Pointer to store read value
2324 *
2325 * A value of zero will be returned on success, a negative errno will
2326 * be returned in error cases.
2327 */
2328int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2329{
2330 int ret;
2331
2332 if (!IS_ALIGNED(reg, map->reg_stride))
2333 return -EINVAL;
2334
2335 map->lock(map->lock_arg);
2336
2337 ret = _regmap_read(map, reg, val);
2338
2339 map->unlock(map->lock_arg);
2340
2341 return ret;
2342}
2343EXPORT_SYMBOL_GPL(regmap_read);
2344
2345/**
2346 * regmap_raw_read(): Read raw data from the device
2347 *
2348 * @map: Register map to read from
2349 * @reg: First register to be read from
2350 * @val: Pointer to store read value
2351 * @val_len: Size of data to read
2352 *
2353 * A value of zero will be returned on success, a negative errno will
2354 * be returned in error cases.
2355 */
2356int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2357 size_t val_len)
2358{
2359 size_t val_bytes = map->format.val_bytes;
2360 size_t val_count = val_len / val_bytes;
2361 unsigned int v;
2362 int ret, i;
2363
2364 if (!map->bus)
2365 return -EINVAL;
2366 if (val_len % map->format.val_bytes)
2367 return -EINVAL;
2368 if (!IS_ALIGNED(reg, map->reg_stride))
2369 return -EINVAL;
2370 if (val_count == 0)
2371 return -EINVAL;
2372
2373 map->lock(map->lock_arg);
2374
2375 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2376 map->cache_type == REGCACHE_NONE) {
2377 if (!map->bus->read) {
2378 ret = -ENOTSUPP;
2379 goto out;
2380 }
2381 if (map->max_raw_read && map->max_raw_read < val_len) {
2382 ret = -E2BIG;
2383 goto out;
2384 }
2385
2386 /* Physical block read if there's no cache involved */
2387 ret = _regmap_raw_read(map, reg, val, val_len);
2388
2389 } else {
2390 /* Otherwise go word by word for the cache; should be low
2391 * cost as we expect to hit the cache.
2392 */
2393 for (i = 0; i < val_count; i++) {
2394 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2395 &v);
2396 if (ret != 0)
2397 goto out;
2398
2399 map->format.format_val(val + (i * val_bytes), v, 0);
2400 }
2401 }
2402
2403 out:
2404 map->unlock(map->lock_arg);
2405
2406 return ret;
2407}
2408EXPORT_SYMBOL_GPL(regmap_raw_read);
2409
2410/**
2411 * regmap_field_read(): Read a value to a single register field
2412 *
2413 * @field: Register field to read from
2414 * @val: Pointer to store read value
2415 *
2416 * A value of zero will be returned on success, a negative errno will
2417 * be returned in error cases.
2418 */
2419int regmap_field_read(struct regmap_field *field, unsigned int *val)
2420{
2421 int ret;
2422 unsigned int reg_val;
2423 ret = regmap_read(field->regmap, field->reg, ®_val);
2424 if (ret != 0)
2425 return ret;
2426
2427 reg_val &= field->mask;
2428 reg_val >>= field->shift;
2429 *val = reg_val;
2430
2431 return ret;
2432}
2433EXPORT_SYMBOL_GPL(regmap_field_read);
2434
2435/**
2436 * regmap_fields_read(): Read a value to a single register field with port ID
2437 *
2438 * @field: Register field to read from
2439 * @id: port ID
2440 * @val: Pointer to store read value
2441 *
2442 * A value of zero will be returned on success, a negative errno will
2443 * be returned in error cases.
2444 */
2445int regmap_fields_read(struct regmap_field *field, unsigned int id,
2446 unsigned int *val)
2447{
2448 int ret;
2449 unsigned int reg_val;
2450
2451 if (id >= field->id_size)
2452 return -EINVAL;
2453
2454 ret = regmap_read(field->regmap,
2455 field->reg + (field->id_offset * id),
2456 ®_val);
2457 if (ret != 0)
2458 return ret;
2459
2460 reg_val &= field->mask;
2461 reg_val >>= field->shift;
2462 *val = reg_val;
2463
2464 return ret;
2465}
2466EXPORT_SYMBOL_GPL(regmap_fields_read);
2467
2468/**
2469 * regmap_bulk_read(): Read multiple registers from the device
2470 *
2471 * @map: Register map to read from
2472 * @reg: First register to be read from
2473 * @val: Pointer to store read value, in native register size for device
2474 * @val_count: Number of registers to read
2475 *
2476 * A value of zero will be returned on success, a negative errno will
2477 * be returned in error cases.
2478 */
2479int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2480 size_t val_count)
2481{
2482 int ret, i;
2483 size_t val_bytes = map->format.val_bytes;
2484 bool vol = regmap_volatile_range(map, reg, val_count);
2485
2486 if (!IS_ALIGNED(reg, map->reg_stride))
2487 return -EINVAL;
2488
2489 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2490 /*
2491 * Some devices does not support bulk read, for
2492 * them we have a series of single read operations.
2493 */
2494 size_t total_size = val_bytes * val_count;
2495
2496 if (!map->use_single_read &&
2497 (!map->max_raw_read || map->max_raw_read > total_size)) {
2498 ret = regmap_raw_read(map, reg, val,
2499 val_bytes * val_count);
2500 if (ret != 0)
2501 return ret;
2502 } else {
2503 /*
2504 * Some devices do not support bulk read or do not
2505 * support large bulk reads, for them we have a series
2506 * of read operations.
2507 */
2508 int chunk_stride = map->reg_stride;
2509 size_t chunk_size = val_bytes;
2510 size_t chunk_count = val_count;
2511
2512 if (!map->use_single_read) {
2513 chunk_size = map->max_raw_read;
2514 if (chunk_size % val_bytes)
2515 chunk_size -= chunk_size % val_bytes;
2516 chunk_count = total_size / chunk_size;
2517 chunk_stride *= chunk_size / val_bytes;
2518 }
2519
2520 /* Read bytes that fit into a multiple of chunk_size */
2521 for (i = 0; i < chunk_count; i++) {
2522 ret = regmap_raw_read(map,
2523 reg + (i * chunk_stride),
2524 val + (i * chunk_size),
2525 chunk_size);
2526 if (ret != 0)
2527 return ret;
2528 }
2529
2530 /* Read remaining bytes */
2531 if (chunk_size * i < total_size) {
2532 ret = regmap_raw_read(map,
2533 reg + (i * chunk_stride),
2534 val + (i * chunk_size),
2535 total_size - i * chunk_size);
2536 if (ret != 0)
2537 return ret;
2538 }
2539 }
2540
2541 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2542 map->format.parse_inplace(val + i);
2543 } else {
2544 for (i = 0; i < val_count; i++) {
2545 unsigned int ival;
2546 ret = regmap_read(map, reg + regmap_get_offset(map, i),
2547 &ival);
2548 if (ret != 0)
2549 return ret;
2550
2551 if (map->format.format_val) {
2552 map->format.format_val(val + (i * val_bytes), ival, 0);
2553 } else {
2554 /* Devices providing read and write
2555 * operations can use the bulk I/O
2556 * functions if they define a val_bytes,
2557 * we assume that the values are native
2558 * endian.
2559 */
2560#ifdef CONFIG_64BIT
2561 u64 *u64 = val;
2562#endif
2563 u32 *u32 = val;
2564 u16 *u16 = val;
2565 u8 *u8 = val;
2566
2567 switch (map->format.val_bytes) {
2568#ifdef CONFIG_64BIT
2569 case 8:
2570 u64[i] = ival;
2571 break;
2572#endif
2573 case 4:
2574 u32[i] = ival;
2575 break;
2576 case 2:
2577 u16[i] = ival;
2578 break;
2579 case 1:
2580 u8[i] = ival;
2581 break;
2582 default:
2583 return -EINVAL;
2584 }
2585 }
2586 }
2587 }
2588
2589 return 0;
2590}
2591EXPORT_SYMBOL_GPL(regmap_bulk_read);
2592
2593static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2594 unsigned int mask, unsigned int val,
2595 bool *change, bool force_write)
2596{
2597 int ret;
2598 unsigned int tmp, orig;
2599
2600 if (change)
2601 *change = false;
2602
2603 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2604 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2605 if (ret == 0 && change)
2606 *change = true;
2607 } else {
2608 ret = _regmap_read(map, reg, &orig);
2609 if (ret != 0)
2610 return ret;
2611
2612 tmp = orig & ~mask;
2613 tmp |= val & mask;
2614
2615 if (force_write || (tmp != orig)) {
2616 ret = _regmap_write(map, reg, tmp);
2617 if (ret == 0 && change)
2618 *change = true;
2619 }
2620 }
2621
2622 return ret;
2623}
2624
2625/**
2626 * regmap_update_bits_base:
2627 * Perform a read/modify/write cycle on the
2628 * register map with change, async, force option
2629 *
2630 * @map: Register map to update
2631 * @reg: Register to update
2632 * @mask: Bitmask to change
2633 * @val: New value for bitmask
2634 * @change: Boolean indicating if a write was done
2635 * @async: Boolean indicating asynchronously
2636 * @force: Boolean indicating use force update
2637 *
2638 * if async was true,
2639 * With most buses the read must be done synchronously so this is most
2640 * useful for devices with a cache which do not need to interact with
2641 * the hardware to determine the current register value.
2642 *
2643 * Returns zero for success, a negative number on error.
2644 */
2645int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2646 unsigned int mask, unsigned int val,
2647 bool *change, bool async, bool force)
2648{
2649 int ret;
2650
2651 map->lock(map->lock_arg);
2652
2653 map->async = async;
2654
2655 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2656
2657 map->async = false;
2658
2659 map->unlock(map->lock_arg);
2660
2661 return ret;
2662}
2663EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2664
2665void regmap_async_complete_cb(struct regmap_async *async, int ret)
2666{
2667 struct regmap *map = async->map;
2668 bool wake;
2669
2670 trace_regmap_async_io_complete(map);
2671
2672 spin_lock(&map->async_lock);
2673 list_move(&async->list, &map->async_free);
2674 wake = list_empty(&map->async_list);
2675
2676 if (ret != 0)
2677 map->async_ret = ret;
2678
2679 spin_unlock(&map->async_lock);
2680
2681 if (wake)
2682 wake_up(&map->async_waitq);
2683}
2684EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2685
2686static int regmap_async_is_done(struct regmap *map)
2687{
2688 unsigned long flags;
2689 int ret;
2690
2691 spin_lock_irqsave(&map->async_lock, flags);
2692 ret = list_empty(&map->async_list);
2693 spin_unlock_irqrestore(&map->async_lock, flags);
2694
2695 return ret;
2696}
2697
2698/**
2699 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2700 *
2701 * @map: Map to operate on.
2702 *
2703 * Blocks until any pending asynchronous I/O has completed. Returns
2704 * an error code for any failed I/O operations.
2705 */
2706int regmap_async_complete(struct regmap *map)
2707{
2708 unsigned long flags;
2709 int ret;
2710
2711 /* Nothing to do with no async support */
2712 if (!map->bus || !map->bus->async_write)
2713 return 0;
2714
2715 trace_regmap_async_complete_start(map);
2716
2717 wait_event(map->async_waitq, regmap_async_is_done(map));
2718
2719 spin_lock_irqsave(&map->async_lock, flags);
2720 ret = map->async_ret;
2721 map->async_ret = 0;
2722 spin_unlock_irqrestore(&map->async_lock, flags);
2723
2724 trace_regmap_async_complete_done(map);
2725
2726 return ret;
2727}
2728EXPORT_SYMBOL_GPL(regmap_async_complete);
2729
2730/**
2731 * regmap_register_patch: Register and apply register updates to be applied
2732 * on device initialistion
2733 *
2734 * @map: Register map to apply updates to.
2735 * @regs: Values to update.
2736 * @num_regs: Number of entries in regs.
2737 *
2738 * Register a set of register updates to be applied to the device
2739 * whenever the device registers are synchronised with the cache and
2740 * apply them immediately. Typically this is used to apply
2741 * corrections to be applied to the device defaults on startup, such
2742 * as the updates some vendors provide to undocumented registers.
2743 *
2744 * The caller must ensure that this function cannot be called
2745 * concurrently with either itself or regcache_sync().
2746 */
2747int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
2748 int num_regs)
2749{
2750 struct reg_sequence *p;
2751 int ret;
2752 bool bypass;
2753
2754 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2755 num_regs))
2756 return 0;
2757
2758 p = krealloc(map->patch,
2759 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
2760 GFP_KERNEL);
2761 if (p) {
2762 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2763 map->patch = p;
2764 map->patch_regs += num_regs;
2765 } else {
2766 return -ENOMEM;
2767 }
2768
2769 map->lock(map->lock_arg);
2770
2771 bypass = map->cache_bypass;
2772
2773 map->cache_bypass = true;
2774 map->async = true;
2775
2776 ret = _regmap_multi_reg_write(map, regs, num_regs);
2777
2778 map->async = false;
2779 map->cache_bypass = bypass;
2780
2781 map->unlock(map->lock_arg);
2782
2783 regmap_async_complete(map);
2784
2785 return ret;
2786}
2787EXPORT_SYMBOL_GPL(regmap_register_patch);
2788
2789/*
2790 * regmap_get_val_bytes(): Report the size of a register value
2791 *
2792 * Report the size of a register value, mainly intended to for use by
2793 * generic infrastructure built on top of regmap.
2794 */
2795int regmap_get_val_bytes(struct regmap *map)
2796{
2797 if (map->format.format_write)
2798 return -EINVAL;
2799
2800 return map->format.val_bytes;
2801}
2802EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2803
2804/**
2805 * regmap_get_max_register(): Report the max register value
2806 *
2807 * Report the max register value, mainly intended to for use by
2808 * generic infrastructure built on top of regmap.
2809 */
2810int regmap_get_max_register(struct regmap *map)
2811{
2812 return map->max_register ? map->max_register : -EINVAL;
2813}
2814EXPORT_SYMBOL_GPL(regmap_get_max_register);
2815
2816/**
2817 * regmap_get_reg_stride(): Report the register address stride
2818 *
2819 * Report the register address stride, mainly intended to for use by
2820 * generic infrastructure built on top of regmap.
2821 */
2822int regmap_get_reg_stride(struct regmap *map)
2823{
2824 return map->reg_stride;
2825}
2826EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2827
2828int regmap_parse_val(struct regmap *map, const void *buf,
2829 unsigned int *val)
2830{
2831 if (!map->format.parse_val)
2832 return -EINVAL;
2833
2834 *val = map->format.parse_val(buf);
2835
2836 return 0;
2837}
2838EXPORT_SYMBOL_GPL(regmap_parse_val);
2839
2840static int __init regmap_initcall(void)
2841{
2842 regmap_debugfs_initcall();
2843
2844 return 0;
2845}
2846postcore_initcall(regmap_initcall);
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/device.h>
14#include <linux/slab.h>
15#include <linux/export.h>
16#include <linux/mutex.h>
17#include <linux/err.h>
18#include <linux/rbtree.h>
19#include <linux/sched.h>
20
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
24#include "internal.h"
25
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
44
45bool regmap_reg_in_ranges(unsigned int reg,
46 const struct regmap_range *ranges,
47 unsigned int nranges)
48{
49 const struct regmap_range *r;
50 int i;
51
52 for (i = 0, r = ranges; i < nranges; i++, r++)
53 if (regmap_reg_in_range(reg, r))
54 return true;
55 return false;
56}
57EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
58
59bool regmap_check_range_table(struct regmap *map, unsigned int reg,
60 const struct regmap_access_table *table)
61{
62 /* Check "no ranges" first */
63 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
64 return false;
65
66 /* In case zero "yes ranges" are supplied, any reg is OK */
67 if (!table->n_yes_ranges)
68 return true;
69
70 return regmap_reg_in_ranges(reg, table->yes_ranges,
71 table->n_yes_ranges);
72}
73EXPORT_SYMBOL_GPL(regmap_check_range_table);
74
75bool regmap_writeable(struct regmap *map, unsigned int reg)
76{
77 if (map->max_register && reg > map->max_register)
78 return false;
79
80 if (map->writeable_reg)
81 return map->writeable_reg(map->dev, reg);
82
83 if (map->wr_table)
84 return regmap_check_range_table(map, reg, map->wr_table);
85
86 return true;
87}
88
89bool regmap_readable(struct regmap *map, unsigned int reg)
90{
91 if (map->max_register && reg > map->max_register)
92 return false;
93
94 if (map->format.format_write)
95 return false;
96
97 if (map->readable_reg)
98 return map->readable_reg(map->dev, reg);
99
100 if (map->rd_table)
101 return regmap_check_range_table(map, reg, map->rd_table);
102
103 return true;
104}
105
106bool regmap_volatile(struct regmap *map, unsigned int reg)
107{
108 if (!regmap_readable(map, reg))
109 return false;
110
111 if (map->volatile_reg)
112 return map->volatile_reg(map->dev, reg);
113
114 if (map->volatile_table)
115 return regmap_check_range_table(map, reg, map->volatile_table);
116
117 if (map->cache_ops)
118 return false;
119 else
120 return true;
121}
122
123bool regmap_precious(struct regmap *map, unsigned int reg)
124{
125 if (!regmap_readable(map, reg))
126 return false;
127
128 if (map->precious_reg)
129 return map->precious_reg(map->dev, reg);
130
131 if (map->precious_table)
132 return regmap_check_range_table(map, reg, map->precious_table);
133
134 return false;
135}
136
137static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
138 size_t num)
139{
140 unsigned int i;
141
142 for (i = 0; i < num; i++)
143 if (!regmap_volatile(map, reg + i))
144 return false;
145
146 return true;
147}
148
149static void regmap_format_2_6_write(struct regmap *map,
150 unsigned int reg, unsigned int val)
151{
152 u8 *out = map->work_buf;
153
154 *out = (reg << 6) | val;
155}
156
157static void regmap_format_4_12_write(struct regmap *map,
158 unsigned int reg, unsigned int val)
159{
160 __be16 *out = map->work_buf;
161 *out = cpu_to_be16((reg << 12) | val);
162}
163
164static void regmap_format_7_9_write(struct regmap *map,
165 unsigned int reg, unsigned int val)
166{
167 __be16 *out = map->work_buf;
168 *out = cpu_to_be16((reg << 9) | val);
169}
170
171static void regmap_format_10_14_write(struct regmap *map,
172 unsigned int reg, unsigned int val)
173{
174 u8 *out = map->work_buf;
175
176 out[2] = val;
177 out[1] = (val >> 8) | (reg << 6);
178 out[0] = reg >> 2;
179}
180
181static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
182{
183 u8 *b = buf;
184
185 b[0] = val << shift;
186}
187
188static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
189{
190 __be16 *b = buf;
191
192 b[0] = cpu_to_be16(val << shift);
193}
194
195static void regmap_format_16_native(void *buf, unsigned int val,
196 unsigned int shift)
197{
198 *(u16 *)buf = val << shift;
199}
200
201static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
202{
203 u8 *b = buf;
204
205 val <<= shift;
206
207 b[0] = val >> 16;
208 b[1] = val >> 8;
209 b[2] = val;
210}
211
212static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
213{
214 __be32 *b = buf;
215
216 b[0] = cpu_to_be32(val << shift);
217}
218
219static void regmap_format_32_native(void *buf, unsigned int val,
220 unsigned int shift)
221{
222 *(u32 *)buf = val << shift;
223}
224
225static void regmap_parse_inplace_noop(void *buf)
226{
227}
228
229static unsigned int regmap_parse_8(const void *buf)
230{
231 const u8 *b = buf;
232
233 return b[0];
234}
235
236static unsigned int regmap_parse_16_be(const void *buf)
237{
238 const __be16 *b = buf;
239
240 return be16_to_cpu(b[0]);
241}
242
243static void regmap_parse_16_be_inplace(void *buf)
244{
245 __be16 *b = buf;
246
247 b[0] = be16_to_cpu(b[0]);
248}
249
250static unsigned int regmap_parse_16_native(const void *buf)
251{
252 return *(u16 *)buf;
253}
254
255static unsigned int regmap_parse_24(const void *buf)
256{
257 const u8 *b = buf;
258 unsigned int ret = b[2];
259 ret |= ((unsigned int)b[1]) << 8;
260 ret |= ((unsigned int)b[0]) << 16;
261
262 return ret;
263}
264
265static unsigned int regmap_parse_32_be(const void *buf)
266{
267 const __be32 *b = buf;
268
269 return be32_to_cpu(b[0]);
270}
271
272static void regmap_parse_32_be_inplace(void *buf)
273{
274 __be32 *b = buf;
275
276 b[0] = be32_to_cpu(b[0]);
277}
278
279static unsigned int regmap_parse_32_native(const void *buf)
280{
281 return *(u32 *)buf;
282}
283
284static void regmap_lock_mutex(void *__map)
285{
286 struct regmap *map = __map;
287 mutex_lock(&map->mutex);
288}
289
290static void regmap_unlock_mutex(void *__map)
291{
292 struct regmap *map = __map;
293 mutex_unlock(&map->mutex);
294}
295
296static void regmap_lock_spinlock(void *__map)
297__acquires(&map->spinlock)
298{
299 struct regmap *map = __map;
300 unsigned long flags;
301
302 spin_lock_irqsave(&map->spinlock, flags);
303 map->spinlock_flags = flags;
304}
305
306static void regmap_unlock_spinlock(void *__map)
307__releases(&map->spinlock)
308{
309 struct regmap *map = __map;
310 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
311}
312
313static void dev_get_regmap_release(struct device *dev, void *res)
314{
315 /*
316 * We don't actually have anything to do here; the goal here
317 * is not to manage the regmap but to provide a simple way to
318 * get the regmap back given a struct device.
319 */
320}
321
322static bool _regmap_range_add(struct regmap *map,
323 struct regmap_range_node *data)
324{
325 struct rb_root *root = &map->range_tree;
326 struct rb_node **new = &(root->rb_node), *parent = NULL;
327
328 while (*new) {
329 struct regmap_range_node *this =
330 container_of(*new, struct regmap_range_node, node);
331
332 parent = *new;
333 if (data->range_max < this->range_min)
334 new = &((*new)->rb_left);
335 else if (data->range_min > this->range_max)
336 new = &((*new)->rb_right);
337 else
338 return false;
339 }
340
341 rb_link_node(&data->node, parent, new);
342 rb_insert_color(&data->node, root);
343
344 return true;
345}
346
347static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
348 unsigned int reg)
349{
350 struct rb_node *node = map->range_tree.rb_node;
351
352 while (node) {
353 struct regmap_range_node *this =
354 container_of(node, struct regmap_range_node, node);
355
356 if (reg < this->range_min)
357 node = node->rb_left;
358 else if (reg > this->range_max)
359 node = node->rb_right;
360 else
361 return this;
362 }
363
364 return NULL;
365}
366
367static void regmap_range_exit(struct regmap *map)
368{
369 struct rb_node *next;
370 struct regmap_range_node *range_node;
371
372 next = rb_first(&map->range_tree);
373 while (next) {
374 range_node = rb_entry(next, struct regmap_range_node, node);
375 next = rb_next(&range_node->node);
376 rb_erase(&range_node->node, &map->range_tree);
377 kfree(range_node);
378 }
379
380 kfree(map->selector_work_buf);
381}
382
383int regmap_attach_dev(struct device *dev, struct regmap *map,
384 const struct regmap_config *config)
385{
386 struct regmap **m;
387
388 map->dev = dev;
389
390 regmap_debugfs_init(map, config->name);
391
392 /* Add a devres resource for dev_get_regmap() */
393 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
394 if (!m) {
395 regmap_debugfs_exit(map);
396 return -ENOMEM;
397 }
398 *m = map;
399 devres_add(dev, m);
400
401 return 0;
402}
403EXPORT_SYMBOL_GPL(regmap_attach_dev);
404
405/**
406 * regmap_init(): Initialise register map
407 *
408 * @dev: Device that will be interacted with
409 * @bus: Bus-specific callbacks to use with device
410 * @bus_context: Data passed to bus-specific callbacks
411 * @config: Configuration for register map
412 *
413 * The return value will be an ERR_PTR() on error or a valid pointer to
414 * a struct regmap. This function should generally not be called
415 * directly, it should be called by bus-specific init functions.
416 */
417struct regmap *regmap_init(struct device *dev,
418 const struct regmap_bus *bus,
419 void *bus_context,
420 const struct regmap_config *config)
421{
422 struct regmap *map;
423 int ret = -EINVAL;
424 enum regmap_endian reg_endian, val_endian;
425 int i, j;
426
427 if (!config)
428 goto err;
429
430 map = kzalloc(sizeof(*map), GFP_KERNEL);
431 if (map == NULL) {
432 ret = -ENOMEM;
433 goto err;
434 }
435
436 if (config->lock && config->unlock) {
437 map->lock = config->lock;
438 map->unlock = config->unlock;
439 map->lock_arg = config->lock_arg;
440 } else {
441 if ((bus && bus->fast_io) ||
442 config->fast_io) {
443 spin_lock_init(&map->spinlock);
444 map->lock = regmap_lock_spinlock;
445 map->unlock = regmap_unlock_spinlock;
446 } else {
447 mutex_init(&map->mutex);
448 map->lock = regmap_lock_mutex;
449 map->unlock = regmap_unlock_mutex;
450 }
451 map->lock_arg = map;
452 }
453 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
454 map->format.pad_bytes = config->pad_bits / 8;
455 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
456 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
457 config->val_bits + config->pad_bits, 8);
458 map->reg_shift = config->pad_bits % 8;
459 if (config->reg_stride)
460 map->reg_stride = config->reg_stride;
461 else
462 map->reg_stride = 1;
463 map->use_single_rw = config->use_single_rw;
464 map->can_multi_write = config->can_multi_write;
465 map->dev = dev;
466 map->bus = bus;
467 map->bus_context = bus_context;
468 map->max_register = config->max_register;
469 map->wr_table = config->wr_table;
470 map->rd_table = config->rd_table;
471 map->volatile_table = config->volatile_table;
472 map->precious_table = config->precious_table;
473 map->writeable_reg = config->writeable_reg;
474 map->readable_reg = config->readable_reg;
475 map->volatile_reg = config->volatile_reg;
476 map->precious_reg = config->precious_reg;
477 map->cache_type = config->cache_type;
478 map->name = config->name;
479
480 spin_lock_init(&map->async_lock);
481 INIT_LIST_HEAD(&map->async_list);
482 INIT_LIST_HEAD(&map->async_free);
483 init_waitqueue_head(&map->async_waitq);
484
485 if (config->read_flag_mask || config->write_flag_mask) {
486 map->read_flag_mask = config->read_flag_mask;
487 map->write_flag_mask = config->write_flag_mask;
488 } else if (bus) {
489 map->read_flag_mask = bus->read_flag_mask;
490 }
491
492 if (!bus) {
493 map->reg_read = config->reg_read;
494 map->reg_write = config->reg_write;
495
496 map->defer_caching = false;
497 goto skip_format_initialization;
498 } else {
499 map->reg_read = _regmap_bus_read;
500 }
501
502 reg_endian = config->reg_format_endian;
503 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
504 reg_endian = bus->reg_format_endian_default;
505 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
506 reg_endian = REGMAP_ENDIAN_BIG;
507
508 val_endian = config->val_format_endian;
509 if (val_endian == REGMAP_ENDIAN_DEFAULT)
510 val_endian = bus->val_format_endian_default;
511 if (val_endian == REGMAP_ENDIAN_DEFAULT)
512 val_endian = REGMAP_ENDIAN_BIG;
513
514 switch (config->reg_bits + map->reg_shift) {
515 case 2:
516 switch (config->val_bits) {
517 case 6:
518 map->format.format_write = regmap_format_2_6_write;
519 break;
520 default:
521 goto err_map;
522 }
523 break;
524
525 case 4:
526 switch (config->val_bits) {
527 case 12:
528 map->format.format_write = regmap_format_4_12_write;
529 break;
530 default:
531 goto err_map;
532 }
533 break;
534
535 case 7:
536 switch (config->val_bits) {
537 case 9:
538 map->format.format_write = regmap_format_7_9_write;
539 break;
540 default:
541 goto err_map;
542 }
543 break;
544
545 case 10:
546 switch (config->val_bits) {
547 case 14:
548 map->format.format_write = regmap_format_10_14_write;
549 break;
550 default:
551 goto err_map;
552 }
553 break;
554
555 case 8:
556 map->format.format_reg = regmap_format_8;
557 break;
558
559 case 16:
560 switch (reg_endian) {
561 case REGMAP_ENDIAN_BIG:
562 map->format.format_reg = regmap_format_16_be;
563 break;
564 case REGMAP_ENDIAN_NATIVE:
565 map->format.format_reg = regmap_format_16_native;
566 break;
567 default:
568 goto err_map;
569 }
570 break;
571
572 case 24:
573 if (reg_endian != REGMAP_ENDIAN_BIG)
574 goto err_map;
575 map->format.format_reg = regmap_format_24;
576 break;
577
578 case 32:
579 switch (reg_endian) {
580 case REGMAP_ENDIAN_BIG:
581 map->format.format_reg = regmap_format_32_be;
582 break;
583 case REGMAP_ENDIAN_NATIVE:
584 map->format.format_reg = regmap_format_32_native;
585 break;
586 default:
587 goto err_map;
588 }
589 break;
590
591 default:
592 goto err_map;
593 }
594
595 if (val_endian == REGMAP_ENDIAN_NATIVE)
596 map->format.parse_inplace = regmap_parse_inplace_noop;
597
598 switch (config->val_bits) {
599 case 8:
600 map->format.format_val = regmap_format_8;
601 map->format.parse_val = regmap_parse_8;
602 map->format.parse_inplace = regmap_parse_inplace_noop;
603 break;
604 case 16:
605 switch (val_endian) {
606 case REGMAP_ENDIAN_BIG:
607 map->format.format_val = regmap_format_16_be;
608 map->format.parse_val = regmap_parse_16_be;
609 map->format.parse_inplace = regmap_parse_16_be_inplace;
610 break;
611 case REGMAP_ENDIAN_NATIVE:
612 map->format.format_val = regmap_format_16_native;
613 map->format.parse_val = regmap_parse_16_native;
614 break;
615 default:
616 goto err_map;
617 }
618 break;
619 case 24:
620 if (val_endian != REGMAP_ENDIAN_BIG)
621 goto err_map;
622 map->format.format_val = regmap_format_24;
623 map->format.parse_val = regmap_parse_24;
624 break;
625 case 32:
626 switch (val_endian) {
627 case REGMAP_ENDIAN_BIG:
628 map->format.format_val = regmap_format_32_be;
629 map->format.parse_val = regmap_parse_32_be;
630 map->format.parse_inplace = regmap_parse_32_be_inplace;
631 break;
632 case REGMAP_ENDIAN_NATIVE:
633 map->format.format_val = regmap_format_32_native;
634 map->format.parse_val = regmap_parse_32_native;
635 break;
636 default:
637 goto err_map;
638 }
639 break;
640 }
641
642 if (map->format.format_write) {
643 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
644 (val_endian != REGMAP_ENDIAN_BIG))
645 goto err_map;
646 map->use_single_rw = true;
647 }
648
649 if (!map->format.format_write &&
650 !(map->format.format_reg && map->format.format_val))
651 goto err_map;
652
653 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
654 if (map->work_buf == NULL) {
655 ret = -ENOMEM;
656 goto err_map;
657 }
658
659 if (map->format.format_write) {
660 map->defer_caching = false;
661 map->reg_write = _regmap_bus_formatted_write;
662 } else if (map->format.format_val) {
663 map->defer_caching = true;
664 map->reg_write = _regmap_bus_raw_write;
665 }
666
667skip_format_initialization:
668
669 map->range_tree = RB_ROOT;
670 for (i = 0; i < config->num_ranges; i++) {
671 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
672 struct regmap_range_node *new;
673
674 /* Sanity check */
675 if (range_cfg->range_max < range_cfg->range_min) {
676 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
677 range_cfg->range_max, range_cfg->range_min);
678 goto err_range;
679 }
680
681 if (range_cfg->range_max > map->max_register) {
682 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
683 range_cfg->range_max, map->max_register);
684 goto err_range;
685 }
686
687 if (range_cfg->selector_reg > map->max_register) {
688 dev_err(map->dev,
689 "Invalid range %d: selector out of map\n", i);
690 goto err_range;
691 }
692
693 if (range_cfg->window_len == 0) {
694 dev_err(map->dev, "Invalid range %d: window_len 0\n",
695 i);
696 goto err_range;
697 }
698
699 /* Make sure, that this register range has no selector
700 or data window within its boundary */
701 for (j = 0; j < config->num_ranges; j++) {
702 unsigned sel_reg = config->ranges[j].selector_reg;
703 unsigned win_min = config->ranges[j].window_start;
704 unsigned win_max = win_min +
705 config->ranges[j].window_len - 1;
706
707 /* Allow data window inside its own virtual range */
708 if (j == i)
709 continue;
710
711 if (range_cfg->range_min <= sel_reg &&
712 sel_reg <= range_cfg->range_max) {
713 dev_err(map->dev,
714 "Range %d: selector for %d in window\n",
715 i, j);
716 goto err_range;
717 }
718
719 if (!(win_max < range_cfg->range_min ||
720 win_min > range_cfg->range_max)) {
721 dev_err(map->dev,
722 "Range %d: window for %d in window\n",
723 i, j);
724 goto err_range;
725 }
726 }
727
728 new = kzalloc(sizeof(*new), GFP_KERNEL);
729 if (new == NULL) {
730 ret = -ENOMEM;
731 goto err_range;
732 }
733
734 new->map = map;
735 new->name = range_cfg->name;
736 new->range_min = range_cfg->range_min;
737 new->range_max = range_cfg->range_max;
738 new->selector_reg = range_cfg->selector_reg;
739 new->selector_mask = range_cfg->selector_mask;
740 new->selector_shift = range_cfg->selector_shift;
741 new->window_start = range_cfg->window_start;
742 new->window_len = range_cfg->window_len;
743
744 if (!_regmap_range_add(map, new)) {
745 dev_err(map->dev, "Failed to add range %d\n", i);
746 kfree(new);
747 goto err_range;
748 }
749
750 if (map->selector_work_buf == NULL) {
751 map->selector_work_buf =
752 kzalloc(map->format.buf_size, GFP_KERNEL);
753 if (map->selector_work_buf == NULL) {
754 ret = -ENOMEM;
755 goto err_range;
756 }
757 }
758 }
759
760 ret = regcache_init(map, config);
761 if (ret != 0)
762 goto err_range;
763
764 if (dev) {
765 ret = regmap_attach_dev(dev, map, config);
766 if (ret != 0)
767 goto err_regcache;
768 }
769
770 return map;
771
772err_regcache:
773 regcache_exit(map);
774err_range:
775 regmap_range_exit(map);
776 kfree(map->work_buf);
777err_map:
778 kfree(map);
779err:
780 return ERR_PTR(ret);
781}
782EXPORT_SYMBOL_GPL(regmap_init);
783
784static void devm_regmap_release(struct device *dev, void *res)
785{
786 regmap_exit(*(struct regmap **)res);
787}
788
789/**
790 * devm_regmap_init(): Initialise managed register map
791 *
792 * @dev: Device that will be interacted with
793 * @bus: Bus-specific callbacks to use with device
794 * @bus_context: Data passed to bus-specific callbacks
795 * @config: Configuration for register map
796 *
797 * The return value will be an ERR_PTR() on error or a valid pointer
798 * to a struct regmap. This function should generally not be called
799 * directly, it should be called by bus-specific init functions. The
800 * map will be automatically freed by the device management code.
801 */
802struct regmap *devm_regmap_init(struct device *dev,
803 const struct regmap_bus *bus,
804 void *bus_context,
805 const struct regmap_config *config)
806{
807 struct regmap **ptr, *regmap;
808
809 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
810 if (!ptr)
811 return ERR_PTR(-ENOMEM);
812
813 regmap = regmap_init(dev, bus, bus_context, config);
814 if (!IS_ERR(regmap)) {
815 *ptr = regmap;
816 devres_add(dev, ptr);
817 } else {
818 devres_free(ptr);
819 }
820
821 return regmap;
822}
823EXPORT_SYMBOL_GPL(devm_regmap_init);
824
825static void regmap_field_init(struct regmap_field *rm_field,
826 struct regmap *regmap, struct reg_field reg_field)
827{
828 int field_bits = reg_field.msb - reg_field.lsb + 1;
829 rm_field->regmap = regmap;
830 rm_field->reg = reg_field.reg;
831 rm_field->shift = reg_field.lsb;
832 rm_field->mask = ((BIT(field_bits) - 1) << reg_field.lsb);
833 rm_field->id_size = reg_field.id_size;
834 rm_field->id_offset = reg_field.id_offset;
835}
836
837/**
838 * devm_regmap_field_alloc(): Allocate and initialise a register field
839 * in a register map.
840 *
841 * @dev: Device that will be interacted with
842 * @regmap: regmap bank in which this register field is located.
843 * @reg_field: Register field with in the bank.
844 *
845 * The return value will be an ERR_PTR() on error or a valid pointer
846 * to a struct regmap_field. The regmap_field will be automatically freed
847 * by the device management code.
848 */
849struct regmap_field *devm_regmap_field_alloc(struct device *dev,
850 struct regmap *regmap, struct reg_field reg_field)
851{
852 struct regmap_field *rm_field = devm_kzalloc(dev,
853 sizeof(*rm_field), GFP_KERNEL);
854 if (!rm_field)
855 return ERR_PTR(-ENOMEM);
856
857 regmap_field_init(rm_field, regmap, reg_field);
858
859 return rm_field;
860
861}
862EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
863
864/**
865 * devm_regmap_field_free(): Free register field allocated using
866 * devm_regmap_field_alloc. Usally drivers need not call this function,
867 * as the memory allocated via devm will be freed as per device-driver
868 * life-cyle.
869 *
870 * @dev: Device that will be interacted with
871 * @field: regmap field which should be freed.
872 */
873void devm_regmap_field_free(struct device *dev,
874 struct regmap_field *field)
875{
876 devm_kfree(dev, field);
877}
878EXPORT_SYMBOL_GPL(devm_regmap_field_free);
879
880/**
881 * regmap_field_alloc(): Allocate and initialise a register field
882 * in a register map.
883 *
884 * @regmap: regmap bank in which this register field is located.
885 * @reg_field: Register field with in the bank.
886 *
887 * The return value will be an ERR_PTR() on error or a valid pointer
888 * to a struct regmap_field. The regmap_field should be freed by the
889 * user once its finished working with it using regmap_field_free().
890 */
891struct regmap_field *regmap_field_alloc(struct regmap *regmap,
892 struct reg_field reg_field)
893{
894 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
895
896 if (!rm_field)
897 return ERR_PTR(-ENOMEM);
898
899 regmap_field_init(rm_field, regmap, reg_field);
900
901 return rm_field;
902}
903EXPORT_SYMBOL_GPL(regmap_field_alloc);
904
905/**
906 * regmap_field_free(): Free register field allocated using regmap_field_alloc
907 *
908 * @field: regmap field which should be freed.
909 */
910void regmap_field_free(struct regmap_field *field)
911{
912 kfree(field);
913}
914EXPORT_SYMBOL_GPL(regmap_field_free);
915
916/**
917 * regmap_reinit_cache(): Reinitialise the current register cache
918 *
919 * @map: Register map to operate on.
920 * @config: New configuration. Only the cache data will be used.
921 *
922 * Discard any existing register cache for the map and initialize a
923 * new cache. This can be used to restore the cache to defaults or to
924 * update the cache configuration to reflect runtime discovery of the
925 * hardware.
926 *
927 * No explicit locking is done here, the user needs to ensure that
928 * this function will not race with other calls to regmap.
929 */
930int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
931{
932 regcache_exit(map);
933 regmap_debugfs_exit(map);
934
935 map->max_register = config->max_register;
936 map->writeable_reg = config->writeable_reg;
937 map->readable_reg = config->readable_reg;
938 map->volatile_reg = config->volatile_reg;
939 map->precious_reg = config->precious_reg;
940 map->cache_type = config->cache_type;
941
942 regmap_debugfs_init(map, config->name);
943
944 map->cache_bypass = false;
945 map->cache_only = false;
946
947 return regcache_init(map, config);
948}
949EXPORT_SYMBOL_GPL(regmap_reinit_cache);
950
951/**
952 * regmap_exit(): Free a previously allocated register map
953 */
954void regmap_exit(struct regmap *map)
955{
956 struct regmap_async *async;
957
958 regcache_exit(map);
959 regmap_debugfs_exit(map);
960 regmap_range_exit(map);
961 if (map->bus && map->bus->free_context)
962 map->bus->free_context(map->bus_context);
963 kfree(map->work_buf);
964 while (!list_empty(&map->async_free)) {
965 async = list_first_entry_or_null(&map->async_free,
966 struct regmap_async,
967 list);
968 list_del(&async->list);
969 kfree(async->work_buf);
970 kfree(async);
971 }
972 kfree(map);
973}
974EXPORT_SYMBOL_GPL(regmap_exit);
975
976static int dev_get_regmap_match(struct device *dev, void *res, void *data)
977{
978 struct regmap **r = res;
979 if (!r || !*r) {
980 WARN_ON(!r || !*r);
981 return 0;
982 }
983
984 /* If the user didn't specify a name match any */
985 if (data)
986 return (*r)->name == data;
987 else
988 return 1;
989}
990
991/**
992 * dev_get_regmap(): Obtain the regmap (if any) for a device
993 *
994 * @dev: Device to retrieve the map for
995 * @name: Optional name for the register map, usually NULL.
996 *
997 * Returns the regmap for the device if one is present, or NULL. If
998 * name is specified then it must match the name specified when
999 * registering the device, if it is NULL then the first regmap found
1000 * will be used. Devices with multiple register maps are very rare,
1001 * generic code should normally not need to specify a name.
1002 */
1003struct regmap *dev_get_regmap(struct device *dev, const char *name)
1004{
1005 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1006 dev_get_regmap_match, (void *)name);
1007
1008 if (!r)
1009 return NULL;
1010 return *r;
1011}
1012EXPORT_SYMBOL_GPL(dev_get_regmap);
1013
1014static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1015 struct regmap_range_node *range,
1016 unsigned int val_num)
1017{
1018 void *orig_work_buf;
1019 unsigned int win_offset;
1020 unsigned int win_page;
1021 bool page_chg;
1022 int ret;
1023
1024 win_offset = (*reg - range->range_min) % range->window_len;
1025 win_page = (*reg - range->range_min) / range->window_len;
1026
1027 if (val_num > 1) {
1028 /* Bulk write shouldn't cross range boundary */
1029 if (*reg + val_num - 1 > range->range_max)
1030 return -EINVAL;
1031
1032 /* ... or single page boundary */
1033 if (val_num > range->window_len - win_offset)
1034 return -EINVAL;
1035 }
1036
1037 /* It is possible to have selector register inside data window.
1038 In that case, selector register is located on every page and
1039 it needs no page switching, when accessed alone. */
1040 if (val_num > 1 ||
1041 range->window_start + win_offset != range->selector_reg) {
1042 /* Use separate work_buf during page switching */
1043 orig_work_buf = map->work_buf;
1044 map->work_buf = map->selector_work_buf;
1045
1046 ret = _regmap_update_bits(map, range->selector_reg,
1047 range->selector_mask,
1048 win_page << range->selector_shift,
1049 &page_chg);
1050
1051 map->work_buf = orig_work_buf;
1052
1053 if (ret != 0)
1054 return ret;
1055 }
1056
1057 *reg = range->window_start + win_offset;
1058
1059 return 0;
1060}
1061
1062int _regmap_raw_write(struct regmap *map, unsigned int reg,
1063 const void *val, size_t val_len)
1064{
1065 struct regmap_range_node *range;
1066 unsigned long flags;
1067 u8 *u8 = map->work_buf;
1068 void *work_val = map->work_buf + map->format.reg_bytes +
1069 map->format.pad_bytes;
1070 void *buf;
1071 int ret = -ENOTSUPP;
1072 size_t len;
1073 int i;
1074
1075 WARN_ON(!map->bus);
1076
1077 /* Check for unwritable registers before we start */
1078 if (map->writeable_reg)
1079 for (i = 0; i < val_len / map->format.val_bytes; i++)
1080 if (!map->writeable_reg(map->dev,
1081 reg + (i * map->reg_stride)))
1082 return -EINVAL;
1083
1084 if (!map->cache_bypass && map->format.parse_val) {
1085 unsigned int ival;
1086 int val_bytes = map->format.val_bytes;
1087 for (i = 0; i < val_len / val_bytes; i++) {
1088 ival = map->format.parse_val(val + (i * val_bytes));
1089 ret = regcache_write(map, reg + (i * map->reg_stride),
1090 ival);
1091 if (ret) {
1092 dev_err(map->dev,
1093 "Error in caching of register: %x ret: %d\n",
1094 reg + i, ret);
1095 return ret;
1096 }
1097 }
1098 if (map->cache_only) {
1099 map->cache_dirty = true;
1100 return 0;
1101 }
1102 }
1103
1104 range = _regmap_range_lookup(map, reg);
1105 if (range) {
1106 int val_num = val_len / map->format.val_bytes;
1107 int win_offset = (reg - range->range_min) % range->window_len;
1108 int win_residue = range->window_len - win_offset;
1109
1110 /* If the write goes beyond the end of the window split it */
1111 while (val_num > win_residue) {
1112 dev_dbg(map->dev, "Writing window %d/%zu\n",
1113 win_residue, val_len / map->format.val_bytes);
1114 ret = _regmap_raw_write(map, reg, val, win_residue *
1115 map->format.val_bytes);
1116 if (ret != 0)
1117 return ret;
1118
1119 reg += win_residue;
1120 val_num -= win_residue;
1121 val += win_residue * map->format.val_bytes;
1122 val_len -= win_residue * map->format.val_bytes;
1123
1124 win_offset = (reg - range->range_min) %
1125 range->window_len;
1126 win_residue = range->window_len - win_offset;
1127 }
1128
1129 ret = _regmap_select_page(map, ®, range, val_num);
1130 if (ret != 0)
1131 return ret;
1132 }
1133
1134 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1135
1136 u8[0] |= map->write_flag_mask;
1137
1138 /*
1139 * Essentially all I/O mechanisms will be faster with a single
1140 * buffer to write. Since register syncs often generate raw
1141 * writes of single registers optimise that case.
1142 */
1143 if (val != work_val && val_len == map->format.val_bytes) {
1144 memcpy(work_val, val, map->format.val_bytes);
1145 val = work_val;
1146 }
1147
1148 if (map->async && map->bus->async_write) {
1149 struct regmap_async *async;
1150
1151 trace_regmap_async_write_start(map->dev, reg, val_len);
1152
1153 spin_lock_irqsave(&map->async_lock, flags);
1154 async = list_first_entry_or_null(&map->async_free,
1155 struct regmap_async,
1156 list);
1157 if (async)
1158 list_del(&async->list);
1159 spin_unlock_irqrestore(&map->async_lock, flags);
1160
1161 if (!async) {
1162 async = map->bus->async_alloc();
1163 if (!async)
1164 return -ENOMEM;
1165
1166 async->work_buf = kzalloc(map->format.buf_size,
1167 GFP_KERNEL | GFP_DMA);
1168 if (!async->work_buf) {
1169 kfree(async);
1170 return -ENOMEM;
1171 }
1172 }
1173
1174 async->map = map;
1175
1176 /* If the caller supplied the value we can use it safely. */
1177 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1178 map->format.reg_bytes + map->format.val_bytes);
1179
1180 spin_lock_irqsave(&map->async_lock, flags);
1181 list_add_tail(&async->list, &map->async_list);
1182 spin_unlock_irqrestore(&map->async_lock, flags);
1183
1184 if (val != work_val)
1185 ret = map->bus->async_write(map->bus_context,
1186 async->work_buf,
1187 map->format.reg_bytes +
1188 map->format.pad_bytes,
1189 val, val_len, async);
1190 else
1191 ret = map->bus->async_write(map->bus_context,
1192 async->work_buf,
1193 map->format.reg_bytes +
1194 map->format.pad_bytes +
1195 val_len, NULL, 0, async);
1196
1197 if (ret != 0) {
1198 dev_err(map->dev, "Failed to schedule write: %d\n",
1199 ret);
1200
1201 spin_lock_irqsave(&map->async_lock, flags);
1202 list_move(&async->list, &map->async_free);
1203 spin_unlock_irqrestore(&map->async_lock, flags);
1204 }
1205
1206 return ret;
1207 }
1208
1209 trace_regmap_hw_write_start(map->dev, reg,
1210 val_len / map->format.val_bytes);
1211
1212 /* If we're doing a single register write we can probably just
1213 * send the work_buf directly, otherwise try to do a gather
1214 * write.
1215 */
1216 if (val == work_val)
1217 ret = map->bus->write(map->bus_context, map->work_buf,
1218 map->format.reg_bytes +
1219 map->format.pad_bytes +
1220 val_len);
1221 else if (map->bus->gather_write)
1222 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1223 map->format.reg_bytes +
1224 map->format.pad_bytes,
1225 val, val_len);
1226
1227 /* If that didn't work fall back on linearising by hand. */
1228 if (ret == -ENOTSUPP) {
1229 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1230 buf = kzalloc(len, GFP_KERNEL);
1231 if (!buf)
1232 return -ENOMEM;
1233
1234 memcpy(buf, map->work_buf, map->format.reg_bytes);
1235 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1236 val, val_len);
1237 ret = map->bus->write(map->bus_context, buf, len);
1238
1239 kfree(buf);
1240 }
1241
1242 trace_regmap_hw_write_done(map->dev, reg,
1243 val_len / map->format.val_bytes);
1244
1245 return ret;
1246}
1247
1248/**
1249 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1250 *
1251 * @map: Map to check.
1252 */
1253bool regmap_can_raw_write(struct regmap *map)
1254{
1255 return map->bus && map->format.format_val && map->format.format_reg;
1256}
1257EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1258
1259static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1260 unsigned int val)
1261{
1262 int ret;
1263 struct regmap_range_node *range;
1264 struct regmap *map = context;
1265
1266 WARN_ON(!map->bus || !map->format.format_write);
1267
1268 range = _regmap_range_lookup(map, reg);
1269 if (range) {
1270 ret = _regmap_select_page(map, ®, range, 1);
1271 if (ret != 0)
1272 return ret;
1273 }
1274
1275 map->format.format_write(map, reg, val);
1276
1277 trace_regmap_hw_write_start(map->dev, reg, 1);
1278
1279 ret = map->bus->write(map->bus_context, map->work_buf,
1280 map->format.buf_size);
1281
1282 trace_regmap_hw_write_done(map->dev, reg, 1);
1283
1284 return ret;
1285}
1286
1287static int _regmap_bus_raw_write(void *context, unsigned int reg,
1288 unsigned int val)
1289{
1290 struct regmap *map = context;
1291
1292 WARN_ON(!map->bus || !map->format.format_val);
1293
1294 map->format.format_val(map->work_buf + map->format.reg_bytes
1295 + map->format.pad_bytes, val, 0);
1296 return _regmap_raw_write(map, reg,
1297 map->work_buf +
1298 map->format.reg_bytes +
1299 map->format.pad_bytes,
1300 map->format.val_bytes);
1301}
1302
1303static inline void *_regmap_map_get_context(struct regmap *map)
1304{
1305 return (map->bus) ? map : map->bus_context;
1306}
1307
1308int _regmap_write(struct regmap *map, unsigned int reg,
1309 unsigned int val)
1310{
1311 int ret;
1312 void *context = _regmap_map_get_context(map);
1313
1314 if (!regmap_writeable(map, reg))
1315 return -EIO;
1316
1317 if (!map->cache_bypass && !map->defer_caching) {
1318 ret = regcache_write(map, reg, val);
1319 if (ret != 0)
1320 return ret;
1321 if (map->cache_only) {
1322 map->cache_dirty = true;
1323 return 0;
1324 }
1325 }
1326
1327#ifdef LOG_DEVICE
1328 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1329 dev_info(map->dev, "%x <= %x\n", reg, val);
1330#endif
1331
1332 trace_regmap_reg_write(map->dev, reg, val);
1333
1334 return map->reg_write(context, reg, val);
1335}
1336
1337/**
1338 * regmap_write(): Write a value to a single register
1339 *
1340 * @map: Register map to write to
1341 * @reg: Register to write to
1342 * @val: Value to be written
1343 *
1344 * A value of zero will be returned on success, a negative errno will
1345 * be returned in error cases.
1346 */
1347int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1348{
1349 int ret;
1350
1351 if (reg % map->reg_stride)
1352 return -EINVAL;
1353
1354 map->lock(map->lock_arg);
1355
1356 ret = _regmap_write(map, reg, val);
1357
1358 map->unlock(map->lock_arg);
1359
1360 return ret;
1361}
1362EXPORT_SYMBOL_GPL(regmap_write);
1363
1364/**
1365 * regmap_write_async(): Write a value to a single register asynchronously
1366 *
1367 * @map: Register map to write to
1368 * @reg: Register to write to
1369 * @val: Value to be written
1370 *
1371 * A value of zero will be returned on success, a negative errno will
1372 * be returned in error cases.
1373 */
1374int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1375{
1376 int ret;
1377
1378 if (reg % map->reg_stride)
1379 return -EINVAL;
1380
1381 map->lock(map->lock_arg);
1382
1383 map->async = true;
1384
1385 ret = _regmap_write(map, reg, val);
1386
1387 map->async = false;
1388
1389 map->unlock(map->lock_arg);
1390
1391 return ret;
1392}
1393EXPORT_SYMBOL_GPL(regmap_write_async);
1394
1395/**
1396 * regmap_raw_write(): Write raw values to one or more registers
1397 *
1398 * @map: Register map to write to
1399 * @reg: Initial register to write to
1400 * @val: Block of data to be written, laid out for direct transmission to the
1401 * device
1402 * @val_len: Length of data pointed to by val.
1403 *
1404 * This function is intended to be used for things like firmware
1405 * download where a large block of data needs to be transferred to the
1406 * device. No formatting will be done on the data provided.
1407 *
1408 * A value of zero will be returned on success, a negative errno will
1409 * be returned in error cases.
1410 */
1411int regmap_raw_write(struct regmap *map, unsigned int reg,
1412 const void *val, size_t val_len)
1413{
1414 int ret;
1415
1416 if (!regmap_can_raw_write(map))
1417 return -EINVAL;
1418 if (val_len % map->format.val_bytes)
1419 return -EINVAL;
1420
1421 map->lock(map->lock_arg);
1422
1423 ret = _regmap_raw_write(map, reg, val, val_len);
1424
1425 map->unlock(map->lock_arg);
1426
1427 return ret;
1428}
1429EXPORT_SYMBOL_GPL(regmap_raw_write);
1430
1431/**
1432 * regmap_field_write(): Write a value to a single register field
1433 *
1434 * @field: Register field to write to
1435 * @val: Value to be written
1436 *
1437 * A value of zero will be returned on success, a negative errno will
1438 * be returned in error cases.
1439 */
1440int regmap_field_write(struct regmap_field *field, unsigned int val)
1441{
1442 return regmap_update_bits(field->regmap, field->reg,
1443 field->mask, val << field->shift);
1444}
1445EXPORT_SYMBOL_GPL(regmap_field_write);
1446
1447/**
1448 * regmap_field_update_bits(): Perform a read/modify/write cycle
1449 * on the register field
1450 *
1451 * @field: Register field to write to
1452 * @mask: Bitmask to change
1453 * @val: Value to be written
1454 *
1455 * A value of zero will be returned on success, a negative errno will
1456 * be returned in error cases.
1457 */
1458int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1459{
1460 mask = (mask << field->shift) & field->mask;
1461
1462 return regmap_update_bits(field->regmap, field->reg,
1463 mask, val << field->shift);
1464}
1465EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1466
1467/**
1468 * regmap_fields_write(): Write a value to a single register field with port ID
1469 *
1470 * @field: Register field to write to
1471 * @id: port ID
1472 * @val: Value to be written
1473 *
1474 * A value of zero will be returned on success, a negative errno will
1475 * be returned in error cases.
1476 */
1477int regmap_fields_write(struct regmap_field *field, unsigned int id,
1478 unsigned int val)
1479{
1480 if (id >= field->id_size)
1481 return -EINVAL;
1482
1483 return regmap_update_bits(field->regmap,
1484 field->reg + (field->id_offset * id),
1485 field->mask, val << field->shift);
1486}
1487EXPORT_SYMBOL_GPL(regmap_fields_write);
1488
1489/**
1490 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1491 * on the register field
1492 *
1493 * @field: Register field to write to
1494 * @id: port ID
1495 * @mask: Bitmask to change
1496 * @val: Value to be written
1497 *
1498 * A value of zero will be returned on success, a negative errno will
1499 * be returned in error cases.
1500 */
1501int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1502 unsigned int mask, unsigned int val)
1503{
1504 if (id >= field->id_size)
1505 return -EINVAL;
1506
1507 mask = (mask << field->shift) & field->mask;
1508
1509 return regmap_update_bits(field->regmap,
1510 field->reg + (field->id_offset * id),
1511 mask, val << field->shift);
1512}
1513EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1514
1515/*
1516 * regmap_bulk_write(): Write multiple registers to the device
1517 *
1518 * @map: Register map to write to
1519 * @reg: First register to be write from
1520 * @val: Block of data to be written, in native register size for device
1521 * @val_count: Number of registers to write
1522 *
1523 * This function is intended to be used for writing a large block of
1524 * data to the device either in single transfer or multiple transfer.
1525 *
1526 * A value of zero will be returned on success, a negative errno will
1527 * be returned in error cases.
1528 */
1529int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1530 size_t val_count)
1531{
1532 int ret = 0, i;
1533 size_t val_bytes = map->format.val_bytes;
1534
1535 if (map->bus && !map->format.parse_inplace)
1536 return -EINVAL;
1537 if (reg % map->reg_stride)
1538 return -EINVAL;
1539
1540 /*
1541 * Some devices don't support bulk write, for
1542 * them we have a series of single write operations.
1543 */
1544 if (!map->bus || map->use_single_rw) {
1545 map->lock(map->lock_arg);
1546 for (i = 0; i < val_count; i++) {
1547 unsigned int ival;
1548
1549 switch (val_bytes) {
1550 case 1:
1551 ival = *(u8 *)(val + (i * val_bytes));
1552 break;
1553 case 2:
1554 ival = *(u16 *)(val + (i * val_bytes));
1555 break;
1556 case 4:
1557 ival = *(u32 *)(val + (i * val_bytes));
1558 break;
1559#ifdef CONFIG_64BIT
1560 case 8:
1561 ival = *(u64 *)(val + (i * val_bytes));
1562 break;
1563#endif
1564 default:
1565 ret = -EINVAL;
1566 goto out;
1567 }
1568
1569 ret = _regmap_write(map, reg + (i * map->reg_stride),
1570 ival);
1571 if (ret != 0)
1572 goto out;
1573 }
1574out:
1575 map->unlock(map->lock_arg);
1576 } else {
1577 void *wval;
1578
1579 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1580 if (!wval) {
1581 dev_err(map->dev, "Error in memory allocation\n");
1582 return -ENOMEM;
1583 }
1584 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1585 map->format.parse_inplace(wval + i);
1586
1587 map->lock(map->lock_arg);
1588 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
1589 map->unlock(map->lock_arg);
1590
1591 kfree(wval);
1592 }
1593 return ret;
1594}
1595EXPORT_SYMBOL_GPL(regmap_bulk_write);
1596
1597/*
1598 * _regmap_raw_multi_reg_write()
1599 *
1600 * the (register,newvalue) pairs in regs have not been formatted, but
1601 * they are all in the same page and have been changed to being page
1602 * relative. The page register has been written if that was neccessary.
1603 */
1604static int _regmap_raw_multi_reg_write(struct regmap *map,
1605 const struct reg_default *regs,
1606 size_t num_regs)
1607{
1608 int ret;
1609 void *buf;
1610 int i;
1611 u8 *u8;
1612 size_t val_bytes = map->format.val_bytes;
1613 size_t reg_bytes = map->format.reg_bytes;
1614 size_t pad_bytes = map->format.pad_bytes;
1615 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1616 size_t len = pair_size * num_regs;
1617
1618 buf = kzalloc(len, GFP_KERNEL);
1619 if (!buf)
1620 return -ENOMEM;
1621
1622 /* We have to linearise by hand. */
1623
1624 u8 = buf;
1625
1626 for (i = 0; i < num_regs; i++) {
1627 int reg = regs[i].reg;
1628 int val = regs[i].def;
1629 trace_regmap_hw_write_start(map->dev, reg, 1);
1630 map->format.format_reg(u8, reg, map->reg_shift);
1631 u8 += reg_bytes + pad_bytes;
1632 map->format.format_val(u8, val, 0);
1633 u8 += val_bytes;
1634 }
1635 u8 = buf;
1636 *u8 |= map->write_flag_mask;
1637
1638 ret = map->bus->write(map->bus_context, buf, len);
1639
1640 kfree(buf);
1641
1642 for (i = 0; i < num_regs; i++) {
1643 int reg = regs[i].reg;
1644 trace_regmap_hw_write_done(map->dev, reg, 1);
1645 }
1646 return ret;
1647}
1648
1649static unsigned int _regmap_register_page(struct regmap *map,
1650 unsigned int reg,
1651 struct regmap_range_node *range)
1652{
1653 unsigned int win_page = (reg - range->range_min) / range->window_len;
1654
1655 return win_page;
1656}
1657
1658static int _regmap_range_multi_paged_reg_write(struct regmap *map,
1659 struct reg_default *regs,
1660 size_t num_regs)
1661{
1662 int ret;
1663 int i, n;
1664 struct reg_default *base;
1665 unsigned int this_page;
1666 /*
1667 * the set of registers are not neccessarily in order, but
1668 * since the order of write must be preserved this algorithm
1669 * chops the set each time the page changes
1670 */
1671 base = regs;
1672 for (i = 0, n = 0; i < num_regs; i++, n++) {
1673 unsigned int reg = regs[i].reg;
1674 struct regmap_range_node *range;
1675
1676 range = _regmap_range_lookup(map, reg);
1677 if (range) {
1678 unsigned int win_page = _regmap_register_page(map, reg,
1679 range);
1680
1681 if (i == 0)
1682 this_page = win_page;
1683 if (win_page != this_page) {
1684 this_page = win_page;
1685 ret = _regmap_raw_multi_reg_write(map, base, n);
1686 if (ret != 0)
1687 return ret;
1688 base += n;
1689 n = 0;
1690 }
1691 ret = _regmap_select_page(map, &base[n].reg, range, 1);
1692 if (ret != 0)
1693 return ret;
1694 }
1695 }
1696 if (n > 0)
1697 return _regmap_raw_multi_reg_write(map, base, n);
1698 return 0;
1699}
1700
1701static int _regmap_multi_reg_write(struct regmap *map,
1702 const struct reg_default *regs,
1703 size_t num_regs)
1704{
1705 int i;
1706 int ret;
1707
1708 if (!map->can_multi_write) {
1709 for (i = 0; i < num_regs; i++) {
1710 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1711 if (ret != 0)
1712 return ret;
1713 }
1714 return 0;
1715 }
1716
1717 if (!map->format.parse_inplace)
1718 return -EINVAL;
1719
1720 if (map->writeable_reg)
1721 for (i = 0; i < num_regs; i++) {
1722 int reg = regs[i].reg;
1723 if (!map->writeable_reg(map->dev, reg))
1724 return -EINVAL;
1725 if (reg % map->reg_stride)
1726 return -EINVAL;
1727 }
1728
1729 if (!map->cache_bypass) {
1730 for (i = 0; i < num_regs; i++) {
1731 unsigned int val = regs[i].def;
1732 unsigned int reg = regs[i].reg;
1733 ret = regcache_write(map, reg, val);
1734 if (ret) {
1735 dev_err(map->dev,
1736 "Error in caching of register: %x ret: %d\n",
1737 reg, ret);
1738 return ret;
1739 }
1740 }
1741 if (map->cache_only) {
1742 map->cache_dirty = true;
1743 return 0;
1744 }
1745 }
1746
1747 WARN_ON(!map->bus);
1748
1749 for (i = 0; i < num_regs; i++) {
1750 unsigned int reg = regs[i].reg;
1751 struct regmap_range_node *range;
1752 range = _regmap_range_lookup(map, reg);
1753 if (range) {
1754 size_t len = sizeof(struct reg_default)*num_regs;
1755 struct reg_default *base = kmemdup(regs, len,
1756 GFP_KERNEL);
1757 if (!base)
1758 return -ENOMEM;
1759 ret = _regmap_range_multi_paged_reg_write(map, base,
1760 num_regs);
1761 kfree(base);
1762
1763 return ret;
1764 }
1765 }
1766 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1767}
1768
1769/*
1770 * regmap_multi_reg_write(): Write multiple registers to the device
1771 *
1772 * where the set of register,value pairs are supplied in any order,
1773 * possibly not all in a single range.
1774 *
1775 * @map: Register map to write to
1776 * @regs: Array of structures containing register,value to be written
1777 * @num_regs: Number of registers to write
1778 *
1779 * The 'normal' block write mode will send ultimately send data on the
1780 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
1781 * addressed. However, this alternative block multi write mode will send
1782 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
1783 * must of course support the mode.
1784 *
1785 * A value of zero will be returned on success, a negative errno will be
1786 * returned in error cases.
1787 */
1788int regmap_multi_reg_write(struct regmap *map, const struct reg_default *regs,
1789 int num_regs)
1790{
1791 int ret;
1792
1793 map->lock(map->lock_arg);
1794
1795 ret = _regmap_multi_reg_write(map, regs, num_regs);
1796
1797 map->unlock(map->lock_arg);
1798
1799 return ret;
1800}
1801EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
1802
1803/*
1804 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
1805 * device but not the cache
1806 *
1807 * where the set of register are supplied in any order
1808 *
1809 * @map: Register map to write to
1810 * @regs: Array of structures containing register,value to be written
1811 * @num_regs: Number of registers to write
1812 *
1813 * This function is intended to be used for writing a large block of data
1814 * atomically to the device in single transfer for those I2C client devices
1815 * that implement this alternative block write mode.
1816 *
1817 * A value of zero will be returned on success, a negative errno will
1818 * be returned in error cases.
1819 */
1820int regmap_multi_reg_write_bypassed(struct regmap *map,
1821 const struct reg_default *regs,
1822 int num_regs)
1823{
1824 int ret;
1825 bool bypass;
1826
1827 map->lock(map->lock_arg);
1828
1829 bypass = map->cache_bypass;
1830 map->cache_bypass = true;
1831
1832 ret = _regmap_multi_reg_write(map, regs, num_regs);
1833
1834 map->cache_bypass = bypass;
1835
1836 map->unlock(map->lock_arg);
1837
1838 return ret;
1839}
1840EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
1841
1842/**
1843 * regmap_raw_write_async(): Write raw values to one or more registers
1844 * asynchronously
1845 *
1846 * @map: Register map to write to
1847 * @reg: Initial register to write to
1848 * @val: Block of data to be written, laid out for direct transmission to the
1849 * device. Must be valid until regmap_async_complete() is called.
1850 * @val_len: Length of data pointed to by val.
1851 *
1852 * This function is intended to be used for things like firmware
1853 * download where a large block of data needs to be transferred to the
1854 * device. No formatting will be done on the data provided.
1855 *
1856 * If supported by the underlying bus the write will be scheduled
1857 * asynchronously, helping maximise I/O speed on higher speed buses
1858 * like SPI. regmap_async_complete() can be called to ensure that all
1859 * asynchrnous writes have been completed.
1860 *
1861 * A value of zero will be returned on success, a negative errno will
1862 * be returned in error cases.
1863 */
1864int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1865 const void *val, size_t val_len)
1866{
1867 int ret;
1868
1869 if (val_len % map->format.val_bytes)
1870 return -EINVAL;
1871 if (reg % map->reg_stride)
1872 return -EINVAL;
1873
1874 map->lock(map->lock_arg);
1875
1876 map->async = true;
1877
1878 ret = _regmap_raw_write(map, reg, val, val_len);
1879
1880 map->async = false;
1881
1882 map->unlock(map->lock_arg);
1883
1884 return ret;
1885}
1886EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1887
1888static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1889 unsigned int val_len)
1890{
1891 struct regmap_range_node *range;
1892 u8 *u8 = map->work_buf;
1893 int ret;
1894
1895 WARN_ON(!map->bus);
1896
1897 range = _regmap_range_lookup(map, reg);
1898 if (range) {
1899 ret = _regmap_select_page(map, ®, range,
1900 val_len / map->format.val_bytes);
1901 if (ret != 0)
1902 return ret;
1903 }
1904
1905 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1906
1907 /*
1908 * Some buses or devices flag reads by setting the high bits in the
1909 * register addresss; since it's always the high bits for all
1910 * current formats we can do this here rather than in
1911 * formatting. This may break if we get interesting formats.
1912 */
1913 u8[0] |= map->read_flag_mask;
1914
1915 trace_regmap_hw_read_start(map->dev, reg,
1916 val_len / map->format.val_bytes);
1917
1918 ret = map->bus->read(map->bus_context, map->work_buf,
1919 map->format.reg_bytes + map->format.pad_bytes,
1920 val, val_len);
1921
1922 trace_regmap_hw_read_done(map->dev, reg,
1923 val_len / map->format.val_bytes);
1924
1925 return ret;
1926}
1927
1928static int _regmap_bus_read(void *context, unsigned int reg,
1929 unsigned int *val)
1930{
1931 int ret;
1932 struct regmap *map = context;
1933
1934 if (!map->format.parse_val)
1935 return -EINVAL;
1936
1937 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1938 if (ret == 0)
1939 *val = map->format.parse_val(map->work_buf);
1940
1941 return ret;
1942}
1943
1944static int _regmap_read(struct regmap *map, unsigned int reg,
1945 unsigned int *val)
1946{
1947 int ret;
1948 void *context = _regmap_map_get_context(map);
1949
1950 WARN_ON(!map->reg_read);
1951
1952 if (!map->cache_bypass) {
1953 ret = regcache_read(map, reg, val);
1954 if (ret == 0)
1955 return 0;
1956 }
1957
1958 if (map->cache_only)
1959 return -EBUSY;
1960
1961 if (!regmap_readable(map, reg))
1962 return -EIO;
1963
1964 ret = map->reg_read(context, reg, val);
1965 if (ret == 0) {
1966#ifdef LOG_DEVICE
1967 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1968 dev_info(map->dev, "%x => %x\n", reg, *val);
1969#endif
1970
1971 trace_regmap_reg_read(map->dev, reg, *val);
1972
1973 if (!map->cache_bypass)
1974 regcache_write(map, reg, *val);
1975 }
1976
1977 return ret;
1978}
1979
1980/**
1981 * regmap_read(): Read a value from a single register
1982 *
1983 * @map: Register map to read from
1984 * @reg: Register to be read from
1985 * @val: Pointer to store read value
1986 *
1987 * A value of zero will be returned on success, a negative errno will
1988 * be returned in error cases.
1989 */
1990int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1991{
1992 int ret;
1993
1994 if (reg % map->reg_stride)
1995 return -EINVAL;
1996
1997 map->lock(map->lock_arg);
1998
1999 ret = _regmap_read(map, reg, val);
2000
2001 map->unlock(map->lock_arg);
2002
2003 return ret;
2004}
2005EXPORT_SYMBOL_GPL(regmap_read);
2006
2007/**
2008 * regmap_raw_read(): Read raw data from the device
2009 *
2010 * @map: Register map to read from
2011 * @reg: First register to be read from
2012 * @val: Pointer to store read value
2013 * @val_len: Size of data to read
2014 *
2015 * A value of zero will be returned on success, a negative errno will
2016 * be returned in error cases.
2017 */
2018int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2019 size_t val_len)
2020{
2021 size_t val_bytes = map->format.val_bytes;
2022 size_t val_count = val_len / val_bytes;
2023 unsigned int v;
2024 int ret, i;
2025
2026 if (!map->bus)
2027 return -EINVAL;
2028 if (val_len % map->format.val_bytes)
2029 return -EINVAL;
2030 if (reg % map->reg_stride)
2031 return -EINVAL;
2032
2033 map->lock(map->lock_arg);
2034
2035 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2036 map->cache_type == REGCACHE_NONE) {
2037 /* Physical block read if there's no cache involved */
2038 ret = _regmap_raw_read(map, reg, val, val_len);
2039
2040 } else {
2041 /* Otherwise go word by word for the cache; should be low
2042 * cost as we expect to hit the cache.
2043 */
2044 for (i = 0; i < val_count; i++) {
2045 ret = _regmap_read(map, reg + (i * map->reg_stride),
2046 &v);
2047 if (ret != 0)
2048 goto out;
2049
2050 map->format.format_val(val + (i * val_bytes), v, 0);
2051 }
2052 }
2053
2054 out:
2055 map->unlock(map->lock_arg);
2056
2057 return ret;
2058}
2059EXPORT_SYMBOL_GPL(regmap_raw_read);
2060
2061/**
2062 * regmap_field_read(): Read a value to a single register field
2063 *
2064 * @field: Register field to read from
2065 * @val: Pointer to store read value
2066 *
2067 * A value of zero will be returned on success, a negative errno will
2068 * be returned in error cases.
2069 */
2070int regmap_field_read(struct regmap_field *field, unsigned int *val)
2071{
2072 int ret;
2073 unsigned int reg_val;
2074 ret = regmap_read(field->regmap, field->reg, ®_val);
2075 if (ret != 0)
2076 return ret;
2077
2078 reg_val &= field->mask;
2079 reg_val >>= field->shift;
2080 *val = reg_val;
2081
2082 return ret;
2083}
2084EXPORT_SYMBOL_GPL(regmap_field_read);
2085
2086/**
2087 * regmap_fields_read(): Read a value to a single register field with port ID
2088 *
2089 * @field: Register field to read from
2090 * @id: port ID
2091 * @val: Pointer to store read value
2092 *
2093 * A value of zero will be returned on success, a negative errno will
2094 * be returned in error cases.
2095 */
2096int regmap_fields_read(struct regmap_field *field, unsigned int id,
2097 unsigned int *val)
2098{
2099 int ret;
2100 unsigned int reg_val;
2101
2102 if (id >= field->id_size)
2103 return -EINVAL;
2104
2105 ret = regmap_read(field->regmap,
2106 field->reg + (field->id_offset * id),
2107 ®_val);
2108 if (ret != 0)
2109 return ret;
2110
2111 reg_val &= field->mask;
2112 reg_val >>= field->shift;
2113 *val = reg_val;
2114
2115 return ret;
2116}
2117EXPORT_SYMBOL_GPL(regmap_fields_read);
2118
2119/**
2120 * regmap_bulk_read(): Read multiple registers from the device
2121 *
2122 * @map: Register map to read from
2123 * @reg: First register to be read from
2124 * @val: Pointer to store read value, in native register size for device
2125 * @val_count: Number of registers to read
2126 *
2127 * A value of zero will be returned on success, a negative errno will
2128 * be returned in error cases.
2129 */
2130int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2131 size_t val_count)
2132{
2133 int ret, i;
2134 size_t val_bytes = map->format.val_bytes;
2135 bool vol = regmap_volatile_range(map, reg, val_count);
2136
2137 if (reg % map->reg_stride)
2138 return -EINVAL;
2139
2140 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2141 /*
2142 * Some devices does not support bulk read, for
2143 * them we have a series of single read operations.
2144 */
2145 if (map->use_single_rw) {
2146 for (i = 0; i < val_count; i++) {
2147 ret = regmap_raw_read(map,
2148 reg + (i * map->reg_stride),
2149 val + (i * val_bytes),
2150 val_bytes);
2151 if (ret != 0)
2152 return ret;
2153 }
2154 } else {
2155 ret = regmap_raw_read(map, reg, val,
2156 val_bytes * val_count);
2157 if (ret != 0)
2158 return ret;
2159 }
2160
2161 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2162 map->format.parse_inplace(val + i);
2163 } else {
2164 for (i = 0; i < val_count; i++) {
2165 unsigned int ival;
2166 ret = regmap_read(map, reg + (i * map->reg_stride),
2167 &ival);
2168 if (ret != 0)
2169 return ret;
2170 memcpy(val + (i * val_bytes), &ival, val_bytes);
2171 }
2172 }
2173
2174 return 0;
2175}
2176EXPORT_SYMBOL_GPL(regmap_bulk_read);
2177
2178static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2179 unsigned int mask, unsigned int val,
2180 bool *change)
2181{
2182 int ret;
2183 unsigned int tmp, orig;
2184
2185 ret = _regmap_read(map, reg, &orig);
2186 if (ret != 0)
2187 return ret;
2188
2189 tmp = orig & ~mask;
2190 tmp |= val & mask;
2191
2192 if (tmp != orig) {
2193 ret = _regmap_write(map, reg, tmp);
2194 if (change)
2195 *change = true;
2196 } else {
2197 if (change)
2198 *change = false;
2199 }
2200
2201 return ret;
2202}
2203
2204/**
2205 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2206 *
2207 * @map: Register map to update
2208 * @reg: Register to update
2209 * @mask: Bitmask to change
2210 * @val: New value for bitmask
2211 *
2212 * Returns zero for success, a negative number on error.
2213 */
2214int regmap_update_bits(struct regmap *map, unsigned int reg,
2215 unsigned int mask, unsigned int val)
2216{
2217 int ret;
2218
2219 map->lock(map->lock_arg);
2220 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2221 map->unlock(map->lock_arg);
2222
2223 return ret;
2224}
2225EXPORT_SYMBOL_GPL(regmap_update_bits);
2226
2227/**
2228 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2229 * map asynchronously
2230 *
2231 * @map: Register map to update
2232 * @reg: Register to update
2233 * @mask: Bitmask to change
2234 * @val: New value for bitmask
2235 *
2236 * With most buses the read must be done synchronously so this is most
2237 * useful for devices with a cache which do not need to interact with
2238 * the hardware to determine the current register value.
2239 *
2240 * Returns zero for success, a negative number on error.
2241 */
2242int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2243 unsigned int mask, unsigned int val)
2244{
2245 int ret;
2246
2247 map->lock(map->lock_arg);
2248
2249 map->async = true;
2250
2251 ret = _regmap_update_bits(map, reg, mask, val, NULL);
2252
2253 map->async = false;
2254
2255 map->unlock(map->lock_arg);
2256
2257 return ret;
2258}
2259EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2260
2261/**
2262 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2263 * register map and report if updated
2264 *
2265 * @map: Register map to update
2266 * @reg: Register to update
2267 * @mask: Bitmask to change
2268 * @val: New value for bitmask
2269 * @change: Boolean indicating if a write was done
2270 *
2271 * Returns zero for success, a negative number on error.
2272 */
2273int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2274 unsigned int mask, unsigned int val,
2275 bool *change)
2276{
2277 int ret;
2278
2279 map->lock(map->lock_arg);
2280 ret = _regmap_update_bits(map, reg, mask, val, change);
2281 map->unlock(map->lock_arg);
2282 return ret;
2283}
2284EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2285
2286/**
2287 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2288 * register map asynchronously and report if
2289 * updated
2290 *
2291 * @map: Register map to update
2292 * @reg: Register to update
2293 * @mask: Bitmask to change
2294 * @val: New value for bitmask
2295 * @change: Boolean indicating if a write was done
2296 *
2297 * With most buses the read must be done synchronously so this is most
2298 * useful for devices with a cache which do not need to interact with
2299 * the hardware to determine the current register value.
2300 *
2301 * Returns zero for success, a negative number on error.
2302 */
2303int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2304 unsigned int mask, unsigned int val,
2305 bool *change)
2306{
2307 int ret;
2308
2309 map->lock(map->lock_arg);
2310
2311 map->async = true;
2312
2313 ret = _regmap_update_bits(map, reg, mask, val, change);
2314
2315 map->async = false;
2316
2317 map->unlock(map->lock_arg);
2318
2319 return ret;
2320}
2321EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2322
2323void regmap_async_complete_cb(struct regmap_async *async, int ret)
2324{
2325 struct regmap *map = async->map;
2326 bool wake;
2327
2328 trace_regmap_async_io_complete(map->dev);
2329
2330 spin_lock(&map->async_lock);
2331 list_move(&async->list, &map->async_free);
2332 wake = list_empty(&map->async_list);
2333
2334 if (ret != 0)
2335 map->async_ret = ret;
2336
2337 spin_unlock(&map->async_lock);
2338
2339 if (wake)
2340 wake_up(&map->async_waitq);
2341}
2342EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2343
2344static int regmap_async_is_done(struct regmap *map)
2345{
2346 unsigned long flags;
2347 int ret;
2348
2349 spin_lock_irqsave(&map->async_lock, flags);
2350 ret = list_empty(&map->async_list);
2351 spin_unlock_irqrestore(&map->async_lock, flags);
2352
2353 return ret;
2354}
2355
2356/**
2357 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2358 *
2359 * @map: Map to operate on.
2360 *
2361 * Blocks until any pending asynchronous I/O has completed. Returns
2362 * an error code for any failed I/O operations.
2363 */
2364int regmap_async_complete(struct regmap *map)
2365{
2366 unsigned long flags;
2367 int ret;
2368
2369 /* Nothing to do with no async support */
2370 if (!map->bus || !map->bus->async_write)
2371 return 0;
2372
2373 trace_regmap_async_complete_start(map->dev);
2374
2375 wait_event(map->async_waitq, regmap_async_is_done(map));
2376
2377 spin_lock_irqsave(&map->async_lock, flags);
2378 ret = map->async_ret;
2379 map->async_ret = 0;
2380 spin_unlock_irqrestore(&map->async_lock, flags);
2381
2382 trace_regmap_async_complete_done(map->dev);
2383
2384 return ret;
2385}
2386EXPORT_SYMBOL_GPL(regmap_async_complete);
2387
2388/**
2389 * regmap_register_patch: Register and apply register updates to be applied
2390 * on device initialistion
2391 *
2392 * @map: Register map to apply updates to.
2393 * @regs: Values to update.
2394 * @num_regs: Number of entries in regs.
2395 *
2396 * Register a set of register updates to be applied to the device
2397 * whenever the device registers are synchronised with the cache and
2398 * apply them immediately. Typically this is used to apply
2399 * corrections to be applied to the device defaults on startup, such
2400 * as the updates some vendors provide to undocumented registers.
2401 *
2402 * The caller must ensure that this function cannot be called
2403 * concurrently with either itself or regcache_sync().
2404 */
2405int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
2406 int num_regs)
2407{
2408 struct reg_default *p;
2409 int ret;
2410 bool bypass;
2411
2412 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2413 num_regs))
2414 return 0;
2415
2416 p = krealloc(map->patch,
2417 sizeof(struct reg_default) * (map->patch_regs + num_regs),
2418 GFP_KERNEL);
2419 if (p) {
2420 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2421 map->patch = p;
2422 map->patch_regs += num_regs;
2423 } else {
2424 return -ENOMEM;
2425 }
2426
2427 map->lock(map->lock_arg);
2428
2429 bypass = map->cache_bypass;
2430
2431 map->cache_bypass = true;
2432 map->async = true;
2433
2434 ret = _regmap_multi_reg_write(map, regs, num_regs);
2435 if (ret != 0)
2436 goto out;
2437
2438out:
2439 map->async = false;
2440 map->cache_bypass = bypass;
2441
2442 map->unlock(map->lock_arg);
2443
2444 regmap_async_complete(map);
2445
2446 return ret;
2447}
2448EXPORT_SYMBOL_GPL(regmap_register_patch);
2449
2450/*
2451 * regmap_get_val_bytes(): Report the size of a register value
2452 *
2453 * Report the size of a register value, mainly intended to for use by
2454 * generic infrastructure built on top of regmap.
2455 */
2456int regmap_get_val_bytes(struct regmap *map)
2457{
2458 if (map->format.format_write)
2459 return -EINVAL;
2460
2461 return map->format.val_bytes;
2462}
2463EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2464
2465int regmap_parse_val(struct regmap *map, const void *buf,
2466 unsigned int *val)
2467{
2468 if (!map->format.parse_val)
2469 return -EINVAL;
2470
2471 *val = map->format.parse_val(buf);
2472
2473 return 0;
2474}
2475EXPORT_SYMBOL_GPL(regmap_parse_val);
2476
2477static int __init regmap_initcall(void)
2478{
2479 regmap_debugfs_initcall();
2480
2481 return 0;
2482}
2483postcore_initcall(regmap_initcall);