Loading...
1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
39#include <linux/sched.h> /* need_resched() */
40#include <linux/pm_qos_params.h>
41#include <linux/clockchips.h>
42#include <linux/cpuidle.h>
43#include <linux/irqflags.h>
44
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
60#include <asm/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66ACPI_MODULE_NAME("processor_idle");
67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
74static unsigned int nocst __read_mostly;
75module_param(nocst, uint, 0000);
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
78
79static unsigned int latency_factor __read_mostly = 2;
80module_param(latency_factor, uint, 0644);
81
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
95static int set_max_cstate(const struct dmi_system_id *id)
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104 max_cstate = (long)id->driver_data;
105
106 return 0;
107}
108
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
124 {},
125};
126
127
128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
143 }
144 current_thread_info()->status |= TS_POLLING;
145}
146
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
154 */
155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
166
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
176}
177
178static void __lapic_timer_propagate_broadcast(void *arg)
179{
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
187}
188
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
195/* Power(C) State timer broadcast control */
196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
209}
210
211#else
212
213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
221
222#endif
223
224/*
225 * Suspend / resume control
226 */
227static int acpi_idle_suspend;
228static u32 saved_bm_rld;
229
230static void acpi_idle_bm_rld_save(void)
231{
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233}
234static void acpi_idle_bm_rld_restore(void)
235{
236 u32 resumed_bm_rld;
237
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239
240 if (resumed_bm_rld != saved_bm_rld)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
242}
243
244int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245{
246 if (acpi_idle_suspend == 1)
247 return 0;
248
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend = 1;
251 return 0;
252}
253
254int acpi_processor_resume(struct acpi_device * device)
255{
256 if (acpi_idle_suspend == 0)
257 return 0;
258
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend = 0;
261 return 0;
262}
263
264#if defined(CONFIG_X86)
265static void tsc_check_state(int state)
266{
267 switch (boot_cpu_data.x86_vendor) {
268 case X86_VENDOR_AMD:
269 case X86_VENDOR_INTEL:
270 /*
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
273 */
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
275 return;
276
277 /*FALL THROUGH*/
278 default:
279 /* TSC could halt in idle, so notify users */
280 if (state > ACPI_STATE_C1)
281 mark_tsc_unstable("TSC halts in idle");
282 }
283}
284#else
285static void tsc_check_state(int state) { return; }
286#endif
287
288static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
289{
290
291 if (!pr)
292 return -EINVAL;
293
294 if (!pr->pblk)
295 return -ENODEV;
296
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
299 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
300
301#ifndef CONFIG_HOTPLUG_CPU
302 /*
303 * Check for P_LVL2_UP flag before entering C2 and above on
304 * an SMP system.
305 */
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
308 return -ENODEV;
309#endif
310
311 /* determine C2 and C3 address from pblk */
312 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
313 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
314
315 /* determine latencies from FADT */
316 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
317 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
318
319 /*
320 * FADT specified C2 latency must be less than or equal to
321 * 100 microseconds.
322 */
323 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
326 /* invalidate C2 */
327 pr->power.states[ACPI_STATE_C2].address = 0;
328 }
329
330 /*
331 * FADT supplied C3 latency must be less than or equal to
332 * 1000 microseconds.
333 */
334 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
337 /* invalidate C3 */
338 pr->power.states[ACPI_STATE_C3].address = 0;
339 }
340
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr->power.states[ACPI_STATE_C2].address,
344 pr->power.states[ACPI_STATE_C3].address));
345
346 return 0;
347}
348
349static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
350{
351 if (!pr->power.states[ACPI_STATE_C1].valid) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
355 pr->power.states[ACPI_STATE_C1].valid = 1;
356 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
357 }
358 /* the C0 state only exists as a filler in our array */
359 pr->power.states[ACPI_STATE_C0].valid = 1;
360 return 0;
361}
362
363static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
364{
365 acpi_status status = 0;
366 u64 count;
367 int current_count;
368 int i;
369 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
370 union acpi_object *cst;
371
372
373 if (nocst)
374 return -ENODEV;
375
376 current_count = 0;
377
378 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
379 if (ACPI_FAILURE(status)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
381 return -ENODEV;
382 }
383
384 cst = buffer.pointer;
385
386 /* There must be at least 2 elements */
387 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
388 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
389 status = -EFAULT;
390 goto end;
391 }
392
393 count = cst->package.elements[0].integer.value;
394
395 /* Validate number of power states. */
396 if (count < 1 || count != cst->package.count - 1) {
397 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
398 status = -EFAULT;
399 goto end;
400 }
401
402 /* Tell driver that at least _CST is supported. */
403 pr->flags.has_cst = 1;
404
405 for (i = 1; i <= count; i++) {
406 union acpi_object *element;
407 union acpi_object *obj;
408 struct acpi_power_register *reg;
409 struct acpi_processor_cx cx;
410
411 memset(&cx, 0, sizeof(cx));
412
413 element = &(cst->package.elements[i]);
414 if (element->type != ACPI_TYPE_PACKAGE)
415 continue;
416
417 if (element->package.count != 4)
418 continue;
419
420 obj = &(element->package.elements[0]);
421
422 if (obj->type != ACPI_TYPE_BUFFER)
423 continue;
424
425 reg = (struct acpi_power_register *)obj->buffer.pointer;
426
427 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
428 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
429 continue;
430
431 /* There should be an easy way to extract an integer... */
432 obj = &(element->package.elements[1]);
433 if (obj->type != ACPI_TYPE_INTEGER)
434 continue;
435
436 cx.type = obj->integer.value;
437 /*
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
440 */
441 if (i == 1 && cx.type != ACPI_STATE_C1)
442 current_count++;
443
444 cx.address = reg->address;
445 cx.index = current_count + 1;
446
447 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
448 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr->id, &cx, reg) == 0) {
451 cx.entry_method = ACPI_CSTATE_FFH;
452 } else if (cx.type == ACPI_STATE_C1) {
453 /*
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
458 */
459 cx.entry_method = ACPI_CSTATE_HALT;
460 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
461 } else {
462 continue;
463 }
464 if (cx.type == ACPI_STATE_C1 &&
465 (boot_option_idle_override == IDLE_NOMWAIT)) {
466 /*
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
474 * CSTATE_HALT.
475 */
476 cx.entry_method = ACPI_CSTATE_HALT;
477 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
478 }
479 } else {
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
481 cx.address);
482 }
483
484 if (cx.type == ACPI_STATE_C1) {
485 cx.valid = 1;
486 }
487
488 obj = &(element->package.elements[2]);
489 if (obj->type != ACPI_TYPE_INTEGER)
490 continue;
491
492 cx.latency = obj->integer.value;
493
494 obj = &(element->package.elements[3]);
495 if (obj->type != ACPI_TYPE_INTEGER)
496 continue;
497
498 cx.power = obj->integer.value;
499
500 current_count++;
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
502
503 /*
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
506 */
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
508 printk(KERN_WARNING
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
511 printk(KERN_WARNING
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
513 break;
514 }
515 }
516
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
518 current_count));
519
520 /* Validate number of power states discovered */
521 if (current_count < 2)
522 status = -EFAULT;
523
524 end:
525 kfree(buffer.pointer);
526
527 return status;
528}
529
530static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
532{
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
535
536
537 if (!cx->address)
538 return;
539
540 /*
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
546 */
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
550 return;
551 }
552
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
559 } else {
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
562 }
563
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
570 return;
571 } else {
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
575 }
576 }
577 } else {
578 /*
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
581 */
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
586 return;
587 }
588 }
589
590 /*
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
595 */
596 cx->valid = 1;
597
598 cx->latency_ticks = cx->latency;
599 /*
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
606 */
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
608
609 return;
610}
611
612static int acpi_processor_power_verify(struct acpi_processor *pr)
613{
614 unsigned int i;
615 unsigned int working = 0;
616
617 pr->power.timer_broadcast_on_state = INT_MAX;
618
619 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
620 struct acpi_processor_cx *cx = &pr->power.states[i];
621
622 switch (cx->type) {
623 case ACPI_STATE_C1:
624 cx->valid = 1;
625 break;
626
627 case ACPI_STATE_C2:
628 if (!cx->address)
629 break;
630 cx->valid = 1;
631 cx->latency_ticks = cx->latency; /* Normalize latency */
632 break;
633
634 case ACPI_STATE_C3:
635 acpi_processor_power_verify_c3(pr, cx);
636 break;
637 }
638 if (!cx->valid)
639 continue;
640
641 lapic_timer_check_state(i, pr, cx);
642 tsc_check_state(cx->type);
643 working++;
644 }
645
646 lapic_timer_propagate_broadcast(pr);
647
648 return (working);
649}
650
651static int acpi_processor_get_power_info(struct acpi_processor *pr)
652{
653 unsigned int i;
654 int result;
655
656
657 /* NOTE: the idle thread may not be running while calling
658 * this function */
659
660 /* Zero initialize all the C-states info. */
661 memset(pr->power.states, 0, sizeof(pr->power.states));
662
663 result = acpi_processor_get_power_info_cst(pr);
664 if (result == -ENODEV)
665 result = acpi_processor_get_power_info_fadt(pr);
666
667 if (result)
668 return result;
669
670 acpi_processor_get_power_info_default(pr);
671
672 pr->power.count = acpi_processor_power_verify(pr);
673
674 /*
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
677 */
678 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
679 if (pr->power.states[i].valid) {
680 pr->power.count = i;
681 if (pr->power.states[i].type >= ACPI_STATE_C2)
682 pr->flags.power = 1;
683 }
684 }
685
686 return 0;
687}
688
689/**
690 * acpi_idle_bm_check - checks if bus master activity was detected
691 */
692static int acpi_idle_bm_check(void)
693{
694 u32 bm_status = 0;
695
696 if (bm_check_disable)
697 return 0;
698
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
700 if (bm_status)
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
702 /*
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
706 */
707 else if (errata.piix4.bmisx) {
708 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
709 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
710 bm_status = 1;
711 }
712 return bm_status;
713}
714
715/**
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
717 * @cx: cstate data
718 *
719 * Caller disables interrupt before call and enables interrupt after return.
720 */
721static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
722{
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx->entry_method == ACPI_CSTATE_FFH) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx);
728 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
729 acpi_safe_halt();
730 } else {
731 /* IO port based C-state */
732 inb(cx->address);
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT.xpm_timer_block.address);
737 }
738 start_critical_timings();
739}
740
741/**
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @state: the state data
745 *
746 * This is equivalent to the HALT instruction.
747 */
748static int acpi_idle_enter_c1(struct cpuidle_device *dev,
749 struct cpuidle_state *state)
750{
751 ktime_t kt1, kt2;
752 s64 idle_time;
753 struct acpi_processor *pr;
754 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
755
756 pr = __this_cpu_read(processors);
757
758 if (unlikely(!pr))
759 return 0;
760
761 local_irq_disable();
762
763 /* Do not access any ACPI IO ports in suspend path */
764 if (acpi_idle_suspend) {
765 local_irq_enable();
766 cpu_relax();
767 return 0;
768 }
769
770 lapic_timer_state_broadcast(pr, cx, 1);
771 kt1 = ktime_get_real();
772 acpi_idle_do_entry(cx);
773 kt2 = ktime_get_real();
774 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
775
776 local_irq_enable();
777 cx->usage++;
778 lapic_timer_state_broadcast(pr, cx, 0);
779
780 return idle_time;
781}
782
783/**
784 * acpi_idle_enter_simple - enters an ACPI state without BM handling
785 * @dev: the target CPU
786 * @state: the state data
787 */
788static int acpi_idle_enter_simple(struct cpuidle_device *dev,
789 struct cpuidle_state *state)
790{
791 struct acpi_processor *pr;
792 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
793 ktime_t kt1, kt2;
794 s64 idle_time_ns;
795 s64 idle_time;
796
797 pr = __this_cpu_read(processors);
798
799 if (unlikely(!pr))
800 return 0;
801
802 if (acpi_idle_suspend)
803 return(acpi_idle_enter_c1(dev, state));
804
805 local_irq_disable();
806
807 if (cx->entry_method != ACPI_CSTATE_FFH) {
808 current_thread_info()->status &= ~TS_POLLING;
809 /*
810 * TS_POLLING-cleared state must be visible before we test
811 * NEED_RESCHED:
812 */
813 smp_mb();
814
815 if (unlikely(need_resched())) {
816 current_thread_info()->status |= TS_POLLING;
817 local_irq_enable();
818 return 0;
819 }
820 }
821
822 /*
823 * Must be done before busmaster disable as we might need to
824 * access HPET !
825 */
826 lapic_timer_state_broadcast(pr, cx, 1);
827
828 if (cx->type == ACPI_STATE_C3)
829 ACPI_FLUSH_CPU_CACHE();
830
831 kt1 = ktime_get_real();
832 /* Tell the scheduler that we are going deep-idle: */
833 sched_clock_idle_sleep_event();
834 acpi_idle_do_entry(cx);
835 kt2 = ktime_get_real();
836 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
837 idle_time = idle_time_ns;
838 do_div(idle_time, NSEC_PER_USEC);
839
840 /* Tell the scheduler how much we idled: */
841 sched_clock_idle_wakeup_event(idle_time_ns);
842
843 local_irq_enable();
844 if (cx->entry_method != ACPI_CSTATE_FFH)
845 current_thread_info()->status |= TS_POLLING;
846
847 cx->usage++;
848
849 lapic_timer_state_broadcast(pr, cx, 0);
850 cx->time += idle_time;
851 return idle_time;
852}
853
854static int c3_cpu_count;
855static DEFINE_SPINLOCK(c3_lock);
856
857/**
858 * acpi_idle_enter_bm - enters C3 with proper BM handling
859 * @dev: the target CPU
860 * @state: the state data
861 *
862 * If BM is detected, the deepest non-C3 idle state is entered instead.
863 */
864static int acpi_idle_enter_bm(struct cpuidle_device *dev,
865 struct cpuidle_state *state)
866{
867 struct acpi_processor *pr;
868 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
869 ktime_t kt1, kt2;
870 s64 idle_time_ns;
871 s64 idle_time;
872
873
874 pr = __this_cpu_read(processors);
875
876 if (unlikely(!pr))
877 return 0;
878
879 if (acpi_idle_suspend)
880 return(acpi_idle_enter_c1(dev, state));
881
882 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
883 if (dev->safe_state) {
884 dev->last_state = dev->safe_state;
885 return dev->safe_state->enter(dev, dev->safe_state);
886 } else {
887 local_irq_disable();
888 acpi_safe_halt();
889 local_irq_enable();
890 return 0;
891 }
892 }
893
894 local_irq_disable();
895
896 if (cx->entry_method != ACPI_CSTATE_FFH) {
897 current_thread_info()->status &= ~TS_POLLING;
898 /*
899 * TS_POLLING-cleared state must be visible before we test
900 * NEED_RESCHED:
901 */
902 smp_mb();
903
904 if (unlikely(need_resched())) {
905 current_thread_info()->status |= TS_POLLING;
906 local_irq_enable();
907 return 0;
908 }
909 }
910
911 acpi_unlazy_tlb(smp_processor_id());
912
913 /* Tell the scheduler that we are going deep-idle: */
914 sched_clock_idle_sleep_event();
915 /*
916 * Must be done before busmaster disable as we might need to
917 * access HPET !
918 */
919 lapic_timer_state_broadcast(pr, cx, 1);
920
921 kt1 = ktime_get_real();
922 /*
923 * disable bus master
924 * bm_check implies we need ARB_DIS
925 * !bm_check implies we need cache flush
926 * bm_control implies whether we can do ARB_DIS
927 *
928 * That leaves a case where bm_check is set and bm_control is
929 * not set. In that case we cannot do much, we enter C3
930 * without doing anything.
931 */
932 if (pr->flags.bm_check && pr->flags.bm_control) {
933 spin_lock(&c3_lock);
934 c3_cpu_count++;
935 /* Disable bus master arbitration when all CPUs are in C3 */
936 if (c3_cpu_count == num_online_cpus())
937 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
938 spin_unlock(&c3_lock);
939 } else if (!pr->flags.bm_check) {
940 ACPI_FLUSH_CPU_CACHE();
941 }
942
943 acpi_idle_do_entry(cx);
944
945 /* Re-enable bus master arbitration */
946 if (pr->flags.bm_check && pr->flags.bm_control) {
947 spin_lock(&c3_lock);
948 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
949 c3_cpu_count--;
950 spin_unlock(&c3_lock);
951 }
952 kt2 = ktime_get_real();
953 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
954 idle_time = idle_time_ns;
955 do_div(idle_time, NSEC_PER_USEC);
956
957 /* Tell the scheduler how much we idled: */
958 sched_clock_idle_wakeup_event(idle_time_ns);
959
960 local_irq_enable();
961 if (cx->entry_method != ACPI_CSTATE_FFH)
962 current_thread_info()->status |= TS_POLLING;
963
964 cx->usage++;
965
966 lapic_timer_state_broadcast(pr, cx, 0);
967 cx->time += idle_time;
968 return idle_time;
969}
970
971struct cpuidle_driver acpi_idle_driver = {
972 .name = "acpi_idle",
973 .owner = THIS_MODULE,
974};
975
976/**
977 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
978 * @pr: the ACPI processor
979 */
980static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
981{
982 int i, count = CPUIDLE_DRIVER_STATE_START;
983 struct acpi_processor_cx *cx;
984 struct cpuidle_state *state;
985 struct cpuidle_device *dev = &pr->power.dev;
986
987 if (!pr->flags.power_setup_done)
988 return -EINVAL;
989
990 if (pr->flags.power == 0) {
991 return -EINVAL;
992 }
993
994 dev->cpu = pr->id;
995 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
996 dev->states[i].name[0] = '\0';
997 dev->states[i].desc[0] = '\0';
998 }
999
1000 if (max_cstate == 0)
1001 max_cstate = 1;
1002
1003 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1004 cx = &pr->power.states[i];
1005 state = &dev->states[count];
1006
1007 if (!cx->valid)
1008 continue;
1009
1010#ifdef CONFIG_HOTPLUG_CPU
1011 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1012 !pr->flags.has_cst &&
1013 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1014 continue;
1015#endif
1016 cpuidle_set_statedata(state, cx);
1017
1018 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1019 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1020 state->exit_latency = cx->latency;
1021 state->target_residency = cx->latency * latency_factor;
1022
1023 state->flags = 0;
1024 switch (cx->type) {
1025 case ACPI_STATE_C1:
1026 if (cx->entry_method == ACPI_CSTATE_FFH)
1027 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1028
1029 state->enter = acpi_idle_enter_c1;
1030 dev->safe_state = state;
1031 break;
1032
1033 case ACPI_STATE_C2:
1034 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1035 state->enter = acpi_idle_enter_simple;
1036 dev->safe_state = state;
1037 break;
1038
1039 case ACPI_STATE_C3:
1040 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1041 state->enter = pr->flags.bm_check ?
1042 acpi_idle_enter_bm :
1043 acpi_idle_enter_simple;
1044 break;
1045 }
1046
1047 count++;
1048 if (count == CPUIDLE_STATE_MAX)
1049 break;
1050 }
1051
1052 dev->state_count = count;
1053
1054 if (!count)
1055 return -EINVAL;
1056
1057 return 0;
1058}
1059
1060int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1061{
1062 int ret = 0;
1063
1064 if (disabled_by_idle_boot_param())
1065 return 0;
1066
1067 if (!pr)
1068 return -EINVAL;
1069
1070 if (nocst) {
1071 return -ENODEV;
1072 }
1073
1074 if (!pr->flags.power_setup_done)
1075 return -ENODEV;
1076
1077 cpuidle_pause_and_lock();
1078 cpuidle_disable_device(&pr->power.dev);
1079 acpi_processor_get_power_info(pr);
1080 if (pr->flags.power) {
1081 acpi_processor_setup_cpuidle(pr);
1082 ret = cpuidle_enable_device(&pr->power.dev);
1083 }
1084 cpuidle_resume_and_unlock();
1085
1086 return ret;
1087}
1088
1089int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1090 struct acpi_device *device)
1091{
1092 acpi_status status = 0;
1093 static int first_run;
1094
1095 if (disabled_by_idle_boot_param())
1096 return 0;
1097
1098 if (!first_run) {
1099 dmi_check_system(processor_power_dmi_table);
1100 max_cstate = acpi_processor_cstate_check(max_cstate);
1101 if (max_cstate < ACPI_C_STATES_MAX)
1102 printk(KERN_NOTICE
1103 "ACPI: processor limited to max C-state %d\n",
1104 max_cstate);
1105 first_run++;
1106 }
1107
1108 if (!pr)
1109 return -EINVAL;
1110
1111 if (acpi_gbl_FADT.cst_control && !nocst) {
1112 status =
1113 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1114 if (ACPI_FAILURE(status)) {
1115 ACPI_EXCEPTION((AE_INFO, status,
1116 "Notifying BIOS of _CST ability failed"));
1117 }
1118 }
1119
1120 acpi_processor_get_power_info(pr);
1121 pr->flags.power_setup_done = 1;
1122
1123 /*
1124 * Install the idle handler if processor power management is supported.
1125 * Note that we use previously set idle handler will be used on
1126 * platforms that only support C1.
1127 */
1128 if (pr->flags.power) {
1129 acpi_processor_setup_cpuidle(pr);
1130 if (cpuidle_register_device(&pr->power.dev))
1131 return -EIO;
1132 }
1133 return 0;
1134}
1135
1136int acpi_processor_power_exit(struct acpi_processor *pr,
1137 struct acpi_device *device)
1138{
1139 if (disabled_by_idle_boot_param())
1140 return 0;
1141
1142 cpuidle_unregister_device(&pr->power.dev);
1143 pr->flags.power_setup_done = 0;
1144
1145 return 0;
1146}
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
12 */
13#define pr_fmt(fmt) "ACPI: " fmt
14
15#include <linux/module.h>
16#include <linux/acpi.h>
17#include <linux/dmi.h>
18#include <linux/sched.h> /* need_resched() */
19#include <linux/tick.h>
20#include <linux/cpuidle.h>
21#include <linux/cpu.h>
22#include <acpi/processor.h>
23
24/*
25 * Include the apic definitions for x86 to have the APIC timer related defines
26 * available also for UP (on SMP it gets magically included via linux/smp.h).
27 * asm/acpi.h is not an option, as it would require more include magic. Also
28 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
29 */
30#ifdef CONFIG_X86
31#include <asm/apic.h>
32#endif
33
34#define ACPI_PROCESSOR_CLASS "processor"
35#define _COMPONENT ACPI_PROCESSOR_COMPONENT
36ACPI_MODULE_NAME("processor_idle");
37
38#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39
40static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41module_param(max_cstate, uint, 0000);
42static unsigned int nocst __read_mostly;
43module_param(nocst, uint, 0000);
44static int bm_check_disable __read_mostly;
45module_param(bm_check_disable, uint, 0000);
46
47static unsigned int latency_factor __read_mostly = 2;
48module_param(latency_factor, uint, 0644);
49
50static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51
52struct cpuidle_driver acpi_idle_driver = {
53 .name = "acpi_idle",
54 .owner = THIS_MODULE,
55};
56
57#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
58static
59DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
60
61static int disabled_by_idle_boot_param(void)
62{
63 return boot_option_idle_override == IDLE_POLL ||
64 boot_option_idle_override == IDLE_HALT;
65}
66
67/*
68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69 * For now disable this. Probably a bug somewhere else.
70 *
71 * To skip this limit, boot/load with a large max_cstate limit.
72 */
73static int set_max_cstate(const struct dmi_system_id *id)
74{
75 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 return 0;
77
78 pr_notice("%s detected - limiting to C%ld max_cstate."
79 " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
81
82 max_cstate = (long)id->driver_data;
83
84 return 0;
85}
86
87static const struct dmi_system_id processor_power_dmi_table[] = {
88 { set_max_cstate, "Clevo 5600D", {
89 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
91 (void *)2},
92 { set_max_cstate, "Pavilion zv5000", {
93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 (void *)1},
96 { set_max_cstate, "Asus L8400B", {
97 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 (void *)1},
100 {},
101};
102
103
104/*
105 * Callers should disable interrupts before the call and enable
106 * interrupts after return.
107 */
108static void __cpuidle acpi_safe_halt(void)
109{
110 if (!tif_need_resched()) {
111 safe_halt();
112 local_irq_disable();
113 }
114}
115
116#ifdef ARCH_APICTIMER_STOPS_ON_C3
117
118/*
119 * Some BIOS implementations switch to C3 in the published C2 state.
120 * This seems to be a common problem on AMD boxen, but other vendors
121 * are affected too. We pick the most conservative approach: we assume
122 * that the local APIC stops in both C2 and C3.
123 */
124static void lapic_timer_check_state(int state, struct acpi_processor *pr,
125 struct acpi_processor_cx *cx)
126{
127 struct acpi_processor_power *pwr = &pr->power;
128 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
129
130 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 return;
132
133 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
134 type = ACPI_STATE_C1;
135
136 /*
137 * Check, if one of the previous states already marked the lapic
138 * unstable
139 */
140 if (pwr->timer_broadcast_on_state < state)
141 return;
142
143 if (cx->type >= type)
144 pr->power.timer_broadcast_on_state = state;
145}
146
147static void __lapic_timer_propagate_broadcast(void *arg)
148{
149 struct acpi_processor *pr = (struct acpi_processor *) arg;
150
151 if (pr->power.timer_broadcast_on_state < INT_MAX)
152 tick_broadcast_enable();
153 else
154 tick_broadcast_disable();
155}
156
157static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158{
159 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 (void *)pr, 1);
161}
162
163/* Power(C) State timer broadcast control */
164static void lapic_timer_state_broadcast(struct acpi_processor *pr,
165 struct acpi_processor_cx *cx,
166 int broadcast)
167{
168 int state = cx - pr->power.states;
169
170 if (state >= pr->power.timer_broadcast_on_state) {
171 if (broadcast)
172 tick_broadcast_enter();
173 else
174 tick_broadcast_exit();
175 }
176}
177
178#else
179
180static void lapic_timer_check_state(int state, struct acpi_processor *pr,
181 struct acpi_processor_cx *cstate) { }
182static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
183static void lapic_timer_state_broadcast(struct acpi_processor *pr,
184 struct acpi_processor_cx *cx,
185 int broadcast)
186{
187}
188
189#endif
190
191#if defined(CONFIG_X86)
192static void tsc_check_state(int state)
193{
194 switch (boot_cpu_data.x86_vendor) {
195 case X86_VENDOR_HYGON:
196 case X86_VENDOR_AMD:
197 case X86_VENDOR_INTEL:
198 case X86_VENDOR_CENTAUR:
199 case X86_VENDOR_ZHAOXIN:
200 /*
201 * AMD Fam10h TSC will tick in all
202 * C/P/S0/S1 states when this bit is set.
203 */
204 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
205 return;
206
207 /*FALL THROUGH*/
208 default:
209 /* TSC could halt in idle, so notify users */
210 if (state > ACPI_STATE_C1)
211 mark_tsc_unstable("TSC halts in idle");
212 }
213}
214#else
215static void tsc_check_state(int state) { return; }
216#endif
217
218static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
219{
220
221 if (!pr->pblk)
222 return -ENODEV;
223
224 /* if info is obtained from pblk/fadt, type equals state */
225 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
226 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
227
228#ifndef CONFIG_HOTPLUG_CPU
229 /*
230 * Check for P_LVL2_UP flag before entering C2 and above on
231 * an SMP system.
232 */
233 if ((num_online_cpus() > 1) &&
234 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
235 return -ENODEV;
236#endif
237
238 /* determine C2 and C3 address from pblk */
239 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
240 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
241
242 /* determine latencies from FADT */
243 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
244 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
245
246 /*
247 * FADT specified C2 latency must be less than or equal to
248 * 100 microseconds.
249 */
250 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
251 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
252 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
253 /* invalidate C2 */
254 pr->power.states[ACPI_STATE_C2].address = 0;
255 }
256
257 /*
258 * FADT supplied C3 latency must be less than or equal to
259 * 1000 microseconds.
260 */
261 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
262 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
263 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
264 /* invalidate C3 */
265 pr->power.states[ACPI_STATE_C3].address = 0;
266 }
267
268 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
269 "lvl2[0x%08x] lvl3[0x%08x]\n",
270 pr->power.states[ACPI_STATE_C2].address,
271 pr->power.states[ACPI_STATE_C3].address));
272
273 snprintf(pr->power.states[ACPI_STATE_C2].desc,
274 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
275 pr->power.states[ACPI_STATE_C2].address);
276 snprintf(pr->power.states[ACPI_STATE_C3].desc,
277 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
278 pr->power.states[ACPI_STATE_C3].address);
279
280 return 0;
281}
282
283static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
284{
285 if (!pr->power.states[ACPI_STATE_C1].valid) {
286 /* set the first C-State to C1 */
287 /* all processors need to support C1 */
288 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
289 pr->power.states[ACPI_STATE_C1].valid = 1;
290 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
291
292 snprintf(pr->power.states[ACPI_STATE_C1].desc,
293 ACPI_CX_DESC_LEN, "ACPI HLT");
294 }
295 /* the C0 state only exists as a filler in our array */
296 pr->power.states[ACPI_STATE_C0].valid = 1;
297 return 0;
298}
299
300static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
301{
302 acpi_status status;
303 u64 count;
304 int current_count;
305 int i, ret = 0;
306 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
307 union acpi_object *cst;
308
309 if (nocst)
310 return -ENODEV;
311
312 current_count = 0;
313
314 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
315 if (ACPI_FAILURE(status)) {
316 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
317 return -ENODEV;
318 }
319
320 cst = buffer.pointer;
321
322 /* There must be at least 2 elements */
323 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
324 pr_err("not enough elements in _CST\n");
325 ret = -EFAULT;
326 goto end;
327 }
328
329 count = cst->package.elements[0].integer.value;
330
331 /* Validate number of power states. */
332 if (count < 1 || count != cst->package.count - 1) {
333 pr_err("count given by _CST is not valid\n");
334 ret = -EFAULT;
335 goto end;
336 }
337
338 /* Tell driver that at least _CST is supported. */
339 pr->flags.has_cst = 1;
340
341 for (i = 1; i <= count; i++) {
342 union acpi_object *element;
343 union acpi_object *obj;
344 struct acpi_power_register *reg;
345 struct acpi_processor_cx cx;
346
347 memset(&cx, 0, sizeof(cx));
348
349 element = &(cst->package.elements[i]);
350 if (element->type != ACPI_TYPE_PACKAGE)
351 continue;
352
353 if (element->package.count != 4)
354 continue;
355
356 obj = &(element->package.elements[0]);
357
358 if (obj->type != ACPI_TYPE_BUFFER)
359 continue;
360
361 reg = (struct acpi_power_register *)obj->buffer.pointer;
362
363 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
364 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
365 continue;
366
367 /* There should be an easy way to extract an integer... */
368 obj = &(element->package.elements[1]);
369 if (obj->type != ACPI_TYPE_INTEGER)
370 continue;
371
372 cx.type = obj->integer.value;
373 /*
374 * Some buggy BIOSes won't list C1 in _CST -
375 * Let acpi_processor_get_power_info_default() handle them later
376 */
377 if (i == 1 && cx.type != ACPI_STATE_C1)
378 current_count++;
379
380 cx.address = reg->address;
381 cx.index = current_count + 1;
382
383 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
384 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
385 if (acpi_processor_ffh_cstate_probe
386 (pr->id, &cx, reg) == 0) {
387 cx.entry_method = ACPI_CSTATE_FFH;
388 } else if (cx.type == ACPI_STATE_C1) {
389 /*
390 * C1 is a special case where FIXED_HARDWARE
391 * can be handled in non-MWAIT way as well.
392 * In that case, save this _CST entry info.
393 * Otherwise, ignore this info and continue.
394 */
395 cx.entry_method = ACPI_CSTATE_HALT;
396 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
397 } else {
398 continue;
399 }
400 if (cx.type == ACPI_STATE_C1 &&
401 (boot_option_idle_override == IDLE_NOMWAIT)) {
402 /*
403 * In most cases the C1 space_id obtained from
404 * _CST object is FIXED_HARDWARE access mode.
405 * But when the option of idle=halt is added,
406 * the entry_method type should be changed from
407 * CSTATE_FFH to CSTATE_HALT.
408 * When the option of idle=nomwait is added,
409 * the C1 entry_method type should be
410 * CSTATE_HALT.
411 */
412 cx.entry_method = ACPI_CSTATE_HALT;
413 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
414 }
415 } else {
416 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
417 cx.address);
418 }
419
420 if (cx.type == ACPI_STATE_C1) {
421 cx.valid = 1;
422 }
423
424 obj = &(element->package.elements[2]);
425 if (obj->type != ACPI_TYPE_INTEGER)
426 continue;
427
428 cx.latency = obj->integer.value;
429
430 obj = &(element->package.elements[3]);
431 if (obj->type != ACPI_TYPE_INTEGER)
432 continue;
433
434 current_count++;
435 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
436
437 /*
438 * We support total ACPI_PROCESSOR_MAX_POWER - 1
439 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
440 */
441 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
442 pr_warn("Limiting number of power states to max (%d)\n",
443 ACPI_PROCESSOR_MAX_POWER);
444 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
445 break;
446 }
447 }
448
449 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
450 current_count));
451
452 /* Validate number of power states discovered */
453 if (current_count < 2)
454 ret = -EFAULT;
455
456 end:
457 kfree(buffer.pointer);
458
459 return ret;
460}
461
462static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
463 struct acpi_processor_cx *cx)
464{
465 static int bm_check_flag = -1;
466 static int bm_control_flag = -1;
467
468
469 if (!cx->address)
470 return;
471
472 /*
473 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
474 * DMA transfers are used by any ISA device to avoid livelock.
475 * Note that we could disable Type-F DMA (as recommended by
476 * the erratum), but this is known to disrupt certain ISA
477 * devices thus we take the conservative approach.
478 */
479 else if (errata.piix4.fdma) {
480 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
481 "C3 not supported on PIIX4 with Type-F DMA\n"));
482 return;
483 }
484
485 /* All the logic here assumes flags.bm_check is same across all CPUs */
486 if (bm_check_flag == -1) {
487 /* Determine whether bm_check is needed based on CPU */
488 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
489 bm_check_flag = pr->flags.bm_check;
490 bm_control_flag = pr->flags.bm_control;
491 } else {
492 pr->flags.bm_check = bm_check_flag;
493 pr->flags.bm_control = bm_control_flag;
494 }
495
496 if (pr->flags.bm_check) {
497 if (!pr->flags.bm_control) {
498 if (pr->flags.has_cst != 1) {
499 /* bus mastering control is necessary */
500 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
501 "C3 support requires BM control\n"));
502 return;
503 } else {
504 /* Here we enter C3 without bus mastering */
505 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
506 "C3 support without BM control\n"));
507 }
508 }
509 } else {
510 /*
511 * WBINVD should be set in fadt, for C3 state to be
512 * supported on when bm_check is not required.
513 */
514 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
515 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
516 "Cache invalidation should work properly"
517 " for C3 to be enabled on SMP systems\n"));
518 return;
519 }
520 }
521
522 /*
523 * Otherwise we've met all of our C3 requirements.
524 * Normalize the C3 latency to expidite policy. Enable
525 * checking of bus mastering status (bm_check) so we can
526 * use this in our C3 policy
527 */
528 cx->valid = 1;
529
530 /*
531 * On older chipsets, BM_RLD needs to be set
532 * in order for Bus Master activity to wake the
533 * system from C3. Newer chipsets handle DMA
534 * during C3 automatically and BM_RLD is a NOP.
535 * In either case, the proper way to
536 * handle BM_RLD is to set it and leave it set.
537 */
538 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
539
540 return;
541}
542
543static int acpi_processor_power_verify(struct acpi_processor *pr)
544{
545 unsigned int i;
546 unsigned int working = 0;
547
548 pr->power.timer_broadcast_on_state = INT_MAX;
549
550 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
551 struct acpi_processor_cx *cx = &pr->power.states[i];
552
553 switch (cx->type) {
554 case ACPI_STATE_C1:
555 cx->valid = 1;
556 break;
557
558 case ACPI_STATE_C2:
559 if (!cx->address)
560 break;
561 cx->valid = 1;
562 break;
563
564 case ACPI_STATE_C3:
565 acpi_processor_power_verify_c3(pr, cx);
566 break;
567 }
568 if (!cx->valid)
569 continue;
570
571 lapic_timer_check_state(i, pr, cx);
572 tsc_check_state(cx->type);
573 working++;
574 }
575
576 lapic_timer_propagate_broadcast(pr);
577
578 return (working);
579}
580
581static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
582{
583 unsigned int i;
584 int result;
585
586
587 /* NOTE: the idle thread may not be running while calling
588 * this function */
589
590 /* Zero initialize all the C-states info. */
591 memset(pr->power.states, 0, sizeof(pr->power.states));
592
593 result = acpi_processor_get_power_info_cst(pr);
594 if (result == -ENODEV)
595 result = acpi_processor_get_power_info_fadt(pr);
596
597 if (result)
598 return result;
599
600 acpi_processor_get_power_info_default(pr);
601
602 pr->power.count = acpi_processor_power_verify(pr);
603
604 /*
605 * if one state of type C2 or C3 is available, mark this
606 * CPU as being "idle manageable"
607 */
608 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
609 if (pr->power.states[i].valid) {
610 pr->power.count = i;
611 if (pr->power.states[i].type >= ACPI_STATE_C2)
612 pr->flags.power = 1;
613 }
614 }
615
616 return 0;
617}
618
619/**
620 * acpi_idle_bm_check - checks if bus master activity was detected
621 */
622static int acpi_idle_bm_check(void)
623{
624 u32 bm_status = 0;
625
626 if (bm_check_disable)
627 return 0;
628
629 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
630 if (bm_status)
631 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
632 /*
633 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
634 * the true state of bus mastering activity; forcing us to
635 * manually check the BMIDEA bit of each IDE channel.
636 */
637 else if (errata.piix4.bmisx) {
638 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
639 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
640 bm_status = 1;
641 }
642 return bm_status;
643}
644
645/**
646 * acpi_idle_do_entry - enter idle state using the appropriate method
647 * @cx: cstate data
648 *
649 * Caller disables interrupt before call and enables interrupt after return.
650 */
651static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
652{
653 if (cx->entry_method == ACPI_CSTATE_FFH) {
654 /* Call into architectural FFH based C-state */
655 acpi_processor_ffh_cstate_enter(cx);
656 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
657 acpi_safe_halt();
658 } else {
659 /* IO port based C-state */
660 inb(cx->address);
661 /* Dummy wait op - must do something useless after P_LVL2 read
662 because chipsets cannot guarantee that STPCLK# signal
663 gets asserted in time to freeze execution properly. */
664 inl(acpi_gbl_FADT.xpm_timer_block.address);
665 }
666}
667
668/**
669 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
670 * @dev: the target CPU
671 * @index: the index of suggested state
672 */
673static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
674{
675 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
676
677 ACPI_FLUSH_CPU_CACHE();
678
679 while (1) {
680
681 if (cx->entry_method == ACPI_CSTATE_HALT)
682 safe_halt();
683 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
684 inb(cx->address);
685 /* See comment in acpi_idle_do_entry() */
686 inl(acpi_gbl_FADT.xpm_timer_block.address);
687 } else
688 return -ENODEV;
689 }
690
691 /* Never reached */
692 return 0;
693}
694
695static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
696{
697 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
698 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
699}
700
701static int c3_cpu_count;
702static DEFINE_RAW_SPINLOCK(c3_lock);
703
704/**
705 * acpi_idle_enter_bm - enters C3 with proper BM handling
706 * @pr: Target processor
707 * @cx: Target state context
708 * @timer_bc: Whether or not to change timer mode to broadcast
709 */
710static void acpi_idle_enter_bm(struct acpi_processor *pr,
711 struct acpi_processor_cx *cx, bool timer_bc)
712{
713 acpi_unlazy_tlb(smp_processor_id());
714
715 /*
716 * Must be done before busmaster disable as we might need to
717 * access HPET !
718 */
719 if (timer_bc)
720 lapic_timer_state_broadcast(pr, cx, 1);
721
722 /*
723 * disable bus master
724 * bm_check implies we need ARB_DIS
725 * bm_control implies whether we can do ARB_DIS
726 *
727 * That leaves a case where bm_check is set and bm_control is
728 * not set. In that case we cannot do much, we enter C3
729 * without doing anything.
730 */
731 if (pr->flags.bm_control) {
732 raw_spin_lock(&c3_lock);
733 c3_cpu_count++;
734 /* Disable bus master arbitration when all CPUs are in C3 */
735 if (c3_cpu_count == num_online_cpus())
736 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
737 raw_spin_unlock(&c3_lock);
738 }
739
740 acpi_idle_do_entry(cx);
741
742 /* Re-enable bus master arbitration */
743 if (pr->flags.bm_control) {
744 raw_spin_lock(&c3_lock);
745 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
746 c3_cpu_count--;
747 raw_spin_unlock(&c3_lock);
748 }
749
750 if (timer_bc)
751 lapic_timer_state_broadcast(pr, cx, 0);
752}
753
754static int acpi_idle_enter(struct cpuidle_device *dev,
755 struct cpuidle_driver *drv, int index)
756{
757 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
758 struct acpi_processor *pr;
759
760 pr = __this_cpu_read(processors);
761 if (unlikely(!pr))
762 return -EINVAL;
763
764 if (cx->type != ACPI_STATE_C1) {
765 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
766 index = ACPI_IDLE_STATE_START;
767 cx = per_cpu(acpi_cstate[index], dev->cpu);
768 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) {
769 if (cx->bm_sts_skip || !acpi_idle_bm_check()) {
770 acpi_idle_enter_bm(pr, cx, true);
771 return index;
772 } else if (drv->safe_state_index >= 0) {
773 index = drv->safe_state_index;
774 cx = per_cpu(acpi_cstate[index], dev->cpu);
775 } else {
776 acpi_safe_halt();
777 return -EBUSY;
778 }
779 }
780 }
781
782 lapic_timer_state_broadcast(pr, cx, 1);
783
784 if (cx->type == ACPI_STATE_C3)
785 ACPI_FLUSH_CPU_CACHE();
786
787 acpi_idle_do_entry(cx);
788
789 lapic_timer_state_broadcast(pr, cx, 0);
790
791 return index;
792}
793
794static void acpi_idle_enter_s2idle(struct cpuidle_device *dev,
795 struct cpuidle_driver *drv, int index)
796{
797 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
798
799 if (cx->type == ACPI_STATE_C3) {
800 struct acpi_processor *pr = __this_cpu_read(processors);
801
802 if (unlikely(!pr))
803 return;
804
805 if (pr->flags.bm_check) {
806 acpi_idle_enter_bm(pr, cx, false);
807 return;
808 } else {
809 ACPI_FLUSH_CPU_CACHE();
810 }
811 }
812 acpi_idle_do_entry(cx);
813}
814
815static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
816 struct cpuidle_device *dev)
817{
818 int i, count = ACPI_IDLE_STATE_START;
819 struct acpi_processor_cx *cx;
820
821 if (max_cstate == 0)
822 max_cstate = 1;
823
824 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
825 cx = &pr->power.states[i];
826
827 if (!cx->valid)
828 continue;
829
830 per_cpu(acpi_cstate[count], dev->cpu) = cx;
831
832 count++;
833 if (count == CPUIDLE_STATE_MAX)
834 break;
835 }
836
837 if (!count)
838 return -EINVAL;
839
840 return 0;
841}
842
843static int acpi_processor_setup_cstates(struct acpi_processor *pr)
844{
845 int i, count;
846 struct acpi_processor_cx *cx;
847 struct cpuidle_state *state;
848 struct cpuidle_driver *drv = &acpi_idle_driver;
849
850 if (max_cstate == 0)
851 max_cstate = 1;
852
853 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
854 cpuidle_poll_state_init(drv);
855 count = 1;
856 } else {
857 count = 0;
858 }
859
860 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
861 cx = &pr->power.states[i];
862
863 if (!cx->valid)
864 continue;
865
866 state = &drv->states[count];
867 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
868 strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
869 state->exit_latency = cx->latency;
870 state->target_residency = cx->latency * latency_factor;
871 state->enter = acpi_idle_enter;
872
873 state->flags = 0;
874 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
875 state->enter_dead = acpi_idle_play_dead;
876 drv->safe_state_index = count;
877 }
878 /*
879 * Halt-induced C1 is not good for ->enter_s2idle, because it
880 * re-enables interrupts on exit. Moreover, C1 is generally not
881 * particularly interesting from the suspend-to-idle angle, so
882 * avoid C1 and the situations in which we may need to fall back
883 * to it altogether.
884 */
885 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
886 state->enter_s2idle = acpi_idle_enter_s2idle;
887
888 count++;
889 if (count == CPUIDLE_STATE_MAX)
890 break;
891 }
892
893 drv->state_count = count;
894
895 if (!count)
896 return -EINVAL;
897
898 return 0;
899}
900
901static inline void acpi_processor_cstate_first_run_checks(void)
902{
903 acpi_status status;
904 static int first_run;
905
906 if (first_run)
907 return;
908 dmi_check_system(processor_power_dmi_table);
909 max_cstate = acpi_processor_cstate_check(max_cstate);
910 if (max_cstate < ACPI_C_STATES_MAX)
911 pr_notice("ACPI: processor limited to max C-state %d\n",
912 max_cstate);
913 first_run++;
914
915 if (acpi_gbl_FADT.cst_control && !nocst) {
916 status = acpi_os_write_port(acpi_gbl_FADT.smi_command,
917 acpi_gbl_FADT.cst_control, 8);
918 if (ACPI_FAILURE(status))
919 ACPI_EXCEPTION((AE_INFO, status,
920 "Notifying BIOS of _CST ability failed"));
921 }
922}
923#else
924
925static inline int disabled_by_idle_boot_param(void) { return 0; }
926static inline void acpi_processor_cstate_first_run_checks(void) { }
927static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
928{
929 return -ENODEV;
930}
931
932static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
933 struct cpuidle_device *dev)
934{
935 return -EINVAL;
936}
937
938static int acpi_processor_setup_cstates(struct acpi_processor *pr)
939{
940 return -EINVAL;
941}
942
943#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
944
945struct acpi_lpi_states_array {
946 unsigned int size;
947 unsigned int composite_states_size;
948 struct acpi_lpi_state *entries;
949 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
950};
951
952static int obj_get_integer(union acpi_object *obj, u32 *value)
953{
954 if (obj->type != ACPI_TYPE_INTEGER)
955 return -EINVAL;
956
957 *value = obj->integer.value;
958 return 0;
959}
960
961static int acpi_processor_evaluate_lpi(acpi_handle handle,
962 struct acpi_lpi_states_array *info)
963{
964 acpi_status status;
965 int ret = 0;
966 int pkg_count, state_idx = 1, loop;
967 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
968 union acpi_object *lpi_data;
969 struct acpi_lpi_state *lpi_state;
970
971 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
972 if (ACPI_FAILURE(status)) {
973 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
974 return -ENODEV;
975 }
976
977 lpi_data = buffer.pointer;
978
979 /* There must be at least 4 elements = 3 elements + 1 package */
980 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
981 lpi_data->package.count < 4) {
982 pr_debug("not enough elements in _LPI\n");
983 ret = -ENODATA;
984 goto end;
985 }
986
987 pkg_count = lpi_data->package.elements[2].integer.value;
988
989 /* Validate number of power states. */
990 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
991 pr_debug("count given by _LPI is not valid\n");
992 ret = -ENODATA;
993 goto end;
994 }
995
996 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
997 if (!lpi_state) {
998 ret = -ENOMEM;
999 goto end;
1000 }
1001
1002 info->size = pkg_count;
1003 info->entries = lpi_state;
1004
1005 /* LPI States start at index 3 */
1006 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
1007 union acpi_object *element, *pkg_elem, *obj;
1008
1009 element = &lpi_data->package.elements[loop];
1010 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
1011 continue;
1012
1013 pkg_elem = element->package.elements;
1014
1015 obj = pkg_elem + 6;
1016 if (obj->type == ACPI_TYPE_BUFFER) {
1017 struct acpi_power_register *reg;
1018
1019 reg = (struct acpi_power_register *)obj->buffer.pointer;
1020 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
1021 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
1022 continue;
1023
1024 lpi_state->address = reg->address;
1025 lpi_state->entry_method =
1026 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
1027 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
1028 } else if (obj->type == ACPI_TYPE_INTEGER) {
1029 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
1030 lpi_state->address = obj->integer.value;
1031 } else {
1032 continue;
1033 }
1034
1035 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
1036
1037 obj = pkg_elem + 9;
1038 if (obj->type == ACPI_TYPE_STRING)
1039 strlcpy(lpi_state->desc, obj->string.pointer,
1040 ACPI_CX_DESC_LEN);
1041
1042 lpi_state->index = state_idx;
1043 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
1044 pr_debug("No min. residency found, assuming 10 us\n");
1045 lpi_state->min_residency = 10;
1046 }
1047
1048 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
1049 pr_debug("No wakeup residency found, assuming 10 us\n");
1050 lpi_state->wake_latency = 10;
1051 }
1052
1053 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
1054 lpi_state->flags = 0;
1055
1056 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
1057 lpi_state->arch_flags = 0;
1058
1059 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
1060 lpi_state->res_cnt_freq = 1;
1061
1062 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
1063 lpi_state->enable_parent_state = 0;
1064 }
1065
1066 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
1067end:
1068 kfree(buffer.pointer);
1069 return ret;
1070}
1071
1072/*
1073 * flat_state_cnt - the number of composite LPI states after the process of flattening
1074 */
1075static int flat_state_cnt;
1076
1077/**
1078 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1079 *
1080 * @local: local LPI state
1081 * @parent: parent LPI state
1082 * @result: composite LPI state
1083 */
1084static bool combine_lpi_states(struct acpi_lpi_state *local,
1085 struct acpi_lpi_state *parent,
1086 struct acpi_lpi_state *result)
1087{
1088 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1089 if (!parent->address) /* 0 means autopromotable */
1090 return false;
1091 result->address = local->address + parent->address;
1092 } else {
1093 result->address = parent->address;
1094 }
1095
1096 result->min_residency = max(local->min_residency, parent->min_residency);
1097 result->wake_latency = local->wake_latency + parent->wake_latency;
1098 result->enable_parent_state = parent->enable_parent_state;
1099 result->entry_method = local->entry_method;
1100
1101 result->flags = parent->flags;
1102 result->arch_flags = parent->arch_flags;
1103 result->index = parent->index;
1104
1105 strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1106 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1107 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1108 return true;
1109}
1110
1111#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1112
1113static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1114 struct acpi_lpi_state *t)
1115{
1116 curr_level->composite_states[curr_level->composite_states_size++] = t;
1117}
1118
1119static int flatten_lpi_states(struct acpi_processor *pr,
1120 struct acpi_lpi_states_array *curr_level,
1121 struct acpi_lpi_states_array *prev_level)
1122{
1123 int i, j, state_count = curr_level->size;
1124 struct acpi_lpi_state *p, *t = curr_level->entries;
1125
1126 curr_level->composite_states_size = 0;
1127 for (j = 0; j < state_count; j++, t++) {
1128 struct acpi_lpi_state *flpi;
1129
1130 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1131 continue;
1132
1133 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1134 pr_warn("Limiting number of LPI states to max (%d)\n",
1135 ACPI_PROCESSOR_MAX_POWER);
1136 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1137 break;
1138 }
1139
1140 flpi = &pr->power.lpi_states[flat_state_cnt];
1141
1142 if (!prev_level) { /* leaf/processor node */
1143 memcpy(flpi, t, sizeof(*t));
1144 stash_composite_state(curr_level, flpi);
1145 flat_state_cnt++;
1146 continue;
1147 }
1148
1149 for (i = 0; i < prev_level->composite_states_size; i++) {
1150 p = prev_level->composite_states[i];
1151 if (t->index <= p->enable_parent_state &&
1152 combine_lpi_states(p, t, flpi)) {
1153 stash_composite_state(curr_level, flpi);
1154 flat_state_cnt++;
1155 flpi++;
1156 }
1157 }
1158 }
1159
1160 kfree(curr_level->entries);
1161 return 0;
1162}
1163
1164static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1165{
1166 int ret, i;
1167 acpi_status status;
1168 acpi_handle handle = pr->handle, pr_ahandle;
1169 struct acpi_device *d = NULL;
1170 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1171
1172 if (!osc_pc_lpi_support_confirmed)
1173 return -EOPNOTSUPP;
1174
1175 if (!acpi_has_method(handle, "_LPI"))
1176 return -EINVAL;
1177
1178 flat_state_cnt = 0;
1179 prev = &info[0];
1180 curr = &info[1];
1181 handle = pr->handle;
1182 ret = acpi_processor_evaluate_lpi(handle, prev);
1183 if (ret)
1184 return ret;
1185 flatten_lpi_states(pr, prev, NULL);
1186
1187 status = acpi_get_parent(handle, &pr_ahandle);
1188 while (ACPI_SUCCESS(status)) {
1189 acpi_bus_get_device(pr_ahandle, &d);
1190 handle = pr_ahandle;
1191
1192 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1193 break;
1194
1195 /* can be optional ? */
1196 if (!acpi_has_method(handle, "_LPI"))
1197 break;
1198
1199 ret = acpi_processor_evaluate_lpi(handle, curr);
1200 if (ret)
1201 break;
1202
1203 /* flatten all the LPI states in this level of hierarchy */
1204 flatten_lpi_states(pr, curr, prev);
1205
1206 tmp = prev, prev = curr, curr = tmp;
1207
1208 status = acpi_get_parent(handle, &pr_ahandle);
1209 }
1210
1211 pr->power.count = flat_state_cnt;
1212 /* reset the index after flattening */
1213 for (i = 0; i < pr->power.count; i++)
1214 pr->power.lpi_states[i].index = i;
1215
1216 /* Tell driver that _LPI is supported. */
1217 pr->flags.has_lpi = 1;
1218 pr->flags.power = 1;
1219
1220 return 0;
1221}
1222
1223int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1224{
1225 return -ENODEV;
1226}
1227
1228int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1229{
1230 return -ENODEV;
1231}
1232
1233/**
1234 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1235 * @dev: the target CPU
1236 * @drv: cpuidle driver containing cpuidle state info
1237 * @index: index of target state
1238 *
1239 * Return: 0 for success or negative value for error
1240 */
1241static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1242 struct cpuidle_driver *drv, int index)
1243{
1244 struct acpi_processor *pr;
1245 struct acpi_lpi_state *lpi;
1246
1247 pr = __this_cpu_read(processors);
1248
1249 if (unlikely(!pr))
1250 return -EINVAL;
1251
1252 lpi = &pr->power.lpi_states[index];
1253 if (lpi->entry_method == ACPI_CSTATE_FFH)
1254 return acpi_processor_ffh_lpi_enter(lpi);
1255
1256 return -EINVAL;
1257}
1258
1259static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1260{
1261 int i;
1262 struct acpi_lpi_state *lpi;
1263 struct cpuidle_state *state;
1264 struct cpuidle_driver *drv = &acpi_idle_driver;
1265
1266 if (!pr->flags.has_lpi)
1267 return -EOPNOTSUPP;
1268
1269 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1270 lpi = &pr->power.lpi_states[i];
1271
1272 state = &drv->states[i];
1273 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1274 strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1275 state->exit_latency = lpi->wake_latency;
1276 state->target_residency = lpi->min_residency;
1277 if (lpi->arch_flags)
1278 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1279 state->enter = acpi_idle_lpi_enter;
1280 drv->safe_state_index = i;
1281 }
1282
1283 drv->state_count = i;
1284
1285 return 0;
1286}
1287
1288/**
1289 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1290 * global state data i.e. idle routines
1291 *
1292 * @pr: the ACPI processor
1293 */
1294static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1295{
1296 int i;
1297 struct cpuidle_driver *drv = &acpi_idle_driver;
1298
1299 if (!pr->flags.power_setup_done || !pr->flags.power)
1300 return -EINVAL;
1301
1302 drv->safe_state_index = -1;
1303 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1304 drv->states[i].name[0] = '\0';
1305 drv->states[i].desc[0] = '\0';
1306 }
1307
1308 if (pr->flags.has_lpi)
1309 return acpi_processor_setup_lpi_states(pr);
1310
1311 return acpi_processor_setup_cstates(pr);
1312}
1313
1314/**
1315 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1316 * device i.e. per-cpu data
1317 *
1318 * @pr: the ACPI processor
1319 * @dev : the cpuidle device
1320 */
1321static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1322 struct cpuidle_device *dev)
1323{
1324 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1325 return -EINVAL;
1326
1327 dev->cpu = pr->id;
1328 if (pr->flags.has_lpi)
1329 return acpi_processor_ffh_lpi_probe(pr->id);
1330
1331 return acpi_processor_setup_cpuidle_cx(pr, dev);
1332}
1333
1334static int acpi_processor_get_power_info(struct acpi_processor *pr)
1335{
1336 int ret;
1337
1338 ret = acpi_processor_get_lpi_info(pr);
1339 if (ret)
1340 ret = acpi_processor_get_cstate_info(pr);
1341
1342 return ret;
1343}
1344
1345int acpi_processor_hotplug(struct acpi_processor *pr)
1346{
1347 int ret = 0;
1348 struct cpuidle_device *dev;
1349
1350 if (disabled_by_idle_boot_param())
1351 return 0;
1352
1353 if (!pr->flags.power_setup_done)
1354 return -ENODEV;
1355
1356 dev = per_cpu(acpi_cpuidle_device, pr->id);
1357 cpuidle_pause_and_lock();
1358 cpuidle_disable_device(dev);
1359 ret = acpi_processor_get_power_info(pr);
1360 if (!ret && pr->flags.power) {
1361 acpi_processor_setup_cpuidle_dev(pr, dev);
1362 ret = cpuidle_enable_device(dev);
1363 }
1364 cpuidle_resume_and_unlock();
1365
1366 return ret;
1367}
1368
1369int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1370{
1371 int cpu;
1372 struct acpi_processor *_pr;
1373 struct cpuidle_device *dev;
1374
1375 if (disabled_by_idle_boot_param())
1376 return 0;
1377
1378 if (!pr->flags.power_setup_done)
1379 return -ENODEV;
1380
1381 /*
1382 * FIXME: Design the ACPI notification to make it once per
1383 * system instead of once per-cpu. This condition is a hack
1384 * to make the code that updates C-States be called once.
1385 */
1386
1387 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1388
1389 /* Protect against cpu-hotplug */
1390 get_online_cpus();
1391 cpuidle_pause_and_lock();
1392
1393 /* Disable all cpuidle devices */
1394 for_each_online_cpu(cpu) {
1395 _pr = per_cpu(processors, cpu);
1396 if (!_pr || !_pr->flags.power_setup_done)
1397 continue;
1398 dev = per_cpu(acpi_cpuidle_device, cpu);
1399 cpuidle_disable_device(dev);
1400 }
1401
1402 /* Populate Updated C-state information */
1403 acpi_processor_get_power_info(pr);
1404 acpi_processor_setup_cpuidle_states(pr);
1405
1406 /* Enable all cpuidle devices */
1407 for_each_online_cpu(cpu) {
1408 _pr = per_cpu(processors, cpu);
1409 if (!_pr || !_pr->flags.power_setup_done)
1410 continue;
1411 acpi_processor_get_power_info(_pr);
1412 if (_pr->flags.power) {
1413 dev = per_cpu(acpi_cpuidle_device, cpu);
1414 acpi_processor_setup_cpuidle_dev(_pr, dev);
1415 cpuidle_enable_device(dev);
1416 }
1417 }
1418 cpuidle_resume_and_unlock();
1419 put_online_cpus();
1420 }
1421
1422 return 0;
1423}
1424
1425static int acpi_processor_registered;
1426
1427int acpi_processor_power_init(struct acpi_processor *pr)
1428{
1429 int retval;
1430 struct cpuidle_device *dev;
1431
1432 if (disabled_by_idle_boot_param())
1433 return 0;
1434
1435 acpi_processor_cstate_first_run_checks();
1436
1437 if (!acpi_processor_get_power_info(pr))
1438 pr->flags.power_setup_done = 1;
1439
1440 /*
1441 * Install the idle handler if processor power management is supported.
1442 * Note that we use previously set idle handler will be used on
1443 * platforms that only support C1.
1444 */
1445 if (pr->flags.power) {
1446 /* Register acpi_idle_driver if not already registered */
1447 if (!acpi_processor_registered) {
1448 acpi_processor_setup_cpuidle_states(pr);
1449 retval = cpuidle_register_driver(&acpi_idle_driver);
1450 if (retval)
1451 return retval;
1452 pr_debug("%s registered with cpuidle\n",
1453 acpi_idle_driver.name);
1454 }
1455
1456 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1457 if (!dev)
1458 return -ENOMEM;
1459 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1460
1461 acpi_processor_setup_cpuidle_dev(pr, dev);
1462
1463 /* Register per-cpu cpuidle_device. Cpuidle driver
1464 * must already be registered before registering device
1465 */
1466 retval = cpuidle_register_device(dev);
1467 if (retval) {
1468 if (acpi_processor_registered == 0)
1469 cpuidle_unregister_driver(&acpi_idle_driver);
1470 return retval;
1471 }
1472 acpi_processor_registered++;
1473 }
1474 return 0;
1475}
1476
1477int acpi_processor_power_exit(struct acpi_processor *pr)
1478{
1479 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1480
1481 if (disabled_by_idle_boot_param())
1482 return 0;
1483
1484 if (pr->flags.power) {
1485 cpuidle_unregister_device(dev);
1486 acpi_processor_registered--;
1487 if (acpi_processor_registered == 0)
1488 cpuidle_unregister_driver(&acpi_idle_driver);
1489 }
1490
1491 pr->flags.power_setup_done = 0;
1492 return 0;
1493}