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1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
39#include <linux/sched.h> /* need_resched() */
40#include <linux/pm_qos_params.h>
41#include <linux/clockchips.h>
42#include <linux/cpuidle.h>
43#include <linux/irqflags.h>
44
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
60#include <asm/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66ACPI_MODULE_NAME("processor_idle");
67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
74static unsigned int nocst __read_mostly;
75module_param(nocst, uint, 0000);
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
78
79static unsigned int latency_factor __read_mostly = 2;
80module_param(latency_factor, uint, 0644);
81
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
95static int set_max_cstate(const struct dmi_system_id *id)
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104 max_cstate = (long)id->driver_data;
105
106 return 0;
107}
108
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
124 {},
125};
126
127
128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
143 }
144 current_thread_info()->status |= TS_POLLING;
145}
146
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
154 */
155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
166
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
176}
177
178static void __lapic_timer_propagate_broadcast(void *arg)
179{
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
187}
188
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
195/* Power(C) State timer broadcast control */
196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
209}
210
211#else
212
213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
221
222#endif
223
224/*
225 * Suspend / resume control
226 */
227static int acpi_idle_suspend;
228static u32 saved_bm_rld;
229
230static void acpi_idle_bm_rld_save(void)
231{
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233}
234static void acpi_idle_bm_rld_restore(void)
235{
236 u32 resumed_bm_rld;
237
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239
240 if (resumed_bm_rld != saved_bm_rld)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
242}
243
244int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245{
246 if (acpi_idle_suspend == 1)
247 return 0;
248
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend = 1;
251 return 0;
252}
253
254int acpi_processor_resume(struct acpi_device * device)
255{
256 if (acpi_idle_suspend == 0)
257 return 0;
258
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend = 0;
261 return 0;
262}
263
264#if defined(CONFIG_X86)
265static void tsc_check_state(int state)
266{
267 switch (boot_cpu_data.x86_vendor) {
268 case X86_VENDOR_AMD:
269 case X86_VENDOR_INTEL:
270 /*
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
273 */
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
275 return;
276
277 /*FALL THROUGH*/
278 default:
279 /* TSC could halt in idle, so notify users */
280 if (state > ACPI_STATE_C1)
281 mark_tsc_unstable("TSC halts in idle");
282 }
283}
284#else
285static void tsc_check_state(int state) { return; }
286#endif
287
288static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
289{
290
291 if (!pr)
292 return -EINVAL;
293
294 if (!pr->pblk)
295 return -ENODEV;
296
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
299 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
300
301#ifndef CONFIG_HOTPLUG_CPU
302 /*
303 * Check for P_LVL2_UP flag before entering C2 and above on
304 * an SMP system.
305 */
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
308 return -ENODEV;
309#endif
310
311 /* determine C2 and C3 address from pblk */
312 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
313 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
314
315 /* determine latencies from FADT */
316 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
317 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
318
319 /*
320 * FADT specified C2 latency must be less than or equal to
321 * 100 microseconds.
322 */
323 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
326 /* invalidate C2 */
327 pr->power.states[ACPI_STATE_C2].address = 0;
328 }
329
330 /*
331 * FADT supplied C3 latency must be less than or equal to
332 * 1000 microseconds.
333 */
334 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
337 /* invalidate C3 */
338 pr->power.states[ACPI_STATE_C3].address = 0;
339 }
340
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr->power.states[ACPI_STATE_C2].address,
344 pr->power.states[ACPI_STATE_C3].address));
345
346 return 0;
347}
348
349static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
350{
351 if (!pr->power.states[ACPI_STATE_C1].valid) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
355 pr->power.states[ACPI_STATE_C1].valid = 1;
356 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
357 }
358 /* the C0 state only exists as a filler in our array */
359 pr->power.states[ACPI_STATE_C0].valid = 1;
360 return 0;
361}
362
363static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
364{
365 acpi_status status = 0;
366 u64 count;
367 int current_count;
368 int i;
369 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
370 union acpi_object *cst;
371
372
373 if (nocst)
374 return -ENODEV;
375
376 current_count = 0;
377
378 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
379 if (ACPI_FAILURE(status)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
381 return -ENODEV;
382 }
383
384 cst = buffer.pointer;
385
386 /* There must be at least 2 elements */
387 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
388 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
389 status = -EFAULT;
390 goto end;
391 }
392
393 count = cst->package.elements[0].integer.value;
394
395 /* Validate number of power states. */
396 if (count < 1 || count != cst->package.count - 1) {
397 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
398 status = -EFAULT;
399 goto end;
400 }
401
402 /* Tell driver that at least _CST is supported. */
403 pr->flags.has_cst = 1;
404
405 for (i = 1; i <= count; i++) {
406 union acpi_object *element;
407 union acpi_object *obj;
408 struct acpi_power_register *reg;
409 struct acpi_processor_cx cx;
410
411 memset(&cx, 0, sizeof(cx));
412
413 element = &(cst->package.elements[i]);
414 if (element->type != ACPI_TYPE_PACKAGE)
415 continue;
416
417 if (element->package.count != 4)
418 continue;
419
420 obj = &(element->package.elements[0]);
421
422 if (obj->type != ACPI_TYPE_BUFFER)
423 continue;
424
425 reg = (struct acpi_power_register *)obj->buffer.pointer;
426
427 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
428 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
429 continue;
430
431 /* There should be an easy way to extract an integer... */
432 obj = &(element->package.elements[1]);
433 if (obj->type != ACPI_TYPE_INTEGER)
434 continue;
435
436 cx.type = obj->integer.value;
437 /*
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
440 */
441 if (i == 1 && cx.type != ACPI_STATE_C1)
442 current_count++;
443
444 cx.address = reg->address;
445 cx.index = current_count + 1;
446
447 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
448 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr->id, &cx, reg) == 0) {
451 cx.entry_method = ACPI_CSTATE_FFH;
452 } else if (cx.type == ACPI_STATE_C1) {
453 /*
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
458 */
459 cx.entry_method = ACPI_CSTATE_HALT;
460 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
461 } else {
462 continue;
463 }
464 if (cx.type == ACPI_STATE_C1 &&
465 (boot_option_idle_override == IDLE_NOMWAIT)) {
466 /*
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
474 * CSTATE_HALT.
475 */
476 cx.entry_method = ACPI_CSTATE_HALT;
477 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
478 }
479 } else {
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
481 cx.address);
482 }
483
484 if (cx.type == ACPI_STATE_C1) {
485 cx.valid = 1;
486 }
487
488 obj = &(element->package.elements[2]);
489 if (obj->type != ACPI_TYPE_INTEGER)
490 continue;
491
492 cx.latency = obj->integer.value;
493
494 obj = &(element->package.elements[3]);
495 if (obj->type != ACPI_TYPE_INTEGER)
496 continue;
497
498 cx.power = obj->integer.value;
499
500 current_count++;
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
502
503 /*
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
506 */
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
508 printk(KERN_WARNING
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
511 printk(KERN_WARNING
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
513 break;
514 }
515 }
516
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
518 current_count));
519
520 /* Validate number of power states discovered */
521 if (current_count < 2)
522 status = -EFAULT;
523
524 end:
525 kfree(buffer.pointer);
526
527 return status;
528}
529
530static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
532{
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
535
536
537 if (!cx->address)
538 return;
539
540 /*
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
546 */
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
550 return;
551 }
552
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
559 } else {
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
562 }
563
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
570 return;
571 } else {
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
575 }
576 }
577 } else {
578 /*
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
581 */
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
586 return;
587 }
588 }
589
590 /*
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
595 */
596 cx->valid = 1;
597
598 cx->latency_ticks = cx->latency;
599 /*
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
606 */
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
608
609 return;
610}
611
612static int acpi_processor_power_verify(struct acpi_processor *pr)
613{
614 unsigned int i;
615 unsigned int working = 0;
616
617 pr->power.timer_broadcast_on_state = INT_MAX;
618
619 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
620 struct acpi_processor_cx *cx = &pr->power.states[i];
621
622 switch (cx->type) {
623 case ACPI_STATE_C1:
624 cx->valid = 1;
625 break;
626
627 case ACPI_STATE_C2:
628 if (!cx->address)
629 break;
630 cx->valid = 1;
631 cx->latency_ticks = cx->latency; /* Normalize latency */
632 break;
633
634 case ACPI_STATE_C3:
635 acpi_processor_power_verify_c3(pr, cx);
636 break;
637 }
638 if (!cx->valid)
639 continue;
640
641 lapic_timer_check_state(i, pr, cx);
642 tsc_check_state(cx->type);
643 working++;
644 }
645
646 lapic_timer_propagate_broadcast(pr);
647
648 return (working);
649}
650
651static int acpi_processor_get_power_info(struct acpi_processor *pr)
652{
653 unsigned int i;
654 int result;
655
656
657 /* NOTE: the idle thread may not be running while calling
658 * this function */
659
660 /* Zero initialize all the C-states info. */
661 memset(pr->power.states, 0, sizeof(pr->power.states));
662
663 result = acpi_processor_get_power_info_cst(pr);
664 if (result == -ENODEV)
665 result = acpi_processor_get_power_info_fadt(pr);
666
667 if (result)
668 return result;
669
670 acpi_processor_get_power_info_default(pr);
671
672 pr->power.count = acpi_processor_power_verify(pr);
673
674 /*
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
677 */
678 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
679 if (pr->power.states[i].valid) {
680 pr->power.count = i;
681 if (pr->power.states[i].type >= ACPI_STATE_C2)
682 pr->flags.power = 1;
683 }
684 }
685
686 return 0;
687}
688
689/**
690 * acpi_idle_bm_check - checks if bus master activity was detected
691 */
692static int acpi_idle_bm_check(void)
693{
694 u32 bm_status = 0;
695
696 if (bm_check_disable)
697 return 0;
698
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
700 if (bm_status)
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
702 /*
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
706 */
707 else if (errata.piix4.bmisx) {
708 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
709 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
710 bm_status = 1;
711 }
712 return bm_status;
713}
714
715/**
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
717 * @cx: cstate data
718 *
719 * Caller disables interrupt before call and enables interrupt after return.
720 */
721static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
722{
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx->entry_method == ACPI_CSTATE_FFH) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx);
728 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
729 acpi_safe_halt();
730 } else {
731 /* IO port based C-state */
732 inb(cx->address);
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT.xpm_timer_block.address);
737 }
738 start_critical_timings();
739}
740
741/**
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @state: the state data
745 *
746 * This is equivalent to the HALT instruction.
747 */
748static int acpi_idle_enter_c1(struct cpuidle_device *dev,
749 struct cpuidle_state *state)
750{
751 ktime_t kt1, kt2;
752 s64 idle_time;
753 struct acpi_processor *pr;
754 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
755
756 pr = __this_cpu_read(processors);
757
758 if (unlikely(!pr))
759 return 0;
760
761 local_irq_disable();
762
763 /* Do not access any ACPI IO ports in suspend path */
764 if (acpi_idle_suspend) {
765 local_irq_enable();
766 cpu_relax();
767 return 0;
768 }
769
770 lapic_timer_state_broadcast(pr, cx, 1);
771 kt1 = ktime_get_real();
772 acpi_idle_do_entry(cx);
773 kt2 = ktime_get_real();
774 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
775
776 local_irq_enable();
777 cx->usage++;
778 lapic_timer_state_broadcast(pr, cx, 0);
779
780 return idle_time;
781}
782
783/**
784 * acpi_idle_enter_simple - enters an ACPI state without BM handling
785 * @dev: the target CPU
786 * @state: the state data
787 */
788static int acpi_idle_enter_simple(struct cpuidle_device *dev,
789 struct cpuidle_state *state)
790{
791 struct acpi_processor *pr;
792 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
793 ktime_t kt1, kt2;
794 s64 idle_time_ns;
795 s64 idle_time;
796
797 pr = __this_cpu_read(processors);
798
799 if (unlikely(!pr))
800 return 0;
801
802 if (acpi_idle_suspend)
803 return(acpi_idle_enter_c1(dev, state));
804
805 local_irq_disable();
806
807 if (cx->entry_method != ACPI_CSTATE_FFH) {
808 current_thread_info()->status &= ~TS_POLLING;
809 /*
810 * TS_POLLING-cleared state must be visible before we test
811 * NEED_RESCHED:
812 */
813 smp_mb();
814
815 if (unlikely(need_resched())) {
816 current_thread_info()->status |= TS_POLLING;
817 local_irq_enable();
818 return 0;
819 }
820 }
821
822 /*
823 * Must be done before busmaster disable as we might need to
824 * access HPET !
825 */
826 lapic_timer_state_broadcast(pr, cx, 1);
827
828 if (cx->type == ACPI_STATE_C3)
829 ACPI_FLUSH_CPU_CACHE();
830
831 kt1 = ktime_get_real();
832 /* Tell the scheduler that we are going deep-idle: */
833 sched_clock_idle_sleep_event();
834 acpi_idle_do_entry(cx);
835 kt2 = ktime_get_real();
836 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
837 idle_time = idle_time_ns;
838 do_div(idle_time, NSEC_PER_USEC);
839
840 /* Tell the scheduler how much we idled: */
841 sched_clock_idle_wakeup_event(idle_time_ns);
842
843 local_irq_enable();
844 if (cx->entry_method != ACPI_CSTATE_FFH)
845 current_thread_info()->status |= TS_POLLING;
846
847 cx->usage++;
848
849 lapic_timer_state_broadcast(pr, cx, 0);
850 cx->time += idle_time;
851 return idle_time;
852}
853
854static int c3_cpu_count;
855static DEFINE_SPINLOCK(c3_lock);
856
857/**
858 * acpi_idle_enter_bm - enters C3 with proper BM handling
859 * @dev: the target CPU
860 * @state: the state data
861 *
862 * If BM is detected, the deepest non-C3 idle state is entered instead.
863 */
864static int acpi_idle_enter_bm(struct cpuidle_device *dev,
865 struct cpuidle_state *state)
866{
867 struct acpi_processor *pr;
868 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
869 ktime_t kt1, kt2;
870 s64 idle_time_ns;
871 s64 idle_time;
872
873
874 pr = __this_cpu_read(processors);
875
876 if (unlikely(!pr))
877 return 0;
878
879 if (acpi_idle_suspend)
880 return(acpi_idle_enter_c1(dev, state));
881
882 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
883 if (dev->safe_state) {
884 dev->last_state = dev->safe_state;
885 return dev->safe_state->enter(dev, dev->safe_state);
886 } else {
887 local_irq_disable();
888 acpi_safe_halt();
889 local_irq_enable();
890 return 0;
891 }
892 }
893
894 local_irq_disable();
895
896 if (cx->entry_method != ACPI_CSTATE_FFH) {
897 current_thread_info()->status &= ~TS_POLLING;
898 /*
899 * TS_POLLING-cleared state must be visible before we test
900 * NEED_RESCHED:
901 */
902 smp_mb();
903
904 if (unlikely(need_resched())) {
905 current_thread_info()->status |= TS_POLLING;
906 local_irq_enable();
907 return 0;
908 }
909 }
910
911 acpi_unlazy_tlb(smp_processor_id());
912
913 /* Tell the scheduler that we are going deep-idle: */
914 sched_clock_idle_sleep_event();
915 /*
916 * Must be done before busmaster disable as we might need to
917 * access HPET !
918 */
919 lapic_timer_state_broadcast(pr, cx, 1);
920
921 kt1 = ktime_get_real();
922 /*
923 * disable bus master
924 * bm_check implies we need ARB_DIS
925 * !bm_check implies we need cache flush
926 * bm_control implies whether we can do ARB_DIS
927 *
928 * That leaves a case where bm_check is set and bm_control is
929 * not set. In that case we cannot do much, we enter C3
930 * without doing anything.
931 */
932 if (pr->flags.bm_check && pr->flags.bm_control) {
933 spin_lock(&c3_lock);
934 c3_cpu_count++;
935 /* Disable bus master arbitration when all CPUs are in C3 */
936 if (c3_cpu_count == num_online_cpus())
937 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
938 spin_unlock(&c3_lock);
939 } else if (!pr->flags.bm_check) {
940 ACPI_FLUSH_CPU_CACHE();
941 }
942
943 acpi_idle_do_entry(cx);
944
945 /* Re-enable bus master arbitration */
946 if (pr->flags.bm_check && pr->flags.bm_control) {
947 spin_lock(&c3_lock);
948 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
949 c3_cpu_count--;
950 spin_unlock(&c3_lock);
951 }
952 kt2 = ktime_get_real();
953 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
954 idle_time = idle_time_ns;
955 do_div(idle_time, NSEC_PER_USEC);
956
957 /* Tell the scheduler how much we idled: */
958 sched_clock_idle_wakeup_event(idle_time_ns);
959
960 local_irq_enable();
961 if (cx->entry_method != ACPI_CSTATE_FFH)
962 current_thread_info()->status |= TS_POLLING;
963
964 cx->usage++;
965
966 lapic_timer_state_broadcast(pr, cx, 0);
967 cx->time += idle_time;
968 return idle_time;
969}
970
971struct cpuidle_driver acpi_idle_driver = {
972 .name = "acpi_idle",
973 .owner = THIS_MODULE,
974};
975
976/**
977 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
978 * @pr: the ACPI processor
979 */
980static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
981{
982 int i, count = CPUIDLE_DRIVER_STATE_START;
983 struct acpi_processor_cx *cx;
984 struct cpuidle_state *state;
985 struct cpuidle_device *dev = &pr->power.dev;
986
987 if (!pr->flags.power_setup_done)
988 return -EINVAL;
989
990 if (pr->flags.power == 0) {
991 return -EINVAL;
992 }
993
994 dev->cpu = pr->id;
995 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
996 dev->states[i].name[0] = '\0';
997 dev->states[i].desc[0] = '\0';
998 }
999
1000 if (max_cstate == 0)
1001 max_cstate = 1;
1002
1003 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1004 cx = &pr->power.states[i];
1005 state = &dev->states[count];
1006
1007 if (!cx->valid)
1008 continue;
1009
1010#ifdef CONFIG_HOTPLUG_CPU
1011 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1012 !pr->flags.has_cst &&
1013 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1014 continue;
1015#endif
1016 cpuidle_set_statedata(state, cx);
1017
1018 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1019 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1020 state->exit_latency = cx->latency;
1021 state->target_residency = cx->latency * latency_factor;
1022
1023 state->flags = 0;
1024 switch (cx->type) {
1025 case ACPI_STATE_C1:
1026 if (cx->entry_method == ACPI_CSTATE_FFH)
1027 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1028
1029 state->enter = acpi_idle_enter_c1;
1030 dev->safe_state = state;
1031 break;
1032
1033 case ACPI_STATE_C2:
1034 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1035 state->enter = acpi_idle_enter_simple;
1036 dev->safe_state = state;
1037 break;
1038
1039 case ACPI_STATE_C3:
1040 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1041 state->enter = pr->flags.bm_check ?
1042 acpi_idle_enter_bm :
1043 acpi_idle_enter_simple;
1044 break;
1045 }
1046
1047 count++;
1048 if (count == CPUIDLE_STATE_MAX)
1049 break;
1050 }
1051
1052 dev->state_count = count;
1053
1054 if (!count)
1055 return -EINVAL;
1056
1057 return 0;
1058}
1059
1060int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1061{
1062 int ret = 0;
1063
1064 if (disabled_by_idle_boot_param())
1065 return 0;
1066
1067 if (!pr)
1068 return -EINVAL;
1069
1070 if (nocst) {
1071 return -ENODEV;
1072 }
1073
1074 if (!pr->flags.power_setup_done)
1075 return -ENODEV;
1076
1077 cpuidle_pause_and_lock();
1078 cpuidle_disable_device(&pr->power.dev);
1079 acpi_processor_get_power_info(pr);
1080 if (pr->flags.power) {
1081 acpi_processor_setup_cpuidle(pr);
1082 ret = cpuidle_enable_device(&pr->power.dev);
1083 }
1084 cpuidle_resume_and_unlock();
1085
1086 return ret;
1087}
1088
1089int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1090 struct acpi_device *device)
1091{
1092 acpi_status status = 0;
1093 static int first_run;
1094
1095 if (disabled_by_idle_boot_param())
1096 return 0;
1097
1098 if (!first_run) {
1099 dmi_check_system(processor_power_dmi_table);
1100 max_cstate = acpi_processor_cstate_check(max_cstate);
1101 if (max_cstate < ACPI_C_STATES_MAX)
1102 printk(KERN_NOTICE
1103 "ACPI: processor limited to max C-state %d\n",
1104 max_cstate);
1105 first_run++;
1106 }
1107
1108 if (!pr)
1109 return -EINVAL;
1110
1111 if (acpi_gbl_FADT.cst_control && !nocst) {
1112 status =
1113 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1114 if (ACPI_FAILURE(status)) {
1115 ACPI_EXCEPTION((AE_INFO, status,
1116 "Notifying BIOS of _CST ability failed"));
1117 }
1118 }
1119
1120 acpi_processor_get_power_info(pr);
1121 pr->flags.power_setup_done = 1;
1122
1123 /*
1124 * Install the idle handler if processor power management is supported.
1125 * Note that we use previously set idle handler will be used on
1126 * platforms that only support C1.
1127 */
1128 if (pr->flags.power) {
1129 acpi_processor_setup_cpuidle(pr);
1130 if (cpuidle_register_device(&pr->power.dev))
1131 return -EIO;
1132 }
1133 return 0;
1134}
1135
1136int acpi_processor_power_exit(struct acpi_processor *pr,
1137 struct acpi_device *device)
1138{
1139 if (disabled_by_idle_boot_param())
1140 return 0;
1141
1142 cpuidle_unregister_device(&pr->power.dev);
1143 pr->flags.power_setup_done = 0;
1144
1145 return 0;
1146}
1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
25 */
26#define pr_fmt(fmt) "ACPI: " fmt
27
28#include <linux/module.h>
29#include <linux/acpi.h>
30#include <linux/dmi.h>
31#include <linux/sched.h> /* need_resched() */
32#include <linux/tick.h>
33#include <linux/cpuidle.h>
34#include <acpi/processor.h>
35
36/*
37 * Include the apic definitions for x86 to have the APIC timer related defines
38 * available also for UP (on SMP it gets magically included via linux/smp.h).
39 * asm/acpi.h is not an option, as it would require more include magic. Also
40 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
41 */
42#ifdef CONFIG_X86
43#include <asm/apic.h>
44#endif
45
46#define ACPI_PROCESSOR_CLASS "processor"
47#define _COMPONENT ACPI_PROCESSOR_COMPONENT
48ACPI_MODULE_NAME("processor_idle");
49
50static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
51module_param(max_cstate, uint, 0000);
52static unsigned int nocst __read_mostly;
53module_param(nocst, uint, 0000);
54static int bm_check_disable __read_mostly;
55module_param(bm_check_disable, uint, 0000);
56
57static unsigned int latency_factor __read_mostly = 2;
58module_param(latency_factor, uint, 0644);
59
60static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
61
62static
63DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
64
65static int disabled_by_idle_boot_param(void)
66{
67 return boot_option_idle_override == IDLE_POLL ||
68 boot_option_idle_override == IDLE_HALT;
69}
70
71/*
72 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
73 * For now disable this. Probably a bug somewhere else.
74 *
75 * To skip this limit, boot/load with a large max_cstate limit.
76 */
77static int set_max_cstate(const struct dmi_system_id *id)
78{
79 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
80 return 0;
81
82 pr_notice("%s detected - limiting to C%ld max_cstate."
83 " Override with \"processor.max_cstate=%d\"\n", id->ident,
84 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
85
86 max_cstate = (long)id->driver_data;
87
88 return 0;
89}
90
91static const struct dmi_system_id processor_power_dmi_table[] = {
92 { set_max_cstate, "Clevo 5600D", {
93 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
94 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
95 (void *)2},
96 { set_max_cstate, "Pavilion zv5000", {
97 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
98 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
99 (void *)1},
100 { set_max_cstate, "Asus L8400B", {
101 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
102 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
103 (void *)1},
104 {},
105};
106
107
108/*
109 * Callers should disable interrupts before the call and enable
110 * interrupts after return.
111 */
112static void acpi_safe_halt(void)
113{
114 if (!tif_need_resched()) {
115 safe_halt();
116 local_irq_disable();
117 }
118}
119
120#ifdef ARCH_APICTIMER_STOPS_ON_C3
121
122/*
123 * Some BIOS implementations switch to C3 in the published C2 state.
124 * This seems to be a common problem on AMD boxen, but other vendors
125 * are affected too. We pick the most conservative approach: we assume
126 * that the local APIC stops in both C2 and C3.
127 */
128static void lapic_timer_check_state(int state, struct acpi_processor *pr,
129 struct acpi_processor_cx *cx)
130{
131 struct acpi_processor_power *pwr = &pr->power;
132 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
133
134 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
135 return;
136
137 if (amd_e400_c1e_detected)
138 type = ACPI_STATE_C1;
139
140 /*
141 * Check, if one of the previous states already marked the lapic
142 * unstable
143 */
144 if (pwr->timer_broadcast_on_state < state)
145 return;
146
147 if (cx->type >= type)
148 pr->power.timer_broadcast_on_state = state;
149}
150
151static void __lapic_timer_propagate_broadcast(void *arg)
152{
153 struct acpi_processor *pr = (struct acpi_processor *) arg;
154
155 if (pr->power.timer_broadcast_on_state < INT_MAX)
156 tick_broadcast_enable();
157 else
158 tick_broadcast_disable();
159}
160
161static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
162{
163 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
164 (void *)pr, 1);
165}
166
167/* Power(C) State timer broadcast control */
168static void lapic_timer_state_broadcast(struct acpi_processor *pr,
169 struct acpi_processor_cx *cx,
170 int broadcast)
171{
172 int state = cx - pr->power.states;
173
174 if (state >= pr->power.timer_broadcast_on_state) {
175 if (broadcast)
176 tick_broadcast_enter();
177 else
178 tick_broadcast_exit();
179 }
180}
181
182#else
183
184static void lapic_timer_check_state(int state, struct acpi_processor *pr,
185 struct acpi_processor_cx *cstate) { }
186static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
187static void lapic_timer_state_broadcast(struct acpi_processor *pr,
188 struct acpi_processor_cx *cx,
189 int broadcast)
190{
191}
192
193#endif
194
195#if defined(CONFIG_X86)
196static void tsc_check_state(int state)
197{
198 switch (boot_cpu_data.x86_vendor) {
199 case X86_VENDOR_AMD:
200 case X86_VENDOR_INTEL:
201 /*
202 * AMD Fam10h TSC will tick in all
203 * C/P/S0/S1 states when this bit is set.
204 */
205 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
206 return;
207
208 /*FALL THROUGH*/
209 default:
210 /* TSC could halt in idle, so notify users */
211 if (state > ACPI_STATE_C1)
212 mark_tsc_unstable("TSC halts in idle");
213 }
214}
215#else
216static void tsc_check_state(int state) { return; }
217#endif
218
219static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
220{
221
222 if (!pr->pblk)
223 return -ENODEV;
224
225 /* if info is obtained from pblk/fadt, type equals state */
226 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
227 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
228
229#ifndef CONFIG_HOTPLUG_CPU
230 /*
231 * Check for P_LVL2_UP flag before entering C2 and above on
232 * an SMP system.
233 */
234 if ((num_online_cpus() > 1) &&
235 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
236 return -ENODEV;
237#endif
238
239 /* determine C2 and C3 address from pblk */
240 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
241 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
242
243 /* determine latencies from FADT */
244 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
245 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
246
247 /*
248 * FADT specified C2 latency must be less than or equal to
249 * 100 microseconds.
250 */
251 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
252 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
253 "C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
254 /* invalidate C2 */
255 pr->power.states[ACPI_STATE_C2].address = 0;
256 }
257
258 /*
259 * FADT supplied C3 latency must be less than or equal to
260 * 1000 microseconds.
261 */
262 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
263 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
264 "C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
265 /* invalidate C3 */
266 pr->power.states[ACPI_STATE_C3].address = 0;
267 }
268
269 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
270 "lvl2[0x%08x] lvl3[0x%08x]\n",
271 pr->power.states[ACPI_STATE_C2].address,
272 pr->power.states[ACPI_STATE_C3].address));
273
274 return 0;
275}
276
277static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
278{
279 if (!pr->power.states[ACPI_STATE_C1].valid) {
280 /* set the first C-State to C1 */
281 /* all processors need to support C1 */
282 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
283 pr->power.states[ACPI_STATE_C1].valid = 1;
284 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
285 }
286 /* the C0 state only exists as a filler in our array */
287 pr->power.states[ACPI_STATE_C0].valid = 1;
288 return 0;
289}
290
291static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
292{
293 acpi_status status;
294 u64 count;
295 int current_count;
296 int i, ret = 0;
297 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
298 union acpi_object *cst;
299
300
301 if (nocst)
302 return -ENODEV;
303
304 current_count = 0;
305
306 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
307 if (ACPI_FAILURE(status)) {
308 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
309 return -ENODEV;
310 }
311
312 cst = buffer.pointer;
313
314 /* There must be at least 2 elements */
315 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
316 pr_err("not enough elements in _CST\n");
317 ret = -EFAULT;
318 goto end;
319 }
320
321 count = cst->package.elements[0].integer.value;
322
323 /* Validate number of power states. */
324 if (count < 1 || count != cst->package.count - 1) {
325 pr_err("count given by _CST is not valid\n");
326 ret = -EFAULT;
327 goto end;
328 }
329
330 /* Tell driver that at least _CST is supported. */
331 pr->flags.has_cst = 1;
332
333 for (i = 1; i <= count; i++) {
334 union acpi_object *element;
335 union acpi_object *obj;
336 struct acpi_power_register *reg;
337 struct acpi_processor_cx cx;
338
339 memset(&cx, 0, sizeof(cx));
340
341 element = &(cst->package.elements[i]);
342 if (element->type != ACPI_TYPE_PACKAGE)
343 continue;
344
345 if (element->package.count != 4)
346 continue;
347
348 obj = &(element->package.elements[0]);
349
350 if (obj->type != ACPI_TYPE_BUFFER)
351 continue;
352
353 reg = (struct acpi_power_register *)obj->buffer.pointer;
354
355 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
356 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
357 continue;
358
359 /* There should be an easy way to extract an integer... */
360 obj = &(element->package.elements[1]);
361 if (obj->type != ACPI_TYPE_INTEGER)
362 continue;
363
364 cx.type = obj->integer.value;
365 /*
366 * Some buggy BIOSes won't list C1 in _CST -
367 * Let acpi_processor_get_power_info_default() handle them later
368 */
369 if (i == 1 && cx.type != ACPI_STATE_C1)
370 current_count++;
371
372 cx.address = reg->address;
373 cx.index = current_count + 1;
374
375 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
376 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
377 if (acpi_processor_ffh_cstate_probe
378 (pr->id, &cx, reg) == 0) {
379 cx.entry_method = ACPI_CSTATE_FFH;
380 } else if (cx.type == ACPI_STATE_C1) {
381 /*
382 * C1 is a special case where FIXED_HARDWARE
383 * can be handled in non-MWAIT way as well.
384 * In that case, save this _CST entry info.
385 * Otherwise, ignore this info and continue.
386 */
387 cx.entry_method = ACPI_CSTATE_HALT;
388 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
389 } else {
390 continue;
391 }
392 if (cx.type == ACPI_STATE_C1 &&
393 (boot_option_idle_override == IDLE_NOMWAIT)) {
394 /*
395 * In most cases the C1 space_id obtained from
396 * _CST object is FIXED_HARDWARE access mode.
397 * But when the option of idle=halt is added,
398 * the entry_method type should be changed from
399 * CSTATE_FFH to CSTATE_HALT.
400 * When the option of idle=nomwait is added,
401 * the C1 entry_method type should be
402 * CSTATE_HALT.
403 */
404 cx.entry_method = ACPI_CSTATE_HALT;
405 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
406 }
407 } else {
408 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
409 cx.address);
410 }
411
412 if (cx.type == ACPI_STATE_C1) {
413 cx.valid = 1;
414 }
415
416 obj = &(element->package.elements[2]);
417 if (obj->type != ACPI_TYPE_INTEGER)
418 continue;
419
420 cx.latency = obj->integer.value;
421
422 obj = &(element->package.elements[3]);
423 if (obj->type != ACPI_TYPE_INTEGER)
424 continue;
425
426 current_count++;
427 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
428
429 /*
430 * We support total ACPI_PROCESSOR_MAX_POWER - 1
431 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
432 */
433 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
434 pr_warn("Limiting number of power states to max (%d)\n",
435 ACPI_PROCESSOR_MAX_POWER);
436 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
437 break;
438 }
439 }
440
441 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
442 current_count));
443
444 /* Validate number of power states discovered */
445 if (current_count < 2)
446 ret = -EFAULT;
447
448 end:
449 kfree(buffer.pointer);
450
451 return ret;
452}
453
454static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
455 struct acpi_processor_cx *cx)
456{
457 static int bm_check_flag = -1;
458 static int bm_control_flag = -1;
459
460
461 if (!cx->address)
462 return;
463
464 /*
465 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
466 * DMA transfers are used by any ISA device to avoid livelock.
467 * Note that we could disable Type-F DMA (as recommended by
468 * the erratum), but this is known to disrupt certain ISA
469 * devices thus we take the conservative approach.
470 */
471 else if (errata.piix4.fdma) {
472 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
473 "C3 not supported on PIIX4 with Type-F DMA\n"));
474 return;
475 }
476
477 /* All the logic here assumes flags.bm_check is same across all CPUs */
478 if (bm_check_flag == -1) {
479 /* Determine whether bm_check is needed based on CPU */
480 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
481 bm_check_flag = pr->flags.bm_check;
482 bm_control_flag = pr->flags.bm_control;
483 } else {
484 pr->flags.bm_check = bm_check_flag;
485 pr->flags.bm_control = bm_control_flag;
486 }
487
488 if (pr->flags.bm_check) {
489 if (!pr->flags.bm_control) {
490 if (pr->flags.has_cst != 1) {
491 /* bus mastering control is necessary */
492 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
493 "C3 support requires BM control\n"));
494 return;
495 } else {
496 /* Here we enter C3 without bus mastering */
497 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
498 "C3 support without BM control\n"));
499 }
500 }
501 } else {
502 /*
503 * WBINVD should be set in fadt, for C3 state to be
504 * supported on when bm_check is not required.
505 */
506 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
507 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
508 "Cache invalidation should work properly"
509 " for C3 to be enabled on SMP systems\n"));
510 return;
511 }
512 }
513
514 /*
515 * Otherwise we've met all of our C3 requirements.
516 * Normalize the C3 latency to expidite policy. Enable
517 * checking of bus mastering status (bm_check) so we can
518 * use this in our C3 policy
519 */
520 cx->valid = 1;
521
522 /*
523 * On older chipsets, BM_RLD needs to be set
524 * in order for Bus Master activity to wake the
525 * system from C3. Newer chipsets handle DMA
526 * during C3 automatically and BM_RLD is a NOP.
527 * In either case, the proper way to
528 * handle BM_RLD is to set it and leave it set.
529 */
530 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
531
532 return;
533}
534
535static int acpi_processor_power_verify(struct acpi_processor *pr)
536{
537 unsigned int i;
538 unsigned int working = 0;
539
540 pr->power.timer_broadcast_on_state = INT_MAX;
541
542 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
543 struct acpi_processor_cx *cx = &pr->power.states[i];
544
545 switch (cx->type) {
546 case ACPI_STATE_C1:
547 cx->valid = 1;
548 break;
549
550 case ACPI_STATE_C2:
551 if (!cx->address)
552 break;
553 cx->valid = 1;
554 break;
555
556 case ACPI_STATE_C3:
557 acpi_processor_power_verify_c3(pr, cx);
558 break;
559 }
560 if (!cx->valid)
561 continue;
562
563 lapic_timer_check_state(i, pr, cx);
564 tsc_check_state(cx->type);
565 working++;
566 }
567
568 lapic_timer_propagate_broadcast(pr);
569
570 return (working);
571}
572
573static int acpi_processor_get_power_info(struct acpi_processor *pr)
574{
575 unsigned int i;
576 int result;
577
578
579 /* NOTE: the idle thread may not be running while calling
580 * this function */
581
582 /* Zero initialize all the C-states info. */
583 memset(pr->power.states, 0, sizeof(pr->power.states));
584
585 result = acpi_processor_get_power_info_cst(pr);
586 if (result == -ENODEV)
587 result = acpi_processor_get_power_info_fadt(pr);
588
589 if (result)
590 return result;
591
592 acpi_processor_get_power_info_default(pr);
593
594 pr->power.count = acpi_processor_power_verify(pr);
595
596 /*
597 * if one state of type C2 or C3 is available, mark this
598 * CPU as being "idle manageable"
599 */
600 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
601 if (pr->power.states[i].valid) {
602 pr->power.count = i;
603 if (pr->power.states[i].type >= ACPI_STATE_C2)
604 pr->flags.power = 1;
605 }
606 }
607
608 return 0;
609}
610
611/**
612 * acpi_idle_bm_check - checks if bus master activity was detected
613 */
614static int acpi_idle_bm_check(void)
615{
616 u32 bm_status = 0;
617
618 if (bm_check_disable)
619 return 0;
620
621 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
622 if (bm_status)
623 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
624 /*
625 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
626 * the true state of bus mastering activity; forcing us to
627 * manually check the BMIDEA bit of each IDE channel.
628 */
629 else if (errata.piix4.bmisx) {
630 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
631 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
632 bm_status = 1;
633 }
634 return bm_status;
635}
636
637/**
638 * acpi_idle_do_entry - enter idle state using the appropriate method
639 * @cx: cstate data
640 *
641 * Caller disables interrupt before call and enables interrupt after return.
642 */
643static void acpi_idle_do_entry(struct acpi_processor_cx *cx)
644{
645 if (cx->entry_method == ACPI_CSTATE_FFH) {
646 /* Call into architectural FFH based C-state */
647 acpi_processor_ffh_cstate_enter(cx);
648 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
649 acpi_safe_halt();
650 } else {
651 /* IO port based C-state */
652 inb(cx->address);
653 /* Dummy wait op - must do something useless after P_LVL2 read
654 because chipsets cannot guarantee that STPCLK# signal
655 gets asserted in time to freeze execution properly. */
656 inl(acpi_gbl_FADT.xpm_timer_block.address);
657 }
658}
659
660/**
661 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
662 * @dev: the target CPU
663 * @index: the index of suggested state
664 */
665static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
666{
667 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
668
669 ACPI_FLUSH_CPU_CACHE();
670
671 while (1) {
672
673 if (cx->entry_method == ACPI_CSTATE_HALT)
674 safe_halt();
675 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
676 inb(cx->address);
677 /* See comment in acpi_idle_do_entry() */
678 inl(acpi_gbl_FADT.xpm_timer_block.address);
679 } else
680 return -ENODEV;
681 }
682
683 /* Never reached */
684 return 0;
685}
686
687static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
688{
689 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
690 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
691}
692
693static int c3_cpu_count;
694static DEFINE_RAW_SPINLOCK(c3_lock);
695
696/**
697 * acpi_idle_enter_bm - enters C3 with proper BM handling
698 * @pr: Target processor
699 * @cx: Target state context
700 * @timer_bc: Whether or not to change timer mode to broadcast
701 */
702static void acpi_idle_enter_bm(struct acpi_processor *pr,
703 struct acpi_processor_cx *cx, bool timer_bc)
704{
705 acpi_unlazy_tlb(smp_processor_id());
706
707 /*
708 * Must be done before busmaster disable as we might need to
709 * access HPET !
710 */
711 if (timer_bc)
712 lapic_timer_state_broadcast(pr, cx, 1);
713
714 /*
715 * disable bus master
716 * bm_check implies we need ARB_DIS
717 * bm_control implies whether we can do ARB_DIS
718 *
719 * That leaves a case where bm_check is set and bm_control is
720 * not set. In that case we cannot do much, we enter C3
721 * without doing anything.
722 */
723 if (pr->flags.bm_control) {
724 raw_spin_lock(&c3_lock);
725 c3_cpu_count++;
726 /* Disable bus master arbitration when all CPUs are in C3 */
727 if (c3_cpu_count == num_online_cpus())
728 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
729 raw_spin_unlock(&c3_lock);
730 }
731
732 acpi_idle_do_entry(cx);
733
734 /* Re-enable bus master arbitration */
735 if (pr->flags.bm_control) {
736 raw_spin_lock(&c3_lock);
737 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
738 c3_cpu_count--;
739 raw_spin_unlock(&c3_lock);
740 }
741
742 if (timer_bc)
743 lapic_timer_state_broadcast(pr, cx, 0);
744}
745
746static int acpi_idle_enter(struct cpuidle_device *dev,
747 struct cpuidle_driver *drv, int index)
748{
749 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
750 struct acpi_processor *pr;
751
752 pr = __this_cpu_read(processors);
753 if (unlikely(!pr))
754 return -EINVAL;
755
756 if (cx->type != ACPI_STATE_C1) {
757 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
758 index = CPUIDLE_DRIVER_STATE_START;
759 cx = per_cpu(acpi_cstate[index], dev->cpu);
760 } else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) {
761 if (cx->bm_sts_skip || !acpi_idle_bm_check()) {
762 acpi_idle_enter_bm(pr, cx, true);
763 return index;
764 } else if (drv->safe_state_index >= 0) {
765 index = drv->safe_state_index;
766 cx = per_cpu(acpi_cstate[index], dev->cpu);
767 } else {
768 acpi_safe_halt();
769 return -EBUSY;
770 }
771 }
772 }
773
774 lapic_timer_state_broadcast(pr, cx, 1);
775
776 if (cx->type == ACPI_STATE_C3)
777 ACPI_FLUSH_CPU_CACHE();
778
779 acpi_idle_do_entry(cx);
780
781 lapic_timer_state_broadcast(pr, cx, 0);
782
783 return index;
784}
785
786static void acpi_idle_enter_freeze(struct cpuidle_device *dev,
787 struct cpuidle_driver *drv, int index)
788{
789 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
790
791 if (cx->type == ACPI_STATE_C3) {
792 struct acpi_processor *pr = __this_cpu_read(processors);
793
794 if (unlikely(!pr))
795 return;
796
797 if (pr->flags.bm_check) {
798 acpi_idle_enter_bm(pr, cx, false);
799 return;
800 } else {
801 ACPI_FLUSH_CPU_CACHE();
802 }
803 }
804 acpi_idle_do_entry(cx);
805}
806
807struct cpuidle_driver acpi_idle_driver = {
808 .name = "acpi_idle",
809 .owner = THIS_MODULE,
810};
811
812/**
813 * acpi_processor_setup_cpuidle_cx - prepares and configures CPUIDLE
814 * device i.e. per-cpu data
815 *
816 * @pr: the ACPI processor
817 * @dev : the cpuidle device
818 */
819static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
820 struct cpuidle_device *dev)
821{
822 int i, count = CPUIDLE_DRIVER_STATE_START;
823 struct acpi_processor_cx *cx;
824
825 if (!pr->flags.power_setup_done)
826 return -EINVAL;
827
828 if (pr->flags.power == 0) {
829 return -EINVAL;
830 }
831
832 if (!dev)
833 return -EINVAL;
834
835 dev->cpu = pr->id;
836
837 if (max_cstate == 0)
838 max_cstate = 1;
839
840 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
841 cx = &pr->power.states[i];
842
843 if (!cx->valid)
844 continue;
845
846 per_cpu(acpi_cstate[count], dev->cpu) = cx;
847
848 count++;
849 if (count == CPUIDLE_STATE_MAX)
850 break;
851 }
852
853 if (!count)
854 return -EINVAL;
855
856 return 0;
857}
858
859/**
860 * acpi_processor_setup_cpuidle states- prepares and configures cpuidle
861 * global state data i.e. idle routines
862 *
863 * @pr: the ACPI processor
864 */
865static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
866{
867 int i, count = CPUIDLE_DRIVER_STATE_START;
868 struct acpi_processor_cx *cx;
869 struct cpuidle_state *state;
870 struct cpuidle_driver *drv = &acpi_idle_driver;
871
872 if (!pr->flags.power_setup_done)
873 return -EINVAL;
874
875 if (pr->flags.power == 0)
876 return -EINVAL;
877
878 drv->safe_state_index = -1;
879 for (i = CPUIDLE_DRIVER_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
880 drv->states[i].name[0] = '\0';
881 drv->states[i].desc[0] = '\0';
882 }
883
884 if (max_cstate == 0)
885 max_cstate = 1;
886
887 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
888 cx = &pr->power.states[i];
889
890 if (!cx->valid)
891 continue;
892
893 state = &drv->states[count];
894 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
895 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
896 state->exit_latency = cx->latency;
897 state->target_residency = cx->latency * latency_factor;
898 state->enter = acpi_idle_enter;
899
900 state->flags = 0;
901 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
902 state->enter_dead = acpi_idle_play_dead;
903 drv->safe_state_index = count;
904 }
905 /*
906 * Halt-induced C1 is not good for ->enter_freeze, because it
907 * re-enables interrupts on exit. Moreover, C1 is generally not
908 * particularly interesting from the suspend-to-idle angle, so
909 * avoid C1 and the situations in which we may need to fall back
910 * to it altogether.
911 */
912 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
913 state->enter_freeze = acpi_idle_enter_freeze;
914
915 count++;
916 if (count == CPUIDLE_STATE_MAX)
917 break;
918 }
919
920 drv->state_count = count;
921
922 if (!count)
923 return -EINVAL;
924
925 return 0;
926}
927
928int acpi_processor_hotplug(struct acpi_processor *pr)
929{
930 int ret = 0;
931 struct cpuidle_device *dev;
932
933 if (disabled_by_idle_boot_param())
934 return 0;
935
936 if (nocst)
937 return -ENODEV;
938
939 if (!pr->flags.power_setup_done)
940 return -ENODEV;
941
942 dev = per_cpu(acpi_cpuidle_device, pr->id);
943 cpuidle_pause_and_lock();
944 cpuidle_disable_device(dev);
945 acpi_processor_get_power_info(pr);
946 if (pr->flags.power) {
947 acpi_processor_setup_cpuidle_cx(pr, dev);
948 ret = cpuidle_enable_device(dev);
949 }
950 cpuidle_resume_and_unlock();
951
952 return ret;
953}
954
955int acpi_processor_cst_has_changed(struct acpi_processor *pr)
956{
957 int cpu;
958 struct acpi_processor *_pr;
959 struct cpuidle_device *dev;
960
961 if (disabled_by_idle_boot_param())
962 return 0;
963
964 if (nocst)
965 return -ENODEV;
966
967 if (!pr->flags.power_setup_done)
968 return -ENODEV;
969
970 /*
971 * FIXME: Design the ACPI notification to make it once per
972 * system instead of once per-cpu. This condition is a hack
973 * to make the code that updates C-States be called once.
974 */
975
976 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
977
978 /* Protect against cpu-hotplug */
979 get_online_cpus();
980 cpuidle_pause_and_lock();
981
982 /* Disable all cpuidle devices */
983 for_each_online_cpu(cpu) {
984 _pr = per_cpu(processors, cpu);
985 if (!_pr || !_pr->flags.power_setup_done)
986 continue;
987 dev = per_cpu(acpi_cpuidle_device, cpu);
988 cpuidle_disable_device(dev);
989 }
990
991 /* Populate Updated C-state information */
992 acpi_processor_get_power_info(pr);
993 acpi_processor_setup_cpuidle_states(pr);
994
995 /* Enable all cpuidle devices */
996 for_each_online_cpu(cpu) {
997 _pr = per_cpu(processors, cpu);
998 if (!_pr || !_pr->flags.power_setup_done)
999 continue;
1000 acpi_processor_get_power_info(_pr);
1001 if (_pr->flags.power) {
1002 dev = per_cpu(acpi_cpuidle_device, cpu);
1003 acpi_processor_setup_cpuidle_cx(_pr, dev);
1004 cpuidle_enable_device(dev);
1005 }
1006 }
1007 cpuidle_resume_and_unlock();
1008 put_online_cpus();
1009 }
1010
1011 return 0;
1012}
1013
1014static int acpi_processor_registered;
1015
1016int acpi_processor_power_init(struct acpi_processor *pr)
1017{
1018 acpi_status status;
1019 int retval;
1020 struct cpuidle_device *dev;
1021 static int first_run;
1022
1023 if (disabled_by_idle_boot_param())
1024 return 0;
1025
1026 if (!first_run) {
1027 dmi_check_system(processor_power_dmi_table);
1028 max_cstate = acpi_processor_cstate_check(max_cstate);
1029 if (max_cstate < ACPI_C_STATES_MAX)
1030 printk(KERN_NOTICE
1031 "ACPI: processor limited to max C-state %d\n",
1032 max_cstate);
1033 first_run++;
1034 }
1035
1036 if (acpi_gbl_FADT.cst_control && !nocst) {
1037 status =
1038 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1039 if (ACPI_FAILURE(status)) {
1040 ACPI_EXCEPTION((AE_INFO, status,
1041 "Notifying BIOS of _CST ability failed"));
1042 }
1043 }
1044
1045 acpi_processor_get_power_info(pr);
1046 pr->flags.power_setup_done = 1;
1047
1048 /*
1049 * Install the idle handler if processor power management is supported.
1050 * Note that we use previously set idle handler will be used on
1051 * platforms that only support C1.
1052 */
1053 if (pr->flags.power) {
1054 /* Register acpi_idle_driver if not already registered */
1055 if (!acpi_processor_registered) {
1056 acpi_processor_setup_cpuidle_states(pr);
1057 retval = cpuidle_register_driver(&acpi_idle_driver);
1058 if (retval)
1059 return retval;
1060 pr_debug("%s registered with cpuidle\n",
1061 acpi_idle_driver.name);
1062 }
1063
1064 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1065 if (!dev)
1066 return -ENOMEM;
1067 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1068
1069 acpi_processor_setup_cpuidle_cx(pr, dev);
1070
1071 /* Register per-cpu cpuidle_device. Cpuidle driver
1072 * must already be registered before registering device
1073 */
1074 retval = cpuidle_register_device(dev);
1075 if (retval) {
1076 if (acpi_processor_registered == 0)
1077 cpuidle_unregister_driver(&acpi_idle_driver);
1078 return retval;
1079 }
1080 acpi_processor_registered++;
1081 }
1082 return 0;
1083}
1084
1085int acpi_processor_power_exit(struct acpi_processor *pr)
1086{
1087 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1088
1089 if (disabled_by_idle_boot_param())
1090 return 0;
1091
1092 if (pr->flags.power) {
1093 cpuidle_unregister_device(dev);
1094 acpi_processor_registered--;
1095 if (acpi_processor_registered == 0)
1096 cpuidle_unregister_driver(&acpi_idle_driver);
1097 }
1098
1099 pr->flags.power_setup_done = 0;
1100 return 0;
1101}