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1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
39#include <linux/sched.h> /* need_resched() */
40#include <linux/pm_qos_params.h>
41#include <linux/clockchips.h>
42#include <linux/cpuidle.h>
43#include <linux/irqflags.h>
44
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
60#include <asm/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66ACPI_MODULE_NAME("processor_idle");
67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
74static unsigned int nocst __read_mostly;
75module_param(nocst, uint, 0000);
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
78
79static unsigned int latency_factor __read_mostly = 2;
80module_param(latency_factor, uint, 0644);
81
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
95static int set_max_cstate(const struct dmi_system_id *id)
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104 max_cstate = (long)id->driver_data;
105
106 return 0;
107}
108
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
124 {},
125};
126
127
128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
143 }
144 current_thread_info()->status |= TS_POLLING;
145}
146
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
154 */
155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
166
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
176}
177
178static void __lapic_timer_propagate_broadcast(void *arg)
179{
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
187}
188
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
195/* Power(C) State timer broadcast control */
196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
209}
210
211#else
212
213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
221
222#endif
223
224/*
225 * Suspend / resume control
226 */
227static int acpi_idle_suspend;
228static u32 saved_bm_rld;
229
230static void acpi_idle_bm_rld_save(void)
231{
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233}
234static void acpi_idle_bm_rld_restore(void)
235{
236 u32 resumed_bm_rld;
237
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239
240 if (resumed_bm_rld != saved_bm_rld)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
242}
243
244int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245{
246 if (acpi_idle_suspend == 1)
247 return 0;
248
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend = 1;
251 return 0;
252}
253
254int acpi_processor_resume(struct acpi_device * device)
255{
256 if (acpi_idle_suspend == 0)
257 return 0;
258
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend = 0;
261 return 0;
262}
263
264#if defined(CONFIG_X86)
265static void tsc_check_state(int state)
266{
267 switch (boot_cpu_data.x86_vendor) {
268 case X86_VENDOR_AMD:
269 case X86_VENDOR_INTEL:
270 /*
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
273 */
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
275 return;
276
277 /*FALL THROUGH*/
278 default:
279 /* TSC could halt in idle, so notify users */
280 if (state > ACPI_STATE_C1)
281 mark_tsc_unstable("TSC halts in idle");
282 }
283}
284#else
285static void tsc_check_state(int state) { return; }
286#endif
287
288static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
289{
290
291 if (!pr)
292 return -EINVAL;
293
294 if (!pr->pblk)
295 return -ENODEV;
296
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
299 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
300
301#ifndef CONFIG_HOTPLUG_CPU
302 /*
303 * Check for P_LVL2_UP flag before entering C2 and above on
304 * an SMP system.
305 */
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
308 return -ENODEV;
309#endif
310
311 /* determine C2 and C3 address from pblk */
312 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
313 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
314
315 /* determine latencies from FADT */
316 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
317 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
318
319 /*
320 * FADT specified C2 latency must be less than or equal to
321 * 100 microseconds.
322 */
323 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
326 /* invalidate C2 */
327 pr->power.states[ACPI_STATE_C2].address = 0;
328 }
329
330 /*
331 * FADT supplied C3 latency must be less than or equal to
332 * 1000 microseconds.
333 */
334 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
337 /* invalidate C3 */
338 pr->power.states[ACPI_STATE_C3].address = 0;
339 }
340
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr->power.states[ACPI_STATE_C2].address,
344 pr->power.states[ACPI_STATE_C3].address));
345
346 return 0;
347}
348
349static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
350{
351 if (!pr->power.states[ACPI_STATE_C1].valid) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
355 pr->power.states[ACPI_STATE_C1].valid = 1;
356 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
357 }
358 /* the C0 state only exists as a filler in our array */
359 pr->power.states[ACPI_STATE_C0].valid = 1;
360 return 0;
361}
362
363static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
364{
365 acpi_status status = 0;
366 u64 count;
367 int current_count;
368 int i;
369 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
370 union acpi_object *cst;
371
372
373 if (nocst)
374 return -ENODEV;
375
376 current_count = 0;
377
378 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
379 if (ACPI_FAILURE(status)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
381 return -ENODEV;
382 }
383
384 cst = buffer.pointer;
385
386 /* There must be at least 2 elements */
387 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
388 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
389 status = -EFAULT;
390 goto end;
391 }
392
393 count = cst->package.elements[0].integer.value;
394
395 /* Validate number of power states. */
396 if (count < 1 || count != cst->package.count - 1) {
397 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
398 status = -EFAULT;
399 goto end;
400 }
401
402 /* Tell driver that at least _CST is supported. */
403 pr->flags.has_cst = 1;
404
405 for (i = 1; i <= count; i++) {
406 union acpi_object *element;
407 union acpi_object *obj;
408 struct acpi_power_register *reg;
409 struct acpi_processor_cx cx;
410
411 memset(&cx, 0, sizeof(cx));
412
413 element = &(cst->package.elements[i]);
414 if (element->type != ACPI_TYPE_PACKAGE)
415 continue;
416
417 if (element->package.count != 4)
418 continue;
419
420 obj = &(element->package.elements[0]);
421
422 if (obj->type != ACPI_TYPE_BUFFER)
423 continue;
424
425 reg = (struct acpi_power_register *)obj->buffer.pointer;
426
427 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
428 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
429 continue;
430
431 /* There should be an easy way to extract an integer... */
432 obj = &(element->package.elements[1]);
433 if (obj->type != ACPI_TYPE_INTEGER)
434 continue;
435
436 cx.type = obj->integer.value;
437 /*
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
440 */
441 if (i == 1 && cx.type != ACPI_STATE_C1)
442 current_count++;
443
444 cx.address = reg->address;
445 cx.index = current_count + 1;
446
447 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
448 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr->id, &cx, reg) == 0) {
451 cx.entry_method = ACPI_CSTATE_FFH;
452 } else if (cx.type == ACPI_STATE_C1) {
453 /*
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
458 */
459 cx.entry_method = ACPI_CSTATE_HALT;
460 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
461 } else {
462 continue;
463 }
464 if (cx.type == ACPI_STATE_C1 &&
465 (boot_option_idle_override == IDLE_NOMWAIT)) {
466 /*
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
474 * CSTATE_HALT.
475 */
476 cx.entry_method = ACPI_CSTATE_HALT;
477 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
478 }
479 } else {
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
481 cx.address);
482 }
483
484 if (cx.type == ACPI_STATE_C1) {
485 cx.valid = 1;
486 }
487
488 obj = &(element->package.elements[2]);
489 if (obj->type != ACPI_TYPE_INTEGER)
490 continue;
491
492 cx.latency = obj->integer.value;
493
494 obj = &(element->package.elements[3]);
495 if (obj->type != ACPI_TYPE_INTEGER)
496 continue;
497
498 cx.power = obj->integer.value;
499
500 current_count++;
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
502
503 /*
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
506 */
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
508 printk(KERN_WARNING
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
511 printk(KERN_WARNING
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
513 break;
514 }
515 }
516
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
518 current_count));
519
520 /* Validate number of power states discovered */
521 if (current_count < 2)
522 status = -EFAULT;
523
524 end:
525 kfree(buffer.pointer);
526
527 return status;
528}
529
530static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
532{
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
535
536
537 if (!cx->address)
538 return;
539
540 /*
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
546 */
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
550 return;
551 }
552
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
559 } else {
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
562 }
563
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
570 return;
571 } else {
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
575 }
576 }
577 } else {
578 /*
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
581 */
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
586 return;
587 }
588 }
589
590 /*
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
595 */
596 cx->valid = 1;
597
598 cx->latency_ticks = cx->latency;
599 /*
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
606 */
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
608
609 return;
610}
611
612static int acpi_processor_power_verify(struct acpi_processor *pr)
613{
614 unsigned int i;
615 unsigned int working = 0;
616
617 pr->power.timer_broadcast_on_state = INT_MAX;
618
619 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
620 struct acpi_processor_cx *cx = &pr->power.states[i];
621
622 switch (cx->type) {
623 case ACPI_STATE_C1:
624 cx->valid = 1;
625 break;
626
627 case ACPI_STATE_C2:
628 if (!cx->address)
629 break;
630 cx->valid = 1;
631 cx->latency_ticks = cx->latency; /* Normalize latency */
632 break;
633
634 case ACPI_STATE_C3:
635 acpi_processor_power_verify_c3(pr, cx);
636 break;
637 }
638 if (!cx->valid)
639 continue;
640
641 lapic_timer_check_state(i, pr, cx);
642 tsc_check_state(cx->type);
643 working++;
644 }
645
646 lapic_timer_propagate_broadcast(pr);
647
648 return (working);
649}
650
651static int acpi_processor_get_power_info(struct acpi_processor *pr)
652{
653 unsigned int i;
654 int result;
655
656
657 /* NOTE: the idle thread may not be running while calling
658 * this function */
659
660 /* Zero initialize all the C-states info. */
661 memset(pr->power.states, 0, sizeof(pr->power.states));
662
663 result = acpi_processor_get_power_info_cst(pr);
664 if (result == -ENODEV)
665 result = acpi_processor_get_power_info_fadt(pr);
666
667 if (result)
668 return result;
669
670 acpi_processor_get_power_info_default(pr);
671
672 pr->power.count = acpi_processor_power_verify(pr);
673
674 /*
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
677 */
678 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
679 if (pr->power.states[i].valid) {
680 pr->power.count = i;
681 if (pr->power.states[i].type >= ACPI_STATE_C2)
682 pr->flags.power = 1;
683 }
684 }
685
686 return 0;
687}
688
689/**
690 * acpi_idle_bm_check - checks if bus master activity was detected
691 */
692static int acpi_idle_bm_check(void)
693{
694 u32 bm_status = 0;
695
696 if (bm_check_disable)
697 return 0;
698
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
700 if (bm_status)
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
702 /*
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
706 */
707 else if (errata.piix4.bmisx) {
708 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
709 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
710 bm_status = 1;
711 }
712 return bm_status;
713}
714
715/**
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
717 * @cx: cstate data
718 *
719 * Caller disables interrupt before call and enables interrupt after return.
720 */
721static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
722{
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx->entry_method == ACPI_CSTATE_FFH) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx);
728 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
729 acpi_safe_halt();
730 } else {
731 /* IO port based C-state */
732 inb(cx->address);
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT.xpm_timer_block.address);
737 }
738 start_critical_timings();
739}
740
741/**
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @state: the state data
745 *
746 * This is equivalent to the HALT instruction.
747 */
748static int acpi_idle_enter_c1(struct cpuidle_device *dev,
749 struct cpuidle_state *state)
750{
751 ktime_t kt1, kt2;
752 s64 idle_time;
753 struct acpi_processor *pr;
754 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
755
756 pr = __this_cpu_read(processors);
757
758 if (unlikely(!pr))
759 return 0;
760
761 local_irq_disable();
762
763 /* Do not access any ACPI IO ports in suspend path */
764 if (acpi_idle_suspend) {
765 local_irq_enable();
766 cpu_relax();
767 return 0;
768 }
769
770 lapic_timer_state_broadcast(pr, cx, 1);
771 kt1 = ktime_get_real();
772 acpi_idle_do_entry(cx);
773 kt2 = ktime_get_real();
774 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
775
776 local_irq_enable();
777 cx->usage++;
778 lapic_timer_state_broadcast(pr, cx, 0);
779
780 return idle_time;
781}
782
783/**
784 * acpi_idle_enter_simple - enters an ACPI state without BM handling
785 * @dev: the target CPU
786 * @state: the state data
787 */
788static int acpi_idle_enter_simple(struct cpuidle_device *dev,
789 struct cpuidle_state *state)
790{
791 struct acpi_processor *pr;
792 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
793 ktime_t kt1, kt2;
794 s64 idle_time_ns;
795 s64 idle_time;
796
797 pr = __this_cpu_read(processors);
798
799 if (unlikely(!pr))
800 return 0;
801
802 if (acpi_idle_suspend)
803 return(acpi_idle_enter_c1(dev, state));
804
805 local_irq_disable();
806
807 if (cx->entry_method != ACPI_CSTATE_FFH) {
808 current_thread_info()->status &= ~TS_POLLING;
809 /*
810 * TS_POLLING-cleared state must be visible before we test
811 * NEED_RESCHED:
812 */
813 smp_mb();
814
815 if (unlikely(need_resched())) {
816 current_thread_info()->status |= TS_POLLING;
817 local_irq_enable();
818 return 0;
819 }
820 }
821
822 /*
823 * Must be done before busmaster disable as we might need to
824 * access HPET !
825 */
826 lapic_timer_state_broadcast(pr, cx, 1);
827
828 if (cx->type == ACPI_STATE_C3)
829 ACPI_FLUSH_CPU_CACHE();
830
831 kt1 = ktime_get_real();
832 /* Tell the scheduler that we are going deep-idle: */
833 sched_clock_idle_sleep_event();
834 acpi_idle_do_entry(cx);
835 kt2 = ktime_get_real();
836 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
837 idle_time = idle_time_ns;
838 do_div(idle_time, NSEC_PER_USEC);
839
840 /* Tell the scheduler how much we idled: */
841 sched_clock_idle_wakeup_event(idle_time_ns);
842
843 local_irq_enable();
844 if (cx->entry_method != ACPI_CSTATE_FFH)
845 current_thread_info()->status |= TS_POLLING;
846
847 cx->usage++;
848
849 lapic_timer_state_broadcast(pr, cx, 0);
850 cx->time += idle_time;
851 return idle_time;
852}
853
854static int c3_cpu_count;
855static DEFINE_SPINLOCK(c3_lock);
856
857/**
858 * acpi_idle_enter_bm - enters C3 with proper BM handling
859 * @dev: the target CPU
860 * @state: the state data
861 *
862 * If BM is detected, the deepest non-C3 idle state is entered instead.
863 */
864static int acpi_idle_enter_bm(struct cpuidle_device *dev,
865 struct cpuidle_state *state)
866{
867 struct acpi_processor *pr;
868 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
869 ktime_t kt1, kt2;
870 s64 idle_time_ns;
871 s64 idle_time;
872
873
874 pr = __this_cpu_read(processors);
875
876 if (unlikely(!pr))
877 return 0;
878
879 if (acpi_idle_suspend)
880 return(acpi_idle_enter_c1(dev, state));
881
882 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
883 if (dev->safe_state) {
884 dev->last_state = dev->safe_state;
885 return dev->safe_state->enter(dev, dev->safe_state);
886 } else {
887 local_irq_disable();
888 acpi_safe_halt();
889 local_irq_enable();
890 return 0;
891 }
892 }
893
894 local_irq_disable();
895
896 if (cx->entry_method != ACPI_CSTATE_FFH) {
897 current_thread_info()->status &= ~TS_POLLING;
898 /*
899 * TS_POLLING-cleared state must be visible before we test
900 * NEED_RESCHED:
901 */
902 smp_mb();
903
904 if (unlikely(need_resched())) {
905 current_thread_info()->status |= TS_POLLING;
906 local_irq_enable();
907 return 0;
908 }
909 }
910
911 acpi_unlazy_tlb(smp_processor_id());
912
913 /* Tell the scheduler that we are going deep-idle: */
914 sched_clock_idle_sleep_event();
915 /*
916 * Must be done before busmaster disable as we might need to
917 * access HPET !
918 */
919 lapic_timer_state_broadcast(pr, cx, 1);
920
921 kt1 = ktime_get_real();
922 /*
923 * disable bus master
924 * bm_check implies we need ARB_DIS
925 * !bm_check implies we need cache flush
926 * bm_control implies whether we can do ARB_DIS
927 *
928 * That leaves a case where bm_check is set and bm_control is
929 * not set. In that case we cannot do much, we enter C3
930 * without doing anything.
931 */
932 if (pr->flags.bm_check && pr->flags.bm_control) {
933 spin_lock(&c3_lock);
934 c3_cpu_count++;
935 /* Disable bus master arbitration when all CPUs are in C3 */
936 if (c3_cpu_count == num_online_cpus())
937 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
938 spin_unlock(&c3_lock);
939 } else if (!pr->flags.bm_check) {
940 ACPI_FLUSH_CPU_CACHE();
941 }
942
943 acpi_idle_do_entry(cx);
944
945 /* Re-enable bus master arbitration */
946 if (pr->flags.bm_check && pr->flags.bm_control) {
947 spin_lock(&c3_lock);
948 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
949 c3_cpu_count--;
950 spin_unlock(&c3_lock);
951 }
952 kt2 = ktime_get_real();
953 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
954 idle_time = idle_time_ns;
955 do_div(idle_time, NSEC_PER_USEC);
956
957 /* Tell the scheduler how much we idled: */
958 sched_clock_idle_wakeup_event(idle_time_ns);
959
960 local_irq_enable();
961 if (cx->entry_method != ACPI_CSTATE_FFH)
962 current_thread_info()->status |= TS_POLLING;
963
964 cx->usage++;
965
966 lapic_timer_state_broadcast(pr, cx, 0);
967 cx->time += idle_time;
968 return idle_time;
969}
970
971struct cpuidle_driver acpi_idle_driver = {
972 .name = "acpi_idle",
973 .owner = THIS_MODULE,
974};
975
976/**
977 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
978 * @pr: the ACPI processor
979 */
980static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
981{
982 int i, count = CPUIDLE_DRIVER_STATE_START;
983 struct acpi_processor_cx *cx;
984 struct cpuidle_state *state;
985 struct cpuidle_device *dev = &pr->power.dev;
986
987 if (!pr->flags.power_setup_done)
988 return -EINVAL;
989
990 if (pr->flags.power == 0) {
991 return -EINVAL;
992 }
993
994 dev->cpu = pr->id;
995 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
996 dev->states[i].name[0] = '\0';
997 dev->states[i].desc[0] = '\0';
998 }
999
1000 if (max_cstate == 0)
1001 max_cstate = 1;
1002
1003 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1004 cx = &pr->power.states[i];
1005 state = &dev->states[count];
1006
1007 if (!cx->valid)
1008 continue;
1009
1010#ifdef CONFIG_HOTPLUG_CPU
1011 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1012 !pr->flags.has_cst &&
1013 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1014 continue;
1015#endif
1016 cpuidle_set_statedata(state, cx);
1017
1018 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1019 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1020 state->exit_latency = cx->latency;
1021 state->target_residency = cx->latency * latency_factor;
1022
1023 state->flags = 0;
1024 switch (cx->type) {
1025 case ACPI_STATE_C1:
1026 if (cx->entry_method == ACPI_CSTATE_FFH)
1027 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1028
1029 state->enter = acpi_idle_enter_c1;
1030 dev->safe_state = state;
1031 break;
1032
1033 case ACPI_STATE_C2:
1034 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1035 state->enter = acpi_idle_enter_simple;
1036 dev->safe_state = state;
1037 break;
1038
1039 case ACPI_STATE_C3:
1040 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1041 state->enter = pr->flags.bm_check ?
1042 acpi_idle_enter_bm :
1043 acpi_idle_enter_simple;
1044 break;
1045 }
1046
1047 count++;
1048 if (count == CPUIDLE_STATE_MAX)
1049 break;
1050 }
1051
1052 dev->state_count = count;
1053
1054 if (!count)
1055 return -EINVAL;
1056
1057 return 0;
1058}
1059
1060int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1061{
1062 int ret = 0;
1063
1064 if (disabled_by_idle_boot_param())
1065 return 0;
1066
1067 if (!pr)
1068 return -EINVAL;
1069
1070 if (nocst) {
1071 return -ENODEV;
1072 }
1073
1074 if (!pr->flags.power_setup_done)
1075 return -ENODEV;
1076
1077 cpuidle_pause_and_lock();
1078 cpuidle_disable_device(&pr->power.dev);
1079 acpi_processor_get_power_info(pr);
1080 if (pr->flags.power) {
1081 acpi_processor_setup_cpuidle(pr);
1082 ret = cpuidle_enable_device(&pr->power.dev);
1083 }
1084 cpuidle_resume_and_unlock();
1085
1086 return ret;
1087}
1088
1089int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1090 struct acpi_device *device)
1091{
1092 acpi_status status = 0;
1093 static int first_run;
1094
1095 if (disabled_by_idle_boot_param())
1096 return 0;
1097
1098 if (!first_run) {
1099 dmi_check_system(processor_power_dmi_table);
1100 max_cstate = acpi_processor_cstate_check(max_cstate);
1101 if (max_cstate < ACPI_C_STATES_MAX)
1102 printk(KERN_NOTICE
1103 "ACPI: processor limited to max C-state %d\n",
1104 max_cstate);
1105 first_run++;
1106 }
1107
1108 if (!pr)
1109 return -EINVAL;
1110
1111 if (acpi_gbl_FADT.cst_control && !nocst) {
1112 status =
1113 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1114 if (ACPI_FAILURE(status)) {
1115 ACPI_EXCEPTION((AE_INFO, status,
1116 "Notifying BIOS of _CST ability failed"));
1117 }
1118 }
1119
1120 acpi_processor_get_power_info(pr);
1121 pr->flags.power_setup_done = 1;
1122
1123 /*
1124 * Install the idle handler if processor power management is supported.
1125 * Note that we use previously set idle handler will be used on
1126 * platforms that only support C1.
1127 */
1128 if (pr->flags.power) {
1129 acpi_processor_setup_cpuidle(pr);
1130 if (cpuidle_register_device(&pr->power.dev))
1131 return -EIO;
1132 }
1133 return 0;
1134}
1135
1136int acpi_processor_power_exit(struct acpi_processor *pr,
1137 struct acpi_device *device)
1138{
1139 if (disabled_by_idle_boot_param())
1140 return 0;
1141
1142 cpuidle_unregister_device(&pr->power.dev);
1143 pr->flags.power_setup_done = 0;
1144
1145 return 0;
1146}
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
12 */
13#define pr_fmt(fmt) "ACPI: " fmt
14
15#include <linux/module.h>
16#include <linux/acpi.h>
17#include <linux/dmi.h>
18#include <linux/sched.h> /* need_resched() */
19#include <linux/sort.h>
20#include <linux/tick.h>
21#include <linux/cpuidle.h>
22#include <linux/cpu.h>
23#include <linux/minmax.h>
24#include <linux/perf_event.h>
25#include <acpi/processor.h>
26#include <linux/context_tracking.h>
27
28/*
29 * Include the apic definitions for x86 to have the APIC timer related defines
30 * available also for UP (on SMP it gets magically included via linux/smp.h).
31 * asm/acpi.h is not an option, as it would require more include magic. Also
32 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
33 */
34#ifdef CONFIG_X86
35#include <asm/apic.h>
36#include <asm/cpu.h>
37#endif
38
39#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
40
41static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
42module_param(max_cstate, uint, 0400);
43static bool nocst __read_mostly;
44module_param(nocst, bool, 0400);
45static bool bm_check_disable __read_mostly;
46module_param(bm_check_disable, bool, 0400);
47
48static unsigned int latency_factor __read_mostly = 2;
49module_param(latency_factor, uint, 0644);
50
51static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
52
53struct cpuidle_driver acpi_idle_driver = {
54 .name = "acpi_idle",
55 .owner = THIS_MODULE,
56};
57
58#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
59static
60DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
61
62static int disabled_by_idle_boot_param(void)
63{
64 return boot_option_idle_override == IDLE_POLL ||
65 boot_option_idle_override == IDLE_HALT;
66}
67
68/*
69 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
70 * For now disable this. Probably a bug somewhere else.
71 *
72 * To skip this limit, boot/load with a large max_cstate limit.
73 */
74static int set_max_cstate(const struct dmi_system_id *id)
75{
76 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
77 return 0;
78
79 pr_notice("%s detected - limiting to C%ld max_cstate."
80 " Override with \"processor.max_cstate=%d\"\n", id->ident,
81 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
82
83 max_cstate = (long)id->driver_data;
84
85 return 0;
86}
87
88static const struct dmi_system_id processor_power_dmi_table[] = {
89 { set_max_cstate, "Clevo 5600D", {
90 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
91 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
92 (void *)2},
93 { set_max_cstate, "Pavilion zv5000", {
94 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
95 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
96 (void *)1},
97 { set_max_cstate, "Asus L8400B", {
98 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
99 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
100 (void *)1},
101 {},
102};
103
104
105/*
106 * Callers should disable interrupts before the call and enable
107 * interrupts after return.
108 */
109static void __cpuidle acpi_safe_halt(void)
110{
111 if (!tif_need_resched()) {
112 safe_halt();
113 local_irq_disable();
114 }
115}
116
117#ifdef ARCH_APICTIMER_STOPS_ON_C3
118
119/*
120 * Some BIOS implementations switch to C3 in the published C2 state.
121 * This seems to be a common problem on AMD boxen, but other vendors
122 * are affected too. We pick the most conservative approach: we assume
123 * that the local APIC stops in both C2 and C3.
124 */
125static void lapic_timer_check_state(int state, struct acpi_processor *pr,
126 struct acpi_processor_cx *cx)
127{
128 struct acpi_processor_power *pwr = &pr->power;
129 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
130
131 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
132 return;
133
134 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
135 type = ACPI_STATE_C1;
136
137 /*
138 * Check, if one of the previous states already marked the lapic
139 * unstable
140 */
141 if (pwr->timer_broadcast_on_state < state)
142 return;
143
144 if (cx->type >= type)
145 pr->power.timer_broadcast_on_state = state;
146}
147
148static void __lapic_timer_propagate_broadcast(void *arg)
149{
150 struct acpi_processor *pr = (struct acpi_processor *) arg;
151
152 if (pr->power.timer_broadcast_on_state < INT_MAX)
153 tick_broadcast_enable();
154 else
155 tick_broadcast_disable();
156}
157
158static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
159{
160 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
161 (void *)pr, 1);
162}
163
164/* Power(C) State timer broadcast control */
165static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
166 struct acpi_processor_cx *cx)
167{
168 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
169}
170
171#else
172
173static void lapic_timer_check_state(int state, struct acpi_processor *pr,
174 struct acpi_processor_cx *cstate) { }
175static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
176
177static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
178 struct acpi_processor_cx *cx)
179{
180 return false;
181}
182
183#endif
184
185#if defined(CONFIG_X86)
186static void tsc_check_state(int state)
187{
188 switch (boot_cpu_data.x86_vendor) {
189 case X86_VENDOR_HYGON:
190 case X86_VENDOR_AMD:
191 case X86_VENDOR_INTEL:
192 case X86_VENDOR_CENTAUR:
193 case X86_VENDOR_ZHAOXIN:
194 /*
195 * AMD Fam10h TSC will tick in all
196 * C/P/S0/S1 states when this bit is set.
197 */
198 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
199 return;
200 fallthrough;
201 default:
202 /* TSC could halt in idle, so notify users */
203 if (state > ACPI_STATE_C1)
204 mark_tsc_unstable("TSC halts in idle");
205 }
206}
207#else
208static void tsc_check_state(int state) { return; }
209#endif
210
211static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
212{
213
214 if (!pr->pblk)
215 return -ENODEV;
216
217 /* if info is obtained from pblk/fadt, type equals state */
218 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
219 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
220
221#ifndef CONFIG_HOTPLUG_CPU
222 /*
223 * Check for P_LVL2_UP flag before entering C2 and above on
224 * an SMP system.
225 */
226 if ((num_online_cpus() > 1) &&
227 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
228 return -ENODEV;
229#endif
230
231 /* determine C2 and C3 address from pblk */
232 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
233 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
234
235 /* determine latencies from FADT */
236 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
237 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
238
239 /*
240 * FADT specified C2 latency must be less than or equal to
241 * 100 microseconds.
242 */
243 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
244 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
245 acpi_gbl_FADT.c2_latency);
246 /* invalidate C2 */
247 pr->power.states[ACPI_STATE_C2].address = 0;
248 }
249
250 /*
251 * FADT supplied C3 latency must be less than or equal to
252 * 1000 microseconds.
253 */
254 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
255 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
256 acpi_gbl_FADT.c3_latency);
257 /* invalidate C3 */
258 pr->power.states[ACPI_STATE_C3].address = 0;
259 }
260
261 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
262 pr->power.states[ACPI_STATE_C2].address,
263 pr->power.states[ACPI_STATE_C3].address);
264
265 snprintf(pr->power.states[ACPI_STATE_C2].desc,
266 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
267 pr->power.states[ACPI_STATE_C2].address);
268 snprintf(pr->power.states[ACPI_STATE_C3].desc,
269 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
270 pr->power.states[ACPI_STATE_C3].address);
271
272 return 0;
273}
274
275static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
276{
277 if (!pr->power.states[ACPI_STATE_C1].valid) {
278 /* set the first C-State to C1 */
279 /* all processors need to support C1 */
280 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
281 pr->power.states[ACPI_STATE_C1].valid = 1;
282 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
283
284 snprintf(pr->power.states[ACPI_STATE_C1].desc,
285 ACPI_CX_DESC_LEN, "ACPI HLT");
286 }
287 /* the C0 state only exists as a filler in our array */
288 pr->power.states[ACPI_STATE_C0].valid = 1;
289 return 0;
290}
291
292static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
293{
294 int ret;
295
296 if (nocst)
297 return -ENODEV;
298
299 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
300 if (ret)
301 return ret;
302
303 if (!pr->power.count)
304 return -EFAULT;
305
306 pr->flags.has_cst = 1;
307 return 0;
308}
309
310static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
311 struct acpi_processor_cx *cx)
312{
313 static int bm_check_flag = -1;
314 static int bm_control_flag = -1;
315
316
317 if (!cx->address)
318 return;
319
320 /*
321 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
322 * DMA transfers are used by any ISA device to avoid livelock.
323 * Note that we could disable Type-F DMA (as recommended by
324 * the erratum), but this is known to disrupt certain ISA
325 * devices thus we take the conservative approach.
326 */
327 if (errata.piix4.fdma) {
328 acpi_handle_debug(pr->handle,
329 "C3 not supported on PIIX4 with Type-F DMA\n");
330 return;
331 }
332
333 /* All the logic here assumes flags.bm_check is same across all CPUs */
334 if (bm_check_flag == -1) {
335 /* Determine whether bm_check is needed based on CPU */
336 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
337 bm_check_flag = pr->flags.bm_check;
338 bm_control_flag = pr->flags.bm_control;
339 } else {
340 pr->flags.bm_check = bm_check_flag;
341 pr->flags.bm_control = bm_control_flag;
342 }
343
344 if (pr->flags.bm_check) {
345 if (!pr->flags.bm_control) {
346 if (pr->flags.has_cst != 1) {
347 /* bus mastering control is necessary */
348 acpi_handle_debug(pr->handle,
349 "C3 support requires BM control\n");
350 return;
351 } else {
352 /* Here we enter C3 without bus mastering */
353 acpi_handle_debug(pr->handle,
354 "C3 support without BM control\n");
355 }
356 }
357 } else {
358 /*
359 * WBINVD should be set in fadt, for C3 state to be
360 * supported on when bm_check is not required.
361 */
362 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
363 acpi_handle_debug(pr->handle,
364 "Cache invalidation should work properly"
365 " for C3 to be enabled on SMP systems\n");
366 return;
367 }
368 }
369
370 /*
371 * Otherwise we've met all of our C3 requirements.
372 * Normalize the C3 latency to expidite policy. Enable
373 * checking of bus mastering status (bm_check) so we can
374 * use this in our C3 policy
375 */
376 cx->valid = 1;
377
378 /*
379 * On older chipsets, BM_RLD needs to be set
380 * in order for Bus Master activity to wake the
381 * system from C3. Newer chipsets handle DMA
382 * during C3 automatically and BM_RLD is a NOP.
383 * In either case, the proper way to
384 * handle BM_RLD is to set it and leave it set.
385 */
386 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
387}
388
389static int acpi_cst_latency_cmp(const void *a, const void *b)
390{
391 const struct acpi_processor_cx *x = a, *y = b;
392
393 if (!(x->valid && y->valid))
394 return 0;
395 if (x->latency > y->latency)
396 return 1;
397 if (x->latency < y->latency)
398 return -1;
399 return 0;
400}
401static void acpi_cst_latency_swap(void *a, void *b, int n)
402{
403 struct acpi_processor_cx *x = a, *y = b;
404
405 if (!(x->valid && y->valid))
406 return;
407 swap(x->latency, y->latency);
408}
409
410static int acpi_processor_power_verify(struct acpi_processor *pr)
411{
412 unsigned int i;
413 unsigned int working = 0;
414 unsigned int last_latency = 0;
415 unsigned int last_type = 0;
416 bool buggy_latency = false;
417
418 pr->power.timer_broadcast_on_state = INT_MAX;
419
420 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
421 struct acpi_processor_cx *cx = &pr->power.states[i];
422
423 switch (cx->type) {
424 case ACPI_STATE_C1:
425 cx->valid = 1;
426 break;
427
428 case ACPI_STATE_C2:
429 if (!cx->address)
430 break;
431 cx->valid = 1;
432 break;
433
434 case ACPI_STATE_C3:
435 acpi_processor_power_verify_c3(pr, cx);
436 break;
437 }
438 if (!cx->valid)
439 continue;
440 if (cx->type >= last_type && cx->latency < last_latency)
441 buggy_latency = true;
442 last_latency = cx->latency;
443 last_type = cx->type;
444
445 lapic_timer_check_state(i, pr, cx);
446 tsc_check_state(cx->type);
447 working++;
448 }
449
450 if (buggy_latency) {
451 pr_notice("FW issue: working around C-state latencies out of order\n");
452 sort(&pr->power.states[1], max_cstate,
453 sizeof(struct acpi_processor_cx),
454 acpi_cst_latency_cmp,
455 acpi_cst_latency_swap);
456 }
457
458 lapic_timer_propagate_broadcast(pr);
459
460 return working;
461}
462
463static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
464{
465 unsigned int i;
466 int result;
467
468
469 /* NOTE: the idle thread may not be running while calling
470 * this function */
471
472 /* Zero initialize all the C-states info. */
473 memset(pr->power.states, 0, sizeof(pr->power.states));
474
475 result = acpi_processor_get_power_info_cst(pr);
476 if (result == -ENODEV)
477 result = acpi_processor_get_power_info_fadt(pr);
478
479 if (result)
480 return result;
481
482 acpi_processor_get_power_info_default(pr);
483
484 pr->power.count = acpi_processor_power_verify(pr);
485
486 /*
487 * if one state of type C2 or C3 is available, mark this
488 * CPU as being "idle manageable"
489 */
490 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
491 if (pr->power.states[i].valid) {
492 pr->power.count = i;
493 pr->flags.power = 1;
494 }
495 }
496
497 return 0;
498}
499
500/**
501 * acpi_idle_bm_check - checks if bus master activity was detected
502 */
503static int acpi_idle_bm_check(void)
504{
505 u32 bm_status = 0;
506
507 if (bm_check_disable)
508 return 0;
509
510 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
511 if (bm_status)
512 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
513 /*
514 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
515 * the true state of bus mastering activity; forcing us to
516 * manually check the BMIDEA bit of each IDE channel.
517 */
518 else if (errata.piix4.bmisx) {
519 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
520 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
521 bm_status = 1;
522 }
523 return bm_status;
524}
525
526static void wait_for_freeze(void)
527{
528#ifdef CONFIG_X86
529 /* No delay is needed if we are in guest */
530 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
531 return;
532 /*
533 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
534 * not this code. Assume that any Intel systems using this
535 * are ancient and may need the dummy wait. This also assumes
536 * that the motivating chipset issue was Intel-only.
537 */
538 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
539 return;
540#endif
541 /*
542 * Dummy wait op - must do something useless after P_LVL2 read
543 * because chipsets cannot guarantee that STPCLK# signal gets
544 * asserted in time to freeze execution properly
545 *
546 * This workaround has been in place since the original ACPI
547 * implementation was merged, circa 2002.
548 *
549 * If a profile is pointing to this instruction, please first
550 * consider moving your system to a more modern idle
551 * mechanism.
552 */
553 inl(acpi_gbl_FADT.xpm_timer_block.address);
554}
555
556/**
557 * acpi_idle_do_entry - enter idle state using the appropriate method
558 * @cx: cstate data
559 *
560 * Caller disables interrupt before call and enables interrupt after return.
561 */
562static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
563{
564 perf_lopwr_cb(true);
565
566 if (cx->entry_method == ACPI_CSTATE_FFH) {
567 /* Call into architectural FFH based C-state */
568 acpi_processor_ffh_cstate_enter(cx);
569 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
570 acpi_safe_halt();
571 } else {
572 /* IO port based C-state */
573 inb(cx->address);
574 wait_for_freeze();
575 }
576
577 perf_lopwr_cb(false);
578}
579
580/**
581 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
582 * @dev: the target CPU
583 * @index: the index of suggested state
584 */
585static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
586{
587 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
588
589 ACPI_FLUSH_CPU_CACHE();
590
591 while (1) {
592
593 if (cx->entry_method == ACPI_CSTATE_HALT)
594 safe_halt();
595 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
596 inb(cx->address);
597 wait_for_freeze();
598 } else
599 return -ENODEV;
600
601#if defined(CONFIG_X86) && defined(CONFIG_HOTPLUG_CPU)
602 cond_wakeup_cpu0();
603#endif
604 }
605
606 /* Never reached */
607 return 0;
608}
609
610static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
611{
612 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
613 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
614}
615
616static int c3_cpu_count;
617static DEFINE_RAW_SPINLOCK(c3_lock);
618
619/**
620 * acpi_idle_enter_bm - enters C3 with proper BM handling
621 * @drv: cpuidle driver
622 * @pr: Target processor
623 * @cx: Target state context
624 * @index: index of target state
625 */
626static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
627 struct acpi_processor *pr,
628 struct acpi_processor_cx *cx,
629 int index)
630{
631 static struct acpi_processor_cx safe_cx = {
632 .entry_method = ACPI_CSTATE_HALT,
633 };
634
635 /*
636 * disable bus master
637 * bm_check implies we need ARB_DIS
638 * bm_control implies whether we can do ARB_DIS
639 *
640 * That leaves a case where bm_check is set and bm_control is not set.
641 * In that case we cannot do much, we enter C3 without doing anything.
642 */
643 bool dis_bm = pr->flags.bm_control;
644
645 /* If we can skip BM, demote to a safe state. */
646 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
647 dis_bm = false;
648 index = drv->safe_state_index;
649 if (index >= 0) {
650 cx = this_cpu_read(acpi_cstate[index]);
651 } else {
652 cx = &safe_cx;
653 index = -EBUSY;
654 }
655 }
656
657 if (dis_bm) {
658 raw_spin_lock(&c3_lock);
659 c3_cpu_count++;
660 /* Disable bus master arbitration when all CPUs are in C3 */
661 if (c3_cpu_count == num_online_cpus())
662 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
663 raw_spin_unlock(&c3_lock);
664 }
665
666 ct_idle_enter();
667
668 acpi_idle_do_entry(cx);
669
670 ct_idle_exit();
671
672 /* Re-enable bus master arbitration */
673 if (dis_bm) {
674 raw_spin_lock(&c3_lock);
675 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
676 c3_cpu_count--;
677 raw_spin_unlock(&c3_lock);
678 }
679
680 return index;
681}
682
683static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
684 struct cpuidle_driver *drv, int index)
685{
686 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
687 struct acpi_processor *pr;
688
689 pr = __this_cpu_read(processors);
690 if (unlikely(!pr))
691 return -EINVAL;
692
693 if (cx->type != ACPI_STATE_C1) {
694 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
695 return acpi_idle_enter_bm(drv, pr, cx, index);
696
697 /* C2 to C1 demotion. */
698 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
699 index = ACPI_IDLE_STATE_START;
700 cx = per_cpu(acpi_cstate[index], dev->cpu);
701 }
702 }
703
704 if (cx->type == ACPI_STATE_C3)
705 ACPI_FLUSH_CPU_CACHE();
706
707 acpi_idle_do_entry(cx);
708
709 return index;
710}
711
712static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
713 struct cpuidle_driver *drv, int index)
714{
715 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
716
717 if (cx->type == ACPI_STATE_C3) {
718 struct acpi_processor *pr = __this_cpu_read(processors);
719
720 if (unlikely(!pr))
721 return 0;
722
723 if (pr->flags.bm_check) {
724 u8 bm_sts_skip = cx->bm_sts_skip;
725
726 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
727 cx->bm_sts_skip = 1;
728 acpi_idle_enter_bm(drv, pr, cx, index);
729 cx->bm_sts_skip = bm_sts_skip;
730
731 return 0;
732 } else {
733 ACPI_FLUSH_CPU_CACHE();
734 }
735 }
736 acpi_idle_do_entry(cx);
737
738 return 0;
739}
740
741static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
742 struct cpuidle_device *dev)
743{
744 int i, count = ACPI_IDLE_STATE_START;
745 struct acpi_processor_cx *cx;
746 struct cpuidle_state *state;
747
748 if (max_cstate == 0)
749 max_cstate = 1;
750
751 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
752 state = &acpi_idle_driver.states[count];
753 cx = &pr->power.states[i];
754
755 if (!cx->valid)
756 continue;
757
758 per_cpu(acpi_cstate[count], dev->cpu) = cx;
759
760 if (lapic_timer_needs_broadcast(pr, cx))
761 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
762
763 if (cx->type == ACPI_STATE_C3) {
764 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
765 if (pr->flags.bm_check)
766 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
767 }
768
769 count++;
770 if (count == CPUIDLE_STATE_MAX)
771 break;
772 }
773
774 if (!count)
775 return -EINVAL;
776
777 return 0;
778}
779
780static int acpi_processor_setup_cstates(struct acpi_processor *pr)
781{
782 int i, count;
783 struct acpi_processor_cx *cx;
784 struct cpuidle_state *state;
785 struct cpuidle_driver *drv = &acpi_idle_driver;
786
787 if (max_cstate == 0)
788 max_cstate = 1;
789
790 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
791 cpuidle_poll_state_init(drv);
792 count = 1;
793 } else {
794 count = 0;
795 }
796
797 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
798 cx = &pr->power.states[i];
799
800 if (!cx->valid)
801 continue;
802
803 state = &drv->states[count];
804 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
805 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
806 state->exit_latency = cx->latency;
807 state->target_residency = cx->latency * latency_factor;
808 state->enter = acpi_idle_enter;
809
810 state->flags = 0;
811 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2 ||
812 cx->type == ACPI_STATE_C3) {
813 state->enter_dead = acpi_idle_play_dead;
814 if (cx->type != ACPI_STATE_C3)
815 drv->safe_state_index = count;
816 }
817 /*
818 * Halt-induced C1 is not good for ->enter_s2idle, because it
819 * re-enables interrupts on exit. Moreover, C1 is generally not
820 * particularly interesting from the suspend-to-idle angle, so
821 * avoid C1 and the situations in which we may need to fall back
822 * to it altogether.
823 */
824 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
825 state->enter_s2idle = acpi_idle_enter_s2idle;
826
827 count++;
828 if (count == CPUIDLE_STATE_MAX)
829 break;
830 }
831
832 drv->state_count = count;
833
834 if (!count)
835 return -EINVAL;
836
837 return 0;
838}
839
840static inline void acpi_processor_cstate_first_run_checks(void)
841{
842 static int first_run;
843
844 if (first_run)
845 return;
846 dmi_check_system(processor_power_dmi_table);
847 max_cstate = acpi_processor_cstate_check(max_cstate);
848 if (max_cstate < ACPI_C_STATES_MAX)
849 pr_notice("processor limited to max C-state %d\n", max_cstate);
850
851 first_run++;
852
853 if (nocst)
854 return;
855
856 acpi_processor_claim_cst_control();
857}
858#else
859
860static inline int disabled_by_idle_boot_param(void) { return 0; }
861static inline void acpi_processor_cstate_first_run_checks(void) { }
862static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
863{
864 return -ENODEV;
865}
866
867static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
868 struct cpuidle_device *dev)
869{
870 return -EINVAL;
871}
872
873static int acpi_processor_setup_cstates(struct acpi_processor *pr)
874{
875 return -EINVAL;
876}
877
878#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
879
880struct acpi_lpi_states_array {
881 unsigned int size;
882 unsigned int composite_states_size;
883 struct acpi_lpi_state *entries;
884 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
885};
886
887static int obj_get_integer(union acpi_object *obj, u32 *value)
888{
889 if (obj->type != ACPI_TYPE_INTEGER)
890 return -EINVAL;
891
892 *value = obj->integer.value;
893 return 0;
894}
895
896static int acpi_processor_evaluate_lpi(acpi_handle handle,
897 struct acpi_lpi_states_array *info)
898{
899 acpi_status status;
900 int ret = 0;
901 int pkg_count, state_idx = 1, loop;
902 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
903 union acpi_object *lpi_data;
904 struct acpi_lpi_state *lpi_state;
905
906 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
907 if (ACPI_FAILURE(status)) {
908 acpi_handle_debug(handle, "No _LPI, giving up\n");
909 return -ENODEV;
910 }
911
912 lpi_data = buffer.pointer;
913
914 /* There must be at least 4 elements = 3 elements + 1 package */
915 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
916 lpi_data->package.count < 4) {
917 pr_debug("not enough elements in _LPI\n");
918 ret = -ENODATA;
919 goto end;
920 }
921
922 pkg_count = lpi_data->package.elements[2].integer.value;
923
924 /* Validate number of power states. */
925 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
926 pr_debug("count given by _LPI is not valid\n");
927 ret = -ENODATA;
928 goto end;
929 }
930
931 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
932 if (!lpi_state) {
933 ret = -ENOMEM;
934 goto end;
935 }
936
937 info->size = pkg_count;
938 info->entries = lpi_state;
939
940 /* LPI States start at index 3 */
941 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
942 union acpi_object *element, *pkg_elem, *obj;
943
944 element = &lpi_data->package.elements[loop];
945 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
946 continue;
947
948 pkg_elem = element->package.elements;
949
950 obj = pkg_elem + 6;
951 if (obj->type == ACPI_TYPE_BUFFER) {
952 struct acpi_power_register *reg;
953
954 reg = (struct acpi_power_register *)obj->buffer.pointer;
955 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
956 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
957 continue;
958
959 lpi_state->address = reg->address;
960 lpi_state->entry_method =
961 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
962 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
963 } else if (obj->type == ACPI_TYPE_INTEGER) {
964 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
965 lpi_state->address = obj->integer.value;
966 } else {
967 continue;
968 }
969
970 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
971
972 obj = pkg_elem + 9;
973 if (obj->type == ACPI_TYPE_STRING)
974 strscpy(lpi_state->desc, obj->string.pointer,
975 ACPI_CX_DESC_LEN);
976
977 lpi_state->index = state_idx;
978 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
979 pr_debug("No min. residency found, assuming 10 us\n");
980 lpi_state->min_residency = 10;
981 }
982
983 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
984 pr_debug("No wakeup residency found, assuming 10 us\n");
985 lpi_state->wake_latency = 10;
986 }
987
988 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
989 lpi_state->flags = 0;
990
991 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
992 lpi_state->arch_flags = 0;
993
994 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
995 lpi_state->res_cnt_freq = 1;
996
997 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
998 lpi_state->enable_parent_state = 0;
999 }
1000
1001 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
1002end:
1003 kfree(buffer.pointer);
1004 return ret;
1005}
1006
1007/*
1008 * flat_state_cnt - the number of composite LPI states after the process of flattening
1009 */
1010static int flat_state_cnt;
1011
1012/**
1013 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1014 *
1015 * @local: local LPI state
1016 * @parent: parent LPI state
1017 * @result: composite LPI state
1018 */
1019static bool combine_lpi_states(struct acpi_lpi_state *local,
1020 struct acpi_lpi_state *parent,
1021 struct acpi_lpi_state *result)
1022{
1023 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1024 if (!parent->address) /* 0 means autopromotable */
1025 return false;
1026 result->address = local->address + parent->address;
1027 } else {
1028 result->address = parent->address;
1029 }
1030
1031 result->min_residency = max(local->min_residency, parent->min_residency);
1032 result->wake_latency = local->wake_latency + parent->wake_latency;
1033 result->enable_parent_state = parent->enable_parent_state;
1034 result->entry_method = local->entry_method;
1035
1036 result->flags = parent->flags;
1037 result->arch_flags = parent->arch_flags;
1038 result->index = parent->index;
1039
1040 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1041 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1042 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1043 return true;
1044}
1045
1046#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1047
1048static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1049 struct acpi_lpi_state *t)
1050{
1051 curr_level->composite_states[curr_level->composite_states_size++] = t;
1052}
1053
1054static int flatten_lpi_states(struct acpi_processor *pr,
1055 struct acpi_lpi_states_array *curr_level,
1056 struct acpi_lpi_states_array *prev_level)
1057{
1058 int i, j, state_count = curr_level->size;
1059 struct acpi_lpi_state *p, *t = curr_level->entries;
1060
1061 curr_level->composite_states_size = 0;
1062 for (j = 0; j < state_count; j++, t++) {
1063 struct acpi_lpi_state *flpi;
1064
1065 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1066 continue;
1067
1068 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1069 pr_warn("Limiting number of LPI states to max (%d)\n",
1070 ACPI_PROCESSOR_MAX_POWER);
1071 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1072 break;
1073 }
1074
1075 flpi = &pr->power.lpi_states[flat_state_cnt];
1076
1077 if (!prev_level) { /* leaf/processor node */
1078 memcpy(flpi, t, sizeof(*t));
1079 stash_composite_state(curr_level, flpi);
1080 flat_state_cnt++;
1081 continue;
1082 }
1083
1084 for (i = 0; i < prev_level->composite_states_size; i++) {
1085 p = prev_level->composite_states[i];
1086 if (t->index <= p->enable_parent_state &&
1087 combine_lpi_states(p, t, flpi)) {
1088 stash_composite_state(curr_level, flpi);
1089 flat_state_cnt++;
1090 flpi++;
1091 }
1092 }
1093 }
1094
1095 kfree(curr_level->entries);
1096 return 0;
1097}
1098
1099int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1100{
1101 return -EOPNOTSUPP;
1102}
1103
1104static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1105{
1106 int ret, i;
1107 acpi_status status;
1108 acpi_handle handle = pr->handle, pr_ahandle;
1109 struct acpi_device *d = NULL;
1110 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1111
1112 /* make sure our architecture has support */
1113 ret = acpi_processor_ffh_lpi_probe(pr->id);
1114 if (ret == -EOPNOTSUPP)
1115 return ret;
1116
1117 if (!osc_pc_lpi_support_confirmed)
1118 return -EOPNOTSUPP;
1119
1120 if (!acpi_has_method(handle, "_LPI"))
1121 return -EINVAL;
1122
1123 flat_state_cnt = 0;
1124 prev = &info[0];
1125 curr = &info[1];
1126 handle = pr->handle;
1127 ret = acpi_processor_evaluate_lpi(handle, prev);
1128 if (ret)
1129 return ret;
1130 flatten_lpi_states(pr, prev, NULL);
1131
1132 status = acpi_get_parent(handle, &pr_ahandle);
1133 while (ACPI_SUCCESS(status)) {
1134 d = acpi_fetch_acpi_dev(pr_ahandle);
1135 if (!d)
1136 break;
1137
1138 handle = pr_ahandle;
1139
1140 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1141 break;
1142
1143 /* can be optional ? */
1144 if (!acpi_has_method(handle, "_LPI"))
1145 break;
1146
1147 ret = acpi_processor_evaluate_lpi(handle, curr);
1148 if (ret)
1149 break;
1150
1151 /* flatten all the LPI states in this level of hierarchy */
1152 flatten_lpi_states(pr, curr, prev);
1153
1154 tmp = prev, prev = curr, curr = tmp;
1155
1156 status = acpi_get_parent(handle, &pr_ahandle);
1157 }
1158
1159 pr->power.count = flat_state_cnt;
1160 /* reset the index after flattening */
1161 for (i = 0; i < pr->power.count; i++)
1162 pr->power.lpi_states[i].index = i;
1163
1164 /* Tell driver that _LPI is supported. */
1165 pr->flags.has_lpi = 1;
1166 pr->flags.power = 1;
1167
1168 return 0;
1169}
1170
1171int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1172{
1173 return -ENODEV;
1174}
1175
1176/**
1177 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1178 * @dev: the target CPU
1179 * @drv: cpuidle driver containing cpuidle state info
1180 * @index: index of target state
1181 *
1182 * Return: 0 for success or negative value for error
1183 */
1184static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1185 struct cpuidle_driver *drv, int index)
1186{
1187 struct acpi_processor *pr;
1188 struct acpi_lpi_state *lpi;
1189
1190 pr = __this_cpu_read(processors);
1191
1192 if (unlikely(!pr))
1193 return -EINVAL;
1194
1195 lpi = &pr->power.lpi_states[index];
1196 if (lpi->entry_method == ACPI_CSTATE_FFH)
1197 return acpi_processor_ffh_lpi_enter(lpi);
1198
1199 return -EINVAL;
1200}
1201
1202static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1203{
1204 int i;
1205 struct acpi_lpi_state *lpi;
1206 struct cpuidle_state *state;
1207 struct cpuidle_driver *drv = &acpi_idle_driver;
1208
1209 if (!pr->flags.has_lpi)
1210 return -EOPNOTSUPP;
1211
1212 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1213 lpi = &pr->power.lpi_states[i];
1214
1215 state = &drv->states[i];
1216 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1217 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1218 state->exit_latency = lpi->wake_latency;
1219 state->target_residency = lpi->min_residency;
1220 if (lpi->arch_flags)
1221 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
1222 state->enter = acpi_idle_lpi_enter;
1223 drv->safe_state_index = i;
1224 }
1225
1226 drv->state_count = i;
1227
1228 return 0;
1229}
1230
1231/**
1232 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1233 * global state data i.e. idle routines
1234 *
1235 * @pr: the ACPI processor
1236 */
1237static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1238{
1239 int i;
1240 struct cpuidle_driver *drv = &acpi_idle_driver;
1241
1242 if (!pr->flags.power_setup_done || !pr->flags.power)
1243 return -EINVAL;
1244
1245 drv->safe_state_index = -1;
1246 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1247 drv->states[i].name[0] = '\0';
1248 drv->states[i].desc[0] = '\0';
1249 }
1250
1251 if (pr->flags.has_lpi)
1252 return acpi_processor_setup_lpi_states(pr);
1253
1254 return acpi_processor_setup_cstates(pr);
1255}
1256
1257/**
1258 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1259 * device i.e. per-cpu data
1260 *
1261 * @pr: the ACPI processor
1262 * @dev : the cpuidle device
1263 */
1264static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1265 struct cpuidle_device *dev)
1266{
1267 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1268 return -EINVAL;
1269
1270 dev->cpu = pr->id;
1271 if (pr->flags.has_lpi)
1272 return acpi_processor_ffh_lpi_probe(pr->id);
1273
1274 return acpi_processor_setup_cpuidle_cx(pr, dev);
1275}
1276
1277static int acpi_processor_get_power_info(struct acpi_processor *pr)
1278{
1279 int ret;
1280
1281 ret = acpi_processor_get_lpi_info(pr);
1282 if (ret)
1283 ret = acpi_processor_get_cstate_info(pr);
1284
1285 return ret;
1286}
1287
1288int acpi_processor_hotplug(struct acpi_processor *pr)
1289{
1290 int ret = 0;
1291 struct cpuidle_device *dev;
1292
1293 if (disabled_by_idle_boot_param())
1294 return 0;
1295
1296 if (!pr->flags.power_setup_done)
1297 return -ENODEV;
1298
1299 dev = per_cpu(acpi_cpuidle_device, pr->id);
1300 cpuidle_pause_and_lock();
1301 cpuidle_disable_device(dev);
1302 ret = acpi_processor_get_power_info(pr);
1303 if (!ret && pr->flags.power) {
1304 acpi_processor_setup_cpuidle_dev(pr, dev);
1305 ret = cpuidle_enable_device(dev);
1306 }
1307 cpuidle_resume_and_unlock();
1308
1309 return ret;
1310}
1311
1312int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1313{
1314 int cpu;
1315 struct acpi_processor *_pr;
1316 struct cpuidle_device *dev;
1317
1318 if (disabled_by_idle_boot_param())
1319 return 0;
1320
1321 if (!pr->flags.power_setup_done)
1322 return -ENODEV;
1323
1324 /*
1325 * FIXME: Design the ACPI notification to make it once per
1326 * system instead of once per-cpu. This condition is a hack
1327 * to make the code that updates C-States be called once.
1328 */
1329
1330 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1331
1332 /* Protect against cpu-hotplug */
1333 cpus_read_lock();
1334 cpuidle_pause_and_lock();
1335
1336 /* Disable all cpuidle devices */
1337 for_each_online_cpu(cpu) {
1338 _pr = per_cpu(processors, cpu);
1339 if (!_pr || !_pr->flags.power_setup_done)
1340 continue;
1341 dev = per_cpu(acpi_cpuidle_device, cpu);
1342 cpuidle_disable_device(dev);
1343 }
1344
1345 /* Populate Updated C-state information */
1346 acpi_processor_get_power_info(pr);
1347 acpi_processor_setup_cpuidle_states(pr);
1348
1349 /* Enable all cpuidle devices */
1350 for_each_online_cpu(cpu) {
1351 _pr = per_cpu(processors, cpu);
1352 if (!_pr || !_pr->flags.power_setup_done)
1353 continue;
1354 acpi_processor_get_power_info(_pr);
1355 if (_pr->flags.power) {
1356 dev = per_cpu(acpi_cpuidle_device, cpu);
1357 acpi_processor_setup_cpuidle_dev(_pr, dev);
1358 cpuidle_enable_device(dev);
1359 }
1360 }
1361 cpuidle_resume_and_unlock();
1362 cpus_read_unlock();
1363 }
1364
1365 return 0;
1366}
1367
1368static int acpi_processor_registered;
1369
1370int acpi_processor_power_init(struct acpi_processor *pr)
1371{
1372 int retval;
1373 struct cpuidle_device *dev;
1374
1375 if (disabled_by_idle_boot_param())
1376 return 0;
1377
1378 acpi_processor_cstate_first_run_checks();
1379
1380 if (!acpi_processor_get_power_info(pr))
1381 pr->flags.power_setup_done = 1;
1382
1383 /*
1384 * Install the idle handler if processor power management is supported.
1385 * Note that we use previously set idle handler will be used on
1386 * platforms that only support C1.
1387 */
1388 if (pr->flags.power) {
1389 /* Register acpi_idle_driver if not already registered */
1390 if (!acpi_processor_registered) {
1391 acpi_processor_setup_cpuidle_states(pr);
1392 retval = cpuidle_register_driver(&acpi_idle_driver);
1393 if (retval)
1394 return retval;
1395 pr_debug("%s registered with cpuidle\n",
1396 acpi_idle_driver.name);
1397 }
1398
1399 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1400 if (!dev)
1401 return -ENOMEM;
1402 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1403
1404 acpi_processor_setup_cpuidle_dev(pr, dev);
1405
1406 /* Register per-cpu cpuidle_device. Cpuidle driver
1407 * must already be registered before registering device
1408 */
1409 retval = cpuidle_register_device(dev);
1410 if (retval) {
1411 if (acpi_processor_registered == 0)
1412 cpuidle_unregister_driver(&acpi_idle_driver);
1413 return retval;
1414 }
1415 acpi_processor_registered++;
1416 }
1417 return 0;
1418}
1419
1420int acpi_processor_power_exit(struct acpi_processor *pr)
1421{
1422 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1423
1424 if (disabled_by_idle_boot_param())
1425 return 0;
1426
1427 if (pr->flags.power) {
1428 cpuidle_unregister_device(dev);
1429 acpi_processor_registered--;
1430 if (acpi_processor_registered == 0)
1431 cpuidle_unregister_driver(&acpi_idle_driver);
1432 }
1433
1434 pr->flags.power_setup_done = 0;
1435 return 0;
1436}