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1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val << shift, buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val << shift, buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val << shift, buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
312}
313
314#ifdef CONFIG_64BIT
315static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
316{
317 put_unaligned_be64((u64) val << shift, buf);
318}
319
320static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
321{
322 put_unaligned_le64((u64) val << shift, buf);
323}
324
325static void regmap_format_64_native(void *buf, unsigned int val,
326 unsigned int shift)
327{
328 u64 v = (u64) val << shift;
329
330 memcpy(buf, &v, sizeof(v));
331}
332#endif
333
334static void regmap_parse_inplace_noop(void *buf)
335{
336}
337
338static unsigned int regmap_parse_8(const void *buf)
339{
340 const u8 *b = buf;
341
342 return b[0];
343}
344
345static unsigned int regmap_parse_16_be(const void *buf)
346{
347 return get_unaligned_be16(buf);
348}
349
350static unsigned int regmap_parse_16_le(const void *buf)
351{
352 return get_unaligned_le16(buf);
353}
354
355static void regmap_parse_16_be_inplace(void *buf)
356{
357 u16 v = get_unaligned_be16(buf);
358
359 memcpy(buf, &v, sizeof(v));
360}
361
362static void regmap_parse_16_le_inplace(void *buf)
363{
364 u16 v = get_unaligned_le16(buf);
365
366 memcpy(buf, &v, sizeof(v));
367}
368
369static unsigned int regmap_parse_16_native(const void *buf)
370{
371 u16 v;
372
373 memcpy(&v, buf, sizeof(v));
374 return v;
375}
376
377static unsigned int regmap_parse_24_be(const void *buf)
378{
379 return get_unaligned_be24(buf);
380}
381
382static unsigned int regmap_parse_32_be(const void *buf)
383{
384 return get_unaligned_be32(buf);
385}
386
387static unsigned int regmap_parse_32_le(const void *buf)
388{
389 return get_unaligned_le32(buf);
390}
391
392static void regmap_parse_32_be_inplace(void *buf)
393{
394 u32 v = get_unaligned_be32(buf);
395
396 memcpy(buf, &v, sizeof(v));
397}
398
399static void regmap_parse_32_le_inplace(void *buf)
400{
401 u32 v = get_unaligned_le32(buf);
402
403 memcpy(buf, &v, sizeof(v));
404}
405
406static unsigned int regmap_parse_32_native(const void *buf)
407{
408 u32 v;
409
410 memcpy(&v, buf, sizeof(v));
411 return v;
412}
413
414#ifdef CONFIG_64BIT
415static unsigned int regmap_parse_64_be(const void *buf)
416{
417 return get_unaligned_be64(buf);
418}
419
420static unsigned int regmap_parse_64_le(const void *buf)
421{
422 return get_unaligned_le64(buf);
423}
424
425static void regmap_parse_64_be_inplace(void *buf)
426{
427 u64 v = get_unaligned_be64(buf);
428
429 memcpy(buf, &v, sizeof(v));
430}
431
432static void regmap_parse_64_le_inplace(void *buf)
433{
434 u64 v = get_unaligned_le64(buf);
435
436 memcpy(buf, &v, sizeof(v));
437}
438
439static unsigned int regmap_parse_64_native(const void *buf)
440{
441 u64 v;
442
443 memcpy(&v, buf, sizeof(v));
444 return v;
445}
446#endif
447
448static void regmap_lock_hwlock(void *__map)
449{
450 struct regmap *map = __map;
451
452 hwspin_lock_timeout(map->hwlock, UINT_MAX);
453}
454
455static void regmap_lock_hwlock_irq(void *__map)
456{
457 struct regmap *map = __map;
458
459 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
460}
461
462static void regmap_lock_hwlock_irqsave(void *__map)
463{
464 struct regmap *map = __map;
465
466 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
467 &map->spinlock_flags);
468}
469
470static void regmap_unlock_hwlock(void *__map)
471{
472 struct regmap *map = __map;
473
474 hwspin_unlock(map->hwlock);
475}
476
477static void regmap_unlock_hwlock_irq(void *__map)
478{
479 struct regmap *map = __map;
480
481 hwspin_unlock_irq(map->hwlock);
482}
483
484static void regmap_unlock_hwlock_irqrestore(void *__map)
485{
486 struct regmap *map = __map;
487
488 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
489}
490
491static void regmap_lock_unlock_none(void *__map)
492{
493
494}
495
496static void regmap_lock_mutex(void *__map)
497{
498 struct regmap *map = __map;
499 mutex_lock(&map->mutex);
500}
501
502static void regmap_unlock_mutex(void *__map)
503{
504 struct regmap *map = __map;
505 mutex_unlock(&map->mutex);
506}
507
508static void regmap_lock_spinlock(void *__map)
509__acquires(&map->spinlock)
510{
511 struct regmap *map = __map;
512 unsigned long flags;
513
514 spin_lock_irqsave(&map->spinlock, flags);
515 map->spinlock_flags = flags;
516}
517
518static void regmap_unlock_spinlock(void *__map)
519__releases(&map->spinlock)
520{
521 struct regmap *map = __map;
522 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
523}
524
525static void regmap_lock_raw_spinlock(void *__map)
526__acquires(&map->raw_spinlock)
527{
528 struct regmap *map = __map;
529 unsigned long flags;
530
531 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
532 map->raw_spinlock_flags = flags;
533}
534
535static void regmap_unlock_raw_spinlock(void *__map)
536__releases(&map->raw_spinlock)
537{
538 struct regmap *map = __map;
539 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
540}
541
542static void dev_get_regmap_release(struct device *dev, void *res)
543{
544 /*
545 * We don't actually have anything to do here; the goal here
546 * is not to manage the regmap but to provide a simple way to
547 * get the regmap back given a struct device.
548 */
549}
550
551static bool _regmap_range_add(struct regmap *map,
552 struct regmap_range_node *data)
553{
554 struct rb_root *root = &map->range_tree;
555 struct rb_node **new = &(root->rb_node), *parent = NULL;
556
557 while (*new) {
558 struct regmap_range_node *this =
559 rb_entry(*new, struct regmap_range_node, node);
560
561 parent = *new;
562 if (data->range_max < this->range_min)
563 new = &((*new)->rb_left);
564 else if (data->range_min > this->range_max)
565 new = &((*new)->rb_right);
566 else
567 return false;
568 }
569
570 rb_link_node(&data->node, parent, new);
571 rb_insert_color(&data->node, root);
572
573 return true;
574}
575
576static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
577 unsigned int reg)
578{
579 struct rb_node *node = map->range_tree.rb_node;
580
581 while (node) {
582 struct regmap_range_node *this =
583 rb_entry(node, struct regmap_range_node, node);
584
585 if (reg < this->range_min)
586 node = node->rb_left;
587 else if (reg > this->range_max)
588 node = node->rb_right;
589 else
590 return this;
591 }
592
593 return NULL;
594}
595
596static void regmap_range_exit(struct regmap *map)
597{
598 struct rb_node *next;
599 struct regmap_range_node *range_node;
600
601 next = rb_first(&map->range_tree);
602 while (next) {
603 range_node = rb_entry(next, struct regmap_range_node, node);
604 next = rb_next(&range_node->node);
605 rb_erase(&range_node->node, &map->range_tree);
606 kfree(range_node);
607 }
608
609 kfree(map->selector_work_buf);
610}
611
612static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
613{
614 if (config->name) {
615 const char *name = kstrdup_const(config->name, GFP_KERNEL);
616
617 if (!name)
618 return -ENOMEM;
619
620 kfree_const(map->name);
621 map->name = name;
622 }
623
624 return 0;
625}
626
627int regmap_attach_dev(struct device *dev, struct regmap *map,
628 const struct regmap_config *config)
629{
630 struct regmap **m;
631 int ret;
632
633 map->dev = dev;
634
635 ret = regmap_set_name(map, config);
636 if (ret)
637 return ret;
638
639 regmap_debugfs_exit(map);
640 regmap_debugfs_init(map);
641
642 /* Add a devres resource for dev_get_regmap() */
643 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
644 if (!m) {
645 regmap_debugfs_exit(map);
646 return -ENOMEM;
647 }
648 *m = map;
649 devres_add(dev, m);
650
651 return 0;
652}
653EXPORT_SYMBOL_GPL(regmap_attach_dev);
654
655static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
656 const struct regmap_config *config)
657{
658 enum regmap_endian endian;
659
660 /* Retrieve the endianness specification from the regmap config */
661 endian = config->reg_format_endian;
662
663 /* If the regmap config specified a non-default value, use that */
664 if (endian != REGMAP_ENDIAN_DEFAULT)
665 return endian;
666
667 /* Retrieve the endianness specification from the bus config */
668 if (bus && bus->reg_format_endian_default)
669 endian = bus->reg_format_endian_default;
670
671 /* If the bus specified a non-default value, use that */
672 if (endian != REGMAP_ENDIAN_DEFAULT)
673 return endian;
674
675 /* Use this if no other value was found */
676 return REGMAP_ENDIAN_BIG;
677}
678
679enum regmap_endian regmap_get_val_endian(struct device *dev,
680 const struct regmap_bus *bus,
681 const struct regmap_config *config)
682{
683 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
684 enum regmap_endian endian;
685
686 /* Retrieve the endianness specification from the regmap config */
687 endian = config->val_format_endian;
688
689 /* If the regmap config specified a non-default value, use that */
690 if (endian != REGMAP_ENDIAN_DEFAULT)
691 return endian;
692
693 /* If the firmware node exist try to get endianness from it */
694 if (fwnode_property_read_bool(fwnode, "big-endian"))
695 endian = REGMAP_ENDIAN_BIG;
696 else if (fwnode_property_read_bool(fwnode, "little-endian"))
697 endian = REGMAP_ENDIAN_LITTLE;
698 else if (fwnode_property_read_bool(fwnode, "native-endian"))
699 endian = REGMAP_ENDIAN_NATIVE;
700
701 /* If the endianness was specified in fwnode, use that */
702 if (endian != REGMAP_ENDIAN_DEFAULT)
703 return endian;
704
705 /* Retrieve the endianness specification from the bus config */
706 if (bus && bus->val_format_endian_default)
707 endian = bus->val_format_endian_default;
708
709 /* If the bus specified a non-default value, use that */
710 if (endian != REGMAP_ENDIAN_DEFAULT)
711 return endian;
712
713 /* Use this if no other value was found */
714 return REGMAP_ENDIAN_BIG;
715}
716EXPORT_SYMBOL_GPL(regmap_get_val_endian);
717
718struct regmap *__regmap_init(struct device *dev,
719 const struct regmap_bus *bus,
720 void *bus_context,
721 const struct regmap_config *config,
722 struct lock_class_key *lock_key,
723 const char *lock_name)
724{
725 struct regmap *map;
726 int ret = -EINVAL;
727 enum regmap_endian reg_endian, val_endian;
728 int i, j;
729
730 if (!config)
731 goto err;
732
733 map = kzalloc(sizeof(*map), GFP_KERNEL);
734 if (map == NULL) {
735 ret = -ENOMEM;
736 goto err;
737 }
738
739 ret = regmap_set_name(map, config);
740 if (ret)
741 goto err_map;
742
743 ret = -EINVAL; /* Later error paths rely on this */
744
745 if (config->disable_locking) {
746 map->lock = map->unlock = regmap_lock_unlock_none;
747 map->can_sleep = config->can_sleep;
748 regmap_debugfs_disable(map);
749 } else if (config->lock && config->unlock) {
750 map->lock = config->lock;
751 map->unlock = config->unlock;
752 map->lock_arg = config->lock_arg;
753 map->can_sleep = config->can_sleep;
754 } else if (config->use_hwlock) {
755 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
756 if (!map->hwlock) {
757 ret = -ENXIO;
758 goto err_name;
759 }
760
761 switch (config->hwlock_mode) {
762 case HWLOCK_IRQSTATE:
763 map->lock = regmap_lock_hwlock_irqsave;
764 map->unlock = regmap_unlock_hwlock_irqrestore;
765 break;
766 case HWLOCK_IRQ:
767 map->lock = regmap_lock_hwlock_irq;
768 map->unlock = regmap_unlock_hwlock_irq;
769 break;
770 default:
771 map->lock = regmap_lock_hwlock;
772 map->unlock = regmap_unlock_hwlock;
773 break;
774 }
775
776 map->lock_arg = map;
777 } else {
778 if ((bus && bus->fast_io) ||
779 config->fast_io) {
780 if (config->use_raw_spinlock) {
781 raw_spin_lock_init(&map->raw_spinlock);
782 map->lock = regmap_lock_raw_spinlock;
783 map->unlock = regmap_unlock_raw_spinlock;
784 lockdep_set_class_and_name(&map->raw_spinlock,
785 lock_key, lock_name);
786 } else {
787 spin_lock_init(&map->spinlock);
788 map->lock = regmap_lock_spinlock;
789 map->unlock = regmap_unlock_spinlock;
790 lockdep_set_class_and_name(&map->spinlock,
791 lock_key, lock_name);
792 }
793 } else {
794 mutex_init(&map->mutex);
795 map->lock = regmap_lock_mutex;
796 map->unlock = regmap_unlock_mutex;
797 map->can_sleep = true;
798 lockdep_set_class_and_name(&map->mutex,
799 lock_key, lock_name);
800 }
801 map->lock_arg = map;
802 }
803
804 /*
805 * When we write in fast-paths with regmap_bulk_write() don't allocate
806 * scratch buffers with sleeping allocations.
807 */
808 if ((bus && bus->fast_io) || config->fast_io)
809 map->alloc_flags = GFP_ATOMIC;
810 else
811 map->alloc_flags = GFP_KERNEL;
812
813 map->reg_base = config->reg_base;
814
815 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
816 map->format.pad_bytes = config->pad_bits / 8;
817 map->format.reg_downshift = config->reg_downshift;
818 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
819 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
820 config->val_bits + config->pad_bits, 8);
821 map->reg_shift = config->pad_bits % 8;
822 if (config->reg_stride)
823 map->reg_stride = config->reg_stride;
824 else
825 map->reg_stride = 1;
826 if (is_power_of_2(map->reg_stride))
827 map->reg_stride_order = ilog2(map->reg_stride);
828 else
829 map->reg_stride_order = -1;
830 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
831 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
832 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
833 if (bus) {
834 map->max_raw_read = bus->max_raw_read;
835 map->max_raw_write = bus->max_raw_write;
836 } else if (config->max_raw_read && config->max_raw_write) {
837 map->max_raw_read = config->max_raw_read;
838 map->max_raw_write = config->max_raw_write;
839 }
840 map->dev = dev;
841 map->bus = bus;
842 map->bus_context = bus_context;
843 map->max_register = config->max_register;
844 map->wr_table = config->wr_table;
845 map->rd_table = config->rd_table;
846 map->volatile_table = config->volatile_table;
847 map->precious_table = config->precious_table;
848 map->wr_noinc_table = config->wr_noinc_table;
849 map->rd_noinc_table = config->rd_noinc_table;
850 map->writeable_reg = config->writeable_reg;
851 map->readable_reg = config->readable_reg;
852 map->volatile_reg = config->volatile_reg;
853 map->precious_reg = config->precious_reg;
854 map->writeable_noinc_reg = config->writeable_noinc_reg;
855 map->readable_noinc_reg = config->readable_noinc_reg;
856 map->cache_type = config->cache_type;
857
858 spin_lock_init(&map->async_lock);
859 INIT_LIST_HEAD(&map->async_list);
860 INIT_LIST_HEAD(&map->async_free);
861 init_waitqueue_head(&map->async_waitq);
862
863 if (config->read_flag_mask ||
864 config->write_flag_mask ||
865 config->zero_flag_mask) {
866 map->read_flag_mask = config->read_flag_mask;
867 map->write_flag_mask = config->write_flag_mask;
868 } else if (bus) {
869 map->read_flag_mask = bus->read_flag_mask;
870 }
871
872 if (config && config->read && config->write) {
873 map->reg_read = _regmap_bus_read;
874 if (config->reg_update_bits)
875 map->reg_update_bits = config->reg_update_bits;
876
877 /* Bulk read/write */
878 map->read = config->read;
879 map->write = config->write;
880
881 reg_endian = REGMAP_ENDIAN_NATIVE;
882 val_endian = REGMAP_ENDIAN_NATIVE;
883 } else if (!bus) {
884 map->reg_read = config->reg_read;
885 map->reg_write = config->reg_write;
886 map->reg_update_bits = config->reg_update_bits;
887
888 map->defer_caching = false;
889 goto skip_format_initialization;
890 } else if (!bus->read || !bus->write) {
891 map->reg_read = _regmap_bus_reg_read;
892 map->reg_write = _regmap_bus_reg_write;
893 map->reg_update_bits = bus->reg_update_bits;
894
895 map->defer_caching = false;
896 goto skip_format_initialization;
897 } else {
898 map->reg_read = _regmap_bus_read;
899 map->reg_update_bits = bus->reg_update_bits;
900 /* Bulk read/write */
901 map->read = bus->read;
902 map->write = bus->write;
903
904 reg_endian = regmap_get_reg_endian(bus, config);
905 val_endian = regmap_get_val_endian(dev, bus, config);
906 }
907
908 switch (config->reg_bits + map->reg_shift) {
909 case 2:
910 switch (config->val_bits) {
911 case 6:
912 map->format.format_write = regmap_format_2_6_write;
913 break;
914 default:
915 goto err_hwlock;
916 }
917 break;
918
919 case 4:
920 switch (config->val_bits) {
921 case 12:
922 map->format.format_write = regmap_format_4_12_write;
923 break;
924 default:
925 goto err_hwlock;
926 }
927 break;
928
929 case 7:
930 switch (config->val_bits) {
931 case 9:
932 map->format.format_write = regmap_format_7_9_write;
933 break;
934 case 17:
935 map->format.format_write = regmap_format_7_17_write;
936 break;
937 default:
938 goto err_hwlock;
939 }
940 break;
941
942 case 10:
943 switch (config->val_bits) {
944 case 14:
945 map->format.format_write = regmap_format_10_14_write;
946 break;
947 default:
948 goto err_hwlock;
949 }
950 break;
951
952 case 12:
953 switch (config->val_bits) {
954 case 20:
955 map->format.format_write = regmap_format_12_20_write;
956 break;
957 default:
958 goto err_hwlock;
959 }
960 break;
961
962 case 8:
963 map->format.format_reg = regmap_format_8;
964 break;
965
966 case 16:
967 switch (reg_endian) {
968 case REGMAP_ENDIAN_BIG:
969 map->format.format_reg = regmap_format_16_be;
970 break;
971 case REGMAP_ENDIAN_LITTLE:
972 map->format.format_reg = regmap_format_16_le;
973 break;
974 case REGMAP_ENDIAN_NATIVE:
975 map->format.format_reg = regmap_format_16_native;
976 break;
977 default:
978 goto err_hwlock;
979 }
980 break;
981
982 case 24:
983 switch (reg_endian) {
984 case REGMAP_ENDIAN_BIG:
985 map->format.format_reg = regmap_format_24_be;
986 break;
987 default:
988 goto err_hwlock;
989 }
990 break;
991
992 case 32:
993 switch (reg_endian) {
994 case REGMAP_ENDIAN_BIG:
995 map->format.format_reg = regmap_format_32_be;
996 break;
997 case REGMAP_ENDIAN_LITTLE:
998 map->format.format_reg = regmap_format_32_le;
999 break;
1000 case REGMAP_ENDIAN_NATIVE:
1001 map->format.format_reg = regmap_format_32_native;
1002 break;
1003 default:
1004 goto err_hwlock;
1005 }
1006 break;
1007
1008#ifdef CONFIG_64BIT
1009 case 64:
1010 switch (reg_endian) {
1011 case REGMAP_ENDIAN_BIG:
1012 map->format.format_reg = regmap_format_64_be;
1013 break;
1014 case REGMAP_ENDIAN_LITTLE:
1015 map->format.format_reg = regmap_format_64_le;
1016 break;
1017 case REGMAP_ENDIAN_NATIVE:
1018 map->format.format_reg = regmap_format_64_native;
1019 break;
1020 default:
1021 goto err_hwlock;
1022 }
1023 break;
1024#endif
1025
1026 default:
1027 goto err_hwlock;
1028 }
1029
1030 if (val_endian == REGMAP_ENDIAN_NATIVE)
1031 map->format.parse_inplace = regmap_parse_inplace_noop;
1032
1033 switch (config->val_bits) {
1034 case 8:
1035 map->format.format_val = regmap_format_8;
1036 map->format.parse_val = regmap_parse_8;
1037 map->format.parse_inplace = regmap_parse_inplace_noop;
1038 break;
1039 case 16:
1040 switch (val_endian) {
1041 case REGMAP_ENDIAN_BIG:
1042 map->format.format_val = regmap_format_16_be;
1043 map->format.parse_val = regmap_parse_16_be;
1044 map->format.parse_inplace = regmap_parse_16_be_inplace;
1045 break;
1046 case REGMAP_ENDIAN_LITTLE:
1047 map->format.format_val = regmap_format_16_le;
1048 map->format.parse_val = regmap_parse_16_le;
1049 map->format.parse_inplace = regmap_parse_16_le_inplace;
1050 break;
1051 case REGMAP_ENDIAN_NATIVE:
1052 map->format.format_val = regmap_format_16_native;
1053 map->format.parse_val = regmap_parse_16_native;
1054 break;
1055 default:
1056 goto err_hwlock;
1057 }
1058 break;
1059 case 24:
1060 switch (val_endian) {
1061 case REGMAP_ENDIAN_BIG:
1062 map->format.format_val = regmap_format_24_be;
1063 map->format.parse_val = regmap_parse_24_be;
1064 break;
1065 default:
1066 goto err_hwlock;
1067 }
1068 break;
1069 case 32:
1070 switch (val_endian) {
1071 case REGMAP_ENDIAN_BIG:
1072 map->format.format_val = regmap_format_32_be;
1073 map->format.parse_val = regmap_parse_32_be;
1074 map->format.parse_inplace = regmap_parse_32_be_inplace;
1075 break;
1076 case REGMAP_ENDIAN_LITTLE:
1077 map->format.format_val = regmap_format_32_le;
1078 map->format.parse_val = regmap_parse_32_le;
1079 map->format.parse_inplace = regmap_parse_32_le_inplace;
1080 break;
1081 case REGMAP_ENDIAN_NATIVE:
1082 map->format.format_val = regmap_format_32_native;
1083 map->format.parse_val = regmap_parse_32_native;
1084 break;
1085 default:
1086 goto err_hwlock;
1087 }
1088 break;
1089#ifdef CONFIG_64BIT
1090 case 64:
1091 switch (val_endian) {
1092 case REGMAP_ENDIAN_BIG:
1093 map->format.format_val = regmap_format_64_be;
1094 map->format.parse_val = regmap_parse_64_be;
1095 map->format.parse_inplace = regmap_parse_64_be_inplace;
1096 break;
1097 case REGMAP_ENDIAN_LITTLE:
1098 map->format.format_val = regmap_format_64_le;
1099 map->format.parse_val = regmap_parse_64_le;
1100 map->format.parse_inplace = regmap_parse_64_le_inplace;
1101 break;
1102 case REGMAP_ENDIAN_NATIVE:
1103 map->format.format_val = regmap_format_64_native;
1104 map->format.parse_val = regmap_parse_64_native;
1105 break;
1106 default:
1107 goto err_hwlock;
1108 }
1109 break;
1110#endif
1111 }
1112
1113 if (map->format.format_write) {
1114 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1115 (val_endian != REGMAP_ENDIAN_BIG))
1116 goto err_hwlock;
1117 map->use_single_write = true;
1118 }
1119
1120 if (!map->format.format_write &&
1121 !(map->format.format_reg && map->format.format_val))
1122 goto err_hwlock;
1123
1124 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1125 if (map->work_buf == NULL) {
1126 ret = -ENOMEM;
1127 goto err_hwlock;
1128 }
1129
1130 if (map->format.format_write) {
1131 map->defer_caching = false;
1132 map->reg_write = _regmap_bus_formatted_write;
1133 } else if (map->format.format_val) {
1134 map->defer_caching = true;
1135 map->reg_write = _regmap_bus_raw_write;
1136 }
1137
1138skip_format_initialization:
1139
1140 map->range_tree = RB_ROOT;
1141 for (i = 0; i < config->num_ranges; i++) {
1142 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1143 struct regmap_range_node *new;
1144
1145 /* Sanity check */
1146 if (range_cfg->range_max < range_cfg->range_min) {
1147 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1148 range_cfg->range_max, range_cfg->range_min);
1149 goto err_range;
1150 }
1151
1152 if (range_cfg->range_max > map->max_register) {
1153 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1154 range_cfg->range_max, map->max_register);
1155 goto err_range;
1156 }
1157
1158 if (range_cfg->selector_reg > map->max_register) {
1159 dev_err(map->dev,
1160 "Invalid range %d: selector out of map\n", i);
1161 goto err_range;
1162 }
1163
1164 if (range_cfg->window_len == 0) {
1165 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1166 i);
1167 goto err_range;
1168 }
1169
1170 /* Make sure, that this register range has no selector
1171 or data window within its boundary */
1172 for (j = 0; j < config->num_ranges; j++) {
1173 unsigned int sel_reg = config->ranges[j].selector_reg;
1174 unsigned int win_min = config->ranges[j].window_start;
1175 unsigned int win_max = win_min +
1176 config->ranges[j].window_len - 1;
1177
1178 /* Allow data window inside its own virtual range */
1179 if (j == i)
1180 continue;
1181
1182 if (range_cfg->range_min <= sel_reg &&
1183 sel_reg <= range_cfg->range_max) {
1184 dev_err(map->dev,
1185 "Range %d: selector for %d in window\n",
1186 i, j);
1187 goto err_range;
1188 }
1189
1190 if (!(win_max < range_cfg->range_min ||
1191 win_min > range_cfg->range_max)) {
1192 dev_err(map->dev,
1193 "Range %d: window for %d in window\n",
1194 i, j);
1195 goto err_range;
1196 }
1197 }
1198
1199 new = kzalloc(sizeof(*new), GFP_KERNEL);
1200 if (new == NULL) {
1201 ret = -ENOMEM;
1202 goto err_range;
1203 }
1204
1205 new->map = map;
1206 new->name = range_cfg->name;
1207 new->range_min = range_cfg->range_min;
1208 new->range_max = range_cfg->range_max;
1209 new->selector_reg = range_cfg->selector_reg;
1210 new->selector_mask = range_cfg->selector_mask;
1211 new->selector_shift = range_cfg->selector_shift;
1212 new->window_start = range_cfg->window_start;
1213 new->window_len = range_cfg->window_len;
1214
1215 if (!_regmap_range_add(map, new)) {
1216 dev_err(map->dev, "Failed to add range %d\n", i);
1217 kfree(new);
1218 goto err_range;
1219 }
1220
1221 if (map->selector_work_buf == NULL) {
1222 map->selector_work_buf =
1223 kzalloc(map->format.buf_size, GFP_KERNEL);
1224 if (map->selector_work_buf == NULL) {
1225 ret = -ENOMEM;
1226 goto err_range;
1227 }
1228 }
1229 }
1230
1231 ret = regcache_init(map, config);
1232 if (ret != 0)
1233 goto err_range;
1234
1235 if (dev) {
1236 ret = regmap_attach_dev(dev, map, config);
1237 if (ret != 0)
1238 goto err_regcache;
1239 } else {
1240 regmap_debugfs_init(map);
1241 }
1242
1243 return map;
1244
1245err_regcache:
1246 regcache_exit(map);
1247err_range:
1248 regmap_range_exit(map);
1249 kfree(map->work_buf);
1250err_hwlock:
1251 if (map->hwlock)
1252 hwspin_lock_free(map->hwlock);
1253err_name:
1254 kfree_const(map->name);
1255err_map:
1256 kfree(map);
1257err:
1258 return ERR_PTR(ret);
1259}
1260EXPORT_SYMBOL_GPL(__regmap_init);
1261
1262static void devm_regmap_release(struct device *dev, void *res)
1263{
1264 regmap_exit(*(struct regmap **)res);
1265}
1266
1267struct regmap *__devm_regmap_init(struct device *dev,
1268 const struct regmap_bus *bus,
1269 void *bus_context,
1270 const struct regmap_config *config,
1271 struct lock_class_key *lock_key,
1272 const char *lock_name)
1273{
1274 struct regmap **ptr, *regmap;
1275
1276 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1277 if (!ptr)
1278 return ERR_PTR(-ENOMEM);
1279
1280 regmap = __regmap_init(dev, bus, bus_context, config,
1281 lock_key, lock_name);
1282 if (!IS_ERR(regmap)) {
1283 *ptr = regmap;
1284 devres_add(dev, ptr);
1285 } else {
1286 devres_free(ptr);
1287 }
1288
1289 return regmap;
1290}
1291EXPORT_SYMBOL_GPL(__devm_regmap_init);
1292
1293static void regmap_field_init(struct regmap_field *rm_field,
1294 struct regmap *regmap, struct reg_field reg_field)
1295{
1296 rm_field->regmap = regmap;
1297 rm_field->reg = reg_field.reg;
1298 rm_field->shift = reg_field.lsb;
1299 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1300
1301 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1302
1303 rm_field->id_size = reg_field.id_size;
1304 rm_field->id_offset = reg_field.id_offset;
1305}
1306
1307/**
1308 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1309 *
1310 * @dev: Device that will be interacted with
1311 * @regmap: regmap bank in which this register field is located.
1312 * @reg_field: Register field with in the bank.
1313 *
1314 * The return value will be an ERR_PTR() on error or a valid pointer
1315 * to a struct regmap_field. The regmap_field will be automatically freed
1316 * by the device management code.
1317 */
1318struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1319 struct regmap *regmap, struct reg_field reg_field)
1320{
1321 struct regmap_field *rm_field = devm_kzalloc(dev,
1322 sizeof(*rm_field), GFP_KERNEL);
1323 if (!rm_field)
1324 return ERR_PTR(-ENOMEM);
1325
1326 regmap_field_init(rm_field, regmap, reg_field);
1327
1328 return rm_field;
1329
1330}
1331EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1332
1333
1334/**
1335 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1336 *
1337 * @regmap: regmap bank in which this register field is located.
1338 * @rm_field: regmap register fields within the bank.
1339 * @reg_field: Register fields within the bank.
1340 * @num_fields: Number of register fields.
1341 *
1342 * The return value will be an -ENOMEM on error or zero for success.
1343 * Newly allocated regmap_fields should be freed by calling
1344 * regmap_field_bulk_free()
1345 */
1346int regmap_field_bulk_alloc(struct regmap *regmap,
1347 struct regmap_field **rm_field,
1348 const struct reg_field *reg_field,
1349 int num_fields)
1350{
1351 struct regmap_field *rf;
1352 int i;
1353
1354 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1355 if (!rf)
1356 return -ENOMEM;
1357
1358 for (i = 0; i < num_fields; i++) {
1359 regmap_field_init(&rf[i], regmap, reg_field[i]);
1360 rm_field[i] = &rf[i];
1361 }
1362
1363 return 0;
1364}
1365EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1366
1367/**
1368 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1369 * fields.
1370 *
1371 * @dev: Device that will be interacted with
1372 * @regmap: regmap bank in which this register field is located.
1373 * @rm_field: regmap register fields within the bank.
1374 * @reg_field: Register fields within the bank.
1375 * @num_fields: Number of register fields.
1376 *
1377 * The return value will be an -ENOMEM on error or zero for success.
1378 * Newly allocated regmap_fields will be automatically freed by the
1379 * device management code.
1380 */
1381int devm_regmap_field_bulk_alloc(struct device *dev,
1382 struct regmap *regmap,
1383 struct regmap_field **rm_field,
1384 const struct reg_field *reg_field,
1385 int num_fields)
1386{
1387 struct regmap_field *rf;
1388 int i;
1389
1390 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1391 if (!rf)
1392 return -ENOMEM;
1393
1394 for (i = 0; i < num_fields; i++) {
1395 regmap_field_init(&rf[i], regmap, reg_field[i]);
1396 rm_field[i] = &rf[i];
1397 }
1398
1399 return 0;
1400}
1401EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1402
1403/**
1404 * regmap_field_bulk_free() - Free register field allocated using
1405 * regmap_field_bulk_alloc.
1406 *
1407 * @field: regmap fields which should be freed.
1408 */
1409void regmap_field_bulk_free(struct regmap_field *field)
1410{
1411 kfree(field);
1412}
1413EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1414
1415/**
1416 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1417 * devm_regmap_field_bulk_alloc.
1418 *
1419 * @dev: Device that will be interacted with
1420 * @field: regmap field which should be freed.
1421 *
1422 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1423 * drivers need not call this function, as the memory allocated via devm
1424 * will be freed as per device-driver life-cycle.
1425 */
1426void devm_regmap_field_bulk_free(struct device *dev,
1427 struct regmap_field *field)
1428{
1429 devm_kfree(dev, field);
1430}
1431EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1432
1433/**
1434 * devm_regmap_field_free() - Free a register field allocated using
1435 * devm_regmap_field_alloc.
1436 *
1437 * @dev: Device that will be interacted with
1438 * @field: regmap field which should be freed.
1439 *
1440 * Free register field allocated using devm_regmap_field_alloc(). Usually
1441 * drivers need not call this function, as the memory allocated via devm
1442 * will be freed as per device-driver life-cyle.
1443 */
1444void devm_regmap_field_free(struct device *dev,
1445 struct regmap_field *field)
1446{
1447 devm_kfree(dev, field);
1448}
1449EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1450
1451/**
1452 * regmap_field_alloc() - Allocate and initialise a register field.
1453 *
1454 * @regmap: regmap bank in which this register field is located.
1455 * @reg_field: Register field with in the bank.
1456 *
1457 * The return value will be an ERR_PTR() on error or a valid pointer
1458 * to a struct regmap_field. The regmap_field should be freed by the
1459 * user once its finished working with it using regmap_field_free().
1460 */
1461struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1462 struct reg_field reg_field)
1463{
1464 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1465
1466 if (!rm_field)
1467 return ERR_PTR(-ENOMEM);
1468
1469 regmap_field_init(rm_field, regmap, reg_field);
1470
1471 return rm_field;
1472}
1473EXPORT_SYMBOL_GPL(regmap_field_alloc);
1474
1475/**
1476 * regmap_field_free() - Free register field allocated using
1477 * regmap_field_alloc.
1478 *
1479 * @field: regmap field which should be freed.
1480 */
1481void regmap_field_free(struct regmap_field *field)
1482{
1483 kfree(field);
1484}
1485EXPORT_SYMBOL_GPL(regmap_field_free);
1486
1487/**
1488 * regmap_reinit_cache() - Reinitialise the current register cache
1489 *
1490 * @map: Register map to operate on.
1491 * @config: New configuration. Only the cache data will be used.
1492 *
1493 * Discard any existing register cache for the map and initialize a
1494 * new cache. This can be used to restore the cache to defaults or to
1495 * update the cache configuration to reflect runtime discovery of the
1496 * hardware.
1497 *
1498 * No explicit locking is done here, the user needs to ensure that
1499 * this function will not race with other calls to regmap.
1500 */
1501int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1502{
1503 int ret;
1504
1505 regcache_exit(map);
1506 regmap_debugfs_exit(map);
1507
1508 map->max_register = config->max_register;
1509 map->writeable_reg = config->writeable_reg;
1510 map->readable_reg = config->readable_reg;
1511 map->volatile_reg = config->volatile_reg;
1512 map->precious_reg = config->precious_reg;
1513 map->writeable_noinc_reg = config->writeable_noinc_reg;
1514 map->readable_noinc_reg = config->readable_noinc_reg;
1515 map->cache_type = config->cache_type;
1516
1517 ret = regmap_set_name(map, config);
1518 if (ret)
1519 return ret;
1520
1521 regmap_debugfs_init(map);
1522
1523 map->cache_bypass = false;
1524 map->cache_only = false;
1525
1526 return regcache_init(map, config);
1527}
1528EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1529
1530/**
1531 * regmap_exit() - Free a previously allocated register map
1532 *
1533 * @map: Register map to operate on.
1534 */
1535void regmap_exit(struct regmap *map)
1536{
1537 struct regmap_async *async;
1538
1539 regcache_exit(map);
1540 regmap_debugfs_exit(map);
1541 regmap_range_exit(map);
1542 if (map->bus && map->bus->free_context)
1543 map->bus->free_context(map->bus_context);
1544 kfree(map->work_buf);
1545 while (!list_empty(&map->async_free)) {
1546 async = list_first_entry_or_null(&map->async_free,
1547 struct regmap_async,
1548 list);
1549 list_del(&async->list);
1550 kfree(async->work_buf);
1551 kfree(async);
1552 }
1553 if (map->hwlock)
1554 hwspin_lock_free(map->hwlock);
1555 if (map->lock == regmap_lock_mutex)
1556 mutex_destroy(&map->mutex);
1557 kfree_const(map->name);
1558 kfree(map->patch);
1559 if (map->bus && map->bus->free_on_exit)
1560 kfree(map->bus);
1561 kfree(map);
1562}
1563EXPORT_SYMBOL_GPL(regmap_exit);
1564
1565static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1566{
1567 struct regmap **r = res;
1568 if (!r || !*r) {
1569 WARN_ON(!r || !*r);
1570 return 0;
1571 }
1572
1573 /* If the user didn't specify a name match any */
1574 if (data)
1575 return !strcmp((*r)->name, data);
1576 else
1577 return 1;
1578}
1579
1580/**
1581 * dev_get_regmap() - Obtain the regmap (if any) for a device
1582 *
1583 * @dev: Device to retrieve the map for
1584 * @name: Optional name for the register map, usually NULL.
1585 *
1586 * Returns the regmap for the device if one is present, or NULL. If
1587 * name is specified then it must match the name specified when
1588 * registering the device, if it is NULL then the first regmap found
1589 * will be used. Devices with multiple register maps are very rare,
1590 * generic code should normally not need to specify a name.
1591 */
1592struct regmap *dev_get_regmap(struct device *dev, const char *name)
1593{
1594 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1595 dev_get_regmap_match, (void *)name);
1596
1597 if (!r)
1598 return NULL;
1599 return *r;
1600}
1601EXPORT_SYMBOL_GPL(dev_get_regmap);
1602
1603/**
1604 * regmap_get_device() - Obtain the device from a regmap
1605 *
1606 * @map: Register map to operate on.
1607 *
1608 * Returns the underlying device that the regmap has been created for.
1609 */
1610struct device *regmap_get_device(struct regmap *map)
1611{
1612 return map->dev;
1613}
1614EXPORT_SYMBOL_GPL(regmap_get_device);
1615
1616static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1617 struct regmap_range_node *range,
1618 unsigned int val_num)
1619{
1620 void *orig_work_buf;
1621 unsigned int win_offset;
1622 unsigned int win_page;
1623 bool page_chg;
1624 int ret;
1625
1626 win_offset = (*reg - range->range_min) % range->window_len;
1627 win_page = (*reg - range->range_min) / range->window_len;
1628
1629 if (val_num > 1) {
1630 /* Bulk write shouldn't cross range boundary */
1631 if (*reg + val_num - 1 > range->range_max)
1632 return -EINVAL;
1633
1634 /* ... or single page boundary */
1635 if (val_num > range->window_len - win_offset)
1636 return -EINVAL;
1637 }
1638
1639 /* It is possible to have selector register inside data window.
1640 In that case, selector register is located on every page and
1641 it needs no page switching, when accessed alone. */
1642 if (val_num > 1 ||
1643 range->window_start + win_offset != range->selector_reg) {
1644 /* Use separate work_buf during page switching */
1645 orig_work_buf = map->work_buf;
1646 map->work_buf = map->selector_work_buf;
1647
1648 ret = _regmap_update_bits(map, range->selector_reg,
1649 range->selector_mask,
1650 win_page << range->selector_shift,
1651 &page_chg, false);
1652
1653 map->work_buf = orig_work_buf;
1654
1655 if (ret != 0)
1656 return ret;
1657 }
1658
1659 *reg = range->window_start + win_offset;
1660
1661 return 0;
1662}
1663
1664static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1665 unsigned long mask)
1666{
1667 u8 *buf;
1668 int i;
1669
1670 if (!mask || !map->work_buf)
1671 return;
1672
1673 buf = map->work_buf;
1674
1675 for (i = 0; i < max_bytes; i++)
1676 buf[i] |= (mask >> (8 * i)) & 0xff;
1677}
1678
1679static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1680 const void *val, size_t val_len, bool noinc)
1681{
1682 struct regmap_range_node *range;
1683 unsigned long flags;
1684 void *work_val = map->work_buf + map->format.reg_bytes +
1685 map->format.pad_bytes;
1686 void *buf;
1687 int ret = -ENOTSUPP;
1688 size_t len;
1689 int i;
1690
1691 /* Check for unwritable or noinc registers in range
1692 * before we start
1693 */
1694 if (!regmap_writeable_noinc(map, reg)) {
1695 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1696 unsigned int element =
1697 reg + regmap_get_offset(map, i);
1698 if (!regmap_writeable(map, element) ||
1699 regmap_writeable_noinc(map, element))
1700 return -EINVAL;
1701 }
1702 }
1703
1704 if (!map->cache_bypass && map->format.parse_val) {
1705 unsigned int ival;
1706 int val_bytes = map->format.val_bytes;
1707 for (i = 0; i < val_len / val_bytes; i++) {
1708 ival = map->format.parse_val(val + (i * val_bytes));
1709 ret = regcache_write(map,
1710 reg + regmap_get_offset(map, i),
1711 ival);
1712 if (ret) {
1713 dev_err(map->dev,
1714 "Error in caching of register: %x ret: %d\n",
1715 reg + regmap_get_offset(map, i), ret);
1716 return ret;
1717 }
1718 }
1719 if (map->cache_only) {
1720 map->cache_dirty = true;
1721 return 0;
1722 }
1723 }
1724
1725 range = _regmap_range_lookup(map, reg);
1726 if (range) {
1727 int val_num = val_len / map->format.val_bytes;
1728 int win_offset = (reg - range->range_min) % range->window_len;
1729 int win_residue = range->window_len - win_offset;
1730
1731 /* If the write goes beyond the end of the window split it */
1732 while (val_num > win_residue) {
1733 dev_dbg(map->dev, "Writing window %d/%zu\n",
1734 win_residue, val_len / map->format.val_bytes);
1735 ret = _regmap_raw_write_impl(map, reg, val,
1736 win_residue *
1737 map->format.val_bytes, noinc);
1738 if (ret != 0)
1739 return ret;
1740
1741 reg += win_residue;
1742 val_num -= win_residue;
1743 val += win_residue * map->format.val_bytes;
1744 val_len -= win_residue * map->format.val_bytes;
1745
1746 win_offset = (reg - range->range_min) %
1747 range->window_len;
1748 win_residue = range->window_len - win_offset;
1749 }
1750
1751 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1752 if (ret != 0)
1753 return ret;
1754 }
1755
1756 reg += map->reg_base;
1757 reg >>= map->format.reg_downshift;
1758 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1759 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1760 map->write_flag_mask);
1761
1762 /*
1763 * Essentially all I/O mechanisms will be faster with a single
1764 * buffer to write. Since register syncs often generate raw
1765 * writes of single registers optimise that case.
1766 */
1767 if (val != work_val && val_len == map->format.val_bytes) {
1768 memcpy(work_val, val, map->format.val_bytes);
1769 val = work_val;
1770 }
1771
1772 if (map->async && map->bus && map->bus->async_write) {
1773 struct regmap_async *async;
1774
1775 trace_regmap_async_write_start(map, reg, val_len);
1776
1777 spin_lock_irqsave(&map->async_lock, flags);
1778 async = list_first_entry_or_null(&map->async_free,
1779 struct regmap_async,
1780 list);
1781 if (async)
1782 list_del(&async->list);
1783 spin_unlock_irqrestore(&map->async_lock, flags);
1784
1785 if (!async) {
1786 async = map->bus->async_alloc();
1787 if (!async)
1788 return -ENOMEM;
1789
1790 async->work_buf = kzalloc(map->format.buf_size,
1791 GFP_KERNEL | GFP_DMA);
1792 if (!async->work_buf) {
1793 kfree(async);
1794 return -ENOMEM;
1795 }
1796 }
1797
1798 async->map = map;
1799
1800 /* If the caller supplied the value we can use it safely. */
1801 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1802 map->format.reg_bytes + map->format.val_bytes);
1803
1804 spin_lock_irqsave(&map->async_lock, flags);
1805 list_add_tail(&async->list, &map->async_list);
1806 spin_unlock_irqrestore(&map->async_lock, flags);
1807
1808 if (val != work_val)
1809 ret = map->bus->async_write(map->bus_context,
1810 async->work_buf,
1811 map->format.reg_bytes +
1812 map->format.pad_bytes,
1813 val, val_len, async);
1814 else
1815 ret = map->bus->async_write(map->bus_context,
1816 async->work_buf,
1817 map->format.reg_bytes +
1818 map->format.pad_bytes +
1819 val_len, NULL, 0, async);
1820
1821 if (ret != 0) {
1822 dev_err(map->dev, "Failed to schedule write: %d\n",
1823 ret);
1824
1825 spin_lock_irqsave(&map->async_lock, flags);
1826 list_move(&async->list, &map->async_free);
1827 spin_unlock_irqrestore(&map->async_lock, flags);
1828 }
1829
1830 return ret;
1831 }
1832
1833 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1834
1835 /* If we're doing a single register write we can probably just
1836 * send the work_buf directly, otherwise try to do a gather
1837 * write.
1838 */
1839 if (val == work_val)
1840 ret = map->write(map->bus_context, map->work_buf,
1841 map->format.reg_bytes +
1842 map->format.pad_bytes +
1843 val_len);
1844 else if (map->bus && map->bus->gather_write)
1845 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1846 map->format.reg_bytes +
1847 map->format.pad_bytes,
1848 val, val_len);
1849 else
1850 ret = -ENOTSUPP;
1851
1852 /* If that didn't work fall back on linearising by hand. */
1853 if (ret == -ENOTSUPP) {
1854 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1855 buf = kzalloc(len, GFP_KERNEL);
1856 if (!buf)
1857 return -ENOMEM;
1858
1859 memcpy(buf, map->work_buf, map->format.reg_bytes);
1860 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1861 val, val_len);
1862 ret = map->write(map->bus_context, buf, len);
1863
1864 kfree(buf);
1865 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1866 /* regcache_drop_region() takes lock that we already have,
1867 * thus call map->cache_ops->drop() directly
1868 */
1869 if (map->cache_ops && map->cache_ops->drop)
1870 map->cache_ops->drop(map, reg, reg + 1);
1871 }
1872
1873 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1874
1875 return ret;
1876}
1877
1878/**
1879 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1880 *
1881 * @map: Map to check.
1882 */
1883bool regmap_can_raw_write(struct regmap *map)
1884{
1885 return map->write && map->format.format_val && map->format.format_reg;
1886}
1887EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1888
1889/**
1890 * regmap_get_raw_read_max - Get the maximum size we can read
1891 *
1892 * @map: Map to check.
1893 */
1894size_t regmap_get_raw_read_max(struct regmap *map)
1895{
1896 return map->max_raw_read;
1897}
1898EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1899
1900/**
1901 * regmap_get_raw_write_max - Get the maximum size we can read
1902 *
1903 * @map: Map to check.
1904 */
1905size_t regmap_get_raw_write_max(struct regmap *map)
1906{
1907 return map->max_raw_write;
1908}
1909EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1910
1911static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1912 unsigned int val)
1913{
1914 int ret;
1915 struct regmap_range_node *range;
1916 struct regmap *map = context;
1917
1918 WARN_ON(!map->format.format_write);
1919
1920 range = _regmap_range_lookup(map, reg);
1921 if (range) {
1922 ret = _regmap_select_page(map, ®, range, 1);
1923 if (ret != 0)
1924 return ret;
1925 }
1926
1927 reg += map->reg_base;
1928 reg >>= map->format.reg_downshift;
1929 map->format.format_write(map, reg, val);
1930
1931 trace_regmap_hw_write_start(map, reg, 1);
1932
1933 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1934
1935 trace_regmap_hw_write_done(map, reg, 1);
1936
1937 return ret;
1938}
1939
1940static int _regmap_bus_reg_write(void *context, unsigned int reg,
1941 unsigned int val)
1942{
1943 struct regmap *map = context;
1944
1945 return map->bus->reg_write(map->bus_context, reg, val);
1946}
1947
1948static int _regmap_bus_raw_write(void *context, unsigned int reg,
1949 unsigned int val)
1950{
1951 struct regmap *map = context;
1952
1953 WARN_ON(!map->format.format_val);
1954
1955 map->format.format_val(map->work_buf + map->format.reg_bytes
1956 + map->format.pad_bytes, val, 0);
1957 return _regmap_raw_write_impl(map, reg,
1958 map->work_buf +
1959 map->format.reg_bytes +
1960 map->format.pad_bytes,
1961 map->format.val_bytes,
1962 false);
1963}
1964
1965static inline void *_regmap_map_get_context(struct regmap *map)
1966{
1967 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1968}
1969
1970int _regmap_write(struct regmap *map, unsigned int reg,
1971 unsigned int val)
1972{
1973 int ret;
1974 void *context = _regmap_map_get_context(map);
1975
1976 if (!regmap_writeable(map, reg))
1977 return -EIO;
1978
1979 if (!map->cache_bypass && !map->defer_caching) {
1980 ret = regcache_write(map, reg, val);
1981 if (ret != 0)
1982 return ret;
1983 if (map->cache_only) {
1984 map->cache_dirty = true;
1985 return 0;
1986 }
1987 }
1988
1989 ret = map->reg_write(context, reg, val);
1990 if (ret == 0) {
1991 if (regmap_should_log(map))
1992 dev_info(map->dev, "%x <= %x\n", reg, val);
1993
1994 trace_regmap_reg_write(map, reg, val);
1995 }
1996
1997 return ret;
1998}
1999
2000/**
2001 * regmap_write() - Write a value to a single register
2002 *
2003 * @map: Register map to write to
2004 * @reg: Register to write to
2005 * @val: Value to be written
2006 *
2007 * A value of zero will be returned on success, a negative errno will
2008 * be returned in error cases.
2009 */
2010int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
2011{
2012 int ret;
2013
2014 if (!IS_ALIGNED(reg, map->reg_stride))
2015 return -EINVAL;
2016
2017 map->lock(map->lock_arg);
2018
2019 ret = _regmap_write(map, reg, val);
2020
2021 map->unlock(map->lock_arg);
2022
2023 return ret;
2024}
2025EXPORT_SYMBOL_GPL(regmap_write);
2026
2027/**
2028 * regmap_write_async() - Write a value to a single register asynchronously
2029 *
2030 * @map: Register map to write to
2031 * @reg: Register to write to
2032 * @val: Value to be written
2033 *
2034 * A value of zero will be returned on success, a negative errno will
2035 * be returned in error cases.
2036 */
2037int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
2038{
2039 int ret;
2040
2041 if (!IS_ALIGNED(reg, map->reg_stride))
2042 return -EINVAL;
2043
2044 map->lock(map->lock_arg);
2045
2046 map->async = true;
2047
2048 ret = _regmap_write(map, reg, val);
2049
2050 map->async = false;
2051
2052 map->unlock(map->lock_arg);
2053
2054 return ret;
2055}
2056EXPORT_SYMBOL_GPL(regmap_write_async);
2057
2058int _regmap_raw_write(struct regmap *map, unsigned int reg,
2059 const void *val, size_t val_len, bool noinc)
2060{
2061 size_t val_bytes = map->format.val_bytes;
2062 size_t val_count = val_len / val_bytes;
2063 size_t chunk_count, chunk_bytes;
2064 size_t chunk_regs = val_count;
2065 int ret, i;
2066
2067 if (!val_count)
2068 return -EINVAL;
2069
2070 if (map->use_single_write)
2071 chunk_regs = 1;
2072 else if (map->max_raw_write && val_len > map->max_raw_write)
2073 chunk_regs = map->max_raw_write / val_bytes;
2074
2075 chunk_count = val_count / chunk_regs;
2076 chunk_bytes = chunk_regs * val_bytes;
2077
2078 /* Write as many bytes as possible with chunk_size */
2079 for (i = 0; i < chunk_count; i++) {
2080 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2081 if (ret)
2082 return ret;
2083
2084 reg += regmap_get_offset(map, chunk_regs);
2085 val += chunk_bytes;
2086 val_len -= chunk_bytes;
2087 }
2088
2089 /* Write remaining bytes */
2090 if (val_len)
2091 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2092
2093 return ret;
2094}
2095
2096/**
2097 * regmap_raw_write() - Write raw values to one or more registers
2098 *
2099 * @map: Register map to write to
2100 * @reg: Initial register to write to
2101 * @val: Block of data to be written, laid out for direct transmission to the
2102 * device
2103 * @val_len: Length of data pointed to by val.
2104 *
2105 * This function is intended to be used for things like firmware
2106 * download where a large block of data needs to be transferred to the
2107 * device. No formatting will be done on the data provided.
2108 *
2109 * A value of zero will be returned on success, a negative errno will
2110 * be returned in error cases.
2111 */
2112int regmap_raw_write(struct regmap *map, unsigned int reg,
2113 const void *val, size_t val_len)
2114{
2115 int ret;
2116
2117 if (!regmap_can_raw_write(map))
2118 return -EINVAL;
2119 if (val_len % map->format.val_bytes)
2120 return -EINVAL;
2121
2122 map->lock(map->lock_arg);
2123
2124 ret = _regmap_raw_write(map, reg, val, val_len, false);
2125
2126 map->unlock(map->lock_arg);
2127
2128 return ret;
2129}
2130EXPORT_SYMBOL_GPL(regmap_raw_write);
2131
2132static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2133 void *val, unsigned int val_len, bool write)
2134{
2135 size_t val_bytes = map->format.val_bytes;
2136 size_t val_count = val_len / val_bytes;
2137 unsigned int lastval;
2138 u8 *u8p;
2139 u16 *u16p;
2140 u32 *u32p;
2141#ifdef CONFIG_64BIT
2142 u64 *u64p;
2143#endif
2144 int ret;
2145 int i;
2146
2147 switch (val_bytes) {
2148 case 1:
2149 u8p = val;
2150 if (write)
2151 lastval = (unsigned int)u8p[val_count - 1];
2152 break;
2153 case 2:
2154 u16p = val;
2155 if (write)
2156 lastval = (unsigned int)u16p[val_count - 1];
2157 break;
2158 case 4:
2159 u32p = val;
2160 if (write)
2161 lastval = (unsigned int)u32p[val_count - 1];
2162 break;
2163#ifdef CONFIG_64BIT
2164 case 8:
2165 u64p = val;
2166 if (write)
2167 lastval = (unsigned int)u64p[val_count - 1];
2168 break;
2169#endif
2170 default:
2171 return -EINVAL;
2172 }
2173
2174 /*
2175 * Update the cache with the last value we write, the rest is just
2176 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2177 * sure a single read from the cache will work.
2178 */
2179 if (write) {
2180 if (!map->cache_bypass && !map->defer_caching) {
2181 ret = regcache_write(map, reg, lastval);
2182 if (ret != 0)
2183 return ret;
2184 if (map->cache_only) {
2185 map->cache_dirty = true;
2186 return 0;
2187 }
2188 }
2189 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2190 } else {
2191 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2192 }
2193
2194 if (!ret && regmap_should_log(map)) {
2195 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2196 for (i = 0; i < val_count; i++) {
2197 switch (val_bytes) {
2198 case 1:
2199 pr_cont("%x", u8p[i]);
2200 break;
2201 case 2:
2202 pr_cont("%x", u16p[i]);
2203 break;
2204 case 4:
2205 pr_cont("%x", u32p[i]);
2206 break;
2207#ifdef CONFIG_64BIT
2208 case 8:
2209 pr_cont("%llx", u64p[i]);
2210 break;
2211#endif
2212 default:
2213 break;
2214 }
2215 if (i == (val_count - 1))
2216 pr_cont("]\n");
2217 else
2218 pr_cont(",");
2219 }
2220 }
2221
2222 return 0;
2223}
2224
2225/**
2226 * regmap_noinc_write(): Write data from a register without incrementing the
2227 * register number
2228 *
2229 * @map: Register map to write to
2230 * @reg: Register to write to
2231 * @val: Pointer to data buffer
2232 * @val_len: Length of output buffer in bytes.
2233 *
2234 * The regmap API usually assumes that bulk bus write operations will write a
2235 * range of registers. Some devices have certain registers for which a write
2236 * operation can write to an internal FIFO.
2237 *
2238 * The target register must be volatile but registers after it can be
2239 * completely unrelated cacheable registers.
2240 *
2241 * This will attempt multiple writes as required to write val_len bytes.
2242 *
2243 * A value of zero will be returned on success, a negative errno will be
2244 * returned in error cases.
2245 */
2246int regmap_noinc_write(struct regmap *map, unsigned int reg,
2247 const void *val, size_t val_len)
2248{
2249 size_t write_len;
2250 int ret;
2251
2252 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2253 return -EINVAL;
2254 if (val_len % map->format.val_bytes)
2255 return -EINVAL;
2256 if (!IS_ALIGNED(reg, map->reg_stride))
2257 return -EINVAL;
2258 if (val_len == 0)
2259 return -EINVAL;
2260
2261 map->lock(map->lock_arg);
2262
2263 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2264 ret = -EINVAL;
2265 goto out_unlock;
2266 }
2267
2268 /*
2269 * Use the accelerated operation if we can. The val drops the const
2270 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2271 */
2272 if (map->bus->reg_noinc_write) {
2273 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2274 goto out_unlock;
2275 }
2276
2277 while (val_len) {
2278 if (map->max_raw_write && map->max_raw_write < val_len)
2279 write_len = map->max_raw_write;
2280 else
2281 write_len = val_len;
2282 ret = _regmap_raw_write(map, reg, val, write_len, true);
2283 if (ret)
2284 goto out_unlock;
2285 val = ((u8 *)val) + write_len;
2286 val_len -= write_len;
2287 }
2288
2289out_unlock:
2290 map->unlock(map->lock_arg);
2291 return ret;
2292}
2293EXPORT_SYMBOL_GPL(regmap_noinc_write);
2294
2295/**
2296 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2297 * register field.
2298 *
2299 * @field: Register field to write to
2300 * @mask: Bitmask to change
2301 * @val: Value to be written
2302 * @change: Boolean indicating if a write was done
2303 * @async: Boolean indicating asynchronously
2304 * @force: Boolean indicating use force update
2305 *
2306 * Perform a read/modify/write cycle on the register field with change,
2307 * async, force option.
2308 *
2309 * A value of zero will be returned on success, a negative errno will
2310 * be returned in error cases.
2311 */
2312int regmap_field_update_bits_base(struct regmap_field *field,
2313 unsigned int mask, unsigned int val,
2314 bool *change, bool async, bool force)
2315{
2316 mask = (mask << field->shift) & field->mask;
2317
2318 return regmap_update_bits_base(field->regmap, field->reg,
2319 mask, val << field->shift,
2320 change, async, force);
2321}
2322EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2323
2324/**
2325 * regmap_field_test_bits() - Check if all specified bits are set in a
2326 * register field.
2327 *
2328 * @field: Register field to operate on
2329 * @bits: Bits to test
2330 *
2331 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2332 * tested bits is not set and 1 if all tested bits are set.
2333 */
2334int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2335{
2336 unsigned int val, ret;
2337
2338 ret = regmap_field_read(field, &val);
2339 if (ret)
2340 return ret;
2341
2342 return (val & bits) == bits;
2343}
2344EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2345
2346/**
2347 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2348 * register field with port ID
2349 *
2350 * @field: Register field to write to
2351 * @id: port ID
2352 * @mask: Bitmask to change
2353 * @val: Value to be written
2354 * @change: Boolean indicating if a write was done
2355 * @async: Boolean indicating asynchronously
2356 * @force: Boolean indicating use force update
2357 *
2358 * A value of zero will be returned on success, a negative errno will
2359 * be returned in error cases.
2360 */
2361int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2362 unsigned int mask, unsigned int val,
2363 bool *change, bool async, bool force)
2364{
2365 if (id >= field->id_size)
2366 return -EINVAL;
2367
2368 mask = (mask << field->shift) & field->mask;
2369
2370 return regmap_update_bits_base(field->regmap,
2371 field->reg + (field->id_offset * id),
2372 mask, val << field->shift,
2373 change, async, force);
2374}
2375EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2376
2377/**
2378 * regmap_bulk_write() - Write multiple registers to the device
2379 *
2380 * @map: Register map to write to
2381 * @reg: First register to be write from
2382 * @val: Block of data to be written, in native register size for device
2383 * @val_count: Number of registers to write
2384 *
2385 * This function is intended to be used for writing a large block of
2386 * data to the device either in single transfer or multiple transfer.
2387 *
2388 * A value of zero will be returned on success, a negative errno will
2389 * be returned in error cases.
2390 */
2391int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2392 size_t val_count)
2393{
2394 int ret = 0, i;
2395 size_t val_bytes = map->format.val_bytes;
2396
2397 if (!IS_ALIGNED(reg, map->reg_stride))
2398 return -EINVAL;
2399
2400 /*
2401 * Some devices don't support bulk write, for them we have a series of
2402 * single write operations.
2403 */
2404 if (!map->write || !map->format.parse_inplace) {
2405 map->lock(map->lock_arg);
2406 for (i = 0; i < val_count; i++) {
2407 unsigned int ival;
2408
2409 switch (val_bytes) {
2410 case 1:
2411 ival = *(u8 *)(val + (i * val_bytes));
2412 break;
2413 case 2:
2414 ival = *(u16 *)(val + (i * val_bytes));
2415 break;
2416 case 4:
2417 ival = *(u32 *)(val + (i * val_bytes));
2418 break;
2419#ifdef CONFIG_64BIT
2420 case 8:
2421 ival = *(u64 *)(val + (i * val_bytes));
2422 break;
2423#endif
2424 default:
2425 ret = -EINVAL;
2426 goto out;
2427 }
2428
2429 ret = _regmap_write(map,
2430 reg + regmap_get_offset(map, i),
2431 ival);
2432 if (ret != 0)
2433 goto out;
2434 }
2435out:
2436 map->unlock(map->lock_arg);
2437 } else {
2438 void *wval;
2439
2440 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2441 if (!wval)
2442 return -ENOMEM;
2443
2444 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2445 map->format.parse_inplace(wval + i);
2446
2447 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2448
2449 kfree(wval);
2450 }
2451
2452 if (!ret)
2453 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2454
2455 return ret;
2456}
2457EXPORT_SYMBOL_GPL(regmap_bulk_write);
2458
2459/*
2460 * _regmap_raw_multi_reg_write()
2461 *
2462 * the (register,newvalue) pairs in regs have not been formatted, but
2463 * they are all in the same page and have been changed to being page
2464 * relative. The page register has been written if that was necessary.
2465 */
2466static int _regmap_raw_multi_reg_write(struct regmap *map,
2467 const struct reg_sequence *regs,
2468 size_t num_regs)
2469{
2470 int ret;
2471 void *buf;
2472 int i;
2473 u8 *u8;
2474 size_t val_bytes = map->format.val_bytes;
2475 size_t reg_bytes = map->format.reg_bytes;
2476 size_t pad_bytes = map->format.pad_bytes;
2477 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2478 size_t len = pair_size * num_regs;
2479
2480 if (!len)
2481 return -EINVAL;
2482
2483 buf = kzalloc(len, GFP_KERNEL);
2484 if (!buf)
2485 return -ENOMEM;
2486
2487 /* We have to linearise by hand. */
2488
2489 u8 = buf;
2490
2491 for (i = 0; i < num_regs; i++) {
2492 unsigned int reg = regs[i].reg;
2493 unsigned int val = regs[i].def;
2494 trace_regmap_hw_write_start(map, reg, 1);
2495 reg += map->reg_base;
2496 reg >>= map->format.reg_downshift;
2497 map->format.format_reg(u8, reg, map->reg_shift);
2498 u8 += reg_bytes + pad_bytes;
2499 map->format.format_val(u8, val, 0);
2500 u8 += val_bytes;
2501 }
2502 u8 = buf;
2503 *u8 |= map->write_flag_mask;
2504
2505 ret = map->write(map->bus_context, buf, len);
2506
2507 kfree(buf);
2508
2509 for (i = 0; i < num_regs; i++) {
2510 int reg = regs[i].reg;
2511 trace_regmap_hw_write_done(map, reg, 1);
2512 }
2513 return ret;
2514}
2515
2516static unsigned int _regmap_register_page(struct regmap *map,
2517 unsigned int reg,
2518 struct regmap_range_node *range)
2519{
2520 unsigned int win_page = (reg - range->range_min) / range->window_len;
2521
2522 return win_page;
2523}
2524
2525static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2526 struct reg_sequence *regs,
2527 size_t num_regs)
2528{
2529 int ret;
2530 int i, n;
2531 struct reg_sequence *base;
2532 unsigned int this_page = 0;
2533 unsigned int page_change = 0;
2534 /*
2535 * the set of registers are not neccessarily in order, but
2536 * since the order of write must be preserved this algorithm
2537 * chops the set each time the page changes. This also applies
2538 * if there is a delay required at any point in the sequence.
2539 */
2540 base = regs;
2541 for (i = 0, n = 0; i < num_regs; i++, n++) {
2542 unsigned int reg = regs[i].reg;
2543 struct regmap_range_node *range;
2544
2545 range = _regmap_range_lookup(map, reg);
2546 if (range) {
2547 unsigned int win_page = _regmap_register_page(map, reg,
2548 range);
2549
2550 if (i == 0)
2551 this_page = win_page;
2552 if (win_page != this_page) {
2553 this_page = win_page;
2554 page_change = 1;
2555 }
2556 }
2557
2558 /* If we have both a page change and a delay make sure to
2559 * write the regs and apply the delay before we change the
2560 * page.
2561 */
2562
2563 if (page_change || regs[i].delay_us) {
2564
2565 /* For situations where the first write requires
2566 * a delay we need to make sure we don't call
2567 * raw_multi_reg_write with n=0
2568 * This can't occur with page breaks as we
2569 * never write on the first iteration
2570 */
2571 if (regs[i].delay_us && i == 0)
2572 n = 1;
2573
2574 ret = _regmap_raw_multi_reg_write(map, base, n);
2575 if (ret != 0)
2576 return ret;
2577
2578 if (regs[i].delay_us) {
2579 if (map->can_sleep)
2580 fsleep(regs[i].delay_us);
2581 else
2582 udelay(regs[i].delay_us);
2583 }
2584
2585 base += n;
2586 n = 0;
2587
2588 if (page_change) {
2589 ret = _regmap_select_page(map,
2590 &base[n].reg,
2591 range, 1);
2592 if (ret != 0)
2593 return ret;
2594
2595 page_change = 0;
2596 }
2597
2598 }
2599
2600 }
2601 if (n > 0)
2602 return _regmap_raw_multi_reg_write(map, base, n);
2603 return 0;
2604}
2605
2606static int _regmap_multi_reg_write(struct regmap *map,
2607 const struct reg_sequence *regs,
2608 size_t num_regs)
2609{
2610 int i;
2611 int ret;
2612
2613 if (!map->can_multi_write) {
2614 for (i = 0; i < num_regs; i++) {
2615 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2616 if (ret != 0)
2617 return ret;
2618
2619 if (regs[i].delay_us) {
2620 if (map->can_sleep)
2621 fsleep(regs[i].delay_us);
2622 else
2623 udelay(regs[i].delay_us);
2624 }
2625 }
2626 return 0;
2627 }
2628
2629 if (!map->format.parse_inplace)
2630 return -EINVAL;
2631
2632 if (map->writeable_reg)
2633 for (i = 0; i < num_regs; i++) {
2634 int reg = regs[i].reg;
2635 if (!map->writeable_reg(map->dev, reg))
2636 return -EINVAL;
2637 if (!IS_ALIGNED(reg, map->reg_stride))
2638 return -EINVAL;
2639 }
2640
2641 if (!map->cache_bypass) {
2642 for (i = 0; i < num_regs; i++) {
2643 unsigned int val = regs[i].def;
2644 unsigned int reg = regs[i].reg;
2645 ret = regcache_write(map, reg, val);
2646 if (ret) {
2647 dev_err(map->dev,
2648 "Error in caching of register: %x ret: %d\n",
2649 reg, ret);
2650 return ret;
2651 }
2652 }
2653 if (map->cache_only) {
2654 map->cache_dirty = true;
2655 return 0;
2656 }
2657 }
2658
2659 WARN_ON(!map->bus);
2660
2661 for (i = 0; i < num_regs; i++) {
2662 unsigned int reg = regs[i].reg;
2663 struct regmap_range_node *range;
2664
2665 /* Coalesce all the writes between a page break or a delay
2666 * in a sequence
2667 */
2668 range = _regmap_range_lookup(map, reg);
2669 if (range || regs[i].delay_us) {
2670 size_t len = sizeof(struct reg_sequence)*num_regs;
2671 struct reg_sequence *base = kmemdup(regs, len,
2672 GFP_KERNEL);
2673 if (!base)
2674 return -ENOMEM;
2675 ret = _regmap_range_multi_paged_reg_write(map, base,
2676 num_regs);
2677 kfree(base);
2678
2679 return ret;
2680 }
2681 }
2682 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2683}
2684
2685/**
2686 * regmap_multi_reg_write() - Write multiple registers to the device
2687 *
2688 * @map: Register map to write to
2689 * @regs: Array of structures containing register,value to be written
2690 * @num_regs: Number of registers to write
2691 *
2692 * Write multiple registers to the device where the set of register, value
2693 * pairs are supplied in any order, possibly not all in a single range.
2694 *
2695 * The 'normal' block write mode will send ultimately send data on the
2696 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2697 * addressed. However, this alternative block multi write mode will send
2698 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2699 * must of course support the mode.
2700 *
2701 * A value of zero will be returned on success, a negative errno will be
2702 * returned in error cases.
2703 */
2704int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2705 int num_regs)
2706{
2707 int ret;
2708
2709 map->lock(map->lock_arg);
2710
2711 ret = _regmap_multi_reg_write(map, regs, num_regs);
2712
2713 map->unlock(map->lock_arg);
2714
2715 return ret;
2716}
2717EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2718
2719/**
2720 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2721 * device but not the cache
2722 *
2723 * @map: Register map to write to
2724 * @regs: Array of structures containing register,value to be written
2725 * @num_regs: Number of registers to write
2726 *
2727 * Write multiple registers to the device but not the cache where the set
2728 * of register are supplied in any order.
2729 *
2730 * This function is intended to be used for writing a large block of data
2731 * atomically to the device in single transfer for those I2C client devices
2732 * that implement this alternative block write mode.
2733 *
2734 * A value of zero will be returned on success, a negative errno will
2735 * be returned in error cases.
2736 */
2737int regmap_multi_reg_write_bypassed(struct regmap *map,
2738 const struct reg_sequence *regs,
2739 int num_regs)
2740{
2741 int ret;
2742 bool bypass;
2743
2744 map->lock(map->lock_arg);
2745
2746 bypass = map->cache_bypass;
2747 map->cache_bypass = true;
2748
2749 ret = _regmap_multi_reg_write(map, regs, num_regs);
2750
2751 map->cache_bypass = bypass;
2752
2753 map->unlock(map->lock_arg);
2754
2755 return ret;
2756}
2757EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2758
2759/**
2760 * regmap_raw_write_async() - Write raw values to one or more registers
2761 * asynchronously
2762 *
2763 * @map: Register map to write to
2764 * @reg: Initial register to write to
2765 * @val: Block of data to be written, laid out for direct transmission to the
2766 * device. Must be valid until regmap_async_complete() is called.
2767 * @val_len: Length of data pointed to by val.
2768 *
2769 * This function is intended to be used for things like firmware
2770 * download where a large block of data needs to be transferred to the
2771 * device. No formatting will be done on the data provided.
2772 *
2773 * If supported by the underlying bus the write will be scheduled
2774 * asynchronously, helping maximise I/O speed on higher speed buses
2775 * like SPI. regmap_async_complete() can be called to ensure that all
2776 * asynchrnous writes have been completed.
2777 *
2778 * A value of zero will be returned on success, a negative errno will
2779 * be returned in error cases.
2780 */
2781int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2782 const void *val, size_t val_len)
2783{
2784 int ret;
2785
2786 if (val_len % map->format.val_bytes)
2787 return -EINVAL;
2788 if (!IS_ALIGNED(reg, map->reg_stride))
2789 return -EINVAL;
2790
2791 map->lock(map->lock_arg);
2792
2793 map->async = true;
2794
2795 ret = _regmap_raw_write(map, reg, val, val_len, false);
2796
2797 map->async = false;
2798
2799 map->unlock(map->lock_arg);
2800
2801 return ret;
2802}
2803EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2804
2805static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2806 unsigned int val_len, bool noinc)
2807{
2808 struct regmap_range_node *range;
2809 int ret;
2810
2811 if (!map->read)
2812 return -EINVAL;
2813
2814 range = _regmap_range_lookup(map, reg);
2815 if (range) {
2816 ret = _regmap_select_page(map, ®, range,
2817 noinc ? 1 : val_len / map->format.val_bytes);
2818 if (ret != 0)
2819 return ret;
2820 }
2821
2822 reg += map->reg_base;
2823 reg >>= map->format.reg_downshift;
2824 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2825 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2826 map->read_flag_mask);
2827 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2828
2829 ret = map->read(map->bus_context, map->work_buf,
2830 map->format.reg_bytes + map->format.pad_bytes,
2831 val, val_len);
2832
2833 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2834
2835 return ret;
2836}
2837
2838static int _regmap_bus_reg_read(void *context, unsigned int reg,
2839 unsigned int *val)
2840{
2841 struct regmap *map = context;
2842
2843 return map->bus->reg_read(map->bus_context, reg, val);
2844}
2845
2846static int _regmap_bus_read(void *context, unsigned int reg,
2847 unsigned int *val)
2848{
2849 int ret;
2850 struct regmap *map = context;
2851 void *work_val = map->work_buf + map->format.reg_bytes +
2852 map->format.pad_bytes;
2853
2854 if (!map->format.parse_val)
2855 return -EINVAL;
2856
2857 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2858 if (ret == 0)
2859 *val = map->format.parse_val(work_val);
2860
2861 return ret;
2862}
2863
2864static int _regmap_read(struct regmap *map, unsigned int reg,
2865 unsigned int *val)
2866{
2867 int ret;
2868 void *context = _regmap_map_get_context(map);
2869
2870 if (!map->cache_bypass) {
2871 ret = regcache_read(map, reg, val);
2872 if (ret == 0)
2873 return 0;
2874 }
2875
2876 if (map->cache_only)
2877 return -EBUSY;
2878
2879 if (!regmap_readable(map, reg))
2880 return -EIO;
2881
2882 ret = map->reg_read(context, reg, val);
2883 if (ret == 0) {
2884 if (regmap_should_log(map))
2885 dev_info(map->dev, "%x => %x\n", reg, *val);
2886
2887 trace_regmap_reg_read(map, reg, *val);
2888
2889 if (!map->cache_bypass)
2890 regcache_write(map, reg, *val);
2891 }
2892
2893 return ret;
2894}
2895
2896/**
2897 * regmap_read() - Read a value from a single register
2898 *
2899 * @map: Register map to read from
2900 * @reg: Register to be read from
2901 * @val: Pointer to store read value
2902 *
2903 * A value of zero will be returned on success, a negative errno will
2904 * be returned in error cases.
2905 */
2906int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2907{
2908 int ret;
2909
2910 if (!IS_ALIGNED(reg, map->reg_stride))
2911 return -EINVAL;
2912
2913 map->lock(map->lock_arg);
2914
2915 ret = _regmap_read(map, reg, val);
2916
2917 map->unlock(map->lock_arg);
2918
2919 return ret;
2920}
2921EXPORT_SYMBOL_GPL(regmap_read);
2922
2923/**
2924 * regmap_raw_read() - Read raw data from the device
2925 *
2926 * @map: Register map to read from
2927 * @reg: First register to be read from
2928 * @val: Pointer to store read value
2929 * @val_len: Size of data to read
2930 *
2931 * A value of zero will be returned on success, a negative errno will
2932 * be returned in error cases.
2933 */
2934int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2935 size_t val_len)
2936{
2937 size_t val_bytes = map->format.val_bytes;
2938 size_t val_count = val_len / val_bytes;
2939 unsigned int v;
2940 int ret, i;
2941
2942 if (val_len % map->format.val_bytes)
2943 return -EINVAL;
2944 if (!IS_ALIGNED(reg, map->reg_stride))
2945 return -EINVAL;
2946 if (val_count == 0)
2947 return -EINVAL;
2948
2949 map->lock(map->lock_arg);
2950
2951 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2952 map->cache_type == REGCACHE_NONE) {
2953 size_t chunk_count, chunk_bytes;
2954 size_t chunk_regs = val_count;
2955
2956 if (!map->read) {
2957 ret = -ENOTSUPP;
2958 goto out;
2959 }
2960
2961 if (map->use_single_read)
2962 chunk_regs = 1;
2963 else if (map->max_raw_read && val_len > map->max_raw_read)
2964 chunk_regs = map->max_raw_read / val_bytes;
2965
2966 chunk_count = val_count / chunk_regs;
2967 chunk_bytes = chunk_regs * val_bytes;
2968
2969 /* Read bytes that fit into whole chunks */
2970 for (i = 0; i < chunk_count; i++) {
2971 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2972 if (ret != 0)
2973 goto out;
2974
2975 reg += regmap_get_offset(map, chunk_regs);
2976 val += chunk_bytes;
2977 val_len -= chunk_bytes;
2978 }
2979
2980 /* Read remaining bytes */
2981 if (val_len) {
2982 ret = _regmap_raw_read(map, reg, val, val_len, false);
2983 if (ret != 0)
2984 goto out;
2985 }
2986 } else {
2987 /* Otherwise go word by word for the cache; should be low
2988 * cost as we expect to hit the cache.
2989 */
2990 for (i = 0; i < val_count; i++) {
2991 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2992 &v);
2993 if (ret != 0)
2994 goto out;
2995
2996 map->format.format_val(val + (i * val_bytes), v, 0);
2997 }
2998 }
2999
3000 out:
3001 map->unlock(map->lock_arg);
3002
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(regmap_raw_read);
3006
3007/**
3008 * regmap_noinc_read(): Read data from a register without incrementing the
3009 * register number
3010 *
3011 * @map: Register map to read from
3012 * @reg: Register to read from
3013 * @val: Pointer to data buffer
3014 * @val_len: Length of output buffer in bytes.
3015 *
3016 * The regmap API usually assumes that bulk read operations will read a
3017 * range of registers. Some devices have certain registers for which a read
3018 * operation read will read from an internal FIFO.
3019 *
3020 * The target register must be volatile but registers after it can be
3021 * completely unrelated cacheable registers.
3022 *
3023 * This will attempt multiple reads as required to read val_len bytes.
3024 *
3025 * A value of zero will be returned on success, a negative errno will be
3026 * returned in error cases.
3027 */
3028int regmap_noinc_read(struct regmap *map, unsigned int reg,
3029 void *val, size_t val_len)
3030{
3031 size_t read_len;
3032 int ret;
3033
3034 if (!map->read)
3035 return -ENOTSUPP;
3036
3037 if (val_len % map->format.val_bytes)
3038 return -EINVAL;
3039 if (!IS_ALIGNED(reg, map->reg_stride))
3040 return -EINVAL;
3041 if (val_len == 0)
3042 return -EINVAL;
3043
3044 map->lock(map->lock_arg);
3045
3046 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
3047 ret = -EINVAL;
3048 goto out_unlock;
3049 }
3050
3051 /* Use the accelerated operation if we can */
3052 if (map->bus->reg_noinc_read) {
3053 /*
3054 * We have not defined the FIFO semantics for cache, as the
3055 * cache is just one value deep. Should we return the last
3056 * written value? Just avoid this by always reading the FIFO
3057 * even when using cache. Cache only will not work.
3058 */
3059 if (map->cache_only) {
3060 ret = -EBUSY;
3061 goto out_unlock;
3062 }
3063 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
3064 goto out_unlock;
3065 }
3066
3067 while (val_len) {
3068 if (map->max_raw_read && map->max_raw_read < val_len)
3069 read_len = map->max_raw_read;
3070 else
3071 read_len = val_len;
3072 ret = _regmap_raw_read(map, reg, val, read_len, true);
3073 if (ret)
3074 goto out_unlock;
3075 val = ((u8 *)val) + read_len;
3076 val_len -= read_len;
3077 }
3078
3079out_unlock:
3080 map->unlock(map->lock_arg);
3081 return ret;
3082}
3083EXPORT_SYMBOL_GPL(regmap_noinc_read);
3084
3085/**
3086 * regmap_field_read(): Read a value to a single register field
3087 *
3088 * @field: Register field to read from
3089 * @val: Pointer to store read value
3090 *
3091 * A value of zero will be returned on success, a negative errno will
3092 * be returned in error cases.
3093 */
3094int regmap_field_read(struct regmap_field *field, unsigned int *val)
3095{
3096 int ret;
3097 unsigned int reg_val;
3098 ret = regmap_read(field->regmap, field->reg, ®_val);
3099 if (ret != 0)
3100 return ret;
3101
3102 reg_val &= field->mask;
3103 reg_val >>= field->shift;
3104 *val = reg_val;
3105
3106 return ret;
3107}
3108EXPORT_SYMBOL_GPL(regmap_field_read);
3109
3110/**
3111 * regmap_fields_read() - Read a value to a single register field with port ID
3112 *
3113 * @field: Register field to read from
3114 * @id: port ID
3115 * @val: Pointer to store read value
3116 *
3117 * A value of zero will be returned on success, a negative errno will
3118 * be returned in error cases.
3119 */
3120int regmap_fields_read(struct regmap_field *field, unsigned int id,
3121 unsigned int *val)
3122{
3123 int ret;
3124 unsigned int reg_val;
3125
3126 if (id >= field->id_size)
3127 return -EINVAL;
3128
3129 ret = regmap_read(field->regmap,
3130 field->reg + (field->id_offset * id),
3131 ®_val);
3132 if (ret != 0)
3133 return ret;
3134
3135 reg_val &= field->mask;
3136 reg_val >>= field->shift;
3137 *val = reg_val;
3138
3139 return ret;
3140}
3141EXPORT_SYMBOL_GPL(regmap_fields_read);
3142
3143/**
3144 * regmap_bulk_read() - Read multiple registers from the device
3145 *
3146 * @map: Register map to read from
3147 * @reg: First register to be read from
3148 * @val: Pointer to store read value, in native register size for device
3149 * @val_count: Number of registers to read
3150 *
3151 * A value of zero will be returned on success, a negative errno will
3152 * be returned in error cases.
3153 */
3154int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3155 size_t val_count)
3156{
3157 int ret, i;
3158 size_t val_bytes = map->format.val_bytes;
3159 bool vol = regmap_volatile_range(map, reg, val_count);
3160
3161 if (!IS_ALIGNED(reg, map->reg_stride))
3162 return -EINVAL;
3163 if (val_count == 0)
3164 return -EINVAL;
3165
3166 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3167 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3168 if (ret != 0)
3169 return ret;
3170
3171 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3172 map->format.parse_inplace(val + i);
3173 } else {
3174#ifdef CONFIG_64BIT
3175 u64 *u64 = val;
3176#endif
3177 u32 *u32 = val;
3178 u16 *u16 = val;
3179 u8 *u8 = val;
3180
3181 map->lock(map->lock_arg);
3182
3183 for (i = 0; i < val_count; i++) {
3184 unsigned int ival;
3185
3186 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3187 &ival);
3188 if (ret != 0)
3189 goto out;
3190
3191 switch (map->format.val_bytes) {
3192#ifdef CONFIG_64BIT
3193 case 8:
3194 u64[i] = ival;
3195 break;
3196#endif
3197 case 4:
3198 u32[i] = ival;
3199 break;
3200 case 2:
3201 u16[i] = ival;
3202 break;
3203 case 1:
3204 u8[i] = ival;
3205 break;
3206 default:
3207 ret = -EINVAL;
3208 goto out;
3209 }
3210 }
3211
3212out:
3213 map->unlock(map->lock_arg);
3214 }
3215
3216 if (!ret)
3217 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3218
3219 return ret;
3220}
3221EXPORT_SYMBOL_GPL(regmap_bulk_read);
3222
3223static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3224 unsigned int mask, unsigned int val,
3225 bool *change, bool force_write)
3226{
3227 int ret;
3228 unsigned int tmp, orig;
3229
3230 if (change)
3231 *change = false;
3232
3233 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3234 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3235 if (ret == 0 && change)
3236 *change = true;
3237 } else {
3238 ret = _regmap_read(map, reg, &orig);
3239 if (ret != 0)
3240 return ret;
3241
3242 tmp = orig & ~mask;
3243 tmp |= val & mask;
3244
3245 if (force_write || (tmp != orig)) {
3246 ret = _regmap_write(map, reg, tmp);
3247 if (ret == 0 && change)
3248 *change = true;
3249 }
3250 }
3251
3252 return ret;
3253}
3254
3255/**
3256 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3257 *
3258 * @map: Register map to update
3259 * @reg: Register to update
3260 * @mask: Bitmask to change
3261 * @val: New value for bitmask
3262 * @change: Boolean indicating if a write was done
3263 * @async: Boolean indicating asynchronously
3264 * @force: Boolean indicating use force update
3265 *
3266 * Perform a read/modify/write cycle on a register map with change, async, force
3267 * options.
3268 *
3269 * If async is true:
3270 *
3271 * With most buses the read must be done synchronously so this is most useful
3272 * for devices with a cache which do not need to interact with the hardware to
3273 * determine the current register value.
3274 *
3275 * Returns zero for success, a negative number on error.
3276 */
3277int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3278 unsigned int mask, unsigned int val,
3279 bool *change, bool async, bool force)
3280{
3281 int ret;
3282
3283 map->lock(map->lock_arg);
3284
3285 map->async = async;
3286
3287 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3288
3289 map->async = false;
3290
3291 map->unlock(map->lock_arg);
3292
3293 return ret;
3294}
3295EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3296
3297/**
3298 * regmap_test_bits() - Check if all specified bits are set in a register.
3299 *
3300 * @map: Register map to operate on
3301 * @reg: Register to read from
3302 * @bits: Bits to test
3303 *
3304 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3305 * bits are set and a negative error number if the underlying regmap_read()
3306 * fails.
3307 */
3308int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3309{
3310 unsigned int val, ret;
3311
3312 ret = regmap_read(map, reg, &val);
3313 if (ret)
3314 return ret;
3315
3316 return (val & bits) == bits;
3317}
3318EXPORT_SYMBOL_GPL(regmap_test_bits);
3319
3320void regmap_async_complete_cb(struct regmap_async *async, int ret)
3321{
3322 struct regmap *map = async->map;
3323 bool wake;
3324
3325 trace_regmap_async_io_complete(map);
3326
3327 spin_lock(&map->async_lock);
3328 list_move(&async->list, &map->async_free);
3329 wake = list_empty(&map->async_list);
3330
3331 if (ret != 0)
3332 map->async_ret = ret;
3333
3334 spin_unlock(&map->async_lock);
3335
3336 if (wake)
3337 wake_up(&map->async_waitq);
3338}
3339EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3340
3341static int regmap_async_is_done(struct regmap *map)
3342{
3343 unsigned long flags;
3344 int ret;
3345
3346 spin_lock_irqsave(&map->async_lock, flags);
3347 ret = list_empty(&map->async_list);
3348 spin_unlock_irqrestore(&map->async_lock, flags);
3349
3350 return ret;
3351}
3352
3353/**
3354 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3355 *
3356 * @map: Map to operate on.
3357 *
3358 * Blocks until any pending asynchronous I/O has completed. Returns
3359 * an error code for any failed I/O operations.
3360 */
3361int regmap_async_complete(struct regmap *map)
3362{
3363 unsigned long flags;
3364 int ret;
3365
3366 /* Nothing to do with no async support */
3367 if (!map->bus || !map->bus->async_write)
3368 return 0;
3369
3370 trace_regmap_async_complete_start(map);
3371
3372 wait_event(map->async_waitq, regmap_async_is_done(map));
3373
3374 spin_lock_irqsave(&map->async_lock, flags);
3375 ret = map->async_ret;
3376 map->async_ret = 0;
3377 spin_unlock_irqrestore(&map->async_lock, flags);
3378
3379 trace_regmap_async_complete_done(map);
3380
3381 return ret;
3382}
3383EXPORT_SYMBOL_GPL(regmap_async_complete);
3384
3385/**
3386 * regmap_register_patch - Register and apply register updates to be applied
3387 * on device initialistion
3388 *
3389 * @map: Register map to apply updates to.
3390 * @regs: Values to update.
3391 * @num_regs: Number of entries in regs.
3392 *
3393 * Register a set of register updates to be applied to the device
3394 * whenever the device registers are synchronised with the cache and
3395 * apply them immediately. Typically this is used to apply
3396 * corrections to be applied to the device defaults on startup, such
3397 * as the updates some vendors provide to undocumented registers.
3398 *
3399 * The caller must ensure that this function cannot be called
3400 * concurrently with either itself or regcache_sync().
3401 */
3402int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3403 int num_regs)
3404{
3405 struct reg_sequence *p;
3406 int ret;
3407 bool bypass;
3408
3409 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3410 num_regs))
3411 return 0;
3412
3413 p = krealloc(map->patch,
3414 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3415 GFP_KERNEL);
3416 if (p) {
3417 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3418 map->patch = p;
3419 map->patch_regs += num_regs;
3420 } else {
3421 return -ENOMEM;
3422 }
3423
3424 map->lock(map->lock_arg);
3425
3426 bypass = map->cache_bypass;
3427
3428 map->cache_bypass = true;
3429 map->async = true;
3430
3431 ret = _regmap_multi_reg_write(map, regs, num_regs);
3432
3433 map->async = false;
3434 map->cache_bypass = bypass;
3435
3436 map->unlock(map->lock_arg);
3437
3438 regmap_async_complete(map);
3439
3440 return ret;
3441}
3442EXPORT_SYMBOL_GPL(regmap_register_patch);
3443
3444/**
3445 * regmap_get_val_bytes() - Report the size of a register value
3446 *
3447 * @map: Register map to operate on.
3448 *
3449 * Report the size of a register value, mainly intended to for use by
3450 * generic infrastructure built on top of regmap.
3451 */
3452int regmap_get_val_bytes(struct regmap *map)
3453{
3454 if (map->format.format_write)
3455 return -EINVAL;
3456
3457 return map->format.val_bytes;
3458}
3459EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3460
3461/**
3462 * regmap_get_max_register() - Report the max register value
3463 *
3464 * @map: Register map to operate on.
3465 *
3466 * Report the max register value, mainly intended to for use by
3467 * generic infrastructure built on top of regmap.
3468 */
3469int regmap_get_max_register(struct regmap *map)
3470{
3471 return map->max_register ? map->max_register : -EINVAL;
3472}
3473EXPORT_SYMBOL_GPL(regmap_get_max_register);
3474
3475/**
3476 * regmap_get_reg_stride() - Report the register address stride
3477 *
3478 * @map: Register map to operate on.
3479 *
3480 * Report the register address stride, mainly intended to for use by
3481 * generic infrastructure built on top of regmap.
3482 */
3483int regmap_get_reg_stride(struct regmap *map)
3484{
3485 return map->reg_stride;
3486}
3487EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3488
3489/**
3490 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3491 *
3492 * @map: Register map to operate on.
3493 *
3494 * Returns true if an access to the register might sleep, else false.
3495 */
3496bool regmap_might_sleep(struct regmap *map)
3497{
3498 return map->can_sleep;
3499}
3500EXPORT_SYMBOL_GPL(regmap_might_sleep);
3501
3502int regmap_parse_val(struct regmap *map, const void *buf,
3503 unsigned int *val)
3504{
3505 if (!map->format.parse_val)
3506 return -EINVAL;
3507
3508 *val = map->format.parse_val(buf);
3509
3510 return 0;
3511}
3512EXPORT_SYMBOL_GPL(regmap_parse_val);
3513
3514static int __init regmap_initcall(void)
3515{
3516 regmap_debugfs_initcall();
3517
3518 return 0;
3519}
3520postcore_initcall(regmap_initcall);
1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_2_6_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 *out = (reg << 6) | val;
218}
219
220static void regmap_format_4_12_write(struct regmap *map,
221 unsigned int reg, unsigned int val)
222{
223 __be16 *out = map->work_buf;
224 *out = cpu_to_be16((reg << 12) | val);
225}
226
227static void regmap_format_7_9_write(struct regmap *map,
228 unsigned int reg, unsigned int val)
229{
230 __be16 *out = map->work_buf;
231 *out = cpu_to_be16((reg << 9) | val);
232}
233
234static void regmap_format_10_14_write(struct regmap *map,
235 unsigned int reg, unsigned int val)
236{
237 u8 *out = map->work_buf;
238
239 out[2] = val;
240 out[1] = (val >> 8) | (reg << 6);
241 out[0] = reg >> 2;
242}
243
244static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
245{
246 u8 *b = buf;
247
248 b[0] = val << shift;
249}
250
251static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
252{
253 put_unaligned_be16(val << shift, buf);
254}
255
256static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
257{
258 put_unaligned_le16(val << shift, buf);
259}
260
261static void regmap_format_16_native(void *buf, unsigned int val,
262 unsigned int shift)
263{
264 u16 v = val << shift;
265
266 memcpy(buf, &v, sizeof(v));
267}
268
269static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
270{
271 u8 *b = buf;
272
273 val <<= shift;
274
275 b[0] = val >> 16;
276 b[1] = val >> 8;
277 b[2] = val;
278}
279
280static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
281{
282 put_unaligned_be32(val << shift, buf);
283}
284
285static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
286{
287 put_unaligned_le32(val << shift, buf);
288}
289
290static void regmap_format_32_native(void *buf, unsigned int val,
291 unsigned int shift)
292{
293 u32 v = val << shift;
294
295 memcpy(buf, &v, sizeof(v));
296}
297
298#ifdef CONFIG_64BIT
299static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
300{
301 put_unaligned_be64((u64) val << shift, buf);
302}
303
304static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
305{
306 put_unaligned_le64((u64) val << shift, buf);
307}
308
309static void regmap_format_64_native(void *buf, unsigned int val,
310 unsigned int shift)
311{
312 u64 v = (u64) val << shift;
313
314 memcpy(buf, &v, sizeof(v));
315}
316#endif
317
318static void regmap_parse_inplace_noop(void *buf)
319{
320}
321
322static unsigned int regmap_parse_8(const void *buf)
323{
324 const u8 *b = buf;
325
326 return b[0];
327}
328
329static unsigned int regmap_parse_16_be(const void *buf)
330{
331 return get_unaligned_be16(buf);
332}
333
334static unsigned int regmap_parse_16_le(const void *buf)
335{
336 return get_unaligned_le16(buf);
337}
338
339static void regmap_parse_16_be_inplace(void *buf)
340{
341 u16 v = get_unaligned_be16(buf);
342
343 memcpy(buf, &v, sizeof(v));
344}
345
346static void regmap_parse_16_le_inplace(void *buf)
347{
348 u16 v = get_unaligned_le16(buf);
349
350 memcpy(buf, &v, sizeof(v));
351}
352
353static unsigned int regmap_parse_16_native(const void *buf)
354{
355 u16 v;
356
357 memcpy(&v, buf, sizeof(v));
358 return v;
359}
360
361static unsigned int regmap_parse_24(const void *buf)
362{
363 const u8 *b = buf;
364 unsigned int ret = b[2];
365 ret |= ((unsigned int)b[1]) << 8;
366 ret |= ((unsigned int)b[0]) << 16;
367
368 return ret;
369}
370
371static unsigned int regmap_parse_32_be(const void *buf)
372{
373 return get_unaligned_be32(buf);
374}
375
376static unsigned int regmap_parse_32_le(const void *buf)
377{
378 return get_unaligned_le32(buf);
379}
380
381static void regmap_parse_32_be_inplace(void *buf)
382{
383 u32 v = get_unaligned_be32(buf);
384
385 memcpy(buf, &v, sizeof(v));
386}
387
388static void regmap_parse_32_le_inplace(void *buf)
389{
390 u32 v = get_unaligned_le32(buf);
391
392 memcpy(buf, &v, sizeof(v));
393}
394
395static unsigned int regmap_parse_32_native(const void *buf)
396{
397 u32 v;
398
399 memcpy(&v, buf, sizeof(v));
400 return v;
401}
402
403#ifdef CONFIG_64BIT
404static unsigned int regmap_parse_64_be(const void *buf)
405{
406 return get_unaligned_be64(buf);
407}
408
409static unsigned int regmap_parse_64_le(const void *buf)
410{
411 return get_unaligned_le64(buf);
412}
413
414static void regmap_parse_64_be_inplace(void *buf)
415{
416 u64 v = get_unaligned_be64(buf);
417
418 memcpy(buf, &v, sizeof(v));
419}
420
421static void regmap_parse_64_le_inplace(void *buf)
422{
423 u64 v = get_unaligned_le64(buf);
424
425 memcpy(buf, &v, sizeof(v));
426}
427
428static unsigned int regmap_parse_64_native(const void *buf)
429{
430 u64 v;
431
432 memcpy(&v, buf, sizeof(v));
433 return v;
434}
435#endif
436
437static void regmap_lock_hwlock(void *__map)
438{
439 struct regmap *map = __map;
440
441 hwspin_lock_timeout(map->hwlock, UINT_MAX);
442}
443
444static void regmap_lock_hwlock_irq(void *__map)
445{
446 struct regmap *map = __map;
447
448 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
449}
450
451static void regmap_lock_hwlock_irqsave(void *__map)
452{
453 struct regmap *map = __map;
454
455 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
456 &map->spinlock_flags);
457}
458
459static void regmap_unlock_hwlock(void *__map)
460{
461 struct regmap *map = __map;
462
463 hwspin_unlock(map->hwlock);
464}
465
466static void regmap_unlock_hwlock_irq(void *__map)
467{
468 struct regmap *map = __map;
469
470 hwspin_unlock_irq(map->hwlock);
471}
472
473static void regmap_unlock_hwlock_irqrestore(void *__map)
474{
475 struct regmap *map = __map;
476
477 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
478}
479
480static void regmap_lock_unlock_none(void *__map)
481{
482
483}
484
485static void regmap_lock_mutex(void *__map)
486{
487 struct regmap *map = __map;
488 mutex_lock(&map->mutex);
489}
490
491static void regmap_unlock_mutex(void *__map)
492{
493 struct regmap *map = __map;
494 mutex_unlock(&map->mutex);
495}
496
497static void regmap_lock_spinlock(void *__map)
498__acquires(&map->spinlock)
499{
500 struct regmap *map = __map;
501 unsigned long flags;
502
503 spin_lock_irqsave(&map->spinlock, flags);
504 map->spinlock_flags = flags;
505}
506
507static void regmap_unlock_spinlock(void *__map)
508__releases(&map->spinlock)
509{
510 struct regmap *map = __map;
511 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
512}
513
514static void dev_get_regmap_release(struct device *dev, void *res)
515{
516 /*
517 * We don't actually have anything to do here; the goal here
518 * is not to manage the regmap but to provide a simple way to
519 * get the regmap back given a struct device.
520 */
521}
522
523static bool _regmap_range_add(struct regmap *map,
524 struct regmap_range_node *data)
525{
526 struct rb_root *root = &map->range_tree;
527 struct rb_node **new = &(root->rb_node), *parent = NULL;
528
529 while (*new) {
530 struct regmap_range_node *this =
531 rb_entry(*new, struct regmap_range_node, node);
532
533 parent = *new;
534 if (data->range_max < this->range_min)
535 new = &((*new)->rb_left);
536 else if (data->range_min > this->range_max)
537 new = &((*new)->rb_right);
538 else
539 return false;
540 }
541
542 rb_link_node(&data->node, parent, new);
543 rb_insert_color(&data->node, root);
544
545 return true;
546}
547
548static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
549 unsigned int reg)
550{
551 struct rb_node *node = map->range_tree.rb_node;
552
553 while (node) {
554 struct regmap_range_node *this =
555 rb_entry(node, struct regmap_range_node, node);
556
557 if (reg < this->range_min)
558 node = node->rb_left;
559 else if (reg > this->range_max)
560 node = node->rb_right;
561 else
562 return this;
563 }
564
565 return NULL;
566}
567
568static void regmap_range_exit(struct regmap *map)
569{
570 struct rb_node *next;
571 struct regmap_range_node *range_node;
572
573 next = rb_first(&map->range_tree);
574 while (next) {
575 range_node = rb_entry(next, struct regmap_range_node, node);
576 next = rb_next(&range_node->node);
577 rb_erase(&range_node->node, &map->range_tree);
578 kfree(range_node);
579 }
580
581 kfree(map->selector_work_buf);
582}
583
584static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
585{
586 if (config->name) {
587 const char *name = kstrdup_const(config->name, GFP_KERNEL);
588
589 if (!name)
590 return -ENOMEM;
591
592 kfree_const(map->name);
593 map->name = name;
594 }
595
596 return 0;
597}
598
599int regmap_attach_dev(struct device *dev, struct regmap *map,
600 const struct regmap_config *config)
601{
602 struct regmap **m;
603 int ret;
604
605 map->dev = dev;
606
607 ret = regmap_set_name(map, config);
608 if (ret)
609 return ret;
610
611 regmap_debugfs_init(map);
612
613 /* Add a devres resource for dev_get_regmap() */
614 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
615 if (!m) {
616 regmap_debugfs_exit(map);
617 return -ENOMEM;
618 }
619 *m = map;
620 devres_add(dev, m);
621
622 return 0;
623}
624EXPORT_SYMBOL_GPL(regmap_attach_dev);
625
626static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
627 const struct regmap_config *config)
628{
629 enum regmap_endian endian;
630
631 /* Retrieve the endianness specification from the regmap config */
632 endian = config->reg_format_endian;
633
634 /* If the regmap config specified a non-default value, use that */
635 if (endian != REGMAP_ENDIAN_DEFAULT)
636 return endian;
637
638 /* Retrieve the endianness specification from the bus config */
639 if (bus && bus->reg_format_endian_default)
640 endian = bus->reg_format_endian_default;
641
642 /* If the bus specified a non-default value, use that */
643 if (endian != REGMAP_ENDIAN_DEFAULT)
644 return endian;
645
646 /* Use this if no other value was found */
647 return REGMAP_ENDIAN_BIG;
648}
649
650enum regmap_endian regmap_get_val_endian(struct device *dev,
651 const struct regmap_bus *bus,
652 const struct regmap_config *config)
653{
654 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
655 enum regmap_endian endian;
656
657 /* Retrieve the endianness specification from the regmap config */
658 endian = config->val_format_endian;
659
660 /* If the regmap config specified a non-default value, use that */
661 if (endian != REGMAP_ENDIAN_DEFAULT)
662 return endian;
663
664 /* If the firmware node exist try to get endianness from it */
665 if (fwnode_property_read_bool(fwnode, "big-endian"))
666 endian = REGMAP_ENDIAN_BIG;
667 else if (fwnode_property_read_bool(fwnode, "little-endian"))
668 endian = REGMAP_ENDIAN_LITTLE;
669 else if (fwnode_property_read_bool(fwnode, "native-endian"))
670 endian = REGMAP_ENDIAN_NATIVE;
671
672 /* If the endianness was specified in fwnode, use that */
673 if (endian != REGMAP_ENDIAN_DEFAULT)
674 return endian;
675
676 /* Retrieve the endianness specification from the bus config */
677 if (bus && bus->val_format_endian_default)
678 endian = bus->val_format_endian_default;
679
680 /* If the bus specified a non-default value, use that */
681 if (endian != REGMAP_ENDIAN_DEFAULT)
682 return endian;
683
684 /* Use this if no other value was found */
685 return REGMAP_ENDIAN_BIG;
686}
687EXPORT_SYMBOL_GPL(regmap_get_val_endian);
688
689struct regmap *__regmap_init(struct device *dev,
690 const struct regmap_bus *bus,
691 void *bus_context,
692 const struct regmap_config *config,
693 struct lock_class_key *lock_key,
694 const char *lock_name)
695{
696 struct regmap *map;
697 int ret = -EINVAL;
698 enum regmap_endian reg_endian, val_endian;
699 int i, j;
700
701 if (!config)
702 goto err;
703
704 map = kzalloc(sizeof(*map), GFP_KERNEL);
705 if (map == NULL) {
706 ret = -ENOMEM;
707 goto err;
708 }
709
710 ret = regmap_set_name(map, config);
711 if (ret)
712 goto err_map;
713
714 if (config->disable_locking) {
715 map->lock = map->unlock = regmap_lock_unlock_none;
716 regmap_debugfs_disable(map);
717 } else if (config->lock && config->unlock) {
718 map->lock = config->lock;
719 map->unlock = config->unlock;
720 map->lock_arg = config->lock_arg;
721 } else if (config->use_hwlock) {
722 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
723 if (!map->hwlock) {
724 ret = -ENXIO;
725 goto err_name;
726 }
727
728 switch (config->hwlock_mode) {
729 case HWLOCK_IRQSTATE:
730 map->lock = regmap_lock_hwlock_irqsave;
731 map->unlock = regmap_unlock_hwlock_irqrestore;
732 break;
733 case HWLOCK_IRQ:
734 map->lock = regmap_lock_hwlock_irq;
735 map->unlock = regmap_unlock_hwlock_irq;
736 break;
737 default:
738 map->lock = regmap_lock_hwlock;
739 map->unlock = regmap_unlock_hwlock;
740 break;
741 }
742
743 map->lock_arg = map;
744 } else {
745 if ((bus && bus->fast_io) ||
746 config->fast_io) {
747 spin_lock_init(&map->spinlock);
748 map->lock = regmap_lock_spinlock;
749 map->unlock = regmap_unlock_spinlock;
750 lockdep_set_class_and_name(&map->spinlock,
751 lock_key, lock_name);
752 } else {
753 mutex_init(&map->mutex);
754 map->lock = regmap_lock_mutex;
755 map->unlock = regmap_unlock_mutex;
756 lockdep_set_class_and_name(&map->mutex,
757 lock_key, lock_name);
758 }
759 map->lock_arg = map;
760 }
761
762 /*
763 * When we write in fast-paths with regmap_bulk_write() don't allocate
764 * scratch buffers with sleeping allocations.
765 */
766 if ((bus && bus->fast_io) || config->fast_io)
767 map->alloc_flags = GFP_ATOMIC;
768 else
769 map->alloc_flags = GFP_KERNEL;
770
771 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
772 map->format.pad_bytes = config->pad_bits / 8;
773 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
774 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
775 config->val_bits + config->pad_bits, 8);
776 map->reg_shift = config->pad_bits % 8;
777 if (config->reg_stride)
778 map->reg_stride = config->reg_stride;
779 else
780 map->reg_stride = 1;
781 if (is_power_of_2(map->reg_stride))
782 map->reg_stride_order = ilog2(map->reg_stride);
783 else
784 map->reg_stride_order = -1;
785 map->use_single_read = config->use_single_read || !bus || !bus->read;
786 map->use_single_write = config->use_single_write || !bus || !bus->write;
787 map->can_multi_write = config->can_multi_write && bus && bus->write;
788 if (bus) {
789 map->max_raw_read = bus->max_raw_read;
790 map->max_raw_write = bus->max_raw_write;
791 }
792 map->dev = dev;
793 map->bus = bus;
794 map->bus_context = bus_context;
795 map->max_register = config->max_register;
796 map->wr_table = config->wr_table;
797 map->rd_table = config->rd_table;
798 map->volatile_table = config->volatile_table;
799 map->precious_table = config->precious_table;
800 map->wr_noinc_table = config->wr_noinc_table;
801 map->rd_noinc_table = config->rd_noinc_table;
802 map->writeable_reg = config->writeable_reg;
803 map->readable_reg = config->readable_reg;
804 map->volatile_reg = config->volatile_reg;
805 map->precious_reg = config->precious_reg;
806 map->writeable_noinc_reg = config->writeable_noinc_reg;
807 map->readable_noinc_reg = config->readable_noinc_reg;
808 map->cache_type = config->cache_type;
809
810 spin_lock_init(&map->async_lock);
811 INIT_LIST_HEAD(&map->async_list);
812 INIT_LIST_HEAD(&map->async_free);
813 init_waitqueue_head(&map->async_waitq);
814
815 if (config->read_flag_mask ||
816 config->write_flag_mask ||
817 config->zero_flag_mask) {
818 map->read_flag_mask = config->read_flag_mask;
819 map->write_flag_mask = config->write_flag_mask;
820 } else if (bus) {
821 map->read_flag_mask = bus->read_flag_mask;
822 }
823
824 if (!bus) {
825 map->reg_read = config->reg_read;
826 map->reg_write = config->reg_write;
827
828 map->defer_caching = false;
829 goto skip_format_initialization;
830 } else if (!bus->read || !bus->write) {
831 map->reg_read = _regmap_bus_reg_read;
832 map->reg_write = _regmap_bus_reg_write;
833 map->reg_update_bits = bus->reg_update_bits;
834
835 map->defer_caching = false;
836 goto skip_format_initialization;
837 } else {
838 map->reg_read = _regmap_bus_read;
839 map->reg_update_bits = bus->reg_update_bits;
840 }
841
842 reg_endian = regmap_get_reg_endian(bus, config);
843 val_endian = regmap_get_val_endian(dev, bus, config);
844
845 switch (config->reg_bits + map->reg_shift) {
846 case 2:
847 switch (config->val_bits) {
848 case 6:
849 map->format.format_write = regmap_format_2_6_write;
850 break;
851 default:
852 goto err_hwlock;
853 }
854 break;
855
856 case 4:
857 switch (config->val_bits) {
858 case 12:
859 map->format.format_write = regmap_format_4_12_write;
860 break;
861 default:
862 goto err_hwlock;
863 }
864 break;
865
866 case 7:
867 switch (config->val_bits) {
868 case 9:
869 map->format.format_write = regmap_format_7_9_write;
870 break;
871 default:
872 goto err_hwlock;
873 }
874 break;
875
876 case 10:
877 switch (config->val_bits) {
878 case 14:
879 map->format.format_write = regmap_format_10_14_write;
880 break;
881 default:
882 goto err_hwlock;
883 }
884 break;
885
886 case 8:
887 map->format.format_reg = regmap_format_8;
888 break;
889
890 case 16:
891 switch (reg_endian) {
892 case REGMAP_ENDIAN_BIG:
893 map->format.format_reg = regmap_format_16_be;
894 break;
895 case REGMAP_ENDIAN_LITTLE:
896 map->format.format_reg = regmap_format_16_le;
897 break;
898 case REGMAP_ENDIAN_NATIVE:
899 map->format.format_reg = regmap_format_16_native;
900 break;
901 default:
902 goto err_hwlock;
903 }
904 break;
905
906 case 24:
907 if (reg_endian != REGMAP_ENDIAN_BIG)
908 goto err_hwlock;
909 map->format.format_reg = regmap_format_24;
910 break;
911
912 case 32:
913 switch (reg_endian) {
914 case REGMAP_ENDIAN_BIG:
915 map->format.format_reg = regmap_format_32_be;
916 break;
917 case REGMAP_ENDIAN_LITTLE:
918 map->format.format_reg = regmap_format_32_le;
919 break;
920 case REGMAP_ENDIAN_NATIVE:
921 map->format.format_reg = regmap_format_32_native;
922 break;
923 default:
924 goto err_hwlock;
925 }
926 break;
927
928#ifdef CONFIG_64BIT
929 case 64:
930 switch (reg_endian) {
931 case REGMAP_ENDIAN_BIG:
932 map->format.format_reg = regmap_format_64_be;
933 break;
934 case REGMAP_ENDIAN_LITTLE:
935 map->format.format_reg = regmap_format_64_le;
936 break;
937 case REGMAP_ENDIAN_NATIVE:
938 map->format.format_reg = regmap_format_64_native;
939 break;
940 default:
941 goto err_hwlock;
942 }
943 break;
944#endif
945
946 default:
947 goto err_hwlock;
948 }
949
950 if (val_endian == REGMAP_ENDIAN_NATIVE)
951 map->format.parse_inplace = regmap_parse_inplace_noop;
952
953 switch (config->val_bits) {
954 case 8:
955 map->format.format_val = regmap_format_8;
956 map->format.parse_val = regmap_parse_8;
957 map->format.parse_inplace = regmap_parse_inplace_noop;
958 break;
959 case 16:
960 switch (val_endian) {
961 case REGMAP_ENDIAN_BIG:
962 map->format.format_val = regmap_format_16_be;
963 map->format.parse_val = regmap_parse_16_be;
964 map->format.parse_inplace = regmap_parse_16_be_inplace;
965 break;
966 case REGMAP_ENDIAN_LITTLE:
967 map->format.format_val = regmap_format_16_le;
968 map->format.parse_val = regmap_parse_16_le;
969 map->format.parse_inplace = regmap_parse_16_le_inplace;
970 break;
971 case REGMAP_ENDIAN_NATIVE:
972 map->format.format_val = regmap_format_16_native;
973 map->format.parse_val = regmap_parse_16_native;
974 break;
975 default:
976 goto err_hwlock;
977 }
978 break;
979 case 24:
980 if (val_endian != REGMAP_ENDIAN_BIG)
981 goto err_hwlock;
982 map->format.format_val = regmap_format_24;
983 map->format.parse_val = regmap_parse_24;
984 break;
985 case 32:
986 switch (val_endian) {
987 case REGMAP_ENDIAN_BIG:
988 map->format.format_val = regmap_format_32_be;
989 map->format.parse_val = regmap_parse_32_be;
990 map->format.parse_inplace = regmap_parse_32_be_inplace;
991 break;
992 case REGMAP_ENDIAN_LITTLE:
993 map->format.format_val = regmap_format_32_le;
994 map->format.parse_val = regmap_parse_32_le;
995 map->format.parse_inplace = regmap_parse_32_le_inplace;
996 break;
997 case REGMAP_ENDIAN_NATIVE:
998 map->format.format_val = regmap_format_32_native;
999 map->format.parse_val = regmap_parse_32_native;
1000 break;
1001 default:
1002 goto err_hwlock;
1003 }
1004 break;
1005#ifdef CONFIG_64BIT
1006 case 64:
1007 switch (val_endian) {
1008 case REGMAP_ENDIAN_BIG:
1009 map->format.format_val = regmap_format_64_be;
1010 map->format.parse_val = regmap_parse_64_be;
1011 map->format.parse_inplace = regmap_parse_64_be_inplace;
1012 break;
1013 case REGMAP_ENDIAN_LITTLE:
1014 map->format.format_val = regmap_format_64_le;
1015 map->format.parse_val = regmap_parse_64_le;
1016 map->format.parse_inplace = regmap_parse_64_le_inplace;
1017 break;
1018 case REGMAP_ENDIAN_NATIVE:
1019 map->format.format_val = regmap_format_64_native;
1020 map->format.parse_val = regmap_parse_64_native;
1021 break;
1022 default:
1023 goto err_hwlock;
1024 }
1025 break;
1026#endif
1027 }
1028
1029 if (map->format.format_write) {
1030 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1031 (val_endian != REGMAP_ENDIAN_BIG))
1032 goto err_hwlock;
1033 map->use_single_write = true;
1034 }
1035
1036 if (!map->format.format_write &&
1037 !(map->format.format_reg && map->format.format_val))
1038 goto err_hwlock;
1039
1040 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1041 if (map->work_buf == NULL) {
1042 ret = -ENOMEM;
1043 goto err_hwlock;
1044 }
1045
1046 if (map->format.format_write) {
1047 map->defer_caching = false;
1048 map->reg_write = _regmap_bus_formatted_write;
1049 } else if (map->format.format_val) {
1050 map->defer_caching = true;
1051 map->reg_write = _regmap_bus_raw_write;
1052 }
1053
1054skip_format_initialization:
1055
1056 map->range_tree = RB_ROOT;
1057 for (i = 0; i < config->num_ranges; i++) {
1058 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1059 struct regmap_range_node *new;
1060
1061 /* Sanity check */
1062 if (range_cfg->range_max < range_cfg->range_min) {
1063 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1064 range_cfg->range_max, range_cfg->range_min);
1065 goto err_range;
1066 }
1067
1068 if (range_cfg->range_max > map->max_register) {
1069 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1070 range_cfg->range_max, map->max_register);
1071 goto err_range;
1072 }
1073
1074 if (range_cfg->selector_reg > map->max_register) {
1075 dev_err(map->dev,
1076 "Invalid range %d: selector out of map\n", i);
1077 goto err_range;
1078 }
1079
1080 if (range_cfg->window_len == 0) {
1081 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1082 i);
1083 goto err_range;
1084 }
1085
1086 /* Make sure, that this register range has no selector
1087 or data window within its boundary */
1088 for (j = 0; j < config->num_ranges; j++) {
1089 unsigned sel_reg = config->ranges[j].selector_reg;
1090 unsigned win_min = config->ranges[j].window_start;
1091 unsigned win_max = win_min +
1092 config->ranges[j].window_len - 1;
1093
1094 /* Allow data window inside its own virtual range */
1095 if (j == i)
1096 continue;
1097
1098 if (range_cfg->range_min <= sel_reg &&
1099 sel_reg <= range_cfg->range_max) {
1100 dev_err(map->dev,
1101 "Range %d: selector for %d in window\n",
1102 i, j);
1103 goto err_range;
1104 }
1105
1106 if (!(win_max < range_cfg->range_min ||
1107 win_min > range_cfg->range_max)) {
1108 dev_err(map->dev,
1109 "Range %d: window for %d in window\n",
1110 i, j);
1111 goto err_range;
1112 }
1113 }
1114
1115 new = kzalloc(sizeof(*new), GFP_KERNEL);
1116 if (new == NULL) {
1117 ret = -ENOMEM;
1118 goto err_range;
1119 }
1120
1121 new->map = map;
1122 new->name = range_cfg->name;
1123 new->range_min = range_cfg->range_min;
1124 new->range_max = range_cfg->range_max;
1125 new->selector_reg = range_cfg->selector_reg;
1126 new->selector_mask = range_cfg->selector_mask;
1127 new->selector_shift = range_cfg->selector_shift;
1128 new->window_start = range_cfg->window_start;
1129 new->window_len = range_cfg->window_len;
1130
1131 if (!_regmap_range_add(map, new)) {
1132 dev_err(map->dev, "Failed to add range %d\n", i);
1133 kfree(new);
1134 goto err_range;
1135 }
1136
1137 if (map->selector_work_buf == NULL) {
1138 map->selector_work_buf =
1139 kzalloc(map->format.buf_size, GFP_KERNEL);
1140 if (map->selector_work_buf == NULL) {
1141 ret = -ENOMEM;
1142 goto err_range;
1143 }
1144 }
1145 }
1146
1147 ret = regcache_init(map, config);
1148 if (ret != 0)
1149 goto err_range;
1150
1151 if (dev) {
1152 ret = regmap_attach_dev(dev, map, config);
1153 if (ret != 0)
1154 goto err_regcache;
1155 } else {
1156 regmap_debugfs_init(map);
1157 }
1158
1159 return map;
1160
1161err_regcache:
1162 regcache_exit(map);
1163err_range:
1164 regmap_range_exit(map);
1165 kfree(map->work_buf);
1166err_hwlock:
1167 if (map->hwlock)
1168 hwspin_lock_free(map->hwlock);
1169err_name:
1170 kfree_const(map->name);
1171err_map:
1172 kfree(map);
1173err:
1174 return ERR_PTR(ret);
1175}
1176EXPORT_SYMBOL_GPL(__regmap_init);
1177
1178static void devm_regmap_release(struct device *dev, void *res)
1179{
1180 regmap_exit(*(struct regmap **)res);
1181}
1182
1183struct regmap *__devm_regmap_init(struct device *dev,
1184 const struct regmap_bus *bus,
1185 void *bus_context,
1186 const struct regmap_config *config,
1187 struct lock_class_key *lock_key,
1188 const char *lock_name)
1189{
1190 struct regmap **ptr, *regmap;
1191
1192 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1193 if (!ptr)
1194 return ERR_PTR(-ENOMEM);
1195
1196 regmap = __regmap_init(dev, bus, bus_context, config,
1197 lock_key, lock_name);
1198 if (!IS_ERR(regmap)) {
1199 *ptr = regmap;
1200 devres_add(dev, ptr);
1201 } else {
1202 devres_free(ptr);
1203 }
1204
1205 return regmap;
1206}
1207EXPORT_SYMBOL_GPL(__devm_regmap_init);
1208
1209static void regmap_field_init(struct regmap_field *rm_field,
1210 struct regmap *regmap, struct reg_field reg_field)
1211{
1212 rm_field->regmap = regmap;
1213 rm_field->reg = reg_field.reg;
1214 rm_field->shift = reg_field.lsb;
1215 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1216 rm_field->id_size = reg_field.id_size;
1217 rm_field->id_offset = reg_field.id_offset;
1218}
1219
1220/**
1221 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1222 *
1223 * @dev: Device that will be interacted with
1224 * @regmap: regmap bank in which this register field is located.
1225 * @reg_field: Register field with in the bank.
1226 *
1227 * The return value will be an ERR_PTR() on error or a valid pointer
1228 * to a struct regmap_field. The regmap_field will be automatically freed
1229 * by the device management code.
1230 */
1231struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1232 struct regmap *regmap, struct reg_field reg_field)
1233{
1234 struct regmap_field *rm_field = devm_kzalloc(dev,
1235 sizeof(*rm_field), GFP_KERNEL);
1236 if (!rm_field)
1237 return ERR_PTR(-ENOMEM);
1238
1239 regmap_field_init(rm_field, regmap, reg_field);
1240
1241 return rm_field;
1242
1243}
1244EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1245
1246/**
1247 * devm_regmap_field_free() - Free a register field allocated using
1248 * devm_regmap_field_alloc.
1249 *
1250 * @dev: Device that will be interacted with
1251 * @field: regmap field which should be freed.
1252 *
1253 * Free register field allocated using devm_regmap_field_alloc(). Usually
1254 * drivers need not call this function, as the memory allocated via devm
1255 * will be freed as per device-driver life-cyle.
1256 */
1257void devm_regmap_field_free(struct device *dev,
1258 struct regmap_field *field)
1259{
1260 devm_kfree(dev, field);
1261}
1262EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1263
1264/**
1265 * regmap_field_alloc() - Allocate and initialise a register field.
1266 *
1267 * @regmap: regmap bank in which this register field is located.
1268 * @reg_field: Register field with in the bank.
1269 *
1270 * The return value will be an ERR_PTR() on error or a valid pointer
1271 * to a struct regmap_field. The regmap_field should be freed by the
1272 * user once its finished working with it using regmap_field_free().
1273 */
1274struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1275 struct reg_field reg_field)
1276{
1277 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1278
1279 if (!rm_field)
1280 return ERR_PTR(-ENOMEM);
1281
1282 regmap_field_init(rm_field, regmap, reg_field);
1283
1284 return rm_field;
1285}
1286EXPORT_SYMBOL_GPL(regmap_field_alloc);
1287
1288/**
1289 * regmap_field_free() - Free register field allocated using
1290 * regmap_field_alloc.
1291 *
1292 * @field: regmap field which should be freed.
1293 */
1294void regmap_field_free(struct regmap_field *field)
1295{
1296 kfree(field);
1297}
1298EXPORT_SYMBOL_GPL(regmap_field_free);
1299
1300/**
1301 * regmap_reinit_cache() - Reinitialise the current register cache
1302 *
1303 * @map: Register map to operate on.
1304 * @config: New configuration. Only the cache data will be used.
1305 *
1306 * Discard any existing register cache for the map and initialize a
1307 * new cache. This can be used to restore the cache to defaults or to
1308 * update the cache configuration to reflect runtime discovery of the
1309 * hardware.
1310 *
1311 * No explicit locking is done here, the user needs to ensure that
1312 * this function will not race with other calls to regmap.
1313 */
1314int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1315{
1316 int ret;
1317
1318 regcache_exit(map);
1319 regmap_debugfs_exit(map);
1320
1321 map->max_register = config->max_register;
1322 map->writeable_reg = config->writeable_reg;
1323 map->readable_reg = config->readable_reg;
1324 map->volatile_reg = config->volatile_reg;
1325 map->precious_reg = config->precious_reg;
1326 map->writeable_noinc_reg = config->writeable_noinc_reg;
1327 map->readable_noinc_reg = config->readable_noinc_reg;
1328 map->cache_type = config->cache_type;
1329
1330 ret = regmap_set_name(map, config);
1331 if (ret)
1332 return ret;
1333
1334 regmap_debugfs_init(map);
1335
1336 map->cache_bypass = false;
1337 map->cache_only = false;
1338
1339 return regcache_init(map, config);
1340}
1341EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1342
1343/**
1344 * regmap_exit() - Free a previously allocated register map
1345 *
1346 * @map: Register map to operate on.
1347 */
1348void regmap_exit(struct regmap *map)
1349{
1350 struct regmap_async *async;
1351
1352 regcache_exit(map);
1353 regmap_debugfs_exit(map);
1354 regmap_range_exit(map);
1355 if (map->bus && map->bus->free_context)
1356 map->bus->free_context(map->bus_context);
1357 kfree(map->work_buf);
1358 while (!list_empty(&map->async_free)) {
1359 async = list_first_entry_or_null(&map->async_free,
1360 struct regmap_async,
1361 list);
1362 list_del(&async->list);
1363 kfree(async->work_buf);
1364 kfree(async);
1365 }
1366 if (map->hwlock)
1367 hwspin_lock_free(map->hwlock);
1368 kfree_const(map->name);
1369 kfree(map->patch);
1370 kfree(map);
1371}
1372EXPORT_SYMBOL_GPL(regmap_exit);
1373
1374static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1375{
1376 struct regmap **r = res;
1377 if (!r || !*r) {
1378 WARN_ON(!r || !*r);
1379 return 0;
1380 }
1381
1382 /* If the user didn't specify a name match any */
1383 if (data)
1384 return !strcmp((*r)->name, data);
1385 else
1386 return 1;
1387}
1388
1389/**
1390 * dev_get_regmap() - Obtain the regmap (if any) for a device
1391 *
1392 * @dev: Device to retrieve the map for
1393 * @name: Optional name for the register map, usually NULL.
1394 *
1395 * Returns the regmap for the device if one is present, or NULL. If
1396 * name is specified then it must match the name specified when
1397 * registering the device, if it is NULL then the first regmap found
1398 * will be used. Devices with multiple register maps are very rare,
1399 * generic code should normally not need to specify a name.
1400 */
1401struct regmap *dev_get_regmap(struct device *dev, const char *name)
1402{
1403 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1404 dev_get_regmap_match, (void *)name);
1405
1406 if (!r)
1407 return NULL;
1408 return *r;
1409}
1410EXPORT_SYMBOL_GPL(dev_get_regmap);
1411
1412/**
1413 * regmap_get_device() - Obtain the device from a regmap
1414 *
1415 * @map: Register map to operate on.
1416 *
1417 * Returns the underlying device that the regmap has been created for.
1418 */
1419struct device *regmap_get_device(struct regmap *map)
1420{
1421 return map->dev;
1422}
1423EXPORT_SYMBOL_GPL(regmap_get_device);
1424
1425static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1426 struct regmap_range_node *range,
1427 unsigned int val_num)
1428{
1429 void *orig_work_buf;
1430 unsigned int win_offset;
1431 unsigned int win_page;
1432 bool page_chg;
1433 int ret;
1434
1435 win_offset = (*reg - range->range_min) % range->window_len;
1436 win_page = (*reg - range->range_min) / range->window_len;
1437
1438 if (val_num > 1) {
1439 /* Bulk write shouldn't cross range boundary */
1440 if (*reg + val_num - 1 > range->range_max)
1441 return -EINVAL;
1442
1443 /* ... or single page boundary */
1444 if (val_num > range->window_len - win_offset)
1445 return -EINVAL;
1446 }
1447
1448 /* It is possible to have selector register inside data window.
1449 In that case, selector register is located on every page and
1450 it needs no page switching, when accessed alone. */
1451 if (val_num > 1 ||
1452 range->window_start + win_offset != range->selector_reg) {
1453 /* Use separate work_buf during page switching */
1454 orig_work_buf = map->work_buf;
1455 map->work_buf = map->selector_work_buf;
1456
1457 ret = _regmap_update_bits(map, range->selector_reg,
1458 range->selector_mask,
1459 win_page << range->selector_shift,
1460 &page_chg, false);
1461
1462 map->work_buf = orig_work_buf;
1463
1464 if (ret != 0)
1465 return ret;
1466 }
1467
1468 *reg = range->window_start + win_offset;
1469
1470 return 0;
1471}
1472
1473static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1474 unsigned long mask)
1475{
1476 u8 *buf;
1477 int i;
1478
1479 if (!mask || !map->work_buf)
1480 return;
1481
1482 buf = map->work_buf;
1483
1484 for (i = 0; i < max_bytes; i++)
1485 buf[i] |= (mask >> (8 * i)) & 0xff;
1486}
1487
1488static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1489 const void *val, size_t val_len, bool noinc)
1490{
1491 struct regmap_range_node *range;
1492 unsigned long flags;
1493 void *work_val = map->work_buf + map->format.reg_bytes +
1494 map->format.pad_bytes;
1495 void *buf;
1496 int ret = -ENOTSUPP;
1497 size_t len;
1498 int i;
1499
1500 WARN_ON(!map->bus);
1501
1502 /* Check for unwritable or noinc registers in range
1503 * before we start
1504 */
1505 if (!regmap_writeable_noinc(map, reg)) {
1506 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1507 unsigned int element =
1508 reg + regmap_get_offset(map, i);
1509 if (!regmap_writeable(map, element) ||
1510 regmap_writeable_noinc(map, element))
1511 return -EINVAL;
1512 }
1513 }
1514
1515 if (!map->cache_bypass && map->format.parse_val) {
1516 unsigned int ival;
1517 int val_bytes = map->format.val_bytes;
1518 for (i = 0; i < val_len / val_bytes; i++) {
1519 ival = map->format.parse_val(val + (i * val_bytes));
1520 ret = regcache_write(map,
1521 reg + regmap_get_offset(map, i),
1522 ival);
1523 if (ret) {
1524 dev_err(map->dev,
1525 "Error in caching of register: %x ret: %d\n",
1526 reg + i, ret);
1527 return ret;
1528 }
1529 }
1530 if (map->cache_only) {
1531 map->cache_dirty = true;
1532 return 0;
1533 }
1534 }
1535
1536 range = _regmap_range_lookup(map, reg);
1537 if (range) {
1538 int val_num = val_len / map->format.val_bytes;
1539 int win_offset = (reg - range->range_min) % range->window_len;
1540 int win_residue = range->window_len - win_offset;
1541
1542 /* If the write goes beyond the end of the window split it */
1543 while (val_num > win_residue) {
1544 dev_dbg(map->dev, "Writing window %d/%zu\n",
1545 win_residue, val_len / map->format.val_bytes);
1546 ret = _regmap_raw_write_impl(map, reg, val,
1547 win_residue *
1548 map->format.val_bytes, noinc);
1549 if (ret != 0)
1550 return ret;
1551
1552 reg += win_residue;
1553 val_num -= win_residue;
1554 val += win_residue * map->format.val_bytes;
1555 val_len -= win_residue * map->format.val_bytes;
1556
1557 win_offset = (reg - range->range_min) %
1558 range->window_len;
1559 win_residue = range->window_len - win_offset;
1560 }
1561
1562 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1563 if (ret != 0)
1564 return ret;
1565 }
1566
1567 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1568 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1569 map->write_flag_mask);
1570
1571 /*
1572 * Essentially all I/O mechanisms will be faster with a single
1573 * buffer to write. Since register syncs often generate raw
1574 * writes of single registers optimise that case.
1575 */
1576 if (val != work_val && val_len == map->format.val_bytes) {
1577 memcpy(work_val, val, map->format.val_bytes);
1578 val = work_val;
1579 }
1580
1581 if (map->async && map->bus->async_write) {
1582 struct regmap_async *async;
1583
1584 trace_regmap_async_write_start(map, reg, val_len);
1585
1586 spin_lock_irqsave(&map->async_lock, flags);
1587 async = list_first_entry_or_null(&map->async_free,
1588 struct regmap_async,
1589 list);
1590 if (async)
1591 list_del(&async->list);
1592 spin_unlock_irqrestore(&map->async_lock, flags);
1593
1594 if (!async) {
1595 async = map->bus->async_alloc();
1596 if (!async)
1597 return -ENOMEM;
1598
1599 async->work_buf = kzalloc(map->format.buf_size,
1600 GFP_KERNEL | GFP_DMA);
1601 if (!async->work_buf) {
1602 kfree(async);
1603 return -ENOMEM;
1604 }
1605 }
1606
1607 async->map = map;
1608
1609 /* If the caller supplied the value we can use it safely. */
1610 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1611 map->format.reg_bytes + map->format.val_bytes);
1612
1613 spin_lock_irqsave(&map->async_lock, flags);
1614 list_add_tail(&async->list, &map->async_list);
1615 spin_unlock_irqrestore(&map->async_lock, flags);
1616
1617 if (val != work_val)
1618 ret = map->bus->async_write(map->bus_context,
1619 async->work_buf,
1620 map->format.reg_bytes +
1621 map->format.pad_bytes,
1622 val, val_len, async);
1623 else
1624 ret = map->bus->async_write(map->bus_context,
1625 async->work_buf,
1626 map->format.reg_bytes +
1627 map->format.pad_bytes +
1628 val_len, NULL, 0, async);
1629
1630 if (ret != 0) {
1631 dev_err(map->dev, "Failed to schedule write: %d\n",
1632 ret);
1633
1634 spin_lock_irqsave(&map->async_lock, flags);
1635 list_move(&async->list, &map->async_free);
1636 spin_unlock_irqrestore(&map->async_lock, flags);
1637 }
1638
1639 return ret;
1640 }
1641
1642 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1643
1644 /* If we're doing a single register write we can probably just
1645 * send the work_buf directly, otherwise try to do a gather
1646 * write.
1647 */
1648 if (val == work_val)
1649 ret = map->bus->write(map->bus_context, map->work_buf,
1650 map->format.reg_bytes +
1651 map->format.pad_bytes +
1652 val_len);
1653 else if (map->bus->gather_write)
1654 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1655 map->format.reg_bytes +
1656 map->format.pad_bytes,
1657 val, val_len);
1658 else
1659 ret = -ENOTSUPP;
1660
1661 /* If that didn't work fall back on linearising by hand. */
1662 if (ret == -ENOTSUPP) {
1663 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1664 buf = kzalloc(len, GFP_KERNEL);
1665 if (!buf)
1666 return -ENOMEM;
1667
1668 memcpy(buf, map->work_buf, map->format.reg_bytes);
1669 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1670 val, val_len);
1671 ret = map->bus->write(map->bus_context, buf, len);
1672
1673 kfree(buf);
1674 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1675 /* regcache_drop_region() takes lock that we already have,
1676 * thus call map->cache_ops->drop() directly
1677 */
1678 if (map->cache_ops && map->cache_ops->drop)
1679 map->cache_ops->drop(map, reg, reg + 1);
1680 }
1681
1682 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1683
1684 return ret;
1685}
1686
1687/**
1688 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1689 *
1690 * @map: Map to check.
1691 */
1692bool regmap_can_raw_write(struct regmap *map)
1693{
1694 return map->bus && map->bus->write && map->format.format_val &&
1695 map->format.format_reg;
1696}
1697EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1698
1699/**
1700 * regmap_get_raw_read_max - Get the maximum size we can read
1701 *
1702 * @map: Map to check.
1703 */
1704size_t regmap_get_raw_read_max(struct regmap *map)
1705{
1706 return map->max_raw_read;
1707}
1708EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1709
1710/**
1711 * regmap_get_raw_write_max - Get the maximum size we can read
1712 *
1713 * @map: Map to check.
1714 */
1715size_t regmap_get_raw_write_max(struct regmap *map)
1716{
1717 return map->max_raw_write;
1718}
1719EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1720
1721static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1722 unsigned int val)
1723{
1724 int ret;
1725 struct regmap_range_node *range;
1726 struct regmap *map = context;
1727
1728 WARN_ON(!map->bus || !map->format.format_write);
1729
1730 range = _regmap_range_lookup(map, reg);
1731 if (range) {
1732 ret = _regmap_select_page(map, ®, range, 1);
1733 if (ret != 0)
1734 return ret;
1735 }
1736
1737 map->format.format_write(map, reg, val);
1738
1739 trace_regmap_hw_write_start(map, reg, 1);
1740
1741 ret = map->bus->write(map->bus_context, map->work_buf,
1742 map->format.buf_size);
1743
1744 trace_regmap_hw_write_done(map, reg, 1);
1745
1746 return ret;
1747}
1748
1749static int _regmap_bus_reg_write(void *context, unsigned int reg,
1750 unsigned int val)
1751{
1752 struct regmap *map = context;
1753
1754 return map->bus->reg_write(map->bus_context, reg, val);
1755}
1756
1757static int _regmap_bus_raw_write(void *context, unsigned int reg,
1758 unsigned int val)
1759{
1760 struct regmap *map = context;
1761
1762 WARN_ON(!map->bus || !map->format.format_val);
1763
1764 map->format.format_val(map->work_buf + map->format.reg_bytes
1765 + map->format.pad_bytes, val, 0);
1766 return _regmap_raw_write_impl(map, reg,
1767 map->work_buf +
1768 map->format.reg_bytes +
1769 map->format.pad_bytes,
1770 map->format.val_bytes,
1771 false);
1772}
1773
1774static inline void *_regmap_map_get_context(struct regmap *map)
1775{
1776 return (map->bus) ? map : map->bus_context;
1777}
1778
1779int _regmap_write(struct regmap *map, unsigned int reg,
1780 unsigned int val)
1781{
1782 int ret;
1783 void *context = _regmap_map_get_context(map);
1784
1785 if (!regmap_writeable(map, reg))
1786 return -EIO;
1787
1788 if (!map->cache_bypass && !map->defer_caching) {
1789 ret = regcache_write(map, reg, val);
1790 if (ret != 0)
1791 return ret;
1792 if (map->cache_only) {
1793 map->cache_dirty = true;
1794 return 0;
1795 }
1796 }
1797
1798 if (regmap_should_log(map))
1799 dev_info(map->dev, "%x <= %x\n", reg, val);
1800
1801 trace_regmap_reg_write(map, reg, val);
1802
1803 return map->reg_write(context, reg, val);
1804}
1805
1806/**
1807 * regmap_write() - Write a value to a single register
1808 *
1809 * @map: Register map to write to
1810 * @reg: Register to write to
1811 * @val: Value to be written
1812 *
1813 * A value of zero will be returned on success, a negative errno will
1814 * be returned in error cases.
1815 */
1816int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1817{
1818 int ret;
1819
1820 if (!IS_ALIGNED(reg, map->reg_stride))
1821 return -EINVAL;
1822
1823 map->lock(map->lock_arg);
1824
1825 ret = _regmap_write(map, reg, val);
1826
1827 map->unlock(map->lock_arg);
1828
1829 return ret;
1830}
1831EXPORT_SYMBOL_GPL(regmap_write);
1832
1833/**
1834 * regmap_write_async() - Write a value to a single register asynchronously
1835 *
1836 * @map: Register map to write to
1837 * @reg: Register to write to
1838 * @val: Value to be written
1839 *
1840 * A value of zero will be returned on success, a negative errno will
1841 * be returned in error cases.
1842 */
1843int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1844{
1845 int ret;
1846
1847 if (!IS_ALIGNED(reg, map->reg_stride))
1848 return -EINVAL;
1849
1850 map->lock(map->lock_arg);
1851
1852 map->async = true;
1853
1854 ret = _regmap_write(map, reg, val);
1855
1856 map->async = false;
1857
1858 map->unlock(map->lock_arg);
1859
1860 return ret;
1861}
1862EXPORT_SYMBOL_GPL(regmap_write_async);
1863
1864int _regmap_raw_write(struct regmap *map, unsigned int reg,
1865 const void *val, size_t val_len, bool noinc)
1866{
1867 size_t val_bytes = map->format.val_bytes;
1868 size_t val_count = val_len / val_bytes;
1869 size_t chunk_count, chunk_bytes;
1870 size_t chunk_regs = val_count;
1871 int ret, i;
1872
1873 if (!val_count)
1874 return -EINVAL;
1875
1876 if (map->use_single_write)
1877 chunk_regs = 1;
1878 else if (map->max_raw_write && val_len > map->max_raw_write)
1879 chunk_regs = map->max_raw_write / val_bytes;
1880
1881 chunk_count = val_count / chunk_regs;
1882 chunk_bytes = chunk_regs * val_bytes;
1883
1884 /* Write as many bytes as possible with chunk_size */
1885 for (i = 0; i < chunk_count; i++) {
1886 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
1887 if (ret)
1888 return ret;
1889
1890 reg += regmap_get_offset(map, chunk_regs);
1891 val += chunk_bytes;
1892 val_len -= chunk_bytes;
1893 }
1894
1895 /* Write remaining bytes */
1896 if (val_len)
1897 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
1898
1899 return ret;
1900}
1901
1902/**
1903 * regmap_raw_write() - Write raw values to one or more registers
1904 *
1905 * @map: Register map to write to
1906 * @reg: Initial register to write to
1907 * @val: Block of data to be written, laid out for direct transmission to the
1908 * device
1909 * @val_len: Length of data pointed to by val.
1910 *
1911 * This function is intended to be used for things like firmware
1912 * download where a large block of data needs to be transferred to the
1913 * device. No formatting will be done on the data provided.
1914 *
1915 * A value of zero will be returned on success, a negative errno will
1916 * be returned in error cases.
1917 */
1918int regmap_raw_write(struct regmap *map, unsigned int reg,
1919 const void *val, size_t val_len)
1920{
1921 int ret;
1922
1923 if (!regmap_can_raw_write(map))
1924 return -EINVAL;
1925 if (val_len % map->format.val_bytes)
1926 return -EINVAL;
1927
1928 map->lock(map->lock_arg);
1929
1930 ret = _regmap_raw_write(map, reg, val, val_len, false);
1931
1932 map->unlock(map->lock_arg);
1933
1934 return ret;
1935}
1936EXPORT_SYMBOL_GPL(regmap_raw_write);
1937
1938/**
1939 * regmap_noinc_write(): Write data from a register without incrementing the
1940 * register number
1941 *
1942 * @map: Register map to write to
1943 * @reg: Register to write to
1944 * @val: Pointer to data buffer
1945 * @val_len: Length of output buffer in bytes.
1946 *
1947 * The regmap API usually assumes that bulk bus write operations will write a
1948 * range of registers. Some devices have certain registers for which a write
1949 * operation can write to an internal FIFO.
1950 *
1951 * The target register must be volatile but registers after it can be
1952 * completely unrelated cacheable registers.
1953 *
1954 * This will attempt multiple writes as required to write val_len bytes.
1955 *
1956 * A value of zero will be returned on success, a negative errno will be
1957 * returned in error cases.
1958 */
1959int regmap_noinc_write(struct regmap *map, unsigned int reg,
1960 const void *val, size_t val_len)
1961{
1962 size_t write_len;
1963 int ret;
1964
1965 if (!map->bus)
1966 return -EINVAL;
1967 if (!map->bus->write)
1968 return -ENOTSUPP;
1969 if (val_len % map->format.val_bytes)
1970 return -EINVAL;
1971 if (!IS_ALIGNED(reg, map->reg_stride))
1972 return -EINVAL;
1973 if (val_len == 0)
1974 return -EINVAL;
1975
1976 map->lock(map->lock_arg);
1977
1978 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
1979 ret = -EINVAL;
1980 goto out_unlock;
1981 }
1982
1983 while (val_len) {
1984 if (map->max_raw_write && map->max_raw_write < val_len)
1985 write_len = map->max_raw_write;
1986 else
1987 write_len = val_len;
1988 ret = _regmap_raw_write(map, reg, val, write_len, true);
1989 if (ret)
1990 goto out_unlock;
1991 val = ((u8 *)val) + write_len;
1992 val_len -= write_len;
1993 }
1994
1995out_unlock:
1996 map->unlock(map->lock_arg);
1997 return ret;
1998}
1999EXPORT_SYMBOL_GPL(regmap_noinc_write);
2000
2001/**
2002 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2003 * register field.
2004 *
2005 * @field: Register field to write to
2006 * @mask: Bitmask to change
2007 * @val: Value to be written
2008 * @change: Boolean indicating if a write was done
2009 * @async: Boolean indicating asynchronously
2010 * @force: Boolean indicating use force update
2011 *
2012 * Perform a read/modify/write cycle on the register field with change,
2013 * async, force option.
2014 *
2015 * A value of zero will be returned on success, a negative errno will
2016 * be returned in error cases.
2017 */
2018int regmap_field_update_bits_base(struct regmap_field *field,
2019 unsigned int mask, unsigned int val,
2020 bool *change, bool async, bool force)
2021{
2022 mask = (mask << field->shift) & field->mask;
2023
2024 return regmap_update_bits_base(field->regmap, field->reg,
2025 mask, val << field->shift,
2026 change, async, force);
2027}
2028EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2029
2030/**
2031 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2032 * register field with port ID
2033 *
2034 * @field: Register field to write to
2035 * @id: port ID
2036 * @mask: Bitmask to change
2037 * @val: Value to be written
2038 * @change: Boolean indicating if a write was done
2039 * @async: Boolean indicating asynchronously
2040 * @force: Boolean indicating use force update
2041 *
2042 * A value of zero will be returned on success, a negative errno will
2043 * be returned in error cases.
2044 */
2045int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2046 unsigned int mask, unsigned int val,
2047 bool *change, bool async, bool force)
2048{
2049 if (id >= field->id_size)
2050 return -EINVAL;
2051
2052 mask = (mask << field->shift) & field->mask;
2053
2054 return regmap_update_bits_base(field->regmap,
2055 field->reg + (field->id_offset * id),
2056 mask, val << field->shift,
2057 change, async, force);
2058}
2059EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2060
2061/**
2062 * regmap_bulk_write() - Write multiple registers to the device
2063 *
2064 * @map: Register map to write to
2065 * @reg: First register to be write from
2066 * @val: Block of data to be written, in native register size for device
2067 * @val_count: Number of registers to write
2068 *
2069 * This function is intended to be used for writing a large block of
2070 * data to the device either in single transfer or multiple transfer.
2071 *
2072 * A value of zero will be returned on success, a negative errno will
2073 * be returned in error cases.
2074 */
2075int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2076 size_t val_count)
2077{
2078 int ret = 0, i;
2079 size_t val_bytes = map->format.val_bytes;
2080
2081 if (!IS_ALIGNED(reg, map->reg_stride))
2082 return -EINVAL;
2083
2084 /*
2085 * Some devices don't support bulk write, for them we have a series of
2086 * single write operations.
2087 */
2088 if (!map->bus || !map->format.parse_inplace) {
2089 map->lock(map->lock_arg);
2090 for (i = 0; i < val_count; i++) {
2091 unsigned int ival;
2092
2093 switch (val_bytes) {
2094 case 1:
2095 ival = *(u8 *)(val + (i * val_bytes));
2096 break;
2097 case 2:
2098 ival = *(u16 *)(val + (i * val_bytes));
2099 break;
2100 case 4:
2101 ival = *(u32 *)(val + (i * val_bytes));
2102 break;
2103#ifdef CONFIG_64BIT
2104 case 8:
2105 ival = *(u64 *)(val + (i * val_bytes));
2106 break;
2107#endif
2108 default:
2109 ret = -EINVAL;
2110 goto out;
2111 }
2112
2113 ret = _regmap_write(map,
2114 reg + regmap_get_offset(map, i),
2115 ival);
2116 if (ret != 0)
2117 goto out;
2118 }
2119out:
2120 map->unlock(map->lock_arg);
2121 } else {
2122 void *wval;
2123
2124 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2125 if (!wval)
2126 return -ENOMEM;
2127
2128 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2129 map->format.parse_inplace(wval + i);
2130
2131 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2132
2133 kfree(wval);
2134 }
2135 return ret;
2136}
2137EXPORT_SYMBOL_GPL(regmap_bulk_write);
2138
2139/*
2140 * _regmap_raw_multi_reg_write()
2141 *
2142 * the (register,newvalue) pairs in regs have not been formatted, but
2143 * they are all in the same page and have been changed to being page
2144 * relative. The page register has been written if that was necessary.
2145 */
2146static int _regmap_raw_multi_reg_write(struct regmap *map,
2147 const struct reg_sequence *regs,
2148 size_t num_regs)
2149{
2150 int ret;
2151 void *buf;
2152 int i;
2153 u8 *u8;
2154 size_t val_bytes = map->format.val_bytes;
2155 size_t reg_bytes = map->format.reg_bytes;
2156 size_t pad_bytes = map->format.pad_bytes;
2157 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2158 size_t len = pair_size * num_regs;
2159
2160 if (!len)
2161 return -EINVAL;
2162
2163 buf = kzalloc(len, GFP_KERNEL);
2164 if (!buf)
2165 return -ENOMEM;
2166
2167 /* We have to linearise by hand. */
2168
2169 u8 = buf;
2170
2171 for (i = 0; i < num_regs; i++) {
2172 unsigned int reg = regs[i].reg;
2173 unsigned int val = regs[i].def;
2174 trace_regmap_hw_write_start(map, reg, 1);
2175 map->format.format_reg(u8, reg, map->reg_shift);
2176 u8 += reg_bytes + pad_bytes;
2177 map->format.format_val(u8, val, 0);
2178 u8 += val_bytes;
2179 }
2180 u8 = buf;
2181 *u8 |= map->write_flag_mask;
2182
2183 ret = map->bus->write(map->bus_context, buf, len);
2184
2185 kfree(buf);
2186
2187 for (i = 0; i < num_regs; i++) {
2188 int reg = regs[i].reg;
2189 trace_regmap_hw_write_done(map, reg, 1);
2190 }
2191 return ret;
2192}
2193
2194static unsigned int _regmap_register_page(struct regmap *map,
2195 unsigned int reg,
2196 struct regmap_range_node *range)
2197{
2198 unsigned int win_page = (reg - range->range_min) / range->window_len;
2199
2200 return win_page;
2201}
2202
2203static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2204 struct reg_sequence *regs,
2205 size_t num_regs)
2206{
2207 int ret;
2208 int i, n;
2209 struct reg_sequence *base;
2210 unsigned int this_page = 0;
2211 unsigned int page_change = 0;
2212 /*
2213 * the set of registers are not neccessarily in order, but
2214 * since the order of write must be preserved this algorithm
2215 * chops the set each time the page changes. This also applies
2216 * if there is a delay required at any point in the sequence.
2217 */
2218 base = regs;
2219 for (i = 0, n = 0; i < num_regs; i++, n++) {
2220 unsigned int reg = regs[i].reg;
2221 struct regmap_range_node *range;
2222
2223 range = _regmap_range_lookup(map, reg);
2224 if (range) {
2225 unsigned int win_page = _regmap_register_page(map, reg,
2226 range);
2227
2228 if (i == 0)
2229 this_page = win_page;
2230 if (win_page != this_page) {
2231 this_page = win_page;
2232 page_change = 1;
2233 }
2234 }
2235
2236 /* If we have both a page change and a delay make sure to
2237 * write the regs and apply the delay before we change the
2238 * page.
2239 */
2240
2241 if (page_change || regs[i].delay_us) {
2242
2243 /* For situations where the first write requires
2244 * a delay we need to make sure we don't call
2245 * raw_multi_reg_write with n=0
2246 * This can't occur with page breaks as we
2247 * never write on the first iteration
2248 */
2249 if (regs[i].delay_us && i == 0)
2250 n = 1;
2251
2252 ret = _regmap_raw_multi_reg_write(map, base, n);
2253 if (ret != 0)
2254 return ret;
2255
2256 if (regs[i].delay_us)
2257 udelay(regs[i].delay_us);
2258
2259 base += n;
2260 n = 0;
2261
2262 if (page_change) {
2263 ret = _regmap_select_page(map,
2264 &base[n].reg,
2265 range, 1);
2266 if (ret != 0)
2267 return ret;
2268
2269 page_change = 0;
2270 }
2271
2272 }
2273
2274 }
2275 if (n > 0)
2276 return _regmap_raw_multi_reg_write(map, base, n);
2277 return 0;
2278}
2279
2280static int _regmap_multi_reg_write(struct regmap *map,
2281 const struct reg_sequence *regs,
2282 size_t num_regs)
2283{
2284 int i;
2285 int ret;
2286
2287 if (!map->can_multi_write) {
2288 for (i = 0; i < num_regs; i++) {
2289 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2290 if (ret != 0)
2291 return ret;
2292
2293 if (regs[i].delay_us)
2294 udelay(regs[i].delay_us);
2295 }
2296 return 0;
2297 }
2298
2299 if (!map->format.parse_inplace)
2300 return -EINVAL;
2301
2302 if (map->writeable_reg)
2303 for (i = 0; i < num_regs; i++) {
2304 int reg = regs[i].reg;
2305 if (!map->writeable_reg(map->dev, reg))
2306 return -EINVAL;
2307 if (!IS_ALIGNED(reg, map->reg_stride))
2308 return -EINVAL;
2309 }
2310
2311 if (!map->cache_bypass) {
2312 for (i = 0; i < num_regs; i++) {
2313 unsigned int val = regs[i].def;
2314 unsigned int reg = regs[i].reg;
2315 ret = regcache_write(map, reg, val);
2316 if (ret) {
2317 dev_err(map->dev,
2318 "Error in caching of register: %x ret: %d\n",
2319 reg, ret);
2320 return ret;
2321 }
2322 }
2323 if (map->cache_only) {
2324 map->cache_dirty = true;
2325 return 0;
2326 }
2327 }
2328
2329 WARN_ON(!map->bus);
2330
2331 for (i = 0; i < num_regs; i++) {
2332 unsigned int reg = regs[i].reg;
2333 struct regmap_range_node *range;
2334
2335 /* Coalesce all the writes between a page break or a delay
2336 * in a sequence
2337 */
2338 range = _regmap_range_lookup(map, reg);
2339 if (range || regs[i].delay_us) {
2340 size_t len = sizeof(struct reg_sequence)*num_regs;
2341 struct reg_sequence *base = kmemdup(regs, len,
2342 GFP_KERNEL);
2343 if (!base)
2344 return -ENOMEM;
2345 ret = _regmap_range_multi_paged_reg_write(map, base,
2346 num_regs);
2347 kfree(base);
2348
2349 return ret;
2350 }
2351 }
2352 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2353}
2354
2355/**
2356 * regmap_multi_reg_write() - Write multiple registers to the device
2357 *
2358 * @map: Register map to write to
2359 * @regs: Array of structures containing register,value to be written
2360 * @num_regs: Number of registers to write
2361 *
2362 * Write multiple registers to the device where the set of register, value
2363 * pairs are supplied in any order, possibly not all in a single range.
2364 *
2365 * The 'normal' block write mode will send ultimately send data on the
2366 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2367 * addressed. However, this alternative block multi write mode will send
2368 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2369 * must of course support the mode.
2370 *
2371 * A value of zero will be returned on success, a negative errno will be
2372 * returned in error cases.
2373 */
2374int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2375 int num_regs)
2376{
2377 int ret;
2378
2379 map->lock(map->lock_arg);
2380
2381 ret = _regmap_multi_reg_write(map, regs, num_regs);
2382
2383 map->unlock(map->lock_arg);
2384
2385 return ret;
2386}
2387EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2388
2389/**
2390 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2391 * device but not the cache
2392 *
2393 * @map: Register map to write to
2394 * @regs: Array of structures containing register,value to be written
2395 * @num_regs: Number of registers to write
2396 *
2397 * Write multiple registers to the device but not the cache where the set
2398 * of register are supplied in any order.
2399 *
2400 * This function is intended to be used for writing a large block of data
2401 * atomically to the device in single transfer for those I2C client devices
2402 * that implement this alternative block write mode.
2403 *
2404 * A value of zero will be returned on success, a negative errno will
2405 * be returned in error cases.
2406 */
2407int regmap_multi_reg_write_bypassed(struct regmap *map,
2408 const struct reg_sequence *regs,
2409 int num_regs)
2410{
2411 int ret;
2412 bool bypass;
2413
2414 map->lock(map->lock_arg);
2415
2416 bypass = map->cache_bypass;
2417 map->cache_bypass = true;
2418
2419 ret = _regmap_multi_reg_write(map, regs, num_regs);
2420
2421 map->cache_bypass = bypass;
2422
2423 map->unlock(map->lock_arg);
2424
2425 return ret;
2426}
2427EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2428
2429/**
2430 * regmap_raw_write_async() - Write raw values to one or more registers
2431 * asynchronously
2432 *
2433 * @map: Register map to write to
2434 * @reg: Initial register to write to
2435 * @val: Block of data to be written, laid out for direct transmission to the
2436 * device. Must be valid until regmap_async_complete() is called.
2437 * @val_len: Length of data pointed to by val.
2438 *
2439 * This function is intended to be used for things like firmware
2440 * download where a large block of data needs to be transferred to the
2441 * device. No formatting will be done on the data provided.
2442 *
2443 * If supported by the underlying bus the write will be scheduled
2444 * asynchronously, helping maximise I/O speed on higher speed buses
2445 * like SPI. regmap_async_complete() can be called to ensure that all
2446 * asynchrnous writes have been completed.
2447 *
2448 * A value of zero will be returned on success, a negative errno will
2449 * be returned in error cases.
2450 */
2451int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2452 const void *val, size_t val_len)
2453{
2454 int ret;
2455
2456 if (val_len % map->format.val_bytes)
2457 return -EINVAL;
2458 if (!IS_ALIGNED(reg, map->reg_stride))
2459 return -EINVAL;
2460
2461 map->lock(map->lock_arg);
2462
2463 map->async = true;
2464
2465 ret = _regmap_raw_write(map, reg, val, val_len, false);
2466
2467 map->async = false;
2468
2469 map->unlock(map->lock_arg);
2470
2471 return ret;
2472}
2473EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2474
2475static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2476 unsigned int val_len, bool noinc)
2477{
2478 struct regmap_range_node *range;
2479 int ret;
2480
2481 WARN_ON(!map->bus);
2482
2483 if (!map->bus || !map->bus->read)
2484 return -EINVAL;
2485
2486 range = _regmap_range_lookup(map, reg);
2487 if (range) {
2488 ret = _regmap_select_page(map, ®, range,
2489 noinc ? 1 : val_len / map->format.val_bytes);
2490 if (ret != 0)
2491 return ret;
2492 }
2493
2494 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2495 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2496 map->read_flag_mask);
2497 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2498
2499 ret = map->bus->read(map->bus_context, map->work_buf,
2500 map->format.reg_bytes + map->format.pad_bytes,
2501 val, val_len);
2502
2503 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2504
2505 return ret;
2506}
2507
2508static int _regmap_bus_reg_read(void *context, unsigned int reg,
2509 unsigned int *val)
2510{
2511 struct regmap *map = context;
2512
2513 return map->bus->reg_read(map->bus_context, reg, val);
2514}
2515
2516static int _regmap_bus_read(void *context, unsigned int reg,
2517 unsigned int *val)
2518{
2519 int ret;
2520 struct regmap *map = context;
2521 void *work_val = map->work_buf + map->format.reg_bytes +
2522 map->format.pad_bytes;
2523
2524 if (!map->format.parse_val)
2525 return -EINVAL;
2526
2527 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2528 if (ret == 0)
2529 *val = map->format.parse_val(work_val);
2530
2531 return ret;
2532}
2533
2534static int _regmap_read(struct regmap *map, unsigned int reg,
2535 unsigned int *val)
2536{
2537 int ret;
2538 void *context = _regmap_map_get_context(map);
2539
2540 if (!map->cache_bypass) {
2541 ret = regcache_read(map, reg, val);
2542 if (ret == 0)
2543 return 0;
2544 }
2545
2546 if (map->cache_only)
2547 return -EBUSY;
2548
2549 if (!regmap_readable(map, reg))
2550 return -EIO;
2551
2552 ret = map->reg_read(context, reg, val);
2553 if (ret == 0) {
2554 if (regmap_should_log(map))
2555 dev_info(map->dev, "%x => %x\n", reg, *val);
2556
2557 trace_regmap_reg_read(map, reg, *val);
2558
2559 if (!map->cache_bypass)
2560 regcache_write(map, reg, *val);
2561 }
2562
2563 return ret;
2564}
2565
2566/**
2567 * regmap_read() - Read a value from a single register
2568 *
2569 * @map: Register map to read from
2570 * @reg: Register to be read from
2571 * @val: Pointer to store read value
2572 *
2573 * A value of zero will be returned on success, a negative errno will
2574 * be returned in error cases.
2575 */
2576int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2577{
2578 int ret;
2579
2580 if (!IS_ALIGNED(reg, map->reg_stride))
2581 return -EINVAL;
2582
2583 map->lock(map->lock_arg);
2584
2585 ret = _regmap_read(map, reg, val);
2586
2587 map->unlock(map->lock_arg);
2588
2589 return ret;
2590}
2591EXPORT_SYMBOL_GPL(regmap_read);
2592
2593/**
2594 * regmap_raw_read() - Read raw data from the device
2595 *
2596 * @map: Register map to read from
2597 * @reg: First register to be read from
2598 * @val: Pointer to store read value
2599 * @val_len: Size of data to read
2600 *
2601 * A value of zero will be returned on success, a negative errno will
2602 * be returned in error cases.
2603 */
2604int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2605 size_t val_len)
2606{
2607 size_t val_bytes = map->format.val_bytes;
2608 size_t val_count = val_len / val_bytes;
2609 unsigned int v;
2610 int ret, i;
2611
2612 if (!map->bus)
2613 return -EINVAL;
2614 if (val_len % map->format.val_bytes)
2615 return -EINVAL;
2616 if (!IS_ALIGNED(reg, map->reg_stride))
2617 return -EINVAL;
2618 if (val_count == 0)
2619 return -EINVAL;
2620
2621 map->lock(map->lock_arg);
2622
2623 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2624 map->cache_type == REGCACHE_NONE) {
2625 size_t chunk_count, chunk_bytes;
2626 size_t chunk_regs = val_count;
2627
2628 if (!map->bus->read) {
2629 ret = -ENOTSUPP;
2630 goto out;
2631 }
2632
2633 if (map->use_single_read)
2634 chunk_regs = 1;
2635 else if (map->max_raw_read && val_len > map->max_raw_read)
2636 chunk_regs = map->max_raw_read / val_bytes;
2637
2638 chunk_count = val_count / chunk_regs;
2639 chunk_bytes = chunk_regs * val_bytes;
2640
2641 /* Read bytes that fit into whole chunks */
2642 for (i = 0; i < chunk_count; i++) {
2643 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2644 if (ret != 0)
2645 goto out;
2646
2647 reg += regmap_get_offset(map, chunk_regs);
2648 val += chunk_bytes;
2649 val_len -= chunk_bytes;
2650 }
2651
2652 /* Read remaining bytes */
2653 if (val_len) {
2654 ret = _regmap_raw_read(map, reg, val, val_len, false);
2655 if (ret != 0)
2656 goto out;
2657 }
2658 } else {
2659 /* Otherwise go word by word for the cache; should be low
2660 * cost as we expect to hit the cache.
2661 */
2662 for (i = 0; i < val_count; i++) {
2663 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2664 &v);
2665 if (ret != 0)
2666 goto out;
2667
2668 map->format.format_val(val + (i * val_bytes), v, 0);
2669 }
2670 }
2671
2672 out:
2673 map->unlock(map->lock_arg);
2674
2675 return ret;
2676}
2677EXPORT_SYMBOL_GPL(regmap_raw_read);
2678
2679/**
2680 * regmap_noinc_read(): Read data from a register without incrementing the
2681 * register number
2682 *
2683 * @map: Register map to read from
2684 * @reg: Register to read from
2685 * @val: Pointer to data buffer
2686 * @val_len: Length of output buffer in bytes.
2687 *
2688 * The regmap API usually assumes that bulk bus read operations will read a
2689 * range of registers. Some devices have certain registers for which a read
2690 * operation read will read from an internal FIFO.
2691 *
2692 * The target register must be volatile but registers after it can be
2693 * completely unrelated cacheable registers.
2694 *
2695 * This will attempt multiple reads as required to read val_len bytes.
2696 *
2697 * A value of zero will be returned on success, a negative errno will be
2698 * returned in error cases.
2699 */
2700int regmap_noinc_read(struct regmap *map, unsigned int reg,
2701 void *val, size_t val_len)
2702{
2703 size_t read_len;
2704 int ret;
2705
2706 if (!map->bus)
2707 return -EINVAL;
2708 if (!map->bus->read)
2709 return -ENOTSUPP;
2710 if (val_len % map->format.val_bytes)
2711 return -EINVAL;
2712 if (!IS_ALIGNED(reg, map->reg_stride))
2713 return -EINVAL;
2714 if (val_len == 0)
2715 return -EINVAL;
2716
2717 map->lock(map->lock_arg);
2718
2719 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2720 ret = -EINVAL;
2721 goto out_unlock;
2722 }
2723
2724 while (val_len) {
2725 if (map->max_raw_read && map->max_raw_read < val_len)
2726 read_len = map->max_raw_read;
2727 else
2728 read_len = val_len;
2729 ret = _regmap_raw_read(map, reg, val, read_len, true);
2730 if (ret)
2731 goto out_unlock;
2732 val = ((u8 *)val) + read_len;
2733 val_len -= read_len;
2734 }
2735
2736out_unlock:
2737 map->unlock(map->lock_arg);
2738 return ret;
2739}
2740EXPORT_SYMBOL_GPL(regmap_noinc_read);
2741
2742/**
2743 * regmap_field_read(): Read a value to a single register field
2744 *
2745 * @field: Register field to read from
2746 * @val: Pointer to store read value
2747 *
2748 * A value of zero will be returned on success, a negative errno will
2749 * be returned in error cases.
2750 */
2751int regmap_field_read(struct regmap_field *field, unsigned int *val)
2752{
2753 int ret;
2754 unsigned int reg_val;
2755 ret = regmap_read(field->regmap, field->reg, ®_val);
2756 if (ret != 0)
2757 return ret;
2758
2759 reg_val &= field->mask;
2760 reg_val >>= field->shift;
2761 *val = reg_val;
2762
2763 return ret;
2764}
2765EXPORT_SYMBOL_GPL(regmap_field_read);
2766
2767/**
2768 * regmap_fields_read() - Read a value to a single register field with port ID
2769 *
2770 * @field: Register field to read from
2771 * @id: port ID
2772 * @val: Pointer to store read value
2773 *
2774 * A value of zero will be returned on success, a negative errno will
2775 * be returned in error cases.
2776 */
2777int regmap_fields_read(struct regmap_field *field, unsigned int id,
2778 unsigned int *val)
2779{
2780 int ret;
2781 unsigned int reg_val;
2782
2783 if (id >= field->id_size)
2784 return -EINVAL;
2785
2786 ret = regmap_read(field->regmap,
2787 field->reg + (field->id_offset * id),
2788 ®_val);
2789 if (ret != 0)
2790 return ret;
2791
2792 reg_val &= field->mask;
2793 reg_val >>= field->shift;
2794 *val = reg_val;
2795
2796 return ret;
2797}
2798EXPORT_SYMBOL_GPL(regmap_fields_read);
2799
2800/**
2801 * regmap_bulk_read() - Read multiple registers from the device
2802 *
2803 * @map: Register map to read from
2804 * @reg: First register to be read from
2805 * @val: Pointer to store read value, in native register size for device
2806 * @val_count: Number of registers to read
2807 *
2808 * A value of zero will be returned on success, a negative errno will
2809 * be returned in error cases.
2810 */
2811int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2812 size_t val_count)
2813{
2814 int ret, i;
2815 size_t val_bytes = map->format.val_bytes;
2816 bool vol = regmap_volatile_range(map, reg, val_count);
2817
2818 if (!IS_ALIGNED(reg, map->reg_stride))
2819 return -EINVAL;
2820 if (val_count == 0)
2821 return -EINVAL;
2822
2823 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2824 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
2825 if (ret != 0)
2826 return ret;
2827
2828 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2829 map->format.parse_inplace(val + i);
2830 } else {
2831#ifdef CONFIG_64BIT
2832 u64 *u64 = val;
2833#endif
2834 u32 *u32 = val;
2835 u16 *u16 = val;
2836 u8 *u8 = val;
2837
2838 map->lock(map->lock_arg);
2839
2840 for (i = 0; i < val_count; i++) {
2841 unsigned int ival;
2842
2843 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2844 &ival);
2845 if (ret != 0)
2846 goto out;
2847
2848 switch (map->format.val_bytes) {
2849#ifdef CONFIG_64BIT
2850 case 8:
2851 u64[i] = ival;
2852 break;
2853#endif
2854 case 4:
2855 u32[i] = ival;
2856 break;
2857 case 2:
2858 u16[i] = ival;
2859 break;
2860 case 1:
2861 u8[i] = ival;
2862 break;
2863 default:
2864 ret = -EINVAL;
2865 goto out;
2866 }
2867 }
2868
2869out:
2870 map->unlock(map->lock_arg);
2871 }
2872
2873 return ret;
2874}
2875EXPORT_SYMBOL_GPL(regmap_bulk_read);
2876
2877static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2878 unsigned int mask, unsigned int val,
2879 bool *change, bool force_write)
2880{
2881 int ret;
2882 unsigned int tmp, orig;
2883
2884 if (change)
2885 *change = false;
2886
2887 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2888 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2889 if (ret == 0 && change)
2890 *change = true;
2891 } else {
2892 ret = _regmap_read(map, reg, &orig);
2893 if (ret != 0)
2894 return ret;
2895
2896 tmp = orig & ~mask;
2897 tmp |= val & mask;
2898
2899 if (force_write || (tmp != orig)) {
2900 ret = _regmap_write(map, reg, tmp);
2901 if (ret == 0 && change)
2902 *change = true;
2903 }
2904 }
2905
2906 return ret;
2907}
2908
2909/**
2910 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
2911 *
2912 * @map: Register map to update
2913 * @reg: Register to update
2914 * @mask: Bitmask to change
2915 * @val: New value for bitmask
2916 * @change: Boolean indicating if a write was done
2917 * @async: Boolean indicating asynchronously
2918 * @force: Boolean indicating use force update
2919 *
2920 * Perform a read/modify/write cycle on a register map with change, async, force
2921 * options.
2922 *
2923 * If async is true:
2924 *
2925 * With most buses the read must be done synchronously so this is most useful
2926 * for devices with a cache which do not need to interact with the hardware to
2927 * determine the current register value.
2928 *
2929 * Returns zero for success, a negative number on error.
2930 */
2931int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2932 unsigned int mask, unsigned int val,
2933 bool *change, bool async, bool force)
2934{
2935 int ret;
2936
2937 map->lock(map->lock_arg);
2938
2939 map->async = async;
2940
2941 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2942
2943 map->async = false;
2944
2945 map->unlock(map->lock_arg);
2946
2947 return ret;
2948}
2949EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2950
2951/**
2952 * regmap_test_bits() - Check if all specified bits are set in a register.
2953 *
2954 * @map: Register map to operate on
2955 * @reg: Register to read from
2956 * @bits: Bits to test
2957 *
2958 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
2959 * bits are set and a negative error number if the underlying regmap_read()
2960 * fails.
2961 */
2962int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
2963{
2964 unsigned int val, ret;
2965
2966 ret = regmap_read(map, reg, &val);
2967 if (ret)
2968 return ret;
2969
2970 return (val & bits) == bits;
2971}
2972EXPORT_SYMBOL_GPL(regmap_test_bits);
2973
2974void regmap_async_complete_cb(struct regmap_async *async, int ret)
2975{
2976 struct regmap *map = async->map;
2977 bool wake;
2978
2979 trace_regmap_async_io_complete(map);
2980
2981 spin_lock(&map->async_lock);
2982 list_move(&async->list, &map->async_free);
2983 wake = list_empty(&map->async_list);
2984
2985 if (ret != 0)
2986 map->async_ret = ret;
2987
2988 spin_unlock(&map->async_lock);
2989
2990 if (wake)
2991 wake_up(&map->async_waitq);
2992}
2993EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2994
2995static int regmap_async_is_done(struct regmap *map)
2996{
2997 unsigned long flags;
2998 int ret;
2999
3000 spin_lock_irqsave(&map->async_lock, flags);
3001 ret = list_empty(&map->async_list);
3002 spin_unlock_irqrestore(&map->async_lock, flags);
3003
3004 return ret;
3005}
3006
3007/**
3008 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3009 *
3010 * @map: Map to operate on.
3011 *
3012 * Blocks until any pending asynchronous I/O has completed. Returns
3013 * an error code for any failed I/O operations.
3014 */
3015int regmap_async_complete(struct regmap *map)
3016{
3017 unsigned long flags;
3018 int ret;
3019
3020 /* Nothing to do with no async support */
3021 if (!map->bus || !map->bus->async_write)
3022 return 0;
3023
3024 trace_regmap_async_complete_start(map);
3025
3026 wait_event(map->async_waitq, regmap_async_is_done(map));
3027
3028 spin_lock_irqsave(&map->async_lock, flags);
3029 ret = map->async_ret;
3030 map->async_ret = 0;
3031 spin_unlock_irqrestore(&map->async_lock, flags);
3032
3033 trace_regmap_async_complete_done(map);
3034
3035 return ret;
3036}
3037EXPORT_SYMBOL_GPL(regmap_async_complete);
3038
3039/**
3040 * regmap_register_patch - Register and apply register updates to be applied
3041 * on device initialistion
3042 *
3043 * @map: Register map to apply updates to.
3044 * @regs: Values to update.
3045 * @num_regs: Number of entries in regs.
3046 *
3047 * Register a set of register updates to be applied to the device
3048 * whenever the device registers are synchronised with the cache and
3049 * apply them immediately. Typically this is used to apply
3050 * corrections to be applied to the device defaults on startup, such
3051 * as the updates some vendors provide to undocumented registers.
3052 *
3053 * The caller must ensure that this function cannot be called
3054 * concurrently with either itself or regcache_sync().
3055 */
3056int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3057 int num_regs)
3058{
3059 struct reg_sequence *p;
3060 int ret;
3061 bool bypass;
3062
3063 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3064 num_regs))
3065 return 0;
3066
3067 p = krealloc(map->patch,
3068 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3069 GFP_KERNEL);
3070 if (p) {
3071 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3072 map->patch = p;
3073 map->patch_regs += num_regs;
3074 } else {
3075 return -ENOMEM;
3076 }
3077
3078 map->lock(map->lock_arg);
3079
3080 bypass = map->cache_bypass;
3081
3082 map->cache_bypass = true;
3083 map->async = true;
3084
3085 ret = _regmap_multi_reg_write(map, regs, num_regs);
3086
3087 map->async = false;
3088 map->cache_bypass = bypass;
3089
3090 map->unlock(map->lock_arg);
3091
3092 regmap_async_complete(map);
3093
3094 return ret;
3095}
3096EXPORT_SYMBOL_GPL(regmap_register_patch);
3097
3098/**
3099 * regmap_get_val_bytes() - Report the size of a register value
3100 *
3101 * @map: Register map to operate on.
3102 *
3103 * Report the size of a register value, mainly intended to for use by
3104 * generic infrastructure built on top of regmap.
3105 */
3106int regmap_get_val_bytes(struct regmap *map)
3107{
3108 if (map->format.format_write)
3109 return -EINVAL;
3110
3111 return map->format.val_bytes;
3112}
3113EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3114
3115/**
3116 * regmap_get_max_register() - Report the max register value
3117 *
3118 * @map: Register map to operate on.
3119 *
3120 * Report the max register value, mainly intended to for use by
3121 * generic infrastructure built on top of regmap.
3122 */
3123int regmap_get_max_register(struct regmap *map)
3124{
3125 return map->max_register ? map->max_register : -EINVAL;
3126}
3127EXPORT_SYMBOL_GPL(regmap_get_max_register);
3128
3129/**
3130 * regmap_get_reg_stride() - Report the register address stride
3131 *
3132 * @map: Register map to operate on.
3133 *
3134 * Report the register address stride, mainly intended to for use by
3135 * generic infrastructure built on top of regmap.
3136 */
3137int regmap_get_reg_stride(struct regmap *map)
3138{
3139 return map->reg_stride;
3140}
3141EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3142
3143int regmap_parse_val(struct regmap *map, const void *buf,
3144 unsigned int *val)
3145{
3146 if (!map->format.parse_val)
3147 return -EINVAL;
3148
3149 *val = map->format.parse_val(buf);
3150
3151 return 0;
3152}
3153EXPORT_SYMBOL_GPL(regmap_parse_val);
3154
3155static int __init regmap_initcall(void)
3156{
3157 regmap_debugfs_initcall();
3158
3159 return 0;
3160}
3161postcore_initcall(regmap_initcall);