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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * processor_idle - idle state submodule to the ACPI processor driver
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
8 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
9 * - Added processor hotplug support
10 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
11 * - Added support for C3 on SMP
12 */
13#define pr_fmt(fmt) "ACPI: " fmt
14
15#include <linux/module.h>
16#include <linux/acpi.h>
17#include <linux/dmi.h>
18#include <linux/sched.h> /* need_resched() */
19#include <linux/tick.h>
20#include <linux/cpuidle.h>
21#include <linux/cpu.h>
22#include <linux/minmax.h>
23#include <linux/perf_event.h>
24#include <acpi/processor.h>
25#include <linux/context_tracking.h>
26
27/*
28 * Include the apic definitions for x86 to have the APIC timer related defines
29 * available also for UP (on SMP it gets magically included via linux/smp.h).
30 * asm/acpi.h is not an option, as it would require more include magic. Also
31 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
32 */
33#ifdef CONFIG_X86
34#include <asm/apic.h>
35#include <asm/cpu.h>
36#endif
37
38#define ACPI_IDLE_STATE_START (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
39
40static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
41module_param(max_cstate, uint, 0400);
42static bool nocst __read_mostly;
43module_param(nocst, bool, 0400);
44static bool bm_check_disable __read_mostly;
45module_param(bm_check_disable, bool, 0400);
46
47static unsigned int latency_factor __read_mostly = 2;
48module_param(latency_factor, uint, 0644);
49
50static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
51
52struct cpuidle_driver acpi_idle_driver = {
53 .name = "acpi_idle",
54 .owner = THIS_MODULE,
55};
56
57#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
58static
59DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
60
61static int disabled_by_idle_boot_param(void)
62{
63 return boot_option_idle_override == IDLE_POLL ||
64 boot_option_idle_override == IDLE_HALT;
65}
66
67/*
68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
69 * For now disable this. Probably a bug somewhere else.
70 *
71 * To skip this limit, boot/load with a large max_cstate limit.
72 */
73static int set_max_cstate(const struct dmi_system_id *id)
74{
75 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
76 return 0;
77
78 pr_notice("%s detected - limiting to C%ld max_cstate."
79 " Override with \"processor.max_cstate=%d\"\n", id->ident,
80 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
81
82 max_cstate = (long)id->driver_data;
83
84 return 0;
85}
86
87static const struct dmi_system_id processor_power_dmi_table[] = {
88 { set_max_cstate, "Clevo 5600D", {
89 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
90 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
91 (void *)2},
92 { set_max_cstate, "Pavilion zv5000", {
93 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
94 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
95 (void *)1},
96 { set_max_cstate, "Asus L8400B", {
97 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
98 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
99 (void *)1},
100 {},
101};
102
103
104/*
105 * Callers should disable interrupts before the call and enable
106 * interrupts after return.
107 */
108static void __cpuidle acpi_safe_halt(void)
109{
110 if (!tif_need_resched()) {
111 raw_safe_halt();
112 raw_local_irq_disable();
113 }
114}
115
116#ifdef ARCH_APICTIMER_STOPS_ON_C3
117
118/*
119 * Some BIOS implementations switch to C3 in the published C2 state.
120 * This seems to be a common problem on AMD boxen, but other vendors
121 * are affected too. We pick the most conservative approach: we assume
122 * that the local APIC stops in both C2 and C3.
123 */
124static void lapic_timer_check_state(int state, struct acpi_processor *pr,
125 struct acpi_processor_cx *cx)
126{
127 struct acpi_processor_power *pwr = &pr->power;
128 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
129
130 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
131 return;
132
133 if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
134 type = ACPI_STATE_C1;
135
136 /*
137 * Check, if one of the previous states already marked the lapic
138 * unstable
139 */
140 if (pwr->timer_broadcast_on_state < state)
141 return;
142
143 if (cx->type >= type)
144 pr->power.timer_broadcast_on_state = state;
145}
146
147static void __lapic_timer_propagate_broadcast(void *arg)
148{
149 struct acpi_processor *pr = arg;
150
151 if (pr->power.timer_broadcast_on_state < INT_MAX)
152 tick_broadcast_enable();
153 else
154 tick_broadcast_disable();
155}
156
157static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
158{
159 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
160 (void *)pr, 1);
161}
162
163/* Power(C) State timer broadcast control */
164static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
165 struct acpi_processor_cx *cx)
166{
167 return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
168}
169
170#else
171
172static void lapic_timer_check_state(int state, struct acpi_processor *pr,
173 struct acpi_processor_cx *cstate) { }
174static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
175
176static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
177 struct acpi_processor_cx *cx)
178{
179 return false;
180}
181
182#endif
183
184#if defined(CONFIG_X86)
185static void tsc_check_state(int state)
186{
187 switch (boot_cpu_data.x86_vendor) {
188 case X86_VENDOR_HYGON:
189 case X86_VENDOR_AMD:
190 case X86_VENDOR_INTEL:
191 case X86_VENDOR_CENTAUR:
192 case X86_VENDOR_ZHAOXIN:
193 /*
194 * AMD Fam10h TSC will tick in all
195 * C/P/S0/S1 states when this bit is set.
196 */
197 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
198 return;
199 fallthrough;
200 default:
201 /* TSC could halt in idle, so notify users */
202 if (state > ACPI_STATE_C1)
203 mark_tsc_unstable("TSC halts in idle");
204 }
205}
206#else
207static void tsc_check_state(int state) { return; }
208#endif
209
210static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
211{
212
213 if (!pr->pblk)
214 return -ENODEV;
215
216 /* if info is obtained from pblk/fadt, type equals state */
217 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
218 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
219
220#ifndef CONFIG_HOTPLUG_CPU
221 /*
222 * Check for P_LVL2_UP flag before entering C2 and above on
223 * an SMP system.
224 */
225 if ((num_online_cpus() > 1) &&
226 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
227 return -ENODEV;
228#endif
229
230 /* determine C2 and C3 address from pblk */
231 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
232 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
233
234 /* determine latencies from FADT */
235 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
236 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
237
238 /*
239 * FADT specified C2 latency must be less than or equal to
240 * 100 microseconds.
241 */
242 if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
243 acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
244 acpi_gbl_FADT.c2_latency);
245 /* invalidate C2 */
246 pr->power.states[ACPI_STATE_C2].address = 0;
247 }
248
249 /*
250 * FADT supplied C3 latency must be less than or equal to
251 * 1000 microseconds.
252 */
253 if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
254 acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
255 acpi_gbl_FADT.c3_latency);
256 /* invalidate C3 */
257 pr->power.states[ACPI_STATE_C3].address = 0;
258 }
259
260 acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
261 pr->power.states[ACPI_STATE_C2].address,
262 pr->power.states[ACPI_STATE_C3].address);
263
264 snprintf(pr->power.states[ACPI_STATE_C2].desc,
265 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
266 pr->power.states[ACPI_STATE_C2].address);
267 snprintf(pr->power.states[ACPI_STATE_C3].desc,
268 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
269 pr->power.states[ACPI_STATE_C3].address);
270
271 return 0;
272}
273
274static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
275{
276 if (!pr->power.states[ACPI_STATE_C1].valid) {
277 /* set the first C-State to C1 */
278 /* all processors need to support C1 */
279 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
280 pr->power.states[ACPI_STATE_C1].valid = 1;
281 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
282
283 snprintf(pr->power.states[ACPI_STATE_C1].desc,
284 ACPI_CX_DESC_LEN, "ACPI HLT");
285 }
286 /* the C0 state only exists as a filler in our array */
287 pr->power.states[ACPI_STATE_C0].valid = 1;
288 return 0;
289}
290
291static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
292{
293 int ret;
294
295 if (nocst)
296 return -ENODEV;
297
298 ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
299 if (ret)
300 return ret;
301
302 if (!pr->power.count)
303 return -EFAULT;
304
305 pr->flags.has_cst = 1;
306 return 0;
307}
308
309static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
310 struct acpi_processor_cx *cx)
311{
312 static int bm_check_flag = -1;
313 static int bm_control_flag = -1;
314
315
316 if (!cx->address)
317 return;
318
319 /*
320 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
321 * DMA transfers are used by any ISA device to avoid livelock.
322 * Note that we could disable Type-F DMA (as recommended by
323 * the erratum), but this is known to disrupt certain ISA
324 * devices thus we take the conservative approach.
325 */
326 if (errata.piix4.fdma) {
327 acpi_handle_debug(pr->handle,
328 "C3 not supported on PIIX4 with Type-F DMA\n");
329 return;
330 }
331
332 /* All the logic here assumes flags.bm_check is same across all CPUs */
333 if (bm_check_flag == -1) {
334 /* Determine whether bm_check is needed based on CPU */
335 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
336 bm_check_flag = pr->flags.bm_check;
337 bm_control_flag = pr->flags.bm_control;
338 } else {
339 pr->flags.bm_check = bm_check_flag;
340 pr->flags.bm_control = bm_control_flag;
341 }
342
343 if (pr->flags.bm_check) {
344 if (!pr->flags.bm_control) {
345 if (pr->flags.has_cst != 1) {
346 /* bus mastering control is necessary */
347 acpi_handle_debug(pr->handle,
348 "C3 support requires BM control\n");
349 return;
350 } else {
351 /* Here we enter C3 without bus mastering */
352 acpi_handle_debug(pr->handle,
353 "C3 support without BM control\n");
354 }
355 }
356 } else {
357 /*
358 * WBINVD should be set in fadt, for C3 state to be
359 * supported on when bm_check is not required.
360 */
361 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
362 acpi_handle_debug(pr->handle,
363 "Cache invalidation should work properly"
364 " for C3 to be enabled on SMP systems\n");
365 return;
366 }
367 }
368
369 /*
370 * Otherwise we've met all of our C3 requirements.
371 * Normalize the C3 latency to expidite policy. Enable
372 * checking of bus mastering status (bm_check) so we can
373 * use this in our C3 policy
374 */
375 cx->valid = 1;
376
377 /*
378 * On older chipsets, BM_RLD needs to be set
379 * in order for Bus Master activity to wake the
380 * system from C3. Newer chipsets handle DMA
381 * during C3 automatically and BM_RLD is a NOP.
382 * In either case, the proper way to
383 * handle BM_RLD is to set it and leave it set.
384 */
385 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
386}
387
388static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length)
389{
390 int i, j, k;
391
392 for (i = 1; i < length; i++) {
393 if (!states[i].valid)
394 continue;
395
396 for (j = i - 1, k = i; j >= 0; j--) {
397 if (!states[j].valid)
398 continue;
399
400 if (states[j].latency > states[k].latency)
401 swap(states[j].latency, states[k].latency);
402
403 k = j;
404 }
405 }
406}
407
408static int acpi_processor_power_verify(struct acpi_processor *pr)
409{
410 unsigned int i;
411 unsigned int working = 0;
412 unsigned int last_latency = 0;
413 unsigned int last_type = 0;
414 bool buggy_latency = false;
415
416 pr->power.timer_broadcast_on_state = INT_MAX;
417
418 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
419 struct acpi_processor_cx *cx = &pr->power.states[i];
420
421 switch (cx->type) {
422 case ACPI_STATE_C1:
423 cx->valid = 1;
424 break;
425
426 case ACPI_STATE_C2:
427 if (!cx->address)
428 break;
429 cx->valid = 1;
430 break;
431
432 case ACPI_STATE_C3:
433 acpi_processor_power_verify_c3(pr, cx);
434 break;
435 }
436 if (!cx->valid)
437 continue;
438 if (cx->type >= last_type && cx->latency < last_latency)
439 buggy_latency = true;
440 last_latency = cx->latency;
441 last_type = cx->type;
442
443 lapic_timer_check_state(i, pr, cx);
444 tsc_check_state(cx->type);
445 working++;
446 }
447
448 if (buggy_latency) {
449 pr_notice("FW issue: working around C-state latencies out of order\n");
450 acpi_cst_latency_sort(&pr->power.states[1], max_cstate);
451 }
452
453 lapic_timer_propagate_broadcast(pr);
454
455 return working;
456}
457
458static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
459{
460 unsigned int i;
461 int result;
462
463
464 /* NOTE: the idle thread may not be running while calling
465 * this function */
466
467 /* Zero initialize all the C-states info. */
468 memset(pr->power.states, 0, sizeof(pr->power.states));
469
470 result = acpi_processor_get_power_info_cst(pr);
471 if (result == -ENODEV)
472 result = acpi_processor_get_power_info_fadt(pr);
473
474 if (result)
475 return result;
476
477 acpi_processor_get_power_info_default(pr);
478
479 pr->power.count = acpi_processor_power_verify(pr);
480
481 /*
482 * if one state of type C2 or C3 is available, mark this
483 * CPU as being "idle manageable"
484 */
485 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
486 if (pr->power.states[i].valid) {
487 pr->power.count = i;
488 pr->flags.power = 1;
489 }
490 }
491
492 return 0;
493}
494
495/**
496 * acpi_idle_bm_check - checks if bus master activity was detected
497 */
498static int acpi_idle_bm_check(void)
499{
500 u32 bm_status = 0;
501
502 if (bm_check_disable)
503 return 0;
504
505 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
506 if (bm_status)
507 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
508 /*
509 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
510 * the true state of bus mastering activity; forcing us to
511 * manually check the BMIDEA bit of each IDE channel.
512 */
513 else if (errata.piix4.bmisx) {
514 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
515 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
516 bm_status = 1;
517 }
518 return bm_status;
519}
520
521static __cpuidle void io_idle(unsigned long addr)
522{
523 /* IO port based C-state */
524 inb(addr);
525
526#ifdef CONFIG_X86
527 /* No delay is needed if we are in guest */
528 if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
529 return;
530 /*
531 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
532 * not this code. Assume that any Intel systems using this
533 * are ancient and may need the dummy wait. This also assumes
534 * that the motivating chipset issue was Intel-only.
535 */
536 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
537 return;
538#endif
539 /*
540 * Dummy wait op - must do something useless after P_LVL2 read
541 * because chipsets cannot guarantee that STPCLK# signal gets
542 * asserted in time to freeze execution properly
543 *
544 * This workaround has been in place since the original ACPI
545 * implementation was merged, circa 2002.
546 *
547 * If a profile is pointing to this instruction, please first
548 * consider moving your system to a more modern idle
549 * mechanism.
550 */
551 inl(acpi_gbl_FADT.xpm_timer_block.address);
552}
553
554/**
555 * acpi_idle_do_entry - enter idle state using the appropriate method
556 * @cx: cstate data
557 *
558 * Caller disables interrupt before call and enables interrupt after return.
559 */
560static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
561{
562 perf_lopwr_cb(true);
563
564 if (cx->entry_method == ACPI_CSTATE_FFH) {
565 /* Call into architectural FFH based C-state */
566 acpi_processor_ffh_cstate_enter(cx);
567 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
568 acpi_safe_halt();
569 } else {
570 io_idle(cx->address);
571 }
572
573 perf_lopwr_cb(false);
574}
575
576/**
577 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
578 * @dev: the target CPU
579 * @index: the index of suggested state
580 */
581static void acpi_idle_play_dead(struct cpuidle_device *dev, int index)
582{
583 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
584
585 ACPI_FLUSH_CPU_CACHE();
586
587 while (1) {
588
589 if (cx->entry_method == ACPI_CSTATE_HALT)
590 raw_safe_halt();
591 else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
592 io_idle(cx->address);
593 } else
594 return;
595 }
596}
597
598static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
599{
600 return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
601 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
602}
603
604static int c3_cpu_count;
605static DEFINE_RAW_SPINLOCK(c3_lock);
606
607/**
608 * acpi_idle_enter_bm - enters C3 with proper BM handling
609 * @drv: cpuidle driver
610 * @pr: Target processor
611 * @cx: Target state context
612 * @index: index of target state
613 */
614static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
615 struct acpi_processor *pr,
616 struct acpi_processor_cx *cx,
617 int index)
618{
619 static struct acpi_processor_cx safe_cx = {
620 .entry_method = ACPI_CSTATE_HALT,
621 };
622
623 /*
624 * disable bus master
625 * bm_check implies we need ARB_DIS
626 * bm_control implies whether we can do ARB_DIS
627 *
628 * That leaves a case where bm_check is set and bm_control is not set.
629 * In that case we cannot do much, we enter C3 without doing anything.
630 */
631 bool dis_bm = pr->flags.bm_control;
632
633 instrumentation_begin();
634
635 /* If we can skip BM, demote to a safe state. */
636 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
637 dis_bm = false;
638 index = drv->safe_state_index;
639 if (index >= 0) {
640 cx = this_cpu_read(acpi_cstate[index]);
641 } else {
642 cx = &safe_cx;
643 index = -EBUSY;
644 }
645 }
646
647 if (dis_bm) {
648 raw_spin_lock(&c3_lock);
649 c3_cpu_count++;
650 /* Disable bus master arbitration when all CPUs are in C3 */
651 if (c3_cpu_count == num_online_cpus())
652 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
653 raw_spin_unlock(&c3_lock);
654 }
655
656 ct_cpuidle_enter();
657
658 acpi_idle_do_entry(cx);
659
660 ct_cpuidle_exit();
661
662 /* Re-enable bus master arbitration */
663 if (dis_bm) {
664 raw_spin_lock(&c3_lock);
665 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
666 c3_cpu_count--;
667 raw_spin_unlock(&c3_lock);
668 }
669
670 instrumentation_end();
671
672 return index;
673}
674
675static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
676 struct cpuidle_driver *drv, int index)
677{
678 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
679 struct acpi_processor *pr;
680
681 pr = __this_cpu_read(processors);
682 if (unlikely(!pr))
683 return -EINVAL;
684
685 if (cx->type != ACPI_STATE_C1) {
686 if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
687 return acpi_idle_enter_bm(drv, pr, cx, index);
688
689 /* C2 to C1 demotion. */
690 if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
691 index = ACPI_IDLE_STATE_START;
692 cx = per_cpu(acpi_cstate[index], dev->cpu);
693 }
694 }
695
696 if (cx->type == ACPI_STATE_C3)
697 ACPI_FLUSH_CPU_CACHE();
698
699 acpi_idle_do_entry(cx);
700
701 return index;
702}
703
704static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
705 struct cpuidle_driver *drv, int index)
706{
707 struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
708
709 if (cx->type == ACPI_STATE_C3) {
710 struct acpi_processor *pr = __this_cpu_read(processors);
711
712 if (unlikely(!pr))
713 return 0;
714
715 if (pr->flags.bm_check) {
716 u8 bm_sts_skip = cx->bm_sts_skip;
717
718 /* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
719 cx->bm_sts_skip = 1;
720 acpi_idle_enter_bm(drv, pr, cx, index);
721 cx->bm_sts_skip = bm_sts_skip;
722
723 return 0;
724 } else {
725 ACPI_FLUSH_CPU_CACHE();
726 }
727 }
728 acpi_idle_do_entry(cx);
729
730 return 0;
731}
732
733static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
734 struct cpuidle_device *dev)
735{
736 int i, count = ACPI_IDLE_STATE_START;
737 struct acpi_processor_cx *cx;
738 struct cpuidle_state *state;
739
740 if (max_cstate == 0)
741 max_cstate = 1;
742
743 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
744 state = &acpi_idle_driver.states[count];
745 cx = &pr->power.states[i];
746
747 if (!cx->valid)
748 continue;
749
750 per_cpu(acpi_cstate[count], dev->cpu) = cx;
751
752 if (lapic_timer_needs_broadcast(pr, cx))
753 state->flags |= CPUIDLE_FLAG_TIMER_STOP;
754
755 if (cx->type == ACPI_STATE_C3) {
756 state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
757 if (pr->flags.bm_check)
758 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
759 }
760
761 count++;
762 if (count == CPUIDLE_STATE_MAX)
763 break;
764 }
765
766 if (!count)
767 return -EINVAL;
768
769 return 0;
770}
771
772static int acpi_processor_setup_cstates(struct acpi_processor *pr)
773{
774 int i, count;
775 struct acpi_processor_cx *cx;
776 struct cpuidle_state *state;
777 struct cpuidle_driver *drv = &acpi_idle_driver;
778
779 if (max_cstate == 0)
780 max_cstate = 1;
781
782 if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
783 cpuidle_poll_state_init(drv);
784 count = 1;
785 } else {
786 count = 0;
787 }
788
789 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
790 cx = &pr->power.states[i];
791
792 if (!cx->valid)
793 continue;
794
795 state = &drv->states[count];
796 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
797 strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
798 state->exit_latency = cx->latency;
799 state->target_residency = cx->latency * latency_factor;
800 state->enter = acpi_idle_enter;
801
802 state->flags = 0;
803
804 state->enter_dead = acpi_idle_play_dead;
805
806 if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2)
807 drv->safe_state_index = count;
808
809 /*
810 * Halt-induced C1 is not good for ->enter_s2idle, because it
811 * re-enables interrupts on exit. Moreover, C1 is generally not
812 * particularly interesting from the suspend-to-idle angle, so
813 * avoid C1 and the situations in which we may need to fall back
814 * to it altogether.
815 */
816 if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
817 state->enter_s2idle = acpi_idle_enter_s2idle;
818
819 count++;
820 if (count == CPUIDLE_STATE_MAX)
821 break;
822 }
823
824 drv->state_count = count;
825
826 if (!count)
827 return -EINVAL;
828
829 return 0;
830}
831
832static inline void acpi_processor_cstate_first_run_checks(void)
833{
834 static int first_run;
835
836 if (first_run)
837 return;
838 dmi_check_system(processor_power_dmi_table);
839 max_cstate = acpi_processor_cstate_check(max_cstate);
840 if (max_cstate < ACPI_C_STATES_MAX)
841 pr_notice("processor limited to max C-state %d\n", max_cstate);
842
843 first_run++;
844
845 if (nocst)
846 return;
847
848 acpi_processor_claim_cst_control();
849}
850#else
851
852static inline int disabled_by_idle_boot_param(void) { return 0; }
853static inline void acpi_processor_cstate_first_run_checks(void) { }
854static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
855{
856 return -ENODEV;
857}
858
859static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
860 struct cpuidle_device *dev)
861{
862 return -EINVAL;
863}
864
865static int acpi_processor_setup_cstates(struct acpi_processor *pr)
866{
867 return -EINVAL;
868}
869
870#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
871
872struct acpi_lpi_states_array {
873 unsigned int size;
874 unsigned int composite_states_size;
875 struct acpi_lpi_state *entries;
876 struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
877};
878
879static int obj_get_integer(union acpi_object *obj, u32 *value)
880{
881 if (obj->type != ACPI_TYPE_INTEGER)
882 return -EINVAL;
883
884 *value = obj->integer.value;
885 return 0;
886}
887
888static int acpi_processor_evaluate_lpi(acpi_handle handle,
889 struct acpi_lpi_states_array *info)
890{
891 acpi_status status;
892 int ret = 0;
893 int pkg_count, state_idx = 1, loop;
894 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
895 union acpi_object *lpi_data;
896 struct acpi_lpi_state *lpi_state;
897
898 status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
899 if (ACPI_FAILURE(status)) {
900 acpi_handle_debug(handle, "No _LPI, giving up\n");
901 return -ENODEV;
902 }
903
904 lpi_data = buffer.pointer;
905
906 /* There must be at least 4 elements = 3 elements + 1 package */
907 if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
908 lpi_data->package.count < 4) {
909 pr_debug("not enough elements in _LPI\n");
910 ret = -ENODATA;
911 goto end;
912 }
913
914 pkg_count = lpi_data->package.elements[2].integer.value;
915
916 /* Validate number of power states. */
917 if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
918 pr_debug("count given by _LPI is not valid\n");
919 ret = -ENODATA;
920 goto end;
921 }
922
923 lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
924 if (!lpi_state) {
925 ret = -ENOMEM;
926 goto end;
927 }
928
929 info->size = pkg_count;
930 info->entries = lpi_state;
931
932 /* LPI States start at index 3 */
933 for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
934 union acpi_object *element, *pkg_elem, *obj;
935
936 element = &lpi_data->package.elements[loop];
937 if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
938 continue;
939
940 pkg_elem = element->package.elements;
941
942 obj = pkg_elem + 6;
943 if (obj->type == ACPI_TYPE_BUFFER) {
944 struct acpi_power_register *reg;
945
946 reg = (struct acpi_power_register *)obj->buffer.pointer;
947 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
948 reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
949 continue;
950
951 lpi_state->address = reg->address;
952 lpi_state->entry_method =
953 reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
954 ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
955 } else if (obj->type == ACPI_TYPE_INTEGER) {
956 lpi_state->entry_method = ACPI_CSTATE_INTEGER;
957 lpi_state->address = obj->integer.value;
958 } else {
959 continue;
960 }
961
962 /* elements[7,8] skipped for now i.e. Residency/Usage counter*/
963
964 obj = pkg_elem + 9;
965 if (obj->type == ACPI_TYPE_STRING)
966 strscpy(lpi_state->desc, obj->string.pointer,
967 ACPI_CX_DESC_LEN);
968
969 lpi_state->index = state_idx;
970 if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
971 pr_debug("No min. residency found, assuming 10 us\n");
972 lpi_state->min_residency = 10;
973 }
974
975 if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
976 pr_debug("No wakeup residency found, assuming 10 us\n");
977 lpi_state->wake_latency = 10;
978 }
979
980 if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
981 lpi_state->flags = 0;
982
983 if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
984 lpi_state->arch_flags = 0;
985
986 if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
987 lpi_state->res_cnt_freq = 1;
988
989 if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
990 lpi_state->enable_parent_state = 0;
991 }
992
993 acpi_handle_debug(handle, "Found %d power states\n", state_idx);
994end:
995 kfree(buffer.pointer);
996 return ret;
997}
998
999/*
1000 * flat_state_cnt - the number of composite LPI states after the process of flattening
1001 */
1002static int flat_state_cnt;
1003
1004/**
1005 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1006 *
1007 * @local: local LPI state
1008 * @parent: parent LPI state
1009 * @result: composite LPI state
1010 */
1011static bool combine_lpi_states(struct acpi_lpi_state *local,
1012 struct acpi_lpi_state *parent,
1013 struct acpi_lpi_state *result)
1014{
1015 if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1016 if (!parent->address) /* 0 means autopromotable */
1017 return false;
1018 result->address = local->address + parent->address;
1019 } else {
1020 result->address = parent->address;
1021 }
1022
1023 result->min_residency = max(local->min_residency, parent->min_residency);
1024 result->wake_latency = local->wake_latency + parent->wake_latency;
1025 result->enable_parent_state = parent->enable_parent_state;
1026 result->entry_method = local->entry_method;
1027
1028 result->flags = parent->flags;
1029 result->arch_flags = parent->arch_flags;
1030 result->index = parent->index;
1031
1032 strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1033 strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1034 strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1035 return true;
1036}
1037
1038#define ACPI_LPI_STATE_FLAGS_ENABLED BIT(0)
1039
1040static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1041 struct acpi_lpi_state *t)
1042{
1043 curr_level->composite_states[curr_level->composite_states_size++] = t;
1044}
1045
1046static int flatten_lpi_states(struct acpi_processor *pr,
1047 struct acpi_lpi_states_array *curr_level,
1048 struct acpi_lpi_states_array *prev_level)
1049{
1050 int i, j, state_count = curr_level->size;
1051 struct acpi_lpi_state *p, *t = curr_level->entries;
1052
1053 curr_level->composite_states_size = 0;
1054 for (j = 0; j < state_count; j++, t++) {
1055 struct acpi_lpi_state *flpi;
1056
1057 if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1058 continue;
1059
1060 if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1061 pr_warn("Limiting number of LPI states to max (%d)\n",
1062 ACPI_PROCESSOR_MAX_POWER);
1063 pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1064 break;
1065 }
1066
1067 flpi = &pr->power.lpi_states[flat_state_cnt];
1068
1069 if (!prev_level) { /* leaf/processor node */
1070 memcpy(flpi, t, sizeof(*t));
1071 stash_composite_state(curr_level, flpi);
1072 flat_state_cnt++;
1073 continue;
1074 }
1075
1076 for (i = 0; i < prev_level->composite_states_size; i++) {
1077 p = prev_level->composite_states[i];
1078 if (t->index <= p->enable_parent_state &&
1079 combine_lpi_states(p, t, flpi)) {
1080 stash_composite_state(curr_level, flpi);
1081 flat_state_cnt++;
1082 flpi++;
1083 }
1084 }
1085 }
1086
1087 kfree(curr_level->entries);
1088 return 0;
1089}
1090
1091int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1092{
1093 return -EOPNOTSUPP;
1094}
1095
1096static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1097{
1098 int ret, i;
1099 acpi_status status;
1100 acpi_handle handle = pr->handle, pr_ahandle;
1101 struct acpi_device *d = NULL;
1102 struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1103
1104 /* make sure our architecture has support */
1105 ret = acpi_processor_ffh_lpi_probe(pr->id);
1106 if (ret == -EOPNOTSUPP)
1107 return ret;
1108
1109 if (!osc_pc_lpi_support_confirmed)
1110 return -EOPNOTSUPP;
1111
1112 if (!acpi_has_method(handle, "_LPI"))
1113 return -EINVAL;
1114
1115 flat_state_cnt = 0;
1116 prev = &info[0];
1117 curr = &info[1];
1118 handle = pr->handle;
1119 ret = acpi_processor_evaluate_lpi(handle, prev);
1120 if (ret)
1121 return ret;
1122 flatten_lpi_states(pr, prev, NULL);
1123
1124 status = acpi_get_parent(handle, &pr_ahandle);
1125 while (ACPI_SUCCESS(status)) {
1126 d = acpi_fetch_acpi_dev(pr_ahandle);
1127 if (!d)
1128 break;
1129
1130 handle = pr_ahandle;
1131
1132 if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1133 break;
1134
1135 /* can be optional ? */
1136 if (!acpi_has_method(handle, "_LPI"))
1137 break;
1138
1139 ret = acpi_processor_evaluate_lpi(handle, curr);
1140 if (ret)
1141 break;
1142
1143 /* flatten all the LPI states in this level of hierarchy */
1144 flatten_lpi_states(pr, curr, prev);
1145
1146 tmp = prev, prev = curr, curr = tmp;
1147
1148 status = acpi_get_parent(handle, &pr_ahandle);
1149 }
1150
1151 pr->power.count = flat_state_cnt;
1152 /* reset the index after flattening */
1153 for (i = 0; i < pr->power.count; i++)
1154 pr->power.lpi_states[i].index = i;
1155
1156 /* Tell driver that _LPI is supported. */
1157 pr->flags.has_lpi = 1;
1158 pr->flags.power = 1;
1159
1160 return 0;
1161}
1162
1163int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1164{
1165 return -ENODEV;
1166}
1167
1168/**
1169 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1170 * @dev: the target CPU
1171 * @drv: cpuidle driver containing cpuidle state info
1172 * @index: index of target state
1173 *
1174 * Return: 0 for success or negative value for error
1175 */
1176static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1177 struct cpuidle_driver *drv, int index)
1178{
1179 struct acpi_processor *pr;
1180 struct acpi_lpi_state *lpi;
1181
1182 pr = __this_cpu_read(processors);
1183
1184 if (unlikely(!pr))
1185 return -EINVAL;
1186
1187 lpi = &pr->power.lpi_states[index];
1188 if (lpi->entry_method == ACPI_CSTATE_FFH)
1189 return acpi_processor_ffh_lpi_enter(lpi);
1190
1191 return -EINVAL;
1192}
1193
1194static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1195{
1196 int i;
1197 struct acpi_lpi_state *lpi;
1198 struct cpuidle_state *state;
1199 struct cpuidle_driver *drv = &acpi_idle_driver;
1200
1201 if (!pr->flags.has_lpi)
1202 return -EOPNOTSUPP;
1203
1204 for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1205 lpi = &pr->power.lpi_states[i];
1206
1207 state = &drv->states[i];
1208 snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1209 strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1210 state->exit_latency = lpi->wake_latency;
1211 state->target_residency = lpi->min_residency;
1212 state->flags |= arch_get_idle_state_flags(lpi->arch_flags);
1213 if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH)
1214 state->flags |= CPUIDLE_FLAG_RCU_IDLE;
1215 state->enter = acpi_idle_lpi_enter;
1216 drv->safe_state_index = i;
1217 }
1218
1219 drv->state_count = i;
1220
1221 return 0;
1222}
1223
1224/**
1225 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1226 * global state data i.e. idle routines
1227 *
1228 * @pr: the ACPI processor
1229 */
1230static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1231{
1232 int i;
1233 struct cpuidle_driver *drv = &acpi_idle_driver;
1234
1235 if (!pr->flags.power_setup_done || !pr->flags.power)
1236 return -EINVAL;
1237
1238 drv->safe_state_index = -1;
1239 for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1240 drv->states[i].name[0] = '\0';
1241 drv->states[i].desc[0] = '\0';
1242 }
1243
1244 if (pr->flags.has_lpi)
1245 return acpi_processor_setup_lpi_states(pr);
1246
1247 return acpi_processor_setup_cstates(pr);
1248}
1249
1250/**
1251 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1252 * device i.e. per-cpu data
1253 *
1254 * @pr: the ACPI processor
1255 * @dev : the cpuidle device
1256 */
1257static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1258 struct cpuidle_device *dev)
1259{
1260 if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1261 return -EINVAL;
1262
1263 dev->cpu = pr->id;
1264 if (pr->flags.has_lpi)
1265 return acpi_processor_ffh_lpi_probe(pr->id);
1266
1267 return acpi_processor_setup_cpuidle_cx(pr, dev);
1268}
1269
1270static int acpi_processor_get_power_info(struct acpi_processor *pr)
1271{
1272 int ret;
1273
1274 ret = acpi_processor_get_lpi_info(pr);
1275 if (ret)
1276 ret = acpi_processor_get_cstate_info(pr);
1277
1278 return ret;
1279}
1280
1281int acpi_processor_hotplug(struct acpi_processor *pr)
1282{
1283 int ret = 0;
1284 struct cpuidle_device *dev;
1285
1286 if (disabled_by_idle_boot_param())
1287 return 0;
1288
1289 if (!pr->flags.power_setup_done)
1290 return -ENODEV;
1291
1292 dev = per_cpu(acpi_cpuidle_device, pr->id);
1293 cpuidle_pause_and_lock();
1294 cpuidle_disable_device(dev);
1295 ret = acpi_processor_get_power_info(pr);
1296 if (!ret && pr->flags.power) {
1297 acpi_processor_setup_cpuidle_dev(pr, dev);
1298 ret = cpuidle_enable_device(dev);
1299 }
1300 cpuidle_resume_and_unlock();
1301
1302 return ret;
1303}
1304
1305int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1306{
1307 int cpu;
1308 struct acpi_processor *_pr;
1309 struct cpuidle_device *dev;
1310
1311 if (disabled_by_idle_boot_param())
1312 return 0;
1313
1314 if (!pr->flags.power_setup_done)
1315 return -ENODEV;
1316
1317 /*
1318 * FIXME: Design the ACPI notification to make it once per
1319 * system instead of once per-cpu. This condition is a hack
1320 * to make the code that updates C-States be called once.
1321 */
1322
1323 if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1324
1325 /* Protect against cpu-hotplug */
1326 cpus_read_lock();
1327 cpuidle_pause_and_lock();
1328
1329 /* Disable all cpuidle devices */
1330 for_each_online_cpu(cpu) {
1331 _pr = per_cpu(processors, cpu);
1332 if (!_pr || !_pr->flags.power_setup_done)
1333 continue;
1334 dev = per_cpu(acpi_cpuidle_device, cpu);
1335 cpuidle_disable_device(dev);
1336 }
1337
1338 /* Populate Updated C-state information */
1339 acpi_processor_get_power_info(pr);
1340 acpi_processor_setup_cpuidle_states(pr);
1341
1342 /* Enable all cpuidle devices */
1343 for_each_online_cpu(cpu) {
1344 _pr = per_cpu(processors, cpu);
1345 if (!_pr || !_pr->flags.power_setup_done)
1346 continue;
1347 acpi_processor_get_power_info(_pr);
1348 if (_pr->flags.power) {
1349 dev = per_cpu(acpi_cpuidle_device, cpu);
1350 acpi_processor_setup_cpuidle_dev(_pr, dev);
1351 cpuidle_enable_device(dev);
1352 }
1353 }
1354 cpuidle_resume_and_unlock();
1355 cpus_read_unlock();
1356 }
1357
1358 return 0;
1359}
1360
1361static int acpi_processor_registered;
1362
1363int acpi_processor_power_init(struct acpi_processor *pr)
1364{
1365 int retval;
1366 struct cpuidle_device *dev;
1367
1368 if (disabled_by_idle_boot_param())
1369 return 0;
1370
1371 acpi_processor_cstate_first_run_checks();
1372
1373 if (!acpi_processor_get_power_info(pr))
1374 pr->flags.power_setup_done = 1;
1375
1376 /*
1377 * Install the idle handler if processor power management is supported.
1378 * Note that we use previously set idle handler will be used on
1379 * platforms that only support C1.
1380 */
1381 if (pr->flags.power) {
1382 /* Register acpi_idle_driver if not already registered */
1383 if (!acpi_processor_registered) {
1384 acpi_processor_setup_cpuidle_states(pr);
1385 retval = cpuidle_register_driver(&acpi_idle_driver);
1386 if (retval)
1387 return retval;
1388 pr_debug("%s registered with cpuidle\n",
1389 acpi_idle_driver.name);
1390 }
1391
1392 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1393 if (!dev)
1394 return -ENOMEM;
1395 per_cpu(acpi_cpuidle_device, pr->id) = dev;
1396
1397 acpi_processor_setup_cpuidle_dev(pr, dev);
1398
1399 /* Register per-cpu cpuidle_device. Cpuidle driver
1400 * must already be registered before registering device
1401 */
1402 retval = cpuidle_register_device(dev);
1403 if (retval) {
1404 if (acpi_processor_registered == 0)
1405 cpuidle_unregister_driver(&acpi_idle_driver);
1406 return retval;
1407 }
1408 acpi_processor_registered++;
1409 }
1410 return 0;
1411}
1412
1413int acpi_processor_power_exit(struct acpi_processor *pr)
1414{
1415 struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1416
1417 if (disabled_by_idle_boot_param())
1418 return 0;
1419
1420 if (pr->flags.power) {
1421 cpuidle_unregister_device(dev);
1422 acpi_processor_registered--;
1423 if (acpi_processor_registered == 0)
1424 cpuidle_unregister_driver(&acpi_idle_driver);
1425
1426 kfree(dev);
1427 }
1428
1429 pr->flags.power_setup_done = 0;
1430 return 0;
1431}
1/*
2 * processor_idle - idle state submodule to the ACPI processor driver
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
11 *
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
13 *
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
18 *
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
23 *
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
27 *
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
29 */
30
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/cpufreq.h>
35#include <linux/slab.h>
36#include <linux/acpi.h>
37#include <linux/dmi.h>
38#include <linux/moduleparam.h>
39#include <linux/sched.h> /* need_resched() */
40#include <linux/pm_qos_params.h>
41#include <linux/clockchips.h>
42#include <linux/cpuidle.h>
43#include <linux/irqflags.h>
44
45/*
46 * Include the apic definitions for x86 to have the APIC timer related defines
47 * available also for UP (on SMP it gets magically included via linux/smp.h).
48 * asm/acpi.h is not an option, as it would require more include magic. Also
49 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
50 */
51#ifdef CONFIG_X86
52#include <asm/apic.h>
53#endif
54
55#include <asm/io.h>
56#include <asm/uaccess.h>
57
58#include <acpi/acpi_bus.h>
59#include <acpi/processor.h>
60#include <asm/processor.h>
61
62#define PREFIX "ACPI: "
63
64#define ACPI_PROCESSOR_CLASS "processor"
65#define _COMPONENT ACPI_PROCESSOR_COMPONENT
66ACPI_MODULE_NAME("processor_idle");
67#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
68#define C2_OVERHEAD 1 /* 1us */
69#define C3_OVERHEAD 1 /* 1us */
70#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
71
72static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
73module_param(max_cstate, uint, 0000);
74static unsigned int nocst __read_mostly;
75module_param(nocst, uint, 0000);
76static int bm_check_disable __read_mostly;
77module_param(bm_check_disable, uint, 0000);
78
79static unsigned int latency_factor __read_mostly = 2;
80module_param(latency_factor, uint, 0644);
81
82static int disabled_by_idle_boot_param(void)
83{
84 return boot_option_idle_override == IDLE_POLL ||
85 boot_option_idle_override == IDLE_FORCE_MWAIT ||
86 boot_option_idle_override == IDLE_HALT;
87}
88
89/*
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
92 *
93 * To skip this limit, boot/load with a large max_cstate limit.
94 */
95static int set_max_cstate(const struct dmi_system_id *id)
96{
97 if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
98 return 0;
99
100 printk(KERN_NOTICE PREFIX "%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id->ident,
102 (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
103
104 max_cstate = (long)id->driver_data;
105
106 return 0;
107}
108
109/* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111static struct dmi_system_id __cpuinitdata processor_power_dmi_table[] = {
112 { set_max_cstate, "Clevo 5600D", {
113 DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
114 DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
115 (void *)2},
116 { set_max_cstate, "Pavilion zv5000", {
117 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
118 DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
119 (void *)1},
120 { set_max_cstate, "Asus L8400B", {
121 DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
122 DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
123 (void *)1},
124 {},
125};
126
127
128/*
129 * Callers should disable interrupts before the call and enable
130 * interrupts after return.
131 */
132static void acpi_safe_halt(void)
133{
134 current_thread_info()->status &= ~TS_POLLING;
135 /*
136 * TS_POLLING-cleared state must be visible before we
137 * test NEED_RESCHED:
138 */
139 smp_mb();
140 if (!need_resched()) {
141 safe_halt();
142 local_irq_disable();
143 }
144 current_thread_info()->status |= TS_POLLING;
145}
146
147#ifdef ARCH_APICTIMER_STOPS_ON_C3
148
149/*
150 * Some BIOS implementations switch to C3 in the published C2 state.
151 * This seems to be a common problem on AMD boxen, but other vendors
152 * are affected too. We pick the most conservative approach: we assume
153 * that the local APIC stops in both C2 and C3.
154 */
155static void lapic_timer_check_state(int state, struct acpi_processor *pr,
156 struct acpi_processor_cx *cx)
157{
158 struct acpi_processor_power *pwr = &pr->power;
159 u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
160
161 if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
162 return;
163
164 if (amd_e400_c1e_detected)
165 type = ACPI_STATE_C1;
166
167 /*
168 * Check, if one of the previous states already marked the lapic
169 * unstable
170 */
171 if (pwr->timer_broadcast_on_state < state)
172 return;
173
174 if (cx->type >= type)
175 pr->power.timer_broadcast_on_state = state;
176}
177
178static void __lapic_timer_propagate_broadcast(void *arg)
179{
180 struct acpi_processor *pr = (struct acpi_processor *) arg;
181 unsigned long reason;
182
183 reason = pr->power.timer_broadcast_on_state < INT_MAX ?
184 CLOCK_EVT_NOTIFY_BROADCAST_ON : CLOCK_EVT_NOTIFY_BROADCAST_OFF;
185
186 clockevents_notify(reason, &pr->id);
187}
188
189static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
190{
191 smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
192 (void *)pr, 1);
193}
194
195/* Power(C) State timer broadcast control */
196static void lapic_timer_state_broadcast(struct acpi_processor *pr,
197 struct acpi_processor_cx *cx,
198 int broadcast)
199{
200 int state = cx - pr->power.states;
201
202 if (state >= pr->power.timer_broadcast_on_state) {
203 unsigned long reason;
204
205 reason = broadcast ? CLOCK_EVT_NOTIFY_BROADCAST_ENTER :
206 CLOCK_EVT_NOTIFY_BROADCAST_EXIT;
207 clockevents_notify(reason, &pr->id);
208 }
209}
210
211#else
212
213static void lapic_timer_check_state(int state, struct acpi_processor *pr,
214 struct acpi_processor_cx *cstate) { }
215static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
216static void lapic_timer_state_broadcast(struct acpi_processor *pr,
217 struct acpi_processor_cx *cx,
218 int broadcast)
219{
220}
221
222#endif
223
224/*
225 * Suspend / resume control
226 */
227static int acpi_idle_suspend;
228static u32 saved_bm_rld;
229
230static void acpi_idle_bm_rld_save(void)
231{
232 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &saved_bm_rld);
233}
234static void acpi_idle_bm_rld_restore(void)
235{
236 u32 resumed_bm_rld;
237
238 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_RLD, &resumed_bm_rld);
239
240 if (resumed_bm_rld != saved_bm_rld)
241 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, saved_bm_rld);
242}
243
244int acpi_processor_suspend(struct acpi_device * device, pm_message_t state)
245{
246 if (acpi_idle_suspend == 1)
247 return 0;
248
249 acpi_idle_bm_rld_save();
250 acpi_idle_suspend = 1;
251 return 0;
252}
253
254int acpi_processor_resume(struct acpi_device * device)
255{
256 if (acpi_idle_suspend == 0)
257 return 0;
258
259 acpi_idle_bm_rld_restore();
260 acpi_idle_suspend = 0;
261 return 0;
262}
263
264#if defined(CONFIG_X86)
265static void tsc_check_state(int state)
266{
267 switch (boot_cpu_data.x86_vendor) {
268 case X86_VENDOR_AMD:
269 case X86_VENDOR_INTEL:
270 /*
271 * AMD Fam10h TSC will tick in all
272 * C/P/S0/S1 states when this bit is set.
273 */
274 if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
275 return;
276
277 /*FALL THROUGH*/
278 default:
279 /* TSC could halt in idle, so notify users */
280 if (state > ACPI_STATE_C1)
281 mark_tsc_unstable("TSC halts in idle");
282 }
283}
284#else
285static void tsc_check_state(int state) { return; }
286#endif
287
288static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
289{
290
291 if (!pr)
292 return -EINVAL;
293
294 if (!pr->pblk)
295 return -ENODEV;
296
297 /* if info is obtained from pblk/fadt, type equals state */
298 pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
299 pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
300
301#ifndef CONFIG_HOTPLUG_CPU
302 /*
303 * Check for P_LVL2_UP flag before entering C2 and above on
304 * an SMP system.
305 */
306 if ((num_online_cpus() > 1) &&
307 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
308 return -ENODEV;
309#endif
310
311 /* determine C2 and C3 address from pblk */
312 pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
313 pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
314
315 /* determine latencies from FADT */
316 pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.C2latency;
317 pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.C3latency;
318
319 /*
320 * FADT specified C2 latency must be less than or equal to
321 * 100 microseconds.
322 */
323 if (acpi_gbl_FADT.C2latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
324 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
325 "C2 latency too large [%d]\n", acpi_gbl_FADT.C2latency));
326 /* invalidate C2 */
327 pr->power.states[ACPI_STATE_C2].address = 0;
328 }
329
330 /*
331 * FADT supplied C3 latency must be less than or equal to
332 * 1000 microseconds.
333 */
334 if (acpi_gbl_FADT.C3latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
335 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
336 "C3 latency too large [%d]\n", acpi_gbl_FADT.C3latency));
337 /* invalidate C3 */
338 pr->power.states[ACPI_STATE_C3].address = 0;
339 }
340
341 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
342 "lvl2[0x%08x] lvl3[0x%08x]\n",
343 pr->power.states[ACPI_STATE_C2].address,
344 pr->power.states[ACPI_STATE_C3].address));
345
346 return 0;
347}
348
349static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
350{
351 if (!pr->power.states[ACPI_STATE_C1].valid) {
352 /* set the first C-State to C1 */
353 /* all processors need to support C1 */
354 pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
355 pr->power.states[ACPI_STATE_C1].valid = 1;
356 pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
357 }
358 /* the C0 state only exists as a filler in our array */
359 pr->power.states[ACPI_STATE_C0].valid = 1;
360 return 0;
361}
362
363static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
364{
365 acpi_status status = 0;
366 u64 count;
367 int current_count;
368 int i;
369 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
370 union acpi_object *cst;
371
372
373 if (nocst)
374 return -ENODEV;
375
376 current_count = 0;
377
378 status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
379 if (ACPI_FAILURE(status)) {
380 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
381 return -ENODEV;
382 }
383
384 cst = buffer.pointer;
385
386 /* There must be at least 2 elements */
387 if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
388 printk(KERN_ERR PREFIX "not enough elements in _CST\n");
389 status = -EFAULT;
390 goto end;
391 }
392
393 count = cst->package.elements[0].integer.value;
394
395 /* Validate number of power states. */
396 if (count < 1 || count != cst->package.count - 1) {
397 printk(KERN_ERR PREFIX "count given by _CST is not valid\n");
398 status = -EFAULT;
399 goto end;
400 }
401
402 /* Tell driver that at least _CST is supported. */
403 pr->flags.has_cst = 1;
404
405 for (i = 1; i <= count; i++) {
406 union acpi_object *element;
407 union acpi_object *obj;
408 struct acpi_power_register *reg;
409 struct acpi_processor_cx cx;
410
411 memset(&cx, 0, sizeof(cx));
412
413 element = &(cst->package.elements[i]);
414 if (element->type != ACPI_TYPE_PACKAGE)
415 continue;
416
417 if (element->package.count != 4)
418 continue;
419
420 obj = &(element->package.elements[0]);
421
422 if (obj->type != ACPI_TYPE_BUFFER)
423 continue;
424
425 reg = (struct acpi_power_register *)obj->buffer.pointer;
426
427 if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
428 (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
429 continue;
430
431 /* There should be an easy way to extract an integer... */
432 obj = &(element->package.elements[1]);
433 if (obj->type != ACPI_TYPE_INTEGER)
434 continue;
435
436 cx.type = obj->integer.value;
437 /*
438 * Some buggy BIOSes won't list C1 in _CST -
439 * Let acpi_processor_get_power_info_default() handle them later
440 */
441 if (i == 1 && cx.type != ACPI_STATE_C1)
442 current_count++;
443
444 cx.address = reg->address;
445 cx.index = current_count + 1;
446
447 cx.entry_method = ACPI_CSTATE_SYSTEMIO;
448 if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
449 if (acpi_processor_ffh_cstate_probe
450 (pr->id, &cx, reg) == 0) {
451 cx.entry_method = ACPI_CSTATE_FFH;
452 } else if (cx.type == ACPI_STATE_C1) {
453 /*
454 * C1 is a special case where FIXED_HARDWARE
455 * can be handled in non-MWAIT way as well.
456 * In that case, save this _CST entry info.
457 * Otherwise, ignore this info and continue.
458 */
459 cx.entry_method = ACPI_CSTATE_HALT;
460 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
461 } else {
462 continue;
463 }
464 if (cx.type == ACPI_STATE_C1 &&
465 (boot_option_idle_override == IDLE_NOMWAIT)) {
466 /*
467 * In most cases the C1 space_id obtained from
468 * _CST object is FIXED_HARDWARE access mode.
469 * But when the option of idle=halt is added,
470 * the entry_method type should be changed from
471 * CSTATE_FFH to CSTATE_HALT.
472 * When the option of idle=nomwait is added,
473 * the C1 entry_method type should be
474 * CSTATE_HALT.
475 */
476 cx.entry_method = ACPI_CSTATE_HALT;
477 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
478 }
479 } else {
480 snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
481 cx.address);
482 }
483
484 if (cx.type == ACPI_STATE_C1) {
485 cx.valid = 1;
486 }
487
488 obj = &(element->package.elements[2]);
489 if (obj->type != ACPI_TYPE_INTEGER)
490 continue;
491
492 cx.latency = obj->integer.value;
493
494 obj = &(element->package.elements[3]);
495 if (obj->type != ACPI_TYPE_INTEGER)
496 continue;
497
498 cx.power = obj->integer.value;
499
500 current_count++;
501 memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
502
503 /*
504 * We support total ACPI_PROCESSOR_MAX_POWER - 1
505 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
506 */
507 if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
508 printk(KERN_WARNING
509 "Limiting number of power states to max (%d)\n",
510 ACPI_PROCESSOR_MAX_POWER);
511 printk(KERN_WARNING
512 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
513 break;
514 }
515 }
516
517 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
518 current_count));
519
520 /* Validate number of power states discovered */
521 if (current_count < 2)
522 status = -EFAULT;
523
524 end:
525 kfree(buffer.pointer);
526
527 return status;
528}
529
530static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
531 struct acpi_processor_cx *cx)
532{
533 static int bm_check_flag = -1;
534 static int bm_control_flag = -1;
535
536
537 if (!cx->address)
538 return;
539
540 /*
541 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
542 * DMA transfers are used by any ISA device to avoid livelock.
543 * Note that we could disable Type-F DMA (as recommended by
544 * the erratum), but this is known to disrupt certain ISA
545 * devices thus we take the conservative approach.
546 */
547 else if (errata.piix4.fdma) {
548 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
549 "C3 not supported on PIIX4 with Type-F DMA\n"));
550 return;
551 }
552
553 /* All the logic here assumes flags.bm_check is same across all CPUs */
554 if (bm_check_flag == -1) {
555 /* Determine whether bm_check is needed based on CPU */
556 acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
557 bm_check_flag = pr->flags.bm_check;
558 bm_control_flag = pr->flags.bm_control;
559 } else {
560 pr->flags.bm_check = bm_check_flag;
561 pr->flags.bm_control = bm_control_flag;
562 }
563
564 if (pr->flags.bm_check) {
565 if (!pr->flags.bm_control) {
566 if (pr->flags.has_cst != 1) {
567 /* bus mastering control is necessary */
568 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
569 "C3 support requires BM control\n"));
570 return;
571 } else {
572 /* Here we enter C3 without bus mastering */
573 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
574 "C3 support without BM control\n"));
575 }
576 }
577 } else {
578 /*
579 * WBINVD should be set in fadt, for C3 state to be
580 * supported on when bm_check is not required.
581 */
582 if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
583 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
584 "Cache invalidation should work properly"
585 " for C3 to be enabled on SMP systems\n"));
586 return;
587 }
588 }
589
590 /*
591 * Otherwise we've met all of our C3 requirements.
592 * Normalize the C3 latency to expidite policy. Enable
593 * checking of bus mastering status (bm_check) so we can
594 * use this in our C3 policy
595 */
596 cx->valid = 1;
597
598 cx->latency_ticks = cx->latency;
599 /*
600 * On older chipsets, BM_RLD needs to be set
601 * in order for Bus Master activity to wake the
602 * system from C3. Newer chipsets handle DMA
603 * during C3 automatically and BM_RLD is a NOP.
604 * In either case, the proper way to
605 * handle BM_RLD is to set it and leave it set.
606 */
607 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
608
609 return;
610}
611
612static int acpi_processor_power_verify(struct acpi_processor *pr)
613{
614 unsigned int i;
615 unsigned int working = 0;
616
617 pr->power.timer_broadcast_on_state = INT_MAX;
618
619 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
620 struct acpi_processor_cx *cx = &pr->power.states[i];
621
622 switch (cx->type) {
623 case ACPI_STATE_C1:
624 cx->valid = 1;
625 break;
626
627 case ACPI_STATE_C2:
628 if (!cx->address)
629 break;
630 cx->valid = 1;
631 cx->latency_ticks = cx->latency; /* Normalize latency */
632 break;
633
634 case ACPI_STATE_C3:
635 acpi_processor_power_verify_c3(pr, cx);
636 break;
637 }
638 if (!cx->valid)
639 continue;
640
641 lapic_timer_check_state(i, pr, cx);
642 tsc_check_state(cx->type);
643 working++;
644 }
645
646 lapic_timer_propagate_broadcast(pr);
647
648 return (working);
649}
650
651static int acpi_processor_get_power_info(struct acpi_processor *pr)
652{
653 unsigned int i;
654 int result;
655
656
657 /* NOTE: the idle thread may not be running while calling
658 * this function */
659
660 /* Zero initialize all the C-states info. */
661 memset(pr->power.states, 0, sizeof(pr->power.states));
662
663 result = acpi_processor_get_power_info_cst(pr);
664 if (result == -ENODEV)
665 result = acpi_processor_get_power_info_fadt(pr);
666
667 if (result)
668 return result;
669
670 acpi_processor_get_power_info_default(pr);
671
672 pr->power.count = acpi_processor_power_verify(pr);
673
674 /*
675 * if one state of type C2 or C3 is available, mark this
676 * CPU as being "idle manageable"
677 */
678 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
679 if (pr->power.states[i].valid) {
680 pr->power.count = i;
681 if (pr->power.states[i].type >= ACPI_STATE_C2)
682 pr->flags.power = 1;
683 }
684 }
685
686 return 0;
687}
688
689/**
690 * acpi_idle_bm_check - checks if bus master activity was detected
691 */
692static int acpi_idle_bm_check(void)
693{
694 u32 bm_status = 0;
695
696 if (bm_check_disable)
697 return 0;
698
699 acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
700 if (bm_status)
701 acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
702 /*
703 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
704 * the true state of bus mastering activity; forcing us to
705 * manually check the BMIDEA bit of each IDE channel.
706 */
707 else if (errata.piix4.bmisx) {
708 if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
709 || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
710 bm_status = 1;
711 }
712 return bm_status;
713}
714
715/**
716 * acpi_idle_do_entry - a helper function that does C2 and C3 type entry
717 * @cx: cstate data
718 *
719 * Caller disables interrupt before call and enables interrupt after return.
720 */
721static inline void acpi_idle_do_entry(struct acpi_processor_cx *cx)
722{
723 /* Don't trace irqs off for idle */
724 stop_critical_timings();
725 if (cx->entry_method == ACPI_CSTATE_FFH) {
726 /* Call into architectural FFH based C-state */
727 acpi_processor_ffh_cstate_enter(cx);
728 } else if (cx->entry_method == ACPI_CSTATE_HALT) {
729 acpi_safe_halt();
730 } else {
731 /* IO port based C-state */
732 inb(cx->address);
733 /* Dummy wait op - must do something useless after P_LVL2 read
734 because chipsets cannot guarantee that STPCLK# signal
735 gets asserted in time to freeze execution properly. */
736 inl(acpi_gbl_FADT.xpm_timer_block.address);
737 }
738 start_critical_timings();
739}
740
741/**
742 * acpi_idle_enter_c1 - enters an ACPI C1 state-type
743 * @dev: the target CPU
744 * @state: the state data
745 *
746 * This is equivalent to the HALT instruction.
747 */
748static int acpi_idle_enter_c1(struct cpuidle_device *dev,
749 struct cpuidle_state *state)
750{
751 ktime_t kt1, kt2;
752 s64 idle_time;
753 struct acpi_processor *pr;
754 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
755
756 pr = __this_cpu_read(processors);
757
758 if (unlikely(!pr))
759 return 0;
760
761 local_irq_disable();
762
763 /* Do not access any ACPI IO ports in suspend path */
764 if (acpi_idle_suspend) {
765 local_irq_enable();
766 cpu_relax();
767 return 0;
768 }
769
770 lapic_timer_state_broadcast(pr, cx, 1);
771 kt1 = ktime_get_real();
772 acpi_idle_do_entry(cx);
773 kt2 = ktime_get_real();
774 idle_time = ktime_to_us(ktime_sub(kt2, kt1));
775
776 local_irq_enable();
777 cx->usage++;
778 lapic_timer_state_broadcast(pr, cx, 0);
779
780 return idle_time;
781}
782
783/**
784 * acpi_idle_enter_simple - enters an ACPI state without BM handling
785 * @dev: the target CPU
786 * @state: the state data
787 */
788static int acpi_idle_enter_simple(struct cpuidle_device *dev,
789 struct cpuidle_state *state)
790{
791 struct acpi_processor *pr;
792 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
793 ktime_t kt1, kt2;
794 s64 idle_time_ns;
795 s64 idle_time;
796
797 pr = __this_cpu_read(processors);
798
799 if (unlikely(!pr))
800 return 0;
801
802 if (acpi_idle_suspend)
803 return(acpi_idle_enter_c1(dev, state));
804
805 local_irq_disable();
806
807 if (cx->entry_method != ACPI_CSTATE_FFH) {
808 current_thread_info()->status &= ~TS_POLLING;
809 /*
810 * TS_POLLING-cleared state must be visible before we test
811 * NEED_RESCHED:
812 */
813 smp_mb();
814
815 if (unlikely(need_resched())) {
816 current_thread_info()->status |= TS_POLLING;
817 local_irq_enable();
818 return 0;
819 }
820 }
821
822 /*
823 * Must be done before busmaster disable as we might need to
824 * access HPET !
825 */
826 lapic_timer_state_broadcast(pr, cx, 1);
827
828 if (cx->type == ACPI_STATE_C3)
829 ACPI_FLUSH_CPU_CACHE();
830
831 kt1 = ktime_get_real();
832 /* Tell the scheduler that we are going deep-idle: */
833 sched_clock_idle_sleep_event();
834 acpi_idle_do_entry(cx);
835 kt2 = ktime_get_real();
836 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
837 idle_time = idle_time_ns;
838 do_div(idle_time, NSEC_PER_USEC);
839
840 /* Tell the scheduler how much we idled: */
841 sched_clock_idle_wakeup_event(idle_time_ns);
842
843 local_irq_enable();
844 if (cx->entry_method != ACPI_CSTATE_FFH)
845 current_thread_info()->status |= TS_POLLING;
846
847 cx->usage++;
848
849 lapic_timer_state_broadcast(pr, cx, 0);
850 cx->time += idle_time;
851 return idle_time;
852}
853
854static int c3_cpu_count;
855static DEFINE_SPINLOCK(c3_lock);
856
857/**
858 * acpi_idle_enter_bm - enters C3 with proper BM handling
859 * @dev: the target CPU
860 * @state: the state data
861 *
862 * If BM is detected, the deepest non-C3 idle state is entered instead.
863 */
864static int acpi_idle_enter_bm(struct cpuidle_device *dev,
865 struct cpuidle_state *state)
866{
867 struct acpi_processor *pr;
868 struct acpi_processor_cx *cx = cpuidle_get_statedata(state);
869 ktime_t kt1, kt2;
870 s64 idle_time_ns;
871 s64 idle_time;
872
873
874 pr = __this_cpu_read(processors);
875
876 if (unlikely(!pr))
877 return 0;
878
879 if (acpi_idle_suspend)
880 return(acpi_idle_enter_c1(dev, state));
881
882 if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
883 if (dev->safe_state) {
884 dev->last_state = dev->safe_state;
885 return dev->safe_state->enter(dev, dev->safe_state);
886 } else {
887 local_irq_disable();
888 acpi_safe_halt();
889 local_irq_enable();
890 return 0;
891 }
892 }
893
894 local_irq_disable();
895
896 if (cx->entry_method != ACPI_CSTATE_FFH) {
897 current_thread_info()->status &= ~TS_POLLING;
898 /*
899 * TS_POLLING-cleared state must be visible before we test
900 * NEED_RESCHED:
901 */
902 smp_mb();
903
904 if (unlikely(need_resched())) {
905 current_thread_info()->status |= TS_POLLING;
906 local_irq_enable();
907 return 0;
908 }
909 }
910
911 acpi_unlazy_tlb(smp_processor_id());
912
913 /* Tell the scheduler that we are going deep-idle: */
914 sched_clock_idle_sleep_event();
915 /*
916 * Must be done before busmaster disable as we might need to
917 * access HPET !
918 */
919 lapic_timer_state_broadcast(pr, cx, 1);
920
921 kt1 = ktime_get_real();
922 /*
923 * disable bus master
924 * bm_check implies we need ARB_DIS
925 * !bm_check implies we need cache flush
926 * bm_control implies whether we can do ARB_DIS
927 *
928 * That leaves a case where bm_check is set and bm_control is
929 * not set. In that case we cannot do much, we enter C3
930 * without doing anything.
931 */
932 if (pr->flags.bm_check && pr->flags.bm_control) {
933 spin_lock(&c3_lock);
934 c3_cpu_count++;
935 /* Disable bus master arbitration when all CPUs are in C3 */
936 if (c3_cpu_count == num_online_cpus())
937 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
938 spin_unlock(&c3_lock);
939 } else if (!pr->flags.bm_check) {
940 ACPI_FLUSH_CPU_CACHE();
941 }
942
943 acpi_idle_do_entry(cx);
944
945 /* Re-enable bus master arbitration */
946 if (pr->flags.bm_check && pr->flags.bm_control) {
947 spin_lock(&c3_lock);
948 acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
949 c3_cpu_count--;
950 spin_unlock(&c3_lock);
951 }
952 kt2 = ktime_get_real();
953 idle_time_ns = ktime_to_ns(ktime_sub(kt2, kt1));
954 idle_time = idle_time_ns;
955 do_div(idle_time, NSEC_PER_USEC);
956
957 /* Tell the scheduler how much we idled: */
958 sched_clock_idle_wakeup_event(idle_time_ns);
959
960 local_irq_enable();
961 if (cx->entry_method != ACPI_CSTATE_FFH)
962 current_thread_info()->status |= TS_POLLING;
963
964 cx->usage++;
965
966 lapic_timer_state_broadcast(pr, cx, 0);
967 cx->time += idle_time;
968 return idle_time;
969}
970
971struct cpuidle_driver acpi_idle_driver = {
972 .name = "acpi_idle",
973 .owner = THIS_MODULE,
974};
975
976/**
977 * acpi_processor_setup_cpuidle - prepares and configures CPUIDLE
978 * @pr: the ACPI processor
979 */
980static int acpi_processor_setup_cpuidle(struct acpi_processor *pr)
981{
982 int i, count = CPUIDLE_DRIVER_STATE_START;
983 struct acpi_processor_cx *cx;
984 struct cpuidle_state *state;
985 struct cpuidle_device *dev = &pr->power.dev;
986
987 if (!pr->flags.power_setup_done)
988 return -EINVAL;
989
990 if (pr->flags.power == 0) {
991 return -EINVAL;
992 }
993
994 dev->cpu = pr->id;
995 for (i = 0; i < CPUIDLE_STATE_MAX; i++) {
996 dev->states[i].name[0] = '\0';
997 dev->states[i].desc[0] = '\0';
998 }
999
1000 if (max_cstate == 0)
1001 max_cstate = 1;
1002
1003 for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
1004 cx = &pr->power.states[i];
1005 state = &dev->states[count];
1006
1007 if (!cx->valid)
1008 continue;
1009
1010#ifdef CONFIG_HOTPLUG_CPU
1011 if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
1012 !pr->flags.has_cst &&
1013 !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
1014 continue;
1015#endif
1016 cpuidle_set_statedata(state, cx);
1017
1018 snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
1019 strncpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
1020 state->exit_latency = cx->latency;
1021 state->target_residency = cx->latency * latency_factor;
1022
1023 state->flags = 0;
1024 switch (cx->type) {
1025 case ACPI_STATE_C1:
1026 if (cx->entry_method == ACPI_CSTATE_FFH)
1027 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1028
1029 state->enter = acpi_idle_enter_c1;
1030 dev->safe_state = state;
1031 break;
1032
1033 case ACPI_STATE_C2:
1034 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1035 state->enter = acpi_idle_enter_simple;
1036 dev->safe_state = state;
1037 break;
1038
1039 case ACPI_STATE_C3:
1040 state->flags |= CPUIDLE_FLAG_TIME_VALID;
1041 state->enter = pr->flags.bm_check ?
1042 acpi_idle_enter_bm :
1043 acpi_idle_enter_simple;
1044 break;
1045 }
1046
1047 count++;
1048 if (count == CPUIDLE_STATE_MAX)
1049 break;
1050 }
1051
1052 dev->state_count = count;
1053
1054 if (!count)
1055 return -EINVAL;
1056
1057 return 0;
1058}
1059
1060int acpi_processor_cst_has_changed(struct acpi_processor *pr)
1061{
1062 int ret = 0;
1063
1064 if (disabled_by_idle_boot_param())
1065 return 0;
1066
1067 if (!pr)
1068 return -EINVAL;
1069
1070 if (nocst) {
1071 return -ENODEV;
1072 }
1073
1074 if (!pr->flags.power_setup_done)
1075 return -ENODEV;
1076
1077 cpuidle_pause_and_lock();
1078 cpuidle_disable_device(&pr->power.dev);
1079 acpi_processor_get_power_info(pr);
1080 if (pr->flags.power) {
1081 acpi_processor_setup_cpuidle(pr);
1082 ret = cpuidle_enable_device(&pr->power.dev);
1083 }
1084 cpuidle_resume_and_unlock();
1085
1086 return ret;
1087}
1088
1089int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
1090 struct acpi_device *device)
1091{
1092 acpi_status status = 0;
1093 static int first_run;
1094
1095 if (disabled_by_idle_boot_param())
1096 return 0;
1097
1098 if (!first_run) {
1099 dmi_check_system(processor_power_dmi_table);
1100 max_cstate = acpi_processor_cstate_check(max_cstate);
1101 if (max_cstate < ACPI_C_STATES_MAX)
1102 printk(KERN_NOTICE
1103 "ACPI: processor limited to max C-state %d\n",
1104 max_cstate);
1105 first_run++;
1106 }
1107
1108 if (!pr)
1109 return -EINVAL;
1110
1111 if (acpi_gbl_FADT.cst_control && !nocst) {
1112 status =
1113 acpi_os_write_port(acpi_gbl_FADT.smi_command, acpi_gbl_FADT.cst_control, 8);
1114 if (ACPI_FAILURE(status)) {
1115 ACPI_EXCEPTION((AE_INFO, status,
1116 "Notifying BIOS of _CST ability failed"));
1117 }
1118 }
1119
1120 acpi_processor_get_power_info(pr);
1121 pr->flags.power_setup_done = 1;
1122
1123 /*
1124 * Install the idle handler if processor power management is supported.
1125 * Note that we use previously set idle handler will be used on
1126 * platforms that only support C1.
1127 */
1128 if (pr->flags.power) {
1129 acpi_processor_setup_cpuidle(pr);
1130 if (cpuidle_register_device(&pr->power.dev))
1131 return -EIO;
1132 }
1133 return 0;
1134}
1135
1136int acpi_processor_power_exit(struct acpi_processor *pr,
1137 struct acpi_device *device)
1138{
1139 if (disabled_by_idle_boot_param())
1140 return 0;
1141
1142 cpuidle_unregister_device(&pr->power.dev);
1143 pr->flags.power_setup_done = 0;
1144
1145 return 0;
1146}