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v6.13.7
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * processor_idle - idle state submodule to the ACPI processor driver
   4 *
   5 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   6 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   7 *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
   8 *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
   9 *  			- Added processor hotplug support
  10 *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  11 *  			- Added support for C3 on SMP
  12 */
  13#define pr_fmt(fmt) "ACPI: " fmt
  14
  15#include <linux/module.h>
  16#include <linux/acpi.h>
  17#include <linux/dmi.h>
  18#include <linux/sched.h>       /* need_resched() */
  19#include <linux/tick.h>
  20#include <linux/cpuidle.h>
  21#include <linux/cpu.h>
  22#include <linux/minmax.h>
  23#include <linux/perf_event.h>
  24#include <acpi/processor.h>
  25#include <linux/context_tracking.h>
  26
  27/*
  28 * Include the apic definitions for x86 to have the APIC timer related defines
  29 * available also for UP (on SMP it gets magically included via linux/smp.h).
  30 * asm/acpi.h is not an option, as it would require more include magic. Also
  31 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  32 */
  33#ifdef CONFIG_X86
  34#include <asm/apic.h>
  35#include <asm/cpu.h>
  36#endif
  37
 
 
 
 
  38#define ACPI_IDLE_STATE_START	(IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
  39
  40static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  41module_param(max_cstate, uint, 0400);
  42static bool nocst __read_mostly;
  43module_param(nocst, bool, 0400);
  44static bool bm_check_disable __read_mostly;
  45module_param(bm_check_disable, bool, 0400);
  46
  47static unsigned int latency_factor __read_mostly = 2;
  48module_param(latency_factor, uint, 0644);
  49
  50static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
  51
  52struct cpuidle_driver acpi_idle_driver = {
  53	.name =		"acpi_idle",
  54	.owner =	THIS_MODULE,
  55};
  56
  57#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
  58static
  59DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
  60
  61static int disabled_by_idle_boot_param(void)
  62{
  63	return boot_option_idle_override == IDLE_POLL ||
  64		boot_option_idle_override == IDLE_HALT;
  65}
  66
  67/*
  68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  69 * For now disable this. Probably a bug somewhere else.
  70 *
  71 * To skip this limit, boot/load with a large max_cstate limit.
  72 */
  73static int set_max_cstate(const struct dmi_system_id *id)
  74{
  75	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  76		return 0;
  77
  78	pr_notice("%s detected - limiting to C%ld max_cstate."
  79		  " Override with \"processor.max_cstate=%d\"\n", id->ident,
  80		  (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  81
  82	max_cstate = (long)id->driver_data;
  83
  84	return 0;
  85}
  86
  87static const struct dmi_system_id processor_power_dmi_table[] = {
  88	{ set_max_cstate, "Clevo 5600D", {
  89	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  90	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  91	 (void *)2},
  92	{ set_max_cstate, "Pavilion zv5000", {
  93	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  94	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
  95	 (void *)1},
  96	{ set_max_cstate, "Asus L8400B", {
  97	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  98	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
  99	 (void *)1},
 100	{},
 101};
 102
 103
 104/*
 105 * Callers should disable interrupts before the call and enable
 106 * interrupts after return.
 107 */
 108static void __cpuidle acpi_safe_halt(void)
 109{
 110	if (!tif_need_resched()) {
 111		raw_safe_halt();
 112		raw_local_irq_disable();
 113	}
 114}
 115
 116#ifdef ARCH_APICTIMER_STOPS_ON_C3
 117
 118/*
 119 * Some BIOS implementations switch to C3 in the published C2 state.
 120 * This seems to be a common problem on AMD boxen, but other vendors
 121 * are affected too. We pick the most conservative approach: we assume
 122 * that the local APIC stops in both C2 and C3.
 123 */
 124static void lapic_timer_check_state(int state, struct acpi_processor *pr,
 125				   struct acpi_processor_cx *cx)
 126{
 127	struct acpi_processor_power *pwr = &pr->power;
 128	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
 129
 130	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
 131		return;
 132
 133	if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
 134		type = ACPI_STATE_C1;
 135
 136	/*
 137	 * Check, if one of the previous states already marked the lapic
 138	 * unstable
 139	 */
 140	if (pwr->timer_broadcast_on_state < state)
 141		return;
 142
 143	if (cx->type >= type)
 144		pr->power.timer_broadcast_on_state = state;
 145}
 146
 147static void __lapic_timer_propagate_broadcast(void *arg)
 148{
 149	struct acpi_processor *pr = arg;
 150
 151	if (pr->power.timer_broadcast_on_state < INT_MAX)
 152		tick_broadcast_enable();
 153	else
 154		tick_broadcast_disable();
 155}
 156
 157static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
 158{
 159	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
 160				 (void *)pr, 1);
 161}
 162
 163/* Power(C) State timer broadcast control */
 164static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
 165					struct acpi_processor_cx *cx)
 166{
 167	return cx - pr->power.states >= pr->power.timer_broadcast_on_state;
 
 
 
 
 
 
 
 
 168}
 169
 170#else
 171
 172static void lapic_timer_check_state(int state, struct acpi_processor *pr,
 173				   struct acpi_processor_cx *cstate) { }
 174static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
 175
 176static bool lapic_timer_needs_broadcast(struct acpi_processor *pr,
 177					struct acpi_processor_cx *cx)
 178{
 179	return false;
 180}
 181
 182#endif
 183
 184#if defined(CONFIG_X86)
 185static void tsc_check_state(int state)
 186{
 187	switch (boot_cpu_data.x86_vendor) {
 188	case X86_VENDOR_HYGON:
 189	case X86_VENDOR_AMD:
 190	case X86_VENDOR_INTEL:
 191	case X86_VENDOR_CENTAUR:
 192	case X86_VENDOR_ZHAOXIN:
 193		/*
 194		 * AMD Fam10h TSC will tick in all
 195		 * C/P/S0/S1 states when this bit is set.
 196		 */
 197		if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 198			return;
 199		fallthrough;
 
 200	default:
 201		/* TSC could halt in idle, so notify users */
 202		if (state > ACPI_STATE_C1)
 203			mark_tsc_unstable("TSC halts in idle");
 204	}
 205}
 206#else
 207static void tsc_check_state(int state) { return; }
 208#endif
 209
 210static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
 211{
 212
 213	if (!pr->pblk)
 214		return -ENODEV;
 215
 216	/* if info is obtained from pblk/fadt, type equals state */
 217	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
 218	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
 219
 220#ifndef CONFIG_HOTPLUG_CPU
 221	/*
 222	 * Check for P_LVL2_UP flag before entering C2 and above on
 223	 * an SMP system.
 224	 */
 225	if ((num_online_cpus() > 1) &&
 226	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 227		return -ENODEV;
 228#endif
 229
 230	/* determine C2 and C3 address from pblk */
 231	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
 232	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
 233
 234	/* determine latencies from FADT */
 235	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
 236	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
 237
 238	/*
 239	 * FADT specified C2 latency must be less than or equal to
 240	 * 100 microseconds.
 241	 */
 242	if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
 243		acpi_handle_debug(pr->handle, "C2 latency too large [%d]\n",
 244				  acpi_gbl_FADT.c2_latency);
 245		/* invalidate C2 */
 246		pr->power.states[ACPI_STATE_C2].address = 0;
 247	}
 248
 249	/*
 250	 * FADT supplied C3 latency must be less than or equal to
 251	 * 1000 microseconds.
 252	 */
 253	if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
 254		acpi_handle_debug(pr->handle, "C3 latency too large [%d]\n",
 255				  acpi_gbl_FADT.c3_latency);
 256		/* invalidate C3 */
 257		pr->power.states[ACPI_STATE_C3].address = 0;
 258	}
 259
 260	acpi_handle_debug(pr->handle, "lvl2[0x%08x] lvl3[0x%08x]\n",
 
 261			  pr->power.states[ACPI_STATE_C2].address,
 262			  pr->power.states[ACPI_STATE_C3].address);
 263
 264	snprintf(pr->power.states[ACPI_STATE_C2].desc,
 265			 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
 266			 pr->power.states[ACPI_STATE_C2].address);
 267	snprintf(pr->power.states[ACPI_STATE_C3].desc,
 268			 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
 269			 pr->power.states[ACPI_STATE_C3].address);
 270
 271	return 0;
 272}
 273
 274static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
 275{
 276	if (!pr->power.states[ACPI_STATE_C1].valid) {
 277		/* set the first C-State to C1 */
 278		/* all processors need to support C1 */
 279		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
 280		pr->power.states[ACPI_STATE_C1].valid = 1;
 281		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
 282
 283		snprintf(pr->power.states[ACPI_STATE_C1].desc,
 284			 ACPI_CX_DESC_LEN, "ACPI HLT");
 285	}
 286	/* the C0 state only exists as a filler in our array */
 287	pr->power.states[ACPI_STATE_C0].valid = 1;
 288	return 0;
 289}
 290
 291static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
 292{
 293	int ret;
 
 
 
 
 
 294
 295	if (nocst)
 296		return -ENODEV;
 297
 298	ret = acpi_processor_evaluate_cst(pr->handle, pr->id, &pr->power);
 299	if (ret)
 300		return ret;
 301
 302	if (!pr->power.count)
 303		return -EFAULT;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 304
 
 
 
 
 
 
 
 
 305	pr->flags.has_cst = 1;
 306	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 307}
 308
 309static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
 310					   struct acpi_processor_cx *cx)
 311{
 312	static int bm_check_flag = -1;
 313	static int bm_control_flag = -1;
 314
 315
 316	if (!cx->address)
 317		return;
 318
 319	/*
 320	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
 321	 * DMA transfers are used by any ISA device to avoid livelock.
 322	 * Note that we could disable Type-F DMA (as recommended by
 323	 * the erratum), but this is known to disrupt certain ISA
 324	 * devices thus we take the conservative approach.
 325	 */
 326	if (errata.piix4.fdma) {
 327		acpi_handle_debug(pr->handle,
 328				  "C3 not supported on PIIX4 with Type-F DMA\n");
 329		return;
 330	}
 331
 332	/* All the logic here assumes flags.bm_check is same across all CPUs */
 333	if (bm_check_flag == -1) {
 334		/* Determine whether bm_check is needed based on CPU  */
 335		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
 336		bm_check_flag = pr->flags.bm_check;
 337		bm_control_flag = pr->flags.bm_control;
 338	} else {
 339		pr->flags.bm_check = bm_check_flag;
 340		pr->flags.bm_control = bm_control_flag;
 341	}
 342
 343	if (pr->flags.bm_check) {
 344		if (!pr->flags.bm_control) {
 345			if (pr->flags.has_cst != 1) {
 346				/* bus mastering control is necessary */
 347				acpi_handle_debug(pr->handle,
 348						  "C3 support requires BM control\n");
 349				return;
 350			} else {
 351				/* Here we enter C3 without bus mastering */
 352				acpi_handle_debug(pr->handle,
 353						  "C3 support without BM control\n");
 354			}
 355		}
 356	} else {
 357		/*
 358		 * WBINVD should be set in fadt, for C3 state to be
 359		 * supported on when bm_check is not required.
 360		 */
 361		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
 362			acpi_handle_debug(pr->handle,
 363					  "Cache invalidation should work properly"
 364					  " for C3 to be enabled on SMP systems\n");
 365			return;
 366		}
 367	}
 368
 369	/*
 370	 * Otherwise we've met all of our C3 requirements.
 371	 * Normalize the C3 latency to expidite policy.  Enable
 372	 * checking of bus mastering status (bm_check) so we can
 373	 * use this in our C3 policy
 374	 */
 375	cx->valid = 1;
 376
 377	/*
 378	 * On older chipsets, BM_RLD needs to be set
 379	 * in order for Bus Master activity to wake the
 380	 * system from C3.  Newer chipsets handle DMA
 381	 * during C3 automatically and BM_RLD is a NOP.
 382	 * In either case, the proper way to
 383	 * handle BM_RLD is to set it and leave it set.
 384	 */
 385	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
 386}
 387
 388static void acpi_cst_latency_sort(struct acpi_processor_cx *states, size_t length)
 389{
 390	int i, j, k;
 391
 392	for (i = 1; i < length; i++) {
 393		if (!states[i].valid)
 394			continue;
 395
 396		for (j = i - 1, k = i; j >= 0; j--) {
 397			if (!states[j].valid)
 398				continue;
 399
 400			if (states[j].latency > states[k].latency)
 401				swap(states[j].latency, states[k].latency);
 402
 403			k = j;
 404		}
 405	}
 406}
 407
 408static int acpi_processor_power_verify(struct acpi_processor *pr)
 409{
 410	unsigned int i;
 411	unsigned int working = 0;
 412	unsigned int last_latency = 0;
 413	unsigned int last_type = 0;
 414	bool buggy_latency = false;
 415
 416	pr->power.timer_broadcast_on_state = INT_MAX;
 417
 418	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 419		struct acpi_processor_cx *cx = &pr->power.states[i];
 420
 421		switch (cx->type) {
 422		case ACPI_STATE_C1:
 423			cx->valid = 1;
 424			break;
 425
 426		case ACPI_STATE_C2:
 427			if (!cx->address)
 428				break;
 429			cx->valid = 1;
 430			break;
 431
 432		case ACPI_STATE_C3:
 433			acpi_processor_power_verify_c3(pr, cx);
 434			break;
 435		}
 436		if (!cx->valid)
 437			continue;
 438		if (cx->type >= last_type && cx->latency < last_latency)
 439			buggy_latency = true;
 440		last_latency = cx->latency;
 441		last_type = cx->type;
 442
 443		lapic_timer_check_state(i, pr, cx);
 444		tsc_check_state(cx->type);
 445		working++;
 446	}
 447
 448	if (buggy_latency) {
 449		pr_notice("FW issue: working around C-state latencies out of order\n");
 450		acpi_cst_latency_sort(&pr->power.states[1], max_cstate);
 451	}
 452
 453	lapic_timer_propagate_broadcast(pr);
 454
 455	return working;
 456}
 457
 458static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
 459{
 460	unsigned int i;
 461	int result;
 462
 463
 464	/* NOTE: the idle thread may not be running while calling
 465	 * this function */
 466
 467	/* Zero initialize all the C-states info. */
 468	memset(pr->power.states, 0, sizeof(pr->power.states));
 469
 470	result = acpi_processor_get_power_info_cst(pr);
 471	if (result == -ENODEV)
 472		result = acpi_processor_get_power_info_fadt(pr);
 473
 474	if (result)
 475		return result;
 476
 477	acpi_processor_get_power_info_default(pr);
 478
 479	pr->power.count = acpi_processor_power_verify(pr);
 480
 481	/*
 482	 * if one state of type C2 or C3 is available, mark this
 483	 * CPU as being "idle manageable"
 484	 */
 485	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 486		if (pr->power.states[i].valid) {
 487			pr->power.count = i;
 488			pr->flags.power = 1;
 
 489		}
 490	}
 491
 492	return 0;
 493}
 494
 495/**
 496 * acpi_idle_bm_check - checks if bus master activity was detected
 497 */
 498static int acpi_idle_bm_check(void)
 499{
 500	u32 bm_status = 0;
 501
 502	if (bm_check_disable)
 503		return 0;
 504
 505	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
 506	if (bm_status)
 507		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
 508	/*
 509	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
 510	 * the true state of bus mastering activity; forcing us to
 511	 * manually check the BMIDEA bit of each IDE channel.
 512	 */
 513	else if (errata.piix4.bmisx) {
 514		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
 515		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
 516			bm_status = 1;
 517	}
 518	return bm_status;
 519}
 520
 521static __cpuidle void io_idle(unsigned long addr)
 522{
 523	/* IO port based C-state */
 524	inb(addr);
 525
 526#ifdef	CONFIG_X86
 527	/* No delay is needed if we are in guest */
 528	if (boot_cpu_has(X86_FEATURE_HYPERVISOR))
 529		return;
 530	/*
 531	 * Modern (>=Nehalem) Intel systems use ACPI via intel_idle,
 532	 * not this code.  Assume that any Intel systems using this
 533	 * are ancient and may need the dummy wait.  This also assumes
 534	 * that the motivating chipset issue was Intel-only.
 535	 */
 536	if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
 537		return;
 538#endif
 539	/*
 540	 * Dummy wait op - must do something useless after P_LVL2 read
 541	 * because chipsets cannot guarantee that STPCLK# signal gets
 542	 * asserted in time to freeze execution properly
 543	 *
 544	 * This workaround has been in place since the original ACPI
 545	 * implementation was merged, circa 2002.
 546	 *
 547	 * If a profile is pointing to this instruction, please first
 548	 * consider moving your system to a more modern idle
 549	 * mechanism.
 550	 */
 551	inl(acpi_gbl_FADT.xpm_timer_block.address);
 552}
 553
 554/**
 555 * acpi_idle_do_entry - enter idle state using the appropriate method
 556 * @cx: cstate data
 557 *
 558 * Caller disables interrupt before call and enables interrupt after return.
 559 */
 560static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
 561{
 562	perf_lopwr_cb(true);
 563
 564	if (cx->entry_method == ACPI_CSTATE_FFH) {
 565		/* Call into architectural FFH based C-state */
 566		acpi_processor_ffh_cstate_enter(cx);
 567	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
 568		acpi_safe_halt();
 569	} else {
 570		io_idle(cx->address);
 
 
 
 
 
 571	}
 572
 573	perf_lopwr_cb(false);
 574}
 575
 576/**
 577 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
 578 * @dev: the target CPU
 579 * @index: the index of suggested state
 580 */
 581static void acpi_idle_play_dead(struct cpuidle_device *dev, int index)
 582{
 583	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 584
 585	ACPI_FLUSH_CPU_CACHE();
 586
 587	while (1) {
 588
 589		if (cx->entry_method == ACPI_CSTATE_HALT)
 590			raw_safe_halt();
 591		else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
 592			io_idle(cx->address);
 
 
 593		} else
 594			return;
 595	}
 
 
 
 596}
 597
 598static __always_inline bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
 599{
 600	return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
 601		!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
 602}
 603
 604static int c3_cpu_count;
 605static DEFINE_RAW_SPINLOCK(c3_lock);
 606
 607/**
 608 * acpi_idle_enter_bm - enters C3 with proper BM handling
 609 * @drv: cpuidle driver
 610 * @pr: Target processor
 611 * @cx: Target state context
 612 * @index: index of target state
 613 */
 614static int __cpuidle acpi_idle_enter_bm(struct cpuidle_driver *drv,
 615			       struct acpi_processor *pr,
 616			       struct acpi_processor_cx *cx,
 617			       int index)
 618{
 619	static struct acpi_processor_cx safe_cx = {
 620		.entry_method = ACPI_CSTATE_HALT,
 621	};
 
 
 
 622
 623	/*
 624	 * disable bus master
 625	 * bm_check implies we need ARB_DIS
 626	 * bm_control implies whether we can do ARB_DIS
 627	 *
 628	 * That leaves a case where bm_check is set and bm_control is not set.
 629	 * In that case we cannot do much, we enter C3 without doing anything.
 
 630	 */
 631	bool dis_bm = pr->flags.bm_control;
 632
 633	instrumentation_begin();
 634
 635	/* If we can skip BM, demote to a safe state. */
 636	if (!cx->bm_sts_skip && acpi_idle_bm_check()) {
 637		dis_bm = false;
 638		index = drv->safe_state_index;
 639		if (index >= 0) {
 640			cx = this_cpu_read(acpi_cstate[index]);
 641		} else {
 642			cx = &safe_cx;
 643			index = -EBUSY;
 644		}
 645	}
 646
 647	if (dis_bm) {
 648		raw_spin_lock(&c3_lock);
 649		c3_cpu_count++;
 650		/* Disable bus master arbitration when all CPUs are in C3 */
 651		if (c3_cpu_count == num_online_cpus())
 652			acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
 653		raw_spin_unlock(&c3_lock);
 654	}
 655
 656	ct_cpuidle_enter();
 657
 658	acpi_idle_do_entry(cx);
 659
 660	ct_cpuidle_exit();
 661
 662	/* Re-enable bus master arbitration */
 663	if (dis_bm) {
 664		raw_spin_lock(&c3_lock);
 665		acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
 666		c3_cpu_count--;
 667		raw_spin_unlock(&c3_lock);
 668	}
 669
 670	instrumentation_end();
 671
 672	return index;
 673}
 674
 675static int __cpuidle acpi_idle_enter(struct cpuidle_device *dev,
 676			   struct cpuidle_driver *drv, int index)
 677{
 678	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 679	struct acpi_processor *pr;
 680
 681	pr = __this_cpu_read(processors);
 682	if (unlikely(!pr))
 683		return -EINVAL;
 684
 685	if (cx->type != ACPI_STATE_C1) {
 686		if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check)
 687			return acpi_idle_enter_bm(drv, pr, cx, index);
 688
 689		/* C2 to C1 demotion. */
 690		if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
 691			index = ACPI_IDLE_STATE_START;
 692			cx = per_cpu(acpi_cstate[index], dev->cpu);
 
 
 
 
 
 
 
 
 
 
 
 693		}
 694	}
 695
 
 
 696	if (cx->type == ACPI_STATE_C3)
 697		ACPI_FLUSH_CPU_CACHE();
 698
 699	acpi_idle_do_entry(cx);
 700
 
 
 701	return index;
 702}
 703
 704static int __cpuidle acpi_idle_enter_s2idle(struct cpuidle_device *dev,
 705				  struct cpuidle_driver *drv, int index)
 706{
 707	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 708
 709	if (cx->type == ACPI_STATE_C3) {
 710		struct acpi_processor *pr = __this_cpu_read(processors);
 711
 712		if (unlikely(!pr))
 713			return 0;
 714
 715		if (pr->flags.bm_check) {
 716			u8 bm_sts_skip = cx->bm_sts_skip;
 717
 718			/* Don't check BM_STS, do an unconditional ARB_DIS for S2IDLE */
 719			cx->bm_sts_skip = 1;
 720			acpi_idle_enter_bm(drv, pr, cx, index);
 721			cx->bm_sts_skip = bm_sts_skip;
 722
 723			return 0;
 724		} else {
 725			ACPI_FLUSH_CPU_CACHE();
 726		}
 727	}
 728	acpi_idle_do_entry(cx);
 729
 730	return 0;
 731}
 732
 733static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
 734					   struct cpuidle_device *dev)
 735{
 736	int i, count = ACPI_IDLE_STATE_START;
 737	struct acpi_processor_cx *cx;
 738	struct cpuidle_state *state;
 739
 740	if (max_cstate == 0)
 741		max_cstate = 1;
 742
 743	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 744		state = &acpi_idle_driver.states[count];
 745		cx = &pr->power.states[i];
 746
 747		if (!cx->valid)
 748			continue;
 749
 750		per_cpu(acpi_cstate[count], dev->cpu) = cx;
 751
 752		if (lapic_timer_needs_broadcast(pr, cx))
 753			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
 754
 755		if (cx->type == ACPI_STATE_C3) {
 756			state->flags |= CPUIDLE_FLAG_TLB_FLUSHED;
 757			if (pr->flags.bm_check)
 758				state->flags |= CPUIDLE_FLAG_RCU_IDLE;
 759		}
 760
 761		count++;
 762		if (count == CPUIDLE_STATE_MAX)
 763			break;
 764	}
 765
 766	if (!count)
 767		return -EINVAL;
 768
 769	return 0;
 770}
 771
 772static int acpi_processor_setup_cstates(struct acpi_processor *pr)
 773{
 774	int i, count;
 775	struct acpi_processor_cx *cx;
 776	struct cpuidle_state *state;
 777	struct cpuidle_driver *drv = &acpi_idle_driver;
 778
 779	if (max_cstate == 0)
 780		max_cstate = 1;
 781
 782	if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
 783		cpuidle_poll_state_init(drv);
 784		count = 1;
 785	} else {
 786		count = 0;
 787	}
 788
 789	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 790		cx = &pr->power.states[i];
 791
 792		if (!cx->valid)
 793			continue;
 794
 795		state = &drv->states[count];
 796		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
 797		strscpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
 798		state->exit_latency = cx->latency;
 799		state->target_residency = cx->latency * latency_factor;
 800		state->enter = acpi_idle_enter;
 801
 802		state->flags = 0;
 803
 804		state->enter_dead = acpi_idle_play_dead;
 805
 806		if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2)
 807			drv->safe_state_index = count;
 808
 809		/*
 810		 * Halt-induced C1 is not good for ->enter_s2idle, because it
 811		 * re-enables interrupts on exit.  Moreover, C1 is generally not
 812		 * particularly interesting from the suspend-to-idle angle, so
 813		 * avoid C1 and the situations in which we may need to fall back
 814		 * to it altogether.
 815		 */
 816		if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
 817			state->enter_s2idle = acpi_idle_enter_s2idle;
 818
 819		count++;
 820		if (count == CPUIDLE_STATE_MAX)
 821			break;
 822	}
 823
 824	drv->state_count = count;
 825
 826	if (!count)
 827		return -EINVAL;
 828
 829	return 0;
 830}
 831
 832static inline void acpi_processor_cstate_first_run_checks(void)
 833{
 
 834	static int first_run;
 835
 836	if (first_run)
 837		return;
 838	dmi_check_system(processor_power_dmi_table);
 839	max_cstate = acpi_processor_cstate_check(max_cstate);
 840	if (max_cstate < ACPI_C_STATES_MAX)
 841		pr_notice("processor limited to max C-state %d\n", max_cstate);
 842
 843	first_run++;
 844
 845	if (nocst)
 846		return;
 847
 848	acpi_processor_claim_cst_control();
 
 
 
 849}
 850#else
 851
 852static inline int disabled_by_idle_boot_param(void) { return 0; }
 853static inline void acpi_processor_cstate_first_run_checks(void) { }
 854static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
 855{
 856	return -ENODEV;
 857}
 858
 859static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
 860					   struct cpuidle_device *dev)
 861{
 862	return -EINVAL;
 863}
 864
 865static int acpi_processor_setup_cstates(struct acpi_processor *pr)
 866{
 867	return -EINVAL;
 868}
 869
 870#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
 871
 872struct acpi_lpi_states_array {
 873	unsigned int size;
 874	unsigned int composite_states_size;
 875	struct acpi_lpi_state *entries;
 876	struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
 877};
 878
 879static int obj_get_integer(union acpi_object *obj, u32 *value)
 880{
 881	if (obj->type != ACPI_TYPE_INTEGER)
 882		return -EINVAL;
 883
 884	*value = obj->integer.value;
 885	return 0;
 886}
 887
 888static int acpi_processor_evaluate_lpi(acpi_handle handle,
 889				       struct acpi_lpi_states_array *info)
 890{
 891	acpi_status status;
 892	int ret = 0;
 893	int pkg_count, state_idx = 1, loop;
 894	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
 895	union acpi_object *lpi_data;
 896	struct acpi_lpi_state *lpi_state;
 897
 898	status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
 899	if (ACPI_FAILURE(status)) {
 900		acpi_handle_debug(handle, "No _LPI, giving up\n");
 901		return -ENODEV;
 902	}
 903
 904	lpi_data = buffer.pointer;
 905
 906	/* There must be at least 4 elements = 3 elements + 1 package */
 907	if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
 908	    lpi_data->package.count < 4) {
 909		pr_debug("not enough elements in _LPI\n");
 910		ret = -ENODATA;
 911		goto end;
 912	}
 913
 914	pkg_count = lpi_data->package.elements[2].integer.value;
 915
 916	/* Validate number of power states. */
 917	if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
 918		pr_debug("count given by _LPI is not valid\n");
 919		ret = -ENODATA;
 920		goto end;
 921	}
 922
 923	lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
 924	if (!lpi_state) {
 925		ret = -ENOMEM;
 926		goto end;
 927	}
 928
 929	info->size = pkg_count;
 930	info->entries = lpi_state;
 931
 932	/* LPI States start at index 3 */
 933	for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
 934		union acpi_object *element, *pkg_elem, *obj;
 935
 936		element = &lpi_data->package.elements[loop];
 937		if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
 938			continue;
 939
 940		pkg_elem = element->package.elements;
 941
 942		obj = pkg_elem + 6;
 943		if (obj->type == ACPI_TYPE_BUFFER) {
 944			struct acpi_power_register *reg;
 945
 946			reg = (struct acpi_power_register *)obj->buffer.pointer;
 947			if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
 948			    reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
 949				continue;
 950
 951			lpi_state->address = reg->address;
 952			lpi_state->entry_method =
 953				reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
 954				ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
 955		} else if (obj->type == ACPI_TYPE_INTEGER) {
 956			lpi_state->entry_method = ACPI_CSTATE_INTEGER;
 957			lpi_state->address = obj->integer.value;
 958		} else {
 959			continue;
 960		}
 961
 962		/* elements[7,8] skipped for now i.e. Residency/Usage counter*/
 963
 964		obj = pkg_elem + 9;
 965		if (obj->type == ACPI_TYPE_STRING)
 966			strscpy(lpi_state->desc, obj->string.pointer,
 967				ACPI_CX_DESC_LEN);
 968
 969		lpi_state->index = state_idx;
 970		if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
 971			pr_debug("No min. residency found, assuming 10 us\n");
 972			lpi_state->min_residency = 10;
 973		}
 974
 975		if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
 976			pr_debug("No wakeup residency found, assuming 10 us\n");
 977			lpi_state->wake_latency = 10;
 978		}
 979
 980		if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
 981			lpi_state->flags = 0;
 982
 983		if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
 984			lpi_state->arch_flags = 0;
 985
 986		if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
 987			lpi_state->res_cnt_freq = 1;
 988
 989		if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
 990			lpi_state->enable_parent_state = 0;
 991	}
 992
 993	acpi_handle_debug(handle, "Found %d power states\n", state_idx);
 994end:
 995	kfree(buffer.pointer);
 996	return ret;
 997}
 998
 999/*
1000 * flat_state_cnt - the number of composite LPI states after the process of flattening
1001 */
1002static int flat_state_cnt;
1003
1004/**
1005 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1006 *
1007 * @local: local LPI state
1008 * @parent: parent LPI state
1009 * @result: composite LPI state
1010 */
1011static bool combine_lpi_states(struct acpi_lpi_state *local,
1012			       struct acpi_lpi_state *parent,
1013			       struct acpi_lpi_state *result)
1014{
1015	if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1016		if (!parent->address) /* 0 means autopromotable */
1017			return false;
1018		result->address = local->address + parent->address;
1019	} else {
1020		result->address = parent->address;
1021	}
1022
1023	result->min_residency = max(local->min_residency, parent->min_residency);
1024	result->wake_latency = local->wake_latency + parent->wake_latency;
1025	result->enable_parent_state = parent->enable_parent_state;
1026	result->entry_method = local->entry_method;
1027
1028	result->flags = parent->flags;
1029	result->arch_flags = parent->arch_flags;
1030	result->index = parent->index;
1031
1032	strscpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1033	strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1034	strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1035	return true;
1036}
1037
1038#define ACPI_LPI_STATE_FLAGS_ENABLED			BIT(0)
1039
1040static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1041				  struct acpi_lpi_state *t)
1042{
1043	curr_level->composite_states[curr_level->composite_states_size++] = t;
1044}
1045
1046static int flatten_lpi_states(struct acpi_processor *pr,
1047			      struct acpi_lpi_states_array *curr_level,
1048			      struct acpi_lpi_states_array *prev_level)
1049{
1050	int i, j, state_count = curr_level->size;
1051	struct acpi_lpi_state *p, *t = curr_level->entries;
1052
1053	curr_level->composite_states_size = 0;
1054	for (j = 0; j < state_count; j++, t++) {
1055		struct acpi_lpi_state *flpi;
1056
1057		if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1058			continue;
1059
1060		if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1061			pr_warn("Limiting number of LPI states to max (%d)\n",
1062				ACPI_PROCESSOR_MAX_POWER);
1063			pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1064			break;
1065		}
1066
1067		flpi = &pr->power.lpi_states[flat_state_cnt];
1068
1069		if (!prev_level) { /* leaf/processor node */
1070			memcpy(flpi, t, sizeof(*t));
1071			stash_composite_state(curr_level, flpi);
1072			flat_state_cnt++;
1073			continue;
1074		}
1075
1076		for (i = 0; i < prev_level->composite_states_size; i++) {
1077			p = prev_level->composite_states[i];
1078			if (t->index <= p->enable_parent_state &&
1079			    combine_lpi_states(p, t, flpi)) {
1080				stash_composite_state(curr_level, flpi);
1081				flat_state_cnt++;
1082				flpi++;
1083			}
1084		}
1085	}
1086
1087	kfree(curr_level->entries);
1088	return 0;
1089}
1090
1091int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1092{
1093	return -EOPNOTSUPP;
1094}
1095
1096static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1097{
1098	int ret, i;
1099	acpi_status status;
1100	acpi_handle handle = pr->handle, pr_ahandle;
1101	struct acpi_device *d = NULL;
1102	struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1103
1104	/* make sure our architecture has support */
1105	ret = acpi_processor_ffh_lpi_probe(pr->id);
1106	if (ret == -EOPNOTSUPP)
1107		return ret;
1108
1109	if (!osc_pc_lpi_support_confirmed)
1110		return -EOPNOTSUPP;
1111
1112	if (!acpi_has_method(handle, "_LPI"))
1113		return -EINVAL;
1114
1115	flat_state_cnt = 0;
1116	prev = &info[0];
1117	curr = &info[1];
1118	handle = pr->handle;
1119	ret = acpi_processor_evaluate_lpi(handle, prev);
1120	if (ret)
1121		return ret;
1122	flatten_lpi_states(pr, prev, NULL);
1123
1124	status = acpi_get_parent(handle, &pr_ahandle);
1125	while (ACPI_SUCCESS(status)) {
1126		d = acpi_fetch_acpi_dev(pr_ahandle);
1127		if (!d)
1128			break;
1129
1130		handle = pr_ahandle;
1131
1132		if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1133			break;
1134
1135		/* can be optional ? */
1136		if (!acpi_has_method(handle, "_LPI"))
1137			break;
1138
1139		ret = acpi_processor_evaluate_lpi(handle, curr);
1140		if (ret)
1141			break;
1142
1143		/* flatten all the LPI states in this level of hierarchy */
1144		flatten_lpi_states(pr, curr, prev);
1145
1146		tmp = prev, prev = curr, curr = tmp;
1147
1148		status = acpi_get_parent(handle, &pr_ahandle);
1149	}
1150
1151	pr->power.count = flat_state_cnt;
1152	/* reset the index after flattening */
1153	for (i = 0; i < pr->power.count; i++)
1154		pr->power.lpi_states[i].index = i;
1155
1156	/* Tell driver that _LPI is supported. */
1157	pr->flags.has_lpi = 1;
1158	pr->flags.power = 1;
1159
1160	return 0;
1161}
1162
 
 
 
 
 
1163int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1164{
1165	return -ENODEV;
1166}
1167
1168/**
1169 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1170 * @dev: the target CPU
1171 * @drv: cpuidle driver containing cpuidle state info
1172 * @index: index of target state
1173 *
1174 * Return: 0 for success or negative value for error
1175 */
1176static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1177			       struct cpuidle_driver *drv, int index)
1178{
1179	struct acpi_processor *pr;
1180	struct acpi_lpi_state *lpi;
1181
1182	pr = __this_cpu_read(processors);
1183
1184	if (unlikely(!pr))
1185		return -EINVAL;
1186
1187	lpi = &pr->power.lpi_states[index];
1188	if (lpi->entry_method == ACPI_CSTATE_FFH)
1189		return acpi_processor_ffh_lpi_enter(lpi);
1190
1191	return -EINVAL;
1192}
1193
1194static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1195{
1196	int i;
1197	struct acpi_lpi_state *lpi;
1198	struct cpuidle_state *state;
1199	struct cpuidle_driver *drv = &acpi_idle_driver;
1200
1201	if (!pr->flags.has_lpi)
1202		return -EOPNOTSUPP;
1203
1204	for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1205		lpi = &pr->power.lpi_states[i];
1206
1207		state = &drv->states[i];
1208		snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1209		strscpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1210		state->exit_latency = lpi->wake_latency;
1211		state->target_residency = lpi->min_residency;
1212		state->flags |= arch_get_idle_state_flags(lpi->arch_flags);
1213		if (i != 0 && lpi->entry_method == ACPI_CSTATE_FFH)
1214			state->flags |= CPUIDLE_FLAG_RCU_IDLE;
1215		state->enter = acpi_idle_lpi_enter;
1216		drv->safe_state_index = i;
1217	}
1218
1219	drv->state_count = i;
1220
1221	return 0;
1222}
1223
1224/**
1225 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1226 * global state data i.e. idle routines
1227 *
1228 * @pr: the ACPI processor
1229 */
1230static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1231{
1232	int i;
1233	struct cpuidle_driver *drv = &acpi_idle_driver;
1234
1235	if (!pr->flags.power_setup_done || !pr->flags.power)
1236		return -EINVAL;
1237
1238	drv->safe_state_index = -1;
1239	for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1240		drv->states[i].name[0] = '\0';
1241		drv->states[i].desc[0] = '\0';
1242	}
1243
1244	if (pr->flags.has_lpi)
1245		return acpi_processor_setup_lpi_states(pr);
1246
1247	return acpi_processor_setup_cstates(pr);
1248}
1249
1250/**
1251 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1252 * device i.e. per-cpu data
1253 *
1254 * @pr: the ACPI processor
1255 * @dev : the cpuidle device
1256 */
1257static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1258					    struct cpuidle_device *dev)
1259{
1260	if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1261		return -EINVAL;
1262
1263	dev->cpu = pr->id;
1264	if (pr->flags.has_lpi)
1265		return acpi_processor_ffh_lpi_probe(pr->id);
1266
1267	return acpi_processor_setup_cpuidle_cx(pr, dev);
1268}
1269
1270static int acpi_processor_get_power_info(struct acpi_processor *pr)
1271{
1272	int ret;
1273
1274	ret = acpi_processor_get_lpi_info(pr);
1275	if (ret)
1276		ret = acpi_processor_get_cstate_info(pr);
1277
1278	return ret;
1279}
1280
1281int acpi_processor_hotplug(struct acpi_processor *pr)
1282{
1283	int ret = 0;
1284	struct cpuidle_device *dev;
1285
1286	if (disabled_by_idle_boot_param())
1287		return 0;
1288
1289	if (!pr->flags.power_setup_done)
1290		return -ENODEV;
1291
1292	dev = per_cpu(acpi_cpuidle_device, pr->id);
1293	cpuidle_pause_and_lock();
1294	cpuidle_disable_device(dev);
1295	ret = acpi_processor_get_power_info(pr);
1296	if (!ret && pr->flags.power) {
1297		acpi_processor_setup_cpuidle_dev(pr, dev);
1298		ret = cpuidle_enable_device(dev);
1299	}
1300	cpuidle_resume_and_unlock();
1301
1302	return ret;
1303}
1304
1305int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1306{
1307	int cpu;
1308	struct acpi_processor *_pr;
1309	struct cpuidle_device *dev;
1310
1311	if (disabled_by_idle_boot_param())
1312		return 0;
1313
1314	if (!pr->flags.power_setup_done)
1315		return -ENODEV;
1316
1317	/*
1318	 * FIXME:  Design the ACPI notification to make it once per
1319	 * system instead of once per-cpu.  This condition is a hack
1320	 * to make the code that updates C-States be called once.
1321	 */
1322
1323	if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1324
1325		/* Protect against cpu-hotplug */
1326		cpus_read_lock();
1327		cpuidle_pause_and_lock();
1328
1329		/* Disable all cpuidle devices */
1330		for_each_online_cpu(cpu) {
1331			_pr = per_cpu(processors, cpu);
1332			if (!_pr || !_pr->flags.power_setup_done)
1333				continue;
1334			dev = per_cpu(acpi_cpuidle_device, cpu);
1335			cpuidle_disable_device(dev);
1336		}
1337
1338		/* Populate Updated C-state information */
1339		acpi_processor_get_power_info(pr);
1340		acpi_processor_setup_cpuidle_states(pr);
1341
1342		/* Enable all cpuidle devices */
1343		for_each_online_cpu(cpu) {
1344			_pr = per_cpu(processors, cpu);
1345			if (!_pr || !_pr->flags.power_setup_done)
1346				continue;
1347			acpi_processor_get_power_info(_pr);
1348			if (_pr->flags.power) {
1349				dev = per_cpu(acpi_cpuidle_device, cpu);
1350				acpi_processor_setup_cpuidle_dev(_pr, dev);
1351				cpuidle_enable_device(dev);
1352			}
1353		}
1354		cpuidle_resume_and_unlock();
1355		cpus_read_unlock();
1356	}
1357
1358	return 0;
1359}
1360
1361static int acpi_processor_registered;
1362
1363int acpi_processor_power_init(struct acpi_processor *pr)
1364{
1365	int retval;
1366	struct cpuidle_device *dev;
1367
1368	if (disabled_by_idle_boot_param())
1369		return 0;
1370
1371	acpi_processor_cstate_first_run_checks();
1372
1373	if (!acpi_processor_get_power_info(pr))
1374		pr->flags.power_setup_done = 1;
1375
1376	/*
1377	 * Install the idle handler if processor power management is supported.
1378	 * Note that we use previously set idle handler will be used on
1379	 * platforms that only support C1.
1380	 */
1381	if (pr->flags.power) {
1382		/* Register acpi_idle_driver if not already registered */
1383		if (!acpi_processor_registered) {
1384			acpi_processor_setup_cpuidle_states(pr);
1385			retval = cpuidle_register_driver(&acpi_idle_driver);
1386			if (retval)
1387				return retval;
1388			pr_debug("%s registered with cpuidle\n",
1389				 acpi_idle_driver.name);
1390		}
1391
1392		dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1393		if (!dev)
1394			return -ENOMEM;
1395		per_cpu(acpi_cpuidle_device, pr->id) = dev;
1396
1397		acpi_processor_setup_cpuidle_dev(pr, dev);
1398
1399		/* Register per-cpu cpuidle_device. Cpuidle driver
1400		 * must already be registered before registering device
1401		 */
1402		retval = cpuidle_register_device(dev);
1403		if (retval) {
1404			if (acpi_processor_registered == 0)
1405				cpuidle_unregister_driver(&acpi_idle_driver);
1406			return retval;
1407		}
1408		acpi_processor_registered++;
1409	}
1410	return 0;
1411}
1412
1413int acpi_processor_power_exit(struct acpi_processor *pr)
1414{
1415	struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1416
1417	if (disabled_by_idle_boot_param())
1418		return 0;
1419
1420	if (pr->flags.power) {
1421		cpuidle_unregister_device(dev);
1422		acpi_processor_registered--;
1423		if (acpi_processor_registered == 0)
1424			cpuidle_unregister_driver(&acpi_idle_driver);
1425
1426		kfree(dev);
1427	}
1428
1429	pr->flags.power_setup_done = 0;
1430	return 0;
1431}
v5.4
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * processor_idle - idle state submodule to the ACPI processor driver
   4 *
   5 *  Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
   6 *  Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
   7 *  Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
   8 *  Copyright (C) 2004  Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
   9 *  			- Added processor hotplug support
  10 *  Copyright (C) 2005  Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
  11 *  			- Added support for C3 on SMP
  12 */
  13#define pr_fmt(fmt) "ACPI: " fmt
  14
  15#include <linux/module.h>
  16#include <linux/acpi.h>
  17#include <linux/dmi.h>
  18#include <linux/sched.h>       /* need_resched() */
  19#include <linux/tick.h>
  20#include <linux/cpuidle.h>
  21#include <linux/cpu.h>
 
 
  22#include <acpi/processor.h>
 
  23
  24/*
  25 * Include the apic definitions for x86 to have the APIC timer related defines
  26 * available also for UP (on SMP it gets magically included via linux/smp.h).
  27 * asm/acpi.h is not an option, as it would require more include magic. Also
  28 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
  29 */
  30#ifdef CONFIG_X86
  31#include <asm/apic.h>
 
  32#endif
  33
  34#define ACPI_PROCESSOR_CLASS            "processor"
  35#define _COMPONENT              ACPI_PROCESSOR_COMPONENT
  36ACPI_MODULE_NAME("processor_idle");
  37
  38#define ACPI_IDLE_STATE_START	(IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX) ? 1 : 0)
  39
  40static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
  41module_param(max_cstate, uint, 0000);
  42static unsigned int nocst __read_mostly;
  43module_param(nocst, uint, 0000);
  44static int bm_check_disable __read_mostly;
  45module_param(bm_check_disable, uint, 0000);
  46
  47static unsigned int latency_factor __read_mostly = 2;
  48module_param(latency_factor, uint, 0644);
  49
  50static DEFINE_PER_CPU(struct cpuidle_device *, acpi_cpuidle_device);
  51
  52struct cpuidle_driver acpi_idle_driver = {
  53	.name =		"acpi_idle",
  54	.owner =	THIS_MODULE,
  55};
  56
  57#ifdef CONFIG_ACPI_PROCESSOR_CSTATE
  58static
  59DEFINE_PER_CPU(struct acpi_processor_cx * [CPUIDLE_STATE_MAX], acpi_cstate);
  60
  61static int disabled_by_idle_boot_param(void)
  62{
  63	return boot_option_idle_override == IDLE_POLL ||
  64		boot_option_idle_override == IDLE_HALT;
  65}
  66
  67/*
  68 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
  69 * For now disable this. Probably a bug somewhere else.
  70 *
  71 * To skip this limit, boot/load with a large max_cstate limit.
  72 */
  73static int set_max_cstate(const struct dmi_system_id *id)
  74{
  75	if (max_cstate > ACPI_PROCESSOR_MAX_POWER)
  76		return 0;
  77
  78	pr_notice("%s detected - limiting to C%ld max_cstate."
  79		  " Override with \"processor.max_cstate=%d\"\n", id->ident,
  80		  (long)id->driver_data, ACPI_PROCESSOR_MAX_POWER + 1);
  81
  82	max_cstate = (long)id->driver_data;
  83
  84	return 0;
  85}
  86
  87static const struct dmi_system_id processor_power_dmi_table[] = {
  88	{ set_max_cstate, "Clevo 5600D", {
  89	  DMI_MATCH(DMI_BIOS_VENDOR,"Phoenix Technologies LTD"),
  90	  DMI_MATCH(DMI_BIOS_VERSION,"SHE845M0.86C.0013.D.0302131307")},
  91	 (void *)2},
  92	{ set_max_cstate, "Pavilion zv5000", {
  93	  DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
  94	  DMI_MATCH(DMI_PRODUCT_NAME,"Pavilion zv5000 (DS502A#ABA)")},
  95	 (void *)1},
  96	{ set_max_cstate, "Asus L8400B", {
  97	  DMI_MATCH(DMI_SYS_VENDOR, "ASUSTeK Computer Inc."),
  98	  DMI_MATCH(DMI_PRODUCT_NAME,"L8400B series Notebook PC")},
  99	 (void *)1},
 100	{},
 101};
 102
 103
 104/*
 105 * Callers should disable interrupts before the call and enable
 106 * interrupts after return.
 107 */
 108static void __cpuidle acpi_safe_halt(void)
 109{
 110	if (!tif_need_resched()) {
 111		safe_halt();
 112		local_irq_disable();
 113	}
 114}
 115
 116#ifdef ARCH_APICTIMER_STOPS_ON_C3
 117
 118/*
 119 * Some BIOS implementations switch to C3 in the published C2 state.
 120 * This seems to be a common problem on AMD boxen, but other vendors
 121 * are affected too. We pick the most conservative approach: we assume
 122 * that the local APIC stops in both C2 and C3.
 123 */
 124static void lapic_timer_check_state(int state, struct acpi_processor *pr,
 125				   struct acpi_processor_cx *cx)
 126{
 127	struct acpi_processor_power *pwr = &pr->power;
 128	u8 type = local_apic_timer_c2_ok ? ACPI_STATE_C3 : ACPI_STATE_C2;
 129
 130	if (cpu_has(&cpu_data(pr->id), X86_FEATURE_ARAT))
 131		return;
 132
 133	if (boot_cpu_has_bug(X86_BUG_AMD_APIC_C1E))
 134		type = ACPI_STATE_C1;
 135
 136	/*
 137	 * Check, if one of the previous states already marked the lapic
 138	 * unstable
 139	 */
 140	if (pwr->timer_broadcast_on_state < state)
 141		return;
 142
 143	if (cx->type >= type)
 144		pr->power.timer_broadcast_on_state = state;
 145}
 146
 147static void __lapic_timer_propagate_broadcast(void *arg)
 148{
 149	struct acpi_processor *pr = (struct acpi_processor *) arg;
 150
 151	if (pr->power.timer_broadcast_on_state < INT_MAX)
 152		tick_broadcast_enable();
 153	else
 154		tick_broadcast_disable();
 155}
 156
 157static void lapic_timer_propagate_broadcast(struct acpi_processor *pr)
 158{
 159	smp_call_function_single(pr->id, __lapic_timer_propagate_broadcast,
 160				 (void *)pr, 1);
 161}
 162
 163/* Power(C) State timer broadcast control */
 164static void lapic_timer_state_broadcast(struct acpi_processor *pr,
 165				       struct acpi_processor_cx *cx,
 166				       int broadcast)
 167{
 168	int state = cx - pr->power.states;
 169
 170	if (state >= pr->power.timer_broadcast_on_state) {
 171		if (broadcast)
 172			tick_broadcast_enter();
 173		else
 174			tick_broadcast_exit();
 175	}
 176}
 177
 178#else
 179
 180static void lapic_timer_check_state(int state, struct acpi_processor *pr,
 181				   struct acpi_processor_cx *cstate) { }
 182static void lapic_timer_propagate_broadcast(struct acpi_processor *pr) { }
 183static void lapic_timer_state_broadcast(struct acpi_processor *pr,
 184				       struct acpi_processor_cx *cx,
 185				       int broadcast)
 186{
 
 187}
 188
 189#endif
 190
 191#if defined(CONFIG_X86)
 192static void tsc_check_state(int state)
 193{
 194	switch (boot_cpu_data.x86_vendor) {
 195	case X86_VENDOR_HYGON:
 196	case X86_VENDOR_AMD:
 197	case X86_VENDOR_INTEL:
 198	case X86_VENDOR_CENTAUR:
 199	case X86_VENDOR_ZHAOXIN:
 200		/*
 201		 * AMD Fam10h TSC will tick in all
 202		 * C/P/S0/S1 states when this bit is set.
 203		 */
 204		if (boot_cpu_has(X86_FEATURE_NONSTOP_TSC))
 205			return;
 206
 207		/*FALL THROUGH*/
 208	default:
 209		/* TSC could halt in idle, so notify users */
 210		if (state > ACPI_STATE_C1)
 211			mark_tsc_unstable("TSC halts in idle");
 212	}
 213}
 214#else
 215static void tsc_check_state(int state) { return; }
 216#endif
 217
 218static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
 219{
 220
 221	if (!pr->pblk)
 222		return -ENODEV;
 223
 224	/* if info is obtained from pblk/fadt, type equals state */
 225	pr->power.states[ACPI_STATE_C2].type = ACPI_STATE_C2;
 226	pr->power.states[ACPI_STATE_C3].type = ACPI_STATE_C3;
 227
 228#ifndef CONFIG_HOTPLUG_CPU
 229	/*
 230	 * Check for P_LVL2_UP flag before entering C2 and above on
 231	 * an SMP system.
 232	 */
 233	if ((num_online_cpus() > 1) &&
 234	    !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
 235		return -ENODEV;
 236#endif
 237
 238	/* determine C2 and C3 address from pblk */
 239	pr->power.states[ACPI_STATE_C2].address = pr->pblk + 4;
 240	pr->power.states[ACPI_STATE_C3].address = pr->pblk + 5;
 241
 242	/* determine latencies from FADT */
 243	pr->power.states[ACPI_STATE_C2].latency = acpi_gbl_FADT.c2_latency;
 244	pr->power.states[ACPI_STATE_C3].latency = acpi_gbl_FADT.c3_latency;
 245
 246	/*
 247	 * FADT specified C2 latency must be less than or equal to
 248	 * 100 microseconds.
 249	 */
 250	if (acpi_gbl_FADT.c2_latency > ACPI_PROCESSOR_MAX_C2_LATENCY) {
 251		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 252			"C2 latency too large [%d]\n", acpi_gbl_FADT.c2_latency));
 253		/* invalidate C2 */
 254		pr->power.states[ACPI_STATE_C2].address = 0;
 255	}
 256
 257	/*
 258	 * FADT supplied C3 latency must be less than or equal to
 259	 * 1000 microseconds.
 260	 */
 261	if (acpi_gbl_FADT.c3_latency > ACPI_PROCESSOR_MAX_C3_LATENCY) {
 262		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 263			"C3 latency too large [%d]\n", acpi_gbl_FADT.c3_latency));
 264		/* invalidate C3 */
 265		pr->power.states[ACPI_STATE_C3].address = 0;
 266	}
 267
 268	ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 269			  "lvl2[0x%08x] lvl3[0x%08x]\n",
 270			  pr->power.states[ACPI_STATE_C2].address,
 271			  pr->power.states[ACPI_STATE_C3].address));
 272
 273	snprintf(pr->power.states[ACPI_STATE_C2].desc,
 274			 ACPI_CX_DESC_LEN, "ACPI P_LVL2 IOPORT 0x%x",
 275			 pr->power.states[ACPI_STATE_C2].address);
 276	snprintf(pr->power.states[ACPI_STATE_C3].desc,
 277			 ACPI_CX_DESC_LEN, "ACPI P_LVL3 IOPORT 0x%x",
 278			 pr->power.states[ACPI_STATE_C3].address);
 279
 280	return 0;
 281}
 282
 283static int acpi_processor_get_power_info_default(struct acpi_processor *pr)
 284{
 285	if (!pr->power.states[ACPI_STATE_C1].valid) {
 286		/* set the first C-State to C1 */
 287		/* all processors need to support C1 */
 288		pr->power.states[ACPI_STATE_C1].type = ACPI_STATE_C1;
 289		pr->power.states[ACPI_STATE_C1].valid = 1;
 290		pr->power.states[ACPI_STATE_C1].entry_method = ACPI_CSTATE_HALT;
 291
 292		snprintf(pr->power.states[ACPI_STATE_C1].desc,
 293			 ACPI_CX_DESC_LEN, "ACPI HLT");
 294	}
 295	/* the C0 state only exists as a filler in our array */
 296	pr->power.states[ACPI_STATE_C0].valid = 1;
 297	return 0;
 298}
 299
 300static int acpi_processor_get_power_info_cst(struct acpi_processor *pr)
 301{
 302	acpi_status status;
 303	u64 count;
 304	int current_count;
 305	int i, ret = 0;
 306	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
 307	union acpi_object *cst;
 308
 309	if (nocst)
 310		return -ENODEV;
 311
 312	current_count = 0;
 
 
 313
 314	status = acpi_evaluate_object(pr->handle, "_CST", NULL, &buffer);
 315	if (ACPI_FAILURE(status)) {
 316		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _CST, giving up\n"));
 317		return -ENODEV;
 318	}
 319
 320	cst = buffer.pointer;
 321
 322	/* There must be at least 2 elements */
 323	if (!cst || (cst->type != ACPI_TYPE_PACKAGE) || cst->package.count < 2) {
 324		pr_err("not enough elements in _CST\n");
 325		ret = -EFAULT;
 326		goto end;
 327	}
 328
 329	count = cst->package.elements[0].integer.value;
 330
 331	/* Validate number of power states. */
 332	if (count < 1 || count != cst->package.count - 1) {
 333		pr_err("count given by _CST is not valid\n");
 334		ret = -EFAULT;
 335		goto end;
 336	}
 337
 338	/* Tell driver that at least _CST is supported. */
 339	pr->flags.has_cst = 1;
 340
 341	for (i = 1; i <= count; i++) {
 342		union acpi_object *element;
 343		union acpi_object *obj;
 344		struct acpi_power_register *reg;
 345		struct acpi_processor_cx cx;
 346
 347		memset(&cx, 0, sizeof(cx));
 348
 349		element = &(cst->package.elements[i]);
 350		if (element->type != ACPI_TYPE_PACKAGE)
 351			continue;
 352
 353		if (element->package.count != 4)
 354			continue;
 355
 356		obj = &(element->package.elements[0]);
 357
 358		if (obj->type != ACPI_TYPE_BUFFER)
 359			continue;
 360
 361		reg = (struct acpi_power_register *)obj->buffer.pointer;
 362
 363		if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
 364		    (reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE))
 365			continue;
 366
 367		/* There should be an easy way to extract an integer... */
 368		obj = &(element->package.elements[1]);
 369		if (obj->type != ACPI_TYPE_INTEGER)
 370			continue;
 371
 372		cx.type = obj->integer.value;
 373		/*
 374		 * Some buggy BIOSes won't list C1 in _CST -
 375		 * Let acpi_processor_get_power_info_default() handle them later
 376		 */
 377		if (i == 1 && cx.type != ACPI_STATE_C1)
 378			current_count++;
 379
 380		cx.address = reg->address;
 381		cx.index = current_count + 1;
 382
 383		cx.entry_method = ACPI_CSTATE_SYSTEMIO;
 384		if (reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE) {
 385			if (acpi_processor_ffh_cstate_probe
 386					(pr->id, &cx, reg) == 0) {
 387				cx.entry_method = ACPI_CSTATE_FFH;
 388			} else if (cx.type == ACPI_STATE_C1) {
 389				/*
 390				 * C1 is a special case where FIXED_HARDWARE
 391				 * can be handled in non-MWAIT way as well.
 392				 * In that case, save this _CST entry info.
 393				 * Otherwise, ignore this info and continue.
 394				 */
 395				cx.entry_method = ACPI_CSTATE_HALT;
 396				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
 397			} else {
 398				continue;
 399			}
 400			if (cx.type == ACPI_STATE_C1 &&
 401			    (boot_option_idle_override == IDLE_NOMWAIT)) {
 402				/*
 403				 * In most cases the C1 space_id obtained from
 404				 * _CST object is FIXED_HARDWARE access mode.
 405				 * But when the option of idle=halt is added,
 406				 * the entry_method type should be changed from
 407				 * CSTATE_FFH to CSTATE_HALT.
 408				 * When the option of idle=nomwait is added,
 409				 * the C1 entry_method type should be
 410				 * CSTATE_HALT.
 411				 */
 412				cx.entry_method = ACPI_CSTATE_HALT;
 413				snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI HLT");
 414			}
 415		} else {
 416			snprintf(cx.desc, ACPI_CX_DESC_LEN, "ACPI IOPORT 0x%x",
 417				 cx.address);
 418		}
 419
 420		if (cx.type == ACPI_STATE_C1) {
 421			cx.valid = 1;
 422		}
 423
 424		obj = &(element->package.elements[2]);
 425		if (obj->type != ACPI_TYPE_INTEGER)
 426			continue;
 427
 428		cx.latency = obj->integer.value;
 429
 430		obj = &(element->package.elements[3]);
 431		if (obj->type != ACPI_TYPE_INTEGER)
 432			continue;
 433
 434		current_count++;
 435		memcpy(&(pr->power.states[current_count]), &cx, sizeof(cx));
 436
 437		/*
 438		 * We support total ACPI_PROCESSOR_MAX_POWER - 1
 439		 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
 440		 */
 441		if (current_count >= (ACPI_PROCESSOR_MAX_POWER - 1)) {
 442			pr_warn("Limiting number of power states to max (%d)\n",
 443				ACPI_PROCESSOR_MAX_POWER);
 444			pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
 445			break;
 446		}
 447	}
 448
 449	ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %d power states\n",
 450			  current_count));
 451
 452	/* Validate number of power states discovered */
 453	if (current_count < 2)
 454		ret = -EFAULT;
 455
 456      end:
 457	kfree(buffer.pointer);
 458
 459	return ret;
 460}
 461
 462static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
 463					   struct acpi_processor_cx *cx)
 464{
 465	static int bm_check_flag = -1;
 466	static int bm_control_flag = -1;
 467
 468
 469	if (!cx->address)
 470		return;
 471
 472	/*
 473	 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
 474	 * DMA transfers are used by any ISA device to avoid livelock.
 475	 * Note that we could disable Type-F DMA (as recommended by
 476	 * the erratum), but this is known to disrupt certain ISA
 477	 * devices thus we take the conservative approach.
 478	 */
 479	else if (errata.piix4.fdma) {
 480		ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 481				  "C3 not supported on PIIX4 with Type-F DMA\n"));
 482		return;
 483	}
 484
 485	/* All the logic here assumes flags.bm_check is same across all CPUs */
 486	if (bm_check_flag == -1) {
 487		/* Determine whether bm_check is needed based on CPU  */
 488		acpi_processor_power_init_bm_check(&(pr->flags), pr->id);
 489		bm_check_flag = pr->flags.bm_check;
 490		bm_control_flag = pr->flags.bm_control;
 491	} else {
 492		pr->flags.bm_check = bm_check_flag;
 493		pr->flags.bm_control = bm_control_flag;
 494	}
 495
 496	if (pr->flags.bm_check) {
 497		if (!pr->flags.bm_control) {
 498			if (pr->flags.has_cst != 1) {
 499				/* bus mastering control is necessary */
 500				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 501					"C3 support requires BM control\n"));
 502				return;
 503			} else {
 504				/* Here we enter C3 without bus mastering */
 505				ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 506					"C3 support without BM control\n"));
 507			}
 508		}
 509	} else {
 510		/*
 511		 * WBINVD should be set in fadt, for C3 state to be
 512		 * supported on when bm_check is not required.
 513		 */
 514		if (!(acpi_gbl_FADT.flags & ACPI_FADT_WBINVD)) {
 515			ACPI_DEBUG_PRINT((ACPI_DB_INFO,
 516					  "Cache invalidation should work properly"
 517					  " for C3 to be enabled on SMP systems\n"));
 518			return;
 519		}
 520	}
 521
 522	/*
 523	 * Otherwise we've met all of our C3 requirements.
 524	 * Normalize the C3 latency to expidite policy.  Enable
 525	 * checking of bus mastering status (bm_check) so we can
 526	 * use this in our C3 policy
 527	 */
 528	cx->valid = 1;
 529
 530	/*
 531	 * On older chipsets, BM_RLD needs to be set
 532	 * in order for Bus Master activity to wake the
 533	 * system from C3.  Newer chipsets handle DMA
 534	 * during C3 automatically and BM_RLD is a NOP.
 535	 * In either case, the proper way to
 536	 * handle BM_RLD is to set it and leave it set.
 537	 */
 538	acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_RLD, 1);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 539
 540	return;
 
 
 541}
 542
 543static int acpi_processor_power_verify(struct acpi_processor *pr)
 544{
 545	unsigned int i;
 546	unsigned int working = 0;
 
 
 
 547
 548	pr->power.timer_broadcast_on_state = INT_MAX;
 549
 550	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 551		struct acpi_processor_cx *cx = &pr->power.states[i];
 552
 553		switch (cx->type) {
 554		case ACPI_STATE_C1:
 555			cx->valid = 1;
 556			break;
 557
 558		case ACPI_STATE_C2:
 559			if (!cx->address)
 560				break;
 561			cx->valid = 1;
 562			break;
 563
 564		case ACPI_STATE_C3:
 565			acpi_processor_power_verify_c3(pr, cx);
 566			break;
 567		}
 568		if (!cx->valid)
 569			continue;
 
 
 
 
 570
 571		lapic_timer_check_state(i, pr, cx);
 572		tsc_check_state(cx->type);
 573		working++;
 574	}
 575
 
 
 
 
 
 576	lapic_timer_propagate_broadcast(pr);
 577
 578	return (working);
 579}
 580
 581static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
 582{
 583	unsigned int i;
 584	int result;
 585
 586
 587	/* NOTE: the idle thread may not be running while calling
 588	 * this function */
 589
 590	/* Zero initialize all the C-states info. */
 591	memset(pr->power.states, 0, sizeof(pr->power.states));
 592
 593	result = acpi_processor_get_power_info_cst(pr);
 594	if (result == -ENODEV)
 595		result = acpi_processor_get_power_info_fadt(pr);
 596
 597	if (result)
 598		return result;
 599
 600	acpi_processor_get_power_info_default(pr);
 601
 602	pr->power.count = acpi_processor_power_verify(pr);
 603
 604	/*
 605	 * if one state of type C2 or C3 is available, mark this
 606	 * CPU as being "idle manageable"
 607	 */
 608	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
 609		if (pr->power.states[i].valid) {
 610			pr->power.count = i;
 611			if (pr->power.states[i].type >= ACPI_STATE_C2)
 612				pr->flags.power = 1;
 613		}
 614	}
 615
 616	return 0;
 617}
 618
 619/**
 620 * acpi_idle_bm_check - checks if bus master activity was detected
 621 */
 622static int acpi_idle_bm_check(void)
 623{
 624	u32 bm_status = 0;
 625
 626	if (bm_check_disable)
 627		return 0;
 628
 629	acpi_read_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
 630	if (bm_status)
 631		acpi_write_bit_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
 632	/*
 633	 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
 634	 * the true state of bus mastering activity; forcing us to
 635	 * manually check the BMIDEA bit of each IDE channel.
 636	 */
 637	else if (errata.piix4.bmisx) {
 638		if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
 639		    || (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
 640			bm_status = 1;
 641	}
 642	return bm_status;
 643}
 644
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 645/**
 646 * acpi_idle_do_entry - enter idle state using the appropriate method
 647 * @cx: cstate data
 648 *
 649 * Caller disables interrupt before call and enables interrupt after return.
 650 */
 651static void __cpuidle acpi_idle_do_entry(struct acpi_processor_cx *cx)
 652{
 
 
 653	if (cx->entry_method == ACPI_CSTATE_FFH) {
 654		/* Call into architectural FFH based C-state */
 655		acpi_processor_ffh_cstate_enter(cx);
 656	} else if (cx->entry_method == ACPI_CSTATE_HALT) {
 657		acpi_safe_halt();
 658	} else {
 659		/* IO port based C-state */
 660		inb(cx->address);
 661		/* Dummy wait op - must do something useless after P_LVL2 read
 662		   because chipsets cannot guarantee that STPCLK# signal
 663		   gets asserted in time to freeze execution properly. */
 664		inl(acpi_gbl_FADT.xpm_timer_block.address);
 665	}
 
 
 666}
 667
 668/**
 669 * acpi_idle_play_dead - enters an ACPI state for long-term idle (i.e. off-lining)
 670 * @dev: the target CPU
 671 * @index: the index of suggested state
 672 */
 673static int acpi_idle_play_dead(struct cpuidle_device *dev, int index)
 674{
 675	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 676
 677	ACPI_FLUSH_CPU_CACHE();
 678
 679	while (1) {
 680
 681		if (cx->entry_method == ACPI_CSTATE_HALT)
 682			safe_halt();
 683		else if (cx->entry_method == ACPI_CSTATE_SYSTEMIO) {
 684			inb(cx->address);
 685			/* See comment in acpi_idle_do_entry() */
 686			inl(acpi_gbl_FADT.xpm_timer_block.address);
 687		} else
 688			return -ENODEV;
 689	}
 690
 691	/* Never reached */
 692	return 0;
 693}
 694
 695static bool acpi_idle_fallback_to_c1(struct acpi_processor *pr)
 696{
 697	return IS_ENABLED(CONFIG_HOTPLUG_CPU) && !pr->flags.has_cst &&
 698		!(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED);
 699}
 700
 701static int c3_cpu_count;
 702static DEFINE_RAW_SPINLOCK(c3_lock);
 703
 704/**
 705 * acpi_idle_enter_bm - enters C3 with proper BM handling
 
 706 * @pr: Target processor
 707 * @cx: Target state context
 708 * @timer_bc: Whether or not to change timer mode to broadcast
 709 */
 710static void acpi_idle_enter_bm(struct acpi_processor *pr,
 711			       struct acpi_processor_cx *cx, bool timer_bc)
 712{
 713	acpi_unlazy_tlb(smp_processor_id());
 714
 715	/*
 716	 * Must be done before busmaster disable as we might need to
 717	 * access HPET !
 718	 */
 719	if (timer_bc)
 720		lapic_timer_state_broadcast(pr, cx, 1);
 721
 722	/*
 723	 * disable bus master
 724	 * bm_check implies we need ARB_DIS
 725	 * bm_control implies whether we can do ARB_DIS
 726	 *
 727	 * That leaves a case where bm_check is set and bm_control is
 728	 * not set. In that case we cannot do much, we enter C3
 729	 * without doing anything.
 730	 */
 731	if (pr->flags.bm_control) {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 732		raw_spin_lock(&c3_lock);
 733		c3_cpu_count++;
 734		/* Disable bus master arbitration when all CPUs are in C3 */
 735		if (c3_cpu_count == num_online_cpus())
 736			acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 1);
 737		raw_spin_unlock(&c3_lock);
 738	}
 739
 
 
 740	acpi_idle_do_entry(cx);
 741
 
 
 742	/* Re-enable bus master arbitration */
 743	if (pr->flags.bm_control) {
 744		raw_spin_lock(&c3_lock);
 745		acpi_write_bit_register(ACPI_BITREG_ARB_DISABLE, 0);
 746		c3_cpu_count--;
 747		raw_spin_unlock(&c3_lock);
 748	}
 749
 750	if (timer_bc)
 751		lapic_timer_state_broadcast(pr, cx, 0);
 
 752}
 753
 754static int acpi_idle_enter(struct cpuidle_device *dev,
 755			   struct cpuidle_driver *drv, int index)
 756{
 757	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 758	struct acpi_processor *pr;
 759
 760	pr = __this_cpu_read(processors);
 761	if (unlikely(!pr))
 762		return -EINVAL;
 763
 764	if (cx->type != ACPI_STATE_C1) {
 
 
 
 
 765		if (acpi_idle_fallback_to_c1(pr) && num_online_cpus() > 1) {
 766			index = ACPI_IDLE_STATE_START;
 767			cx = per_cpu(acpi_cstate[index], dev->cpu);
 768		} else if (cx->type == ACPI_STATE_C3 && pr->flags.bm_check) {
 769			if (cx->bm_sts_skip || !acpi_idle_bm_check()) {
 770				acpi_idle_enter_bm(pr, cx, true);
 771				return index;
 772			} else if (drv->safe_state_index >= 0) {
 773				index = drv->safe_state_index;
 774				cx = per_cpu(acpi_cstate[index], dev->cpu);
 775			} else {
 776				acpi_safe_halt();
 777				return -EBUSY;
 778			}
 779		}
 780	}
 781
 782	lapic_timer_state_broadcast(pr, cx, 1);
 783
 784	if (cx->type == ACPI_STATE_C3)
 785		ACPI_FLUSH_CPU_CACHE();
 786
 787	acpi_idle_do_entry(cx);
 788
 789	lapic_timer_state_broadcast(pr, cx, 0);
 790
 791	return index;
 792}
 793
 794static void acpi_idle_enter_s2idle(struct cpuidle_device *dev,
 795				   struct cpuidle_driver *drv, int index)
 796{
 797	struct acpi_processor_cx *cx = per_cpu(acpi_cstate[index], dev->cpu);
 798
 799	if (cx->type == ACPI_STATE_C3) {
 800		struct acpi_processor *pr = __this_cpu_read(processors);
 801
 802		if (unlikely(!pr))
 803			return;
 804
 805		if (pr->flags.bm_check) {
 806			acpi_idle_enter_bm(pr, cx, false);
 807			return;
 
 
 
 
 
 
 808		} else {
 809			ACPI_FLUSH_CPU_CACHE();
 810		}
 811	}
 812	acpi_idle_do_entry(cx);
 
 
 813}
 814
 815static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
 816					   struct cpuidle_device *dev)
 817{
 818	int i, count = ACPI_IDLE_STATE_START;
 819	struct acpi_processor_cx *cx;
 
 820
 821	if (max_cstate == 0)
 822		max_cstate = 1;
 823
 824	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 
 825		cx = &pr->power.states[i];
 826
 827		if (!cx->valid)
 828			continue;
 829
 830		per_cpu(acpi_cstate[count], dev->cpu) = cx;
 831
 
 
 
 
 
 
 
 
 
 832		count++;
 833		if (count == CPUIDLE_STATE_MAX)
 834			break;
 835	}
 836
 837	if (!count)
 838		return -EINVAL;
 839
 840	return 0;
 841}
 842
 843static int acpi_processor_setup_cstates(struct acpi_processor *pr)
 844{
 845	int i, count;
 846	struct acpi_processor_cx *cx;
 847	struct cpuidle_state *state;
 848	struct cpuidle_driver *drv = &acpi_idle_driver;
 849
 850	if (max_cstate == 0)
 851		max_cstate = 1;
 852
 853	if (IS_ENABLED(CONFIG_ARCH_HAS_CPU_RELAX)) {
 854		cpuidle_poll_state_init(drv);
 855		count = 1;
 856	} else {
 857		count = 0;
 858	}
 859
 860	for (i = 1; i < ACPI_PROCESSOR_MAX_POWER && i <= max_cstate; i++) {
 861		cx = &pr->power.states[i];
 862
 863		if (!cx->valid)
 864			continue;
 865
 866		state = &drv->states[count];
 867		snprintf(state->name, CPUIDLE_NAME_LEN, "C%d", i);
 868		strlcpy(state->desc, cx->desc, CPUIDLE_DESC_LEN);
 869		state->exit_latency = cx->latency;
 870		state->target_residency = cx->latency * latency_factor;
 871		state->enter = acpi_idle_enter;
 872
 873		state->flags = 0;
 874		if (cx->type == ACPI_STATE_C1 || cx->type == ACPI_STATE_C2) {
 875			state->enter_dead = acpi_idle_play_dead;
 
 
 876			drv->safe_state_index = count;
 877		}
 878		/*
 879		 * Halt-induced C1 is not good for ->enter_s2idle, because it
 880		 * re-enables interrupts on exit.  Moreover, C1 is generally not
 881		 * particularly interesting from the suspend-to-idle angle, so
 882		 * avoid C1 and the situations in which we may need to fall back
 883		 * to it altogether.
 884		 */
 885		if (cx->type != ACPI_STATE_C1 && !acpi_idle_fallback_to_c1(pr))
 886			state->enter_s2idle = acpi_idle_enter_s2idle;
 887
 888		count++;
 889		if (count == CPUIDLE_STATE_MAX)
 890			break;
 891	}
 892
 893	drv->state_count = count;
 894
 895	if (!count)
 896		return -EINVAL;
 897
 898	return 0;
 899}
 900
 901static inline void acpi_processor_cstate_first_run_checks(void)
 902{
 903	acpi_status status;
 904	static int first_run;
 905
 906	if (first_run)
 907		return;
 908	dmi_check_system(processor_power_dmi_table);
 909	max_cstate = acpi_processor_cstate_check(max_cstate);
 910	if (max_cstate < ACPI_C_STATES_MAX)
 911		pr_notice("ACPI: processor limited to max C-state %d\n",
 912			  max_cstate);
 913	first_run++;
 914
 915	if (acpi_gbl_FADT.cst_control && !nocst) {
 916		status = acpi_os_write_port(acpi_gbl_FADT.smi_command,
 917					    acpi_gbl_FADT.cst_control, 8);
 918		if (ACPI_FAILURE(status))
 919			ACPI_EXCEPTION((AE_INFO, status,
 920					"Notifying BIOS of _CST ability failed"));
 921	}
 922}
 923#else
 924
 925static inline int disabled_by_idle_boot_param(void) { return 0; }
 926static inline void acpi_processor_cstate_first_run_checks(void) { }
 927static int acpi_processor_get_cstate_info(struct acpi_processor *pr)
 928{
 929	return -ENODEV;
 930}
 931
 932static int acpi_processor_setup_cpuidle_cx(struct acpi_processor *pr,
 933					   struct cpuidle_device *dev)
 934{
 935	return -EINVAL;
 936}
 937
 938static int acpi_processor_setup_cstates(struct acpi_processor *pr)
 939{
 940	return -EINVAL;
 941}
 942
 943#endif /* CONFIG_ACPI_PROCESSOR_CSTATE */
 944
 945struct acpi_lpi_states_array {
 946	unsigned int size;
 947	unsigned int composite_states_size;
 948	struct acpi_lpi_state *entries;
 949	struct acpi_lpi_state *composite_states[ACPI_PROCESSOR_MAX_POWER];
 950};
 951
 952static int obj_get_integer(union acpi_object *obj, u32 *value)
 953{
 954	if (obj->type != ACPI_TYPE_INTEGER)
 955		return -EINVAL;
 956
 957	*value = obj->integer.value;
 958	return 0;
 959}
 960
 961static int acpi_processor_evaluate_lpi(acpi_handle handle,
 962				       struct acpi_lpi_states_array *info)
 963{
 964	acpi_status status;
 965	int ret = 0;
 966	int pkg_count, state_idx = 1, loop;
 967	struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
 968	union acpi_object *lpi_data;
 969	struct acpi_lpi_state *lpi_state;
 970
 971	status = acpi_evaluate_object(handle, "_LPI", NULL, &buffer);
 972	if (ACPI_FAILURE(status)) {
 973		ACPI_DEBUG_PRINT((ACPI_DB_INFO, "No _LPI, giving up\n"));
 974		return -ENODEV;
 975	}
 976
 977	lpi_data = buffer.pointer;
 978
 979	/* There must be at least 4 elements = 3 elements + 1 package */
 980	if (!lpi_data || lpi_data->type != ACPI_TYPE_PACKAGE ||
 981	    lpi_data->package.count < 4) {
 982		pr_debug("not enough elements in _LPI\n");
 983		ret = -ENODATA;
 984		goto end;
 985	}
 986
 987	pkg_count = lpi_data->package.elements[2].integer.value;
 988
 989	/* Validate number of power states. */
 990	if (pkg_count < 1 || pkg_count != lpi_data->package.count - 3) {
 991		pr_debug("count given by _LPI is not valid\n");
 992		ret = -ENODATA;
 993		goto end;
 994	}
 995
 996	lpi_state = kcalloc(pkg_count, sizeof(*lpi_state), GFP_KERNEL);
 997	if (!lpi_state) {
 998		ret = -ENOMEM;
 999		goto end;
1000	}
1001
1002	info->size = pkg_count;
1003	info->entries = lpi_state;
1004
1005	/* LPI States start at index 3 */
1006	for (loop = 3; state_idx <= pkg_count; loop++, state_idx++, lpi_state++) {
1007		union acpi_object *element, *pkg_elem, *obj;
1008
1009		element = &lpi_data->package.elements[loop];
1010		if (element->type != ACPI_TYPE_PACKAGE || element->package.count < 7)
1011			continue;
1012
1013		pkg_elem = element->package.elements;
1014
1015		obj = pkg_elem + 6;
1016		if (obj->type == ACPI_TYPE_BUFFER) {
1017			struct acpi_power_register *reg;
1018
1019			reg = (struct acpi_power_register *)obj->buffer.pointer;
1020			if (reg->space_id != ACPI_ADR_SPACE_SYSTEM_IO &&
1021			    reg->space_id != ACPI_ADR_SPACE_FIXED_HARDWARE)
1022				continue;
1023
1024			lpi_state->address = reg->address;
1025			lpi_state->entry_method =
1026				reg->space_id == ACPI_ADR_SPACE_FIXED_HARDWARE ?
1027				ACPI_CSTATE_FFH : ACPI_CSTATE_SYSTEMIO;
1028		} else if (obj->type == ACPI_TYPE_INTEGER) {
1029			lpi_state->entry_method = ACPI_CSTATE_INTEGER;
1030			lpi_state->address = obj->integer.value;
1031		} else {
1032			continue;
1033		}
1034
1035		/* elements[7,8] skipped for now i.e. Residency/Usage counter*/
1036
1037		obj = pkg_elem + 9;
1038		if (obj->type == ACPI_TYPE_STRING)
1039			strlcpy(lpi_state->desc, obj->string.pointer,
1040				ACPI_CX_DESC_LEN);
1041
1042		lpi_state->index = state_idx;
1043		if (obj_get_integer(pkg_elem + 0, &lpi_state->min_residency)) {
1044			pr_debug("No min. residency found, assuming 10 us\n");
1045			lpi_state->min_residency = 10;
1046		}
1047
1048		if (obj_get_integer(pkg_elem + 1, &lpi_state->wake_latency)) {
1049			pr_debug("No wakeup residency found, assuming 10 us\n");
1050			lpi_state->wake_latency = 10;
1051		}
1052
1053		if (obj_get_integer(pkg_elem + 2, &lpi_state->flags))
1054			lpi_state->flags = 0;
1055
1056		if (obj_get_integer(pkg_elem + 3, &lpi_state->arch_flags))
1057			lpi_state->arch_flags = 0;
1058
1059		if (obj_get_integer(pkg_elem + 4, &lpi_state->res_cnt_freq))
1060			lpi_state->res_cnt_freq = 1;
1061
1062		if (obj_get_integer(pkg_elem + 5, &lpi_state->enable_parent_state))
1063			lpi_state->enable_parent_state = 0;
1064	}
1065
1066	acpi_handle_debug(handle, "Found %d power states\n", state_idx);
1067end:
1068	kfree(buffer.pointer);
1069	return ret;
1070}
1071
1072/*
1073 * flat_state_cnt - the number of composite LPI states after the process of flattening
1074 */
1075static int flat_state_cnt;
1076
1077/**
1078 * combine_lpi_states - combine local and parent LPI states to form a composite LPI state
1079 *
1080 * @local: local LPI state
1081 * @parent: parent LPI state
1082 * @result: composite LPI state
1083 */
1084static bool combine_lpi_states(struct acpi_lpi_state *local,
1085			       struct acpi_lpi_state *parent,
1086			       struct acpi_lpi_state *result)
1087{
1088	if (parent->entry_method == ACPI_CSTATE_INTEGER) {
1089		if (!parent->address) /* 0 means autopromotable */
1090			return false;
1091		result->address = local->address + parent->address;
1092	} else {
1093		result->address = parent->address;
1094	}
1095
1096	result->min_residency = max(local->min_residency, parent->min_residency);
1097	result->wake_latency = local->wake_latency + parent->wake_latency;
1098	result->enable_parent_state = parent->enable_parent_state;
1099	result->entry_method = local->entry_method;
1100
1101	result->flags = parent->flags;
1102	result->arch_flags = parent->arch_flags;
1103	result->index = parent->index;
1104
1105	strlcpy(result->desc, local->desc, ACPI_CX_DESC_LEN);
1106	strlcat(result->desc, "+", ACPI_CX_DESC_LEN);
1107	strlcat(result->desc, parent->desc, ACPI_CX_DESC_LEN);
1108	return true;
1109}
1110
1111#define ACPI_LPI_STATE_FLAGS_ENABLED			BIT(0)
1112
1113static void stash_composite_state(struct acpi_lpi_states_array *curr_level,
1114				  struct acpi_lpi_state *t)
1115{
1116	curr_level->composite_states[curr_level->composite_states_size++] = t;
1117}
1118
1119static int flatten_lpi_states(struct acpi_processor *pr,
1120			      struct acpi_lpi_states_array *curr_level,
1121			      struct acpi_lpi_states_array *prev_level)
1122{
1123	int i, j, state_count = curr_level->size;
1124	struct acpi_lpi_state *p, *t = curr_level->entries;
1125
1126	curr_level->composite_states_size = 0;
1127	for (j = 0; j < state_count; j++, t++) {
1128		struct acpi_lpi_state *flpi;
1129
1130		if (!(t->flags & ACPI_LPI_STATE_FLAGS_ENABLED))
1131			continue;
1132
1133		if (flat_state_cnt >= ACPI_PROCESSOR_MAX_POWER) {
1134			pr_warn("Limiting number of LPI states to max (%d)\n",
1135				ACPI_PROCESSOR_MAX_POWER);
1136			pr_warn("Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
1137			break;
1138		}
1139
1140		flpi = &pr->power.lpi_states[flat_state_cnt];
1141
1142		if (!prev_level) { /* leaf/processor node */
1143			memcpy(flpi, t, sizeof(*t));
1144			stash_composite_state(curr_level, flpi);
1145			flat_state_cnt++;
1146			continue;
1147		}
1148
1149		for (i = 0; i < prev_level->composite_states_size; i++) {
1150			p = prev_level->composite_states[i];
1151			if (t->index <= p->enable_parent_state &&
1152			    combine_lpi_states(p, t, flpi)) {
1153				stash_composite_state(curr_level, flpi);
1154				flat_state_cnt++;
1155				flpi++;
1156			}
1157		}
1158	}
1159
1160	kfree(curr_level->entries);
1161	return 0;
1162}
1163
 
 
 
 
 
1164static int acpi_processor_get_lpi_info(struct acpi_processor *pr)
1165{
1166	int ret, i;
1167	acpi_status status;
1168	acpi_handle handle = pr->handle, pr_ahandle;
1169	struct acpi_device *d = NULL;
1170	struct acpi_lpi_states_array info[2], *tmp, *prev, *curr;
1171
 
 
 
 
 
1172	if (!osc_pc_lpi_support_confirmed)
1173		return -EOPNOTSUPP;
1174
1175	if (!acpi_has_method(handle, "_LPI"))
1176		return -EINVAL;
1177
1178	flat_state_cnt = 0;
1179	prev = &info[0];
1180	curr = &info[1];
1181	handle = pr->handle;
1182	ret = acpi_processor_evaluate_lpi(handle, prev);
1183	if (ret)
1184		return ret;
1185	flatten_lpi_states(pr, prev, NULL);
1186
1187	status = acpi_get_parent(handle, &pr_ahandle);
1188	while (ACPI_SUCCESS(status)) {
1189		acpi_bus_get_device(pr_ahandle, &d);
 
 
 
1190		handle = pr_ahandle;
1191
1192		if (strcmp(acpi_device_hid(d), ACPI_PROCESSOR_CONTAINER_HID))
1193			break;
1194
1195		/* can be optional ? */
1196		if (!acpi_has_method(handle, "_LPI"))
1197			break;
1198
1199		ret = acpi_processor_evaluate_lpi(handle, curr);
1200		if (ret)
1201			break;
1202
1203		/* flatten all the LPI states in this level of hierarchy */
1204		flatten_lpi_states(pr, curr, prev);
1205
1206		tmp = prev, prev = curr, curr = tmp;
1207
1208		status = acpi_get_parent(handle, &pr_ahandle);
1209	}
1210
1211	pr->power.count = flat_state_cnt;
1212	/* reset the index after flattening */
1213	for (i = 0; i < pr->power.count; i++)
1214		pr->power.lpi_states[i].index = i;
1215
1216	/* Tell driver that _LPI is supported. */
1217	pr->flags.has_lpi = 1;
1218	pr->flags.power = 1;
1219
1220	return 0;
1221}
1222
1223int __weak acpi_processor_ffh_lpi_probe(unsigned int cpu)
1224{
1225	return -ENODEV;
1226}
1227
1228int __weak acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi)
1229{
1230	return -ENODEV;
1231}
1232
1233/**
1234 * acpi_idle_lpi_enter - enters an ACPI any LPI state
1235 * @dev: the target CPU
1236 * @drv: cpuidle driver containing cpuidle state info
1237 * @index: index of target state
1238 *
1239 * Return: 0 for success or negative value for error
1240 */
1241static int acpi_idle_lpi_enter(struct cpuidle_device *dev,
1242			       struct cpuidle_driver *drv, int index)
1243{
1244	struct acpi_processor *pr;
1245	struct acpi_lpi_state *lpi;
1246
1247	pr = __this_cpu_read(processors);
1248
1249	if (unlikely(!pr))
1250		return -EINVAL;
1251
1252	lpi = &pr->power.lpi_states[index];
1253	if (lpi->entry_method == ACPI_CSTATE_FFH)
1254		return acpi_processor_ffh_lpi_enter(lpi);
1255
1256	return -EINVAL;
1257}
1258
1259static int acpi_processor_setup_lpi_states(struct acpi_processor *pr)
1260{
1261	int i;
1262	struct acpi_lpi_state *lpi;
1263	struct cpuidle_state *state;
1264	struct cpuidle_driver *drv = &acpi_idle_driver;
1265
1266	if (!pr->flags.has_lpi)
1267		return -EOPNOTSUPP;
1268
1269	for (i = 0; i < pr->power.count && i < CPUIDLE_STATE_MAX; i++) {
1270		lpi = &pr->power.lpi_states[i];
1271
1272		state = &drv->states[i];
1273		snprintf(state->name, CPUIDLE_NAME_LEN, "LPI-%d", i);
1274		strlcpy(state->desc, lpi->desc, CPUIDLE_DESC_LEN);
1275		state->exit_latency = lpi->wake_latency;
1276		state->target_residency = lpi->min_residency;
1277		if (lpi->arch_flags)
1278			state->flags |= CPUIDLE_FLAG_TIMER_STOP;
 
1279		state->enter = acpi_idle_lpi_enter;
1280		drv->safe_state_index = i;
1281	}
1282
1283	drv->state_count = i;
1284
1285	return 0;
1286}
1287
1288/**
1289 * acpi_processor_setup_cpuidle_states- prepares and configures cpuidle
1290 * global state data i.e. idle routines
1291 *
1292 * @pr: the ACPI processor
1293 */
1294static int acpi_processor_setup_cpuidle_states(struct acpi_processor *pr)
1295{
1296	int i;
1297	struct cpuidle_driver *drv = &acpi_idle_driver;
1298
1299	if (!pr->flags.power_setup_done || !pr->flags.power)
1300		return -EINVAL;
1301
1302	drv->safe_state_index = -1;
1303	for (i = ACPI_IDLE_STATE_START; i < CPUIDLE_STATE_MAX; i++) {
1304		drv->states[i].name[0] = '\0';
1305		drv->states[i].desc[0] = '\0';
1306	}
1307
1308	if (pr->flags.has_lpi)
1309		return acpi_processor_setup_lpi_states(pr);
1310
1311	return acpi_processor_setup_cstates(pr);
1312}
1313
1314/**
1315 * acpi_processor_setup_cpuidle_dev - prepares and configures CPUIDLE
1316 * device i.e. per-cpu data
1317 *
1318 * @pr: the ACPI processor
1319 * @dev : the cpuidle device
1320 */
1321static int acpi_processor_setup_cpuidle_dev(struct acpi_processor *pr,
1322					    struct cpuidle_device *dev)
1323{
1324	if (!pr->flags.power_setup_done || !pr->flags.power || !dev)
1325		return -EINVAL;
1326
1327	dev->cpu = pr->id;
1328	if (pr->flags.has_lpi)
1329		return acpi_processor_ffh_lpi_probe(pr->id);
1330
1331	return acpi_processor_setup_cpuidle_cx(pr, dev);
1332}
1333
1334static int acpi_processor_get_power_info(struct acpi_processor *pr)
1335{
1336	int ret;
1337
1338	ret = acpi_processor_get_lpi_info(pr);
1339	if (ret)
1340		ret = acpi_processor_get_cstate_info(pr);
1341
1342	return ret;
1343}
1344
1345int acpi_processor_hotplug(struct acpi_processor *pr)
1346{
1347	int ret = 0;
1348	struct cpuidle_device *dev;
1349
1350	if (disabled_by_idle_boot_param())
1351		return 0;
1352
1353	if (!pr->flags.power_setup_done)
1354		return -ENODEV;
1355
1356	dev = per_cpu(acpi_cpuidle_device, pr->id);
1357	cpuidle_pause_and_lock();
1358	cpuidle_disable_device(dev);
1359	ret = acpi_processor_get_power_info(pr);
1360	if (!ret && pr->flags.power) {
1361		acpi_processor_setup_cpuidle_dev(pr, dev);
1362		ret = cpuidle_enable_device(dev);
1363	}
1364	cpuidle_resume_and_unlock();
1365
1366	return ret;
1367}
1368
1369int acpi_processor_power_state_has_changed(struct acpi_processor *pr)
1370{
1371	int cpu;
1372	struct acpi_processor *_pr;
1373	struct cpuidle_device *dev;
1374
1375	if (disabled_by_idle_boot_param())
1376		return 0;
1377
1378	if (!pr->flags.power_setup_done)
1379		return -ENODEV;
1380
1381	/*
1382	 * FIXME:  Design the ACPI notification to make it once per
1383	 * system instead of once per-cpu.  This condition is a hack
1384	 * to make the code that updates C-States be called once.
1385	 */
1386
1387	if (pr->id == 0 && cpuidle_get_driver() == &acpi_idle_driver) {
1388
1389		/* Protect against cpu-hotplug */
1390		get_online_cpus();
1391		cpuidle_pause_and_lock();
1392
1393		/* Disable all cpuidle devices */
1394		for_each_online_cpu(cpu) {
1395			_pr = per_cpu(processors, cpu);
1396			if (!_pr || !_pr->flags.power_setup_done)
1397				continue;
1398			dev = per_cpu(acpi_cpuidle_device, cpu);
1399			cpuidle_disable_device(dev);
1400		}
1401
1402		/* Populate Updated C-state information */
1403		acpi_processor_get_power_info(pr);
1404		acpi_processor_setup_cpuidle_states(pr);
1405
1406		/* Enable all cpuidle devices */
1407		for_each_online_cpu(cpu) {
1408			_pr = per_cpu(processors, cpu);
1409			if (!_pr || !_pr->flags.power_setup_done)
1410				continue;
1411			acpi_processor_get_power_info(_pr);
1412			if (_pr->flags.power) {
1413				dev = per_cpu(acpi_cpuidle_device, cpu);
1414				acpi_processor_setup_cpuidle_dev(_pr, dev);
1415				cpuidle_enable_device(dev);
1416			}
1417		}
1418		cpuidle_resume_and_unlock();
1419		put_online_cpus();
1420	}
1421
1422	return 0;
1423}
1424
1425static int acpi_processor_registered;
1426
1427int acpi_processor_power_init(struct acpi_processor *pr)
1428{
1429	int retval;
1430	struct cpuidle_device *dev;
1431
1432	if (disabled_by_idle_boot_param())
1433		return 0;
1434
1435	acpi_processor_cstate_first_run_checks();
1436
1437	if (!acpi_processor_get_power_info(pr))
1438		pr->flags.power_setup_done = 1;
1439
1440	/*
1441	 * Install the idle handler if processor power management is supported.
1442	 * Note that we use previously set idle handler will be used on
1443	 * platforms that only support C1.
1444	 */
1445	if (pr->flags.power) {
1446		/* Register acpi_idle_driver if not already registered */
1447		if (!acpi_processor_registered) {
1448			acpi_processor_setup_cpuidle_states(pr);
1449			retval = cpuidle_register_driver(&acpi_idle_driver);
1450			if (retval)
1451				return retval;
1452			pr_debug("%s registered with cpuidle\n",
1453				 acpi_idle_driver.name);
1454		}
1455
1456		dev = kzalloc(sizeof(*dev), GFP_KERNEL);
1457		if (!dev)
1458			return -ENOMEM;
1459		per_cpu(acpi_cpuidle_device, pr->id) = dev;
1460
1461		acpi_processor_setup_cpuidle_dev(pr, dev);
1462
1463		/* Register per-cpu cpuidle_device. Cpuidle driver
1464		 * must already be registered before registering device
1465		 */
1466		retval = cpuidle_register_device(dev);
1467		if (retval) {
1468			if (acpi_processor_registered == 0)
1469				cpuidle_unregister_driver(&acpi_idle_driver);
1470			return retval;
1471		}
1472		acpi_processor_registered++;
1473	}
1474	return 0;
1475}
1476
1477int acpi_processor_power_exit(struct acpi_processor *pr)
1478{
1479	struct cpuidle_device *dev = per_cpu(acpi_cpuidle_device, pr->id);
1480
1481	if (disabled_by_idle_boot_param())
1482		return 0;
1483
1484	if (pr->flags.power) {
1485		cpuidle_unregister_device(dev);
1486		acpi_processor_registered--;
1487		if (acpi_processor_registered == 0)
1488			cpuidle_unregister_driver(&acpi_idle_driver);
 
 
1489	}
1490
1491	pr->flags.power_setup_done = 0;
1492	return 0;
1493}