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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 A FORE Systems 200E-series driver for ATM on Linux.
4 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
5
6 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
7
8 This driver simultaneously supports PCA-200E and SBA-200E adapters
9 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
10
11*/
12
13
14#include <linux/kernel.h>
15#include <linux/slab.h>
16#include <linux/init.h>
17#include <linux/capability.h>
18#include <linux/interrupt.h>
19#include <linux/bitops.h>
20#include <linux/pci.h>
21#include <linux/module.h>
22#include <linux/atmdev.h>
23#include <linux/sonet.h>
24#include <linux/atm_suni.h>
25#include <linux/dma-mapping.h>
26#include <linux/delay.h>
27#include <linux/firmware.h>
28#include <linux/pgtable.h>
29#include <asm/io.h>
30#include <asm/string.h>
31#include <asm/page.h>
32#include <asm/irq.h>
33#include <asm/dma.h>
34#include <asm/byteorder.h>
35#include <linux/uaccess.h>
36#include <linux/atomic.h>
37
38#ifdef CONFIG_SBUS
39#include <linux/of.h>
40#include <linux/of_device.h>
41#include <asm/idprom.h>
42#include <asm/openprom.h>
43#include <asm/oplib.h>
44#endif
45
46#if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
47#define FORE200E_USE_TASKLET
48#endif
49
50#if 0 /* enable the debugging code of the buffer supply queues */
51#define FORE200E_BSQ_DEBUG
52#endif
53
54#if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
55#define FORE200E_52BYTE_AAL0_SDU
56#endif
57
58#include "fore200e.h"
59#include "suni.h"
60
61#define FORE200E_VERSION "0.3e"
62
63#define FORE200E "fore200e: "
64
65#if 0 /* override .config */
66#define CONFIG_ATM_FORE200E_DEBUG 1
67#endif
68#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
69#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
70 printk(FORE200E format, ##args); } while (0)
71#else
72#define DPRINTK(level, format, args...) do {} while (0)
73#endif
74
75
76#define FORE200E_ALIGN(addr, alignment) \
77 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
78
79#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
80
81#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
82
83#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
84
85#if 1
86#define ASSERT(expr) if (!(expr)) { \
87 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
88 __func__, __LINE__, #expr); \
89 panic(FORE200E "%s", __func__); \
90 }
91#else
92#define ASSERT(expr) do {} while (0)
93#endif
94
95
96static const struct atmdev_ops fore200e_ops;
97
98static LIST_HEAD(fore200e_boards);
99
100
101MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
102MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
103MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
104
105
106static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
107 { BUFFER_S1_NBR, BUFFER_L1_NBR },
108 { BUFFER_S2_NBR, BUFFER_L2_NBR }
109};
110
111static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
112 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
113 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
114};
115
116
117#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
118static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
119#endif
120
121
122#if 0 /* currently unused */
123static int
124fore200e_fore2atm_aal(enum fore200e_aal aal)
125{
126 switch(aal) {
127 case FORE200E_AAL0: return ATM_AAL0;
128 case FORE200E_AAL34: return ATM_AAL34;
129 case FORE200E_AAL5: return ATM_AAL5;
130 }
131
132 return -EINVAL;
133}
134#endif
135
136
137static enum fore200e_aal
138fore200e_atm2fore_aal(int aal)
139{
140 switch(aal) {
141 case ATM_AAL0: return FORE200E_AAL0;
142 case ATM_AAL34: return FORE200E_AAL34;
143 case ATM_AAL1:
144 case ATM_AAL2:
145 case ATM_AAL5: return FORE200E_AAL5;
146 }
147
148 return -EINVAL;
149}
150
151
152static char*
153fore200e_irq_itoa(int irq)
154{
155 static char str[8];
156 sprintf(str, "%d", irq);
157 return str;
158}
159
160
161/* allocate and align a chunk of memory intended to hold the data behing exchanged
162 between the driver and the adapter (using streaming DVMA) */
163
164static int
165fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
166{
167 unsigned long offset = 0;
168
169 if (alignment <= sizeof(int))
170 alignment = 0;
171
172 chunk->alloc_size = size + alignment;
173 chunk->direction = direction;
174
175 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL);
176 if (chunk->alloc_addr == NULL)
177 return -ENOMEM;
178
179 if (alignment > 0)
180 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
181
182 chunk->align_addr = chunk->alloc_addr + offset;
183
184 chunk->dma_addr = dma_map_single(fore200e->dev, chunk->align_addr,
185 size, direction);
186 if (dma_mapping_error(fore200e->dev, chunk->dma_addr)) {
187 kfree(chunk->alloc_addr);
188 return -ENOMEM;
189 }
190 return 0;
191}
192
193
194/* free a chunk of memory */
195
196static void
197fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
198{
199 dma_unmap_single(fore200e->dev, chunk->dma_addr, chunk->dma_size,
200 chunk->direction);
201 kfree(chunk->alloc_addr);
202}
203
204/*
205 * Allocate a DMA consistent chunk of memory intended to act as a communication
206 * mechanism (to hold descriptors, status, queues, etc.) shared by the driver
207 * and the adapter.
208 */
209static int
210fore200e_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
211 int size, int nbr, int alignment)
212{
213 /* returned chunks are page-aligned */
214 chunk->alloc_size = size * nbr;
215 chunk->alloc_addr = dma_alloc_coherent(fore200e->dev, chunk->alloc_size,
216 &chunk->dma_addr, GFP_KERNEL);
217 if (!chunk->alloc_addr)
218 return -ENOMEM;
219 chunk->align_addr = chunk->alloc_addr;
220 return 0;
221}
222
223/*
224 * Free a DMA consistent chunk of memory.
225 */
226static void
227fore200e_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
228{
229 dma_free_coherent(fore200e->dev, chunk->alloc_size, chunk->alloc_addr,
230 chunk->dma_addr);
231}
232
233static void
234fore200e_spin(int msecs)
235{
236 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
237 while (time_before(jiffies, timeout));
238}
239
240
241static int
242fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
243{
244 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
245 int ok;
246
247 mb();
248 do {
249 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
250 break;
251
252 } while (time_before(jiffies, timeout));
253
254#if 1
255 if (!ok) {
256 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
257 *addr, val);
258 }
259#endif
260
261 return ok;
262}
263
264
265static int
266fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
267{
268 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
269 int ok;
270
271 do {
272 if ((ok = (fore200e->bus->read(addr) == val)))
273 break;
274
275 } while (time_before(jiffies, timeout));
276
277#if 1
278 if (!ok) {
279 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
280 fore200e->bus->read(addr), val);
281 }
282#endif
283
284 return ok;
285}
286
287
288static void
289fore200e_free_rx_buf(struct fore200e* fore200e)
290{
291 int scheme, magn, nbr;
292 struct buffer* buffer;
293
294 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
295 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
296
297 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
298
299 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
300
301 struct chunk* data = &buffer[ nbr ].data;
302
303 if (data->alloc_addr != NULL)
304 fore200e_chunk_free(fore200e, data);
305 }
306 }
307 }
308 }
309}
310
311
312static void
313fore200e_uninit_bs_queue(struct fore200e* fore200e)
314{
315 int scheme, magn;
316
317 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
318 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
319
320 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
321 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
322
323 if (status->alloc_addr)
324 fore200e_dma_chunk_free(fore200e, status);
325
326 if (rbd_block->alloc_addr)
327 fore200e_dma_chunk_free(fore200e, rbd_block);
328 }
329 }
330}
331
332
333static int
334fore200e_reset(struct fore200e* fore200e, int diag)
335{
336 int ok;
337
338 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
339
340 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
341
342 fore200e->bus->reset(fore200e);
343
344 if (diag) {
345 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
346 if (ok == 0) {
347
348 printk(FORE200E "device %s self-test failed\n", fore200e->name);
349 return -ENODEV;
350 }
351
352 printk(FORE200E "device %s self-test passed\n", fore200e->name);
353
354 fore200e->state = FORE200E_STATE_RESET;
355 }
356
357 return 0;
358}
359
360
361static void
362fore200e_shutdown(struct fore200e* fore200e)
363{
364 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
365 fore200e->name, fore200e->phys_base,
366 fore200e_irq_itoa(fore200e->irq));
367
368 if (fore200e->state > FORE200E_STATE_RESET) {
369 /* first, reset the board to prevent further interrupts or data transfers */
370 fore200e_reset(fore200e, 0);
371 }
372
373 /* then, release all allocated resources */
374 switch(fore200e->state) {
375
376 case FORE200E_STATE_COMPLETE:
377 kfree(fore200e->stats);
378
379 fallthrough;
380 case FORE200E_STATE_IRQ:
381 free_irq(fore200e->irq, fore200e->atm_dev);
382
383 fallthrough;
384 case FORE200E_STATE_ALLOC_BUF:
385 fore200e_free_rx_buf(fore200e);
386
387 fallthrough;
388 case FORE200E_STATE_INIT_BSQ:
389 fore200e_uninit_bs_queue(fore200e);
390
391 fallthrough;
392 case FORE200E_STATE_INIT_RXQ:
393 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.status);
394 fore200e_dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
395
396 fallthrough;
397 case FORE200E_STATE_INIT_TXQ:
398 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.status);
399 fore200e_dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
400
401 fallthrough;
402 case FORE200E_STATE_INIT_CMDQ:
403 fore200e_dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
404
405 fallthrough;
406 case FORE200E_STATE_INITIALIZE:
407 /* nothing to do for that state */
408
409 case FORE200E_STATE_START_FW:
410 /* nothing to do for that state */
411
412 case FORE200E_STATE_RESET:
413 /* nothing to do for that state */
414
415 case FORE200E_STATE_MAP:
416 fore200e->bus->unmap(fore200e);
417
418 fallthrough;
419 case FORE200E_STATE_CONFIGURE:
420 /* nothing to do for that state */
421
422 case FORE200E_STATE_REGISTER:
423 /* XXX shouldn't we *start* by deregistering the device? */
424 atm_dev_deregister(fore200e->atm_dev);
425
426 case FORE200E_STATE_BLANK:
427 /* nothing to do for that state */
428 break;
429 }
430}
431
432
433#ifdef CONFIG_PCI
434
435static u32 fore200e_pca_read(volatile u32 __iomem *addr)
436{
437 /* on big-endian hosts, the board is configured to convert
438 the endianess of slave RAM accesses */
439 return le32_to_cpu(readl(addr));
440}
441
442
443static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
444{
445 /* on big-endian hosts, the board is configured to convert
446 the endianess of slave RAM accesses */
447 writel(cpu_to_le32(val), addr);
448}
449
450static int
451fore200e_pca_irq_check(struct fore200e* fore200e)
452{
453 /* this is a 1 bit register */
454 int irq_posted = readl(fore200e->regs.pca.psr);
455
456#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
457 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
458 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
459 }
460#endif
461
462 return irq_posted;
463}
464
465
466static void
467fore200e_pca_irq_ack(struct fore200e* fore200e)
468{
469 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
470}
471
472
473static void
474fore200e_pca_reset(struct fore200e* fore200e)
475{
476 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
477 fore200e_spin(10);
478 writel(0, fore200e->regs.pca.hcr);
479}
480
481
482static int fore200e_pca_map(struct fore200e* fore200e)
483{
484 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
485
486 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
487
488 if (fore200e->virt_base == NULL) {
489 printk(FORE200E "can't map device %s\n", fore200e->name);
490 return -EFAULT;
491 }
492
493 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
494
495 /* gain access to the PCA specific registers */
496 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
497 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
498 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
499
500 fore200e->state = FORE200E_STATE_MAP;
501 return 0;
502}
503
504
505static void
506fore200e_pca_unmap(struct fore200e* fore200e)
507{
508 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
509
510 if (fore200e->virt_base != NULL)
511 iounmap(fore200e->virt_base);
512}
513
514
515static int fore200e_pca_configure(struct fore200e *fore200e)
516{
517 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
518 u8 master_ctrl, latency;
519
520 DPRINTK(2, "device %s being configured\n", fore200e->name);
521
522 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
523 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
524 return -EIO;
525 }
526
527 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
528
529 master_ctrl = master_ctrl
530#if defined(__BIG_ENDIAN)
531 /* request the PCA board to convert the endianess of slave RAM accesses */
532 | PCA200E_CTRL_CONVERT_ENDIAN
533#endif
534#if 0
535 | PCA200E_CTRL_DIS_CACHE_RD
536 | PCA200E_CTRL_DIS_WRT_INVAL
537 | PCA200E_CTRL_ENA_CONT_REQ_MODE
538 | PCA200E_CTRL_2_CACHE_WRT_INVAL
539#endif
540 | PCA200E_CTRL_LARGE_PCI_BURSTS;
541
542 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
543
544 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
545 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
546 this may impact the performances of other PCI devices on the same bus, though */
547 latency = 192;
548 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
549
550 fore200e->state = FORE200E_STATE_CONFIGURE;
551 return 0;
552}
553
554
555static int __init
556fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
557{
558 struct host_cmdq* cmdq = &fore200e->host_cmdq;
559 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
560 struct prom_opcode opcode;
561 int ok;
562 u32 prom_dma;
563
564 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
565
566 opcode.opcode = OPCODE_GET_PROM;
567 opcode.pad = 0;
568
569 prom_dma = dma_map_single(fore200e->dev, prom, sizeof(struct prom_data),
570 DMA_FROM_DEVICE);
571 if (dma_mapping_error(fore200e->dev, prom_dma))
572 return -ENOMEM;
573
574 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
575
576 *entry->status = STATUS_PENDING;
577
578 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
579
580 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
581
582 *entry->status = STATUS_FREE;
583
584 dma_unmap_single(fore200e->dev, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
585
586 if (ok == 0) {
587 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
588 return -EIO;
589 }
590
591#if defined(__BIG_ENDIAN)
592
593#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
594
595 /* MAC address is stored as little-endian */
596 swap_here(&prom->mac_addr[0]);
597 swap_here(&prom->mac_addr[4]);
598#endif
599
600 return 0;
601}
602
603
604static int
605fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
606{
607 struct pci_dev *pci_dev = to_pci_dev(fore200e->dev);
608
609 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
610 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
611}
612
613static const struct fore200e_bus fore200e_pci_ops = {
614 .model_name = "PCA-200E",
615 .proc_name = "pca200e",
616 .descr_alignment = 32,
617 .buffer_alignment = 4,
618 .status_alignment = 32,
619 .read = fore200e_pca_read,
620 .write = fore200e_pca_write,
621 .configure = fore200e_pca_configure,
622 .map = fore200e_pca_map,
623 .reset = fore200e_pca_reset,
624 .prom_read = fore200e_pca_prom_read,
625 .unmap = fore200e_pca_unmap,
626 .irq_check = fore200e_pca_irq_check,
627 .irq_ack = fore200e_pca_irq_ack,
628 .proc_read = fore200e_pca_proc_read,
629};
630#endif /* CONFIG_PCI */
631
632#ifdef CONFIG_SBUS
633
634static u32 fore200e_sba_read(volatile u32 __iomem *addr)
635{
636 return sbus_readl(addr);
637}
638
639static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
640{
641 sbus_writel(val, addr);
642}
643
644static void fore200e_sba_irq_enable(struct fore200e *fore200e)
645{
646 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
647 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
648}
649
650static int fore200e_sba_irq_check(struct fore200e *fore200e)
651{
652 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
653}
654
655static void fore200e_sba_irq_ack(struct fore200e *fore200e)
656{
657 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
658 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
659}
660
661static void fore200e_sba_reset(struct fore200e *fore200e)
662{
663 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
664 fore200e_spin(10);
665 fore200e->bus->write(0, fore200e->regs.sba.hcr);
666}
667
668static int __init fore200e_sba_map(struct fore200e *fore200e)
669{
670 struct platform_device *op = to_platform_device(fore200e->dev);
671 unsigned int bursts;
672
673 /* gain access to the SBA specific registers */
674 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
675 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
676 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
677 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
678
679 if (!fore200e->virt_base) {
680 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
681 return -EFAULT;
682 }
683
684 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
685
686 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
687
688 /* get the supported DVMA burst sizes */
689 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
690
691 if (sbus_can_dma_64bit())
692 sbus_set_sbus64(&op->dev, bursts);
693
694 fore200e->state = FORE200E_STATE_MAP;
695 return 0;
696}
697
698static void fore200e_sba_unmap(struct fore200e *fore200e)
699{
700 struct platform_device *op = to_platform_device(fore200e->dev);
701
702 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
703 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
704 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
705 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
706}
707
708static int __init fore200e_sba_configure(struct fore200e *fore200e)
709{
710 fore200e->state = FORE200E_STATE_CONFIGURE;
711 return 0;
712}
713
714static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
715{
716 struct platform_device *op = to_platform_device(fore200e->dev);
717 const u8 *prop;
718 int len;
719
720 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
721 if (!prop)
722 return -ENODEV;
723 memcpy(&prom->mac_addr[4], prop, 4);
724
725 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
726 if (!prop)
727 return -ENODEV;
728 memcpy(&prom->mac_addr[2], prop, 4);
729
730 prom->serial_number = of_getintprop_default(op->dev.of_node,
731 "serialnumber", 0);
732 prom->hw_revision = of_getintprop_default(op->dev.of_node,
733 "promversion", 0);
734
735 return 0;
736}
737
738static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
739{
740 struct platform_device *op = to_platform_device(fore200e->dev);
741 const struct linux_prom_registers *regs;
742
743 regs = of_get_property(op->dev.of_node, "reg", NULL);
744
745 return sprintf(page, " SBUS slot/device:\t\t%d/'%pOFn'\n",
746 (regs ? regs->which_io : 0), op->dev.of_node);
747}
748
749static const struct fore200e_bus fore200e_sbus_ops = {
750 .model_name = "SBA-200E",
751 .proc_name = "sba200e",
752 .descr_alignment = 32,
753 .buffer_alignment = 64,
754 .status_alignment = 32,
755 .read = fore200e_sba_read,
756 .write = fore200e_sba_write,
757 .configure = fore200e_sba_configure,
758 .map = fore200e_sba_map,
759 .reset = fore200e_sba_reset,
760 .prom_read = fore200e_sba_prom_read,
761 .unmap = fore200e_sba_unmap,
762 .irq_enable = fore200e_sba_irq_enable,
763 .irq_check = fore200e_sba_irq_check,
764 .irq_ack = fore200e_sba_irq_ack,
765 .proc_read = fore200e_sba_proc_read,
766};
767#endif /* CONFIG_SBUS */
768
769static void
770fore200e_tx_irq(struct fore200e* fore200e)
771{
772 struct host_txq* txq = &fore200e->host_txq;
773 struct host_txq_entry* entry;
774 struct atm_vcc* vcc;
775 struct fore200e_vc_map* vc_map;
776
777 if (fore200e->host_txq.txing == 0)
778 return;
779
780 for (;;) {
781
782 entry = &txq->host_entry[ txq->tail ];
783
784 if ((*entry->status & STATUS_COMPLETE) == 0) {
785 break;
786 }
787
788 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
789 entry, txq->tail, entry->vc_map, entry->skb);
790
791 /* free copy of misaligned data */
792 kfree(entry->data);
793
794 /* remove DMA mapping */
795 dma_unmap_single(fore200e->dev, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
796 DMA_TO_DEVICE);
797
798 vc_map = entry->vc_map;
799
800 /* vcc closed since the time the entry was submitted for tx? */
801 if ((vc_map->vcc == NULL) ||
802 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
803
804 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
805 fore200e->atm_dev->number);
806
807 dev_kfree_skb_any(entry->skb);
808 }
809 else {
810 ASSERT(vc_map->vcc);
811
812 /* vcc closed then immediately re-opened? */
813 if (vc_map->incarn != entry->incarn) {
814
815 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
816 if the same vcc is immediately re-opened, those pending PDUs must
817 not be popped after the completion of their emission, as they refer
818 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
819 would be decremented by the size of the (unrelated) skb, possibly
820 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
821 we thus bind the tx entry to the current incarnation of the vcc
822 when the entry is submitted for tx. When the tx later completes,
823 if the incarnation number of the tx entry does not match the one
824 of the vcc, then this implies that the vcc has been closed then re-opened.
825 we thus just drop the skb here. */
826
827 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
828 fore200e->atm_dev->number);
829
830 dev_kfree_skb_any(entry->skb);
831 }
832 else {
833 vcc = vc_map->vcc;
834 ASSERT(vcc);
835
836 /* notify tx completion */
837 if (vcc->pop) {
838 vcc->pop(vcc, entry->skb);
839 }
840 else {
841 dev_kfree_skb_any(entry->skb);
842 }
843
844 /* check error condition */
845 if (*entry->status & STATUS_ERROR)
846 atomic_inc(&vcc->stats->tx_err);
847 else
848 atomic_inc(&vcc->stats->tx);
849 }
850 }
851
852 *entry->status = STATUS_FREE;
853
854 fore200e->host_txq.txing--;
855
856 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
857 }
858}
859
860
861#ifdef FORE200E_BSQ_DEBUG
862int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
863{
864 struct buffer* buffer;
865 int count = 0;
866
867 buffer = bsq->freebuf;
868 while (buffer) {
869
870 if (buffer->supplied) {
871 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
872 where, scheme, magn, buffer->index);
873 }
874
875 if (buffer->magn != magn) {
876 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
877 where, scheme, magn, buffer->index, buffer->magn);
878 }
879
880 if (buffer->scheme != scheme) {
881 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
882 where, scheme, magn, buffer->index, buffer->scheme);
883 }
884
885 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
886 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
887 where, scheme, magn, buffer->index);
888 }
889
890 count++;
891 buffer = buffer->next;
892 }
893
894 if (count != bsq->freebuf_count) {
895 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
896 where, scheme, magn, count, bsq->freebuf_count);
897 }
898 return 0;
899}
900#endif
901
902
903static void
904fore200e_supply(struct fore200e* fore200e)
905{
906 int scheme, magn, i;
907
908 struct host_bsq* bsq;
909 struct host_bsq_entry* entry;
910 struct buffer* buffer;
911
912 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
913 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
914
915 bsq = &fore200e->host_bsq[ scheme ][ magn ];
916
917#ifdef FORE200E_BSQ_DEBUG
918 bsq_audit(1, bsq, scheme, magn);
919#endif
920 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
921
922 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
923 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
924
925 entry = &bsq->host_entry[ bsq->head ];
926
927 for (i = 0; i < RBD_BLK_SIZE; i++) {
928
929 /* take the first buffer in the free buffer list */
930 buffer = bsq->freebuf;
931 if (!buffer) {
932 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
933 scheme, magn, bsq->freebuf_count);
934 return;
935 }
936 bsq->freebuf = buffer->next;
937
938#ifdef FORE200E_BSQ_DEBUG
939 if (buffer->supplied)
940 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
941 scheme, magn, buffer->index);
942 buffer->supplied = 1;
943#endif
944 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
945 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
946 }
947
948 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
949
950 /* decrease accordingly the number of free rx buffers */
951 bsq->freebuf_count -= RBD_BLK_SIZE;
952
953 *entry->status = STATUS_PENDING;
954 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
955 }
956 }
957 }
958}
959
960
961static int
962fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
963{
964 struct sk_buff* skb;
965 struct buffer* buffer;
966 struct fore200e_vcc* fore200e_vcc;
967 int i, pdu_len = 0;
968#ifdef FORE200E_52BYTE_AAL0_SDU
969 u32 cell_header = 0;
970#endif
971
972 ASSERT(vcc);
973
974 fore200e_vcc = FORE200E_VCC(vcc);
975 ASSERT(fore200e_vcc);
976
977#ifdef FORE200E_52BYTE_AAL0_SDU
978 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
979
980 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
981 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
982 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
983 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
984 rpd->atm_header.clp;
985 pdu_len = 4;
986 }
987#endif
988
989 /* compute total PDU length */
990 for (i = 0; i < rpd->nseg; i++)
991 pdu_len += rpd->rsd[ i ].length;
992
993 skb = alloc_skb(pdu_len, GFP_ATOMIC);
994 if (skb == NULL) {
995 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
996
997 atomic_inc(&vcc->stats->rx_drop);
998 return -ENOMEM;
999 }
1000
1001 __net_timestamp(skb);
1002
1003#ifdef FORE200E_52BYTE_AAL0_SDU
1004 if (cell_header) {
1005 *((u32*)skb_put(skb, 4)) = cell_header;
1006 }
1007#endif
1008
1009 /* reassemble segments */
1010 for (i = 0; i < rpd->nseg; i++) {
1011
1012 /* rebuild rx buffer address from rsd handle */
1013 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1014
1015 /* Make device DMA transfer visible to CPU. */
1016 dma_sync_single_for_cpu(fore200e->dev, buffer->data.dma_addr,
1017 rpd->rsd[i].length, DMA_FROM_DEVICE);
1018
1019 skb_put_data(skb, buffer->data.align_addr, rpd->rsd[i].length);
1020
1021 /* Now let the device get at it again. */
1022 dma_sync_single_for_device(fore200e->dev, buffer->data.dma_addr,
1023 rpd->rsd[i].length, DMA_FROM_DEVICE);
1024 }
1025
1026 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1027
1028 if (pdu_len < fore200e_vcc->rx_min_pdu)
1029 fore200e_vcc->rx_min_pdu = pdu_len;
1030 if (pdu_len > fore200e_vcc->rx_max_pdu)
1031 fore200e_vcc->rx_max_pdu = pdu_len;
1032 fore200e_vcc->rx_pdu++;
1033
1034 /* push PDU */
1035 if (atm_charge(vcc, skb->truesize) == 0) {
1036
1037 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1038 vcc->itf, vcc->vpi, vcc->vci);
1039
1040 dev_kfree_skb_any(skb);
1041
1042 atomic_inc(&vcc->stats->rx_drop);
1043 return -ENOMEM;
1044 }
1045
1046 vcc->push(vcc, skb);
1047 atomic_inc(&vcc->stats->rx);
1048
1049 return 0;
1050}
1051
1052
1053static void
1054fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1055{
1056 struct host_bsq* bsq;
1057 struct buffer* buffer;
1058 int i;
1059
1060 for (i = 0; i < rpd->nseg; i++) {
1061
1062 /* rebuild rx buffer address from rsd handle */
1063 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1064
1065 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1066
1067#ifdef FORE200E_BSQ_DEBUG
1068 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1069
1070 if (buffer->supplied == 0)
1071 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1072 buffer->scheme, buffer->magn, buffer->index);
1073 buffer->supplied = 0;
1074#endif
1075
1076 /* re-insert the buffer into the free buffer list */
1077 buffer->next = bsq->freebuf;
1078 bsq->freebuf = buffer;
1079
1080 /* then increment the number of free rx buffers */
1081 bsq->freebuf_count++;
1082 }
1083}
1084
1085
1086static void
1087fore200e_rx_irq(struct fore200e* fore200e)
1088{
1089 struct host_rxq* rxq = &fore200e->host_rxq;
1090 struct host_rxq_entry* entry;
1091 struct atm_vcc* vcc;
1092 struct fore200e_vc_map* vc_map;
1093
1094 for (;;) {
1095
1096 entry = &rxq->host_entry[ rxq->head ];
1097
1098 /* no more received PDUs */
1099 if ((*entry->status & STATUS_COMPLETE) == 0)
1100 break;
1101
1102 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1103
1104 if ((vc_map->vcc == NULL) ||
1105 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1106
1107 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1108 fore200e->atm_dev->number,
1109 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1110 }
1111 else {
1112 vcc = vc_map->vcc;
1113 ASSERT(vcc);
1114
1115 if ((*entry->status & STATUS_ERROR) == 0) {
1116
1117 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1118 }
1119 else {
1120 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1121 fore200e->atm_dev->number,
1122 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1123 atomic_inc(&vcc->stats->rx_err);
1124 }
1125 }
1126
1127 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1128
1129 fore200e_collect_rpd(fore200e, entry->rpd);
1130
1131 /* rewrite the rpd address to ack the received PDU */
1132 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1133 *entry->status = STATUS_FREE;
1134
1135 fore200e_supply(fore200e);
1136 }
1137}
1138
1139
1140#ifndef FORE200E_USE_TASKLET
1141static void
1142fore200e_irq(struct fore200e* fore200e)
1143{
1144 unsigned long flags;
1145
1146 spin_lock_irqsave(&fore200e->q_lock, flags);
1147 fore200e_rx_irq(fore200e);
1148 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1149
1150 spin_lock_irqsave(&fore200e->q_lock, flags);
1151 fore200e_tx_irq(fore200e);
1152 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1153}
1154#endif
1155
1156
1157static irqreturn_t
1158fore200e_interrupt(int irq, void* dev)
1159{
1160 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1161
1162 if (fore200e->bus->irq_check(fore200e) == 0) {
1163
1164 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1165 return IRQ_NONE;
1166 }
1167 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1168
1169#ifdef FORE200E_USE_TASKLET
1170 tasklet_schedule(&fore200e->tx_tasklet);
1171 tasklet_schedule(&fore200e->rx_tasklet);
1172#else
1173 fore200e_irq(fore200e);
1174#endif
1175
1176 fore200e->bus->irq_ack(fore200e);
1177 return IRQ_HANDLED;
1178}
1179
1180
1181#ifdef FORE200E_USE_TASKLET
1182static void
1183fore200e_tx_tasklet(unsigned long data)
1184{
1185 struct fore200e* fore200e = (struct fore200e*) data;
1186 unsigned long flags;
1187
1188 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1189
1190 spin_lock_irqsave(&fore200e->q_lock, flags);
1191 fore200e_tx_irq(fore200e);
1192 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1193}
1194
1195
1196static void
1197fore200e_rx_tasklet(unsigned long data)
1198{
1199 struct fore200e* fore200e = (struct fore200e*) data;
1200 unsigned long flags;
1201
1202 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1203
1204 spin_lock_irqsave(&fore200e->q_lock, flags);
1205 fore200e_rx_irq((struct fore200e*) data);
1206 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1207}
1208#endif
1209
1210
1211static int
1212fore200e_select_scheme(struct atm_vcc* vcc)
1213{
1214 /* fairly balance the VCs over (identical) buffer schemes */
1215 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1216
1217 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1218 vcc->itf, vcc->vpi, vcc->vci, scheme);
1219
1220 return scheme;
1221}
1222
1223
1224static int
1225fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1226{
1227 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1228 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1229 struct activate_opcode activ_opcode;
1230 struct deactivate_opcode deactiv_opcode;
1231 struct vpvc vpvc;
1232 int ok;
1233 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1234
1235 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1236
1237 if (activate) {
1238 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1239
1240 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1241 activ_opcode.aal = aal;
1242 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1243 activ_opcode.pad = 0;
1244 }
1245 else {
1246 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1247 deactiv_opcode.pad = 0;
1248 }
1249
1250 vpvc.vci = vcc->vci;
1251 vpvc.vpi = vcc->vpi;
1252
1253 *entry->status = STATUS_PENDING;
1254
1255 if (activate) {
1256
1257#ifdef FORE200E_52BYTE_AAL0_SDU
1258 mtu = 48;
1259#endif
1260 /* the MTU is not used by the cp, except in the case of AAL0 */
1261 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1262 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1263 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1264 }
1265 else {
1266 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1267 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1268 }
1269
1270 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1271
1272 *entry->status = STATUS_FREE;
1273
1274 if (ok == 0) {
1275 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1276 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1277 return -EIO;
1278 }
1279
1280 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1281 activate ? "open" : "clos");
1282
1283 return 0;
1284}
1285
1286
1287#define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1288
1289static void
1290fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1291{
1292 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1293
1294 /* compute the data cells to idle cells ratio from the tx PCR */
1295 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1296 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1297 }
1298 else {
1299 /* disable rate control */
1300 rate->data_cells = rate->idle_cells = 0;
1301 }
1302}
1303
1304
1305static int
1306fore200e_open(struct atm_vcc *vcc)
1307{
1308 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1309 struct fore200e_vcc* fore200e_vcc;
1310 struct fore200e_vc_map* vc_map;
1311 unsigned long flags;
1312 int vci = vcc->vci;
1313 short vpi = vcc->vpi;
1314
1315 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1316 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1317
1318 spin_lock_irqsave(&fore200e->q_lock, flags);
1319
1320 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1321 if (vc_map->vcc) {
1322
1323 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1324
1325 printk(FORE200E "VC %d.%d.%d already in use\n",
1326 fore200e->atm_dev->number, vpi, vci);
1327
1328 return -EINVAL;
1329 }
1330
1331 vc_map->vcc = vcc;
1332
1333 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1334
1335 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1336 if (fore200e_vcc == NULL) {
1337 vc_map->vcc = NULL;
1338 return -ENOMEM;
1339 }
1340
1341 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1342 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1343 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1344 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1345 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1346 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1347 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1348
1349 /* pseudo-CBR bandwidth requested? */
1350 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1351
1352 mutex_lock(&fore200e->rate_mtx);
1353 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1354 mutex_unlock(&fore200e->rate_mtx);
1355
1356 kfree(fore200e_vcc);
1357 vc_map->vcc = NULL;
1358 return -EAGAIN;
1359 }
1360
1361 /* reserve bandwidth */
1362 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1363 mutex_unlock(&fore200e->rate_mtx);
1364 }
1365
1366 vcc->itf = vcc->dev->number;
1367
1368 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1369 set_bit(ATM_VF_ADDR, &vcc->flags);
1370
1371 vcc->dev_data = fore200e_vcc;
1372
1373 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1374
1375 vc_map->vcc = NULL;
1376
1377 clear_bit(ATM_VF_ADDR, &vcc->flags);
1378 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1379
1380 vcc->dev_data = NULL;
1381
1382 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1383
1384 kfree(fore200e_vcc);
1385 return -EINVAL;
1386 }
1387
1388 /* compute rate control parameters */
1389 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1390
1391 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1392 set_bit(ATM_VF_HASQOS, &vcc->flags);
1393
1394 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1395 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1396 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1397 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1398 }
1399
1400 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1401 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1402 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1403
1404 /* new incarnation of the vcc */
1405 vc_map->incarn = ++fore200e->incarn_count;
1406
1407 /* VC unusable before this flag is set */
1408 set_bit(ATM_VF_READY, &vcc->flags);
1409
1410 return 0;
1411}
1412
1413
1414static void
1415fore200e_close(struct atm_vcc* vcc)
1416{
1417 struct fore200e_vcc* fore200e_vcc;
1418 struct fore200e* fore200e;
1419 struct fore200e_vc_map* vc_map;
1420 unsigned long flags;
1421
1422 ASSERT(vcc);
1423 fore200e = FORE200E_DEV(vcc->dev);
1424
1425 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1426 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1427
1428 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1429
1430 clear_bit(ATM_VF_READY, &vcc->flags);
1431
1432 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1433
1434 spin_lock_irqsave(&fore200e->q_lock, flags);
1435
1436 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1437
1438 /* the vc is no longer considered as "in use" by fore200e_open() */
1439 vc_map->vcc = NULL;
1440
1441 vcc->itf = vcc->vci = vcc->vpi = 0;
1442
1443 fore200e_vcc = FORE200E_VCC(vcc);
1444 vcc->dev_data = NULL;
1445
1446 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1447
1448 /* release reserved bandwidth, if any */
1449 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1450
1451 mutex_lock(&fore200e->rate_mtx);
1452 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1453 mutex_unlock(&fore200e->rate_mtx);
1454
1455 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1456 }
1457
1458 clear_bit(ATM_VF_ADDR, &vcc->flags);
1459 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1460
1461 ASSERT(fore200e_vcc);
1462 kfree(fore200e_vcc);
1463}
1464
1465
1466static int
1467fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1468{
1469 struct fore200e* fore200e;
1470 struct fore200e_vcc* fore200e_vcc;
1471 struct fore200e_vc_map* vc_map;
1472 struct host_txq* txq;
1473 struct host_txq_entry* entry;
1474 struct tpd* tpd;
1475 struct tpd_haddr tpd_haddr;
1476 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1477 int tx_copy = 0;
1478 int tx_len = skb->len;
1479 u32* cell_header = NULL;
1480 unsigned char* skb_data;
1481 int skb_len;
1482 unsigned char* data;
1483 unsigned long flags;
1484
1485 if (!vcc)
1486 return -EINVAL;
1487
1488 fore200e = FORE200E_DEV(vcc->dev);
1489 fore200e_vcc = FORE200E_VCC(vcc);
1490
1491 if (!fore200e)
1492 return -EINVAL;
1493
1494 txq = &fore200e->host_txq;
1495 if (!fore200e_vcc)
1496 return -EINVAL;
1497
1498 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1499 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1500 dev_kfree_skb_any(skb);
1501 return -EINVAL;
1502 }
1503
1504#ifdef FORE200E_52BYTE_AAL0_SDU
1505 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1506 cell_header = (u32*) skb->data;
1507 skb_data = skb->data + 4; /* skip 4-byte cell header */
1508 skb_len = tx_len = skb->len - 4;
1509
1510 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1511 }
1512 else
1513#endif
1514 {
1515 skb_data = skb->data;
1516 skb_len = skb->len;
1517 }
1518
1519 if (((unsigned long)skb_data) & 0x3) {
1520
1521 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1522 tx_copy = 1;
1523 tx_len = skb_len;
1524 }
1525
1526 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1527
1528 /* this simply NUKES the PCA board */
1529 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1530 tx_copy = 1;
1531 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1532 }
1533
1534 if (tx_copy) {
1535 data = kmalloc(tx_len, GFP_ATOMIC);
1536 if (data == NULL) {
1537 if (vcc->pop) {
1538 vcc->pop(vcc, skb);
1539 }
1540 else {
1541 dev_kfree_skb_any(skb);
1542 }
1543 return -ENOMEM;
1544 }
1545
1546 memcpy(data, skb_data, skb_len);
1547 if (skb_len < tx_len)
1548 memset(data + skb_len, 0x00, tx_len - skb_len);
1549 }
1550 else {
1551 data = skb_data;
1552 }
1553
1554 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1555 ASSERT(vc_map->vcc == vcc);
1556
1557 retry_here:
1558
1559 spin_lock_irqsave(&fore200e->q_lock, flags);
1560
1561 entry = &txq->host_entry[ txq->head ];
1562
1563 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1564
1565 /* try to free completed tx queue entries */
1566 fore200e_tx_irq(fore200e);
1567
1568 if (*entry->status != STATUS_FREE) {
1569
1570 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1571
1572 /* retry once again? */
1573 if (--retry > 0) {
1574 udelay(50);
1575 goto retry_here;
1576 }
1577
1578 atomic_inc(&vcc->stats->tx_err);
1579
1580 fore200e->tx_sat++;
1581 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1582 fore200e->name, fore200e->cp_queues->heartbeat);
1583 if (vcc->pop) {
1584 vcc->pop(vcc, skb);
1585 }
1586 else {
1587 dev_kfree_skb_any(skb);
1588 }
1589
1590 if (tx_copy)
1591 kfree(data);
1592
1593 return -ENOBUFS;
1594 }
1595 }
1596
1597 entry->incarn = vc_map->incarn;
1598 entry->vc_map = vc_map;
1599 entry->skb = skb;
1600 entry->data = tx_copy ? data : NULL;
1601
1602 tpd = entry->tpd;
1603 tpd->tsd[ 0 ].buffer = dma_map_single(fore200e->dev, data, tx_len,
1604 DMA_TO_DEVICE);
1605 if (dma_mapping_error(fore200e->dev, tpd->tsd[0].buffer)) {
1606 if (tx_copy)
1607 kfree(data);
1608 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1609 return -ENOMEM;
1610 }
1611 tpd->tsd[ 0 ].length = tx_len;
1612
1613 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1614 txq->txing++;
1615
1616 /* The dma_map call above implies a dma_sync so the device can use it,
1617 * thus no explicit dma_sync call is necessary here.
1618 */
1619
1620 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1621 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1622 tpd->tsd[0].length, skb_len);
1623
1624 if (skb_len < fore200e_vcc->tx_min_pdu)
1625 fore200e_vcc->tx_min_pdu = skb_len;
1626 if (skb_len > fore200e_vcc->tx_max_pdu)
1627 fore200e_vcc->tx_max_pdu = skb_len;
1628 fore200e_vcc->tx_pdu++;
1629
1630 /* set tx rate control information */
1631 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1632 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1633
1634 if (cell_header) {
1635 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1636 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1637 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1638 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1639 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1640 }
1641 else {
1642 /* set the ATM header, common to all cells conveying the PDU */
1643 tpd->atm_header.clp = 0;
1644 tpd->atm_header.plt = 0;
1645 tpd->atm_header.vci = vcc->vci;
1646 tpd->atm_header.vpi = vcc->vpi;
1647 tpd->atm_header.gfc = 0;
1648 }
1649
1650 tpd->spec.length = tx_len;
1651 tpd->spec.nseg = 1;
1652 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1653 tpd->spec.intr = 1;
1654
1655 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1656 tpd_haddr.pad = 0;
1657 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1658
1659 *entry->status = STATUS_PENDING;
1660 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1661
1662 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1663
1664 return 0;
1665}
1666
1667
1668static int
1669fore200e_getstats(struct fore200e* fore200e)
1670{
1671 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1672 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1673 struct stats_opcode opcode;
1674 int ok;
1675 u32 stats_dma_addr;
1676
1677 if (fore200e->stats == NULL) {
1678 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL);
1679 if (fore200e->stats == NULL)
1680 return -ENOMEM;
1681 }
1682
1683 stats_dma_addr = dma_map_single(fore200e->dev, fore200e->stats,
1684 sizeof(struct stats), DMA_FROM_DEVICE);
1685 if (dma_mapping_error(fore200e->dev, stats_dma_addr))
1686 return -ENOMEM;
1687
1688 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1689
1690 opcode.opcode = OPCODE_GET_STATS;
1691 opcode.pad = 0;
1692
1693 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1694
1695 *entry->status = STATUS_PENDING;
1696
1697 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1698
1699 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1700
1701 *entry->status = STATUS_FREE;
1702
1703 dma_unmap_single(fore200e->dev, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1704
1705 if (ok == 0) {
1706 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1707 return -EIO;
1708 }
1709
1710 return 0;
1711}
1712
1713#if 0 /* currently unused */
1714static int
1715fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1716{
1717 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1718 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1719 struct oc3_opcode opcode;
1720 int ok;
1721 u32 oc3_regs_dma_addr;
1722
1723 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1724
1725 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1726
1727 opcode.opcode = OPCODE_GET_OC3;
1728 opcode.reg = 0;
1729 opcode.value = 0;
1730 opcode.mask = 0;
1731
1732 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1733
1734 *entry->status = STATUS_PENDING;
1735
1736 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1737
1738 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1739
1740 *entry->status = STATUS_FREE;
1741
1742 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1743
1744 if (ok == 0) {
1745 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1746 return -EIO;
1747 }
1748
1749 return 0;
1750}
1751#endif
1752
1753
1754static int
1755fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1756{
1757 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1758 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1759 struct oc3_opcode opcode;
1760 int ok;
1761
1762 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1763
1764 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1765
1766 opcode.opcode = OPCODE_SET_OC3;
1767 opcode.reg = reg;
1768 opcode.value = value;
1769 opcode.mask = mask;
1770
1771 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1772
1773 *entry->status = STATUS_PENDING;
1774
1775 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1776
1777 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1778
1779 *entry->status = STATUS_FREE;
1780
1781 if (ok == 0) {
1782 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1783 return -EIO;
1784 }
1785
1786 return 0;
1787}
1788
1789
1790static int
1791fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1792{
1793 u32 mct_value, mct_mask;
1794 int error;
1795
1796 if (!capable(CAP_NET_ADMIN))
1797 return -EPERM;
1798
1799 switch (loop_mode) {
1800
1801 case ATM_LM_NONE:
1802 mct_value = 0;
1803 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1804 break;
1805
1806 case ATM_LM_LOC_PHY:
1807 mct_value = mct_mask = SUNI_MCT_DLE;
1808 break;
1809
1810 case ATM_LM_RMT_PHY:
1811 mct_value = mct_mask = SUNI_MCT_LLE;
1812 break;
1813
1814 default:
1815 return -EINVAL;
1816 }
1817
1818 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1819 if (error == 0)
1820 fore200e->loop_mode = loop_mode;
1821
1822 return error;
1823}
1824
1825
1826static int
1827fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1828{
1829 struct sonet_stats tmp;
1830
1831 if (fore200e_getstats(fore200e) < 0)
1832 return -EIO;
1833
1834 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1835 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1836 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1837 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1838 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1839 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1840 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1841 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1842 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1843 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1844 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1845 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1846 be32_to_cpu(fore200e->stats->aal5.cells_received);
1847
1848 if (arg)
1849 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1850
1851 return 0;
1852}
1853
1854
1855static int
1856fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1857{
1858 struct fore200e* fore200e = FORE200E_DEV(dev);
1859
1860 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1861
1862 switch (cmd) {
1863
1864 case SONET_GETSTAT:
1865 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1866
1867 case SONET_GETDIAG:
1868 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1869
1870 case ATM_SETLOOP:
1871 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1872
1873 case ATM_GETLOOP:
1874 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1875
1876 case ATM_QUERYLOOP:
1877 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1878 }
1879
1880 return -ENOSYS; /* not implemented */
1881}
1882
1883
1884static int
1885fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1886{
1887 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1888 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1889
1890 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1891 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1892 return -EINVAL;
1893 }
1894
1895 DPRINTK(2, "change_qos %d.%d.%d, "
1896 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1897 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1898 "available_cell_rate = %u",
1899 vcc->itf, vcc->vpi, vcc->vci,
1900 fore200e_traffic_class[ qos->txtp.traffic_class ],
1901 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1902 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1903 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
1904 flags, fore200e->available_cell_rate);
1905
1906 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
1907
1908 mutex_lock(&fore200e->rate_mtx);
1909 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
1910 mutex_unlock(&fore200e->rate_mtx);
1911 return -EAGAIN;
1912 }
1913
1914 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1915 fore200e->available_cell_rate -= qos->txtp.max_pcr;
1916
1917 mutex_unlock(&fore200e->rate_mtx);
1918
1919 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
1920
1921 /* update rate control parameters */
1922 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
1923
1924 set_bit(ATM_VF_HASQOS, &vcc->flags);
1925
1926 return 0;
1927 }
1928
1929 return -EINVAL;
1930}
1931
1932
1933static int fore200e_irq_request(struct fore200e *fore200e)
1934{
1935 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
1936
1937 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
1938 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1939 return -EBUSY;
1940 }
1941
1942 printk(FORE200E "IRQ %s reserved for device %s\n",
1943 fore200e_irq_itoa(fore200e->irq), fore200e->name);
1944
1945#ifdef FORE200E_USE_TASKLET
1946 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
1947 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
1948#endif
1949
1950 fore200e->state = FORE200E_STATE_IRQ;
1951 return 0;
1952}
1953
1954
1955static int fore200e_get_esi(struct fore200e *fore200e)
1956{
1957 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL);
1958 int ok, i;
1959
1960 if (!prom)
1961 return -ENOMEM;
1962
1963 ok = fore200e->bus->prom_read(fore200e, prom);
1964 if (ok < 0) {
1965 kfree(prom);
1966 return -EBUSY;
1967 }
1968
1969 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
1970 fore200e->name,
1971 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
1972 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
1973
1974 for (i = 0; i < ESI_LEN; i++) {
1975 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
1976 }
1977
1978 kfree(prom);
1979
1980 return 0;
1981}
1982
1983
1984static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
1985{
1986 int scheme, magn, nbr, size, i;
1987
1988 struct host_bsq* bsq;
1989 struct buffer* buffer;
1990
1991 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1992 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1993
1994 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1995
1996 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
1997 size = fore200e_rx_buf_size[ scheme ][ magn ];
1998
1999 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2000
2001 /* allocate the array of receive buffers */
2002 buffer = bsq->buffer = kcalloc(nbr, sizeof(struct buffer),
2003 GFP_KERNEL);
2004
2005 if (buffer == NULL)
2006 return -ENOMEM;
2007
2008 bsq->freebuf = NULL;
2009
2010 for (i = 0; i < nbr; i++) {
2011
2012 buffer[ i ].scheme = scheme;
2013 buffer[ i ].magn = magn;
2014#ifdef FORE200E_BSQ_DEBUG
2015 buffer[ i ].index = i;
2016 buffer[ i ].supplied = 0;
2017#endif
2018
2019 /* allocate the receive buffer body */
2020 if (fore200e_chunk_alloc(fore200e,
2021 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2022 DMA_FROM_DEVICE) < 0) {
2023
2024 while (i > 0)
2025 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2026 kfree(buffer);
2027
2028 return -ENOMEM;
2029 }
2030
2031 /* insert the buffer into the free buffer list */
2032 buffer[ i ].next = bsq->freebuf;
2033 bsq->freebuf = &buffer[ i ];
2034 }
2035 /* all the buffers are free, initially */
2036 bsq->freebuf_count = nbr;
2037
2038#ifdef FORE200E_BSQ_DEBUG
2039 bsq_audit(3, bsq, scheme, magn);
2040#endif
2041 }
2042 }
2043
2044 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2045 return 0;
2046}
2047
2048
2049static int fore200e_init_bs_queue(struct fore200e *fore200e)
2050{
2051 int scheme, magn, i;
2052
2053 struct host_bsq* bsq;
2054 struct cp_bsq_entry __iomem * cp_entry;
2055
2056 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2057 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2058
2059 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2060
2061 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2062
2063 /* allocate and align the array of status words */
2064 if (fore200e_dma_chunk_alloc(fore200e,
2065 &bsq->status,
2066 sizeof(enum status),
2067 QUEUE_SIZE_BS,
2068 fore200e->bus->status_alignment) < 0) {
2069 return -ENOMEM;
2070 }
2071
2072 /* allocate and align the array of receive buffer descriptors */
2073 if (fore200e_dma_chunk_alloc(fore200e,
2074 &bsq->rbd_block,
2075 sizeof(struct rbd_block),
2076 QUEUE_SIZE_BS,
2077 fore200e->bus->descr_alignment) < 0) {
2078
2079 fore200e_dma_chunk_free(fore200e, &bsq->status);
2080 return -ENOMEM;
2081 }
2082
2083 /* get the base address of the cp resident buffer supply queue entries */
2084 cp_entry = fore200e->virt_base +
2085 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2086
2087 /* fill the host resident and cp resident buffer supply queue entries */
2088 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2089
2090 bsq->host_entry[ i ].status =
2091 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2092 bsq->host_entry[ i ].rbd_block =
2093 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2094 bsq->host_entry[ i ].rbd_block_dma =
2095 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2096 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2097
2098 *bsq->host_entry[ i ].status = STATUS_FREE;
2099
2100 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2101 &cp_entry[ i ].status_haddr);
2102 }
2103 }
2104 }
2105
2106 fore200e->state = FORE200E_STATE_INIT_BSQ;
2107 return 0;
2108}
2109
2110
2111static int fore200e_init_rx_queue(struct fore200e *fore200e)
2112{
2113 struct host_rxq* rxq = &fore200e->host_rxq;
2114 struct cp_rxq_entry __iomem * cp_entry;
2115 int i;
2116
2117 DPRINTK(2, "receive queue is being initialized\n");
2118
2119 /* allocate and align the array of status words */
2120 if (fore200e_dma_chunk_alloc(fore200e,
2121 &rxq->status,
2122 sizeof(enum status),
2123 QUEUE_SIZE_RX,
2124 fore200e->bus->status_alignment) < 0) {
2125 return -ENOMEM;
2126 }
2127
2128 /* allocate and align the array of receive PDU descriptors */
2129 if (fore200e_dma_chunk_alloc(fore200e,
2130 &rxq->rpd,
2131 sizeof(struct rpd),
2132 QUEUE_SIZE_RX,
2133 fore200e->bus->descr_alignment) < 0) {
2134
2135 fore200e_dma_chunk_free(fore200e, &rxq->status);
2136 return -ENOMEM;
2137 }
2138
2139 /* get the base address of the cp resident rx queue entries */
2140 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2141
2142 /* fill the host resident and cp resident rx entries */
2143 for (i=0; i < QUEUE_SIZE_RX; i++) {
2144
2145 rxq->host_entry[ i ].status =
2146 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2147 rxq->host_entry[ i ].rpd =
2148 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2149 rxq->host_entry[ i ].rpd_dma =
2150 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2151 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2152
2153 *rxq->host_entry[ i ].status = STATUS_FREE;
2154
2155 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2156 &cp_entry[ i ].status_haddr);
2157
2158 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2159 &cp_entry[ i ].rpd_haddr);
2160 }
2161
2162 /* set the head entry of the queue */
2163 rxq->head = 0;
2164
2165 fore200e->state = FORE200E_STATE_INIT_RXQ;
2166 return 0;
2167}
2168
2169
2170static int fore200e_init_tx_queue(struct fore200e *fore200e)
2171{
2172 struct host_txq* txq = &fore200e->host_txq;
2173 struct cp_txq_entry __iomem * cp_entry;
2174 int i;
2175
2176 DPRINTK(2, "transmit queue is being initialized\n");
2177
2178 /* allocate and align the array of status words */
2179 if (fore200e_dma_chunk_alloc(fore200e,
2180 &txq->status,
2181 sizeof(enum status),
2182 QUEUE_SIZE_TX,
2183 fore200e->bus->status_alignment) < 0) {
2184 return -ENOMEM;
2185 }
2186
2187 /* allocate and align the array of transmit PDU descriptors */
2188 if (fore200e_dma_chunk_alloc(fore200e,
2189 &txq->tpd,
2190 sizeof(struct tpd),
2191 QUEUE_SIZE_TX,
2192 fore200e->bus->descr_alignment) < 0) {
2193
2194 fore200e_dma_chunk_free(fore200e, &txq->status);
2195 return -ENOMEM;
2196 }
2197
2198 /* get the base address of the cp resident tx queue entries */
2199 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2200
2201 /* fill the host resident and cp resident tx entries */
2202 for (i=0; i < QUEUE_SIZE_TX; i++) {
2203
2204 txq->host_entry[ i ].status =
2205 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2206 txq->host_entry[ i ].tpd =
2207 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2208 txq->host_entry[ i ].tpd_dma =
2209 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2210 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2211
2212 *txq->host_entry[ i ].status = STATUS_FREE;
2213
2214 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2215 &cp_entry[ i ].status_haddr);
2216
2217 /* although there is a one-to-one mapping of tx queue entries and tpds,
2218 we do not write here the DMA (physical) base address of each tpd into
2219 the related cp resident entry, because the cp relies on this write
2220 operation to detect that a new pdu has been submitted for tx */
2221 }
2222
2223 /* set the head and tail entries of the queue */
2224 txq->head = 0;
2225 txq->tail = 0;
2226
2227 fore200e->state = FORE200E_STATE_INIT_TXQ;
2228 return 0;
2229}
2230
2231
2232static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2233{
2234 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2235 struct cp_cmdq_entry __iomem * cp_entry;
2236 int i;
2237
2238 DPRINTK(2, "command queue is being initialized\n");
2239
2240 /* allocate and align the array of status words */
2241 if (fore200e_dma_chunk_alloc(fore200e,
2242 &cmdq->status,
2243 sizeof(enum status),
2244 QUEUE_SIZE_CMD,
2245 fore200e->bus->status_alignment) < 0) {
2246 return -ENOMEM;
2247 }
2248
2249 /* get the base address of the cp resident cmd queue entries */
2250 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2251
2252 /* fill the host resident and cp resident cmd entries */
2253 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2254
2255 cmdq->host_entry[ i ].status =
2256 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2257 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2258
2259 *cmdq->host_entry[ i ].status = STATUS_FREE;
2260
2261 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2262 &cp_entry[ i ].status_haddr);
2263 }
2264
2265 /* set the head entry of the queue */
2266 cmdq->head = 0;
2267
2268 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2269 return 0;
2270}
2271
2272
2273static void fore200e_param_bs_queue(struct fore200e *fore200e,
2274 enum buffer_scheme scheme,
2275 enum buffer_magn magn, int queue_length,
2276 int pool_size, int supply_blksize)
2277{
2278 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2279
2280 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2281 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2282 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2283 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2284}
2285
2286
2287static int fore200e_initialize(struct fore200e *fore200e)
2288{
2289 struct cp_queues __iomem * cpq;
2290 int ok, scheme, magn;
2291
2292 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2293
2294 mutex_init(&fore200e->rate_mtx);
2295 spin_lock_init(&fore200e->q_lock);
2296
2297 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2298
2299 /* enable cp to host interrupts */
2300 fore200e->bus->write(1, &cpq->imask);
2301
2302 if (fore200e->bus->irq_enable)
2303 fore200e->bus->irq_enable(fore200e);
2304
2305 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2306
2307 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2308 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2309 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2310
2311 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2312 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2313
2314 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2315 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2316 fore200e_param_bs_queue(fore200e, scheme, magn,
2317 QUEUE_SIZE_BS,
2318 fore200e_rx_buf_nbr[ scheme ][ magn ],
2319 RBD_BLK_SIZE);
2320
2321 /* issue the initialize command */
2322 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2323 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2324
2325 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2326 if (ok == 0) {
2327 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2328 return -ENODEV;
2329 }
2330
2331 printk(FORE200E "device %s initialized\n", fore200e->name);
2332
2333 fore200e->state = FORE200E_STATE_INITIALIZE;
2334 return 0;
2335}
2336
2337
2338static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2339{
2340 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2341
2342#if 0
2343 printk("%c", c);
2344#endif
2345 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2346}
2347
2348
2349static int fore200e_monitor_getc(struct fore200e *fore200e)
2350{
2351 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2352 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2353 int c;
2354
2355 while (time_before(jiffies, timeout)) {
2356
2357 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2358
2359 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2360
2361 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2362#if 0
2363 printk("%c", c & 0xFF);
2364#endif
2365 return c & 0xFF;
2366 }
2367 }
2368
2369 return -1;
2370}
2371
2372
2373static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2374{
2375 while (*str) {
2376
2377 /* the i960 monitor doesn't accept any new character if it has something to say */
2378 while (fore200e_monitor_getc(fore200e) >= 0);
2379
2380 fore200e_monitor_putc(fore200e, *str++);
2381 }
2382
2383 while (fore200e_monitor_getc(fore200e) >= 0);
2384}
2385
2386#ifdef __LITTLE_ENDIAN
2387#define FW_EXT ".bin"
2388#else
2389#define FW_EXT "_ecd.bin2"
2390#endif
2391
2392static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2393{
2394 const struct firmware *firmware;
2395 const struct fw_header *fw_header;
2396 const __le32 *fw_data;
2397 u32 fw_size;
2398 u32 __iomem *load_addr;
2399 char buf[48];
2400 int err;
2401
2402 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2403 if ((err = request_firmware(&firmware, buf, fore200e->dev)) < 0) {
2404 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2405 return err;
2406 }
2407
2408 fw_data = (const __le32 *)firmware->data;
2409 fw_size = firmware->size / sizeof(u32);
2410 fw_header = (const struct fw_header *)firmware->data;
2411 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2412
2413 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2414 fore200e->name, load_addr, fw_size);
2415
2416 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2417 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2418 goto release;
2419 }
2420
2421 for (; fw_size--; fw_data++, load_addr++)
2422 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2423
2424 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2425
2426#if defined(__sparc_v9__)
2427 /* reported to be required by SBA cards on some sparc64 hosts */
2428 fore200e_spin(100);
2429#endif
2430
2431 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2432 fore200e_monitor_puts(fore200e, buf);
2433
2434 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2435 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2436 goto release;
2437 }
2438
2439 printk(FORE200E "device %s firmware started\n", fore200e->name);
2440
2441 fore200e->state = FORE200E_STATE_START_FW;
2442 err = 0;
2443
2444release:
2445 release_firmware(firmware);
2446 return err;
2447}
2448
2449
2450static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2451{
2452 struct atm_dev* atm_dev;
2453
2454 DPRINTK(2, "device %s being registered\n", fore200e->name);
2455
2456 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2457 -1, NULL);
2458 if (atm_dev == NULL) {
2459 printk(FORE200E "unable to register device %s\n", fore200e->name);
2460 return -ENODEV;
2461 }
2462
2463 atm_dev->dev_data = fore200e;
2464 fore200e->atm_dev = atm_dev;
2465
2466 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2467 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2468
2469 fore200e->available_cell_rate = ATM_OC3_PCR;
2470
2471 fore200e->state = FORE200E_STATE_REGISTER;
2472 return 0;
2473}
2474
2475
2476static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2477{
2478 if (fore200e_register(fore200e, parent) < 0)
2479 return -ENODEV;
2480
2481 if (fore200e->bus->configure(fore200e) < 0)
2482 return -ENODEV;
2483
2484 if (fore200e->bus->map(fore200e) < 0)
2485 return -ENODEV;
2486
2487 if (fore200e_reset(fore200e, 1) < 0)
2488 return -ENODEV;
2489
2490 if (fore200e_load_and_start_fw(fore200e) < 0)
2491 return -ENODEV;
2492
2493 if (fore200e_initialize(fore200e) < 0)
2494 return -ENODEV;
2495
2496 if (fore200e_init_cmd_queue(fore200e) < 0)
2497 return -ENOMEM;
2498
2499 if (fore200e_init_tx_queue(fore200e) < 0)
2500 return -ENOMEM;
2501
2502 if (fore200e_init_rx_queue(fore200e) < 0)
2503 return -ENOMEM;
2504
2505 if (fore200e_init_bs_queue(fore200e) < 0)
2506 return -ENOMEM;
2507
2508 if (fore200e_alloc_rx_buf(fore200e) < 0)
2509 return -ENOMEM;
2510
2511 if (fore200e_get_esi(fore200e) < 0)
2512 return -EIO;
2513
2514 if (fore200e_irq_request(fore200e) < 0)
2515 return -EBUSY;
2516
2517 fore200e_supply(fore200e);
2518
2519 /* all done, board initialization is now complete */
2520 fore200e->state = FORE200E_STATE_COMPLETE;
2521 return 0;
2522}
2523
2524#ifdef CONFIG_SBUS
2525static const struct of_device_id fore200e_sba_match[];
2526static int fore200e_sba_probe(struct platform_device *op)
2527{
2528 const struct of_device_id *match;
2529 struct fore200e *fore200e;
2530 static int index = 0;
2531 int err;
2532
2533 match = of_match_device(fore200e_sba_match, &op->dev);
2534 if (!match)
2535 return -EINVAL;
2536
2537 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2538 if (!fore200e)
2539 return -ENOMEM;
2540
2541 fore200e->bus = &fore200e_sbus_ops;
2542 fore200e->dev = &op->dev;
2543 fore200e->irq = op->archdata.irqs[0];
2544 fore200e->phys_base = op->resource[0].start;
2545
2546 sprintf(fore200e->name, "SBA-200E-%d", index);
2547
2548 err = fore200e_init(fore200e, &op->dev);
2549 if (err < 0) {
2550 fore200e_shutdown(fore200e);
2551 kfree(fore200e);
2552 return err;
2553 }
2554
2555 index++;
2556 dev_set_drvdata(&op->dev, fore200e);
2557
2558 return 0;
2559}
2560
2561static int fore200e_sba_remove(struct platform_device *op)
2562{
2563 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2564
2565 fore200e_shutdown(fore200e);
2566 kfree(fore200e);
2567
2568 return 0;
2569}
2570
2571static const struct of_device_id fore200e_sba_match[] = {
2572 {
2573 .name = SBA200E_PROM_NAME,
2574 },
2575 {},
2576};
2577MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2578
2579static struct platform_driver fore200e_sba_driver = {
2580 .driver = {
2581 .name = "fore_200e",
2582 .of_match_table = fore200e_sba_match,
2583 },
2584 .probe = fore200e_sba_probe,
2585 .remove = fore200e_sba_remove,
2586};
2587#endif
2588
2589#ifdef CONFIG_PCI
2590static int fore200e_pca_detect(struct pci_dev *pci_dev,
2591 const struct pci_device_id *pci_ent)
2592{
2593 struct fore200e* fore200e;
2594 int err = 0;
2595 static int index = 0;
2596
2597 if (pci_enable_device(pci_dev)) {
2598 err = -EINVAL;
2599 goto out;
2600 }
2601
2602 if (dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32))) {
2603 err = -EINVAL;
2604 goto out;
2605 }
2606
2607 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2608 if (fore200e == NULL) {
2609 err = -ENOMEM;
2610 goto out_disable;
2611 }
2612
2613 fore200e->bus = &fore200e_pci_ops;
2614 fore200e->dev = &pci_dev->dev;
2615 fore200e->irq = pci_dev->irq;
2616 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2617
2618 sprintf(fore200e->name, "PCA-200E-%d", index - 1);
2619
2620 pci_set_master(pci_dev);
2621
2622 printk(FORE200E "device PCA-200E found at 0x%lx, IRQ %s\n",
2623 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2624
2625 sprintf(fore200e->name, "PCA-200E-%d", index);
2626
2627 err = fore200e_init(fore200e, &pci_dev->dev);
2628 if (err < 0) {
2629 fore200e_shutdown(fore200e);
2630 goto out_free;
2631 }
2632
2633 ++index;
2634 pci_set_drvdata(pci_dev, fore200e);
2635
2636out:
2637 return err;
2638
2639out_free:
2640 kfree(fore200e);
2641out_disable:
2642 pci_disable_device(pci_dev);
2643 goto out;
2644}
2645
2646
2647static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2648{
2649 struct fore200e *fore200e;
2650
2651 fore200e = pci_get_drvdata(pci_dev);
2652
2653 fore200e_shutdown(fore200e);
2654 kfree(fore200e);
2655 pci_disable_device(pci_dev);
2656}
2657
2658
2659static const struct pci_device_id fore200e_pca_tbl[] = {
2660 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID },
2661 { 0, }
2662};
2663
2664MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2665
2666static struct pci_driver fore200e_pca_driver = {
2667 .name = "fore_200e",
2668 .probe = fore200e_pca_detect,
2669 .remove = fore200e_pca_remove_one,
2670 .id_table = fore200e_pca_tbl,
2671};
2672#endif
2673
2674static int __init fore200e_module_init(void)
2675{
2676 int err = 0;
2677
2678 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2679
2680#ifdef CONFIG_SBUS
2681 err = platform_driver_register(&fore200e_sba_driver);
2682 if (err)
2683 return err;
2684#endif
2685
2686#ifdef CONFIG_PCI
2687 err = pci_register_driver(&fore200e_pca_driver);
2688#endif
2689
2690#ifdef CONFIG_SBUS
2691 if (err)
2692 platform_driver_unregister(&fore200e_sba_driver);
2693#endif
2694
2695 return err;
2696}
2697
2698static void __exit fore200e_module_cleanup(void)
2699{
2700#ifdef CONFIG_PCI
2701 pci_unregister_driver(&fore200e_pca_driver);
2702#endif
2703#ifdef CONFIG_SBUS
2704 platform_driver_unregister(&fore200e_sba_driver);
2705#endif
2706}
2707
2708static int
2709fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2710{
2711 struct fore200e* fore200e = FORE200E_DEV(dev);
2712 struct fore200e_vcc* fore200e_vcc;
2713 struct atm_vcc* vcc;
2714 int i, len, left = *pos;
2715 unsigned long flags;
2716
2717 if (!left--) {
2718
2719 if (fore200e_getstats(fore200e) < 0)
2720 return -EIO;
2721
2722 len = sprintf(page,"\n"
2723 " device:\n"
2724 " internal name:\t\t%s\n", fore200e->name);
2725
2726 /* print bus-specific information */
2727 if (fore200e->bus->proc_read)
2728 len += fore200e->bus->proc_read(fore200e, page + len);
2729
2730 len += sprintf(page + len,
2731 " interrupt line:\t\t%s\n"
2732 " physical base address:\t0x%p\n"
2733 " virtual base address:\t0x%p\n"
2734 " factory address (ESI):\t%pM\n"
2735 " board serial number:\t\t%d\n\n",
2736 fore200e_irq_itoa(fore200e->irq),
2737 (void*)fore200e->phys_base,
2738 fore200e->virt_base,
2739 fore200e->esi,
2740 fore200e->esi[4] * 256 + fore200e->esi[5]);
2741
2742 return len;
2743 }
2744
2745 if (!left--)
2746 return sprintf(page,
2747 " free small bufs, scheme 1:\t%d\n"
2748 " free large bufs, scheme 1:\t%d\n"
2749 " free small bufs, scheme 2:\t%d\n"
2750 " free large bufs, scheme 2:\t%d\n",
2751 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2752 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2753 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2754 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2755
2756 if (!left--) {
2757 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2758
2759 len = sprintf(page,"\n\n"
2760 " cell processor:\n"
2761 " heartbeat state:\t\t");
2762
2763 if (hb >> 16 != 0xDEAD)
2764 len += sprintf(page + len, "0x%08x\n", hb);
2765 else
2766 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2767
2768 return len;
2769 }
2770
2771 if (!left--) {
2772 static const char* media_name[] = {
2773 "unshielded twisted pair",
2774 "multimode optical fiber ST",
2775 "multimode optical fiber SC",
2776 "single-mode optical fiber ST",
2777 "single-mode optical fiber SC",
2778 "unknown"
2779 };
2780
2781 static const char* oc3_mode[] = {
2782 "normal operation",
2783 "diagnostic loopback",
2784 "line loopback",
2785 "unknown"
2786 };
2787
2788 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2789 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2790 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2791 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2792 u32 oc3_index;
2793
2794 if (media_index > 4)
2795 media_index = 5;
2796
2797 switch (fore200e->loop_mode) {
2798 case ATM_LM_NONE: oc3_index = 0;
2799 break;
2800 case ATM_LM_LOC_PHY: oc3_index = 1;
2801 break;
2802 case ATM_LM_RMT_PHY: oc3_index = 2;
2803 break;
2804 default: oc3_index = 3;
2805 }
2806
2807 return sprintf(page,
2808 " firmware release:\t\t%d.%d.%d\n"
2809 " monitor release:\t\t%d.%d\n"
2810 " media type:\t\t\t%s\n"
2811 " OC-3 revision:\t\t0x%x\n"
2812 " OC-3 mode:\t\t\t%s",
2813 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2814 mon960_release >> 16, mon960_release << 16 >> 16,
2815 media_name[ media_index ],
2816 oc3_revision,
2817 oc3_mode[ oc3_index ]);
2818 }
2819
2820 if (!left--) {
2821 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2822
2823 return sprintf(page,
2824 "\n\n"
2825 " monitor:\n"
2826 " version number:\t\t%d\n"
2827 " boot status word:\t\t0x%08x\n",
2828 fore200e->bus->read(&cp_monitor->mon_version),
2829 fore200e->bus->read(&cp_monitor->bstat));
2830 }
2831
2832 if (!left--)
2833 return sprintf(page,
2834 "\n"
2835 " device statistics:\n"
2836 " 4b5b:\n"
2837 " crc_header_errors:\t\t%10u\n"
2838 " framing_errors:\t\t%10u\n",
2839 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2840 be32_to_cpu(fore200e->stats->phy.framing_errors));
2841
2842 if (!left--)
2843 return sprintf(page, "\n"
2844 " OC-3:\n"
2845 " section_bip8_errors:\t%10u\n"
2846 " path_bip8_errors:\t\t%10u\n"
2847 " line_bip24_errors:\t\t%10u\n"
2848 " line_febe_errors:\t\t%10u\n"
2849 " path_febe_errors:\t\t%10u\n"
2850 " corr_hcs_errors:\t\t%10u\n"
2851 " ucorr_hcs_errors:\t\t%10u\n",
2852 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2853 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2854 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2855 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2856 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2857 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2858 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2859
2860 if (!left--)
2861 return sprintf(page,"\n"
2862 " ATM:\t\t\t\t cells\n"
2863 " TX:\t\t\t%10u\n"
2864 " RX:\t\t\t%10u\n"
2865 " vpi out of range:\t\t%10u\n"
2866 " vpi no conn:\t\t%10u\n"
2867 " vci out of range:\t\t%10u\n"
2868 " vci no conn:\t\t%10u\n",
2869 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2870 be32_to_cpu(fore200e->stats->atm.cells_received),
2871 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2872 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2873 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2874 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2875
2876 if (!left--)
2877 return sprintf(page,"\n"
2878 " AAL0:\t\t\t cells\n"
2879 " TX:\t\t\t%10u\n"
2880 " RX:\t\t\t%10u\n"
2881 " dropped:\t\t\t%10u\n",
2882 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2883 be32_to_cpu(fore200e->stats->aal0.cells_received),
2884 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2885
2886 if (!left--)
2887 return sprintf(page,"\n"
2888 " AAL3/4:\n"
2889 " SAR sublayer:\t\t cells\n"
2890 " TX:\t\t\t%10u\n"
2891 " RX:\t\t\t%10u\n"
2892 " dropped:\t\t\t%10u\n"
2893 " CRC errors:\t\t%10u\n"
2894 " protocol errors:\t\t%10u\n\n"
2895 " CS sublayer:\t\t PDUs\n"
2896 " TX:\t\t\t%10u\n"
2897 " RX:\t\t\t%10u\n"
2898 " dropped:\t\t\t%10u\n"
2899 " protocol errors:\t\t%10u\n",
2900 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
2901 be32_to_cpu(fore200e->stats->aal34.cells_received),
2902 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
2903 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
2904 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
2905 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
2906 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
2907 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
2908 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
2909
2910 if (!left--)
2911 return sprintf(page,"\n"
2912 " AAL5:\n"
2913 " SAR sublayer:\t\t cells\n"
2914 " TX:\t\t\t%10u\n"
2915 " RX:\t\t\t%10u\n"
2916 " dropped:\t\t\t%10u\n"
2917 " congestions:\t\t%10u\n\n"
2918 " CS sublayer:\t\t PDUs\n"
2919 " TX:\t\t\t%10u\n"
2920 " RX:\t\t\t%10u\n"
2921 " dropped:\t\t\t%10u\n"
2922 " CRC errors:\t\t%10u\n"
2923 " protocol errors:\t\t%10u\n",
2924 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
2925 be32_to_cpu(fore200e->stats->aal5.cells_received),
2926 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
2927 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
2928 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
2929 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
2930 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
2931 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
2932 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
2933
2934 if (!left--)
2935 return sprintf(page,"\n"
2936 " AUX:\t\t allocation failures\n"
2937 " small b1:\t\t\t%10u\n"
2938 " large b1:\t\t\t%10u\n"
2939 " small b2:\t\t\t%10u\n"
2940 " large b2:\t\t\t%10u\n"
2941 " RX PDUs:\t\t\t%10u\n"
2942 " TX PDUs:\t\t\t%10lu\n",
2943 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
2944 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
2945 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
2946 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
2947 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
2948 fore200e->tx_sat);
2949
2950 if (!left--)
2951 return sprintf(page,"\n"
2952 " receive carrier:\t\t\t%s\n",
2953 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
2954
2955 if (!left--) {
2956 return sprintf(page,"\n"
2957 " VCCs:\n address VPI VCI AAL "
2958 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
2959 }
2960
2961 for (i = 0; i < NBR_CONNECT; i++) {
2962
2963 vcc = fore200e->vc_map[i].vcc;
2964
2965 if (vcc == NULL)
2966 continue;
2967
2968 spin_lock_irqsave(&fore200e->q_lock, flags);
2969
2970 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
2971
2972 fore200e_vcc = FORE200E_VCC(vcc);
2973 ASSERT(fore200e_vcc);
2974
2975 len = sprintf(page,
2976 " %pK %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
2977 vcc,
2978 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
2979 fore200e_vcc->tx_pdu,
2980 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
2981 fore200e_vcc->tx_max_pdu,
2982 fore200e_vcc->rx_pdu,
2983 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
2984 fore200e_vcc->rx_max_pdu);
2985
2986 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2987 return len;
2988 }
2989
2990 spin_unlock_irqrestore(&fore200e->q_lock, flags);
2991 }
2992
2993 return 0;
2994}
2995
2996module_init(fore200e_module_init);
2997module_exit(fore200e_module_cleanup);
2998
2999
3000static const struct atmdev_ops fore200e_ops = {
3001 .open = fore200e_open,
3002 .close = fore200e_close,
3003 .ioctl = fore200e_ioctl,
3004 .send = fore200e_send,
3005 .change_qos = fore200e_change_qos,
3006 .proc_read = fore200e_proc_read,
3007 .owner = THIS_MODULE
3008};
3009
3010MODULE_LICENSE("GPL");
3011#ifdef CONFIG_PCI
3012#ifdef __LITTLE_ENDIAN__
3013MODULE_FIRMWARE("pca200e.bin");
3014#else
3015MODULE_FIRMWARE("pca200e_ecd.bin2");
3016#endif
3017#endif /* CONFIG_PCI */
3018#ifdef CONFIG_SBUS
3019MODULE_FIRMWARE("sba200e_ecd.bin2");
3020#endif
1/*
2 A FORE Systems 200E-series driver for ATM on Linux.
3 Christophe Lizzi (lizzi@cnam.fr), October 1999-March 2003.
4
5 Based on the PCA-200E driver from Uwe Dannowski (Uwe.Dannowski@inf.tu-dresden.de).
6
7 This driver simultaneously supports PCA-200E and SBA-200E adapters
8 on i386, alpha (untested), powerpc, sparc and sparc64 architectures.
9
10 This program is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2 of the License, or
13 (at your option) any later version.
14
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
23*/
24
25
26#include <linux/kernel.h>
27#include <linux/slab.h>
28#include <linux/init.h>
29#include <linux/capability.h>
30#include <linux/interrupt.h>
31#include <linux/bitops.h>
32#include <linux/pci.h>
33#include <linux/module.h>
34#include <linux/atmdev.h>
35#include <linux/sonet.h>
36#include <linux/atm_suni.h>
37#include <linux/dma-mapping.h>
38#include <linux/delay.h>
39#include <linux/firmware.h>
40#include <asm/io.h>
41#include <asm/string.h>
42#include <asm/page.h>
43#include <asm/irq.h>
44#include <asm/dma.h>
45#include <asm/byteorder.h>
46#include <asm/uaccess.h>
47#include <linux/atomic.h>
48
49#ifdef CONFIG_SBUS
50#include <linux/of.h>
51#include <linux/of_device.h>
52#include <asm/idprom.h>
53#include <asm/openprom.h>
54#include <asm/oplib.h>
55#include <asm/pgtable.h>
56#endif
57
58#if defined(CONFIG_ATM_FORE200E_USE_TASKLET) /* defer interrupt work to a tasklet */
59#define FORE200E_USE_TASKLET
60#endif
61
62#if 0 /* enable the debugging code of the buffer supply queues */
63#define FORE200E_BSQ_DEBUG
64#endif
65
66#if 1 /* ensure correct handling of 52-byte AAL0 SDUs expected by atmdump-like apps */
67#define FORE200E_52BYTE_AAL0_SDU
68#endif
69
70#include "fore200e.h"
71#include "suni.h"
72
73#define FORE200E_VERSION "0.3e"
74
75#define FORE200E "fore200e: "
76
77#if 0 /* override .config */
78#define CONFIG_ATM_FORE200E_DEBUG 1
79#endif
80#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
81#define DPRINTK(level, format, args...) do { if (CONFIG_ATM_FORE200E_DEBUG >= (level)) \
82 printk(FORE200E format, ##args); } while (0)
83#else
84#define DPRINTK(level, format, args...) do {} while (0)
85#endif
86
87
88#define FORE200E_ALIGN(addr, alignment) \
89 ((((unsigned long)(addr) + (alignment - 1)) & ~(alignment - 1)) - (unsigned long)(addr))
90
91#define FORE200E_DMA_INDEX(dma_addr, type, index) ((dma_addr) + (index) * sizeof(type))
92
93#define FORE200E_INDEX(virt_addr, type, index) (&((type *)(virt_addr))[ index ])
94
95#define FORE200E_NEXT_ENTRY(index, modulo) (index = ((index) + 1) % (modulo))
96
97#if 1
98#define ASSERT(expr) if (!(expr)) { \
99 printk(FORE200E "assertion failed! %s[%d]: %s\n", \
100 __func__, __LINE__, #expr); \
101 panic(FORE200E "%s", __func__); \
102 }
103#else
104#define ASSERT(expr) do {} while (0)
105#endif
106
107
108static const struct atmdev_ops fore200e_ops;
109static const struct fore200e_bus fore200e_bus[];
110
111static LIST_HEAD(fore200e_boards);
112
113
114MODULE_AUTHOR("Christophe Lizzi - credits to Uwe Dannowski and Heikki Vatiainen");
115MODULE_DESCRIPTION("FORE Systems 200E-series ATM driver - version " FORE200E_VERSION);
116MODULE_SUPPORTED_DEVICE("PCA-200E, SBA-200E");
117
118
119static const int fore200e_rx_buf_nbr[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
120 { BUFFER_S1_NBR, BUFFER_L1_NBR },
121 { BUFFER_S2_NBR, BUFFER_L2_NBR }
122};
123
124static const int fore200e_rx_buf_size[ BUFFER_SCHEME_NBR ][ BUFFER_MAGN_NBR ] = {
125 { BUFFER_S1_SIZE, BUFFER_L1_SIZE },
126 { BUFFER_S2_SIZE, BUFFER_L2_SIZE }
127};
128
129
130#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG > 0)
131static const char* fore200e_traffic_class[] = { "NONE", "UBR", "CBR", "VBR", "ABR", "ANY" };
132#endif
133
134
135#if 0 /* currently unused */
136static int
137fore200e_fore2atm_aal(enum fore200e_aal aal)
138{
139 switch(aal) {
140 case FORE200E_AAL0: return ATM_AAL0;
141 case FORE200E_AAL34: return ATM_AAL34;
142 case FORE200E_AAL5: return ATM_AAL5;
143 }
144
145 return -EINVAL;
146}
147#endif
148
149
150static enum fore200e_aal
151fore200e_atm2fore_aal(int aal)
152{
153 switch(aal) {
154 case ATM_AAL0: return FORE200E_AAL0;
155 case ATM_AAL34: return FORE200E_AAL34;
156 case ATM_AAL1:
157 case ATM_AAL2:
158 case ATM_AAL5: return FORE200E_AAL5;
159 }
160
161 return -EINVAL;
162}
163
164
165static char*
166fore200e_irq_itoa(int irq)
167{
168 static char str[8];
169 sprintf(str, "%d", irq);
170 return str;
171}
172
173
174/* allocate and align a chunk of memory intended to hold the data behing exchanged
175 between the driver and the adapter (using streaming DVMA) */
176
177static int
178fore200e_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk, int size, int alignment, int direction)
179{
180 unsigned long offset = 0;
181
182 if (alignment <= sizeof(int))
183 alignment = 0;
184
185 chunk->alloc_size = size + alignment;
186 chunk->align_size = size;
187 chunk->direction = direction;
188
189 chunk->alloc_addr = kzalloc(chunk->alloc_size, GFP_KERNEL | GFP_DMA);
190 if (chunk->alloc_addr == NULL)
191 return -ENOMEM;
192
193 if (alignment > 0)
194 offset = FORE200E_ALIGN(chunk->alloc_addr, alignment);
195
196 chunk->align_addr = chunk->alloc_addr + offset;
197
198 chunk->dma_addr = fore200e->bus->dma_map(fore200e, chunk->align_addr, chunk->align_size, direction);
199
200 return 0;
201}
202
203
204/* free a chunk of memory */
205
206static void
207fore200e_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
208{
209 fore200e->bus->dma_unmap(fore200e, chunk->dma_addr, chunk->dma_size, chunk->direction);
210
211 kfree(chunk->alloc_addr);
212}
213
214
215static void
216fore200e_spin(int msecs)
217{
218 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
219 while (time_before(jiffies, timeout));
220}
221
222
223static int
224fore200e_poll(struct fore200e* fore200e, volatile u32* addr, u32 val, int msecs)
225{
226 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
227 int ok;
228
229 mb();
230 do {
231 if ((ok = (*addr == val)) || (*addr & STATUS_ERROR))
232 break;
233
234 } while (time_before(jiffies, timeout));
235
236#if 1
237 if (!ok) {
238 printk(FORE200E "cmd polling failed, got status 0x%08x, expected 0x%08x\n",
239 *addr, val);
240 }
241#endif
242
243 return ok;
244}
245
246
247static int
248fore200e_io_poll(struct fore200e* fore200e, volatile u32 __iomem *addr, u32 val, int msecs)
249{
250 unsigned long timeout = jiffies + msecs_to_jiffies(msecs);
251 int ok;
252
253 do {
254 if ((ok = (fore200e->bus->read(addr) == val)))
255 break;
256
257 } while (time_before(jiffies, timeout));
258
259#if 1
260 if (!ok) {
261 printk(FORE200E "I/O polling failed, got status 0x%08x, expected 0x%08x\n",
262 fore200e->bus->read(addr), val);
263 }
264#endif
265
266 return ok;
267}
268
269
270static void
271fore200e_free_rx_buf(struct fore200e* fore200e)
272{
273 int scheme, magn, nbr;
274 struct buffer* buffer;
275
276 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
277 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
278
279 if ((buffer = fore200e->host_bsq[ scheme ][ magn ].buffer) != NULL) {
280
281 for (nbr = 0; nbr < fore200e_rx_buf_nbr[ scheme ][ magn ]; nbr++) {
282
283 struct chunk* data = &buffer[ nbr ].data;
284
285 if (data->alloc_addr != NULL)
286 fore200e_chunk_free(fore200e, data);
287 }
288 }
289 }
290 }
291}
292
293
294static void
295fore200e_uninit_bs_queue(struct fore200e* fore200e)
296{
297 int scheme, magn;
298
299 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
300 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
301
302 struct chunk* status = &fore200e->host_bsq[ scheme ][ magn ].status;
303 struct chunk* rbd_block = &fore200e->host_bsq[ scheme ][ magn ].rbd_block;
304
305 if (status->alloc_addr)
306 fore200e->bus->dma_chunk_free(fore200e, status);
307
308 if (rbd_block->alloc_addr)
309 fore200e->bus->dma_chunk_free(fore200e, rbd_block);
310 }
311 }
312}
313
314
315static int
316fore200e_reset(struct fore200e* fore200e, int diag)
317{
318 int ok;
319
320 fore200e->cp_monitor = fore200e->virt_base + FORE200E_CP_MONITOR_OFFSET;
321
322 fore200e->bus->write(BSTAT_COLD_START, &fore200e->cp_monitor->bstat);
323
324 fore200e->bus->reset(fore200e);
325
326 if (diag) {
327 ok = fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_SELFTEST_OK, 1000);
328 if (ok == 0) {
329
330 printk(FORE200E "device %s self-test failed\n", fore200e->name);
331 return -ENODEV;
332 }
333
334 printk(FORE200E "device %s self-test passed\n", fore200e->name);
335
336 fore200e->state = FORE200E_STATE_RESET;
337 }
338
339 return 0;
340}
341
342
343static void
344fore200e_shutdown(struct fore200e* fore200e)
345{
346 printk(FORE200E "removing device %s at 0x%lx, IRQ %s\n",
347 fore200e->name, fore200e->phys_base,
348 fore200e_irq_itoa(fore200e->irq));
349
350 if (fore200e->state > FORE200E_STATE_RESET) {
351 /* first, reset the board to prevent further interrupts or data transfers */
352 fore200e_reset(fore200e, 0);
353 }
354
355 /* then, release all allocated resources */
356 switch(fore200e->state) {
357
358 case FORE200E_STATE_COMPLETE:
359 kfree(fore200e->stats);
360
361 case FORE200E_STATE_IRQ:
362 free_irq(fore200e->irq, fore200e->atm_dev);
363
364 case FORE200E_STATE_ALLOC_BUF:
365 fore200e_free_rx_buf(fore200e);
366
367 case FORE200E_STATE_INIT_BSQ:
368 fore200e_uninit_bs_queue(fore200e);
369
370 case FORE200E_STATE_INIT_RXQ:
371 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.status);
372 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_rxq.rpd);
373
374 case FORE200E_STATE_INIT_TXQ:
375 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.status);
376 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_txq.tpd);
377
378 case FORE200E_STATE_INIT_CMDQ:
379 fore200e->bus->dma_chunk_free(fore200e, &fore200e->host_cmdq.status);
380
381 case FORE200E_STATE_INITIALIZE:
382 /* nothing to do for that state */
383
384 case FORE200E_STATE_START_FW:
385 /* nothing to do for that state */
386
387 case FORE200E_STATE_RESET:
388 /* nothing to do for that state */
389
390 case FORE200E_STATE_MAP:
391 fore200e->bus->unmap(fore200e);
392
393 case FORE200E_STATE_CONFIGURE:
394 /* nothing to do for that state */
395
396 case FORE200E_STATE_REGISTER:
397 /* XXX shouldn't we *start* by deregistering the device? */
398 atm_dev_deregister(fore200e->atm_dev);
399
400 case FORE200E_STATE_BLANK:
401 /* nothing to do for that state */
402 break;
403 }
404}
405
406
407#ifdef CONFIG_PCI
408
409static u32 fore200e_pca_read(volatile u32 __iomem *addr)
410{
411 /* on big-endian hosts, the board is configured to convert
412 the endianess of slave RAM accesses */
413 return le32_to_cpu(readl(addr));
414}
415
416
417static void fore200e_pca_write(u32 val, volatile u32 __iomem *addr)
418{
419 /* on big-endian hosts, the board is configured to convert
420 the endianess of slave RAM accesses */
421 writel(cpu_to_le32(val), addr);
422}
423
424
425static u32
426fore200e_pca_dma_map(struct fore200e* fore200e, void* virt_addr, int size, int direction)
427{
428 u32 dma_addr = pci_map_single((struct pci_dev*)fore200e->bus_dev, virt_addr, size, direction);
429
430 DPRINTK(3, "PCI DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d, --> dma_addr = 0x%08x\n",
431 virt_addr, size, direction, dma_addr);
432
433 return dma_addr;
434}
435
436
437static void
438fore200e_pca_dma_unmap(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
439{
440 DPRINTK(3, "PCI DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d\n",
441 dma_addr, size, direction);
442
443 pci_unmap_single((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
444}
445
446
447static void
448fore200e_pca_dma_sync_for_cpu(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
449{
450 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
451
452 pci_dma_sync_single_for_cpu((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
453}
454
455static void
456fore200e_pca_dma_sync_for_device(struct fore200e* fore200e, u32 dma_addr, int size, int direction)
457{
458 DPRINTK(3, "PCI DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
459
460 pci_dma_sync_single_for_device((struct pci_dev*)fore200e->bus_dev, dma_addr, size, direction);
461}
462
463
464/* allocate a DMA consistent chunk of memory intended to act as a communication mechanism
465 (to hold descriptors, status, queues, etc.) shared by the driver and the adapter */
466
467static int
468fore200e_pca_dma_chunk_alloc(struct fore200e* fore200e, struct chunk* chunk,
469 int size, int nbr, int alignment)
470{
471 /* returned chunks are page-aligned */
472 chunk->alloc_size = size * nbr;
473 chunk->alloc_addr = pci_alloc_consistent((struct pci_dev*)fore200e->bus_dev,
474 chunk->alloc_size,
475 &chunk->dma_addr);
476
477 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
478 return -ENOMEM;
479
480 chunk->align_addr = chunk->alloc_addr;
481
482 return 0;
483}
484
485
486/* free a DMA consistent chunk of memory */
487
488static void
489fore200e_pca_dma_chunk_free(struct fore200e* fore200e, struct chunk* chunk)
490{
491 pci_free_consistent((struct pci_dev*)fore200e->bus_dev,
492 chunk->alloc_size,
493 chunk->alloc_addr,
494 chunk->dma_addr);
495}
496
497
498static int
499fore200e_pca_irq_check(struct fore200e* fore200e)
500{
501 /* this is a 1 bit register */
502 int irq_posted = readl(fore200e->regs.pca.psr);
503
504#if defined(CONFIG_ATM_FORE200E_DEBUG) && (CONFIG_ATM_FORE200E_DEBUG == 2)
505 if (irq_posted && (readl(fore200e->regs.pca.hcr) & PCA200E_HCR_OUTFULL)) {
506 DPRINTK(2,"FIFO OUT full, device %d\n", fore200e->atm_dev->number);
507 }
508#endif
509
510 return irq_posted;
511}
512
513
514static void
515fore200e_pca_irq_ack(struct fore200e* fore200e)
516{
517 writel(PCA200E_HCR_CLRINTR, fore200e->regs.pca.hcr);
518}
519
520
521static void
522fore200e_pca_reset(struct fore200e* fore200e)
523{
524 writel(PCA200E_HCR_RESET, fore200e->regs.pca.hcr);
525 fore200e_spin(10);
526 writel(0, fore200e->regs.pca.hcr);
527}
528
529
530static int fore200e_pca_map(struct fore200e* fore200e)
531{
532 DPRINTK(2, "device %s being mapped in memory\n", fore200e->name);
533
534 fore200e->virt_base = ioremap(fore200e->phys_base, PCA200E_IOSPACE_LENGTH);
535
536 if (fore200e->virt_base == NULL) {
537 printk(FORE200E "can't map device %s\n", fore200e->name);
538 return -EFAULT;
539 }
540
541 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
542
543 /* gain access to the PCA specific registers */
544 fore200e->regs.pca.hcr = fore200e->virt_base + PCA200E_HCR_OFFSET;
545 fore200e->regs.pca.imr = fore200e->virt_base + PCA200E_IMR_OFFSET;
546 fore200e->regs.pca.psr = fore200e->virt_base + PCA200E_PSR_OFFSET;
547
548 fore200e->state = FORE200E_STATE_MAP;
549 return 0;
550}
551
552
553static void
554fore200e_pca_unmap(struct fore200e* fore200e)
555{
556 DPRINTK(2, "device %s being unmapped from memory\n", fore200e->name);
557
558 if (fore200e->virt_base != NULL)
559 iounmap(fore200e->virt_base);
560}
561
562
563static int fore200e_pca_configure(struct fore200e *fore200e)
564{
565 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
566 u8 master_ctrl, latency;
567
568 DPRINTK(2, "device %s being configured\n", fore200e->name);
569
570 if ((pci_dev->irq == 0) || (pci_dev->irq == 0xFF)) {
571 printk(FORE200E "incorrect IRQ setting - misconfigured PCI-PCI bridge?\n");
572 return -EIO;
573 }
574
575 pci_read_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, &master_ctrl);
576
577 master_ctrl = master_ctrl
578#if defined(__BIG_ENDIAN)
579 /* request the PCA board to convert the endianess of slave RAM accesses */
580 | PCA200E_CTRL_CONVERT_ENDIAN
581#endif
582#if 0
583 | PCA200E_CTRL_DIS_CACHE_RD
584 | PCA200E_CTRL_DIS_WRT_INVAL
585 | PCA200E_CTRL_ENA_CONT_REQ_MODE
586 | PCA200E_CTRL_2_CACHE_WRT_INVAL
587#endif
588 | PCA200E_CTRL_LARGE_PCI_BURSTS;
589
590 pci_write_config_byte(pci_dev, PCA200E_PCI_MASTER_CTRL, master_ctrl);
591
592 /* raise latency from 32 (default) to 192, as this seems to prevent NIC
593 lockups (under heavy rx loads) due to continuous 'FIFO OUT full' condition.
594 this may impact the performances of other PCI devices on the same bus, though */
595 latency = 192;
596 pci_write_config_byte(pci_dev, PCI_LATENCY_TIMER, latency);
597
598 fore200e->state = FORE200E_STATE_CONFIGURE;
599 return 0;
600}
601
602
603static int __init
604fore200e_pca_prom_read(struct fore200e* fore200e, struct prom_data* prom)
605{
606 struct host_cmdq* cmdq = &fore200e->host_cmdq;
607 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
608 struct prom_opcode opcode;
609 int ok;
610 u32 prom_dma;
611
612 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
613
614 opcode.opcode = OPCODE_GET_PROM;
615 opcode.pad = 0;
616
617 prom_dma = fore200e->bus->dma_map(fore200e, prom, sizeof(struct prom_data), DMA_FROM_DEVICE);
618
619 fore200e->bus->write(prom_dma, &entry->cp_entry->cmd.prom_block.prom_haddr);
620
621 *entry->status = STATUS_PENDING;
622
623 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.prom_block.opcode);
624
625 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
626
627 *entry->status = STATUS_FREE;
628
629 fore200e->bus->dma_unmap(fore200e, prom_dma, sizeof(struct prom_data), DMA_FROM_DEVICE);
630
631 if (ok == 0) {
632 printk(FORE200E "unable to get PROM data from device %s\n", fore200e->name);
633 return -EIO;
634 }
635
636#if defined(__BIG_ENDIAN)
637
638#define swap_here(addr) (*((u32*)(addr)) = swab32( *((u32*)(addr)) ))
639
640 /* MAC address is stored as little-endian */
641 swap_here(&prom->mac_addr[0]);
642 swap_here(&prom->mac_addr[4]);
643#endif
644
645 return 0;
646}
647
648
649static int
650fore200e_pca_proc_read(struct fore200e* fore200e, char *page)
651{
652 struct pci_dev* pci_dev = (struct pci_dev*)fore200e->bus_dev;
653
654 return sprintf(page, " PCI bus/slot/function:\t%d/%d/%d\n",
655 pci_dev->bus->number, PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn));
656}
657
658#endif /* CONFIG_PCI */
659
660
661#ifdef CONFIG_SBUS
662
663static u32 fore200e_sba_read(volatile u32 __iomem *addr)
664{
665 return sbus_readl(addr);
666}
667
668static void fore200e_sba_write(u32 val, volatile u32 __iomem *addr)
669{
670 sbus_writel(val, addr);
671}
672
673static u32 fore200e_sba_dma_map(struct fore200e *fore200e, void* virt_addr, int size, int direction)
674{
675 struct platform_device *op = fore200e->bus_dev;
676 u32 dma_addr;
677
678 dma_addr = dma_map_single(&op->dev, virt_addr, size, direction);
679
680 DPRINTK(3, "SBUS DVMA mapping: virt_addr = 0x%p, size = %d, direction = %d --> dma_addr = 0x%08x\n",
681 virt_addr, size, direction, dma_addr);
682
683 return dma_addr;
684}
685
686static void fore200e_sba_dma_unmap(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
687{
688 struct platform_device *op = fore200e->bus_dev;
689
690 DPRINTK(3, "SBUS DVMA unmapping: dma_addr = 0x%08x, size = %d, direction = %d,\n",
691 dma_addr, size, direction);
692
693 dma_unmap_single(&op->dev, dma_addr, size, direction);
694}
695
696static void fore200e_sba_dma_sync_for_cpu(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
697{
698 struct platform_device *op = fore200e->bus_dev;
699
700 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
701
702 dma_sync_single_for_cpu(&op->dev, dma_addr, size, direction);
703}
704
705static void fore200e_sba_dma_sync_for_device(struct fore200e *fore200e, u32 dma_addr, int size, int direction)
706{
707 struct platform_device *op = fore200e->bus_dev;
708
709 DPRINTK(3, "SBUS DVMA sync: dma_addr = 0x%08x, size = %d, direction = %d\n", dma_addr, size, direction);
710
711 dma_sync_single_for_device(&op->dev, dma_addr, size, direction);
712}
713
714/* Allocate a DVMA consistent chunk of memory intended to act as a communication mechanism
715 * (to hold descriptors, status, queues, etc.) shared by the driver and the adapter.
716 */
717static int fore200e_sba_dma_chunk_alloc(struct fore200e *fore200e, struct chunk *chunk,
718 int size, int nbr, int alignment)
719{
720 struct platform_device *op = fore200e->bus_dev;
721
722 chunk->alloc_size = chunk->align_size = size * nbr;
723
724 /* returned chunks are page-aligned */
725 chunk->alloc_addr = dma_alloc_coherent(&op->dev, chunk->alloc_size,
726 &chunk->dma_addr, GFP_ATOMIC);
727
728 if ((chunk->alloc_addr == NULL) || (chunk->dma_addr == 0))
729 return -ENOMEM;
730
731 chunk->align_addr = chunk->alloc_addr;
732
733 return 0;
734}
735
736/* free a DVMA consistent chunk of memory */
737static void fore200e_sba_dma_chunk_free(struct fore200e *fore200e, struct chunk *chunk)
738{
739 struct platform_device *op = fore200e->bus_dev;
740
741 dma_free_coherent(&op->dev, chunk->alloc_size,
742 chunk->alloc_addr, chunk->dma_addr);
743}
744
745static void fore200e_sba_irq_enable(struct fore200e *fore200e)
746{
747 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
748 fore200e->bus->write(hcr | SBA200E_HCR_INTR_ENA, fore200e->regs.sba.hcr);
749}
750
751static int fore200e_sba_irq_check(struct fore200e *fore200e)
752{
753 return fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_INTR_REQ;
754}
755
756static void fore200e_sba_irq_ack(struct fore200e *fore200e)
757{
758 u32 hcr = fore200e->bus->read(fore200e->regs.sba.hcr) & SBA200E_HCR_STICKY;
759 fore200e->bus->write(hcr | SBA200E_HCR_INTR_CLR, fore200e->regs.sba.hcr);
760}
761
762static void fore200e_sba_reset(struct fore200e *fore200e)
763{
764 fore200e->bus->write(SBA200E_HCR_RESET, fore200e->regs.sba.hcr);
765 fore200e_spin(10);
766 fore200e->bus->write(0, fore200e->regs.sba.hcr);
767}
768
769static int __init fore200e_sba_map(struct fore200e *fore200e)
770{
771 struct platform_device *op = fore200e->bus_dev;
772 unsigned int bursts;
773
774 /* gain access to the SBA specific registers */
775 fore200e->regs.sba.hcr = of_ioremap(&op->resource[0], 0, SBA200E_HCR_LENGTH, "SBA HCR");
776 fore200e->regs.sba.bsr = of_ioremap(&op->resource[1], 0, SBA200E_BSR_LENGTH, "SBA BSR");
777 fore200e->regs.sba.isr = of_ioremap(&op->resource[2], 0, SBA200E_ISR_LENGTH, "SBA ISR");
778 fore200e->virt_base = of_ioremap(&op->resource[3], 0, SBA200E_RAM_LENGTH, "SBA RAM");
779
780 if (!fore200e->virt_base) {
781 printk(FORE200E "unable to map RAM of device %s\n", fore200e->name);
782 return -EFAULT;
783 }
784
785 DPRINTK(1, "device %s mapped to 0x%p\n", fore200e->name, fore200e->virt_base);
786
787 fore200e->bus->write(0x02, fore200e->regs.sba.isr); /* XXX hardwired interrupt level */
788
789 /* get the supported DVMA burst sizes */
790 bursts = of_getintprop_default(op->dev.of_node->parent, "burst-sizes", 0x00);
791
792 if (sbus_can_dma_64bit())
793 sbus_set_sbus64(&op->dev, bursts);
794
795 fore200e->state = FORE200E_STATE_MAP;
796 return 0;
797}
798
799static void fore200e_sba_unmap(struct fore200e *fore200e)
800{
801 struct platform_device *op = fore200e->bus_dev;
802
803 of_iounmap(&op->resource[0], fore200e->regs.sba.hcr, SBA200E_HCR_LENGTH);
804 of_iounmap(&op->resource[1], fore200e->regs.sba.bsr, SBA200E_BSR_LENGTH);
805 of_iounmap(&op->resource[2], fore200e->regs.sba.isr, SBA200E_ISR_LENGTH);
806 of_iounmap(&op->resource[3], fore200e->virt_base, SBA200E_RAM_LENGTH);
807}
808
809static int __init fore200e_sba_configure(struct fore200e *fore200e)
810{
811 fore200e->state = FORE200E_STATE_CONFIGURE;
812 return 0;
813}
814
815static int __init fore200e_sba_prom_read(struct fore200e *fore200e, struct prom_data *prom)
816{
817 struct platform_device *op = fore200e->bus_dev;
818 const u8 *prop;
819 int len;
820
821 prop = of_get_property(op->dev.of_node, "madaddrlo2", &len);
822 if (!prop)
823 return -ENODEV;
824 memcpy(&prom->mac_addr[4], prop, 4);
825
826 prop = of_get_property(op->dev.of_node, "madaddrhi4", &len);
827 if (!prop)
828 return -ENODEV;
829 memcpy(&prom->mac_addr[2], prop, 4);
830
831 prom->serial_number = of_getintprop_default(op->dev.of_node,
832 "serialnumber", 0);
833 prom->hw_revision = of_getintprop_default(op->dev.of_node,
834 "promversion", 0);
835
836 return 0;
837}
838
839static int fore200e_sba_proc_read(struct fore200e *fore200e, char *page)
840{
841 struct platform_device *op = fore200e->bus_dev;
842 const struct linux_prom_registers *regs;
843
844 regs = of_get_property(op->dev.of_node, "reg", NULL);
845
846 return sprintf(page, " SBUS slot/device:\t\t%d/'%s'\n",
847 (regs ? regs->which_io : 0), op->dev.of_node->name);
848}
849#endif /* CONFIG_SBUS */
850
851
852static void
853fore200e_tx_irq(struct fore200e* fore200e)
854{
855 struct host_txq* txq = &fore200e->host_txq;
856 struct host_txq_entry* entry;
857 struct atm_vcc* vcc;
858 struct fore200e_vc_map* vc_map;
859
860 if (fore200e->host_txq.txing == 0)
861 return;
862
863 for (;;) {
864
865 entry = &txq->host_entry[ txq->tail ];
866
867 if ((*entry->status & STATUS_COMPLETE) == 0) {
868 break;
869 }
870
871 DPRINTK(3, "TX COMPLETED: entry = %p [tail = %d], vc_map = %p, skb = %p\n",
872 entry, txq->tail, entry->vc_map, entry->skb);
873
874 /* free copy of misaligned data */
875 kfree(entry->data);
876
877 /* remove DMA mapping */
878 fore200e->bus->dma_unmap(fore200e, entry->tpd->tsd[ 0 ].buffer, entry->tpd->tsd[ 0 ].length,
879 DMA_TO_DEVICE);
880
881 vc_map = entry->vc_map;
882
883 /* vcc closed since the time the entry was submitted for tx? */
884 if ((vc_map->vcc == NULL) ||
885 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
886
887 DPRINTK(1, "no ready vcc found for PDU sent on device %d\n",
888 fore200e->atm_dev->number);
889
890 dev_kfree_skb_any(entry->skb);
891 }
892 else {
893 ASSERT(vc_map->vcc);
894
895 /* vcc closed then immediately re-opened? */
896 if (vc_map->incarn != entry->incarn) {
897
898 /* when a vcc is closed, some PDUs may be still pending in the tx queue.
899 if the same vcc is immediately re-opened, those pending PDUs must
900 not be popped after the completion of their emission, as they refer
901 to the prior incarnation of that vcc. otherwise, sk_atm(vcc)->sk_wmem_alloc
902 would be decremented by the size of the (unrelated) skb, possibly
903 leading to a negative sk->sk_wmem_alloc count, ultimately freezing the vcc.
904 we thus bind the tx entry to the current incarnation of the vcc
905 when the entry is submitted for tx. When the tx later completes,
906 if the incarnation number of the tx entry does not match the one
907 of the vcc, then this implies that the vcc has been closed then re-opened.
908 we thus just drop the skb here. */
909
910 DPRINTK(1, "vcc closed-then-re-opened; dropping PDU sent on device %d\n",
911 fore200e->atm_dev->number);
912
913 dev_kfree_skb_any(entry->skb);
914 }
915 else {
916 vcc = vc_map->vcc;
917 ASSERT(vcc);
918
919 /* notify tx completion */
920 if (vcc->pop) {
921 vcc->pop(vcc, entry->skb);
922 }
923 else {
924 dev_kfree_skb_any(entry->skb);
925 }
926#if 1
927 /* race fixed by the above incarnation mechanism, but... */
928 if (atomic_read(&sk_atm(vcc)->sk_wmem_alloc) < 0) {
929 atomic_set(&sk_atm(vcc)->sk_wmem_alloc, 0);
930 }
931#endif
932 /* check error condition */
933 if (*entry->status & STATUS_ERROR)
934 atomic_inc(&vcc->stats->tx_err);
935 else
936 atomic_inc(&vcc->stats->tx);
937 }
938 }
939
940 *entry->status = STATUS_FREE;
941
942 fore200e->host_txq.txing--;
943
944 FORE200E_NEXT_ENTRY(txq->tail, QUEUE_SIZE_TX);
945 }
946}
947
948
949#ifdef FORE200E_BSQ_DEBUG
950int bsq_audit(int where, struct host_bsq* bsq, int scheme, int magn)
951{
952 struct buffer* buffer;
953 int count = 0;
954
955 buffer = bsq->freebuf;
956 while (buffer) {
957
958 if (buffer->supplied) {
959 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld supplied but in free list!\n",
960 where, scheme, magn, buffer->index);
961 }
962
963 if (buffer->magn != magn) {
964 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected magn = %d\n",
965 where, scheme, magn, buffer->index, buffer->magn);
966 }
967
968 if (buffer->scheme != scheme) {
969 printk(FORE200E "bsq_audit(%d): queue %d.%d, buffer %ld, unexpected scheme = %d\n",
970 where, scheme, magn, buffer->index, buffer->scheme);
971 }
972
973 if ((buffer->index < 0) || (buffer->index >= fore200e_rx_buf_nbr[ scheme ][ magn ])) {
974 printk(FORE200E "bsq_audit(%d): queue %d.%d, out of range buffer index = %ld !\n",
975 where, scheme, magn, buffer->index);
976 }
977
978 count++;
979 buffer = buffer->next;
980 }
981
982 if (count != bsq->freebuf_count) {
983 printk(FORE200E "bsq_audit(%d): queue %d.%d, %d bufs in free list, but freebuf_count = %d\n",
984 where, scheme, magn, count, bsq->freebuf_count);
985 }
986 return 0;
987}
988#endif
989
990
991static void
992fore200e_supply(struct fore200e* fore200e)
993{
994 int scheme, magn, i;
995
996 struct host_bsq* bsq;
997 struct host_bsq_entry* entry;
998 struct buffer* buffer;
999
1000 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
1001 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
1002
1003 bsq = &fore200e->host_bsq[ scheme ][ magn ];
1004
1005#ifdef FORE200E_BSQ_DEBUG
1006 bsq_audit(1, bsq, scheme, magn);
1007#endif
1008 while (bsq->freebuf_count >= RBD_BLK_SIZE) {
1009
1010 DPRINTK(2, "supplying %d rx buffers to queue %d / %d, freebuf_count = %d\n",
1011 RBD_BLK_SIZE, scheme, magn, bsq->freebuf_count);
1012
1013 entry = &bsq->host_entry[ bsq->head ];
1014
1015 for (i = 0; i < RBD_BLK_SIZE; i++) {
1016
1017 /* take the first buffer in the free buffer list */
1018 buffer = bsq->freebuf;
1019 if (!buffer) {
1020 printk(FORE200E "no more free bufs in queue %d.%d, but freebuf_count = %d\n",
1021 scheme, magn, bsq->freebuf_count);
1022 return;
1023 }
1024 bsq->freebuf = buffer->next;
1025
1026#ifdef FORE200E_BSQ_DEBUG
1027 if (buffer->supplied)
1028 printk(FORE200E "queue %d.%d, buffer %lu already supplied\n",
1029 scheme, magn, buffer->index);
1030 buffer->supplied = 1;
1031#endif
1032 entry->rbd_block->rbd[ i ].buffer_haddr = buffer->data.dma_addr;
1033 entry->rbd_block->rbd[ i ].handle = FORE200E_BUF2HDL(buffer);
1034 }
1035
1036 FORE200E_NEXT_ENTRY(bsq->head, QUEUE_SIZE_BS);
1037
1038 /* decrease accordingly the number of free rx buffers */
1039 bsq->freebuf_count -= RBD_BLK_SIZE;
1040
1041 *entry->status = STATUS_PENDING;
1042 fore200e->bus->write(entry->rbd_block_dma, &entry->cp_entry->rbd_block_haddr);
1043 }
1044 }
1045 }
1046}
1047
1048
1049static int
1050fore200e_push_rpd(struct fore200e* fore200e, struct atm_vcc* vcc, struct rpd* rpd)
1051{
1052 struct sk_buff* skb;
1053 struct buffer* buffer;
1054 struct fore200e_vcc* fore200e_vcc;
1055 int i, pdu_len = 0;
1056#ifdef FORE200E_52BYTE_AAL0_SDU
1057 u32 cell_header = 0;
1058#endif
1059
1060 ASSERT(vcc);
1061
1062 fore200e_vcc = FORE200E_VCC(vcc);
1063 ASSERT(fore200e_vcc);
1064
1065#ifdef FORE200E_52BYTE_AAL0_SDU
1066 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.rxtp.max_sdu == ATM_AAL0_SDU)) {
1067
1068 cell_header = (rpd->atm_header.gfc << ATM_HDR_GFC_SHIFT) |
1069 (rpd->atm_header.vpi << ATM_HDR_VPI_SHIFT) |
1070 (rpd->atm_header.vci << ATM_HDR_VCI_SHIFT) |
1071 (rpd->atm_header.plt << ATM_HDR_PTI_SHIFT) |
1072 rpd->atm_header.clp;
1073 pdu_len = 4;
1074 }
1075#endif
1076
1077 /* compute total PDU length */
1078 for (i = 0; i < rpd->nseg; i++)
1079 pdu_len += rpd->rsd[ i ].length;
1080
1081 skb = alloc_skb(pdu_len, GFP_ATOMIC);
1082 if (skb == NULL) {
1083 DPRINTK(2, "unable to alloc new skb, rx PDU length = %d\n", pdu_len);
1084
1085 atomic_inc(&vcc->stats->rx_drop);
1086 return -ENOMEM;
1087 }
1088
1089 __net_timestamp(skb);
1090
1091#ifdef FORE200E_52BYTE_AAL0_SDU
1092 if (cell_header) {
1093 *((u32*)skb_put(skb, 4)) = cell_header;
1094 }
1095#endif
1096
1097 /* reassemble segments */
1098 for (i = 0; i < rpd->nseg; i++) {
1099
1100 /* rebuild rx buffer address from rsd handle */
1101 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1102
1103 /* Make device DMA transfer visible to CPU. */
1104 fore200e->bus->dma_sync_for_cpu(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1105
1106 memcpy(skb_put(skb, rpd->rsd[ i ].length), buffer->data.align_addr, rpd->rsd[ i ].length);
1107
1108 /* Now let the device get at it again. */
1109 fore200e->bus->dma_sync_for_device(fore200e, buffer->data.dma_addr, rpd->rsd[ i ].length, DMA_FROM_DEVICE);
1110 }
1111
1112 DPRINTK(3, "rx skb: len = %d, truesize = %d\n", skb->len, skb->truesize);
1113
1114 if (pdu_len < fore200e_vcc->rx_min_pdu)
1115 fore200e_vcc->rx_min_pdu = pdu_len;
1116 if (pdu_len > fore200e_vcc->rx_max_pdu)
1117 fore200e_vcc->rx_max_pdu = pdu_len;
1118 fore200e_vcc->rx_pdu++;
1119
1120 /* push PDU */
1121 if (atm_charge(vcc, skb->truesize) == 0) {
1122
1123 DPRINTK(2, "receive buffers saturated for %d.%d.%d - PDU dropped\n",
1124 vcc->itf, vcc->vpi, vcc->vci);
1125
1126 dev_kfree_skb_any(skb);
1127
1128 atomic_inc(&vcc->stats->rx_drop);
1129 return -ENOMEM;
1130 }
1131
1132 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1133
1134 vcc->push(vcc, skb);
1135 atomic_inc(&vcc->stats->rx);
1136
1137 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1138
1139 return 0;
1140}
1141
1142
1143static void
1144fore200e_collect_rpd(struct fore200e* fore200e, struct rpd* rpd)
1145{
1146 struct host_bsq* bsq;
1147 struct buffer* buffer;
1148 int i;
1149
1150 for (i = 0; i < rpd->nseg; i++) {
1151
1152 /* rebuild rx buffer address from rsd handle */
1153 buffer = FORE200E_HDL2BUF(rpd->rsd[ i ].handle);
1154
1155 bsq = &fore200e->host_bsq[ buffer->scheme ][ buffer->magn ];
1156
1157#ifdef FORE200E_BSQ_DEBUG
1158 bsq_audit(2, bsq, buffer->scheme, buffer->magn);
1159
1160 if (buffer->supplied == 0)
1161 printk(FORE200E "queue %d.%d, buffer %ld was not supplied\n",
1162 buffer->scheme, buffer->magn, buffer->index);
1163 buffer->supplied = 0;
1164#endif
1165
1166 /* re-insert the buffer into the free buffer list */
1167 buffer->next = bsq->freebuf;
1168 bsq->freebuf = buffer;
1169
1170 /* then increment the number of free rx buffers */
1171 bsq->freebuf_count++;
1172 }
1173}
1174
1175
1176static void
1177fore200e_rx_irq(struct fore200e* fore200e)
1178{
1179 struct host_rxq* rxq = &fore200e->host_rxq;
1180 struct host_rxq_entry* entry;
1181 struct atm_vcc* vcc;
1182 struct fore200e_vc_map* vc_map;
1183
1184 for (;;) {
1185
1186 entry = &rxq->host_entry[ rxq->head ];
1187
1188 /* no more received PDUs */
1189 if ((*entry->status & STATUS_COMPLETE) == 0)
1190 break;
1191
1192 vc_map = FORE200E_VC_MAP(fore200e, entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1193
1194 if ((vc_map->vcc == NULL) ||
1195 (test_bit(ATM_VF_READY, &vc_map->vcc->flags) == 0)) {
1196
1197 DPRINTK(1, "no ready VC found for PDU received on %d.%d.%d\n",
1198 fore200e->atm_dev->number,
1199 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1200 }
1201 else {
1202 vcc = vc_map->vcc;
1203 ASSERT(vcc);
1204
1205 if ((*entry->status & STATUS_ERROR) == 0) {
1206
1207 fore200e_push_rpd(fore200e, vcc, entry->rpd);
1208 }
1209 else {
1210 DPRINTK(2, "damaged PDU on %d.%d.%d\n",
1211 fore200e->atm_dev->number,
1212 entry->rpd->atm_header.vpi, entry->rpd->atm_header.vci);
1213 atomic_inc(&vcc->stats->rx_err);
1214 }
1215 }
1216
1217 FORE200E_NEXT_ENTRY(rxq->head, QUEUE_SIZE_RX);
1218
1219 fore200e_collect_rpd(fore200e, entry->rpd);
1220
1221 /* rewrite the rpd address to ack the received PDU */
1222 fore200e->bus->write(entry->rpd_dma, &entry->cp_entry->rpd_haddr);
1223 *entry->status = STATUS_FREE;
1224
1225 fore200e_supply(fore200e);
1226 }
1227}
1228
1229
1230#ifndef FORE200E_USE_TASKLET
1231static void
1232fore200e_irq(struct fore200e* fore200e)
1233{
1234 unsigned long flags;
1235
1236 spin_lock_irqsave(&fore200e->q_lock, flags);
1237 fore200e_rx_irq(fore200e);
1238 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1239
1240 spin_lock_irqsave(&fore200e->q_lock, flags);
1241 fore200e_tx_irq(fore200e);
1242 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1243}
1244#endif
1245
1246
1247static irqreturn_t
1248fore200e_interrupt(int irq, void* dev)
1249{
1250 struct fore200e* fore200e = FORE200E_DEV((struct atm_dev*)dev);
1251
1252 if (fore200e->bus->irq_check(fore200e) == 0) {
1253
1254 DPRINTK(3, "interrupt NOT triggered by device %d\n", fore200e->atm_dev->number);
1255 return IRQ_NONE;
1256 }
1257 DPRINTK(3, "interrupt triggered by device %d\n", fore200e->atm_dev->number);
1258
1259#ifdef FORE200E_USE_TASKLET
1260 tasklet_schedule(&fore200e->tx_tasklet);
1261 tasklet_schedule(&fore200e->rx_tasklet);
1262#else
1263 fore200e_irq(fore200e);
1264#endif
1265
1266 fore200e->bus->irq_ack(fore200e);
1267 return IRQ_HANDLED;
1268}
1269
1270
1271#ifdef FORE200E_USE_TASKLET
1272static void
1273fore200e_tx_tasklet(unsigned long data)
1274{
1275 struct fore200e* fore200e = (struct fore200e*) data;
1276 unsigned long flags;
1277
1278 DPRINTK(3, "tx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1279
1280 spin_lock_irqsave(&fore200e->q_lock, flags);
1281 fore200e_tx_irq(fore200e);
1282 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1283}
1284
1285
1286static void
1287fore200e_rx_tasklet(unsigned long data)
1288{
1289 struct fore200e* fore200e = (struct fore200e*) data;
1290 unsigned long flags;
1291
1292 DPRINTK(3, "rx tasklet scheduled for device %d\n", fore200e->atm_dev->number);
1293
1294 spin_lock_irqsave(&fore200e->q_lock, flags);
1295 fore200e_rx_irq((struct fore200e*) data);
1296 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1297}
1298#endif
1299
1300
1301static int
1302fore200e_select_scheme(struct atm_vcc* vcc)
1303{
1304 /* fairly balance the VCs over (identical) buffer schemes */
1305 int scheme = vcc->vci % 2 ? BUFFER_SCHEME_ONE : BUFFER_SCHEME_TWO;
1306
1307 DPRINTK(1, "VC %d.%d.%d uses buffer scheme %d\n",
1308 vcc->itf, vcc->vpi, vcc->vci, scheme);
1309
1310 return scheme;
1311}
1312
1313
1314static int
1315fore200e_activate_vcin(struct fore200e* fore200e, int activate, struct atm_vcc* vcc, int mtu)
1316{
1317 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1318 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1319 struct activate_opcode activ_opcode;
1320 struct deactivate_opcode deactiv_opcode;
1321 struct vpvc vpvc;
1322 int ok;
1323 enum fore200e_aal aal = fore200e_atm2fore_aal(vcc->qos.aal);
1324
1325 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1326
1327 if (activate) {
1328 FORE200E_VCC(vcc)->scheme = fore200e_select_scheme(vcc);
1329
1330 activ_opcode.opcode = OPCODE_ACTIVATE_VCIN;
1331 activ_opcode.aal = aal;
1332 activ_opcode.scheme = FORE200E_VCC(vcc)->scheme;
1333 activ_opcode.pad = 0;
1334 }
1335 else {
1336 deactiv_opcode.opcode = OPCODE_DEACTIVATE_VCIN;
1337 deactiv_opcode.pad = 0;
1338 }
1339
1340 vpvc.vci = vcc->vci;
1341 vpvc.vpi = vcc->vpi;
1342
1343 *entry->status = STATUS_PENDING;
1344
1345 if (activate) {
1346
1347#ifdef FORE200E_52BYTE_AAL0_SDU
1348 mtu = 48;
1349#endif
1350 /* the MTU is not used by the cp, except in the case of AAL0 */
1351 fore200e->bus->write(mtu, &entry->cp_entry->cmd.activate_block.mtu);
1352 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.vpvc);
1353 fore200e->bus->write(*(u32*)&activ_opcode, (u32 __iomem *)&entry->cp_entry->cmd.activate_block.opcode);
1354 }
1355 else {
1356 fore200e->bus->write(*(u32*)&vpvc, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.vpvc);
1357 fore200e->bus->write(*(u32*)&deactiv_opcode, (u32 __iomem *)&entry->cp_entry->cmd.deactivate_block.opcode);
1358 }
1359
1360 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1361
1362 *entry->status = STATUS_FREE;
1363
1364 if (ok == 0) {
1365 printk(FORE200E "unable to %s VC %d.%d.%d\n",
1366 activate ? "open" : "close", vcc->itf, vcc->vpi, vcc->vci);
1367 return -EIO;
1368 }
1369
1370 DPRINTK(1, "VC %d.%d.%d %sed\n", vcc->itf, vcc->vpi, vcc->vci,
1371 activate ? "open" : "clos");
1372
1373 return 0;
1374}
1375
1376
1377#define FORE200E_MAX_BACK2BACK_CELLS 255 /* XXX depends on CDVT */
1378
1379static void
1380fore200e_rate_ctrl(struct atm_qos* qos, struct tpd_rate* rate)
1381{
1382 if (qos->txtp.max_pcr < ATM_OC3_PCR) {
1383
1384 /* compute the data cells to idle cells ratio from the tx PCR */
1385 rate->data_cells = qos->txtp.max_pcr * FORE200E_MAX_BACK2BACK_CELLS / ATM_OC3_PCR;
1386 rate->idle_cells = FORE200E_MAX_BACK2BACK_CELLS - rate->data_cells;
1387 }
1388 else {
1389 /* disable rate control */
1390 rate->data_cells = rate->idle_cells = 0;
1391 }
1392}
1393
1394
1395static int
1396fore200e_open(struct atm_vcc *vcc)
1397{
1398 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1399 struct fore200e_vcc* fore200e_vcc;
1400 struct fore200e_vc_map* vc_map;
1401 unsigned long flags;
1402 int vci = vcc->vci;
1403 short vpi = vcc->vpi;
1404
1405 ASSERT((vpi >= 0) && (vpi < 1<<FORE200E_VPI_BITS));
1406 ASSERT((vci >= 0) && (vci < 1<<FORE200E_VCI_BITS));
1407
1408 spin_lock_irqsave(&fore200e->q_lock, flags);
1409
1410 vc_map = FORE200E_VC_MAP(fore200e, vpi, vci);
1411 if (vc_map->vcc) {
1412
1413 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1414
1415 printk(FORE200E "VC %d.%d.%d already in use\n",
1416 fore200e->atm_dev->number, vpi, vci);
1417
1418 return -EINVAL;
1419 }
1420
1421 vc_map->vcc = vcc;
1422
1423 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1424
1425 fore200e_vcc = kzalloc(sizeof(struct fore200e_vcc), GFP_ATOMIC);
1426 if (fore200e_vcc == NULL) {
1427 vc_map->vcc = NULL;
1428 return -ENOMEM;
1429 }
1430
1431 DPRINTK(2, "opening %d.%d.%d:%d QoS = (tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1432 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d)\n",
1433 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1434 fore200e_traffic_class[ vcc->qos.txtp.traffic_class ],
1435 vcc->qos.txtp.min_pcr, vcc->qos.txtp.max_pcr, vcc->qos.txtp.max_cdv, vcc->qos.txtp.max_sdu,
1436 fore200e_traffic_class[ vcc->qos.rxtp.traffic_class ],
1437 vcc->qos.rxtp.min_pcr, vcc->qos.rxtp.max_pcr, vcc->qos.rxtp.max_cdv, vcc->qos.rxtp.max_sdu);
1438
1439 /* pseudo-CBR bandwidth requested? */
1440 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1441
1442 mutex_lock(&fore200e->rate_mtx);
1443 if (fore200e->available_cell_rate < vcc->qos.txtp.max_pcr) {
1444 mutex_unlock(&fore200e->rate_mtx);
1445
1446 kfree(fore200e_vcc);
1447 vc_map->vcc = NULL;
1448 return -EAGAIN;
1449 }
1450
1451 /* reserve bandwidth */
1452 fore200e->available_cell_rate -= vcc->qos.txtp.max_pcr;
1453 mutex_unlock(&fore200e->rate_mtx);
1454 }
1455
1456 vcc->itf = vcc->dev->number;
1457
1458 set_bit(ATM_VF_PARTIAL,&vcc->flags);
1459 set_bit(ATM_VF_ADDR, &vcc->flags);
1460
1461 vcc->dev_data = fore200e_vcc;
1462
1463 if (fore200e_activate_vcin(fore200e, 1, vcc, vcc->qos.rxtp.max_sdu) < 0) {
1464
1465 vc_map->vcc = NULL;
1466
1467 clear_bit(ATM_VF_ADDR, &vcc->flags);
1468 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1469
1470 vcc->dev_data = NULL;
1471
1472 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1473
1474 kfree(fore200e_vcc);
1475 return -EINVAL;
1476 }
1477
1478 /* compute rate control parameters */
1479 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1480
1481 fore200e_rate_ctrl(&vcc->qos, &fore200e_vcc->rate);
1482 set_bit(ATM_VF_HASQOS, &vcc->flags);
1483
1484 DPRINTK(3, "tx on %d.%d.%d:%d, tx PCR = %d, rx PCR = %d, data_cells = %u, idle_cells = %u\n",
1485 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1486 vcc->qos.txtp.max_pcr, vcc->qos.rxtp.max_pcr,
1487 fore200e_vcc->rate.data_cells, fore200e_vcc->rate.idle_cells);
1488 }
1489
1490 fore200e_vcc->tx_min_pdu = fore200e_vcc->rx_min_pdu = MAX_PDU_SIZE + 1;
1491 fore200e_vcc->tx_max_pdu = fore200e_vcc->rx_max_pdu = 0;
1492 fore200e_vcc->tx_pdu = fore200e_vcc->rx_pdu = 0;
1493
1494 /* new incarnation of the vcc */
1495 vc_map->incarn = ++fore200e->incarn_count;
1496
1497 /* VC unusable before this flag is set */
1498 set_bit(ATM_VF_READY, &vcc->flags);
1499
1500 return 0;
1501}
1502
1503
1504static void
1505fore200e_close(struct atm_vcc* vcc)
1506{
1507 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1508 struct fore200e_vcc* fore200e_vcc;
1509 struct fore200e_vc_map* vc_map;
1510 unsigned long flags;
1511
1512 ASSERT(vcc);
1513 ASSERT((vcc->vpi >= 0) && (vcc->vpi < 1<<FORE200E_VPI_BITS));
1514 ASSERT((vcc->vci >= 0) && (vcc->vci < 1<<FORE200E_VCI_BITS));
1515
1516 DPRINTK(2, "closing %d.%d.%d:%d\n", vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal));
1517
1518 clear_bit(ATM_VF_READY, &vcc->flags);
1519
1520 fore200e_activate_vcin(fore200e, 0, vcc, 0);
1521
1522 spin_lock_irqsave(&fore200e->q_lock, flags);
1523
1524 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1525
1526 /* the vc is no longer considered as "in use" by fore200e_open() */
1527 vc_map->vcc = NULL;
1528
1529 vcc->itf = vcc->vci = vcc->vpi = 0;
1530
1531 fore200e_vcc = FORE200E_VCC(vcc);
1532 vcc->dev_data = NULL;
1533
1534 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1535
1536 /* release reserved bandwidth, if any */
1537 if ((vcc->qos.txtp.traffic_class == ATM_CBR) && (vcc->qos.txtp.max_pcr > 0)) {
1538
1539 mutex_lock(&fore200e->rate_mtx);
1540 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
1541 mutex_unlock(&fore200e->rate_mtx);
1542
1543 clear_bit(ATM_VF_HASQOS, &vcc->flags);
1544 }
1545
1546 clear_bit(ATM_VF_ADDR, &vcc->flags);
1547 clear_bit(ATM_VF_PARTIAL,&vcc->flags);
1548
1549 ASSERT(fore200e_vcc);
1550 kfree(fore200e_vcc);
1551}
1552
1553
1554static int
1555fore200e_send(struct atm_vcc *vcc, struct sk_buff *skb)
1556{
1557 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1558 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1559 struct fore200e_vc_map* vc_map;
1560 struct host_txq* txq = &fore200e->host_txq;
1561 struct host_txq_entry* entry;
1562 struct tpd* tpd;
1563 struct tpd_haddr tpd_haddr;
1564 int retry = CONFIG_ATM_FORE200E_TX_RETRY;
1565 int tx_copy = 0;
1566 int tx_len = skb->len;
1567 u32* cell_header = NULL;
1568 unsigned char* skb_data;
1569 int skb_len;
1570 unsigned char* data;
1571 unsigned long flags;
1572
1573 ASSERT(vcc);
1574 ASSERT(atomic_read(&sk_atm(vcc)->sk_wmem_alloc) >= 0);
1575 ASSERT(fore200e);
1576 ASSERT(fore200e_vcc);
1577
1578 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1579 DPRINTK(1, "VC %d.%d.%d not ready for tx\n", vcc->itf, vcc->vpi, vcc->vpi);
1580 dev_kfree_skb_any(skb);
1581 return -EINVAL;
1582 }
1583
1584#ifdef FORE200E_52BYTE_AAL0_SDU
1585 if ((vcc->qos.aal == ATM_AAL0) && (vcc->qos.txtp.max_sdu == ATM_AAL0_SDU)) {
1586 cell_header = (u32*) skb->data;
1587 skb_data = skb->data + 4; /* skip 4-byte cell header */
1588 skb_len = tx_len = skb->len - 4;
1589
1590 DPRINTK(3, "user-supplied cell header = 0x%08x\n", *cell_header);
1591 }
1592 else
1593#endif
1594 {
1595 skb_data = skb->data;
1596 skb_len = skb->len;
1597 }
1598
1599 if (((unsigned long)skb_data) & 0x3) {
1600
1601 DPRINTK(2, "misaligned tx PDU on device %s\n", fore200e->name);
1602 tx_copy = 1;
1603 tx_len = skb_len;
1604 }
1605
1606 if ((vcc->qos.aal == ATM_AAL0) && (skb_len % ATM_CELL_PAYLOAD)) {
1607
1608 /* this simply NUKES the PCA board */
1609 DPRINTK(2, "incomplete tx AAL0 PDU on device %s\n", fore200e->name);
1610 tx_copy = 1;
1611 tx_len = ((skb_len / ATM_CELL_PAYLOAD) + 1) * ATM_CELL_PAYLOAD;
1612 }
1613
1614 if (tx_copy) {
1615 data = kmalloc(tx_len, GFP_ATOMIC | GFP_DMA);
1616 if (data == NULL) {
1617 if (vcc->pop) {
1618 vcc->pop(vcc, skb);
1619 }
1620 else {
1621 dev_kfree_skb_any(skb);
1622 }
1623 return -ENOMEM;
1624 }
1625
1626 memcpy(data, skb_data, skb_len);
1627 if (skb_len < tx_len)
1628 memset(data + skb_len, 0x00, tx_len - skb_len);
1629 }
1630 else {
1631 data = skb_data;
1632 }
1633
1634 vc_map = FORE200E_VC_MAP(fore200e, vcc->vpi, vcc->vci);
1635 ASSERT(vc_map->vcc == vcc);
1636
1637 retry_here:
1638
1639 spin_lock_irqsave(&fore200e->q_lock, flags);
1640
1641 entry = &txq->host_entry[ txq->head ];
1642
1643 if ((*entry->status != STATUS_FREE) || (txq->txing >= QUEUE_SIZE_TX - 2)) {
1644
1645 /* try to free completed tx queue entries */
1646 fore200e_tx_irq(fore200e);
1647
1648 if (*entry->status != STATUS_FREE) {
1649
1650 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1651
1652 /* retry once again? */
1653 if (--retry > 0) {
1654 udelay(50);
1655 goto retry_here;
1656 }
1657
1658 atomic_inc(&vcc->stats->tx_err);
1659
1660 fore200e->tx_sat++;
1661 DPRINTK(2, "tx queue of device %s is saturated, PDU dropped - heartbeat is %08x\n",
1662 fore200e->name, fore200e->cp_queues->heartbeat);
1663 if (vcc->pop) {
1664 vcc->pop(vcc, skb);
1665 }
1666 else {
1667 dev_kfree_skb_any(skb);
1668 }
1669
1670 if (tx_copy)
1671 kfree(data);
1672
1673 return -ENOBUFS;
1674 }
1675 }
1676
1677 entry->incarn = vc_map->incarn;
1678 entry->vc_map = vc_map;
1679 entry->skb = skb;
1680 entry->data = tx_copy ? data : NULL;
1681
1682 tpd = entry->tpd;
1683 tpd->tsd[ 0 ].buffer = fore200e->bus->dma_map(fore200e, data, tx_len, DMA_TO_DEVICE);
1684 tpd->tsd[ 0 ].length = tx_len;
1685
1686 FORE200E_NEXT_ENTRY(txq->head, QUEUE_SIZE_TX);
1687 txq->txing++;
1688
1689 /* The dma_map call above implies a dma_sync so the device can use it,
1690 * thus no explicit dma_sync call is necessary here.
1691 */
1692
1693 DPRINTK(3, "tx on %d.%d.%d:%d, len = %u (%u)\n",
1694 vcc->itf, vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
1695 tpd->tsd[0].length, skb_len);
1696
1697 if (skb_len < fore200e_vcc->tx_min_pdu)
1698 fore200e_vcc->tx_min_pdu = skb_len;
1699 if (skb_len > fore200e_vcc->tx_max_pdu)
1700 fore200e_vcc->tx_max_pdu = skb_len;
1701 fore200e_vcc->tx_pdu++;
1702
1703 /* set tx rate control information */
1704 tpd->rate.data_cells = fore200e_vcc->rate.data_cells;
1705 tpd->rate.idle_cells = fore200e_vcc->rate.idle_cells;
1706
1707 if (cell_header) {
1708 tpd->atm_header.clp = (*cell_header & ATM_HDR_CLP);
1709 tpd->atm_header.plt = (*cell_header & ATM_HDR_PTI_MASK) >> ATM_HDR_PTI_SHIFT;
1710 tpd->atm_header.vci = (*cell_header & ATM_HDR_VCI_MASK) >> ATM_HDR_VCI_SHIFT;
1711 tpd->atm_header.vpi = (*cell_header & ATM_HDR_VPI_MASK) >> ATM_HDR_VPI_SHIFT;
1712 tpd->atm_header.gfc = (*cell_header & ATM_HDR_GFC_MASK) >> ATM_HDR_GFC_SHIFT;
1713 }
1714 else {
1715 /* set the ATM header, common to all cells conveying the PDU */
1716 tpd->atm_header.clp = 0;
1717 tpd->atm_header.plt = 0;
1718 tpd->atm_header.vci = vcc->vci;
1719 tpd->atm_header.vpi = vcc->vpi;
1720 tpd->atm_header.gfc = 0;
1721 }
1722
1723 tpd->spec.length = tx_len;
1724 tpd->spec.nseg = 1;
1725 tpd->spec.aal = fore200e_atm2fore_aal(vcc->qos.aal);
1726 tpd->spec.intr = 1;
1727
1728 tpd_haddr.size = sizeof(struct tpd) / (1<<TPD_HADDR_SHIFT); /* size is expressed in 32 byte blocks */
1729 tpd_haddr.pad = 0;
1730 tpd_haddr.haddr = entry->tpd_dma >> TPD_HADDR_SHIFT; /* shift the address, as we are in a bitfield */
1731
1732 *entry->status = STATUS_PENDING;
1733 fore200e->bus->write(*(u32*)&tpd_haddr, (u32 __iomem *)&entry->cp_entry->tpd_haddr);
1734
1735 spin_unlock_irqrestore(&fore200e->q_lock, flags);
1736
1737 return 0;
1738}
1739
1740
1741static int
1742fore200e_getstats(struct fore200e* fore200e)
1743{
1744 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1745 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1746 struct stats_opcode opcode;
1747 int ok;
1748 u32 stats_dma_addr;
1749
1750 if (fore200e->stats == NULL) {
1751 fore200e->stats = kzalloc(sizeof(struct stats), GFP_KERNEL | GFP_DMA);
1752 if (fore200e->stats == NULL)
1753 return -ENOMEM;
1754 }
1755
1756 stats_dma_addr = fore200e->bus->dma_map(fore200e, fore200e->stats,
1757 sizeof(struct stats), DMA_FROM_DEVICE);
1758
1759 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1760
1761 opcode.opcode = OPCODE_GET_STATS;
1762 opcode.pad = 0;
1763
1764 fore200e->bus->write(stats_dma_addr, &entry->cp_entry->cmd.stats_block.stats_haddr);
1765
1766 *entry->status = STATUS_PENDING;
1767
1768 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.stats_block.opcode);
1769
1770 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1771
1772 *entry->status = STATUS_FREE;
1773
1774 fore200e->bus->dma_unmap(fore200e, stats_dma_addr, sizeof(struct stats), DMA_FROM_DEVICE);
1775
1776 if (ok == 0) {
1777 printk(FORE200E "unable to get statistics from device %s\n", fore200e->name);
1778 return -EIO;
1779 }
1780
1781 return 0;
1782}
1783
1784
1785static int
1786fore200e_getsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, int optlen)
1787{
1788 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1789
1790 DPRINTK(2, "getsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1791 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1792
1793 return -EINVAL;
1794}
1795
1796
1797static int
1798fore200e_setsockopt(struct atm_vcc* vcc, int level, int optname, void __user *optval, unsigned int optlen)
1799{
1800 /* struct fore200e* fore200e = FORE200E_DEV(vcc->dev); */
1801
1802 DPRINTK(2, "setsockopt %d.%d.%d, level = %d, optname = 0x%x, optval = 0x%p, optlen = %d\n",
1803 vcc->itf, vcc->vpi, vcc->vci, level, optname, optval, optlen);
1804
1805 return -EINVAL;
1806}
1807
1808
1809#if 0 /* currently unused */
1810static int
1811fore200e_get_oc3(struct fore200e* fore200e, struct oc3_regs* regs)
1812{
1813 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1814 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1815 struct oc3_opcode opcode;
1816 int ok;
1817 u32 oc3_regs_dma_addr;
1818
1819 oc3_regs_dma_addr = fore200e->bus->dma_map(fore200e, regs, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1820
1821 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1822
1823 opcode.opcode = OPCODE_GET_OC3;
1824 opcode.reg = 0;
1825 opcode.value = 0;
1826 opcode.mask = 0;
1827
1828 fore200e->bus->write(oc3_regs_dma_addr, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1829
1830 *entry->status = STATUS_PENDING;
1831
1832 fore200e->bus->write(*(u32*)&opcode, (u32*)&entry->cp_entry->cmd.oc3_block.opcode);
1833
1834 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1835
1836 *entry->status = STATUS_FREE;
1837
1838 fore200e->bus->dma_unmap(fore200e, oc3_regs_dma_addr, sizeof(struct oc3_regs), DMA_FROM_DEVICE);
1839
1840 if (ok == 0) {
1841 printk(FORE200E "unable to get OC-3 regs of device %s\n", fore200e->name);
1842 return -EIO;
1843 }
1844
1845 return 0;
1846}
1847#endif
1848
1849
1850static int
1851fore200e_set_oc3(struct fore200e* fore200e, u32 reg, u32 value, u32 mask)
1852{
1853 struct host_cmdq* cmdq = &fore200e->host_cmdq;
1854 struct host_cmdq_entry* entry = &cmdq->host_entry[ cmdq->head ];
1855 struct oc3_opcode opcode;
1856 int ok;
1857
1858 DPRINTK(2, "set OC-3 reg = 0x%02x, value = 0x%02x, mask = 0x%02x\n", reg, value, mask);
1859
1860 FORE200E_NEXT_ENTRY(cmdq->head, QUEUE_SIZE_CMD);
1861
1862 opcode.opcode = OPCODE_SET_OC3;
1863 opcode.reg = reg;
1864 opcode.value = value;
1865 opcode.mask = mask;
1866
1867 fore200e->bus->write(0, &entry->cp_entry->cmd.oc3_block.regs_haddr);
1868
1869 *entry->status = STATUS_PENDING;
1870
1871 fore200e->bus->write(*(u32*)&opcode, (u32 __iomem *)&entry->cp_entry->cmd.oc3_block.opcode);
1872
1873 ok = fore200e_poll(fore200e, entry->status, STATUS_COMPLETE, 400);
1874
1875 *entry->status = STATUS_FREE;
1876
1877 if (ok == 0) {
1878 printk(FORE200E "unable to set OC-3 reg 0x%02x of device %s\n", reg, fore200e->name);
1879 return -EIO;
1880 }
1881
1882 return 0;
1883}
1884
1885
1886static int
1887fore200e_setloop(struct fore200e* fore200e, int loop_mode)
1888{
1889 u32 mct_value, mct_mask;
1890 int error;
1891
1892 if (!capable(CAP_NET_ADMIN))
1893 return -EPERM;
1894
1895 switch (loop_mode) {
1896
1897 case ATM_LM_NONE:
1898 mct_value = 0;
1899 mct_mask = SUNI_MCT_DLE | SUNI_MCT_LLE;
1900 break;
1901
1902 case ATM_LM_LOC_PHY:
1903 mct_value = mct_mask = SUNI_MCT_DLE;
1904 break;
1905
1906 case ATM_LM_RMT_PHY:
1907 mct_value = mct_mask = SUNI_MCT_LLE;
1908 break;
1909
1910 default:
1911 return -EINVAL;
1912 }
1913
1914 error = fore200e_set_oc3(fore200e, SUNI_MCT, mct_value, mct_mask);
1915 if (error == 0)
1916 fore200e->loop_mode = loop_mode;
1917
1918 return error;
1919}
1920
1921
1922static int
1923fore200e_fetch_stats(struct fore200e* fore200e, struct sonet_stats __user *arg)
1924{
1925 struct sonet_stats tmp;
1926
1927 if (fore200e_getstats(fore200e) < 0)
1928 return -EIO;
1929
1930 tmp.section_bip = be32_to_cpu(fore200e->stats->oc3.section_bip8_errors);
1931 tmp.line_bip = be32_to_cpu(fore200e->stats->oc3.line_bip24_errors);
1932 tmp.path_bip = be32_to_cpu(fore200e->stats->oc3.path_bip8_errors);
1933 tmp.line_febe = be32_to_cpu(fore200e->stats->oc3.line_febe_errors);
1934 tmp.path_febe = be32_to_cpu(fore200e->stats->oc3.path_febe_errors);
1935 tmp.corr_hcs = be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors);
1936 tmp.uncorr_hcs = be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors);
1937 tmp.tx_cells = be32_to_cpu(fore200e->stats->aal0.cells_transmitted) +
1938 be32_to_cpu(fore200e->stats->aal34.cells_transmitted) +
1939 be32_to_cpu(fore200e->stats->aal5.cells_transmitted);
1940 tmp.rx_cells = be32_to_cpu(fore200e->stats->aal0.cells_received) +
1941 be32_to_cpu(fore200e->stats->aal34.cells_received) +
1942 be32_to_cpu(fore200e->stats->aal5.cells_received);
1943
1944 if (arg)
1945 return copy_to_user(arg, &tmp, sizeof(struct sonet_stats)) ? -EFAULT : 0;
1946
1947 return 0;
1948}
1949
1950
1951static int
1952fore200e_ioctl(struct atm_dev* dev, unsigned int cmd, void __user * arg)
1953{
1954 struct fore200e* fore200e = FORE200E_DEV(dev);
1955
1956 DPRINTK(2, "ioctl cmd = 0x%x (%u), arg = 0x%p (%lu)\n", cmd, cmd, arg, (unsigned long)arg);
1957
1958 switch (cmd) {
1959
1960 case SONET_GETSTAT:
1961 return fore200e_fetch_stats(fore200e, (struct sonet_stats __user *)arg);
1962
1963 case SONET_GETDIAG:
1964 return put_user(0, (int __user *)arg) ? -EFAULT : 0;
1965
1966 case ATM_SETLOOP:
1967 return fore200e_setloop(fore200e, (int)(unsigned long)arg);
1968
1969 case ATM_GETLOOP:
1970 return put_user(fore200e->loop_mode, (int __user *)arg) ? -EFAULT : 0;
1971
1972 case ATM_QUERYLOOP:
1973 return put_user(ATM_LM_LOC_PHY | ATM_LM_RMT_PHY, (int __user *)arg) ? -EFAULT : 0;
1974 }
1975
1976 return -ENOSYS; /* not implemented */
1977}
1978
1979
1980static int
1981fore200e_change_qos(struct atm_vcc* vcc,struct atm_qos* qos, int flags)
1982{
1983 struct fore200e_vcc* fore200e_vcc = FORE200E_VCC(vcc);
1984 struct fore200e* fore200e = FORE200E_DEV(vcc->dev);
1985
1986 if (!test_bit(ATM_VF_READY, &vcc->flags)) {
1987 DPRINTK(1, "VC %d.%d.%d not ready for QoS change\n", vcc->itf, vcc->vpi, vcc->vpi);
1988 return -EINVAL;
1989 }
1990
1991 DPRINTK(2, "change_qos %d.%d.%d, "
1992 "(tx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d; "
1993 "rx: cl=%s, pcr=%d-%d, cdv=%d, max_sdu=%d), flags = 0x%x\n"
1994 "available_cell_rate = %u",
1995 vcc->itf, vcc->vpi, vcc->vci,
1996 fore200e_traffic_class[ qos->txtp.traffic_class ],
1997 qos->txtp.min_pcr, qos->txtp.max_pcr, qos->txtp.max_cdv, qos->txtp.max_sdu,
1998 fore200e_traffic_class[ qos->rxtp.traffic_class ],
1999 qos->rxtp.min_pcr, qos->rxtp.max_pcr, qos->rxtp.max_cdv, qos->rxtp.max_sdu,
2000 flags, fore200e->available_cell_rate);
2001
2002 if ((qos->txtp.traffic_class == ATM_CBR) && (qos->txtp.max_pcr > 0)) {
2003
2004 mutex_lock(&fore200e->rate_mtx);
2005 if (fore200e->available_cell_rate + vcc->qos.txtp.max_pcr < qos->txtp.max_pcr) {
2006 mutex_unlock(&fore200e->rate_mtx);
2007 return -EAGAIN;
2008 }
2009
2010 fore200e->available_cell_rate += vcc->qos.txtp.max_pcr;
2011 fore200e->available_cell_rate -= qos->txtp.max_pcr;
2012
2013 mutex_unlock(&fore200e->rate_mtx);
2014
2015 memcpy(&vcc->qos, qos, sizeof(struct atm_qos));
2016
2017 /* update rate control parameters */
2018 fore200e_rate_ctrl(qos, &fore200e_vcc->rate);
2019
2020 set_bit(ATM_VF_HASQOS, &vcc->flags);
2021
2022 return 0;
2023 }
2024
2025 return -EINVAL;
2026}
2027
2028
2029static int fore200e_irq_request(struct fore200e *fore200e)
2030{
2031 if (request_irq(fore200e->irq, fore200e_interrupt, IRQF_SHARED, fore200e->name, fore200e->atm_dev) < 0) {
2032
2033 printk(FORE200E "unable to reserve IRQ %s for device %s\n",
2034 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2035 return -EBUSY;
2036 }
2037
2038 printk(FORE200E "IRQ %s reserved for device %s\n",
2039 fore200e_irq_itoa(fore200e->irq), fore200e->name);
2040
2041#ifdef FORE200E_USE_TASKLET
2042 tasklet_init(&fore200e->tx_tasklet, fore200e_tx_tasklet, (unsigned long)fore200e);
2043 tasklet_init(&fore200e->rx_tasklet, fore200e_rx_tasklet, (unsigned long)fore200e);
2044#endif
2045
2046 fore200e->state = FORE200E_STATE_IRQ;
2047 return 0;
2048}
2049
2050
2051static int fore200e_get_esi(struct fore200e *fore200e)
2052{
2053 struct prom_data* prom = kzalloc(sizeof(struct prom_data), GFP_KERNEL | GFP_DMA);
2054 int ok, i;
2055
2056 if (!prom)
2057 return -ENOMEM;
2058
2059 ok = fore200e->bus->prom_read(fore200e, prom);
2060 if (ok < 0) {
2061 kfree(prom);
2062 return -EBUSY;
2063 }
2064
2065 printk(FORE200E "device %s, rev. %c, S/N: %d, ESI: %pM\n",
2066 fore200e->name,
2067 (prom->hw_revision & 0xFF) + '@', /* probably meaningless with SBA boards */
2068 prom->serial_number & 0xFFFF, &prom->mac_addr[2]);
2069
2070 for (i = 0; i < ESI_LEN; i++) {
2071 fore200e->esi[ i ] = fore200e->atm_dev->esi[ i ] = prom->mac_addr[ i + 2 ];
2072 }
2073
2074 kfree(prom);
2075
2076 return 0;
2077}
2078
2079
2080static int fore200e_alloc_rx_buf(struct fore200e *fore200e)
2081{
2082 int scheme, magn, nbr, size, i;
2083
2084 struct host_bsq* bsq;
2085 struct buffer* buffer;
2086
2087 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2088 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2089
2090 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2091
2092 nbr = fore200e_rx_buf_nbr[ scheme ][ magn ];
2093 size = fore200e_rx_buf_size[ scheme ][ magn ];
2094
2095 DPRINTK(2, "rx buffers %d / %d are being allocated\n", scheme, magn);
2096
2097 /* allocate the array of receive buffers */
2098 buffer = bsq->buffer = kzalloc(nbr * sizeof(struct buffer), GFP_KERNEL);
2099
2100 if (buffer == NULL)
2101 return -ENOMEM;
2102
2103 bsq->freebuf = NULL;
2104
2105 for (i = 0; i < nbr; i++) {
2106
2107 buffer[ i ].scheme = scheme;
2108 buffer[ i ].magn = magn;
2109#ifdef FORE200E_BSQ_DEBUG
2110 buffer[ i ].index = i;
2111 buffer[ i ].supplied = 0;
2112#endif
2113
2114 /* allocate the receive buffer body */
2115 if (fore200e_chunk_alloc(fore200e,
2116 &buffer[ i ].data, size, fore200e->bus->buffer_alignment,
2117 DMA_FROM_DEVICE) < 0) {
2118
2119 while (i > 0)
2120 fore200e_chunk_free(fore200e, &buffer[ --i ].data);
2121 kfree(buffer);
2122
2123 return -ENOMEM;
2124 }
2125
2126 /* insert the buffer into the free buffer list */
2127 buffer[ i ].next = bsq->freebuf;
2128 bsq->freebuf = &buffer[ i ];
2129 }
2130 /* all the buffers are free, initially */
2131 bsq->freebuf_count = nbr;
2132
2133#ifdef FORE200E_BSQ_DEBUG
2134 bsq_audit(3, bsq, scheme, magn);
2135#endif
2136 }
2137 }
2138
2139 fore200e->state = FORE200E_STATE_ALLOC_BUF;
2140 return 0;
2141}
2142
2143
2144static int fore200e_init_bs_queue(struct fore200e *fore200e)
2145{
2146 int scheme, magn, i;
2147
2148 struct host_bsq* bsq;
2149 struct cp_bsq_entry __iomem * cp_entry;
2150
2151 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++) {
2152 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++) {
2153
2154 DPRINTK(2, "buffer supply queue %d / %d is being initialized\n", scheme, magn);
2155
2156 bsq = &fore200e->host_bsq[ scheme ][ magn ];
2157
2158 /* allocate and align the array of status words */
2159 if (fore200e->bus->dma_chunk_alloc(fore200e,
2160 &bsq->status,
2161 sizeof(enum status),
2162 QUEUE_SIZE_BS,
2163 fore200e->bus->status_alignment) < 0) {
2164 return -ENOMEM;
2165 }
2166
2167 /* allocate and align the array of receive buffer descriptors */
2168 if (fore200e->bus->dma_chunk_alloc(fore200e,
2169 &bsq->rbd_block,
2170 sizeof(struct rbd_block),
2171 QUEUE_SIZE_BS,
2172 fore200e->bus->descr_alignment) < 0) {
2173
2174 fore200e->bus->dma_chunk_free(fore200e, &bsq->status);
2175 return -ENOMEM;
2176 }
2177
2178 /* get the base address of the cp resident buffer supply queue entries */
2179 cp_entry = fore200e->virt_base +
2180 fore200e->bus->read(&fore200e->cp_queues->cp_bsq[ scheme ][ magn ]);
2181
2182 /* fill the host resident and cp resident buffer supply queue entries */
2183 for (i = 0; i < QUEUE_SIZE_BS; i++) {
2184
2185 bsq->host_entry[ i ].status =
2186 FORE200E_INDEX(bsq->status.align_addr, enum status, i);
2187 bsq->host_entry[ i ].rbd_block =
2188 FORE200E_INDEX(bsq->rbd_block.align_addr, struct rbd_block, i);
2189 bsq->host_entry[ i ].rbd_block_dma =
2190 FORE200E_DMA_INDEX(bsq->rbd_block.dma_addr, struct rbd_block, i);
2191 bsq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2192
2193 *bsq->host_entry[ i ].status = STATUS_FREE;
2194
2195 fore200e->bus->write(FORE200E_DMA_INDEX(bsq->status.dma_addr, enum status, i),
2196 &cp_entry[ i ].status_haddr);
2197 }
2198 }
2199 }
2200
2201 fore200e->state = FORE200E_STATE_INIT_BSQ;
2202 return 0;
2203}
2204
2205
2206static int fore200e_init_rx_queue(struct fore200e *fore200e)
2207{
2208 struct host_rxq* rxq = &fore200e->host_rxq;
2209 struct cp_rxq_entry __iomem * cp_entry;
2210 int i;
2211
2212 DPRINTK(2, "receive queue is being initialized\n");
2213
2214 /* allocate and align the array of status words */
2215 if (fore200e->bus->dma_chunk_alloc(fore200e,
2216 &rxq->status,
2217 sizeof(enum status),
2218 QUEUE_SIZE_RX,
2219 fore200e->bus->status_alignment) < 0) {
2220 return -ENOMEM;
2221 }
2222
2223 /* allocate and align the array of receive PDU descriptors */
2224 if (fore200e->bus->dma_chunk_alloc(fore200e,
2225 &rxq->rpd,
2226 sizeof(struct rpd),
2227 QUEUE_SIZE_RX,
2228 fore200e->bus->descr_alignment) < 0) {
2229
2230 fore200e->bus->dma_chunk_free(fore200e, &rxq->status);
2231 return -ENOMEM;
2232 }
2233
2234 /* get the base address of the cp resident rx queue entries */
2235 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_rxq);
2236
2237 /* fill the host resident and cp resident rx entries */
2238 for (i=0; i < QUEUE_SIZE_RX; i++) {
2239
2240 rxq->host_entry[ i ].status =
2241 FORE200E_INDEX(rxq->status.align_addr, enum status, i);
2242 rxq->host_entry[ i ].rpd =
2243 FORE200E_INDEX(rxq->rpd.align_addr, struct rpd, i);
2244 rxq->host_entry[ i ].rpd_dma =
2245 FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i);
2246 rxq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2247
2248 *rxq->host_entry[ i ].status = STATUS_FREE;
2249
2250 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->status.dma_addr, enum status, i),
2251 &cp_entry[ i ].status_haddr);
2252
2253 fore200e->bus->write(FORE200E_DMA_INDEX(rxq->rpd.dma_addr, struct rpd, i),
2254 &cp_entry[ i ].rpd_haddr);
2255 }
2256
2257 /* set the head entry of the queue */
2258 rxq->head = 0;
2259
2260 fore200e->state = FORE200E_STATE_INIT_RXQ;
2261 return 0;
2262}
2263
2264
2265static int fore200e_init_tx_queue(struct fore200e *fore200e)
2266{
2267 struct host_txq* txq = &fore200e->host_txq;
2268 struct cp_txq_entry __iomem * cp_entry;
2269 int i;
2270
2271 DPRINTK(2, "transmit queue is being initialized\n");
2272
2273 /* allocate and align the array of status words */
2274 if (fore200e->bus->dma_chunk_alloc(fore200e,
2275 &txq->status,
2276 sizeof(enum status),
2277 QUEUE_SIZE_TX,
2278 fore200e->bus->status_alignment) < 0) {
2279 return -ENOMEM;
2280 }
2281
2282 /* allocate and align the array of transmit PDU descriptors */
2283 if (fore200e->bus->dma_chunk_alloc(fore200e,
2284 &txq->tpd,
2285 sizeof(struct tpd),
2286 QUEUE_SIZE_TX,
2287 fore200e->bus->descr_alignment) < 0) {
2288
2289 fore200e->bus->dma_chunk_free(fore200e, &txq->status);
2290 return -ENOMEM;
2291 }
2292
2293 /* get the base address of the cp resident tx queue entries */
2294 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_txq);
2295
2296 /* fill the host resident and cp resident tx entries */
2297 for (i=0; i < QUEUE_SIZE_TX; i++) {
2298
2299 txq->host_entry[ i ].status =
2300 FORE200E_INDEX(txq->status.align_addr, enum status, i);
2301 txq->host_entry[ i ].tpd =
2302 FORE200E_INDEX(txq->tpd.align_addr, struct tpd, i);
2303 txq->host_entry[ i ].tpd_dma =
2304 FORE200E_DMA_INDEX(txq->tpd.dma_addr, struct tpd, i);
2305 txq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2306
2307 *txq->host_entry[ i ].status = STATUS_FREE;
2308
2309 fore200e->bus->write(FORE200E_DMA_INDEX(txq->status.dma_addr, enum status, i),
2310 &cp_entry[ i ].status_haddr);
2311
2312 /* although there is a one-to-one mapping of tx queue entries and tpds,
2313 we do not write here the DMA (physical) base address of each tpd into
2314 the related cp resident entry, because the cp relies on this write
2315 operation to detect that a new pdu has been submitted for tx */
2316 }
2317
2318 /* set the head and tail entries of the queue */
2319 txq->head = 0;
2320 txq->tail = 0;
2321
2322 fore200e->state = FORE200E_STATE_INIT_TXQ;
2323 return 0;
2324}
2325
2326
2327static int fore200e_init_cmd_queue(struct fore200e *fore200e)
2328{
2329 struct host_cmdq* cmdq = &fore200e->host_cmdq;
2330 struct cp_cmdq_entry __iomem * cp_entry;
2331 int i;
2332
2333 DPRINTK(2, "command queue is being initialized\n");
2334
2335 /* allocate and align the array of status words */
2336 if (fore200e->bus->dma_chunk_alloc(fore200e,
2337 &cmdq->status,
2338 sizeof(enum status),
2339 QUEUE_SIZE_CMD,
2340 fore200e->bus->status_alignment) < 0) {
2341 return -ENOMEM;
2342 }
2343
2344 /* get the base address of the cp resident cmd queue entries */
2345 cp_entry = fore200e->virt_base + fore200e->bus->read(&fore200e->cp_queues->cp_cmdq);
2346
2347 /* fill the host resident and cp resident cmd entries */
2348 for (i=0; i < QUEUE_SIZE_CMD; i++) {
2349
2350 cmdq->host_entry[ i ].status =
2351 FORE200E_INDEX(cmdq->status.align_addr, enum status, i);
2352 cmdq->host_entry[ i ].cp_entry = &cp_entry[ i ];
2353
2354 *cmdq->host_entry[ i ].status = STATUS_FREE;
2355
2356 fore200e->bus->write(FORE200E_DMA_INDEX(cmdq->status.dma_addr, enum status, i),
2357 &cp_entry[ i ].status_haddr);
2358 }
2359
2360 /* set the head entry of the queue */
2361 cmdq->head = 0;
2362
2363 fore200e->state = FORE200E_STATE_INIT_CMDQ;
2364 return 0;
2365}
2366
2367
2368static void fore200e_param_bs_queue(struct fore200e *fore200e,
2369 enum buffer_scheme scheme,
2370 enum buffer_magn magn, int queue_length,
2371 int pool_size, int supply_blksize)
2372{
2373 struct bs_spec __iomem * bs_spec = &fore200e->cp_queues->init.bs_spec[ scheme ][ magn ];
2374
2375 fore200e->bus->write(queue_length, &bs_spec->queue_length);
2376 fore200e->bus->write(fore200e_rx_buf_size[ scheme ][ magn ], &bs_spec->buffer_size);
2377 fore200e->bus->write(pool_size, &bs_spec->pool_size);
2378 fore200e->bus->write(supply_blksize, &bs_spec->supply_blksize);
2379}
2380
2381
2382static int fore200e_initialize(struct fore200e *fore200e)
2383{
2384 struct cp_queues __iomem * cpq;
2385 int ok, scheme, magn;
2386
2387 DPRINTK(2, "device %s being initialized\n", fore200e->name);
2388
2389 mutex_init(&fore200e->rate_mtx);
2390 spin_lock_init(&fore200e->q_lock);
2391
2392 cpq = fore200e->cp_queues = fore200e->virt_base + FORE200E_CP_QUEUES_OFFSET;
2393
2394 /* enable cp to host interrupts */
2395 fore200e->bus->write(1, &cpq->imask);
2396
2397 if (fore200e->bus->irq_enable)
2398 fore200e->bus->irq_enable(fore200e);
2399
2400 fore200e->bus->write(NBR_CONNECT, &cpq->init.num_connect);
2401
2402 fore200e->bus->write(QUEUE_SIZE_CMD, &cpq->init.cmd_queue_len);
2403 fore200e->bus->write(QUEUE_SIZE_RX, &cpq->init.rx_queue_len);
2404 fore200e->bus->write(QUEUE_SIZE_TX, &cpq->init.tx_queue_len);
2405
2406 fore200e->bus->write(RSD_EXTENSION, &cpq->init.rsd_extension);
2407 fore200e->bus->write(TSD_EXTENSION, &cpq->init.tsd_extension);
2408
2409 for (scheme = 0; scheme < BUFFER_SCHEME_NBR; scheme++)
2410 for (magn = 0; magn < BUFFER_MAGN_NBR; magn++)
2411 fore200e_param_bs_queue(fore200e, scheme, magn,
2412 QUEUE_SIZE_BS,
2413 fore200e_rx_buf_nbr[ scheme ][ magn ],
2414 RBD_BLK_SIZE);
2415
2416 /* issue the initialize command */
2417 fore200e->bus->write(STATUS_PENDING, &cpq->init.status);
2418 fore200e->bus->write(OPCODE_INITIALIZE, &cpq->init.opcode);
2419
2420 ok = fore200e_io_poll(fore200e, &cpq->init.status, STATUS_COMPLETE, 3000);
2421 if (ok == 0) {
2422 printk(FORE200E "device %s initialization failed\n", fore200e->name);
2423 return -ENODEV;
2424 }
2425
2426 printk(FORE200E "device %s initialized\n", fore200e->name);
2427
2428 fore200e->state = FORE200E_STATE_INITIALIZE;
2429 return 0;
2430}
2431
2432
2433static void fore200e_monitor_putc(struct fore200e *fore200e, char c)
2434{
2435 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2436
2437#if 0
2438 printk("%c", c);
2439#endif
2440 fore200e->bus->write(((u32) c) | FORE200E_CP_MONITOR_UART_AVAIL, &monitor->soft_uart.send);
2441}
2442
2443
2444static int fore200e_monitor_getc(struct fore200e *fore200e)
2445{
2446 struct cp_monitor __iomem * monitor = fore200e->cp_monitor;
2447 unsigned long timeout = jiffies + msecs_to_jiffies(50);
2448 int c;
2449
2450 while (time_before(jiffies, timeout)) {
2451
2452 c = (int) fore200e->bus->read(&monitor->soft_uart.recv);
2453
2454 if (c & FORE200E_CP_MONITOR_UART_AVAIL) {
2455
2456 fore200e->bus->write(FORE200E_CP_MONITOR_UART_FREE, &monitor->soft_uart.recv);
2457#if 0
2458 printk("%c", c & 0xFF);
2459#endif
2460 return c & 0xFF;
2461 }
2462 }
2463
2464 return -1;
2465}
2466
2467
2468static void fore200e_monitor_puts(struct fore200e *fore200e, char *str)
2469{
2470 while (*str) {
2471
2472 /* the i960 monitor doesn't accept any new character if it has something to say */
2473 while (fore200e_monitor_getc(fore200e) >= 0);
2474
2475 fore200e_monitor_putc(fore200e, *str++);
2476 }
2477
2478 while (fore200e_monitor_getc(fore200e) >= 0);
2479}
2480
2481#ifdef __LITTLE_ENDIAN
2482#define FW_EXT ".bin"
2483#else
2484#define FW_EXT "_ecd.bin2"
2485#endif
2486
2487static int fore200e_load_and_start_fw(struct fore200e *fore200e)
2488{
2489 const struct firmware *firmware;
2490 struct device *device;
2491 struct fw_header *fw_header;
2492 const __le32 *fw_data;
2493 u32 fw_size;
2494 u32 __iomem *load_addr;
2495 char buf[48];
2496 int err = -ENODEV;
2497
2498 if (strcmp(fore200e->bus->model_name, "PCA-200E") == 0)
2499 device = &((struct pci_dev *) fore200e->bus_dev)->dev;
2500#ifdef CONFIG_SBUS
2501 else if (strcmp(fore200e->bus->model_name, "SBA-200E") == 0)
2502 device = &((struct platform_device *) fore200e->bus_dev)->dev;
2503#endif
2504 else
2505 return err;
2506
2507 sprintf(buf, "%s%s", fore200e->bus->proc_name, FW_EXT);
2508 if ((err = request_firmware(&firmware, buf, device)) < 0) {
2509 printk(FORE200E "problem loading firmware image %s\n", fore200e->bus->model_name);
2510 return err;
2511 }
2512
2513 fw_data = (__le32 *) firmware->data;
2514 fw_size = firmware->size / sizeof(u32);
2515 fw_header = (struct fw_header *) firmware->data;
2516 load_addr = fore200e->virt_base + le32_to_cpu(fw_header->load_offset);
2517
2518 DPRINTK(2, "device %s firmware being loaded at 0x%p (%d words)\n",
2519 fore200e->name, load_addr, fw_size);
2520
2521 if (le32_to_cpu(fw_header->magic) != FW_HEADER_MAGIC) {
2522 printk(FORE200E "corrupted %s firmware image\n", fore200e->bus->model_name);
2523 goto release;
2524 }
2525
2526 for (; fw_size--; fw_data++, load_addr++)
2527 fore200e->bus->write(le32_to_cpu(*fw_data), load_addr);
2528
2529 DPRINTK(2, "device %s firmware being started\n", fore200e->name);
2530
2531#if defined(__sparc_v9__)
2532 /* reported to be required by SBA cards on some sparc64 hosts */
2533 fore200e_spin(100);
2534#endif
2535
2536 sprintf(buf, "\rgo %x\r", le32_to_cpu(fw_header->start_offset));
2537 fore200e_monitor_puts(fore200e, buf);
2538
2539 if (fore200e_io_poll(fore200e, &fore200e->cp_monitor->bstat, BSTAT_CP_RUNNING, 1000) == 0) {
2540 printk(FORE200E "device %s firmware didn't start\n", fore200e->name);
2541 goto release;
2542 }
2543
2544 printk(FORE200E "device %s firmware started\n", fore200e->name);
2545
2546 fore200e->state = FORE200E_STATE_START_FW;
2547 err = 0;
2548
2549release:
2550 release_firmware(firmware);
2551 return err;
2552}
2553
2554
2555static int fore200e_register(struct fore200e *fore200e, struct device *parent)
2556{
2557 struct atm_dev* atm_dev;
2558
2559 DPRINTK(2, "device %s being registered\n", fore200e->name);
2560
2561 atm_dev = atm_dev_register(fore200e->bus->proc_name, parent, &fore200e_ops,
2562 -1, NULL);
2563 if (atm_dev == NULL) {
2564 printk(FORE200E "unable to register device %s\n", fore200e->name);
2565 return -ENODEV;
2566 }
2567
2568 atm_dev->dev_data = fore200e;
2569 fore200e->atm_dev = atm_dev;
2570
2571 atm_dev->ci_range.vpi_bits = FORE200E_VPI_BITS;
2572 atm_dev->ci_range.vci_bits = FORE200E_VCI_BITS;
2573
2574 fore200e->available_cell_rate = ATM_OC3_PCR;
2575
2576 fore200e->state = FORE200E_STATE_REGISTER;
2577 return 0;
2578}
2579
2580
2581static int fore200e_init(struct fore200e *fore200e, struct device *parent)
2582{
2583 if (fore200e_register(fore200e, parent) < 0)
2584 return -ENODEV;
2585
2586 if (fore200e->bus->configure(fore200e) < 0)
2587 return -ENODEV;
2588
2589 if (fore200e->bus->map(fore200e) < 0)
2590 return -ENODEV;
2591
2592 if (fore200e_reset(fore200e, 1) < 0)
2593 return -ENODEV;
2594
2595 if (fore200e_load_and_start_fw(fore200e) < 0)
2596 return -ENODEV;
2597
2598 if (fore200e_initialize(fore200e) < 0)
2599 return -ENODEV;
2600
2601 if (fore200e_init_cmd_queue(fore200e) < 0)
2602 return -ENOMEM;
2603
2604 if (fore200e_init_tx_queue(fore200e) < 0)
2605 return -ENOMEM;
2606
2607 if (fore200e_init_rx_queue(fore200e) < 0)
2608 return -ENOMEM;
2609
2610 if (fore200e_init_bs_queue(fore200e) < 0)
2611 return -ENOMEM;
2612
2613 if (fore200e_alloc_rx_buf(fore200e) < 0)
2614 return -ENOMEM;
2615
2616 if (fore200e_get_esi(fore200e) < 0)
2617 return -EIO;
2618
2619 if (fore200e_irq_request(fore200e) < 0)
2620 return -EBUSY;
2621
2622 fore200e_supply(fore200e);
2623
2624 /* all done, board initialization is now complete */
2625 fore200e->state = FORE200E_STATE_COMPLETE;
2626 return 0;
2627}
2628
2629#ifdef CONFIG_SBUS
2630static const struct of_device_id fore200e_sba_match[];
2631static int fore200e_sba_probe(struct platform_device *op)
2632{
2633 const struct of_device_id *match;
2634 const struct fore200e_bus *bus;
2635 struct fore200e *fore200e;
2636 static int index = 0;
2637 int err;
2638
2639 match = of_match_device(fore200e_sba_match, &op->dev);
2640 if (!match)
2641 return -EINVAL;
2642 bus = match->data;
2643
2644 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2645 if (!fore200e)
2646 return -ENOMEM;
2647
2648 fore200e->bus = bus;
2649 fore200e->bus_dev = op;
2650 fore200e->irq = op->archdata.irqs[0];
2651 fore200e->phys_base = op->resource[0].start;
2652
2653 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2654
2655 err = fore200e_init(fore200e, &op->dev);
2656 if (err < 0) {
2657 fore200e_shutdown(fore200e);
2658 kfree(fore200e);
2659 return err;
2660 }
2661
2662 index++;
2663 dev_set_drvdata(&op->dev, fore200e);
2664
2665 return 0;
2666}
2667
2668static int fore200e_sba_remove(struct platform_device *op)
2669{
2670 struct fore200e *fore200e = dev_get_drvdata(&op->dev);
2671
2672 fore200e_shutdown(fore200e);
2673 kfree(fore200e);
2674
2675 return 0;
2676}
2677
2678static const struct of_device_id fore200e_sba_match[] = {
2679 {
2680 .name = SBA200E_PROM_NAME,
2681 .data = (void *) &fore200e_bus[1],
2682 },
2683 {},
2684};
2685MODULE_DEVICE_TABLE(of, fore200e_sba_match);
2686
2687static struct platform_driver fore200e_sba_driver = {
2688 .driver = {
2689 .name = "fore_200e",
2690 .owner = THIS_MODULE,
2691 .of_match_table = fore200e_sba_match,
2692 },
2693 .probe = fore200e_sba_probe,
2694 .remove = fore200e_sba_remove,
2695};
2696#endif
2697
2698#ifdef CONFIG_PCI
2699static int fore200e_pca_detect(struct pci_dev *pci_dev,
2700 const struct pci_device_id *pci_ent)
2701{
2702 const struct fore200e_bus* bus = (struct fore200e_bus*) pci_ent->driver_data;
2703 struct fore200e* fore200e;
2704 int err = 0;
2705 static int index = 0;
2706
2707 if (pci_enable_device(pci_dev)) {
2708 err = -EINVAL;
2709 goto out;
2710 }
2711
2712 fore200e = kzalloc(sizeof(struct fore200e), GFP_KERNEL);
2713 if (fore200e == NULL) {
2714 err = -ENOMEM;
2715 goto out_disable;
2716 }
2717
2718 fore200e->bus = bus;
2719 fore200e->bus_dev = pci_dev;
2720 fore200e->irq = pci_dev->irq;
2721 fore200e->phys_base = pci_resource_start(pci_dev, 0);
2722
2723 sprintf(fore200e->name, "%s-%d", bus->model_name, index - 1);
2724
2725 pci_set_master(pci_dev);
2726
2727 printk(FORE200E "device %s found at 0x%lx, IRQ %s\n",
2728 fore200e->bus->model_name,
2729 fore200e->phys_base, fore200e_irq_itoa(fore200e->irq));
2730
2731 sprintf(fore200e->name, "%s-%d", bus->model_name, index);
2732
2733 err = fore200e_init(fore200e, &pci_dev->dev);
2734 if (err < 0) {
2735 fore200e_shutdown(fore200e);
2736 goto out_free;
2737 }
2738
2739 ++index;
2740 pci_set_drvdata(pci_dev, fore200e);
2741
2742out:
2743 return err;
2744
2745out_free:
2746 kfree(fore200e);
2747out_disable:
2748 pci_disable_device(pci_dev);
2749 goto out;
2750}
2751
2752
2753static void fore200e_pca_remove_one(struct pci_dev *pci_dev)
2754{
2755 struct fore200e *fore200e;
2756
2757 fore200e = pci_get_drvdata(pci_dev);
2758
2759 fore200e_shutdown(fore200e);
2760 kfree(fore200e);
2761 pci_disable_device(pci_dev);
2762}
2763
2764
2765static struct pci_device_id fore200e_pca_tbl[] = {
2766 { PCI_VENDOR_ID_FORE, PCI_DEVICE_ID_FORE_PCA200E, PCI_ANY_ID, PCI_ANY_ID,
2767 0, 0, (unsigned long) &fore200e_bus[0] },
2768 { 0, }
2769};
2770
2771MODULE_DEVICE_TABLE(pci, fore200e_pca_tbl);
2772
2773static struct pci_driver fore200e_pca_driver = {
2774 .name = "fore_200e",
2775 .probe = fore200e_pca_detect,
2776 .remove = fore200e_pca_remove_one,
2777 .id_table = fore200e_pca_tbl,
2778};
2779#endif
2780
2781static int __init fore200e_module_init(void)
2782{
2783 int err;
2784
2785 printk(FORE200E "FORE Systems 200E-series ATM driver - version " FORE200E_VERSION "\n");
2786
2787#ifdef CONFIG_SBUS
2788 err = platform_driver_register(&fore200e_sba_driver);
2789 if (err)
2790 return err;
2791#endif
2792
2793#ifdef CONFIG_PCI
2794 err = pci_register_driver(&fore200e_pca_driver);
2795#endif
2796
2797#ifdef CONFIG_SBUS
2798 if (err)
2799 platform_driver_unregister(&fore200e_sba_driver);
2800#endif
2801
2802 return err;
2803}
2804
2805static void __exit fore200e_module_cleanup(void)
2806{
2807#ifdef CONFIG_PCI
2808 pci_unregister_driver(&fore200e_pca_driver);
2809#endif
2810#ifdef CONFIG_SBUS
2811 platform_driver_unregister(&fore200e_sba_driver);
2812#endif
2813}
2814
2815static int
2816fore200e_proc_read(struct atm_dev *dev, loff_t* pos, char* page)
2817{
2818 struct fore200e* fore200e = FORE200E_DEV(dev);
2819 struct fore200e_vcc* fore200e_vcc;
2820 struct atm_vcc* vcc;
2821 int i, len, left = *pos;
2822 unsigned long flags;
2823
2824 if (!left--) {
2825
2826 if (fore200e_getstats(fore200e) < 0)
2827 return -EIO;
2828
2829 len = sprintf(page,"\n"
2830 " device:\n"
2831 " internal name:\t\t%s\n", fore200e->name);
2832
2833 /* print bus-specific information */
2834 if (fore200e->bus->proc_read)
2835 len += fore200e->bus->proc_read(fore200e, page + len);
2836
2837 len += sprintf(page + len,
2838 " interrupt line:\t\t%s\n"
2839 " physical base address:\t0x%p\n"
2840 " virtual base address:\t0x%p\n"
2841 " factory address (ESI):\t%pM\n"
2842 " board serial number:\t\t%d\n\n",
2843 fore200e_irq_itoa(fore200e->irq),
2844 (void*)fore200e->phys_base,
2845 fore200e->virt_base,
2846 fore200e->esi,
2847 fore200e->esi[4] * 256 + fore200e->esi[5]);
2848
2849 return len;
2850 }
2851
2852 if (!left--)
2853 return sprintf(page,
2854 " free small bufs, scheme 1:\t%d\n"
2855 " free large bufs, scheme 1:\t%d\n"
2856 " free small bufs, scheme 2:\t%d\n"
2857 " free large bufs, scheme 2:\t%d\n",
2858 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_SMALL ].freebuf_count,
2859 fore200e->host_bsq[ BUFFER_SCHEME_ONE ][ BUFFER_MAGN_LARGE ].freebuf_count,
2860 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_SMALL ].freebuf_count,
2861 fore200e->host_bsq[ BUFFER_SCHEME_TWO ][ BUFFER_MAGN_LARGE ].freebuf_count);
2862
2863 if (!left--) {
2864 u32 hb = fore200e->bus->read(&fore200e->cp_queues->heartbeat);
2865
2866 len = sprintf(page,"\n\n"
2867 " cell processor:\n"
2868 " heartbeat state:\t\t");
2869
2870 if (hb >> 16 != 0xDEAD)
2871 len += sprintf(page + len, "0x%08x\n", hb);
2872 else
2873 len += sprintf(page + len, "*** FATAL ERROR %04x ***\n", hb & 0xFFFF);
2874
2875 return len;
2876 }
2877
2878 if (!left--) {
2879 static const char* media_name[] = {
2880 "unshielded twisted pair",
2881 "multimode optical fiber ST",
2882 "multimode optical fiber SC",
2883 "single-mode optical fiber ST",
2884 "single-mode optical fiber SC",
2885 "unknown"
2886 };
2887
2888 static const char* oc3_mode[] = {
2889 "normal operation",
2890 "diagnostic loopback",
2891 "line loopback",
2892 "unknown"
2893 };
2894
2895 u32 fw_release = fore200e->bus->read(&fore200e->cp_queues->fw_release);
2896 u32 mon960_release = fore200e->bus->read(&fore200e->cp_queues->mon960_release);
2897 u32 oc3_revision = fore200e->bus->read(&fore200e->cp_queues->oc3_revision);
2898 u32 media_index = FORE200E_MEDIA_INDEX(fore200e->bus->read(&fore200e->cp_queues->media_type));
2899 u32 oc3_index;
2900
2901 if (media_index > 4)
2902 media_index = 5;
2903
2904 switch (fore200e->loop_mode) {
2905 case ATM_LM_NONE: oc3_index = 0;
2906 break;
2907 case ATM_LM_LOC_PHY: oc3_index = 1;
2908 break;
2909 case ATM_LM_RMT_PHY: oc3_index = 2;
2910 break;
2911 default: oc3_index = 3;
2912 }
2913
2914 return sprintf(page,
2915 " firmware release:\t\t%d.%d.%d\n"
2916 " monitor release:\t\t%d.%d\n"
2917 " media type:\t\t\t%s\n"
2918 " OC-3 revision:\t\t0x%x\n"
2919 " OC-3 mode:\t\t\t%s",
2920 fw_release >> 16, fw_release << 16 >> 24, fw_release << 24 >> 24,
2921 mon960_release >> 16, mon960_release << 16 >> 16,
2922 media_name[ media_index ],
2923 oc3_revision,
2924 oc3_mode[ oc3_index ]);
2925 }
2926
2927 if (!left--) {
2928 struct cp_monitor __iomem * cp_monitor = fore200e->cp_monitor;
2929
2930 return sprintf(page,
2931 "\n\n"
2932 " monitor:\n"
2933 " version number:\t\t%d\n"
2934 " boot status word:\t\t0x%08x\n",
2935 fore200e->bus->read(&cp_monitor->mon_version),
2936 fore200e->bus->read(&cp_monitor->bstat));
2937 }
2938
2939 if (!left--)
2940 return sprintf(page,
2941 "\n"
2942 " device statistics:\n"
2943 " 4b5b:\n"
2944 " crc_header_errors:\t\t%10u\n"
2945 " framing_errors:\t\t%10u\n",
2946 be32_to_cpu(fore200e->stats->phy.crc_header_errors),
2947 be32_to_cpu(fore200e->stats->phy.framing_errors));
2948
2949 if (!left--)
2950 return sprintf(page, "\n"
2951 " OC-3:\n"
2952 " section_bip8_errors:\t%10u\n"
2953 " path_bip8_errors:\t\t%10u\n"
2954 " line_bip24_errors:\t\t%10u\n"
2955 " line_febe_errors:\t\t%10u\n"
2956 " path_febe_errors:\t\t%10u\n"
2957 " corr_hcs_errors:\t\t%10u\n"
2958 " ucorr_hcs_errors:\t\t%10u\n",
2959 be32_to_cpu(fore200e->stats->oc3.section_bip8_errors),
2960 be32_to_cpu(fore200e->stats->oc3.path_bip8_errors),
2961 be32_to_cpu(fore200e->stats->oc3.line_bip24_errors),
2962 be32_to_cpu(fore200e->stats->oc3.line_febe_errors),
2963 be32_to_cpu(fore200e->stats->oc3.path_febe_errors),
2964 be32_to_cpu(fore200e->stats->oc3.corr_hcs_errors),
2965 be32_to_cpu(fore200e->stats->oc3.ucorr_hcs_errors));
2966
2967 if (!left--)
2968 return sprintf(page,"\n"
2969 " ATM:\t\t\t\t cells\n"
2970 " TX:\t\t\t%10u\n"
2971 " RX:\t\t\t%10u\n"
2972 " vpi out of range:\t\t%10u\n"
2973 " vpi no conn:\t\t%10u\n"
2974 " vci out of range:\t\t%10u\n"
2975 " vci no conn:\t\t%10u\n",
2976 be32_to_cpu(fore200e->stats->atm.cells_transmitted),
2977 be32_to_cpu(fore200e->stats->atm.cells_received),
2978 be32_to_cpu(fore200e->stats->atm.vpi_bad_range),
2979 be32_to_cpu(fore200e->stats->atm.vpi_no_conn),
2980 be32_to_cpu(fore200e->stats->atm.vci_bad_range),
2981 be32_to_cpu(fore200e->stats->atm.vci_no_conn));
2982
2983 if (!left--)
2984 return sprintf(page,"\n"
2985 " AAL0:\t\t\t cells\n"
2986 " TX:\t\t\t%10u\n"
2987 " RX:\t\t\t%10u\n"
2988 " dropped:\t\t\t%10u\n",
2989 be32_to_cpu(fore200e->stats->aal0.cells_transmitted),
2990 be32_to_cpu(fore200e->stats->aal0.cells_received),
2991 be32_to_cpu(fore200e->stats->aal0.cells_dropped));
2992
2993 if (!left--)
2994 return sprintf(page,"\n"
2995 " AAL3/4:\n"
2996 " SAR sublayer:\t\t cells\n"
2997 " TX:\t\t\t%10u\n"
2998 " RX:\t\t\t%10u\n"
2999 " dropped:\t\t\t%10u\n"
3000 " CRC errors:\t\t%10u\n"
3001 " protocol errors:\t\t%10u\n\n"
3002 " CS sublayer:\t\t PDUs\n"
3003 " TX:\t\t\t%10u\n"
3004 " RX:\t\t\t%10u\n"
3005 " dropped:\t\t\t%10u\n"
3006 " protocol errors:\t\t%10u\n",
3007 be32_to_cpu(fore200e->stats->aal34.cells_transmitted),
3008 be32_to_cpu(fore200e->stats->aal34.cells_received),
3009 be32_to_cpu(fore200e->stats->aal34.cells_dropped),
3010 be32_to_cpu(fore200e->stats->aal34.cells_crc_errors),
3011 be32_to_cpu(fore200e->stats->aal34.cells_protocol_errors),
3012 be32_to_cpu(fore200e->stats->aal34.cspdus_transmitted),
3013 be32_to_cpu(fore200e->stats->aal34.cspdus_received),
3014 be32_to_cpu(fore200e->stats->aal34.cspdus_dropped),
3015 be32_to_cpu(fore200e->stats->aal34.cspdus_protocol_errors));
3016
3017 if (!left--)
3018 return sprintf(page,"\n"
3019 " AAL5:\n"
3020 " SAR sublayer:\t\t cells\n"
3021 " TX:\t\t\t%10u\n"
3022 " RX:\t\t\t%10u\n"
3023 " dropped:\t\t\t%10u\n"
3024 " congestions:\t\t%10u\n\n"
3025 " CS sublayer:\t\t PDUs\n"
3026 " TX:\t\t\t%10u\n"
3027 " RX:\t\t\t%10u\n"
3028 " dropped:\t\t\t%10u\n"
3029 " CRC errors:\t\t%10u\n"
3030 " protocol errors:\t\t%10u\n",
3031 be32_to_cpu(fore200e->stats->aal5.cells_transmitted),
3032 be32_to_cpu(fore200e->stats->aal5.cells_received),
3033 be32_to_cpu(fore200e->stats->aal5.cells_dropped),
3034 be32_to_cpu(fore200e->stats->aal5.congestion_experienced),
3035 be32_to_cpu(fore200e->stats->aal5.cspdus_transmitted),
3036 be32_to_cpu(fore200e->stats->aal5.cspdus_received),
3037 be32_to_cpu(fore200e->stats->aal5.cspdus_dropped),
3038 be32_to_cpu(fore200e->stats->aal5.cspdus_crc_errors),
3039 be32_to_cpu(fore200e->stats->aal5.cspdus_protocol_errors));
3040
3041 if (!left--)
3042 return sprintf(page,"\n"
3043 " AUX:\t\t allocation failures\n"
3044 " small b1:\t\t\t%10u\n"
3045 " large b1:\t\t\t%10u\n"
3046 " small b2:\t\t\t%10u\n"
3047 " large b2:\t\t\t%10u\n"
3048 " RX PDUs:\t\t\t%10u\n"
3049 " TX PDUs:\t\t\t%10lu\n",
3050 be32_to_cpu(fore200e->stats->aux.small_b1_failed),
3051 be32_to_cpu(fore200e->stats->aux.large_b1_failed),
3052 be32_to_cpu(fore200e->stats->aux.small_b2_failed),
3053 be32_to_cpu(fore200e->stats->aux.large_b2_failed),
3054 be32_to_cpu(fore200e->stats->aux.rpd_alloc_failed),
3055 fore200e->tx_sat);
3056
3057 if (!left--)
3058 return sprintf(page,"\n"
3059 " receive carrier:\t\t\t%s\n",
3060 fore200e->stats->aux.receive_carrier ? "ON" : "OFF!");
3061
3062 if (!left--) {
3063 return sprintf(page,"\n"
3064 " VCCs:\n address VPI VCI AAL "
3065 "TX PDUs TX min/max size RX PDUs RX min/max size\n");
3066 }
3067
3068 for (i = 0; i < NBR_CONNECT; i++) {
3069
3070 vcc = fore200e->vc_map[i].vcc;
3071
3072 if (vcc == NULL)
3073 continue;
3074
3075 spin_lock_irqsave(&fore200e->q_lock, flags);
3076
3077 if (vcc && test_bit(ATM_VF_READY, &vcc->flags) && !left--) {
3078
3079 fore200e_vcc = FORE200E_VCC(vcc);
3080 ASSERT(fore200e_vcc);
3081
3082 len = sprintf(page,
3083 " %08x %03d %05d %1d %09lu %05d/%05d %09lu %05d/%05d\n",
3084 (u32)(unsigned long)vcc,
3085 vcc->vpi, vcc->vci, fore200e_atm2fore_aal(vcc->qos.aal),
3086 fore200e_vcc->tx_pdu,
3087 fore200e_vcc->tx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->tx_min_pdu,
3088 fore200e_vcc->tx_max_pdu,
3089 fore200e_vcc->rx_pdu,
3090 fore200e_vcc->rx_min_pdu > 0xFFFF ? 0 : fore200e_vcc->rx_min_pdu,
3091 fore200e_vcc->rx_max_pdu);
3092
3093 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3094 return len;
3095 }
3096
3097 spin_unlock_irqrestore(&fore200e->q_lock, flags);
3098 }
3099
3100 return 0;
3101}
3102
3103module_init(fore200e_module_init);
3104module_exit(fore200e_module_cleanup);
3105
3106
3107static const struct atmdev_ops fore200e_ops =
3108{
3109 .open = fore200e_open,
3110 .close = fore200e_close,
3111 .ioctl = fore200e_ioctl,
3112 .getsockopt = fore200e_getsockopt,
3113 .setsockopt = fore200e_setsockopt,
3114 .send = fore200e_send,
3115 .change_qos = fore200e_change_qos,
3116 .proc_read = fore200e_proc_read,
3117 .owner = THIS_MODULE
3118};
3119
3120
3121static const struct fore200e_bus fore200e_bus[] = {
3122#ifdef CONFIG_PCI
3123 { "PCA-200E", "pca200e", 32, 4, 32,
3124 fore200e_pca_read,
3125 fore200e_pca_write,
3126 fore200e_pca_dma_map,
3127 fore200e_pca_dma_unmap,
3128 fore200e_pca_dma_sync_for_cpu,
3129 fore200e_pca_dma_sync_for_device,
3130 fore200e_pca_dma_chunk_alloc,
3131 fore200e_pca_dma_chunk_free,
3132 fore200e_pca_configure,
3133 fore200e_pca_map,
3134 fore200e_pca_reset,
3135 fore200e_pca_prom_read,
3136 fore200e_pca_unmap,
3137 NULL,
3138 fore200e_pca_irq_check,
3139 fore200e_pca_irq_ack,
3140 fore200e_pca_proc_read,
3141 },
3142#endif
3143#ifdef CONFIG_SBUS
3144 { "SBA-200E", "sba200e", 32, 64, 32,
3145 fore200e_sba_read,
3146 fore200e_sba_write,
3147 fore200e_sba_dma_map,
3148 fore200e_sba_dma_unmap,
3149 fore200e_sba_dma_sync_for_cpu,
3150 fore200e_sba_dma_sync_for_device,
3151 fore200e_sba_dma_chunk_alloc,
3152 fore200e_sba_dma_chunk_free,
3153 fore200e_sba_configure,
3154 fore200e_sba_map,
3155 fore200e_sba_reset,
3156 fore200e_sba_prom_read,
3157 fore200e_sba_unmap,
3158 fore200e_sba_irq_enable,
3159 fore200e_sba_irq_check,
3160 fore200e_sba_irq_ack,
3161 fore200e_sba_proc_read,
3162 },
3163#endif
3164 {}
3165};
3166
3167MODULE_LICENSE("GPL");
3168#ifdef CONFIG_PCI
3169#ifdef __LITTLE_ENDIAN__
3170MODULE_FIRMWARE("pca200e.bin");
3171#else
3172MODULE_FIRMWARE("pca200e_ecd.bin2");
3173#endif
3174#endif /* CONFIG_PCI */
3175#ifdef CONFIG_SBUS
3176MODULE_FIRMWARE("sba200e_ecd.bin2");
3177#endif