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1
2#include <linux/device.h>
3#include <linux/io.h>
4#include <linux/ioport.h>
5#include <linux/module.h>
6#include <linux/of_address.h>
7#include <linux/pci_regs.h>
8#include <linux/sizes.h>
9#include <linux/slab.h>
10#include <linux/string.h>
11
12/* Max address size we deal with */
13#define OF_MAX_ADDR_CELLS 4
14#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
15#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
16
17static struct of_bus *of_match_bus(struct device_node *np);
18static int __of_address_to_resource(struct device_node *dev,
19 const __be32 *addrp, u64 size, unsigned int flags,
20 const char *name, struct resource *r);
21
22/* Debug utility */
23#ifdef DEBUG
24static void of_dump_addr(const char *s, const __be32 *addr, int na)
25{
26 printk(KERN_DEBUG "%s", s);
27 while (na--)
28 printk(" %08x", be32_to_cpu(*(addr++)));
29 printk("\n");
30}
31#else
32static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
33#endif
34
35/* Callbacks for bus specific translators */
36struct of_bus {
37 const char *name;
38 const char *addresses;
39 int (*match)(struct device_node *parent);
40 void (*count_cells)(struct device_node *child,
41 int *addrc, int *sizec);
42 u64 (*map)(__be32 *addr, const __be32 *range,
43 int na, int ns, int pna);
44 int (*translate)(__be32 *addr, u64 offset, int na);
45 unsigned int (*get_flags)(const __be32 *addr);
46};
47
48/*
49 * Default translator (generic bus)
50 */
51
52static void of_bus_default_count_cells(struct device_node *dev,
53 int *addrc, int *sizec)
54{
55 if (addrc)
56 *addrc = of_n_addr_cells(dev);
57 if (sizec)
58 *sizec = of_n_size_cells(dev);
59}
60
61static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
62 int na, int ns, int pna)
63{
64 u64 cp, s, da;
65
66 cp = of_read_number(range, na);
67 s = of_read_number(range + na + pna, ns);
68 da = of_read_number(addr, na);
69
70 pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
71 (unsigned long long)cp, (unsigned long long)s,
72 (unsigned long long)da);
73
74 if (da < cp || da >= (cp + s))
75 return OF_BAD_ADDR;
76 return da - cp;
77}
78
79static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
80{
81 u64 a = of_read_number(addr, na);
82 memset(addr, 0, na * 4);
83 a += offset;
84 if (na > 1)
85 addr[na - 2] = cpu_to_be32(a >> 32);
86 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
87
88 return 0;
89}
90
91static unsigned int of_bus_default_get_flags(const __be32 *addr)
92{
93 return IORESOURCE_MEM;
94}
95
96#ifdef CONFIG_OF_ADDRESS_PCI
97/*
98 * PCI bus specific translator
99 */
100
101static int of_bus_pci_match(struct device_node *np)
102{
103 /*
104 * "pciex" is PCI Express
105 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
106 * "ht" is hypertransport
107 */
108 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
109 !strcmp(np->type, "vci") || !strcmp(np->type, "ht");
110}
111
112static void of_bus_pci_count_cells(struct device_node *np,
113 int *addrc, int *sizec)
114{
115 if (addrc)
116 *addrc = 3;
117 if (sizec)
118 *sizec = 2;
119}
120
121static unsigned int of_bus_pci_get_flags(const __be32 *addr)
122{
123 unsigned int flags = 0;
124 u32 w = be32_to_cpup(addr);
125
126 switch((w >> 24) & 0x03) {
127 case 0x01:
128 flags |= IORESOURCE_IO;
129 break;
130 case 0x02: /* 32 bits */
131 case 0x03: /* 64 bits */
132 flags |= IORESOURCE_MEM;
133 break;
134 }
135 if (w & 0x40000000)
136 flags |= IORESOURCE_PREFETCH;
137 return flags;
138}
139
140static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
141 int pna)
142{
143 u64 cp, s, da;
144 unsigned int af, rf;
145
146 af = of_bus_pci_get_flags(addr);
147 rf = of_bus_pci_get_flags(range);
148
149 /* Check address type match */
150 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
151 return OF_BAD_ADDR;
152
153 /* Read address values, skipping high cell */
154 cp = of_read_number(range + 1, na - 1);
155 s = of_read_number(range + na + pna, ns);
156 da = of_read_number(addr + 1, na - 1);
157
158 pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
159 (unsigned long long)cp, (unsigned long long)s,
160 (unsigned long long)da);
161
162 if (da < cp || da >= (cp + s))
163 return OF_BAD_ADDR;
164 return da - cp;
165}
166
167static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
168{
169 return of_bus_default_translate(addr + 1, offset, na - 1);
170}
171#endif /* CONFIG_OF_ADDRESS_PCI */
172
173#ifdef CONFIG_PCI
174const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
175 unsigned int *flags)
176{
177 const __be32 *prop;
178 unsigned int psize;
179 struct device_node *parent;
180 struct of_bus *bus;
181 int onesize, i, na, ns;
182
183 /* Get parent & match bus type */
184 parent = of_get_parent(dev);
185 if (parent == NULL)
186 return NULL;
187 bus = of_match_bus(parent);
188 if (strcmp(bus->name, "pci")) {
189 of_node_put(parent);
190 return NULL;
191 }
192 bus->count_cells(dev, &na, &ns);
193 of_node_put(parent);
194 if (!OF_CHECK_ADDR_COUNT(na))
195 return NULL;
196
197 /* Get "reg" or "assigned-addresses" property */
198 prop = of_get_property(dev, bus->addresses, &psize);
199 if (prop == NULL)
200 return NULL;
201 psize /= 4;
202
203 onesize = na + ns;
204 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
205 u32 val = be32_to_cpu(prop[0]);
206 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
207 if (size)
208 *size = of_read_number(prop + na, ns);
209 if (flags)
210 *flags = bus->get_flags(prop);
211 return prop;
212 }
213 }
214 return NULL;
215}
216EXPORT_SYMBOL(of_get_pci_address);
217
218int of_pci_address_to_resource(struct device_node *dev, int bar,
219 struct resource *r)
220{
221 const __be32 *addrp;
222 u64 size;
223 unsigned int flags;
224
225 addrp = of_get_pci_address(dev, bar, &size, &flags);
226 if (addrp == NULL)
227 return -EINVAL;
228 return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
229}
230EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
231
232int of_pci_range_parser_init(struct of_pci_range_parser *parser,
233 struct device_node *node)
234{
235 const int na = 3, ns = 2;
236 int rlen;
237
238 parser->node = node;
239 parser->pna = of_n_addr_cells(node);
240 parser->np = parser->pna + na + ns;
241
242 parser->range = of_get_property(node, "ranges", &rlen);
243 if (parser->range == NULL)
244 return -ENOENT;
245
246 parser->end = parser->range + rlen / sizeof(__be32);
247
248 return 0;
249}
250EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
251
252struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
253 struct of_pci_range *range)
254{
255 const int na = 3, ns = 2;
256
257 if (!range)
258 return NULL;
259
260 if (!parser->range || parser->range + parser->np > parser->end)
261 return NULL;
262
263 range->pci_space = parser->range[0];
264 range->flags = of_bus_pci_get_flags(parser->range);
265 range->pci_addr = of_read_number(parser->range + 1, ns);
266 range->cpu_addr = of_translate_address(parser->node,
267 parser->range + na);
268 range->size = of_read_number(parser->range + parser->pna + na, ns);
269
270 parser->range += parser->np;
271
272 /* Now consume following elements while they are contiguous */
273 while (parser->range + parser->np <= parser->end) {
274 u32 flags, pci_space;
275 u64 pci_addr, cpu_addr, size;
276
277 pci_space = be32_to_cpup(parser->range);
278 flags = of_bus_pci_get_flags(parser->range);
279 pci_addr = of_read_number(parser->range + 1, ns);
280 cpu_addr = of_translate_address(parser->node,
281 parser->range + na);
282 size = of_read_number(parser->range + parser->pna + na, ns);
283
284 if (flags != range->flags)
285 break;
286 if (pci_addr != range->pci_addr + range->size ||
287 cpu_addr != range->cpu_addr + range->size)
288 break;
289
290 range->size += size;
291 parser->range += parser->np;
292 }
293
294 return range;
295}
296EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
297
298/*
299 * of_pci_range_to_resource - Create a resource from an of_pci_range
300 * @range: the PCI range that describes the resource
301 * @np: device node where the range belongs to
302 * @res: pointer to a valid resource that will be updated to
303 * reflect the values contained in the range.
304 *
305 * Returns EINVAL if the range cannot be converted to resource.
306 *
307 * Note that if the range is an IO range, the resource will be converted
308 * using pci_address_to_pio() which can fail if it is called too early or
309 * if the range cannot be matched to any host bridge IO space (our case here).
310 * To guard against that we try to register the IO range first.
311 * If that fails we know that pci_address_to_pio() will do too.
312 */
313int of_pci_range_to_resource(struct of_pci_range *range,
314 struct device_node *np, struct resource *res)
315{
316 int err;
317 res->flags = range->flags;
318 res->parent = res->child = res->sibling = NULL;
319 res->name = np->full_name;
320
321 if (res->flags & IORESOURCE_IO) {
322 unsigned long port;
323 err = pci_register_io_range(range->cpu_addr, range->size);
324 if (err)
325 goto invalid_range;
326 port = pci_address_to_pio(range->cpu_addr);
327 if (port == (unsigned long)-1) {
328 err = -EINVAL;
329 goto invalid_range;
330 }
331 res->start = port;
332 } else {
333 if ((sizeof(resource_size_t) < 8) &&
334 upper_32_bits(range->cpu_addr)) {
335 err = -EINVAL;
336 goto invalid_range;
337 }
338
339 res->start = range->cpu_addr;
340 }
341 res->end = res->start + range->size - 1;
342 return 0;
343
344invalid_range:
345 res->start = (resource_size_t)OF_BAD_ADDR;
346 res->end = (resource_size_t)OF_BAD_ADDR;
347 return err;
348}
349#endif /* CONFIG_PCI */
350
351/*
352 * ISA bus specific translator
353 */
354
355static int of_bus_isa_match(struct device_node *np)
356{
357 return !strcmp(np->name, "isa");
358}
359
360static void of_bus_isa_count_cells(struct device_node *child,
361 int *addrc, int *sizec)
362{
363 if (addrc)
364 *addrc = 2;
365 if (sizec)
366 *sizec = 1;
367}
368
369static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
370 int pna)
371{
372 u64 cp, s, da;
373
374 /* Check address type match */
375 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
376 return OF_BAD_ADDR;
377
378 /* Read address values, skipping high cell */
379 cp = of_read_number(range + 1, na - 1);
380 s = of_read_number(range + na + pna, ns);
381 da = of_read_number(addr + 1, na - 1);
382
383 pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
384 (unsigned long long)cp, (unsigned long long)s,
385 (unsigned long long)da);
386
387 if (da < cp || da >= (cp + s))
388 return OF_BAD_ADDR;
389 return da - cp;
390}
391
392static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
393{
394 return of_bus_default_translate(addr + 1, offset, na - 1);
395}
396
397static unsigned int of_bus_isa_get_flags(const __be32 *addr)
398{
399 unsigned int flags = 0;
400 u32 w = be32_to_cpup(addr);
401
402 if (w & 1)
403 flags |= IORESOURCE_IO;
404 else
405 flags |= IORESOURCE_MEM;
406 return flags;
407}
408
409/*
410 * Array of bus specific translators
411 */
412
413static struct of_bus of_busses[] = {
414#ifdef CONFIG_OF_ADDRESS_PCI
415 /* PCI */
416 {
417 .name = "pci",
418 .addresses = "assigned-addresses",
419 .match = of_bus_pci_match,
420 .count_cells = of_bus_pci_count_cells,
421 .map = of_bus_pci_map,
422 .translate = of_bus_pci_translate,
423 .get_flags = of_bus_pci_get_flags,
424 },
425#endif /* CONFIG_OF_ADDRESS_PCI */
426 /* ISA */
427 {
428 .name = "isa",
429 .addresses = "reg",
430 .match = of_bus_isa_match,
431 .count_cells = of_bus_isa_count_cells,
432 .map = of_bus_isa_map,
433 .translate = of_bus_isa_translate,
434 .get_flags = of_bus_isa_get_flags,
435 },
436 /* Default */
437 {
438 .name = "default",
439 .addresses = "reg",
440 .match = NULL,
441 .count_cells = of_bus_default_count_cells,
442 .map = of_bus_default_map,
443 .translate = of_bus_default_translate,
444 .get_flags = of_bus_default_get_flags,
445 },
446};
447
448static struct of_bus *of_match_bus(struct device_node *np)
449{
450 int i;
451
452 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
453 if (!of_busses[i].match || of_busses[i].match(np))
454 return &of_busses[i];
455 BUG();
456 return NULL;
457}
458
459static int of_empty_ranges_quirk(struct device_node *np)
460{
461 if (IS_ENABLED(CONFIG_PPC)) {
462 /* To save cycles, we cache the result for global "Mac" setting */
463 static int quirk_state = -1;
464
465 /* PA-SEMI sdc DT bug */
466 if (of_device_is_compatible(np, "1682m-sdc"))
467 return true;
468
469 /* Make quirk cached */
470 if (quirk_state < 0)
471 quirk_state =
472 of_machine_is_compatible("Power Macintosh") ||
473 of_machine_is_compatible("MacRISC");
474 return quirk_state;
475 }
476 return false;
477}
478
479static int of_translate_one(struct device_node *parent, struct of_bus *bus,
480 struct of_bus *pbus, __be32 *addr,
481 int na, int ns, int pna, const char *rprop)
482{
483 const __be32 *ranges;
484 unsigned int rlen;
485 int rone;
486 u64 offset = OF_BAD_ADDR;
487
488 /*
489 * Normally, an absence of a "ranges" property means we are
490 * crossing a non-translatable boundary, and thus the addresses
491 * below the current cannot be converted to CPU physical ones.
492 * Unfortunately, while this is very clear in the spec, it's not
493 * what Apple understood, and they do have things like /uni-n or
494 * /ht nodes with no "ranges" property and a lot of perfectly
495 * useable mapped devices below them. Thus we treat the absence of
496 * "ranges" as equivalent to an empty "ranges" property which means
497 * a 1:1 translation at that level. It's up to the caller not to try
498 * to translate addresses that aren't supposed to be translated in
499 * the first place. --BenH.
500 *
501 * As far as we know, this damage only exists on Apple machines, so
502 * This code is only enabled on powerpc. --gcl
503 */
504 ranges = of_get_property(parent, rprop, &rlen);
505 if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
506 pr_debug("OF: no ranges; cannot translate\n");
507 return 1;
508 }
509 if (ranges == NULL || rlen == 0) {
510 offset = of_read_number(addr, na);
511 memset(addr, 0, pna * 4);
512 pr_debug("OF: empty ranges; 1:1 translation\n");
513 goto finish;
514 }
515
516 pr_debug("OF: walking ranges...\n");
517
518 /* Now walk through the ranges */
519 rlen /= 4;
520 rone = na + pna + ns;
521 for (; rlen >= rone; rlen -= rone, ranges += rone) {
522 offset = bus->map(addr, ranges, na, ns, pna);
523 if (offset != OF_BAD_ADDR)
524 break;
525 }
526 if (offset == OF_BAD_ADDR) {
527 pr_debug("OF: not found !\n");
528 return 1;
529 }
530 memcpy(addr, ranges + na, 4 * pna);
531
532 finish:
533 of_dump_addr("OF: parent translation for:", addr, pna);
534 pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
535
536 /* Translate it into parent bus space */
537 return pbus->translate(addr, offset, pna);
538}
539
540/*
541 * Translate an address from the device-tree into a CPU physical address,
542 * this walks up the tree and applies the various bus mappings on the
543 * way.
544 *
545 * Note: We consider that crossing any level with #size-cells == 0 to mean
546 * that translation is impossible (that is we are not dealing with a value
547 * that can be mapped to a cpu physical address). This is not really specified
548 * that way, but this is traditionally the way IBM at least do things
549 */
550static u64 __of_translate_address(struct device_node *dev,
551 const __be32 *in_addr, const char *rprop)
552{
553 struct device_node *parent = NULL;
554 struct of_bus *bus, *pbus;
555 __be32 addr[OF_MAX_ADDR_CELLS];
556 int na, ns, pna, pns;
557 u64 result = OF_BAD_ADDR;
558
559 pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev));
560
561 /* Increase refcount at current level */
562 of_node_get(dev);
563
564 /* Get parent & match bus type */
565 parent = of_get_parent(dev);
566 if (parent == NULL)
567 goto bail;
568 bus = of_match_bus(parent);
569
570 /* Count address cells & copy address locally */
571 bus->count_cells(dev, &na, &ns);
572 if (!OF_CHECK_COUNTS(na, ns)) {
573 pr_debug("OF: Bad cell count for %s\n", of_node_full_name(dev));
574 goto bail;
575 }
576 memcpy(addr, in_addr, na * 4);
577
578 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
579 bus->name, na, ns, of_node_full_name(parent));
580 of_dump_addr("OF: translating address:", addr, na);
581
582 /* Translate */
583 for (;;) {
584 /* Switch to parent bus */
585 of_node_put(dev);
586 dev = parent;
587 parent = of_get_parent(dev);
588
589 /* If root, we have finished */
590 if (parent == NULL) {
591 pr_debug("OF: reached root node\n");
592 result = of_read_number(addr, na);
593 break;
594 }
595
596 /* Get new parent bus and counts */
597 pbus = of_match_bus(parent);
598 pbus->count_cells(dev, &pna, &pns);
599 if (!OF_CHECK_COUNTS(pna, pns)) {
600 pr_err("prom_parse: Bad cell count for %s\n",
601 of_node_full_name(dev));
602 break;
603 }
604
605 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
606 pbus->name, pna, pns, of_node_full_name(parent));
607
608 /* Apply bus translation */
609 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
610 break;
611
612 /* Complete the move up one level */
613 na = pna;
614 ns = pns;
615 bus = pbus;
616
617 of_dump_addr("OF: one level translation:", addr, na);
618 }
619 bail:
620 of_node_put(parent);
621 of_node_put(dev);
622
623 return result;
624}
625
626u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
627{
628 return __of_translate_address(dev, in_addr, "ranges");
629}
630EXPORT_SYMBOL(of_translate_address);
631
632u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
633{
634 return __of_translate_address(dev, in_addr, "dma-ranges");
635}
636EXPORT_SYMBOL(of_translate_dma_address);
637
638const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
639 unsigned int *flags)
640{
641 const __be32 *prop;
642 unsigned int psize;
643 struct device_node *parent;
644 struct of_bus *bus;
645 int onesize, i, na, ns;
646
647 /* Get parent & match bus type */
648 parent = of_get_parent(dev);
649 if (parent == NULL)
650 return NULL;
651 bus = of_match_bus(parent);
652 bus->count_cells(dev, &na, &ns);
653 of_node_put(parent);
654 if (!OF_CHECK_ADDR_COUNT(na))
655 return NULL;
656
657 /* Get "reg" or "assigned-addresses" property */
658 prop = of_get_property(dev, bus->addresses, &psize);
659 if (prop == NULL)
660 return NULL;
661 psize /= 4;
662
663 onesize = na + ns;
664 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
665 if (i == index) {
666 if (size)
667 *size = of_read_number(prop + na, ns);
668 if (flags)
669 *flags = bus->get_flags(prop);
670 return prop;
671 }
672 return NULL;
673}
674EXPORT_SYMBOL(of_get_address);
675
676#ifdef PCI_IOBASE
677struct io_range {
678 struct list_head list;
679 phys_addr_t start;
680 resource_size_t size;
681};
682
683static LIST_HEAD(io_range_list);
684static DEFINE_SPINLOCK(io_range_lock);
685#endif
686
687/*
688 * Record the PCI IO range (expressed as CPU physical address + size).
689 * Return a negative value if an error has occured, zero otherwise
690 */
691int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size)
692{
693 int err = 0;
694
695#ifdef PCI_IOBASE
696 struct io_range *range;
697 resource_size_t allocated_size = 0;
698
699 /* check if the range hasn't been previously recorded */
700 spin_lock(&io_range_lock);
701 list_for_each_entry(range, &io_range_list, list) {
702 if (addr >= range->start && addr + size <= range->start + size) {
703 /* range already registered, bail out */
704 goto end_register;
705 }
706 allocated_size += range->size;
707 }
708
709 /* range not registed yet, check for available space */
710 if (allocated_size + size - 1 > IO_SPACE_LIMIT) {
711 /* if it's too big check if 64K space can be reserved */
712 if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) {
713 err = -E2BIG;
714 goto end_register;
715 }
716
717 size = SZ_64K;
718 pr_warn("Requested IO range too big, new size set to 64K\n");
719 }
720
721 /* add the range to the list */
722 range = kzalloc(sizeof(*range), GFP_ATOMIC);
723 if (!range) {
724 err = -ENOMEM;
725 goto end_register;
726 }
727
728 range->start = addr;
729 range->size = size;
730
731 list_add_tail(&range->list, &io_range_list);
732
733end_register:
734 spin_unlock(&io_range_lock);
735#endif
736
737 return err;
738}
739
740phys_addr_t pci_pio_to_address(unsigned long pio)
741{
742 phys_addr_t address = (phys_addr_t)OF_BAD_ADDR;
743
744#ifdef PCI_IOBASE
745 struct io_range *range;
746 resource_size_t allocated_size = 0;
747
748 if (pio > IO_SPACE_LIMIT)
749 return address;
750
751 spin_lock(&io_range_lock);
752 list_for_each_entry(range, &io_range_list, list) {
753 if (pio >= allocated_size && pio < allocated_size + range->size) {
754 address = range->start + pio - allocated_size;
755 break;
756 }
757 allocated_size += range->size;
758 }
759 spin_unlock(&io_range_lock);
760#endif
761
762 return address;
763}
764
765unsigned long __weak pci_address_to_pio(phys_addr_t address)
766{
767#ifdef PCI_IOBASE
768 struct io_range *res;
769 resource_size_t offset = 0;
770 unsigned long addr = -1;
771
772 spin_lock(&io_range_lock);
773 list_for_each_entry(res, &io_range_list, list) {
774 if (address >= res->start && address < res->start + res->size) {
775 addr = address - res->start + offset;
776 break;
777 }
778 offset += res->size;
779 }
780 spin_unlock(&io_range_lock);
781
782 return addr;
783#else
784 if (address > IO_SPACE_LIMIT)
785 return (unsigned long)-1;
786
787 return (unsigned long) address;
788#endif
789}
790
791static int __of_address_to_resource(struct device_node *dev,
792 const __be32 *addrp, u64 size, unsigned int flags,
793 const char *name, struct resource *r)
794{
795 u64 taddr;
796
797 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
798 return -EINVAL;
799 taddr = of_translate_address(dev, addrp);
800 if (taddr == OF_BAD_ADDR)
801 return -EINVAL;
802 memset(r, 0, sizeof(struct resource));
803 if (flags & IORESOURCE_IO) {
804 unsigned long port;
805 port = pci_address_to_pio(taddr);
806 if (port == (unsigned long)-1)
807 return -EINVAL;
808 r->start = port;
809 r->end = port + size - 1;
810 } else {
811 r->start = taddr;
812 r->end = taddr + size - 1;
813 }
814 r->flags = flags;
815 r->name = name ? name : dev->full_name;
816
817 return 0;
818}
819
820/**
821 * of_address_to_resource - Translate device tree address and return as resource
822 *
823 * Note that if your address is a PIO address, the conversion will fail if
824 * the physical address can't be internally converted to an IO token with
825 * pci_address_to_pio(), that is because it's either called to early or it
826 * can't be matched to any host bridge IO space
827 */
828int of_address_to_resource(struct device_node *dev, int index,
829 struct resource *r)
830{
831 const __be32 *addrp;
832 u64 size;
833 unsigned int flags;
834 const char *name = NULL;
835
836 addrp = of_get_address(dev, index, &size, &flags);
837 if (addrp == NULL)
838 return -EINVAL;
839
840 /* Get optional "reg-names" property to add a name to a resource */
841 of_property_read_string_index(dev, "reg-names", index, &name);
842
843 return __of_address_to_resource(dev, addrp, size, flags, name, r);
844}
845EXPORT_SYMBOL_GPL(of_address_to_resource);
846
847struct device_node *of_find_matching_node_by_address(struct device_node *from,
848 const struct of_device_id *matches,
849 u64 base_address)
850{
851 struct device_node *dn = of_find_matching_node(from, matches);
852 struct resource res;
853
854 while (dn) {
855 if (!of_address_to_resource(dn, 0, &res) &&
856 res.start == base_address)
857 return dn;
858
859 dn = of_find_matching_node(dn, matches);
860 }
861
862 return NULL;
863}
864
865
866/**
867 * of_iomap - Maps the memory mapped IO for a given device_node
868 * @device: the device whose io range will be mapped
869 * @index: index of the io range
870 *
871 * Returns a pointer to the mapped memory
872 */
873void __iomem *of_iomap(struct device_node *np, int index)
874{
875 struct resource res;
876
877 if (of_address_to_resource(np, index, &res))
878 return NULL;
879
880 return ioremap(res.start, resource_size(&res));
881}
882EXPORT_SYMBOL(of_iomap);
883
884/*
885 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
886 * for a given device_node
887 * @device: the device whose io range will be mapped
888 * @index: index of the io range
889 * @name: name of the resource
890 *
891 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
892 * error code on failure. Usage example:
893 *
894 * base = of_io_request_and_map(node, 0, "foo");
895 * if (IS_ERR(base))
896 * return PTR_ERR(base);
897 */
898void __iomem *of_io_request_and_map(struct device_node *np, int index,
899 const char *name)
900{
901 struct resource res;
902 void __iomem *mem;
903
904 if (of_address_to_resource(np, index, &res))
905 return IOMEM_ERR_PTR(-EINVAL);
906
907 if (!request_mem_region(res.start, resource_size(&res), name))
908 return IOMEM_ERR_PTR(-EBUSY);
909
910 mem = ioremap(res.start, resource_size(&res));
911 if (!mem) {
912 release_mem_region(res.start, resource_size(&res));
913 return IOMEM_ERR_PTR(-ENOMEM);
914 }
915
916 return mem;
917}
918EXPORT_SYMBOL(of_io_request_and_map);
919
920/**
921 * of_dma_get_range - Get DMA range info
922 * @np: device node to get DMA range info
923 * @dma_addr: pointer to store initial DMA address of DMA range
924 * @paddr: pointer to store initial CPU address of DMA range
925 * @size: pointer to store size of DMA range
926 *
927 * Look in bottom up direction for the first "dma-ranges" property
928 * and parse it.
929 * dma-ranges format:
930 * DMA addr (dma_addr) : naddr cells
931 * CPU addr (phys_addr_t) : pna cells
932 * size : nsize cells
933 *
934 * It returns -ENODEV if "dma-ranges" property was not found
935 * for this device in DT.
936 */
937int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
938{
939 struct device_node *node = of_node_get(np);
940 const __be32 *ranges = NULL;
941 int len, naddr, nsize, pna;
942 int ret = 0;
943 u64 dmaaddr;
944
945 if (!node)
946 return -EINVAL;
947
948 while (1) {
949 naddr = of_n_addr_cells(node);
950 nsize = of_n_size_cells(node);
951 node = of_get_next_parent(node);
952 if (!node)
953 break;
954
955 ranges = of_get_property(node, "dma-ranges", &len);
956
957 /* Ignore empty ranges, they imply no translation required */
958 if (ranges && len > 0)
959 break;
960
961 /*
962 * At least empty ranges has to be defined for parent node if
963 * DMA is supported
964 */
965 if (!ranges)
966 break;
967 }
968
969 if (!ranges) {
970 pr_debug("%s: no dma-ranges found for node(%s)\n",
971 __func__, np->full_name);
972 ret = -ENODEV;
973 goto out;
974 }
975
976 len /= sizeof(u32);
977
978 pna = of_n_addr_cells(node);
979
980 /* dma-ranges format:
981 * DMA addr : naddr cells
982 * CPU addr : pna cells
983 * size : nsize cells
984 */
985 dmaaddr = of_read_number(ranges, naddr);
986 *paddr = of_translate_dma_address(np, ranges);
987 if (*paddr == OF_BAD_ADDR) {
988 pr_err("%s: translation of DMA address(%pad) to CPU address failed node(%s)\n",
989 __func__, dma_addr, np->full_name);
990 ret = -EINVAL;
991 goto out;
992 }
993 *dma_addr = dmaaddr;
994
995 *size = of_read_number(ranges + naddr + pna, nsize);
996
997 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
998 *dma_addr, *paddr, *size);
999
1000out:
1001 of_node_put(node);
1002
1003 return ret;
1004}
1005EXPORT_SYMBOL_GPL(of_dma_get_range);
1006
1007/**
1008 * of_dma_is_coherent - Check if device is coherent
1009 * @np: device node
1010 *
1011 * It returns true if "dma-coherent" property was found
1012 * for this device in DT.
1013 */
1014bool of_dma_is_coherent(struct device_node *np)
1015{
1016 struct device_node *node = of_node_get(np);
1017
1018 while (node) {
1019 if (of_property_read_bool(node, "dma-coherent")) {
1020 of_node_put(node);
1021 return true;
1022 }
1023 node = of_get_next_parent(node);
1024 }
1025 of_node_put(node);
1026 return false;
1027}
1028EXPORT_SYMBOL_GPL(of_dma_is_coherent);
1// SPDX-License-Identifier: GPL-2.0
2#define pr_fmt(fmt) "OF: " fmt
3
4#include <linux/device.h>
5#include <linux/fwnode.h>
6#include <linux/io.h>
7#include <linux/ioport.h>
8#include <linux/logic_pio.h>
9#include <linux/module.h>
10#include <linux/of_address.h>
11#include <linux/pci.h>
12#include <linux/pci_regs.h>
13#include <linux/sizes.h>
14#include <linux/slab.h>
15#include <linux/string.h>
16#include <linux/dma-direct.h> /* for bus_dma_region */
17
18#include "of_private.h"
19
20/* Max address size we deal with */
21#define OF_MAX_ADDR_CELLS 4
22#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
23#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
24
25static struct of_bus *of_match_bus(struct device_node *np);
26static int __of_address_to_resource(struct device_node *dev, int index,
27 int bar_no, struct resource *r);
28static bool of_mmio_is_nonposted(struct device_node *np);
29
30/* Debug utility */
31#ifdef DEBUG
32static void of_dump_addr(const char *s, const __be32 *addr, int na)
33{
34 pr_debug("%s", s);
35 while (na--)
36 pr_cont(" %08x", be32_to_cpu(*(addr++)));
37 pr_cont("\n");
38}
39#else
40static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
41#endif
42
43/* Callbacks for bus specific translators */
44struct of_bus {
45 const char *name;
46 const char *addresses;
47 int (*match)(struct device_node *parent);
48 void (*count_cells)(struct device_node *child,
49 int *addrc, int *sizec);
50 u64 (*map)(__be32 *addr, const __be32 *range,
51 int na, int ns, int pna);
52 int (*translate)(__be32 *addr, u64 offset, int na);
53 bool has_flags;
54 unsigned int (*get_flags)(const __be32 *addr);
55};
56
57/*
58 * Default translator (generic bus)
59 */
60
61static void of_bus_default_count_cells(struct device_node *dev,
62 int *addrc, int *sizec)
63{
64 if (addrc)
65 *addrc = of_n_addr_cells(dev);
66 if (sizec)
67 *sizec = of_n_size_cells(dev);
68}
69
70static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
71 int na, int ns, int pna)
72{
73 u64 cp, s, da;
74
75 cp = of_read_number(range, na);
76 s = of_read_number(range + na + pna, ns);
77 da = of_read_number(addr, na);
78
79 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
80
81 if (da < cp || da >= (cp + s))
82 return OF_BAD_ADDR;
83 return da - cp;
84}
85
86static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
87{
88 u64 a = of_read_number(addr, na);
89 memset(addr, 0, na * 4);
90 a += offset;
91 if (na > 1)
92 addr[na - 2] = cpu_to_be32(a >> 32);
93 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
94
95 return 0;
96}
97
98static unsigned int of_bus_default_get_flags(const __be32 *addr)
99{
100 return IORESOURCE_MEM;
101}
102
103#ifdef CONFIG_PCI
104static unsigned int of_bus_pci_get_flags(const __be32 *addr)
105{
106 unsigned int flags = 0;
107 u32 w = be32_to_cpup(addr);
108
109 if (!IS_ENABLED(CONFIG_PCI))
110 return 0;
111
112 switch((w >> 24) & 0x03) {
113 case 0x01:
114 flags |= IORESOURCE_IO;
115 break;
116 case 0x02: /* 32 bits */
117 flags |= IORESOURCE_MEM;
118 break;
119
120 case 0x03: /* 64 bits */
121 flags |= IORESOURCE_MEM | IORESOURCE_MEM_64;
122 break;
123 }
124 if (w & 0x40000000)
125 flags |= IORESOURCE_PREFETCH;
126 return flags;
127}
128
129/*
130 * PCI bus specific translator
131 */
132
133static bool of_node_is_pcie(struct device_node *np)
134{
135 bool is_pcie = of_node_name_eq(np, "pcie");
136
137 if (is_pcie)
138 pr_warn_once("%pOF: Missing device_type\n", np);
139
140 return is_pcie;
141}
142
143static int of_bus_pci_match(struct device_node *np)
144{
145 /*
146 * "pciex" is PCI Express
147 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
148 * "ht" is hypertransport
149 *
150 * If none of the device_type match, and that the node name is
151 * "pcie", accept the device as PCI (with a warning).
152 */
153 return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") ||
154 of_node_is_type(np, "vci") || of_node_is_type(np, "ht") ||
155 of_node_is_pcie(np);
156}
157
158static void of_bus_pci_count_cells(struct device_node *np,
159 int *addrc, int *sizec)
160{
161 if (addrc)
162 *addrc = 3;
163 if (sizec)
164 *sizec = 2;
165}
166
167static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
168 int pna)
169{
170 u64 cp, s, da;
171 unsigned int af, rf;
172
173 af = of_bus_pci_get_flags(addr);
174 rf = of_bus_pci_get_flags(range);
175
176 /* Check address type match */
177 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
178 return OF_BAD_ADDR;
179
180 /* Read address values, skipping high cell */
181 cp = of_read_number(range + 1, na - 1);
182 s = of_read_number(range + na + pna, ns);
183 da = of_read_number(addr + 1, na - 1);
184
185 pr_debug("PCI map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
186
187 if (da < cp || da >= (cp + s))
188 return OF_BAD_ADDR;
189 return da - cp;
190}
191
192static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
193{
194 return of_bus_default_translate(addr + 1, offset, na - 1);
195}
196#endif /* CONFIG_PCI */
197
198int of_pci_address_to_resource(struct device_node *dev, int bar,
199 struct resource *r)
200{
201
202 if (!IS_ENABLED(CONFIG_PCI))
203 return -ENOSYS;
204
205 return __of_address_to_resource(dev, -1, bar, r);
206}
207EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
208
209/*
210 * of_pci_range_to_resource - Create a resource from an of_pci_range
211 * @range: the PCI range that describes the resource
212 * @np: device node where the range belongs to
213 * @res: pointer to a valid resource that will be updated to
214 * reflect the values contained in the range.
215 *
216 * Returns EINVAL if the range cannot be converted to resource.
217 *
218 * Note that if the range is an IO range, the resource will be converted
219 * using pci_address_to_pio() which can fail if it is called too early or
220 * if the range cannot be matched to any host bridge IO space (our case here).
221 * To guard against that we try to register the IO range first.
222 * If that fails we know that pci_address_to_pio() will do too.
223 */
224int of_pci_range_to_resource(struct of_pci_range *range,
225 struct device_node *np, struct resource *res)
226{
227 int err;
228 res->flags = range->flags;
229 res->parent = res->child = res->sibling = NULL;
230 res->name = np->full_name;
231
232 if (!IS_ENABLED(CONFIG_PCI))
233 return -ENOSYS;
234
235 if (res->flags & IORESOURCE_IO) {
236 unsigned long port;
237 err = pci_register_io_range(&np->fwnode, range->cpu_addr,
238 range->size);
239 if (err)
240 goto invalid_range;
241 port = pci_address_to_pio(range->cpu_addr);
242 if (port == (unsigned long)-1) {
243 err = -EINVAL;
244 goto invalid_range;
245 }
246 res->start = port;
247 } else {
248 if ((sizeof(resource_size_t) < 8) &&
249 upper_32_bits(range->cpu_addr)) {
250 err = -EINVAL;
251 goto invalid_range;
252 }
253
254 res->start = range->cpu_addr;
255 }
256 res->end = res->start + range->size - 1;
257 return 0;
258
259invalid_range:
260 res->start = (resource_size_t)OF_BAD_ADDR;
261 res->end = (resource_size_t)OF_BAD_ADDR;
262 return err;
263}
264EXPORT_SYMBOL(of_pci_range_to_resource);
265
266/*
267 * ISA bus specific translator
268 */
269
270static int of_bus_isa_match(struct device_node *np)
271{
272 return of_node_name_eq(np, "isa");
273}
274
275static void of_bus_isa_count_cells(struct device_node *child,
276 int *addrc, int *sizec)
277{
278 if (addrc)
279 *addrc = 2;
280 if (sizec)
281 *sizec = 1;
282}
283
284static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
285 int pna)
286{
287 u64 cp, s, da;
288
289 /* Check address type match */
290 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
291 return OF_BAD_ADDR;
292
293 /* Read address values, skipping high cell */
294 cp = of_read_number(range + 1, na - 1);
295 s = of_read_number(range + na + pna, ns);
296 da = of_read_number(addr + 1, na - 1);
297
298 pr_debug("ISA map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
299
300 if (da < cp || da >= (cp + s))
301 return OF_BAD_ADDR;
302 return da - cp;
303}
304
305static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
306{
307 return of_bus_default_translate(addr + 1, offset, na - 1);
308}
309
310static unsigned int of_bus_isa_get_flags(const __be32 *addr)
311{
312 unsigned int flags = 0;
313 u32 w = be32_to_cpup(addr);
314
315 if (w & 1)
316 flags |= IORESOURCE_IO;
317 else
318 flags |= IORESOURCE_MEM;
319 return flags;
320}
321
322/*
323 * Array of bus specific translators
324 */
325
326static struct of_bus of_busses[] = {
327#ifdef CONFIG_PCI
328 /* PCI */
329 {
330 .name = "pci",
331 .addresses = "assigned-addresses",
332 .match = of_bus_pci_match,
333 .count_cells = of_bus_pci_count_cells,
334 .map = of_bus_pci_map,
335 .translate = of_bus_pci_translate,
336 .has_flags = true,
337 .get_flags = of_bus_pci_get_flags,
338 },
339#endif /* CONFIG_PCI */
340 /* ISA */
341 {
342 .name = "isa",
343 .addresses = "reg",
344 .match = of_bus_isa_match,
345 .count_cells = of_bus_isa_count_cells,
346 .map = of_bus_isa_map,
347 .translate = of_bus_isa_translate,
348 .has_flags = true,
349 .get_flags = of_bus_isa_get_flags,
350 },
351 /* Default */
352 {
353 .name = "default",
354 .addresses = "reg",
355 .match = NULL,
356 .count_cells = of_bus_default_count_cells,
357 .map = of_bus_default_map,
358 .translate = of_bus_default_translate,
359 .get_flags = of_bus_default_get_flags,
360 },
361};
362
363static struct of_bus *of_match_bus(struct device_node *np)
364{
365 int i;
366
367 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
368 if (!of_busses[i].match || of_busses[i].match(np))
369 return &of_busses[i];
370 BUG();
371 return NULL;
372}
373
374static int of_empty_ranges_quirk(struct device_node *np)
375{
376 if (IS_ENABLED(CONFIG_PPC)) {
377 /* To save cycles, we cache the result for global "Mac" setting */
378 static int quirk_state = -1;
379
380 /* PA-SEMI sdc DT bug */
381 if (of_device_is_compatible(np, "1682m-sdc"))
382 return true;
383
384 /* Make quirk cached */
385 if (quirk_state < 0)
386 quirk_state =
387 of_machine_is_compatible("Power Macintosh") ||
388 of_machine_is_compatible("MacRISC");
389 return quirk_state;
390 }
391 return false;
392}
393
394static int of_translate_one(struct device_node *parent, struct of_bus *bus,
395 struct of_bus *pbus, __be32 *addr,
396 int na, int ns, int pna, const char *rprop)
397{
398 const __be32 *ranges;
399 unsigned int rlen;
400 int rone;
401 u64 offset = OF_BAD_ADDR;
402
403 /*
404 * Normally, an absence of a "ranges" property means we are
405 * crossing a non-translatable boundary, and thus the addresses
406 * below the current cannot be converted to CPU physical ones.
407 * Unfortunately, while this is very clear in the spec, it's not
408 * what Apple understood, and they do have things like /uni-n or
409 * /ht nodes with no "ranges" property and a lot of perfectly
410 * useable mapped devices below them. Thus we treat the absence of
411 * "ranges" as equivalent to an empty "ranges" property which means
412 * a 1:1 translation at that level. It's up to the caller not to try
413 * to translate addresses that aren't supposed to be translated in
414 * the first place. --BenH.
415 *
416 * As far as we know, this damage only exists on Apple machines, so
417 * This code is only enabled on powerpc. --gcl
418 *
419 * This quirk also applies for 'dma-ranges' which frequently exist in
420 * child nodes without 'dma-ranges' in the parent nodes. --RobH
421 */
422 ranges = of_get_property(parent, rprop, &rlen);
423 if (ranges == NULL && !of_empty_ranges_quirk(parent) &&
424 strcmp(rprop, "dma-ranges")) {
425 pr_debug("no ranges; cannot translate\n");
426 return 1;
427 }
428 if (ranges == NULL || rlen == 0) {
429 offset = of_read_number(addr, na);
430 memset(addr, 0, pna * 4);
431 pr_debug("empty ranges; 1:1 translation\n");
432 goto finish;
433 }
434
435 pr_debug("walking ranges...\n");
436
437 /* Now walk through the ranges */
438 rlen /= 4;
439 rone = na + pna + ns;
440 for (; rlen >= rone; rlen -= rone, ranges += rone) {
441 offset = bus->map(addr, ranges, na, ns, pna);
442 if (offset != OF_BAD_ADDR)
443 break;
444 }
445 if (offset == OF_BAD_ADDR) {
446 pr_debug("not found !\n");
447 return 1;
448 }
449 memcpy(addr, ranges + na, 4 * pna);
450
451 finish:
452 of_dump_addr("parent translation for:", addr, pna);
453 pr_debug("with offset: %llx\n", offset);
454
455 /* Translate it into parent bus space */
456 return pbus->translate(addr, offset, pna);
457}
458
459/*
460 * Translate an address from the device-tree into a CPU physical address,
461 * this walks up the tree and applies the various bus mappings on the
462 * way.
463 *
464 * Note: We consider that crossing any level with #size-cells == 0 to mean
465 * that translation is impossible (that is we are not dealing with a value
466 * that can be mapped to a cpu physical address). This is not really specified
467 * that way, but this is traditionally the way IBM at least do things
468 *
469 * Whenever the translation fails, the *host pointer will be set to the
470 * device that had registered logical PIO mapping, and the return code is
471 * relative to that node.
472 */
473static u64 __of_translate_address(struct device_node *dev,
474 struct device_node *(*get_parent)(const struct device_node *),
475 const __be32 *in_addr, const char *rprop,
476 struct device_node **host)
477{
478 struct device_node *parent = NULL;
479 struct of_bus *bus, *pbus;
480 __be32 addr[OF_MAX_ADDR_CELLS];
481 int na, ns, pna, pns;
482 u64 result = OF_BAD_ADDR;
483
484 pr_debug("** translation for device %pOF **\n", dev);
485
486 /* Increase refcount at current level */
487 of_node_get(dev);
488
489 *host = NULL;
490 /* Get parent & match bus type */
491 parent = get_parent(dev);
492 if (parent == NULL)
493 goto bail;
494 bus = of_match_bus(parent);
495
496 /* Count address cells & copy address locally */
497 bus->count_cells(dev, &na, &ns);
498 if (!OF_CHECK_COUNTS(na, ns)) {
499 pr_debug("Bad cell count for %pOF\n", dev);
500 goto bail;
501 }
502 memcpy(addr, in_addr, na * 4);
503
504 pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
505 bus->name, na, ns, parent);
506 of_dump_addr("translating address:", addr, na);
507
508 /* Translate */
509 for (;;) {
510 struct logic_pio_hwaddr *iorange;
511
512 /* Switch to parent bus */
513 of_node_put(dev);
514 dev = parent;
515 parent = get_parent(dev);
516
517 /* If root, we have finished */
518 if (parent == NULL) {
519 pr_debug("reached root node\n");
520 result = of_read_number(addr, na);
521 break;
522 }
523
524 /*
525 * For indirectIO device which has no ranges property, get
526 * the address from reg directly.
527 */
528 iorange = find_io_range_by_fwnode(&dev->fwnode);
529 if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
530 result = of_read_number(addr + 1, na - 1);
531 pr_debug("indirectIO matched(%pOF) 0x%llx\n",
532 dev, result);
533 *host = of_node_get(dev);
534 break;
535 }
536
537 /* Get new parent bus and counts */
538 pbus = of_match_bus(parent);
539 pbus->count_cells(dev, &pna, &pns);
540 if (!OF_CHECK_COUNTS(pna, pns)) {
541 pr_err("Bad cell count for %pOF\n", dev);
542 break;
543 }
544
545 pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
546 pbus->name, pna, pns, parent);
547
548 /* Apply bus translation */
549 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
550 break;
551
552 /* Complete the move up one level */
553 na = pna;
554 ns = pns;
555 bus = pbus;
556
557 of_dump_addr("one level translation:", addr, na);
558 }
559 bail:
560 of_node_put(parent);
561 of_node_put(dev);
562
563 return result;
564}
565
566u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
567{
568 struct device_node *host;
569 u64 ret;
570
571 ret = __of_translate_address(dev, of_get_parent,
572 in_addr, "ranges", &host);
573 if (host) {
574 of_node_put(host);
575 return OF_BAD_ADDR;
576 }
577
578 return ret;
579}
580EXPORT_SYMBOL(of_translate_address);
581
582static struct device_node *__of_get_dma_parent(const struct device_node *np)
583{
584 struct of_phandle_args args;
585 int ret, index;
586
587 index = of_property_match_string(np, "interconnect-names", "dma-mem");
588 if (index < 0)
589 return of_get_parent(np);
590
591 ret = of_parse_phandle_with_args(np, "interconnects",
592 "#interconnect-cells",
593 index, &args);
594 if (ret < 0)
595 return of_get_parent(np);
596
597 return of_node_get(args.np);
598}
599
600static struct device_node *of_get_next_dma_parent(struct device_node *np)
601{
602 struct device_node *parent;
603
604 parent = __of_get_dma_parent(np);
605 of_node_put(np);
606
607 return parent;
608}
609
610u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
611{
612 struct device_node *host;
613 u64 ret;
614
615 ret = __of_translate_address(dev, __of_get_dma_parent,
616 in_addr, "dma-ranges", &host);
617
618 if (host) {
619 of_node_put(host);
620 return OF_BAD_ADDR;
621 }
622
623 return ret;
624}
625EXPORT_SYMBOL(of_translate_dma_address);
626
627const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no,
628 u64 *size, unsigned int *flags)
629{
630 const __be32 *prop;
631 unsigned int psize;
632 struct device_node *parent;
633 struct of_bus *bus;
634 int onesize, i, na, ns;
635
636 /* Get parent & match bus type */
637 parent = of_get_parent(dev);
638 if (parent == NULL)
639 return NULL;
640 bus = of_match_bus(parent);
641 if (strcmp(bus->name, "pci") && (bar_no >= 0)) {
642 of_node_put(parent);
643 return NULL;
644 }
645 bus->count_cells(dev, &na, &ns);
646 of_node_put(parent);
647 if (!OF_CHECK_ADDR_COUNT(na))
648 return NULL;
649
650 /* Get "reg" or "assigned-addresses" property */
651 prop = of_get_property(dev, bus->addresses, &psize);
652 if (prop == NULL)
653 return NULL;
654 psize /= 4;
655
656 onesize = na + ns;
657 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
658 u32 val = be32_to_cpu(prop[0]);
659 /* PCI bus matches on BAR number instead of index */
660 if (((bar_no >= 0) && ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0))) ||
661 ((index >= 0) && (i == index))) {
662 if (size)
663 *size = of_read_number(prop + na, ns);
664 if (flags)
665 *flags = bus->get_flags(prop);
666 return prop;
667 }
668 }
669 return NULL;
670}
671EXPORT_SYMBOL(__of_get_address);
672
673static int parser_init(struct of_pci_range_parser *parser,
674 struct device_node *node, const char *name)
675{
676 int rlen;
677
678 parser->node = node;
679 parser->pna = of_n_addr_cells(node);
680 parser->na = of_bus_n_addr_cells(node);
681 parser->ns = of_bus_n_size_cells(node);
682 parser->dma = !strcmp(name, "dma-ranges");
683 parser->bus = of_match_bus(node);
684
685 parser->range = of_get_property(node, name, &rlen);
686 if (parser->range == NULL)
687 return -ENOENT;
688
689 parser->end = parser->range + rlen / sizeof(__be32);
690
691 return 0;
692}
693
694int of_pci_range_parser_init(struct of_pci_range_parser *parser,
695 struct device_node *node)
696{
697 return parser_init(parser, node, "ranges");
698}
699EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
700
701int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
702 struct device_node *node)
703{
704 return parser_init(parser, node, "dma-ranges");
705}
706EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
707#define of_dma_range_parser_init of_pci_dma_range_parser_init
708
709struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
710 struct of_pci_range *range)
711{
712 int na = parser->na;
713 int ns = parser->ns;
714 int np = parser->pna + na + ns;
715 int busflag_na = 0;
716
717 if (!range)
718 return NULL;
719
720 if (!parser->range || parser->range + np > parser->end)
721 return NULL;
722
723 range->flags = parser->bus->get_flags(parser->range);
724
725 /* A extra cell for resource flags */
726 if (parser->bus->has_flags)
727 busflag_na = 1;
728
729 range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
730
731 if (parser->dma)
732 range->cpu_addr = of_translate_dma_address(parser->node,
733 parser->range + na);
734 else
735 range->cpu_addr = of_translate_address(parser->node,
736 parser->range + na);
737 range->size = of_read_number(parser->range + parser->pna + na, ns);
738
739 parser->range += np;
740
741 /* Now consume following elements while they are contiguous */
742 while (parser->range + np <= parser->end) {
743 u32 flags = 0;
744 u64 bus_addr, cpu_addr, size;
745
746 flags = parser->bus->get_flags(parser->range);
747 bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
748 if (parser->dma)
749 cpu_addr = of_translate_dma_address(parser->node,
750 parser->range + na);
751 else
752 cpu_addr = of_translate_address(parser->node,
753 parser->range + na);
754 size = of_read_number(parser->range + parser->pna + na, ns);
755
756 if (flags != range->flags)
757 break;
758 if (bus_addr != range->bus_addr + range->size ||
759 cpu_addr != range->cpu_addr + range->size)
760 break;
761
762 range->size += size;
763 parser->range += np;
764 }
765
766 return range;
767}
768EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
769
770static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
771 u64 size)
772{
773 u64 taddr;
774 unsigned long port;
775 struct device_node *host;
776
777 taddr = __of_translate_address(dev, of_get_parent,
778 in_addr, "ranges", &host);
779 if (host) {
780 /* host-specific port access */
781 port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
782 of_node_put(host);
783 } else {
784 /* memory-mapped I/O range */
785 port = pci_address_to_pio(taddr);
786 }
787
788 if (port == (unsigned long)-1)
789 return OF_BAD_ADDR;
790
791 return port;
792}
793
794static int __of_address_to_resource(struct device_node *dev, int index, int bar_no,
795 struct resource *r)
796{
797 u64 taddr;
798 const __be32 *addrp;
799 u64 size;
800 unsigned int flags;
801 const char *name = NULL;
802
803 addrp = __of_get_address(dev, index, bar_no, &size, &flags);
804 if (addrp == NULL)
805 return -EINVAL;
806
807 /* Get optional "reg-names" property to add a name to a resource */
808 if (index >= 0)
809 of_property_read_string_index(dev, "reg-names", index, &name);
810
811 if (flags & IORESOURCE_MEM)
812 taddr = of_translate_address(dev, addrp);
813 else if (flags & IORESOURCE_IO)
814 taddr = of_translate_ioport(dev, addrp, size);
815 else
816 return -EINVAL;
817
818 if (taddr == OF_BAD_ADDR)
819 return -EINVAL;
820 memset(r, 0, sizeof(struct resource));
821
822 if (of_mmio_is_nonposted(dev))
823 flags |= IORESOURCE_MEM_NONPOSTED;
824
825 r->start = taddr;
826 r->end = taddr + size - 1;
827 r->flags = flags;
828 r->name = name ? name : dev->full_name;
829
830 return 0;
831}
832
833/**
834 * of_address_to_resource - Translate device tree address and return as resource
835 * @dev: Caller's Device Node
836 * @index: Index into the array
837 * @r: Pointer to resource array
838 *
839 * Note that if your address is a PIO address, the conversion will fail if
840 * the physical address can't be internally converted to an IO token with
841 * pci_address_to_pio(), that is because it's either called too early or it
842 * can't be matched to any host bridge IO space
843 */
844int of_address_to_resource(struct device_node *dev, int index,
845 struct resource *r)
846{
847 return __of_address_to_resource(dev, index, -1, r);
848}
849EXPORT_SYMBOL_GPL(of_address_to_resource);
850
851/**
852 * of_iomap - Maps the memory mapped IO for a given device_node
853 * @np: the device whose io range will be mapped
854 * @index: index of the io range
855 *
856 * Returns a pointer to the mapped memory
857 */
858void __iomem *of_iomap(struct device_node *np, int index)
859{
860 struct resource res;
861
862 if (of_address_to_resource(np, index, &res))
863 return NULL;
864
865 if (res.flags & IORESOURCE_MEM_NONPOSTED)
866 return ioremap_np(res.start, resource_size(&res));
867 else
868 return ioremap(res.start, resource_size(&res));
869}
870EXPORT_SYMBOL(of_iomap);
871
872/*
873 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
874 * for a given device_node
875 * @device: the device whose io range will be mapped
876 * @index: index of the io range
877 * @name: name "override" for the memory region request or NULL
878 *
879 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
880 * error code on failure. Usage example:
881 *
882 * base = of_io_request_and_map(node, 0, "foo");
883 * if (IS_ERR(base))
884 * return PTR_ERR(base);
885 */
886void __iomem *of_io_request_and_map(struct device_node *np, int index,
887 const char *name)
888{
889 struct resource res;
890 void __iomem *mem;
891
892 if (of_address_to_resource(np, index, &res))
893 return IOMEM_ERR_PTR(-EINVAL);
894
895 if (!name)
896 name = res.name;
897 if (!request_mem_region(res.start, resource_size(&res), name))
898 return IOMEM_ERR_PTR(-EBUSY);
899
900 if (res.flags & IORESOURCE_MEM_NONPOSTED)
901 mem = ioremap_np(res.start, resource_size(&res));
902 else
903 mem = ioremap(res.start, resource_size(&res));
904
905 if (!mem) {
906 release_mem_region(res.start, resource_size(&res));
907 return IOMEM_ERR_PTR(-ENOMEM);
908 }
909
910 return mem;
911}
912EXPORT_SYMBOL(of_io_request_and_map);
913
914#ifdef CONFIG_HAS_DMA
915/**
916 * of_dma_get_range - Get DMA range info and put it into a map array
917 * @np: device node to get DMA range info
918 * @map: dma range structure to return
919 *
920 * Look in bottom up direction for the first "dma-ranges" property
921 * and parse it. Put the information into a DMA offset map array.
922 *
923 * dma-ranges format:
924 * DMA addr (dma_addr) : naddr cells
925 * CPU addr (phys_addr_t) : pna cells
926 * size : nsize cells
927 *
928 * It returns -ENODEV if "dma-ranges" property was not found for this
929 * device in the DT.
930 */
931int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map)
932{
933 struct device_node *node = of_node_get(np);
934 const __be32 *ranges = NULL;
935 bool found_dma_ranges = false;
936 struct of_range_parser parser;
937 struct of_range range;
938 struct bus_dma_region *r;
939 int len, num_ranges = 0;
940 int ret = 0;
941
942 while (node) {
943 ranges = of_get_property(node, "dma-ranges", &len);
944
945 /* Ignore empty ranges, they imply no translation required */
946 if (ranges && len > 0)
947 break;
948
949 /* Once we find 'dma-ranges', then a missing one is an error */
950 if (found_dma_ranges && !ranges) {
951 ret = -ENODEV;
952 goto out;
953 }
954 found_dma_ranges = true;
955
956 node = of_get_next_dma_parent(node);
957 }
958
959 if (!node || !ranges) {
960 pr_debug("no dma-ranges found for node(%pOF)\n", np);
961 ret = -ENODEV;
962 goto out;
963 }
964
965 of_dma_range_parser_init(&parser, node);
966 for_each_of_range(&parser, &range)
967 num_ranges++;
968
969 r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL);
970 if (!r) {
971 ret = -ENOMEM;
972 goto out;
973 }
974
975 /*
976 * Record all info in the generic DMA ranges array for struct device.
977 */
978 *map = r;
979 of_dma_range_parser_init(&parser, node);
980 for_each_of_range(&parser, &range) {
981 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
982 range.bus_addr, range.cpu_addr, range.size);
983 if (range.cpu_addr == OF_BAD_ADDR) {
984 pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n",
985 range.bus_addr, node);
986 continue;
987 }
988 r->cpu_start = range.cpu_addr;
989 r->dma_start = range.bus_addr;
990 r->size = range.size;
991 r->offset = range.cpu_addr - range.bus_addr;
992 r++;
993 }
994out:
995 of_node_put(node);
996 return ret;
997}
998#endif /* CONFIG_HAS_DMA */
999
1000/**
1001 * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA
1002 * @np: The node to start searching from or NULL to start from the root
1003 *
1004 * Gets the highest CPU physical address that is addressable by all DMA masters
1005 * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no
1006 * DMA constrained device is found, it returns PHYS_ADDR_MAX.
1007 */
1008phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np)
1009{
1010 phys_addr_t max_cpu_addr = PHYS_ADDR_MAX;
1011 struct of_range_parser parser;
1012 phys_addr_t subtree_max_addr;
1013 struct device_node *child;
1014 struct of_range range;
1015 const __be32 *ranges;
1016 u64 cpu_end = 0;
1017 int len;
1018
1019 if (!np)
1020 np = of_root;
1021
1022 ranges = of_get_property(np, "dma-ranges", &len);
1023 if (ranges && len) {
1024 of_dma_range_parser_init(&parser, np);
1025 for_each_of_range(&parser, &range)
1026 if (range.cpu_addr + range.size > cpu_end)
1027 cpu_end = range.cpu_addr + range.size - 1;
1028
1029 if (max_cpu_addr > cpu_end)
1030 max_cpu_addr = cpu_end;
1031 }
1032
1033 for_each_available_child_of_node(np, child) {
1034 subtree_max_addr = of_dma_get_max_cpu_address(child);
1035 if (max_cpu_addr > subtree_max_addr)
1036 max_cpu_addr = subtree_max_addr;
1037 }
1038
1039 return max_cpu_addr;
1040}
1041
1042/**
1043 * of_dma_is_coherent - Check if device is coherent
1044 * @np: device node
1045 *
1046 * It returns true if "dma-coherent" property was found
1047 * for this device in the DT, or if DMA is coherent by
1048 * default for OF devices on the current platform.
1049 */
1050bool of_dma_is_coherent(struct device_node *np)
1051{
1052 struct device_node *node;
1053
1054 if (IS_ENABLED(CONFIG_OF_DMA_DEFAULT_COHERENT))
1055 return true;
1056
1057 node = of_node_get(np);
1058
1059 while (node) {
1060 if (of_property_read_bool(node, "dma-coherent")) {
1061 of_node_put(node);
1062 return true;
1063 }
1064 node = of_get_next_dma_parent(node);
1065 }
1066 of_node_put(node);
1067 return false;
1068}
1069EXPORT_SYMBOL_GPL(of_dma_is_coherent);
1070
1071/**
1072 * of_mmio_is_nonposted - Check if device uses non-posted MMIO
1073 * @np: device node
1074 *
1075 * Returns true if the "nonposted-mmio" property was found for
1076 * the device's bus.
1077 *
1078 * This is currently only enabled on builds that support Apple ARM devices, as
1079 * an optimization.
1080 */
1081static bool of_mmio_is_nonposted(struct device_node *np)
1082{
1083 struct device_node *parent;
1084 bool nonposted;
1085
1086 if (!IS_ENABLED(CONFIG_ARCH_APPLE))
1087 return false;
1088
1089 parent = of_get_parent(np);
1090 if (!parent)
1091 return false;
1092
1093 nonposted = of_property_read_bool(parent, "nonposted-mmio");
1094
1095 of_node_put(parent);
1096 return nonposted;
1097}