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1
2#include <linux/device.h>
3#include <linux/io.h>
4#include <linux/ioport.h>
5#include <linux/module.h>
6#include <linux/of_address.h>
7#include <linux/pci_regs.h>
8#include <linux/sizes.h>
9#include <linux/slab.h>
10#include <linux/string.h>
11
12/* Max address size we deal with */
13#define OF_MAX_ADDR_CELLS 4
14#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
15#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
16
17static struct of_bus *of_match_bus(struct device_node *np);
18static int __of_address_to_resource(struct device_node *dev,
19 const __be32 *addrp, u64 size, unsigned int flags,
20 const char *name, struct resource *r);
21
22/* Debug utility */
23#ifdef DEBUG
24static void of_dump_addr(const char *s, const __be32 *addr, int na)
25{
26 printk(KERN_DEBUG "%s", s);
27 while (na--)
28 printk(" %08x", be32_to_cpu(*(addr++)));
29 printk("\n");
30}
31#else
32static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
33#endif
34
35/* Callbacks for bus specific translators */
36struct of_bus {
37 const char *name;
38 const char *addresses;
39 int (*match)(struct device_node *parent);
40 void (*count_cells)(struct device_node *child,
41 int *addrc, int *sizec);
42 u64 (*map)(__be32 *addr, const __be32 *range,
43 int na, int ns, int pna);
44 int (*translate)(__be32 *addr, u64 offset, int na);
45 unsigned int (*get_flags)(const __be32 *addr);
46};
47
48/*
49 * Default translator (generic bus)
50 */
51
52static void of_bus_default_count_cells(struct device_node *dev,
53 int *addrc, int *sizec)
54{
55 if (addrc)
56 *addrc = of_n_addr_cells(dev);
57 if (sizec)
58 *sizec = of_n_size_cells(dev);
59}
60
61static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
62 int na, int ns, int pna)
63{
64 u64 cp, s, da;
65
66 cp = of_read_number(range, na);
67 s = of_read_number(range + na + pna, ns);
68 da = of_read_number(addr, na);
69
70 pr_debug("OF: default map, cp=%llx, s=%llx, da=%llx\n",
71 (unsigned long long)cp, (unsigned long long)s,
72 (unsigned long long)da);
73
74 if (da < cp || da >= (cp + s))
75 return OF_BAD_ADDR;
76 return da - cp;
77}
78
79static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
80{
81 u64 a = of_read_number(addr, na);
82 memset(addr, 0, na * 4);
83 a += offset;
84 if (na > 1)
85 addr[na - 2] = cpu_to_be32(a >> 32);
86 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
87
88 return 0;
89}
90
91static unsigned int of_bus_default_get_flags(const __be32 *addr)
92{
93 return IORESOURCE_MEM;
94}
95
96#ifdef CONFIG_OF_ADDRESS_PCI
97/*
98 * PCI bus specific translator
99 */
100
101static int of_bus_pci_match(struct device_node *np)
102{
103 /*
104 * "pciex" is PCI Express
105 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
106 * "ht" is hypertransport
107 */
108 return !strcmp(np->type, "pci") || !strcmp(np->type, "pciex") ||
109 !strcmp(np->type, "vci") || !strcmp(np->type, "ht");
110}
111
112static void of_bus_pci_count_cells(struct device_node *np,
113 int *addrc, int *sizec)
114{
115 if (addrc)
116 *addrc = 3;
117 if (sizec)
118 *sizec = 2;
119}
120
121static unsigned int of_bus_pci_get_flags(const __be32 *addr)
122{
123 unsigned int flags = 0;
124 u32 w = be32_to_cpup(addr);
125
126 switch((w >> 24) & 0x03) {
127 case 0x01:
128 flags |= IORESOURCE_IO;
129 break;
130 case 0x02: /* 32 bits */
131 case 0x03: /* 64 bits */
132 flags |= IORESOURCE_MEM;
133 break;
134 }
135 if (w & 0x40000000)
136 flags |= IORESOURCE_PREFETCH;
137 return flags;
138}
139
140static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
141 int pna)
142{
143 u64 cp, s, da;
144 unsigned int af, rf;
145
146 af = of_bus_pci_get_flags(addr);
147 rf = of_bus_pci_get_flags(range);
148
149 /* Check address type match */
150 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
151 return OF_BAD_ADDR;
152
153 /* Read address values, skipping high cell */
154 cp = of_read_number(range + 1, na - 1);
155 s = of_read_number(range + na + pna, ns);
156 da = of_read_number(addr + 1, na - 1);
157
158 pr_debug("OF: PCI map, cp=%llx, s=%llx, da=%llx\n",
159 (unsigned long long)cp, (unsigned long long)s,
160 (unsigned long long)da);
161
162 if (da < cp || da >= (cp + s))
163 return OF_BAD_ADDR;
164 return da - cp;
165}
166
167static int of_bus_pci_translate(__be32 *addr, u64 offset, int na)
168{
169 return of_bus_default_translate(addr + 1, offset, na - 1);
170}
171#endif /* CONFIG_OF_ADDRESS_PCI */
172
173#ifdef CONFIG_PCI
174const __be32 *of_get_pci_address(struct device_node *dev, int bar_no, u64 *size,
175 unsigned int *flags)
176{
177 const __be32 *prop;
178 unsigned int psize;
179 struct device_node *parent;
180 struct of_bus *bus;
181 int onesize, i, na, ns;
182
183 /* Get parent & match bus type */
184 parent = of_get_parent(dev);
185 if (parent == NULL)
186 return NULL;
187 bus = of_match_bus(parent);
188 if (strcmp(bus->name, "pci")) {
189 of_node_put(parent);
190 return NULL;
191 }
192 bus->count_cells(dev, &na, &ns);
193 of_node_put(parent);
194 if (!OF_CHECK_ADDR_COUNT(na))
195 return NULL;
196
197 /* Get "reg" or "assigned-addresses" property */
198 prop = of_get_property(dev, bus->addresses, &psize);
199 if (prop == NULL)
200 return NULL;
201 psize /= 4;
202
203 onesize = na + ns;
204 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
205 u32 val = be32_to_cpu(prop[0]);
206 if ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0)) {
207 if (size)
208 *size = of_read_number(prop + na, ns);
209 if (flags)
210 *flags = bus->get_flags(prop);
211 return prop;
212 }
213 }
214 return NULL;
215}
216EXPORT_SYMBOL(of_get_pci_address);
217
218int of_pci_address_to_resource(struct device_node *dev, int bar,
219 struct resource *r)
220{
221 const __be32 *addrp;
222 u64 size;
223 unsigned int flags;
224
225 addrp = of_get_pci_address(dev, bar, &size, &flags);
226 if (addrp == NULL)
227 return -EINVAL;
228 return __of_address_to_resource(dev, addrp, size, flags, NULL, r);
229}
230EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
231
232int of_pci_range_parser_init(struct of_pci_range_parser *parser,
233 struct device_node *node)
234{
235 const int na = 3, ns = 2;
236 int rlen;
237
238 parser->node = node;
239 parser->pna = of_n_addr_cells(node);
240 parser->np = parser->pna + na + ns;
241
242 parser->range = of_get_property(node, "ranges", &rlen);
243 if (parser->range == NULL)
244 return -ENOENT;
245
246 parser->end = parser->range + rlen / sizeof(__be32);
247
248 return 0;
249}
250EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
251
252struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
253 struct of_pci_range *range)
254{
255 const int na = 3, ns = 2;
256
257 if (!range)
258 return NULL;
259
260 if (!parser->range || parser->range + parser->np > parser->end)
261 return NULL;
262
263 range->pci_space = parser->range[0];
264 range->flags = of_bus_pci_get_flags(parser->range);
265 range->pci_addr = of_read_number(parser->range + 1, ns);
266 range->cpu_addr = of_translate_address(parser->node,
267 parser->range + na);
268 range->size = of_read_number(parser->range + parser->pna + na, ns);
269
270 parser->range += parser->np;
271
272 /* Now consume following elements while they are contiguous */
273 while (parser->range + parser->np <= parser->end) {
274 u32 flags, pci_space;
275 u64 pci_addr, cpu_addr, size;
276
277 pci_space = be32_to_cpup(parser->range);
278 flags = of_bus_pci_get_flags(parser->range);
279 pci_addr = of_read_number(parser->range + 1, ns);
280 cpu_addr = of_translate_address(parser->node,
281 parser->range + na);
282 size = of_read_number(parser->range + parser->pna + na, ns);
283
284 if (flags != range->flags)
285 break;
286 if (pci_addr != range->pci_addr + range->size ||
287 cpu_addr != range->cpu_addr + range->size)
288 break;
289
290 range->size += size;
291 parser->range += parser->np;
292 }
293
294 return range;
295}
296EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
297
298/*
299 * of_pci_range_to_resource - Create a resource from an of_pci_range
300 * @range: the PCI range that describes the resource
301 * @np: device node where the range belongs to
302 * @res: pointer to a valid resource that will be updated to
303 * reflect the values contained in the range.
304 *
305 * Returns EINVAL if the range cannot be converted to resource.
306 *
307 * Note that if the range is an IO range, the resource will be converted
308 * using pci_address_to_pio() which can fail if it is called too early or
309 * if the range cannot be matched to any host bridge IO space (our case here).
310 * To guard against that we try to register the IO range first.
311 * If that fails we know that pci_address_to_pio() will do too.
312 */
313int of_pci_range_to_resource(struct of_pci_range *range,
314 struct device_node *np, struct resource *res)
315{
316 int err;
317 res->flags = range->flags;
318 res->parent = res->child = res->sibling = NULL;
319 res->name = np->full_name;
320
321 if (res->flags & IORESOURCE_IO) {
322 unsigned long port;
323 err = pci_register_io_range(range->cpu_addr, range->size);
324 if (err)
325 goto invalid_range;
326 port = pci_address_to_pio(range->cpu_addr);
327 if (port == (unsigned long)-1) {
328 err = -EINVAL;
329 goto invalid_range;
330 }
331 res->start = port;
332 } else {
333 if ((sizeof(resource_size_t) < 8) &&
334 upper_32_bits(range->cpu_addr)) {
335 err = -EINVAL;
336 goto invalid_range;
337 }
338
339 res->start = range->cpu_addr;
340 }
341 res->end = res->start + range->size - 1;
342 return 0;
343
344invalid_range:
345 res->start = (resource_size_t)OF_BAD_ADDR;
346 res->end = (resource_size_t)OF_BAD_ADDR;
347 return err;
348}
349#endif /* CONFIG_PCI */
350
351/*
352 * ISA bus specific translator
353 */
354
355static int of_bus_isa_match(struct device_node *np)
356{
357 return !strcmp(np->name, "isa");
358}
359
360static void of_bus_isa_count_cells(struct device_node *child,
361 int *addrc, int *sizec)
362{
363 if (addrc)
364 *addrc = 2;
365 if (sizec)
366 *sizec = 1;
367}
368
369static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
370 int pna)
371{
372 u64 cp, s, da;
373
374 /* Check address type match */
375 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
376 return OF_BAD_ADDR;
377
378 /* Read address values, skipping high cell */
379 cp = of_read_number(range + 1, na - 1);
380 s = of_read_number(range + na + pna, ns);
381 da = of_read_number(addr + 1, na - 1);
382
383 pr_debug("OF: ISA map, cp=%llx, s=%llx, da=%llx\n",
384 (unsigned long long)cp, (unsigned long long)s,
385 (unsigned long long)da);
386
387 if (da < cp || da >= (cp + s))
388 return OF_BAD_ADDR;
389 return da - cp;
390}
391
392static int of_bus_isa_translate(__be32 *addr, u64 offset, int na)
393{
394 return of_bus_default_translate(addr + 1, offset, na - 1);
395}
396
397static unsigned int of_bus_isa_get_flags(const __be32 *addr)
398{
399 unsigned int flags = 0;
400 u32 w = be32_to_cpup(addr);
401
402 if (w & 1)
403 flags |= IORESOURCE_IO;
404 else
405 flags |= IORESOURCE_MEM;
406 return flags;
407}
408
409/*
410 * Array of bus specific translators
411 */
412
413static struct of_bus of_busses[] = {
414#ifdef CONFIG_OF_ADDRESS_PCI
415 /* PCI */
416 {
417 .name = "pci",
418 .addresses = "assigned-addresses",
419 .match = of_bus_pci_match,
420 .count_cells = of_bus_pci_count_cells,
421 .map = of_bus_pci_map,
422 .translate = of_bus_pci_translate,
423 .get_flags = of_bus_pci_get_flags,
424 },
425#endif /* CONFIG_OF_ADDRESS_PCI */
426 /* ISA */
427 {
428 .name = "isa",
429 .addresses = "reg",
430 .match = of_bus_isa_match,
431 .count_cells = of_bus_isa_count_cells,
432 .map = of_bus_isa_map,
433 .translate = of_bus_isa_translate,
434 .get_flags = of_bus_isa_get_flags,
435 },
436 /* Default */
437 {
438 .name = "default",
439 .addresses = "reg",
440 .match = NULL,
441 .count_cells = of_bus_default_count_cells,
442 .map = of_bus_default_map,
443 .translate = of_bus_default_translate,
444 .get_flags = of_bus_default_get_flags,
445 },
446};
447
448static struct of_bus *of_match_bus(struct device_node *np)
449{
450 int i;
451
452 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
453 if (!of_busses[i].match || of_busses[i].match(np))
454 return &of_busses[i];
455 BUG();
456 return NULL;
457}
458
459static int of_empty_ranges_quirk(struct device_node *np)
460{
461 if (IS_ENABLED(CONFIG_PPC)) {
462 /* To save cycles, we cache the result for global "Mac" setting */
463 static int quirk_state = -1;
464
465 /* PA-SEMI sdc DT bug */
466 if (of_device_is_compatible(np, "1682m-sdc"))
467 return true;
468
469 /* Make quirk cached */
470 if (quirk_state < 0)
471 quirk_state =
472 of_machine_is_compatible("Power Macintosh") ||
473 of_machine_is_compatible("MacRISC");
474 return quirk_state;
475 }
476 return false;
477}
478
479static int of_translate_one(struct device_node *parent, struct of_bus *bus,
480 struct of_bus *pbus, __be32 *addr,
481 int na, int ns, int pna, const char *rprop)
482{
483 const __be32 *ranges;
484 unsigned int rlen;
485 int rone;
486 u64 offset = OF_BAD_ADDR;
487
488 /*
489 * Normally, an absence of a "ranges" property means we are
490 * crossing a non-translatable boundary, and thus the addresses
491 * below the current cannot be converted to CPU physical ones.
492 * Unfortunately, while this is very clear in the spec, it's not
493 * what Apple understood, and they do have things like /uni-n or
494 * /ht nodes with no "ranges" property and a lot of perfectly
495 * useable mapped devices below them. Thus we treat the absence of
496 * "ranges" as equivalent to an empty "ranges" property which means
497 * a 1:1 translation at that level. It's up to the caller not to try
498 * to translate addresses that aren't supposed to be translated in
499 * the first place. --BenH.
500 *
501 * As far as we know, this damage only exists on Apple machines, so
502 * This code is only enabled on powerpc. --gcl
503 */
504 ranges = of_get_property(parent, rprop, &rlen);
505 if (ranges == NULL && !of_empty_ranges_quirk(parent)) {
506 pr_debug("OF: no ranges; cannot translate\n");
507 return 1;
508 }
509 if (ranges == NULL || rlen == 0) {
510 offset = of_read_number(addr, na);
511 memset(addr, 0, pna * 4);
512 pr_debug("OF: empty ranges; 1:1 translation\n");
513 goto finish;
514 }
515
516 pr_debug("OF: walking ranges...\n");
517
518 /* Now walk through the ranges */
519 rlen /= 4;
520 rone = na + pna + ns;
521 for (; rlen >= rone; rlen -= rone, ranges += rone) {
522 offset = bus->map(addr, ranges, na, ns, pna);
523 if (offset != OF_BAD_ADDR)
524 break;
525 }
526 if (offset == OF_BAD_ADDR) {
527 pr_debug("OF: not found !\n");
528 return 1;
529 }
530 memcpy(addr, ranges + na, 4 * pna);
531
532 finish:
533 of_dump_addr("OF: parent translation for:", addr, pna);
534 pr_debug("OF: with offset: %llx\n", (unsigned long long)offset);
535
536 /* Translate it into parent bus space */
537 return pbus->translate(addr, offset, pna);
538}
539
540/*
541 * Translate an address from the device-tree into a CPU physical address,
542 * this walks up the tree and applies the various bus mappings on the
543 * way.
544 *
545 * Note: We consider that crossing any level with #size-cells == 0 to mean
546 * that translation is impossible (that is we are not dealing with a value
547 * that can be mapped to a cpu physical address). This is not really specified
548 * that way, but this is traditionally the way IBM at least do things
549 */
550static u64 __of_translate_address(struct device_node *dev,
551 const __be32 *in_addr, const char *rprop)
552{
553 struct device_node *parent = NULL;
554 struct of_bus *bus, *pbus;
555 __be32 addr[OF_MAX_ADDR_CELLS];
556 int na, ns, pna, pns;
557 u64 result = OF_BAD_ADDR;
558
559 pr_debug("OF: ** translation for device %s **\n", of_node_full_name(dev));
560
561 /* Increase refcount at current level */
562 of_node_get(dev);
563
564 /* Get parent & match bus type */
565 parent = of_get_parent(dev);
566 if (parent == NULL)
567 goto bail;
568 bus = of_match_bus(parent);
569
570 /* Count address cells & copy address locally */
571 bus->count_cells(dev, &na, &ns);
572 if (!OF_CHECK_COUNTS(na, ns)) {
573 pr_debug("OF: Bad cell count for %s\n", of_node_full_name(dev));
574 goto bail;
575 }
576 memcpy(addr, in_addr, na * 4);
577
578 pr_debug("OF: bus is %s (na=%d, ns=%d) on %s\n",
579 bus->name, na, ns, of_node_full_name(parent));
580 of_dump_addr("OF: translating address:", addr, na);
581
582 /* Translate */
583 for (;;) {
584 /* Switch to parent bus */
585 of_node_put(dev);
586 dev = parent;
587 parent = of_get_parent(dev);
588
589 /* If root, we have finished */
590 if (parent == NULL) {
591 pr_debug("OF: reached root node\n");
592 result = of_read_number(addr, na);
593 break;
594 }
595
596 /* Get new parent bus and counts */
597 pbus = of_match_bus(parent);
598 pbus->count_cells(dev, &pna, &pns);
599 if (!OF_CHECK_COUNTS(pna, pns)) {
600 pr_err("prom_parse: Bad cell count for %s\n",
601 of_node_full_name(dev));
602 break;
603 }
604
605 pr_debug("OF: parent bus is %s (na=%d, ns=%d) on %s\n",
606 pbus->name, pna, pns, of_node_full_name(parent));
607
608 /* Apply bus translation */
609 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
610 break;
611
612 /* Complete the move up one level */
613 na = pna;
614 ns = pns;
615 bus = pbus;
616
617 of_dump_addr("OF: one level translation:", addr, na);
618 }
619 bail:
620 of_node_put(parent);
621 of_node_put(dev);
622
623 return result;
624}
625
626u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
627{
628 return __of_translate_address(dev, in_addr, "ranges");
629}
630EXPORT_SYMBOL(of_translate_address);
631
632u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
633{
634 return __of_translate_address(dev, in_addr, "dma-ranges");
635}
636EXPORT_SYMBOL(of_translate_dma_address);
637
638const __be32 *of_get_address(struct device_node *dev, int index, u64 *size,
639 unsigned int *flags)
640{
641 const __be32 *prop;
642 unsigned int psize;
643 struct device_node *parent;
644 struct of_bus *bus;
645 int onesize, i, na, ns;
646
647 /* Get parent & match bus type */
648 parent = of_get_parent(dev);
649 if (parent == NULL)
650 return NULL;
651 bus = of_match_bus(parent);
652 bus->count_cells(dev, &na, &ns);
653 of_node_put(parent);
654 if (!OF_CHECK_ADDR_COUNT(na))
655 return NULL;
656
657 /* Get "reg" or "assigned-addresses" property */
658 prop = of_get_property(dev, bus->addresses, &psize);
659 if (prop == NULL)
660 return NULL;
661 psize /= 4;
662
663 onesize = na + ns;
664 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++)
665 if (i == index) {
666 if (size)
667 *size = of_read_number(prop + na, ns);
668 if (flags)
669 *flags = bus->get_flags(prop);
670 return prop;
671 }
672 return NULL;
673}
674EXPORT_SYMBOL(of_get_address);
675
676#ifdef PCI_IOBASE
677struct io_range {
678 struct list_head list;
679 phys_addr_t start;
680 resource_size_t size;
681};
682
683static LIST_HEAD(io_range_list);
684static DEFINE_SPINLOCK(io_range_lock);
685#endif
686
687/*
688 * Record the PCI IO range (expressed as CPU physical address + size).
689 * Return a negative value if an error has occured, zero otherwise
690 */
691int __weak pci_register_io_range(phys_addr_t addr, resource_size_t size)
692{
693 int err = 0;
694
695#ifdef PCI_IOBASE
696 struct io_range *range;
697 resource_size_t allocated_size = 0;
698
699 /* check if the range hasn't been previously recorded */
700 spin_lock(&io_range_lock);
701 list_for_each_entry(range, &io_range_list, list) {
702 if (addr >= range->start && addr + size <= range->start + size) {
703 /* range already registered, bail out */
704 goto end_register;
705 }
706 allocated_size += range->size;
707 }
708
709 /* range not registed yet, check for available space */
710 if (allocated_size + size - 1 > IO_SPACE_LIMIT) {
711 /* if it's too big check if 64K space can be reserved */
712 if (allocated_size + SZ_64K - 1 > IO_SPACE_LIMIT) {
713 err = -E2BIG;
714 goto end_register;
715 }
716
717 size = SZ_64K;
718 pr_warn("Requested IO range too big, new size set to 64K\n");
719 }
720
721 /* add the range to the list */
722 range = kzalloc(sizeof(*range), GFP_ATOMIC);
723 if (!range) {
724 err = -ENOMEM;
725 goto end_register;
726 }
727
728 range->start = addr;
729 range->size = size;
730
731 list_add_tail(&range->list, &io_range_list);
732
733end_register:
734 spin_unlock(&io_range_lock);
735#endif
736
737 return err;
738}
739
740phys_addr_t pci_pio_to_address(unsigned long pio)
741{
742 phys_addr_t address = (phys_addr_t)OF_BAD_ADDR;
743
744#ifdef PCI_IOBASE
745 struct io_range *range;
746 resource_size_t allocated_size = 0;
747
748 if (pio > IO_SPACE_LIMIT)
749 return address;
750
751 spin_lock(&io_range_lock);
752 list_for_each_entry(range, &io_range_list, list) {
753 if (pio >= allocated_size && pio < allocated_size + range->size) {
754 address = range->start + pio - allocated_size;
755 break;
756 }
757 allocated_size += range->size;
758 }
759 spin_unlock(&io_range_lock);
760#endif
761
762 return address;
763}
764
765unsigned long __weak pci_address_to_pio(phys_addr_t address)
766{
767#ifdef PCI_IOBASE
768 struct io_range *res;
769 resource_size_t offset = 0;
770 unsigned long addr = -1;
771
772 spin_lock(&io_range_lock);
773 list_for_each_entry(res, &io_range_list, list) {
774 if (address >= res->start && address < res->start + res->size) {
775 addr = address - res->start + offset;
776 break;
777 }
778 offset += res->size;
779 }
780 spin_unlock(&io_range_lock);
781
782 return addr;
783#else
784 if (address > IO_SPACE_LIMIT)
785 return (unsigned long)-1;
786
787 return (unsigned long) address;
788#endif
789}
790
791static int __of_address_to_resource(struct device_node *dev,
792 const __be32 *addrp, u64 size, unsigned int flags,
793 const char *name, struct resource *r)
794{
795 u64 taddr;
796
797 if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
798 return -EINVAL;
799 taddr = of_translate_address(dev, addrp);
800 if (taddr == OF_BAD_ADDR)
801 return -EINVAL;
802 memset(r, 0, sizeof(struct resource));
803 if (flags & IORESOURCE_IO) {
804 unsigned long port;
805 port = pci_address_to_pio(taddr);
806 if (port == (unsigned long)-1)
807 return -EINVAL;
808 r->start = port;
809 r->end = port + size - 1;
810 } else {
811 r->start = taddr;
812 r->end = taddr + size - 1;
813 }
814 r->flags = flags;
815 r->name = name ? name : dev->full_name;
816
817 return 0;
818}
819
820/**
821 * of_address_to_resource - Translate device tree address and return as resource
822 *
823 * Note that if your address is a PIO address, the conversion will fail if
824 * the physical address can't be internally converted to an IO token with
825 * pci_address_to_pio(), that is because it's either called to early or it
826 * can't be matched to any host bridge IO space
827 */
828int of_address_to_resource(struct device_node *dev, int index,
829 struct resource *r)
830{
831 const __be32 *addrp;
832 u64 size;
833 unsigned int flags;
834 const char *name = NULL;
835
836 addrp = of_get_address(dev, index, &size, &flags);
837 if (addrp == NULL)
838 return -EINVAL;
839
840 /* Get optional "reg-names" property to add a name to a resource */
841 of_property_read_string_index(dev, "reg-names", index, &name);
842
843 return __of_address_to_resource(dev, addrp, size, flags, name, r);
844}
845EXPORT_SYMBOL_GPL(of_address_to_resource);
846
847struct device_node *of_find_matching_node_by_address(struct device_node *from,
848 const struct of_device_id *matches,
849 u64 base_address)
850{
851 struct device_node *dn = of_find_matching_node(from, matches);
852 struct resource res;
853
854 while (dn) {
855 if (!of_address_to_resource(dn, 0, &res) &&
856 res.start == base_address)
857 return dn;
858
859 dn = of_find_matching_node(dn, matches);
860 }
861
862 return NULL;
863}
864
865
866/**
867 * of_iomap - Maps the memory mapped IO for a given device_node
868 * @device: the device whose io range will be mapped
869 * @index: index of the io range
870 *
871 * Returns a pointer to the mapped memory
872 */
873void __iomem *of_iomap(struct device_node *np, int index)
874{
875 struct resource res;
876
877 if (of_address_to_resource(np, index, &res))
878 return NULL;
879
880 return ioremap(res.start, resource_size(&res));
881}
882EXPORT_SYMBOL(of_iomap);
883
884/*
885 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
886 * for a given device_node
887 * @device: the device whose io range will be mapped
888 * @index: index of the io range
889 * @name: name of the resource
890 *
891 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
892 * error code on failure. Usage example:
893 *
894 * base = of_io_request_and_map(node, 0, "foo");
895 * if (IS_ERR(base))
896 * return PTR_ERR(base);
897 */
898void __iomem *of_io_request_and_map(struct device_node *np, int index,
899 const char *name)
900{
901 struct resource res;
902 void __iomem *mem;
903
904 if (of_address_to_resource(np, index, &res))
905 return IOMEM_ERR_PTR(-EINVAL);
906
907 if (!request_mem_region(res.start, resource_size(&res), name))
908 return IOMEM_ERR_PTR(-EBUSY);
909
910 mem = ioremap(res.start, resource_size(&res));
911 if (!mem) {
912 release_mem_region(res.start, resource_size(&res));
913 return IOMEM_ERR_PTR(-ENOMEM);
914 }
915
916 return mem;
917}
918EXPORT_SYMBOL(of_io_request_and_map);
919
920/**
921 * of_dma_get_range - Get DMA range info
922 * @np: device node to get DMA range info
923 * @dma_addr: pointer to store initial DMA address of DMA range
924 * @paddr: pointer to store initial CPU address of DMA range
925 * @size: pointer to store size of DMA range
926 *
927 * Look in bottom up direction for the first "dma-ranges" property
928 * and parse it.
929 * dma-ranges format:
930 * DMA addr (dma_addr) : naddr cells
931 * CPU addr (phys_addr_t) : pna cells
932 * size : nsize cells
933 *
934 * It returns -ENODEV if "dma-ranges" property was not found
935 * for this device in DT.
936 */
937int of_dma_get_range(struct device_node *np, u64 *dma_addr, u64 *paddr, u64 *size)
938{
939 struct device_node *node = of_node_get(np);
940 const __be32 *ranges = NULL;
941 int len, naddr, nsize, pna;
942 int ret = 0;
943 u64 dmaaddr;
944
945 if (!node)
946 return -EINVAL;
947
948 while (1) {
949 naddr = of_n_addr_cells(node);
950 nsize = of_n_size_cells(node);
951 node = of_get_next_parent(node);
952 if (!node)
953 break;
954
955 ranges = of_get_property(node, "dma-ranges", &len);
956
957 /* Ignore empty ranges, they imply no translation required */
958 if (ranges && len > 0)
959 break;
960
961 /*
962 * At least empty ranges has to be defined for parent node if
963 * DMA is supported
964 */
965 if (!ranges)
966 break;
967 }
968
969 if (!ranges) {
970 pr_debug("%s: no dma-ranges found for node(%s)\n",
971 __func__, np->full_name);
972 ret = -ENODEV;
973 goto out;
974 }
975
976 len /= sizeof(u32);
977
978 pna = of_n_addr_cells(node);
979
980 /* dma-ranges format:
981 * DMA addr : naddr cells
982 * CPU addr : pna cells
983 * size : nsize cells
984 */
985 dmaaddr = of_read_number(ranges, naddr);
986 *paddr = of_translate_dma_address(np, ranges);
987 if (*paddr == OF_BAD_ADDR) {
988 pr_err("%s: translation of DMA address(%pad) to CPU address failed node(%s)\n",
989 __func__, dma_addr, np->full_name);
990 ret = -EINVAL;
991 goto out;
992 }
993 *dma_addr = dmaaddr;
994
995 *size = of_read_number(ranges + naddr + pna, nsize);
996
997 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
998 *dma_addr, *paddr, *size);
999
1000out:
1001 of_node_put(node);
1002
1003 return ret;
1004}
1005EXPORT_SYMBOL_GPL(of_dma_get_range);
1006
1007/**
1008 * of_dma_is_coherent - Check if device is coherent
1009 * @np: device node
1010 *
1011 * It returns true if "dma-coherent" property was found
1012 * for this device in DT.
1013 */
1014bool of_dma_is_coherent(struct device_node *np)
1015{
1016 struct device_node *node = of_node_get(np);
1017
1018 while (node) {
1019 if (of_property_read_bool(node, "dma-coherent")) {
1020 of_node_put(node);
1021 return true;
1022 }
1023 node = of_get_next_parent(node);
1024 }
1025 of_node_put(node);
1026 return false;
1027}
1028EXPORT_SYMBOL_GPL(of_dma_is_coherent);
1// SPDX-License-Identifier: GPL-2.0
2#define pr_fmt(fmt) "OF: " fmt
3
4#include <linux/device.h>
5#include <linux/fwnode.h>
6#include <linux/io.h>
7#include <linux/ioport.h>
8#include <linux/logic_pio.h>
9#include <linux/module.h>
10#include <linux/of_address.h>
11#include <linux/pci.h>
12#include <linux/pci_regs.h>
13#include <linux/sizes.h>
14#include <linux/slab.h>
15#include <linux/string.h>
16#include <linux/dma-direct.h> /* for bus_dma_region */
17
18#include "of_private.h"
19
20/* Max address size we deal with */
21#define OF_MAX_ADDR_CELLS 4
22#define OF_CHECK_ADDR_COUNT(na) ((na) > 0 && (na) <= OF_MAX_ADDR_CELLS)
23#define OF_CHECK_COUNTS(na, ns) (OF_CHECK_ADDR_COUNT(na) && (ns) > 0)
24
25/* Debug utility */
26#ifdef DEBUG
27static void of_dump_addr(const char *s, const __be32 *addr, int na)
28{
29 pr_debug("%s", s);
30 while (na--)
31 pr_cont(" %08x", be32_to_cpu(*(addr++)));
32 pr_cont("\n");
33}
34#else
35static void of_dump_addr(const char *s, const __be32 *addr, int na) { }
36#endif
37
38/* Callbacks for bus specific translators */
39struct of_bus {
40 const char *name;
41 const char *addresses;
42 int (*match)(struct device_node *parent);
43 void (*count_cells)(struct device_node *child,
44 int *addrc, int *sizec);
45 u64 (*map)(__be32 *addr, const __be32 *range,
46 int na, int ns, int pna, int fna);
47 int (*translate)(__be32 *addr, u64 offset, int na);
48 int flag_cells;
49 unsigned int (*get_flags)(const __be32 *addr);
50};
51
52/*
53 * Default translator (generic bus)
54 */
55
56static void of_bus_default_count_cells(struct device_node *dev,
57 int *addrc, int *sizec)
58{
59 if (addrc)
60 *addrc = of_n_addr_cells(dev);
61 if (sizec)
62 *sizec = of_n_size_cells(dev);
63}
64
65static u64 of_bus_default_map(__be32 *addr, const __be32 *range,
66 int na, int ns, int pna, int fna)
67{
68 u64 cp, s, da;
69
70 cp = of_read_number(range + fna, na - fna);
71 s = of_read_number(range + na + pna, ns);
72 da = of_read_number(addr + fna, na - fna);
73
74 pr_debug("default map, cp=%llx, s=%llx, da=%llx\n", cp, s, da);
75
76 if (da < cp || da >= (cp + s))
77 return OF_BAD_ADDR;
78 return da - cp;
79}
80
81static int of_bus_default_translate(__be32 *addr, u64 offset, int na)
82{
83 u64 a = of_read_number(addr, na);
84 memset(addr, 0, na * 4);
85 a += offset;
86 if (na > 1)
87 addr[na - 2] = cpu_to_be32(a >> 32);
88 addr[na - 1] = cpu_to_be32(a & 0xffffffffu);
89
90 return 0;
91}
92
93static unsigned int of_bus_default_flags_get_flags(const __be32 *addr)
94{
95 return of_read_number(addr, 1);
96}
97
98static unsigned int of_bus_default_get_flags(const __be32 *addr)
99{
100 return IORESOURCE_MEM;
101}
102
103static u64 of_bus_default_flags_map(__be32 *addr, const __be32 *range, int na,
104 int ns, int pna, int fna)
105{
106 /* Check that flags match */
107 if (*addr != *range)
108 return OF_BAD_ADDR;
109
110 return of_bus_default_map(addr, range, na, ns, pna, fna);
111}
112
113static int of_bus_default_flags_translate(__be32 *addr, u64 offset, int na)
114{
115 /* Keep "flags" part (high cell) in translated address */
116 return of_bus_default_translate(addr + 1, offset, na - 1);
117}
118
119#ifdef CONFIG_PCI
120static unsigned int of_bus_pci_get_flags(const __be32 *addr)
121{
122 unsigned int flags = 0;
123 u32 w = be32_to_cpup(addr);
124
125 if (!IS_ENABLED(CONFIG_PCI))
126 return 0;
127
128 switch((w >> 24) & 0x03) {
129 case 0x01:
130 flags |= IORESOURCE_IO;
131 break;
132 case 0x02: /* 32 bits */
133 flags |= IORESOURCE_MEM;
134 break;
135
136 case 0x03: /* 64 bits */
137 flags |= IORESOURCE_MEM | IORESOURCE_MEM_64;
138 break;
139 }
140 if (w & 0x40000000)
141 flags |= IORESOURCE_PREFETCH;
142 return flags;
143}
144
145/*
146 * PCI bus specific translator
147 */
148
149static bool of_node_is_pcie(struct device_node *np)
150{
151 bool is_pcie = of_node_name_eq(np, "pcie");
152
153 if (is_pcie)
154 pr_warn_once("%pOF: Missing device_type\n", np);
155
156 return is_pcie;
157}
158
159static int of_bus_pci_match(struct device_node *np)
160{
161 /*
162 * "pciex" is PCI Express
163 * "vci" is for the /chaos bridge on 1st-gen PCI powermacs
164 * "ht" is hypertransport
165 *
166 * If none of the device_type match, and that the node name is
167 * "pcie", accept the device as PCI (with a warning).
168 */
169 return of_node_is_type(np, "pci") || of_node_is_type(np, "pciex") ||
170 of_node_is_type(np, "vci") || of_node_is_type(np, "ht") ||
171 of_node_is_pcie(np);
172}
173
174static void of_bus_pci_count_cells(struct device_node *np,
175 int *addrc, int *sizec)
176{
177 if (addrc)
178 *addrc = 3;
179 if (sizec)
180 *sizec = 2;
181}
182
183static u64 of_bus_pci_map(__be32 *addr, const __be32 *range, int na, int ns,
184 int pna, int fna)
185{
186 unsigned int af, rf;
187
188 af = of_bus_pci_get_flags(addr);
189 rf = of_bus_pci_get_flags(range);
190
191 /* Check address type match */
192 if ((af ^ rf) & (IORESOURCE_MEM | IORESOURCE_IO))
193 return OF_BAD_ADDR;
194
195 return of_bus_default_map(addr, range, na, ns, pna, fna);
196}
197
198#endif /* CONFIG_PCI */
199
200/*
201 * of_pci_range_to_resource - Create a resource from an of_pci_range
202 * @range: the PCI range that describes the resource
203 * @np: device node where the range belongs to
204 * @res: pointer to a valid resource that will be updated to
205 * reflect the values contained in the range.
206 *
207 * Returns -EINVAL if the range cannot be converted to resource.
208 *
209 * Note that if the range is an IO range, the resource will be converted
210 * using pci_address_to_pio() which can fail if it is called too early or
211 * if the range cannot be matched to any host bridge IO space (our case here).
212 * To guard against that we try to register the IO range first.
213 * If that fails we know that pci_address_to_pio() will do too.
214 */
215int of_pci_range_to_resource(struct of_pci_range *range,
216 struct device_node *np, struct resource *res)
217{
218 int err;
219 res->flags = range->flags;
220 res->parent = res->child = res->sibling = NULL;
221 res->name = np->full_name;
222
223 if (res->flags & IORESOURCE_IO) {
224 unsigned long port;
225 err = pci_register_io_range(&np->fwnode, range->cpu_addr,
226 range->size);
227 if (err)
228 goto invalid_range;
229 port = pci_address_to_pio(range->cpu_addr);
230 if (port == (unsigned long)-1) {
231 err = -EINVAL;
232 goto invalid_range;
233 }
234 res->start = port;
235 } else {
236 if ((sizeof(resource_size_t) < 8) &&
237 upper_32_bits(range->cpu_addr)) {
238 err = -EINVAL;
239 goto invalid_range;
240 }
241
242 res->start = range->cpu_addr;
243 }
244 res->end = res->start + range->size - 1;
245 return 0;
246
247invalid_range:
248 res->start = (resource_size_t)OF_BAD_ADDR;
249 res->end = (resource_size_t)OF_BAD_ADDR;
250 return err;
251}
252EXPORT_SYMBOL(of_pci_range_to_resource);
253
254/*
255 * of_range_to_resource - Create a resource from a ranges entry
256 * @np: device node where the range belongs to
257 * @index: the 'ranges' index to convert to a resource
258 * @res: pointer to a valid resource that will be updated to
259 * reflect the values contained in the range.
260 *
261 * Returns ENOENT if the entry is not found or EINVAL if the range cannot be
262 * converted to resource.
263 */
264int of_range_to_resource(struct device_node *np, int index, struct resource *res)
265{
266 int ret, i = 0;
267 struct of_range_parser parser;
268 struct of_range range;
269
270 ret = of_range_parser_init(&parser, np);
271 if (ret)
272 return ret;
273
274 for_each_of_range(&parser, &range)
275 if (i++ == index)
276 return of_pci_range_to_resource(&range, np, res);
277
278 return -ENOENT;
279}
280EXPORT_SYMBOL(of_range_to_resource);
281
282/*
283 * ISA bus specific translator
284 */
285
286static int of_bus_isa_match(struct device_node *np)
287{
288 return of_node_name_eq(np, "isa");
289}
290
291static void of_bus_isa_count_cells(struct device_node *child,
292 int *addrc, int *sizec)
293{
294 if (addrc)
295 *addrc = 2;
296 if (sizec)
297 *sizec = 1;
298}
299
300static u64 of_bus_isa_map(__be32 *addr, const __be32 *range, int na, int ns,
301 int pna, int fna)
302{
303 /* Check address type match */
304 if ((addr[0] ^ range[0]) & cpu_to_be32(1))
305 return OF_BAD_ADDR;
306
307 return of_bus_default_map(addr, range, na, ns, pna, fna);
308}
309
310static unsigned int of_bus_isa_get_flags(const __be32 *addr)
311{
312 unsigned int flags = 0;
313 u32 w = be32_to_cpup(addr);
314
315 if (w & 1)
316 flags |= IORESOURCE_IO;
317 else
318 flags |= IORESOURCE_MEM;
319 return flags;
320}
321
322static int of_bus_default_flags_match(struct device_node *np)
323{
324 return of_bus_n_addr_cells(np) == 3;
325}
326
327/*
328 * Array of bus specific translators
329 */
330
331static struct of_bus of_busses[] = {
332#ifdef CONFIG_PCI
333 /* PCI */
334 {
335 .name = "pci",
336 .addresses = "assigned-addresses",
337 .match = of_bus_pci_match,
338 .count_cells = of_bus_pci_count_cells,
339 .map = of_bus_pci_map,
340 .translate = of_bus_default_flags_translate,
341 .flag_cells = 1,
342 .get_flags = of_bus_pci_get_flags,
343 },
344#endif /* CONFIG_PCI */
345 /* ISA */
346 {
347 .name = "isa",
348 .addresses = "reg",
349 .match = of_bus_isa_match,
350 .count_cells = of_bus_isa_count_cells,
351 .map = of_bus_isa_map,
352 .translate = of_bus_default_flags_translate,
353 .flag_cells = 1,
354 .get_flags = of_bus_isa_get_flags,
355 },
356 /* Default with flags cell */
357 {
358 .name = "default-flags",
359 .addresses = "reg",
360 .match = of_bus_default_flags_match,
361 .count_cells = of_bus_default_count_cells,
362 .map = of_bus_default_flags_map,
363 .translate = of_bus_default_flags_translate,
364 .flag_cells = 1,
365 .get_flags = of_bus_default_flags_get_flags,
366 },
367 /* Default */
368 {
369 .name = "default",
370 .addresses = "reg",
371 .match = NULL,
372 .count_cells = of_bus_default_count_cells,
373 .map = of_bus_default_map,
374 .translate = of_bus_default_translate,
375 .get_flags = of_bus_default_get_flags,
376 },
377};
378
379static struct of_bus *of_match_bus(struct device_node *np)
380{
381 int i;
382
383 for (i = 0; i < ARRAY_SIZE(of_busses); i++)
384 if (!of_busses[i].match || of_busses[i].match(np))
385 return &of_busses[i];
386 BUG();
387 return NULL;
388}
389
390static int of_empty_ranges_quirk(struct device_node *np)
391{
392 if (IS_ENABLED(CONFIG_PPC)) {
393 /* To save cycles, we cache the result for global "Mac" setting */
394 static int quirk_state = -1;
395
396 /* PA-SEMI sdc DT bug */
397 if (of_device_is_compatible(np, "1682m-sdc"))
398 return true;
399
400 /* Make quirk cached */
401 if (quirk_state < 0)
402 quirk_state =
403 of_machine_is_compatible("Power Macintosh") ||
404 of_machine_is_compatible("MacRISC");
405 return quirk_state;
406 }
407 return false;
408}
409
410static int of_translate_one(struct device_node *parent, struct of_bus *bus,
411 struct of_bus *pbus, __be32 *addr,
412 int na, int ns, int pna, const char *rprop)
413{
414 const __be32 *ranges;
415 unsigned int rlen;
416 int rone;
417 u64 offset = OF_BAD_ADDR;
418
419 /*
420 * Normally, an absence of a "ranges" property means we are
421 * crossing a non-translatable boundary, and thus the addresses
422 * below the current cannot be converted to CPU physical ones.
423 * Unfortunately, while this is very clear in the spec, it's not
424 * what Apple understood, and they do have things like /uni-n or
425 * /ht nodes with no "ranges" property and a lot of perfectly
426 * useable mapped devices below them. Thus we treat the absence of
427 * "ranges" as equivalent to an empty "ranges" property which means
428 * a 1:1 translation at that level. It's up to the caller not to try
429 * to translate addresses that aren't supposed to be translated in
430 * the first place. --BenH.
431 *
432 * As far as we know, this damage only exists on Apple machines, so
433 * This code is only enabled on powerpc. --gcl
434 *
435 * This quirk also applies for 'dma-ranges' which frequently exist in
436 * child nodes without 'dma-ranges' in the parent nodes. --RobH
437 */
438 ranges = of_get_property(parent, rprop, &rlen);
439 if (ranges == NULL && !of_empty_ranges_quirk(parent) &&
440 strcmp(rprop, "dma-ranges")) {
441 pr_debug("no ranges; cannot translate\n");
442 return 1;
443 }
444 if (ranges == NULL || rlen == 0) {
445 offset = of_read_number(addr, na);
446 memset(addr, 0, pna * 4);
447 pr_debug("empty ranges; 1:1 translation\n");
448 goto finish;
449 }
450
451 pr_debug("walking ranges...\n");
452
453 /* Now walk through the ranges */
454 rlen /= 4;
455 rone = na + pna + ns;
456 for (; rlen >= rone; rlen -= rone, ranges += rone) {
457 offset = bus->map(addr, ranges, na, ns, pna, bus->flag_cells);
458 if (offset != OF_BAD_ADDR)
459 break;
460 }
461 if (offset == OF_BAD_ADDR) {
462 pr_debug("not found !\n");
463 return 1;
464 }
465 memcpy(addr, ranges + na, 4 * pna);
466
467 finish:
468 of_dump_addr("parent translation for:", addr, pna);
469 pr_debug("with offset: %llx\n", offset);
470
471 /* Translate it into parent bus space */
472 return pbus->translate(addr, offset, pna);
473}
474
475/*
476 * Translate an address from the device-tree into a CPU physical address,
477 * this walks up the tree and applies the various bus mappings on the
478 * way.
479 *
480 * Note: We consider that crossing any level with #size-cells == 0 to mean
481 * that translation is impossible (that is we are not dealing with a value
482 * that can be mapped to a cpu physical address). This is not really specified
483 * that way, but this is traditionally the way IBM at least do things
484 *
485 * Whenever the translation fails, the *host pointer will be set to the
486 * device that had registered logical PIO mapping, and the return code is
487 * relative to that node.
488 */
489static u64 __of_translate_address(struct device_node *dev,
490 struct device_node *(*get_parent)(const struct device_node *),
491 const __be32 *in_addr, const char *rprop,
492 struct device_node **host)
493{
494 struct device_node *parent = NULL;
495 struct of_bus *bus, *pbus;
496 __be32 addr[OF_MAX_ADDR_CELLS];
497 int na, ns, pna, pns;
498 u64 result = OF_BAD_ADDR;
499
500 pr_debug("** translation for device %pOF **\n", dev);
501
502 /* Increase refcount at current level */
503 of_node_get(dev);
504
505 *host = NULL;
506 /* Get parent & match bus type */
507 parent = get_parent(dev);
508 if (parent == NULL)
509 goto bail;
510 bus = of_match_bus(parent);
511
512 /* Count address cells & copy address locally */
513 bus->count_cells(dev, &na, &ns);
514 if (!OF_CHECK_COUNTS(na, ns)) {
515 pr_debug("Bad cell count for %pOF\n", dev);
516 goto bail;
517 }
518 memcpy(addr, in_addr, na * 4);
519
520 pr_debug("bus is %s (na=%d, ns=%d) on %pOF\n",
521 bus->name, na, ns, parent);
522 of_dump_addr("translating address:", addr, na);
523
524 /* Translate */
525 for (;;) {
526 struct logic_pio_hwaddr *iorange;
527
528 /* Switch to parent bus */
529 of_node_put(dev);
530 dev = parent;
531 parent = get_parent(dev);
532
533 /* If root, we have finished */
534 if (parent == NULL) {
535 pr_debug("reached root node\n");
536 result = of_read_number(addr, na);
537 break;
538 }
539
540 /*
541 * For indirectIO device which has no ranges property, get
542 * the address from reg directly.
543 */
544 iorange = find_io_range_by_fwnode(&dev->fwnode);
545 if (iorange && (iorange->flags != LOGIC_PIO_CPU_MMIO)) {
546 result = of_read_number(addr + 1, na - 1);
547 pr_debug("indirectIO matched(%pOF) 0x%llx\n",
548 dev, result);
549 *host = of_node_get(dev);
550 break;
551 }
552
553 /* Get new parent bus and counts */
554 pbus = of_match_bus(parent);
555 pbus->count_cells(dev, &pna, &pns);
556 if (!OF_CHECK_COUNTS(pna, pns)) {
557 pr_err("Bad cell count for %pOF\n", dev);
558 break;
559 }
560
561 pr_debug("parent bus is %s (na=%d, ns=%d) on %pOF\n",
562 pbus->name, pna, pns, parent);
563
564 /* Apply bus translation */
565 if (of_translate_one(dev, bus, pbus, addr, na, ns, pna, rprop))
566 break;
567
568 /* Complete the move up one level */
569 na = pna;
570 ns = pns;
571 bus = pbus;
572
573 of_dump_addr("one level translation:", addr, na);
574 }
575 bail:
576 of_node_put(parent);
577 of_node_put(dev);
578
579 return result;
580}
581
582u64 of_translate_address(struct device_node *dev, const __be32 *in_addr)
583{
584 struct device_node *host;
585 u64 ret;
586
587 ret = __of_translate_address(dev, of_get_parent,
588 in_addr, "ranges", &host);
589 if (host) {
590 of_node_put(host);
591 return OF_BAD_ADDR;
592 }
593
594 return ret;
595}
596EXPORT_SYMBOL(of_translate_address);
597
598#ifdef CONFIG_HAS_DMA
599struct device_node *__of_get_dma_parent(const struct device_node *np)
600{
601 struct of_phandle_args args;
602 int ret, index;
603
604 index = of_property_match_string(np, "interconnect-names", "dma-mem");
605 if (index < 0)
606 return of_get_parent(np);
607
608 ret = of_parse_phandle_with_args(np, "interconnects",
609 "#interconnect-cells",
610 index, &args);
611 if (ret < 0)
612 return of_get_parent(np);
613
614 return of_node_get(args.np);
615}
616#endif
617
618static struct device_node *of_get_next_dma_parent(struct device_node *np)
619{
620 struct device_node *parent;
621
622 parent = __of_get_dma_parent(np);
623 of_node_put(np);
624
625 return parent;
626}
627
628u64 of_translate_dma_address(struct device_node *dev, const __be32 *in_addr)
629{
630 struct device_node *host;
631 u64 ret;
632
633 ret = __of_translate_address(dev, __of_get_dma_parent,
634 in_addr, "dma-ranges", &host);
635
636 if (host) {
637 of_node_put(host);
638 return OF_BAD_ADDR;
639 }
640
641 return ret;
642}
643EXPORT_SYMBOL(of_translate_dma_address);
644
645/**
646 * of_translate_dma_region - Translate device tree address and size tuple
647 * @dev: device tree node for which to translate
648 * @prop: pointer into array of cells
649 * @start: return value for the start of the DMA range
650 * @length: return value for the length of the DMA range
651 *
652 * Returns a pointer to the cell immediately following the translated DMA region.
653 */
654const __be32 *of_translate_dma_region(struct device_node *dev, const __be32 *prop,
655 phys_addr_t *start, size_t *length)
656{
657 struct device_node *parent;
658 u64 address, size;
659 int na, ns;
660
661 parent = __of_get_dma_parent(dev);
662 if (!parent)
663 return NULL;
664
665 na = of_bus_n_addr_cells(parent);
666 ns = of_bus_n_size_cells(parent);
667
668 of_node_put(parent);
669
670 address = of_translate_dma_address(dev, prop);
671 if (address == OF_BAD_ADDR)
672 return NULL;
673
674 size = of_read_number(prop + na, ns);
675
676 if (start)
677 *start = address;
678
679 if (length)
680 *length = size;
681
682 return prop + na + ns;
683}
684EXPORT_SYMBOL(of_translate_dma_region);
685
686const __be32 *__of_get_address(struct device_node *dev, int index, int bar_no,
687 u64 *size, unsigned int *flags)
688{
689 const __be32 *prop;
690 unsigned int psize;
691 struct device_node *parent;
692 struct of_bus *bus;
693 int onesize, i, na, ns;
694
695 /* Get parent & match bus type */
696 parent = of_get_parent(dev);
697 if (parent == NULL)
698 return NULL;
699 bus = of_match_bus(parent);
700 if (strcmp(bus->name, "pci") && (bar_no >= 0)) {
701 of_node_put(parent);
702 return NULL;
703 }
704 bus->count_cells(dev, &na, &ns);
705 of_node_put(parent);
706 if (!OF_CHECK_ADDR_COUNT(na))
707 return NULL;
708
709 /* Get "reg" or "assigned-addresses" property */
710 prop = of_get_property(dev, bus->addresses, &psize);
711 if (prop == NULL)
712 return NULL;
713 psize /= 4;
714
715 onesize = na + ns;
716 for (i = 0; psize >= onesize; psize -= onesize, prop += onesize, i++) {
717 u32 val = be32_to_cpu(prop[0]);
718 /* PCI bus matches on BAR number instead of index */
719 if (((bar_no >= 0) && ((val & 0xff) == ((bar_no * 4) + PCI_BASE_ADDRESS_0))) ||
720 ((index >= 0) && (i == index))) {
721 if (size)
722 *size = of_read_number(prop + na, ns);
723 if (flags)
724 *flags = bus->get_flags(prop);
725 return prop;
726 }
727 }
728 return NULL;
729}
730EXPORT_SYMBOL(__of_get_address);
731
732/**
733 * of_property_read_reg - Retrieve the specified "reg" entry index without translating
734 * @np: device tree node for which to retrieve "reg" from
735 * @idx: "reg" entry index to read
736 * @addr: return value for the untranslated address
737 * @size: return value for the entry size
738 *
739 * Returns -EINVAL if "reg" is not found. Returns 0 on success with addr and
740 * size values filled in.
741 */
742int of_property_read_reg(struct device_node *np, int idx, u64 *addr, u64 *size)
743{
744 const __be32 *prop = of_get_address(np, idx, size, NULL);
745
746 if (!prop)
747 return -EINVAL;
748
749 *addr = of_read_number(prop, of_n_addr_cells(np));
750
751 return 0;
752}
753EXPORT_SYMBOL(of_property_read_reg);
754
755static int parser_init(struct of_pci_range_parser *parser,
756 struct device_node *node, const char *name)
757{
758 int rlen;
759
760 parser->node = node;
761 parser->pna = of_n_addr_cells(node);
762 parser->na = of_bus_n_addr_cells(node);
763 parser->ns = of_bus_n_size_cells(node);
764 parser->dma = !strcmp(name, "dma-ranges");
765 parser->bus = of_match_bus(node);
766
767 parser->range = of_get_property(node, name, &rlen);
768 if (parser->range == NULL)
769 return -ENOENT;
770
771 parser->end = parser->range + rlen / sizeof(__be32);
772
773 return 0;
774}
775
776int of_pci_range_parser_init(struct of_pci_range_parser *parser,
777 struct device_node *node)
778{
779 return parser_init(parser, node, "ranges");
780}
781EXPORT_SYMBOL_GPL(of_pci_range_parser_init);
782
783int of_pci_dma_range_parser_init(struct of_pci_range_parser *parser,
784 struct device_node *node)
785{
786 return parser_init(parser, node, "dma-ranges");
787}
788EXPORT_SYMBOL_GPL(of_pci_dma_range_parser_init);
789#define of_dma_range_parser_init of_pci_dma_range_parser_init
790
791struct of_pci_range *of_pci_range_parser_one(struct of_pci_range_parser *parser,
792 struct of_pci_range *range)
793{
794 int na = parser->na;
795 int ns = parser->ns;
796 int np = parser->pna + na + ns;
797 int busflag_na = parser->bus->flag_cells;
798
799 if (!range)
800 return NULL;
801
802 if (!parser->range || parser->range + np > parser->end)
803 return NULL;
804
805 range->flags = parser->bus->get_flags(parser->range);
806
807 range->bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
808
809 if (parser->dma)
810 range->cpu_addr = of_translate_dma_address(parser->node,
811 parser->range + na);
812 else
813 range->cpu_addr = of_translate_address(parser->node,
814 parser->range + na);
815 range->size = of_read_number(parser->range + parser->pna + na, ns);
816
817 parser->range += np;
818
819 /* Now consume following elements while they are contiguous */
820 while (parser->range + np <= parser->end) {
821 u32 flags = 0;
822 u64 bus_addr, cpu_addr, size;
823
824 flags = parser->bus->get_flags(parser->range);
825 bus_addr = of_read_number(parser->range + busflag_na, na - busflag_na);
826 if (parser->dma)
827 cpu_addr = of_translate_dma_address(parser->node,
828 parser->range + na);
829 else
830 cpu_addr = of_translate_address(parser->node,
831 parser->range + na);
832 size = of_read_number(parser->range + parser->pna + na, ns);
833
834 if (flags != range->flags)
835 break;
836 if (bus_addr != range->bus_addr + range->size ||
837 cpu_addr != range->cpu_addr + range->size)
838 break;
839
840 range->size += size;
841 parser->range += np;
842 }
843
844 return range;
845}
846EXPORT_SYMBOL_GPL(of_pci_range_parser_one);
847
848static u64 of_translate_ioport(struct device_node *dev, const __be32 *in_addr,
849 u64 size)
850{
851 u64 taddr;
852 unsigned long port;
853 struct device_node *host;
854
855 taddr = __of_translate_address(dev, of_get_parent,
856 in_addr, "ranges", &host);
857 if (host) {
858 /* host-specific port access */
859 port = logic_pio_trans_hwaddr(&host->fwnode, taddr, size);
860 of_node_put(host);
861 } else {
862 /* memory-mapped I/O range */
863 port = pci_address_to_pio(taddr);
864 }
865
866 if (port == (unsigned long)-1)
867 return OF_BAD_ADDR;
868
869 return port;
870}
871
872#ifdef CONFIG_HAS_DMA
873/**
874 * of_dma_get_range - Get DMA range info and put it into a map array
875 * @np: device node to get DMA range info
876 * @map: dma range structure to return
877 *
878 * Look in bottom up direction for the first "dma-ranges" property
879 * and parse it. Put the information into a DMA offset map array.
880 *
881 * dma-ranges format:
882 * DMA addr (dma_addr) : naddr cells
883 * CPU addr (phys_addr_t) : pna cells
884 * size : nsize cells
885 *
886 * It returns -ENODEV if "dma-ranges" property was not found for this
887 * device in the DT.
888 */
889int of_dma_get_range(struct device_node *np, const struct bus_dma_region **map)
890{
891 struct device_node *node = of_node_get(np);
892 const __be32 *ranges = NULL;
893 bool found_dma_ranges = false;
894 struct of_range_parser parser;
895 struct of_range range;
896 struct bus_dma_region *r;
897 int len, num_ranges = 0;
898 int ret = 0;
899
900 while (node) {
901 ranges = of_get_property(node, "dma-ranges", &len);
902
903 /* Ignore empty ranges, they imply no translation required */
904 if (ranges && len > 0)
905 break;
906
907 /* Once we find 'dma-ranges', then a missing one is an error */
908 if (found_dma_ranges && !ranges) {
909 ret = -ENODEV;
910 goto out;
911 }
912 found_dma_ranges = true;
913
914 node = of_get_next_dma_parent(node);
915 }
916
917 if (!node || !ranges) {
918 pr_debug("no dma-ranges found for node(%pOF)\n", np);
919 ret = -ENODEV;
920 goto out;
921 }
922
923 of_dma_range_parser_init(&parser, node);
924 for_each_of_range(&parser, &range) {
925 if (range.cpu_addr == OF_BAD_ADDR) {
926 pr_err("translation of DMA address(%llx) to CPU address failed node(%pOF)\n",
927 range.bus_addr, node);
928 continue;
929 }
930 num_ranges++;
931 }
932
933 if (!num_ranges) {
934 ret = -EINVAL;
935 goto out;
936 }
937
938 r = kcalloc(num_ranges + 1, sizeof(*r), GFP_KERNEL);
939 if (!r) {
940 ret = -ENOMEM;
941 goto out;
942 }
943
944 /*
945 * Record all info in the generic DMA ranges array for struct device,
946 * returning an error if we don't find any parsable ranges.
947 */
948 *map = r;
949 of_dma_range_parser_init(&parser, node);
950 for_each_of_range(&parser, &range) {
951 pr_debug("dma_addr(%llx) cpu_addr(%llx) size(%llx)\n",
952 range.bus_addr, range.cpu_addr, range.size);
953 if (range.cpu_addr == OF_BAD_ADDR)
954 continue;
955 r->cpu_start = range.cpu_addr;
956 r->dma_start = range.bus_addr;
957 r->size = range.size;
958 r++;
959 }
960out:
961 of_node_put(node);
962 return ret;
963}
964#endif /* CONFIG_HAS_DMA */
965
966/**
967 * of_dma_get_max_cpu_address - Gets highest CPU address suitable for DMA
968 * @np: The node to start searching from or NULL to start from the root
969 *
970 * Gets the highest CPU physical address that is addressable by all DMA masters
971 * in the sub-tree pointed by np, or the whole tree if NULL is passed. If no
972 * DMA constrained device is found, it returns PHYS_ADDR_MAX.
973 */
974phys_addr_t __init of_dma_get_max_cpu_address(struct device_node *np)
975{
976 phys_addr_t max_cpu_addr = PHYS_ADDR_MAX;
977 struct of_range_parser parser;
978 phys_addr_t subtree_max_addr;
979 struct device_node *child;
980 struct of_range range;
981 const __be32 *ranges;
982 u64 cpu_end = 0;
983 int len;
984
985 if (!np)
986 np = of_root;
987
988 ranges = of_get_property(np, "dma-ranges", &len);
989 if (ranges && len) {
990 of_dma_range_parser_init(&parser, np);
991 for_each_of_range(&parser, &range)
992 if (range.cpu_addr + range.size > cpu_end)
993 cpu_end = range.cpu_addr + range.size - 1;
994
995 if (max_cpu_addr > cpu_end)
996 max_cpu_addr = cpu_end;
997 }
998
999 for_each_available_child_of_node(np, child) {
1000 subtree_max_addr = of_dma_get_max_cpu_address(child);
1001 if (max_cpu_addr > subtree_max_addr)
1002 max_cpu_addr = subtree_max_addr;
1003 }
1004
1005 return max_cpu_addr;
1006}
1007
1008/**
1009 * of_dma_is_coherent - Check if device is coherent
1010 * @np: device node
1011 *
1012 * It returns true if "dma-coherent" property was found
1013 * for this device in the DT, or if DMA is coherent by
1014 * default for OF devices on the current platform and no
1015 * "dma-noncoherent" property was found for this device.
1016 */
1017bool of_dma_is_coherent(struct device_node *np)
1018{
1019 struct device_node *node;
1020 bool is_coherent = dma_default_coherent;
1021
1022 node = of_node_get(np);
1023
1024 while (node) {
1025 if (of_property_read_bool(node, "dma-coherent")) {
1026 is_coherent = true;
1027 break;
1028 }
1029 if (of_property_read_bool(node, "dma-noncoherent")) {
1030 is_coherent = false;
1031 break;
1032 }
1033 node = of_get_next_dma_parent(node);
1034 }
1035 of_node_put(node);
1036 return is_coherent;
1037}
1038EXPORT_SYMBOL_GPL(of_dma_is_coherent);
1039
1040/**
1041 * of_mmio_is_nonposted - Check if device uses non-posted MMIO
1042 * @np: device node
1043 *
1044 * Returns true if the "nonposted-mmio" property was found for
1045 * the device's bus.
1046 *
1047 * This is currently only enabled on builds that support Apple ARM devices, as
1048 * an optimization.
1049 */
1050static bool of_mmio_is_nonposted(struct device_node *np)
1051{
1052 struct device_node *parent;
1053 bool nonposted;
1054
1055 if (!IS_ENABLED(CONFIG_ARCH_APPLE))
1056 return false;
1057
1058 parent = of_get_parent(np);
1059 if (!parent)
1060 return false;
1061
1062 nonposted = of_property_read_bool(parent, "nonposted-mmio");
1063
1064 of_node_put(parent);
1065 return nonposted;
1066}
1067
1068static int __of_address_to_resource(struct device_node *dev, int index, int bar_no,
1069 struct resource *r)
1070{
1071 u64 taddr;
1072 const __be32 *addrp;
1073 u64 size;
1074 unsigned int flags;
1075 const char *name = NULL;
1076
1077 addrp = __of_get_address(dev, index, bar_no, &size, &flags);
1078 if (addrp == NULL)
1079 return -EINVAL;
1080
1081 /* Get optional "reg-names" property to add a name to a resource */
1082 if (index >= 0)
1083 of_property_read_string_index(dev, "reg-names", index, &name);
1084
1085 if (flags & IORESOURCE_MEM)
1086 taddr = of_translate_address(dev, addrp);
1087 else if (flags & IORESOURCE_IO)
1088 taddr = of_translate_ioport(dev, addrp, size);
1089 else
1090 return -EINVAL;
1091
1092 if (taddr == OF_BAD_ADDR)
1093 return -EINVAL;
1094 memset(r, 0, sizeof(struct resource));
1095
1096 if (of_mmio_is_nonposted(dev))
1097 flags |= IORESOURCE_MEM_NONPOSTED;
1098
1099 r->start = taddr;
1100 r->end = taddr + size - 1;
1101 r->flags = flags;
1102 r->name = name ? name : dev->full_name;
1103
1104 return 0;
1105}
1106
1107/**
1108 * of_address_to_resource - Translate device tree address and return as resource
1109 * @dev: Caller's Device Node
1110 * @index: Index into the array
1111 * @r: Pointer to resource array
1112 *
1113 * Returns -EINVAL if the range cannot be converted to resource.
1114 *
1115 * Note that if your address is a PIO address, the conversion will fail if
1116 * the physical address can't be internally converted to an IO token with
1117 * pci_address_to_pio(), that is because it's either called too early or it
1118 * can't be matched to any host bridge IO space
1119 */
1120int of_address_to_resource(struct device_node *dev, int index,
1121 struct resource *r)
1122{
1123 return __of_address_to_resource(dev, index, -1, r);
1124}
1125EXPORT_SYMBOL_GPL(of_address_to_resource);
1126
1127int of_pci_address_to_resource(struct device_node *dev, int bar,
1128 struct resource *r)
1129{
1130
1131 if (!IS_ENABLED(CONFIG_PCI))
1132 return -ENOSYS;
1133
1134 return __of_address_to_resource(dev, -1, bar, r);
1135}
1136EXPORT_SYMBOL_GPL(of_pci_address_to_resource);
1137
1138/**
1139 * of_iomap - Maps the memory mapped IO for a given device_node
1140 * @np: the device whose io range will be mapped
1141 * @index: index of the io range
1142 *
1143 * Returns a pointer to the mapped memory
1144 */
1145void __iomem *of_iomap(struct device_node *np, int index)
1146{
1147 struct resource res;
1148
1149 if (of_address_to_resource(np, index, &res))
1150 return NULL;
1151
1152 if (res.flags & IORESOURCE_MEM_NONPOSTED)
1153 return ioremap_np(res.start, resource_size(&res));
1154 else
1155 return ioremap(res.start, resource_size(&res));
1156}
1157EXPORT_SYMBOL(of_iomap);
1158
1159/*
1160 * of_io_request_and_map - Requests a resource and maps the memory mapped IO
1161 * for a given device_node
1162 * @device: the device whose io range will be mapped
1163 * @index: index of the io range
1164 * @name: name "override" for the memory region request or NULL
1165 *
1166 * Returns a pointer to the requested and mapped memory or an ERR_PTR() encoded
1167 * error code on failure. Usage example:
1168 *
1169 * base = of_io_request_and_map(node, 0, "foo");
1170 * if (IS_ERR(base))
1171 * return PTR_ERR(base);
1172 */
1173void __iomem *of_io_request_and_map(struct device_node *np, int index,
1174 const char *name)
1175{
1176 struct resource res;
1177 void __iomem *mem;
1178
1179 if (of_address_to_resource(np, index, &res))
1180 return IOMEM_ERR_PTR(-EINVAL);
1181
1182 if (!name)
1183 name = res.name;
1184 if (!request_mem_region(res.start, resource_size(&res), name))
1185 return IOMEM_ERR_PTR(-EBUSY);
1186
1187 if (res.flags & IORESOURCE_MEM_NONPOSTED)
1188 mem = ioremap_np(res.start, resource_size(&res));
1189 else
1190 mem = ioremap(res.start, resource_size(&res));
1191
1192 if (!mem) {
1193 release_mem_region(res.start, resource_size(&res));
1194 return IOMEM_ERR_PTR(-ENOMEM);
1195 }
1196
1197 return mem;
1198}
1199EXPORT_SYMBOL(of_io_request_and_map);