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1/*
2 * Based on arch/arm/kernel/process.c
3 *
4 * Original Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdarg.h>
22
23#include <linux/compat.h>
24#include <linux/efi.h>
25#include <linux/export.h>
26#include <linux/sched.h>
27#include <linux/kernel.h>
28#include <linux/mm.h>
29#include <linux/stddef.h>
30#include <linux/unistd.h>
31#include <linux/user.h>
32#include <linux/delay.h>
33#include <linux/reboot.h>
34#include <linux/interrupt.h>
35#include <linux/kallsyms.h>
36#include <linux/init.h>
37#include <linux/cpu.h>
38#include <linux/elfcore.h>
39#include <linux/pm.h>
40#include <linux/tick.h>
41#include <linux/utsname.h>
42#include <linux/uaccess.h>
43#include <linux/random.h>
44#include <linux/hw_breakpoint.h>
45#include <linux/personality.h>
46#include <linux/notifier.h>
47#include <trace/events/power.h>
48
49#include <asm/alternative.h>
50#include <asm/compat.h>
51#include <asm/cacheflush.h>
52#include <asm/fpsimd.h>
53#include <asm/mmu_context.h>
54#include <asm/processor.h>
55#include <asm/stacktrace.h>
56
57#ifdef CONFIG_CC_STACKPROTECTOR
58#include <linux/stackprotector.h>
59unsigned long __stack_chk_guard __read_mostly;
60EXPORT_SYMBOL(__stack_chk_guard);
61#endif
62
63/*
64 * Function pointers to optional machine specific functions
65 */
66void (*pm_power_off)(void);
67EXPORT_SYMBOL_GPL(pm_power_off);
68
69void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
70
71/*
72 * This is our default idle handler.
73 */
74void arch_cpu_idle(void)
75{
76 /*
77 * This should do all the clock switching and wait for interrupt
78 * tricks
79 */
80 trace_cpu_idle_rcuidle(1, smp_processor_id());
81 cpu_do_idle();
82 local_irq_enable();
83 trace_cpu_idle_rcuidle(PWR_EVENT_EXIT, smp_processor_id());
84}
85
86#ifdef CONFIG_HOTPLUG_CPU
87void arch_cpu_idle_dead(void)
88{
89 cpu_die();
90}
91#endif
92
93/*
94 * Called by kexec, immediately prior to machine_kexec().
95 *
96 * This must completely disable all secondary CPUs; simply causing those CPUs
97 * to execute e.g. a RAM-based pin loop is not sufficient. This allows the
98 * kexec'd kernel to use any and all RAM as it sees fit, without having to
99 * avoid any code or data used by any SW CPU pin loop. The CPU hotplug
100 * functionality embodied in disable_nonboot_cpus() to achieve this.
101 */
102void machine_shutdown(void)
103{
104 disable_nonboot_cpus();
105}
106
107/*
108 * Halting simply requires that the secondary CPUs stop performing any
109 * activity (executing tasks, handling interrupts). smp_send_stop()
110 * achieves this.
111 */
112void machine_halt(void)
113{
114 local_irq_disable();
115 smp_send_stop();
116 while (1);
117}
118
119/*
120 * Power-off simply requires that the secondary CPUs stop performing any
121 * activity (executing tasks, handling interrupts). smp_send_stop()
122 * achieves this. When the system power is turned off, it will take all CPUs
123 * with it.
124 */
125void machine_power_off(void)
126{
127 local_irq_disable();
128 smp_send_stop();
129 if (pm_power_off)
130 pm_power_off();
131}
132
133/*
134 * Restart requires that the secondary CPUs stop performing any activity
135 * while the primary CPU resets the system. Systems with multiple CPUs must
136 * provide a HW restart implementation, to ensure that all CPUs reset at once.
137 * This is required so that any code running after reset on the primary CPU
138 * doesn't have to co-ordinate with other CPUs to ensure they aren't still
139 * executing pre-reset code, and using RAM that the primary CPU's code wishes
140 * to use. Implementing such co-ordination would be essentially impossible.
141 */
142void machine_restart(char *cmd)
143{
144 /* Disable interrupts first */
145 local_irq_disable();
146 smp_send_stop();
147
148 /*
149 * UpdateCapsule() depends on the system being reset via
150 * ResetSystem().
151 */
152 if (efi_enabled(EFI_RUNTIME_SERVICES))
153 efi_reboot(reboot_mode, NULL);
154
155 /* Now call the architecture specific reboot code. */
156 if (arm_pm_restart)
157 arm_pm_restart(reboot_mode, cmd);
158 else
159 do_kernel_restart(cmd);
160
161 /*
162 * Whoops - the architecture was unable to reboot.
163 */
164 printk("Reboot failed -- System halted\n");
165 while (1);
166}
167
168void __show_regs(struct pt_regs *regs)
169{
170 int i, top_reg;
171 u64 lr, sp;
172
173 if (compat_user_mode(regs)) {
174 lr = regs->compat_lr;
175 sp = regs->compat_sp;
176 top_reg = 12;
177 } else {
178 lr = regs->regs[30];
179 sp = regs->sp;
180 top_reg = 29;
181 }
182
183 show_regs_print_info(KERN_DEFAULT);
184 print_symbol("PC is at %s\n", instruction_pointer(regs));
185 print_symbol("LR is at %s\n", lr);
186 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
187 regs->pc, lr, regs->pstate);
188 printk("sp : %016llx\n", sp);
189 for (i = top_reg; i >= 0; i--) {
190 printk("x%-2d: %016llx ", i, regs->regs[i]);
191 if (i % 2 == 0)
192 printk("\n");
193 }
194 printk("\n");
195}
196
197void show_regs(struct pt_regs * regs)
198{
199 printk("\n");
200 __show_regs(regs);
201}
202
203/*
204 * Free current thread data structures etc..
205 */
206void exit_thread(void)
207{
208}
209
210static void tls_thread_flush(void)
211{
212 asm ("msr tpidr_el0, xzr");
213
214 if (is_compat_task()) {
215 current->thread.tp_value = 0;
216
217 /*
218 * We need to ensure ordering between the shadow state and the
219 * hardware state, so that we don't corrupt the hardware state
220 * with a stale shadow state during context switch.
221 */
222 barrier();
223 asm ("msr tpidrro_el0, xzr");
224 }
225}
226
227void flush_thread(void)
228{
229 fpsimd_flush_thread();
230 tls_thread_flush();
231 flush_ptrace_hw_breakpoint(current);
232}
233
234void release_thread(struct task_struct *dead_task)
235{
236}
237
238int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
239{
240 if (current->mm)
241 fpsimd_preserve_current_state();
242 *dst = *src;
243 return 0;
244}
245
246asmlinkage void ret_from_fork(void) asm("ret_from_fork");
247
248int copy_thread(unsigned long clone_flags, unsigned long stack_start,
249 unsigned long stk_sz, struct task_struct *p)
250{
251 struct pt_regs *childregs = task_pt_regs(p);
252
253 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
254
255 if (likely(!(p->flags & PF_KTHREAD))) {
256 *childregs = *current_pt_regs();
257 childregs->regs[0] = 0;
258
259 /*
260 * Read the current TLS pointer from tpidr_el0 as it may be
261 * out-of-sync with the saved value.
262 */
263 asm("mrs %0, tpidr_el0" : "=r" (*task_user_tls(p)));
264
265 if (stack_start) {
266 if (is_compat_thread(task_thread_info(p)))
267 childregs->compat_sp = stack_start;
268 /* 16-byte aligned stack mandatory on AArch64 */
269 else if (stack_start & 15)
270 return -EINVAL;
271 else
272 childregs->sp = stack_start;
273 }
274
275 /*
276 * If a TLS pointer was passed to clone (4th argument), use it
277 * for the new thread.
278 */
279 if (clone_flags & CLONE_SETTLS)
280 p->thread.tp_value = childregs->regs[3];
281 } else {
282 memset(childregs, 0, sizeof(struct pt_regs));
283 childregs->pstate = PSR_MODE_EL1h;
284 if (IS_ENABLED(CONFIG_ARM64_UAO) &&
285 cpus_have_cap(ARM64_HAS_UAO))
286 childregs->pstate |= PSR_UAO_BIT;
287 p->thread.cpu_context.x19 = stack_start;
288 p->thread.cpu_context.x20 = stk_sz;
289 }
290 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
291 p->thread.cpu_context.sp = (unsigned long)childregs;
292
293 ptrace_hw_copy_thread(p);
294
295 return 0;
296}
297
298static void tls_thread_switch(struct task_struct *next)
299{
300 unsigned long tpidr, tpidrro;
301
302 asm("mrs %0, tpidr_el0" : "=r" (tpidr));
303 *task_user_tls(current) = tpidr;
304
305 tpidr = *task_user_tls(next);
306 tpidrro = is_compat_thread(task_thread_info(next)) ?
307 next->thread.tp_value : 0;
308
309 asm(
310 " msr tpidr_el0, %0\n"
311 " msr tpidrro_el0, %1"
312 : : "r" (tpidr), "r" (tpidrro));
313}
314
315/* Restore the UAO state depending on next's addr_limit */
316static void uao_thread_switch(struct task_struct *next)
317{
318 if (IS_ENABLED(CONFIG_ARM64_UAO)) {
319 if (task_thread_info(next)->addr_limit == KERNEL_DS)
320 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(1), ARM64_HAS_UAO));
321 else
322 asm(ALTERNATIVE("nop", SET_PSTATE_UAO(0), ARM64_HAS_UAO));
323 }
324}
325
326/*
327 * Thread switching.
328 */
329struct task_struct *__switch_to(struct task_struct *prev,
330 struct task_struct *next)
331{
332 struct task_struct *last;
333
334 fpsimd_thread_switch(next);
335 tls_thread_switch(next);
336 hw_breakpoint_thread_switch(next);
337 contextidr_thread_switch(next);
338 uao_thread_switch(next);
339
340 /*
341 * Complete any pending TLB or cache maintenance on this CPU in case
342 * the thread migrates to a different CPU.
343 */
344 dsb(ish);
345
346 /* the actual thread switch */
347 last = cpu_switch_to(prev, next);
348
349 return last;
350}
351
352unsigned long get_wchan(struct task_struct *p)
353{
354 struct stackframe frame;
355 unsigned long stack_page;
356 int count = 0;
357 if (!p || p == current || p->state == TASK_RUNNING)
358 return 0;
359
360 frame.fp = thread_saved_fp(p);
361 frame.sp = thread_saved_sp(p);
362 frame.pc = thread_saved_pc(p);
363#ifdef CONFIG_FUNCTION_GRAPH_TRACER
364 frame.graph = p->curr_ret_stack;
365#endif
366 stack_page = (unsigned long)task_stack_page(p);
367 do {
368 if (frame.sp < stack_page ||
369 frame.sp >= stack_page + THREAD_SIZE ||
370 unwind_frame(p, &frame))
371 return 0;
372 if (!in_sched_functions(frame.pc))
373 return frame.pc;
374 } while (count ++ < 16);
375 return 0;
376}
377
378unsigned long arch_align_stack(unsigned long sp)
379{
380 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
381 sp -= get_random_int() & ~PAGE_MASK;
382 return sp & ~0xf;
383}
384
385static unsigned long randomize_base(unsigned long base)
386{
387 unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
388 return randomize_range(base, range_end, 0) ? : base;
389}
390
391unsigned long arch_randomize_brk(struct mm_struct *mm)
392{
393 return randomize_base(mm->brk);
394}
1/*
2 * Based on arch/arm/kernel/process.c
3 *
4 * Original Copyright (C) 1995 Linus Torvalds
5 * Copyright (C) 1996-2000 Russell King - Converted to ARM.
6 * Copyright (C) 2012 ARM Ltd.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program. If not, see <http://www.gnu.org/licenses/>.
19 */
20
21#include <stdarg.h>
22
23#include <linux/export.h>
24#include <linux/sched.h>
25#include <linux/kernel.h>
26#include <linux/mm.h>
27#include <linux/stddef.h>
28#include <linux/unistd.h>
29#include <linux/user.h>
30#include <linux/delay.h>
31#include <linux/reboot.h>
32#include <linux/interrupt.h>
33#include <linux/kallsyms.h>
34#include <linux/init.h>
35#include <linux/cpu.h>
36#include <linux/elfcore.h>
37#include <linux/pm.h>
38#include <linux/tick.h>
39#include <linux/utsname.h>
40#include <linux/uaccess.h>
41#include <linux/random.h>
42#include <linux/hw_breakpoint.h>
43#include <linux/personality.h>
44#include <linux/notifier.h>
45
46#include <asm/compat.h>
47#include <asm/cacheflush.h>
48#include <asm/fpsimd.h>
49#include <asm/mmu_context.h>
50#include <asm/processor.h>
51#include <asm/stacktrace.h>
52
53static void setup_restart(void)
54{
55 /*
56 * Tell the mm system that we are going to reboot -
57 * we may need it to insert some 1:1 mappings so that
58 * soft boot works.
59 */
60 setup_mm_for_reboot();
61
62 /* Clean and invalidate caches */
63 flush_cache_all();
64
65 /* Turn D-cache off */
66 cpu_cache_off();
67
68 /* Push out any further dirty data, and ensure cache is empty */
69 flush_cache_all();
70}
71
72void soft_restart(unsigned long addr)
73{
74 typedef void (*phys_reset_t)(unsigned long);
75 phys_reset_t phys_reset;
76
77 setup_restart();
78
79 /* Switch to the identity mapping */
80 phys_reset = (phys_reset_t)virt_to_phys(cpu_reset);
81 phys_reset(addr);
82
83 /* Should never get here */
84 BUG();
85}
86
87/*
88 * Function pointers to optional machine specific functions
89 */
90void (*pm_power_off)(void);
91EXPORT_SYMBOL_GPL(pm_power_off);
92
93void (*arm_pm_restart)(enum reboot_mode reboot_mode, const char *cmd);
94EXPORT_SYMBOL_GPL(arm_pm_restart);
95
96/*
97 * This is our default idle handler.
98 */
99void arch_cpu_idle(void)
100{
101 /*
102 * This should do all the clock switching and wait for interrupt
103 * tricks
104 */
105 cpu_do_idle();
106 local_irq_enable();
107}
108
109#ifdef CONFIG_HOTPLUG_CPU
110void arch_cpu_idle_dead(void)
111{
112 cpu_die();
113}
114#endif
115
116void machine_shutdown(void)
117{
118#ifdef CONFIG_SMP
119 smp_send_stop();
120#endif
121}
122
123void machine_halt(void)
124{
125 machine_shutdown();
126 while (1);
127}
128
129void machine_power_off(void)
130{
131 machine_shutdown();
132 if (pm_power_off)
133 pm_power_off();
134}
135
136void machine_restart(char *cmd)
137{
138 machine_shutdown();
139
140 /* Disable interrupts first */
141 local_irq_disable();
142
143 /* Now call the architecture specific reboot code. */
144 if (arm_pm_restart)
145 arm_pm_restart(reboot_mode, cmd);
146
147 /*
148 * Whoops - the architecture was unable to reboot.
149 */
150 printk("Reboot failed -- System halted\n");
151 while (1);
152}
153
154void __show_regs(struct pt_regs *regs)
155{
156 int i, top_reg;
157 u64 lr, sp;
158
159 if (compat_user_mode(regs)) {
160 lr = regs->compat_lr;
161 sp = regs->compat_sp;
162 top_reg = 12;
163 } else {
164 lr = regs->regs[30];
165 sp = regs->sp;
166 top_reg = 29;
167 }
168
169 show_regs_print_info(KERN_DEFAULT);
170 print_symbol("PC is at %s\n", instruction_pointer(regs));
171 print_symbol("LR is at %s\n", lr);
172 printk("pc : [<%016llx>] lr : [<%016llx>] pstate: %08llx\n",
173 regs->pc, lr, regs->pstate);
174 printk("sp : %016llx\n", sp);
175 for (i = top_reg; i >= 0; i--) {
176 printk("x%-2d: %016llx ", i, regs->regs[i]);
177 if (i % 2 == 0)
178 printk("\n");
179 }
180 printk("\n");
181}
182
183void show_regs(struct pt_regs * regs)
184{
185 printk("\n");
186 __show_regs(regs);
187}
188
189/*
190 * Free current thread data structures etc..
191 */
192void exit_thread(void)
193{
194}
195
196void flush_thread(void)
197{
198 fpsimd_flush_thread();
199 flush_ptrace_hw_breakpoint(current);
200}
201
202void release_thread(struct task_struct *dead_task)
203{
204}
205
206int arch_dup_task_struct(struct task_struct *dst, struct task_struct *src)
207{
208 fpsimd_save_state(¤t->thread.fpsimd_state);
209 *dst = *src;
210 return 0;
211}
212
213asmlinkage void ret_from_fork(void) asm("ret_from_fork");
214
215int copy_thread(unsigned long clone_flags, unsigned long stack_start,
216 unsigned long stk_sz, struct task_struct *p)
217{
218 struct pt_regs *childregs = task_pt_regs(p);
219 unsigned long tls = p->thread.tp_value;
220
221 memset(&p->thread.cpu_context, 0, sizeof(struct cpu_context));
222
223 if (likely(!(p->flags & PF_KTHREAD))) {
224 *childregs = *current_pt_regs();
225 childregs->regs[0] = 0;
226 if (is_compat_thread(task_thread_info(p))) {
227 if (stack_start)
228 childregs->compat_sp = stack_start;
229 } else {
230 /*
231 * Read the current TLS pointer from tpidr_el0 as it may be
232 * out-of-sync with the saved value.
233 */
234 asm("mrs %0, tpidr_el0" : "=r" (tls));
235 if (stack_start) {
236 /* 16-byte aligned stack mandatory on AArch64 */
237 if (stack_start & 15)
238 return -EINVAL;
239 childregs->sp = stack_start;
240 }
241 }
242 /*
243 * If a TLS pointer was passed to clone (4th argument), use it
244 * for the new thread.
245 */
246 if (clone_flags & CLONE_SETTLS)
247 tls = childregs->regs[3];
248 } else {
249 memset(childregs, 0, sizeof(struct pt_regs));
250 childregs->pstate = PSR_MODE_EL1h;
251 p->thread.cpu_context.x19 = stack_start;
252 p->thread.cpu_context.x20 = stk_sz;
253 }
254 p->thread.cpu_context.pc = (unsigned long)ret_from_fork;
255 p->thread.cpu_context.sp = (unsigned long)childregs;
256 p->thread.tp_value = tls;
257
258 ptrace_hw_copy_thread(p);
259
260 return 0;
261}
262
263static void tls_thread_switch(struct task_struct *next)
264{
265 unsigned long tpidr, tpidrro;
266
267 if (!is_compat_task()) {
268 asm("mrs %0, tpidr_el0" : "=r" (tpidr));
269 current->thread.tp_value = tpidr;
270 }
271
272 if (is_compat_thread(task_thread_info(next))) {
273 tpidr = 0;
274 tpidrro = next->thread.tp_value;
275 } else {
276 tpidr = next->thread.tp_value;
277 tpidrro = 0;
278 }
279
280 asm(
281 " msr tpidr_el0, %0\n"
282 " msr tpidrro_el0, %1"
283 : : "r" (tpidr), "r" (tpidrro));
284}
285
286/*
287 * Thread switching.
288 */
289struct task_struct *__switch_to(struct task_struct *prev,
290 struct task_struct *next)
291{
292 struct task_struct *last;
293
294 fpsimd_thread_switch(next);
295 tls_thread_switch(next);
296 hw_breakpoint_thread_switch(next);
297 contextidr_thread_switch(next);
298
299 /*
300 * Complete any pending TLB or cache maintenance on this CPU in case
301 * the thread migrates to a different CPU.
302 */
303 dsb();
304
305 /* the actual thread switch */
306 last = cpu_switch_to(prev, next);
307
308 return last;
309}
310
311unsigned long get_wchan(struct task_struct *p)
312{
313 struct stackframe frame;
314 unsigned long stack_page;
315 int count = 0;
316 if (!p || p == current || p->state == TASK_RUNNING)
317 return 0;
318
319 frame.fp = thread_saved_fp(p);
320 frame.sp = thread_saved_sp(p);
321 frame.pc = thread_saved_pc(p);
322 stack_page = (unsigned long)task_stack_page(p);
323 do {
324 if (frame.sp < stack_page ||
325 frame.sp >= stack_page + THREAD_SIZE ||
326 unwind_frame(&frame))
327 return 0;
328 if (!in_sched_functions(frame.pc))
329 return frame.pc;
330 } while (count ++ < 16);
331 return 0;
332}
333
334unsigned long arch_align_stack(unsigned long sp)
335{
336 if (!(current->personality & ADDR_NO_RANDOMIZE) && randomize_va_space)
337 sp -= get_random_int() & ~PAGE_MASK;
338 return sp & ~0xf;
339}
340
341static unsigned long randomize_base(unsigned long base)
342{
343 unsigned long range_end = base + (STACK_RND_MASK << PAGE_SHIFT) + 1;
344 return randomize_range(base, range_end, 0) ? : base;
345}
346
347unsigned long arch_randomize_brk(struct mm_struct *mm)
348{
349 return randomize_base(mm->brk);
350}
351
352unsigned long randomize_et_dyn(unsigned long base)
353{
354 return randomize_base(base);
355}