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1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#ifndef ATH11K_CORE_H
8#define ATH11K_CORE_H
9
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/bitfield.h>
14#include <linux/dmi.h>
15#include <linux/ctype.h>
16#include <linux/rhashtable.h>
17#include <linux/average.h>
18#include <linux/firmware.h>
19
20#include "qmi.h"
21#include "htc.h"
22#include "wmi.h"
23#include "hal.h"
24#include "dp.h"
25#include "ce.h"
26#include "mac.h"
27#include "hw.h"
28#include "hal_rx.h"
29#include "reg.h"
30#include "thermal.h"
31#include "dbring.h"
32#include "spectral.h"
33#include "wow.h"
34#include "fw.h"
35
36#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
37
38#define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
39
40#define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
41
42/* Pending management packets threshold for dropping probe responses */
43#define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
44
45#define ATH11K_INVALID_HW_MAC_ID 0xFF
46#define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
47
48/* SMBIOS type containing Board Data File Name Extension */
49#define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
50
51/* SMBIOS type structure length (excluding strings-set) */
52#define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
53
54/* The magic used by QCA spec */
55#define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
56
57extern unsigned int ath11k_frame_mode;
58extern bool ath11k_ftm_mode;
59
60#define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
61
62#define ATH11K_MON_TIMER_INTERVAL 10
63#define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
64#define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
65#define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
66#define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
67#define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
68#define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
69
70enum ath11k_supported_bw {
71 ATH11K_BW_20 = 0,
72 ATH11K_BW_40 = 1,
73 ATH11K_BW_80 = 2,
74 ATH11K_BW_160 = 3,
75};
76
77enum ath11k_bdf_search {
78 ATH11K_BDF_SEARCH_DEFAULT,
79 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
80};
81
82enum wme_ac {
83 WME_AC_BE,
84 WME_AC_BK,
85 WME_AC_VI,
86 WME_AC_VO,
87 WME_NUM_AC
88};
89
90#define ATH11K_HT_MCS_MAX 7
91#define ATH11K_VHT_MCS_MAX 9
92#define ATH11K_HE_MCS_MAX 11
93
94enum ath11k_crypt_mode {
95 /* Only use hardware crypto engine */
96 ATH11K_CRYPT_MODE_HW,
97 /* Only use software crypto */
98 ATH11K_CRYPT_MODE_SW,
99};
100
101static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
102{
103 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
104 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
105 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
106 WME_AC_VO);
107}
108
109enum ath11k_skb_flags {
110 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
111 ATH11K_SKB_CIPHER_SET = BIT(1),
112};
113
114struct ath11k_skb_cb {
115 dma_addr_t paddr;
116 u8 eid;
117 u8 flags;
118 u32 cipher;
119 struct ath11k *ar;
120 struct ieee80211_vif *vif;
121} __packed;
122
123struct ath11k_skb_rxcb {
124 dma_addr_t paddr;
125 bool is_first_msdu;
126 bool is_last_msdu;
127 bool is_continuation;
128 bool is_mcbc;
129 bool is_eapol;
130 struct hal_rx_desc *rx_desc;
131 u8 err_rel_src;
132 u8 err_code;
133 u8 mac_id;
134 u8 unmapped;
135 u8 is_frag;
136 u8 tid;
137 u16 peer_id;
138 u16 seq_no;
139};
140
141enum ath11k_hw_rev {
142 ATH11K_HW_IPQ8074,
143 ATH11K_HW_QCA6390_HW20,
144 ATH11K_HW_IPQ6018_HW10,
145 ATH11K_HW_QCN9074_HW10,
146 ATH11K_HW_WCN6855_HW20,
147 ATH11K_HW_WCN6855_HW21,
148 ATH11K_HW_WCN6750_HW10,
149 ATH11K_HW_IPQ5018_HW10,
150};
151
152enum ath11k_firmware_mode {
153 /* the default mode, standard 802.11 functionality */
154 ATH11K_FIRMWARE_MODE_NORMAL,
155
156 /* factory tests etc */
157 ATH11K_FIRMWARE_MODE_FTM,
158
159 /* Cold boot calibration */
160 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
161};
162
163extern bool ath11k_cold_boot_cal;
164
165#define ATH11K_IRQ_NUM_MAX 52
166#define ATH11K_EXT_IRQ_NUM_MAX 16
167
168struct ath11k_ext_irq_grp {
169 struct ath11k_base *ab;
170 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
171 u32 num_irq;
172 u32 grp_id;
173 u64 timestamp;
174 bool napi_enabled;
175 struct napi_struct napi;
176 struct net_device napi_ndev;
177};
178
179enum ath11k_smbios_cc_type {
180 /* disable country code setting from SMBIOS */
181 ATH11K_SMBIOS_CC_DISABLE = 0,
182
183 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
184 ATH11K_SMBIOS_CC_ISO = 1,
185
186 /* worldwide regdomain */
187 ATH11K_SMBIOS_CC_WW = 2,
188};
189
190struct ath11k_smbios_bdf {
191 struct dmi_header hdr;
192
193 u8 features_disabled;
194
195 /* enum ath11k_smbios_cc_type */
196 u8 country_code_flag;
197
198 /* To set specific country, you need to set country code
199 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
200 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
201 * 0x53). To set country to INDONESIA, then country code value =
202 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
203 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
204 * setting.
205 */
206 u16 cc_code;
207
208 u8 bdf_enabled;
209 u8 bdf_ext[];
210} __packed;
211
212#define HEHANDLE_CAP_PHYINFO_SIZE 3
213#define HECAP_PHYINFO_SIZE 9
214#define HECAP_MACINFO_SIZE 5
215#define HECAP_TXRX_MCS_NSS_SIZE 2
216#define HECAP_PPET16_PPET8_MAX_SIZE 25
217
218#define HE_PPET16_PPET8_SIZE 8
219
220/* 802.11ax PPE (PPDU packet Extension) threshold */
221struct he_ppe_threshold {
222 u32 numss_m1;
223 u32 ru_mask;
224 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
225};
226
227struct ath11k_he {
228 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
229 u32 hecap_rxmcsnssmap;
230 u32 hecap_txmcsnssmap;
231 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
232 struct he_ppe_threshold hecap_ppet;
233 u32 heop_param;
234};
235
236#define MAX_RADIOS 3
237
238/* ipq5018 hw param macros */
239#define MAX_RADIOS_5018 1
240#define CE_CNT_5018 6
241#define TARGET_CE_CNT_5018 9
242#define SVC_CE_MAP_LEN_5018 17
243#define RXDMA_PER_PDEV_5018 1
244
245enum {
246 WMI_HOST_TP_SCALE_MAX = 0,
247 WMI_HOST_TP_SCALE_50 = 1,
248 WMI_HOST_TP_SCALE_25 = 2,
249 WMI_HOST_TP_SCALE_12 = 3,
250 WMI_HOST_TP_SCALE_MIN = 4,
251 WMI_HOST_TP_SCALE_SIZE = 5,
252};
253
254enum ath11k_scan_state {
255 ATH11K_SCAN_IDLE,
256 ATH11K_SCAN_STARTING,
257 ATH11K_SCAN_RUNNING,
258 ATH11K_SCAN_ABORTING,
259};
260
261enum ath11k_11d_state {
262 ATH11K_11D_IDLE,
263 ATH11K_11D_PREPARING,
264 ATH11K_11D_RUNNING,
265};
266
267enum ath11k_dev_flags {
268 ATH11K_CAC_RUNNING,
269 ATH11K_FLAG_CORE_REGISTERED,
270 ATH11K_FLAG_CRASH_FLUSH,
271 ATH11K_FLAG_RAW_MODE,
272 ATH11K_FLAG_HW_CRYPTO_DISABLED,
273 ATH11K_FLAG_BTCOEX,
274 ATH11K_FLAG_RECOVERY,
275 ATH11K_FLAG_UNREGISTERING,
276 ATH11K_FLAG_REGISTERED,
277 ATH11K_FLAG_QMI_FAIL,
278 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
279 ATH11K_FLAG_CE_IRQ_ENABLED,
280 ATH11K_FLAG_EXT_IRQ_ENABLED,
281 ATH11K_FLAG_FIXED_MEM_RGN,
282 ATH11K_FLAG_DEVICE_INIT_DONE,
283 ATH11K_FLAG_MULTI_MSI_VECTORS,
284 ATH11K_FLAG_FTM_SEGMENTED,
285};
286
287enum ath11k_monitor_flags {
288 ATH11K_FLAG_MONITOR_CONF_ENABLED,
289 ATH11K_FLAG_MONITOR_STARTED,
290 ATH11K_FLAG_MONITOR_VDEV_CREATED,
291};
292
293#define ATH11K_IPV6_UC_TYPE 0
294#define ATH11K_IPV6_AC_TYPE 1
295
296#define ATH11K_IPV6_MAX_COUNT 16
297#define ATH11K_IPV4_MAX_COUNT 2
298
299struct ath11k_arp_ns_offload {
300 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
301 u32 ipv4_count;
302 u32 ipv6_count;
303 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
304 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
305 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
306 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
307 u8 mac_addr[ETH_ALEN];
308};
309
310struct ath11k_rekey_data {
311 u8 kck[NL80211_KCK_LEN];
312 u8 kek[NL80211_KCK_LEN];
313 u64 replay_ctr;
314 bool enable_offload;
315};
316
317struct ath11k_vif {
318 u32 vdev_id;
319 enum wmi_vdev_type vdev_type;
320 enum wmi_vdev_subtype vdev_subtype;
321 u32 beacon_interval;
322 u32 dtim_period;
323 u16 ast_hash;
324 u16 ast_idx;
325 u16 tcl_metadata;
326 u8 hal_addr_search_flags;
327 u8 search_type;
328
329 struct ath11k *ar;
330 struct ieee80211_vif *vif;
331
332 u16 tx_seq_no;
333 struct wmi_wmm_params_all_arg wmm_params;
334 struct list_head list;
335 union {
336 struct {
337 u32 uapsd;
338 } sta;
339 struct {
340 /* 127 stations; wmi limit */
341 u8 tim_bitmap[16];
342 u8 tim_len;
343 u32 ssid_len;
344 u8 ssid[IEEE80211_MAX_SSID_LEN];
345 bool hidden_ssid;
346 /* P2P_IE with NoA attribute for P2P_GO case */
347 u32 noa_len;
348 u8 *noa_data;
349 } ap;
350 } u;
351
352 bool is_started;
353 bool is_up;
354 bool ftm_responder;
355 bool spectral_enabled;
356 bool ps;
357 u32 aid;
358 u8 bssid[ETH_ALEN];
359 struct cfg80211_bitrate_mask bitrate_mask;
360 struct delayed_work connection_loss_work;
361 int num_legacy_stations;
362 int rtscts_prot_mode;
363 int txpower;
364 bool rsnie_present;
365 bool wpaie_present;
366 bool bcca_zero_sent;
367 bool do_not_send_tmpl;
368 struct ieee80211_chanctx_conf chanctx;
369 struct ath11k_arp_ns_offload arp_ns_offload;
370 struct ath11k_rekey_data rekey_data;
371};
372
373struct ath11k_vif_iter {
374 u32 vdev_id;
375 struct ath11k_vif *arvif;
376};
377
378struct ath11k_rx_peer_stats {
379 u64 num_msdu;
380 u64 num_mpdu_fcs_ok;
381 u64 num_mpdu_fcs_err;
382 u64 tcp_msdu_count;
383 u64 udp_msdu_count;
384 u64 other_msdu_count;
385 u64 ampdu_msdu_count;
386 u64 non_ampdu_msdu_count;
387 u64 stbc_count;
388 u64 beamformed_count;
389 u64 mcs_count[HAL_RX_MAX_MCS + 1];
390 u64 nss_count[HAL_RX_MAX_NSS];
391 u64 bw_count[HAL_RX_BW_MAX];
392 u64 gi_count[HAL_RX_GI_MAX];
393 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
394 u64 tid_count[IEEE80211_NUM_TIDS + 1];
395 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
396 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
397 u64 rx_duration;
398 u64 dcm_count;
399 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
400};
401
402#define ATH11K_HE_MCS_NUM 12
403#define ATH11K_VHT_MCS_NUM 10
404#define ATH11K_BW_NUM 4
405#define ATH11K_NSS_NUM 4
406#define ATH11K_LEGACY_NUM 12
407#define ATH11K_GI_NUM 4
408#define ATH11K_HT_MCS_NUM 32
409
410enum ath11k_pkt_rx_err {
411 ATH11K_PKT_RX_ERR_FCS,
412 ATH11K_PKT_RX_ERR_TKIP,
413 ATH11K_PKT_RX_ERR_CRYPT,
414 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
415 ATH11K_PKT_RX_ERR_MAX,
416};
417
418enum ath11k_ampdu_subfrm_num {
419 ATH11K_AMPDU_SUBFRM_NUM_10,
420 ATH11K_AMPDU_SUBFRM_NUM_20,
421 ATH11K_AMPDU_SUBFRM_NUM_30,
422 ATH11K_AMPDU_SUBFRM_NUM_40,
423 ATH11K_AMPDU_SUBFRM_NUM_50,
424 ATH11K_AMPDU_SUBFRM_NUM_60,
425 ATH11K_AMPDU_SUBFRM_NUM_MORE,
426 ATH11K_AMPDU_SUBFRM_NUM_MAX,
427};
428
429enum ath11k_amsdu_subfrm_num {
430 ATH11K_AMSDU_SUBFRM_NUM_1,
431 ATH11K_AMSDU_SUBFRM_NUM_2,
432 ATH11K_AMSDU_SUBFRM_NUM_3,
433 ATH11K_AMSDU_SUBFRM_NUM_4,
434 ATH11K_AMSDU_SUBFRM_NUM_MORE,
435 ATH11K_AMSDU_SUBFRM_NUM_MAX,
436};
437
438enum ath11k_counter_type {
439 ATH11K_COUNTER_TYPE_BYTES,
440 ATH11K_COUNTER_TYPE_PKTS,
441 ATH11K_COUNTER_TYPE_MAX,
442};
443
444enum ath11k_stats_type {
445 ATH11K_STATS_TYPE_SUCC,
446 ATH11K_STATS_TYPE_FAIL,
447 ATH11K_STATS_TYPE_RETRY,
448 ATH11K_STATS_TYPE_AMPDU,
449 ATH11K_STATS_TYPE_MAX,
450};
451
452struct ath11k_htt_data_stats {
453 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
454 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
455 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
456 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
457 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
458 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
459 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
460};
461
462struct ath11k_htt_tx_stats {
463 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
464 u64 tx_duration;
465 u64 ba_fails;
466 u64 ack_fails;
467};
468
469struct ath11k_per_ppdu_tx_stats {
470 u16 succ_pkts;
471 u16 failed_pkts;
472 u16 retry_pkts;
473 u32 succ_bytes;
474 u32 failed_bytes;
475 u32 retry_bytes;
476};
477
478DECLARE_EWMA(avg_rssi, 10, 8)
479
480struct ath11k_sta {
481 struct ath11k_vif *arvif;
482
483 /* the following are protected by ar->data_lock */
484 u32 changed; /* IEEE80211_RC_* */
485 u32 bw;
486 u32 nss;
487 u32 smps;
488 enum hal_pn_type pn_type;
489
490 struct work_struct update_wk;
491 struct work_struct set_4addr_wk;
492 struct rate_info txrate;
493 u32 peer_nss;
494 struct rate_info last_txrate;
495 u64 rx_duration;
496 u64 tx_duration;
497 u8 rssi_comb;
498 struct ewma_avg_rssi avg_rssi;
499 s8 rssi_beacon;
500 s8 chain_signal[IEEE80211_MAX_CHAINS];
501 struct ath11k_htt_tx_stats *tx_stats;
502 struct ath11k_rx_peer_stats *rx_stats;
503
504#ifdef CONFIG_MAC80211_DEBUGFS
505 /* protected by conf_mutex */
506 bool aggr_mode;
507#endif
508
509 bool use_4addr_set;
510 u16 tcl_metadata;
511
512 /* Protected with ar->data_lock */
513 enum ath11k_wmi_peer_ps_state peer_ps_state;
514 u64 ps_start_time;
515 u64 ps_start_jiffies;
516 u64 ps_total_duration;
517 bool peer_current_ps_valid;
518
519 u32 bw_prev;
520};
521
522#define ATH11K_MIN_5G_FREQ 4150
523#define ATH11K_MIN_6G_FREQ 5925
524#define ATH11K_MAX_6G_FREQ 7115
525#define ATH11K_NUM_CHANS 102
526#define ATH11K_MAX_5G_CHAN 177
527
528enum ath11k_state {
529 ATH11K_STATE_OFF,
530 ATH11K_STATE_ON,
531 ATH11K_STATE_RESTARTING,
532 ATH11K_STATE_RESTARTED,
533 ATH11K_STATE_WEDGED,
534 ATH11K_STATE_FTM,
535 /* Add other states as required */
536};
537
538/* Antenna noise floor */
539#define ATH11K_DEFAULT_NOISE_FLOOR -95
540
541#define ATH11K_INVALID_RSSI_FULL -1
542
543#define ATH11K_INVALID_RSSI_EMPTY -128
544
545struct ath11k_fw_stats {
546 struct dentry *debugfs_fwstats;
547 u32 pdev_id;
548 u32 stats_id;
549 struct list_head pdevs;
550 struct list_head vdevs;
551 struct list_head bcn;
552};
553
554struct ath11k_dbg_htt_stats {
555 u8 type;
556 u8 reset;
557 struct debug_htt_stats_req *stats_req;
558 /* protects shared stats req buffer */
559 spinlock_t lock;
560};
561
562#define MAX_MODULE_ID_BITMAP_WORDS 16
563
564struct ath11k_debug {
565 struct dentry *debugfs_pdev;
566 struct ath11k_dbg_htt_stats htt_stats;
567 u32 extd_tx_stats;
568 u32 extd_rx_stats;
569 u32 pktlog_filter;
570 u32 pktlog_mode;
571 u32 pktlog_peer_valid;
572 u8 pktlog_peer_addr[ETH_ALEN];
573 u32 rx_filter;
574 u32 mem_offset;
575 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
576 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
577};
578
579struct ath11k_per_peer_tx_stats {
580 u32 succ_bytes;
581 u32 retry_bytes;
582 u32 failed_bytes;
583 u16 succ_pkts;
584 u16 retry_pkts;
585 u16 failed_pkts;
586 u32 duration;
587 u8 ba_fails;
588 bool is_ampdu;
589};
590
591#define ATH11K_FLUSH_TIMEOUT (5 * HZ)
592#define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
593
594struct ath11k {
595 struct ath11k_base *ab;
596 struct ath11k_pdev *pdev;
597 struct ieee80211_hw *hw;
598 struct ath11k_pdev_wmi *wmi;
599 struct ath11k_pdev_dp dp;
600 u8 mac_addr[ETH_ALEN];
601 struct ath11k_he ar_he;
602 enum ath11k_state state;
603 bool supports_6ghz;
604 struct {
605 struct completion started;
606 struct completion completed;
607 struct completion on_channel;
608 struct delayed_work timeout;
609 enum ath11k_scan_state state;
610 bool is_roc;
611 int vdev_id;
612 int roc_freq;
613 bool roc_notify;
614 } scan;
615
616 struct {
617 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
618 struct ieee80211_sband_iftype_data
619 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
620 } mac;
621
622 unsigned long dev_flags;
623 unsigned int filter_flags;
624 unsigned long monitor_flags;
625 u32 min_tx_power;
626 u32 max_tx_power;
627 u32 txpower_limit_2g;
628 u32 txpower_limit_5g;
629 u32 txpower_scale;
630 u32 power_scale;
631 u32 chan_tx_pwr;
632 u32 num_stations;
633 u32 max_num_stations;
634 /* To synchronize concurrent synchronous mac80211 callback operations,
635 * concurrent debugfs configuration and concurrent FW statistics events.
636 */
637 struct mutex conf_mutex;
638 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
639 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
640 * channel context data, survey info, test mode data.
641 */
642 spinlock_t data_lock;
643
644 struct list_head arvifs;
645 /* should never be NULL; needed for regular htt rx */
646 struct ieee80211_channel *rx_channel;
647
648 /* valid during scan; needed for mgmt rx during scan */
649 struct ieee80211_channel *scan_channel;
650
651 u8 cfg_tx_chainmask;
652 u8 cfg_rx_chainmask;
653 u8 num_rx_chains;
654 u8 num_tx_chains;
655 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
656 u8 pdev_idx;
657 u8 lmac_id;
658
659 struct completion peer_assoc_done;
660 struct completion peer_delete_done;
661
662 int install_key_status;
663 struct completion install_key_done;
664
665 int last_wmi_vdev_start_status;
666 struct completion vdev_setup_done;
667 struct completion vdev_delete_done;
668
669 int num_peers;
670 int max_num_peers;
671 u32 num_started_vdevs;
672 u32 num_created_vdevs;
673 unsigned long long allocated_vdev_map;
674
675 struct idr txmgmt_idr;
676 /* protects txmgmt_idr data */
677 spinlock_t txmgmt_idr_lock;
678 atomic_t num_pending_mgmt_tx;
679 wait_queue_head_t txmgmt_empty_waitq;
680
681 /* cycle count is reported twice for each visited channel during scan.
682 * access protected by data_lock
683 */
684 u32 survey_last_rx_clear_count;
685 u32 survey_last_cycle_count;
686
687 /* Channel info events are expected to come in pairs without and with
688 * COMPLETE flag set respectively for each channel visit during scan.
689 *
690 * However there are deviations from this rule. This flag is used to
691 * avoid reporting garbage data.
692 */
693 bool ch_info_can_report_survey;
694 struct survey_info survey[ATH11K_NUM_CHANS];
695 struct completion bss_survey_done;
696
697 struct work_struct regd_update_work;
698
699 struct work_struct wmi_mgmt_tx_work;
700 struct sk_buff_head wmi_mgmt_tx_queue;
701
702 struct ath11k_wow wow;
703 struct completion target_suspend;
704 bool target_suspend_ack;
705 struct ath11k_per_peer_tx_stats peer_tx_stats;
706 struct list_head ppdu_stats_info;
707 u32 ppdu_stat_list_depth;
708
709 struct ath11k_per_peer_tx_stats cached_stats;
710 u32 last_ppdu_id;
711 u32 cached_ppdu_id;
712 int monitor_vdev_id;
713 struct completion fw_mode_reset;
714 u8 ftm_msgref;
715#ifdef CONFIG_ATH11K_DEBUGFS
716 struct ath11k_debug debug;
717#endif
718#ifdef CONFIG_ATH11K_SPECTRAL
719 struct ath11k_spectral spectral;
720#endif
721 bool dfs_block_radar_events;
722 struct ath11k_thermal thermal;
723 u32 vdev_id_11d_scan;
724 struct completion completed_11d_scan;
725 enum ath11k_11d_state state_11d;
726 bool regdom_set_by_user;
727 int hw_rate_code;
728 u8 twt_enabled;
729 bool nlo_enabled;
730 u8 alpha2[REG_ALPHA2_LEN + 1];
731 struct ath11k_fw_stats fw_stats;
732 struct completion fw_stats_complete;
733 bool fw_stats_done;
734
735 /* protected by conf_mutex */
736 bool ps_state_enable;
737 bool ps_timekeeper_enable;
738};
739
740struct ath11k_band_cap {
741 u32 phy_id;
742 u32 max_bw_supported;
743 u32 ht_cap_info;
744 u32 he_cap_info[2];
745 u32 he_mcs;
746 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
747 struct ath11k_ppe_threshold he_ppet;
748 u16 he_6ghz_capa;
749};
750
751struct ath11k_pdev_cap {
752 u32 supported_bands;
753 u32 ampdu_density;
754 u32 vht_cap;
755 u32 vht_mcs;
756 u32 he_mcs;
757 u32 tx_chain_mask;
758 u32 rx_chain_mask;
759 u32 tx_chain_mask_shift;
760 u32 rx_chain_mask_shift;
761 struct ath11k_band_cap band[NUM_NL80211_BANDS];
762 bool nss_ratio_enabled;
763 u8 nss_ratio_info;
764};
765
766struct ath11k_pdev {
767 struct ath11k *ar;
768 u32 pdev_id;
769 struct ath11k_pdev_cap cap;
770 u8 mac_addr[ETH_ALEN];
771};
772
773struct ath11k_board_data {
774 const struct firmware *fw;
775 const void *data;
776 size_t len;
777};
778
779struct ath11k_pci_ops {
780 int (*wakeup)(struct ath11k_base *ab);
781 void (*release)(struct ath11k_base *ab);
782 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
783 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
784 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
785};
786
787/* IPQ8074 HW channel counters frequency value in hertz */
788#define IPQ8074_CC_FREQ_HERTZ 320000
789
790struct ath11k_bp_stats {
791 /* Head Pointer reported by the last HTT Backpressure event for the ring */
792 u16 hp;
793
794 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
795 u16 tp;
796
797 /* Number of Backpressure events received for the ring */
798 u32 count;
799
800 /* Last recorded event timestamp */
801 unsigned long jiffies;
802};
803
804struct ath11k_dp_ring_bp_stats {
805 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
806 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
807};
808
809struct ath11k_soc_dp_tx_err_stats {
810 /* TCL Ring Descriptor unavailable */
811 u32 desc_na[DP_TCL_NUM_RING_MAX];
812 /* Other failures during dp_tx due to mem allocation failure
813 * idr unavailable etc.
814 */
815 atomic_t misc_fail;
816};
817
818struct ath11k_soc_dp_stats {
819 u32 err_ring_pkts;
820 u32 invalid_rbm;
821 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
822 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
823 u32 hal_reo_error[DP_REO_DST_RING_MAX];
824 struct ath11k_soc_dp_tx_err_stats tx_err;
825 struct ath11k_dp_ring_bp_stats bp_stats;
826};
827
828struct ath11k_msi_user {
829 char *name;
830 int num_vectors;
831 u32 base_vector;
832};
833
834struct ath11k_msi_config {
835 int total_vectors;
836 int total_users;
837 struct ath11k_msi_user *users;
838 u16 hw_rev;
839};
840
841/* Master structure to hold the hw data which may be used in core module */
842struct ath11k_base {
843 enum ath11k_hw_rev hw_rev;
844 enum ath11k_firmware_mode fw_mode;
845 struct platform_device *pdev;
846 struct device *dev;
847 struct ath11k_qmi qmi;
848 struct ath11k_wmi_base wmi_ab;
849 struct completion fw_ready;
850 int num_radios;
851 /* HW channel counters frequency value in hertz common to all MACs */
852 u32 cc_freq_hz;
853
854 struct ath11k_htc htc;
855
856 struct ath11k_dp dp;
857
858 void __iomem *mem;
859 void __iomem *mem_ce;
860 unsigned long mem_len;
861
862 struct {
863 enum ath11k_bus bus;
864 const struct ath11k_hif_ops *ops;
865 } hif;
866
867 struct {
868 struct completion wakeup_completed;
869 } wow;
870
871 struct ath11k_ce ce;
872 struct timer_list rx_replenish_retry;
873 struct ath11k_hal hal;
874 /* To synchronize core_start/core_stop */
875 struct mutex core_lock;
876 /* Protects data like peers */
877 spinlock_t base_lock;
878 struct ath11k_pdev pdevs[MAX_RADIOS];
879 struct {
880 enum WMI_HOST_WLAN_BAND supported_bands;
881 u32 pdev_id;
882 } target_pdev_ids[MAX_RADIOS];
883 u8 target_pdev_count;
884 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
885 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
886 unsigned long long free_vdev_map;
887
888 /* To synchronize rhash tbl write operation */
889 struct mutex tbl_mtx_lock;
890
891 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
892 struct rhashtable *rhead_peer_addr;
893 struct rhashtable_params rhash_peer_addr_param;
894
895 /* The rhashtable containing struct ath11k_peer keyed by id */
896 struct rhashtable *rhead_peer_id;
897 struct rhashtable_params rhash_peer_id_param;
898
899 struct list_head peers;
900 wait_queue_head_t peer_mapping_wq;
901 u8 mac_addr[ETH_ALEN];
902 int irq_num[ATH11K_IRQ_NUM_MAX];
903 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
904 struct ath11k_targ_cap target_caps;
905 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
906 bool pdevs_macaddr_valid;
907
908 struct ath11k_hw_params hw_params;
909
910 const struct firmware *cal_file;
911
912 /* Below regd's are protected by ab->data_lock */
913 /* This is the regd set for every radio
914 * by the firmware during initialization
915 */
916 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
917 /* This regd is set during dynamic country setting
918 * This may or may not be used during the runtime
919 */
920 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
921
922 /* Current DFS Regulatory */
923 enum ath11k_dfs_region dfs_region;
924#ifdef CONFIG_ATH11K_DEBUGFS
925 struct dentry *debugfs_soc;
926#endif
927 struct ath11k_soc_dp_stats soc_stats;
928
929 unsigned long dev_flags;
930 struct completion driver_recovery;
931 struct workqueue_struct *workqueue;
932 struct work_struct restart_work;
933 struct work_struct update_11d_work;
934 u8 new_alpha2[3];
935 struct workqueue_struct *workqueue_aux;
936 struct work_struct reset_work;
937 atomic_t reset_count;
938 atomic_t recovery_count;
939 atomic_t recovery_start_count;
940 bool is_reset;
941 struct completion reset_complete;
942 struct completion reconfigure_complete;
943 struct completion recovery_start;
944 /* continuous recovery fail count */
945 atomic_t fail_cont_count;
946 unsigned long reset_fail_timeout;
947 struct {
948 /* protected by data_lock */
949 u32 fw_crash_counter;
950 } stats;
951 u32 pktlog_defs_checksum;
952
953 struct ath11k_dbring_cap *db_caps;
954 u32 num_db_cap;
955
956 /* To synchronize 11d scan vdev id */
957 struct mutex vdev_id_11d_lock;
958 struct timer_list mon_reap_timer;
959
960 struct completion htc_suspend;
961
962 struct {
963 enum ath11k_bdf_search bdf_search;
964 u32 vendor;
965 u32 device;
966 u32 subsystem_vendor;
967 u32 subsystem_device;
968 } id;
969
970 struct {
971 struct {
972 const struct ath11k_msi_config *config;
973 u32 ep_base_data;
974 u32 irqs[32];
975 u32 addr_lo;
976 u32 addr_hi;
977 } msi;
978
979 const struct ath11k_pci_ops *ops;
980 } pci;
981
982 struct {
983 u32 api_version;
984
985 const struct firmware *fw;
986 const u8 *amss_data;
987 size_t amss_len;
988 const u8 *m3_data;
989 size_t m3_len;
990
991 DECLARE_BITMAP(fw_features, ATH11K_FW_FEATURE_COUNT);
992 } fw;
993
994#ifdef CONFIG_NL80211_TESTMODE
995 struct {
996 u32 data_pos;
997 u32 expected_seq;
998 u8 *eventdata;
999 } testmode;
1000#endif
1001
1002 /* must be last */
1003 u8 drv_priv[] __aligned(sizeof(void *));
1004};
1005
1006struct ath11k_fw_stats_pdev {
1007 struct list_head list;
1008
1009 /* PDEV stats */
1010 s32 ch_noise_floor;
1011 /* Cycles spent transmitting frames */
1012 u32 tx_frame_count;
1013 /* Cycles spent receiving frames */
1014 u32 rx_frame_count;
1015 /* Total channel busy time, evidently */
1016 u32 rx_clear_count;
1017 /* Total on-channel time */
1018 u32 cycle_count;
1019 u32 phy_err_count;
1020 u32 chan_tx_power;
1021 u32 ack_rx_bad;
1022 u32 rts_bad;
1023 u32 rts_good;
1024 u32 fcs_bad;
1025 u32 no_beacons;
1026 u32 mib_int_count;
1027
1028 /* PDEV TX stats */
1029 /* Num HTT cookies queued to dispatch list */
1030 s32 comp_queued;
1031 /* Num HTT cookies dispatched */
1032 s32 comp_delivered;
1033 /* Num MSDU queued to WAL */
1034 s32 msdu_enqued;
1035 /* Num MPDU queue to WAL */
1036 s32 mpdu_enqued;
1037 /* Num MSDUs dropped by WMM limit */
1038 s32 wmm_drop;
1039 /* Num Local frames queued */
1040 s32 local_enqued;
1041 /* Num Local frames done */
1042 s32 local_freed;
1043 /* Num queued to HW */
1044 s32 hw_queued;
1045 /* Num PPDU reaped from HW */
1046 s32 hw_reaped;
1047 /* Num underruns */
1048 s32 underrun;
1049 /* Num hw paused */
1050 u32 hw_paused;
1051 /* Num PPDUs cleaned up in TX abort */
1052 s32 tx_abort;
1053 /* Num MPDUs requeued by SW */
1054 s32 mpdus_requeued;
1055 /* excessive retries */
1056 u32 tx_ko;
1057 u32 tx_xretry;
1058 /* data hw rate code */
1059 u32 data_rc;
1060 /* Scheduler self triggers */
1061 u32 self_triggers;
1062 /* frames dropped due to excessive sw retries */
1063 u32 sw_retry_failure;
1064 /* illegal rate phy errors */
1065 u32 illgl_rate_phy_err;
1066 /* wal pdev continuous xretry */
1067 u32 pdev_cont_xretry;
1068 /* wal pdev tx timeouts */
1069 u32 pdev_tx_timeout;
1070 /* wal pdev resets */
1071 u32 pdev_resets;
1072 /* frames dropped due to non-availability of stateless TIDs */
1073 u32 stateless_tid_alloc_failure;
1074 /* PhY/BB underrun */
1075 u32 phy_underrun;
1076 /* MPDU is more than txop limit */
1077 u32 txop_ovf;
1078 /* Num sequences posted */
1079 u32 seq_posted;
1080 /* Num sequences failed in queueing */
1081 u32 seq_failed_queueing;
1082 /* Num sequences completed */
1083 u32 seq_completed;
1084 /* Num sequences restarted */
1085 u32 seq_restarted;
1086 /* Num of MU sequences posted */
1087 u32 mu_seq_posted;
1088 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1089 * (Reset,channel change)
1090 */
1091 s32 mpdus_sw_flush;
1092 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1093 s32 mpdus_hw_filter;
1094 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1095 * PPDU_duration based on rate, dyn_bw)
1096 */
1097 s32 mpdus_truncated;
1098 /* Num MPDUs that was tried but didn't receive ACK or BA */
1099 s32 mpdus_ack_failed;
1100 /* Num MPDUs that was dropped du to expiry. */
1101 s32 mpdus_expired;
1102
1103 /* PDEV RX stats */
1104 /* Cnts any change in ring routing mid-ppdu */
1105 s32 mid_ppdu_route_change;
1106 /* Total number of statuses processed */
1107 s32 status_rcvd;
1108 /* Extra frags on rings 0-3 */
1109 s32 r0_frags;
1110 s32 r1_frags;
1111 s32 r2_frags;
1112 s32 r3_frags;
1113 /* MSDUs / MPDUs delivered to HTT */
1114 s32 htt_msdus;
1115 s32 htt_mpdus;
1116 /* MSDUs / MPDUs delivered to local stack */
1117 s32 loc_msdus;
1118 s32 loc_mpdus;
1119 /* AMSDUs that have more MSDUs than the status ring size */
1120 s32 oversize_amsdu;
1121 /* Number of PHY errors */
1122 s32 phy_errs;
1123 /* Number of PHY errors drops */
1124 s32 phy_err_drop;
1125 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1126 s32 mpdu_errs;
1127 /* Num overflow errors */
1128 s32 rx_ovfl_errs;
1129};
1130
1131struct ath11k_fw_stats_vdev {
1132 struct list_head list;
1133
1134 u32 vdev_id;
1135 u32 beacon_snr;
1136 u32 data_snr;
1137 u32 num_tx_frames[WLAN_MAX_AC];
1138 u32 num_rx_frames;
1139 u32 num_tx_frames_retries[WLAN_MAX_AC];
1140 u32 num_tx_frames_failures[WLAN_MAX_AC];
1141 u32 num_rts_fail;
1142 u32 num_rts_success;
1143 u32 num_rx_err;
1144 u32 num_rx_discard;
1145 u32 num_tx_not_acked;
1146 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1147 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1148};
1149
1150struct ath11k_fw_stats_bcn {
1151 struct list_head list;
1152
1153 u32 vdev_id;
1154 u32 tx_bcn_succ_cnt;
1155 u32 tx_bcn_outage_cnt;
1156};
1157
1158void ath11k_fw_stats_init(struct ath11k *ar);
1159void ath11k_fw_stats_pdevs_free(struct list_head *head);
1160void ath11k_fw_stats_vdevs_free(struct list_head *head);
1161void ath11k_fw_stats_bcn_free(struct list_head *head);
1162void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1163
1164extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1165extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1166extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1167
1168extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1169extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1170
1171extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq5018[];
1172extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq5018[];
1173
1174extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1175extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1176int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1177int ath11k_core_pre_init(struct ath11k_base *ab);
1178int ath11k_core_init(struct ath11k_base *ath11k);
1179void ath11k_core_deinit(struct ath11k_base *ath11k);
1180struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1181 enum ath11k_bus bus);
1182void ath11k_core_free(struct ath11k_base *ath11k);
1183int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1184 struct ath11k_board_data *bd);
1185int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1186int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1187 struct ath11k_board_data *bd,
1188 const char *name);
1189void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1190int ath11k_core_check_dt(struct ath11k_base *ath11k);
1191int ath11k_core_check_smbios(struct ath11k_base *ab);
1192void ath11k_core_halt(struct ath11k *ar);
1193int ath11k_core_resume(struct ath11k_base *ab);
1194int ath11k_core_suspend(struct ath11k_base *ab);
1195void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1196bool ath11k_core_coldboot_cal_support(struct ath11k_base *ab);
1197
1198const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1199 const char *filename);
1200
1201static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1202{
1203 switch (state) {
1204 case ATH11K_SCAN_IDLE:
1205 return "idle";
1206 case ATH11K_SCAN_STARTING:
1207 return "starting";
1208 case ATH11K_SCAN_RUNNING:
1209 return "running";
1210 case ATH11K_SCAN_ABORTING:
1211 return "aborting";
1212 }
1213
1214 return "unknown";
1215}
1216
1217static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1218{
1219 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1220 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1221 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1222}
1223
1224static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1225{
1226 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1227 return (struct ath11k_skb_rxcb *)skb->cb;
1228}
1229
1230static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1231{
1232 return (struct ath11k_vif *)vif->drv_priv;
1233}
1234
1235static inline struct ath11k_sta *ath11k_sta_to_arsta(struct ieee80211_sta *sta)
1236{
1237 return (struct ath11k_sta *)sta->drv_priv;
1238}
1239
1240static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1241 int mac_id)
1242{
1243 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1244}
1245
1246static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1247 const char *filename,
1248 void *buf, size_t buf_len)
1249{
1250 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1251 ab->hw_params.fw.dir, filename);
1252}
1253
1254static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1255{
1256 switch (bus) {
1257 case ATH11K_BUS_PCI:
1258 return "pci";
1259 case ATH11K_BUS_AHB:
1260 return "ahb";
1261 }
1262
1263 return "unknown";
1264}
1265
1266#endif /* _CORE_H_ */
1/* SPDX-License-Identifier: BSD-3-Clause-Clear */
2/*
3 * Copyright (c) 2018-2019 The Linux Foundation. All rights reserved.
4 * Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
5 */
6
7#ifndef ATH11K_CORE_H
8#define ATH11K_CORE_H
9
10#include <linux/types.h>
11#include <linux/interrupt.h>
12#include <linux/irq.h>
13#include <linux/bitfield.h>
14#include <linux/dmi.h>
15#include <linux/ctype.h>
16#include <linux/rhashtable.h>
17#include <linux/average.h>
18#include "qmi.h"
19#include "htc.h"
20#include "wmi.h"
21#include "hal.h"
22#include "dp.h"
23#include "ce.h"
24#include "mac.h"
25#include "hw.h"
26#include "hal_rx.h"
27#include "reg.h"
28#include "thermal.h"
29#include "dbring.h"
30#include "spectral.h"
31#include "wow.h"
32
33#define SM(_v, _f) (((_v) << _f##_LSB) & _f##_MASK)
34
35#define ATH11K_TX_MGMT_NUM_PENDING_MAX 512
36
37#define ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI 64
38
39/* Pending management packets threshold for dropping probe responses */
40#define ATH11K_PRB_RSP_DROP_THRESHOLD ((ATH11K_TX_MGMT_TARGET_MAX_SUPPORT_WMI * 3) / 4)
41
42#define ATH11K_INVALID_HW_MAC_ID 0xFF
43#define ATH11K_CONNECTION_LOSS_HZ (3 * HZ)
44
45/* SMBIOS type containing Board Data File Name Extension */
46#define ATH11K_SMBIOS_BDF_EXT_TYPE 0xF8
47
48/* SMBIOS type structure length (excluding strings-set) */
49#define ATH11K_SMBIOS_BDF_EXT_LENGTH 0x9
50
51/* The magic used by QCA spec */
52#define ATH11K_SMBIOS_BDF_EXT_MAGIC "BDF_"
53
54extern unsigned int ath11k_frame_mode;
55
56#define ATH11K_SCAN_TIMEOUT_HZ (20 * HZ)
57
58#define ATH11K_MON_TIMER_INTERVAL 10
59#define ATH11K_RESET_TIMEOUT_HZ (20 * HZ)
60#define ATH11K_RESET_MAX_FAIL_COUNT_FIRST 3
61#define ATH11K_RESET_MAX_FAIL_COUNT_FINAL 5
62#define ATH11K_RESET_FAIL_TIMEOUT_HZ (20 * HZ)
63#define ATH11K_RECONFIGURE_TIMEOUT_HZ (10 * HZ)
64#define ATH11K_RECOVER_START_TIMEOUT_HZ (20 * HZ)
65
66enum ath11k_supported_bw {
67 ATH11K_BW_20 = 0,
68 ATH11K_BW_40 = 1,
69 ATH11K_BW_80 = 2,
70 ATH11K_BW_160 = 3,
71};
72
73enum ath11k_bdf_search {
74 ATH11K_BDF_SEARCH_DEFAULT,
75 ATH11K_BDF_SEARCH_BUS_AND_BOARD,
76};
77
78enum wme_ac {
79 WME_AC_BE,
80 WME_AC_BK,
81 WME_AC_VI,
82 WME_AC_VO,
83 WME_NUM_AC
84};
85
86#define ATH11K_HT_MCS_MAX 7
87#define ATH11K_VHT_MCS_MAX 9
88#define ATH11K_HE_MCS_MAX 11
89
90enum ath11k_crypt_mode {
91 /* Only use hardware crypto engine */
92 ATH11K_CRYPT_MODE_HW,
93 /* Only use software crypto */
94 ATH11K_CRYPT_MODE_SW,
95};
96
97static inline enum wme_ac ath11k_tid_to_ac(u32 tid)
98{
99 return (((tid == 0) || (tid == 3)) ? WME_AC_BE :
100 ((tid == 1) || (tid == 2)) ? WME_AC_BK :
101 ((tid == 4) || (tid == 5)) ? WME_AC_VI :
102 WME_AC_VO);
103}
104
105enum ath11k_skb_flags {
106 ATH11K_SKB_HW_80211_ENCAP = BIT(0),
107 ATH11K_SKB_CIPHER_SET = BIT(1),
108};
109
110struct ath11k_skb_cb {
111 dma_addr_t paddr;
112 u8 eid;
113 u8 flags;
114 u32 cipher;
115 struct ath11k *ar;
116 struct ieee80211_vif *vif;
117} __packed;
118
119struct ath11k_skb_rxcb {
120 dma_addr_t paddr;
121 bool is_first_msdu;
122 bool is_last_msdu;
123 bool is_continuation;
124 bool is_mcbc;
125 bool is_eapol;
126 struct hal_rx_desc *rx_desc;
127 u8 err_rel_src;
128 u8 err_code;
129 u8 mac_id;
130 u8 unmapped;
131 u8 is_frag;
132 u8 tid;
133 u16 peer_id;
134 u16 seq_no;
135};
136
137enum ath11k_hw_rev {
138 ATH11K_HW_IPQ8074,
139 ATH11K_HW_QCA6390_HW20,
140 ATH11K_HW_IPQ6018_HW10,
141 ATH11K_HW_QCN9074_HW10,
142 ATH11K_HW_WCN6855_HW20,
143 ATH11K_HW_WCN6855_HW21,
144 ATH11K_HW_WCN6750_HW10,
145};
146
147enum ath11k_firmware_mode {
148 /* the default mode, standard 802.11 functionality */
149 ATH11K_FIRMWARE_MODE_NORMAL,
150
151 /* factory tests etc */
152 ATH11K_FIRMWARE_MODE_FTM,
153
154 /* Cold boot calibration */
155 ATH11K_FIRMWARE_MODE_COLD_BOOT = 7,
156};
157
158extern bool ath11k_cold_boot_cal;
159
160#define ATH11K_IRQ_NUM_MAX 52
161#define ATH11K_EXT_IRQ_NUM_MAX 16
162
163struct ath11k_ext_irq_grp {
164 struct ath11k_base *ab;
165 u32 irqs[ATH11K_EXT_IRQ_NUM_MAX];
166 u32 num_irq;
167 u32 grp_id;
168 u64 timestamp;
169 bool napi_enabled;
170 struct napi_struct napi;
171 struct net_device napi_ndev;
172};
173
174enum ath11k_smbios_cc_type {
175 /* disable country code setting from SMBIOS */
176 ATH11K_SMBIOS_CC_DISABLE = 0,
177
178 /* set country code by ANSI country name, based on ISO3166-1 alpha2 */
179 ATH11K_SMBIOS_CC_ISO = 1,
180
181 /* worldwide regdomain */
182 ATH11K_SMBIOS_CC_WW = 2,
183};
184
185struct ath11k_smbios_bdf {
186 struct dmi_header hdr;
187
188 u8 features_disabled;
189
190 /* enum ath11k_smbios_cc_type */
191 u8 country_code_flag;
192
193 /* To set specific country, you need to set country code
194 * flag=ATH11K_SMBIOS_CC_ISO first, then if country is United
195 * States, then country code value = 0x5553 ("US",'U' = 0x55, 'S'=
196 * 0x53). To set country to INDONESIA, then country code value =
197 * 0x4944 ("IN", 'I'=0x49, 'D'=0x44). If country code flag =
198 * ATH11K_SMBIOS_CC_WW, then you can use worldwide regulatory
199 * setting.
200 */
201 u16 cc_code;
202
203 u8 bdf_enabled;
204 u8 bdf_ext[];
205} __packed;
206
207#define HEHANDLE_CAP_PHYINFO_SIZE 3
208#define HECAP_PHYINFO_SIZE 9
209#define HECAP_MACINFO_SIZE 5
210#define HECAP_TXRX_MCS_NSS_SIZE 2
211#define HECAP_PPET16_PPET8_MAX_SIZE 25
212
213#define HE_PPET16_PPET8_SIZE 8
214
215/* 802.11ax PPE (PPDU packet Extension) threshold */
216struct he_ppe_threshold {
217 u32 numss_m1;
218 u32 ru_mask;
219 u32 ppet16_ppet8_ru3_ru0[HE_PPET16_PPET8_SIZE];
220};
221
222struct ath11k_he {
223 u8 hecap_macinfo[HECAP_MACINFO_SIZE];
224 u32 hecap_rxmcsnssmap;
225 u32 hecap_txmcsnssmap;
226 u32 hecap_phyinfo[HEHANDLE_CAP_PHYINFO_SIZE];
227 struct he_ppe_threshold hecap_ppet;
228 u32 heop_param;
229};
230
231#define MAX_RADIOS 3
232
233enum {
234 WMI_HOST_TP_SCALE_MAX = 0,
235 WMI_HOST_TP_SCALE_50 = 1,
236 WMI_HOST_TP_SCALE_25 = 2,
237 WMI_HOST_TP_SCALE_12 = 3,
238 WMI_HOST_TP_SCALE_MIN = 4,
239 WMI_HOST_TP_SCALE_SIZE = 5,
240};
241
242enum ath11k_scan_state {
243 ATH11K_SCAN_IDLE,
244 ATH11K_SCAN_STARTING,
245 ATH11K_SCAN_RUNNING,
246 ATH11K_SCAN_ABORTING,
247};
248
249enum ath11k_11d_state {
250 ATH11K_11D_IDLE,
251 ATH11K_11D_PREPARING,
252 ATH11K_11D_RUNNING,
253};
254
255enum ath11k_dev_flags {
256 ATH11K_CAC_RUNNING,
257 ATH11K_FLAG_CORE_REGISTERED,
258 ATH11K_FLAG_CRASH_FLUSH,
259 ATH11K_FLAG_RAW_MODE,
260 ATH11K_FLAG_HW_CRYPTO_DISABLED,
261 ATH11K_FLAG_BTCOEX,
262 ATH11K_FLAG_RECOVERY,
263 ATH11K_FLAG_UNREGISTERING,
264 ATH11K_FLAG_REGISTERED,
265 ATH11K_FLAG_QMI_FAIL,
266 ATH11K_FLAG_HTC_SUSPEND_COMPLETE,
267 ATH11K_FLAG_CE_IRQ_ENABLED,
268 ATH11K_FLAG_EXT_IRQ_ENABLED,
269 ATH11K_FLAG_FIXED_MEM_RGN,
270 ATH11K_FLAG_DEVICE_INIT_DONE,
271 ATH11K_FLAG_MULTI_MSI_VECTORS,
272};
273
274enum ath11k_monitor_flags {
275 ATH11K_FLAG_MONITOR_CONF_ENABLED,
276 ATH11K_FLAG_MONITOR_STARTED,
277 ATH11K_FLAG_MONITOR_VDEV_CREATED,
278};
279
280#define ATH11K_IPV6_UC_TYPE 0
281#define ATH11K_IPV6_AC_TYPE 1
282
283#define ATH11K_IPV6_MAX_COUNT 16
284#define ATH11K_IPV4_MAX_COUNT 2
285
286struct ath11k_arp_ns_offload {
287 u8 ipv4_addr[ATH11K_IPV4_MAX_COUNT][4];
288 u32 ipv4_count;
289 u32 ipv6_count;
290 u8 ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
291 u8 self_ipv6_addr[ATH11K_IPV6_MAX_COUNT][16];
292 u8 ipv6_type[ATH11K_IPV6_MAX_COUNT];
293 bool ipv6_valid[ATH11K_IPV6_MAX_COUNT];
294 u8 mac_addr[ETH_ALEN];
295};
296
297struct ath11k_rekey_data {
298 u8 kck[NL80211_KCK_LEN];
299 u8 kek[NL80211_KCK_LEN];
300 u64 replay_ctr;
301 bool enable_offload;
302};
303
304struct ath11k_vif {
305 u32 vdev_id;
306 enum wmi_vdev_type vdev_type;
307 enum wmi_vdev_subtype vdev_subtype;
308 u32 beacon_interval;
309 u32 dtim_period;
310 u16 ast_hash;
311 u16 ast_idx;
312 u16 tcl_metadata;
313 u8 hal_addr_search_flags;
314 u8 search_type;
315
316 struct ath11k *ar;
317 struct ieee80211_vif *vif;
318
319 u16 tx_seq_no;
320 struct wmi_wmm_params_all_arg wmm_params;
321 struct list_head list;
322 union {
323 struct {
324 u32 uapsd;
325 } sta;
326 struct {
327 /* 127 stations; wmi limit */
328 u8 tim_bitmap[16];
329 u8 tim_len;
330 u32 ssid_len;
331 u8 ssid[IEEE80211_MAX_SSID_LEN];
332 bool hidden_ssid;
333 /* P2P_IE with NoA attribute for P2P_GO case */
334 u32 noa_len;
335 u8 *noa_data;
336 } ap;
337 } u;
338
339 bool is_started;
340 bool is_up;
341 bool spectral_enabled;
342 bool ps;
343 u32 aid;
344 u8 bssid[ETH_ALEN];
345 struct cfg80211_bitrate_mask bitrate_mask;
346 struct delayed_work connection_loss_work;
347 int num_legacy_stations;
348 int rtscts_prot_mode;
349 int txpower;
350 bool rsnie_present;
351 bool wpaie_present;
352 bool bcca_zero_sent;
353 bool do_not_send_tmpl;
354 struct ieee80211_chanctx_conf chanctx;
355 struct ath11k_arp_ns_offload arp_ns_offload;
356 struct ath11k_rekey_data rekey_data;
357
358#ifdef CONFIG_ATH11K_DEBUGFS
359 struct dentry *debugfs_twt;
360#endif /* CONFIG_ATH11K_DEBUGFS */
361};
362
363struct ath11k_vif_iter {
364 u32 vdev_id;
365 struct ath11k_vif *arvif;
366};
367
368struct ath11k_rx_peer_stats {
369 u64 num_msdu;
370 u64 num_mpdu_fcs_ok;
371 u64 num_mpdu_fcs_err;
372 u64 tcp_msdu_count;
373 u64 udp_msdu_count;
374 u64 other_msdu_count;
375 u64 ampdu_msdu_count;
376 u64 non_ampdu_msdu_count;
377 u64 stbc_count;
378 u64 beamformed_count;
379 u64 mcs_count[HAL_RX_MAX_MCS + 1];
380 u64 nss_count[HAL_RX_MAX_NSS];
381 u64 bw_count[HAL_RX_BW_MAX];
382 u64 gi_count[HAL_RX_GI_MAX];
383 u64 coding_count[HAL_RX_SU_MU_CODING_MAX];
384 u64 tid_count[IEEE80211_NUM_TIDS + 1];
385 u64 pream_cnt[HAL_RX_PREAMBLE_MAX];
386 u64 reception_type[HAL_RX_RECEPTION_TYPE_MAX];
387 u64 rx_duration;
388 u64 dcm_count;
389 u64 ru_alloc_cnt[HAL_RX_RU_ALLOC_TYPE_MAX];
390};
391
392#define ATH11K_HE_MCS_NUM 12
393#define ATH11K_VHT_MCS_NUM 10
394#define ATH11K_BW_NUM 4
395#define ATH11K_NSS_NUM 4
396#define ATH11K_LEGACY_NUM 12
397#define ATH11K_GI_NUM 4
398#define ATH11K_HT_MCS_NUM 32
399
400enum ath11k_pkt_rx_err {
401 ATH11K_PKT_RX_ERR_FCS,
402 ATH11K_PKT_RX_ERR_TKIP,
403 ATH11K_PKT_RX_ERR_CRYPT,
404 ATH11K_PKT_RX_ERR_PEER_IDX_INVAL,
405 ATH11K_PKT_RX_ERR_MAX,
406};
407
408enum ath11k_ampdu_subfrm_num {
409 ATH11K_AMPDU_SUBFRM_NUM_10,
410 ATH11K_AMPDU_SUBFRM_NUM_20,
411 ATH11K_AMPDU_SUBFRM_NUM_30,
412 ATH11K_AMPDU_SUBFRM_NUM_40,
413 ATH11K_AMPDU_SUBFRM_NUM_50,
414 ATH11K_AMPDU_SUBFRM_NUM_60,
415 ATH11K_AMPDU_SUBFRM_NUM_MORE,
416 ATH11K_AMPDU_SUBFRM_NUM_MAX,
417};
418
419enum ath11k_amsdu_subfrm_num {
420 ATH11K_AMSDU_SUBFRM_NUM_1,
421 ATH11K_AMSDU_SUBFRM_NUM_2,
422 ATH11K_AMSDU_SUBFRM_NUM_3,
423 ATH11K_AMSDU_SUBFRM_NUM_4,
424 ATH11K_AMSDU_SUBFRM_NUM_MORE,
425 ATH11K_AMSDU_SUBFRM_NUM_MAX,
426};
427
428enum ath11k_counter_type {
429 ATH11K_COUNTER_TYPE_BYTES,
430 ATH11K_COUNTER_TYPE_PKTS,
431 ATH11K_COUNTER_TYPE_MAX,
432};
433
434enum ath11k_stats_type {
435 ATH11K_STATS_TYPE_SUCC,
436 ATH11K_STATS_TYPE_FAIL,
437 ATH11K_STATS_TYPE_RETRY,
438 ATH11K_STATS_TYPE_AMPDU,
439 ATH11K_STATS_TYPE_MAX,
440};
441
442struct ath11k_htt_data_stats {
443 u64 legacy[ATH11K_COUNTER_TYPE_MAX][ATH11K_LEGACY_NUM];
444 u64 ht[ATH11K_COUNTER_TYPE_MAX][ATH11K_HT_MCS_NUM];
445 u64 vht[ATH11K_COUNTER_TYPE_MAX][ATH11K_VHT_MCS_NUM];
446 u64 he[ATH11K_COUNTER_TYPE_MAX][ATH11K_HE_MCS_NUM];
447 u64 bw[ATH11K_COUNTER_TYPE_MAX][ATH11K_BW_NUM];
448 u64 nss[ATH11K_COUNTER_TYPE_MAX][ATH11K_NSS_NUM];
449 u64 gi[ATH11K_COUNTER_TYPE_MAX][ATH11K_GI_NUM];
450};
451
452struct ath11k_htt_tx_stats {
453 struct ath11k_htt_data_stats stats[ATH11K_STATS_TYPE_MAX];
454 u64 tx_duration;
455 u64 ba_fails;
456 u64 ack_fails;
457};
458
459struct ath11k_per_ppdu_tx_stats {
460 u16 succ_pkts;
461 u16 failed_pkts;
462 u16 retry_pkts;
463 u32 succ_bytes;
464 u32 failed_bytes;
465 u32 retry_bytes;
466};
467
468DECLARE_EWMA(avg_rssi, 10, 8)
469
470struct ath11k_sta {
471 struct ath11k_vif *arvif;
472
473 /* the following are protected by ar->data_lock */
474 u32 changed; /* IEEE80211_RC_* */
475 u32 bw;
476 u32 nss;
477 u32 smps;
478 enum hal_pn_type pn_type;
479
480 struct work_struct update_wk;
481 struct work_struct set_4addr_wk;
482 struct rate_info txrate;
483 u32 peer_nss;
484 struct rate_info last_txrate;
485 u64 rx_duration;
486 u64 tx_duration;
487 u8 rssi_comb;
488 struct ewma_avg_rssi avg_rssi;
489 s8 rssi_beacon;
490 s8 chain_signal[IEEE80211_MAX_CHAINS];
491 struct ath11k_htt_tx_stats *tx_stats;
492 struct ath11k_rx_peer_stats *rx_stats;
493
494#ifdef CONFIG_MAC80211_DEBUGFS
495 /* protected by conf_mutex */
496 bool aggr_mode;
497#endif
498
499 bool use_4addr_set;
500 u16 tcl_metadata;
501
502 /* Protected with ar->data_lock */
503 enum ath11k_wmi_peer_ps_state peer_ps_state;
504 u64 ps_start_time;
505 u64 ps_start_jiffies;
506 u64 ps_total_duration;
507 bool peer_current_ps_valid;
508
509 u32 bw_prev;
510};
511
512#define ATH11K_MIN_5G_FREQ 4150
513#define ATH11K_MIN_6G_FREQ 5925
514#define ATH11K_MAX_6G_FREQ 7115
515#define ATH11K_NUM_CHANS 101
516#define ATH11K_MAX_5G_CHAN 173
517
518enum ath11k_state {
519 ATH11K_STATE_OFF,
520 ATH11K_STATE_ON,
521 ATH11K_STATE_RESTARTING,
522 ATH11K_STATE_RESTARTED,
523 ATH11K_STATE_WEDGED,
524 /* Add other states as required */
525};
526
527/* Antenna noise floor */
528#define ATH11K_DEFAULT_NOISE_FLOOR -95
529
530#define ATH11K_INVALID_RSSI_FULL -1
531
532#define ATH11K_INVALID_RSSI_EMPTY -128
533
534struct ath11k_fw_stats {
535 struct dentry *debugfs_fwstats;
536 u32 pdev_id;
537 u32 stats_id;
538 struct list_head pdevs;
539 struct list_head vdevs;
540 struct list_head bcn;
541};
542
543struct ath11k_dbg_htt_stats {
544 u8 type;
545 u8 reset;
546 struct debug_htt_stats_req *stats_req;
547 /* protects shared stats req buffer */
548 spinlock_t lock;
549};
550
551#define MAX_MODULE_ID_BITMAP_WORDS 16
552
553struct ath11k_debug {
554 struct dentry *debugfs_pdev;
555 struct ath11k_dbg_htt_stats htt_stats;
556 u32 extd_tx_stats;
557 u32 extd_rx_stats;
558 u32 pktlog_filter;
559 u32 pktlog_mode;
560 u32 pktlog_peer_valid;
561 u8 pktlog_peer_addr[ETH_ALEN];
562 u32 rx_filter;
563 u32 mem_offset;
564 u32 module_id_bitmap[MAX_MODULE_ID_BITMAP_WORDS];
565 struct ath11k_debug_dbr *dbr_debug[WMI_DIRECT_BUF_MAX];
566};
567
568struct ath11k_per_peer_tx_stats {
569 u32 succ_bytes;
570 u32 retry_bytes;
571 u32 failed_bytes;
572 u16 succ_pkts;
573 u16 retry_pkts;
574 u16 failed_pkts;
575 u32 duration;
576 u8 ba_fails;
577 bool is_ampdu;
578};
579
580#define ATH11K_FLUSH_TIMEOUT (5 * HZ)
581#define ATH11K_VDEV_DELETE_TIMEOUT_HZ (5 * HZ)
582
583struct ath11k {
584 struct ath11k_base *ab;
585 struct ath11k_pdev *pdev;
586 struct ieee80211_hw *hw;
587 struct ieee80211_ops *ops;
588 struct ath11k_pdev_wmi *wmi;
589 struct ath11k_pdev_dp dp;
590 u8 mac_addr[ETH_ALEN];
591 struct ath11k_he ar_he;
592 enum ath11k_state state;
593 bool supports_6ghz;
594 struct {
595 struct completion started;
596 struct completion completed;
597 struct completion on_channel;
598 struct delayed_work timeout;
599 enum ath11k_scan_state state;
600 bool is_roc;
601 int vdev_id;
602 int roc_freq;
603 bool roc_notify;
604 } scan;
605
606 struct {
607 struct ieee80211_supported_band sbands[NUM_NL80211_BANDS];
608 struct ieee80211_sband_iftype_data
609 iftype[NUM_NL80211_BANDS][NUM_NL80211_IFTYPES];
610 } mac;
611
612 unsigned long dev_flags;
613 unsigned int filter_flags;
614 unsigned long monitor_flags;
615 u32 min_tx_power;
616 u32 max_tx_power;
617 u32 txpower_limit_2g;
618 u32 txpower_limit_5g;
619 u32 txpower_scale;
620 u32 power_scale;
621 u32 chan_tx_pwr;
622 u32 num_stations;
623 u32 max_num_stations;
624 /* To synchronize concurrent synchronous mac80211 callback operations,
625 * concurrent debugfs configuration and concurrent FW statistics events.
626 */
627 struct mutex conf_mutex;
628 /* protects the radio specific data like debug stats, ppdu_stats_info stats,
629 * vdev_stop_status info, scan data, ath11k_sta info, ath11k_vif info,
630 * channel context data, survey info, test mode data.
631 */
632 spinlock_t data_lock;
633
634 struct list_head arvifs;
635 /* should never be NULL; needed for regular htt rx */
636 struct ieee80211_channel *rx_channel;
637
638 /* valid during scan; needed for mgmt rx during scan */
639 struct ieee80211_channel *scan_channel;
640
641 u8 cfg_tx_chainmask;
642 u8 cfg_rx_chainmask;
643 u8 num_rx_chains;
644 u8 num_tx_chains;
645 /* pdev_idx starts from 0 whereas pdev->pdev_id starts with 1 */
646 u8 pdev_idx;
647 u8 lmac_id;
648
649 struct completion peer_assoc_done;
650 struct completion peer_delete_done;
651
652 int install_key_status;
653 struct completion install_key_done;
654
655 int last_wmi_vdev_start_status;
656 struct completion vdev_setup_done;
657 struct completion vdev_delete_done;
658
659 int num_peers;
660 int max_num_peers;
661 u32 num_started_vdevs;
662 u32 num_created_vdevs;
663 unsigned long long allocated_vdev_map;
664
665 struct idr txmgmt_idr;
666 /* protects txmgmt_idr data */
667 spinlock_t txmgmt_idr_lock;
668 atomic_t num_pending_mgmt_tx;
669 wait_queue_head_t txmgmt_empty_waitq;
670
671 /* cycle count is reported twice for each visited channel during scan.
672 * access protected by data_lock
673 */
674 u32 survey_last_rx_clear_count;
675 u32 survey_last_cycle_count;
676
677 /* Channel info events are expected to come in pairs without and with
678 * COMPLETE flag set respectively for each channel visit during scan.
679 *
680 * However there are deviations from this rule. This flag is used to
681 * avoid reporting garbage data.
682 */
683 bool ch_info_can_report_survey;
684 struct survey_info survey[ATH11K_NUM_CHANS];
685 struct completion bss_survey_done;
686
687 struct work_struct regd_update_work;
688
689 struct work_struct wmi_mgmt_tx_work;
690 struct sk_buff_head wmi_mgmt_tx_queue;
691
692 struct ath11k_wow wow;
693 struct completion target_suspend;
694 bool target_suspend_ack;
695 struct ath11k_per_peer_tx_stats peer_tx_stats;
696 struct list_head ppdu_stats_info;
697 u32 ppdu_stat_list_depth;
698
699 struct ath11k_per_peer_tx_stats cached_stats;
700 u32 last_ppdu_id;
701 u32 cached_ppdu_id;
702 int monitor_vdev_id;
703#ifdef CONFIG_ATH11K_DEBUGFS
704 struct ath11k_debug debug;
705#endif
706#ifdef CONFIG_ATH11K_SPECTRAL
707 struct ath11k_spectral spectral;
708#endif
709 bool dfs_block_radar_events;
710 struct ath11k_thermal thermal;
711 u32 vdev_id_11d_scan;
712 struct completion completed_11d_scan;
713 enum ath11k_11d_state state_11d;
714 bool regdom_set_by_user;
715 int hw_rate_code;
716 u8 twt_enabled;
717 bool nlo_enabled;
718 u8 alpha2[REG_ALPHA2_LEN + 1];
719 struct ath11k_fw_stats fw_stats;
720 struct completion fw_stats_complete;
721 bool fw_stats_done;
722
723 /* protected by conf_mutex */
724 bool ps_state_enable;
725 bool ps_timekeeper_enable;
726};
727
728struct ath11k_band_cap {
729 u32 phy_id;
730 u32 max_bw_supported;
731 u32 ht_cap_info;
732 u32 he_cap_info[2];
733 u32 he_mcs;
734 u32 he_cap_phy_info[PSOC_HOST_MAX_PHY_SIZE];
735 struct ath11k_ppe_threshold he_ppet;
736 u16 he_6ghz_capa;
737};
738
739struct ath11k_pdev_cap {
740 u32 supported_bands;
741 u32 ampdu_density;
742 u32 vht_cap;
743 u32 vht_mcs;
744 u32 he_mcs;
745 u32 tx_chain_mask;
746 u32 rx_chain_mask;
747 u32 tx_chain_mask_shift;
748 u32 rx_chain_mask_shift;
749 struct ath11k_band_cap band[NUM_NL80211_BANDS];
750 bool nss_ratio_enabled;
751 u8 nss_ratio_info;
752};
753
754struct ath11k_pdev {
755 struct ath11k *ar;
756 u32 pdev_id;
757 struct ath11k_pdev_cap cap;
758 u8 mac_addr[ETH_ALEN];
759};
760
761struct ath11k_board_data {
762 const struct firmware *fw;
763 const void *data;
764 size_t len;
765};
766
767struct ath11k_pci_ops {
768 int (*wakeup)(struct ath11k_base *ab);
769 void (*release)(struct ath11k_base *ab);
770 int (*get_msi_irq)(struct ath11k_base *ab, unsigned int vector);
771 void (*window_write32)(struct ath11k_base *ab, u32 offset, u32 value);
772 u32 (*window_read32)(struct ath11k_base *ab, u32 offset);
773};
774
775/* IPQ8074 HW channel counters frequency value in hertz */
776#define IPQ8074_CC_FREQ_HERTZ 320000
777
778struct ath11k_bp_stats {
779 /* Head Pointer reported by the last HTT Backpressure event for the ring */
780 u16 hp;
781
782 /* Tail Pointer reported by the last HTT Backpressure event for the ring */
783 u16 tp;
784
785 /* Number of Backpressure events received for the ring */
786 u32 count;
787
788 /* Last recorded event timestamp */
789 unsigned long jiffies;
790};
791
792struct ath11k_dp_ring_bp_stats {
793 struct ath11k_bp_stats umac_ring_bp_stats[HTT_SW_UMAC_RING_IDX_MAX];
794 struct ath11k_bp_stats lmac_ring_bp_stats[HTT_SW_LMAC_RING_IDX_MAX][MAX_RADIOS];
795};
796
797struct ath11k_soc_dp_tx_err_stats {
798 /* TCL Ring Descriptor unavailable */
799 u32 desc_na[DP_TCL_NUM_RING_MAX];
800 /* Other failures during dp_tx due to mem allocation failure
801 * idr unavailable etc.
802 */
803 atomic_t misc_fail;
804};
805
806struct ath11k_soc_dp_stats {
807 u32 err_ring_pkts;
808 u32 invalid_rbm;
809 u32 rxdma_error[HAL_REO_ENTR_RING_RXDMA_ECODE_MAX];
810 u32 reo_error[HAL_REO_DEST_RING_ERROR_CODE_MAX];
811 u32 hal_reo_error[DP_REO_DST_RING_MAX];
812 struct ath11k_soc_dp_tx_err_stats tx_err;
813 struct ath11k_dp_ring_bp_stats bp_stats;
814};
815
816struct ath11k_msi_user {
817 char *name;
818 int num_vectors;
819 u32 base_vector;
820};
821
822struct ath11k_msi_config {
823 int total_vectors;
824 int total_users;
825 struct ath11k_msi_user *users;
826 u16 hw_rev;
827};
828
829/* Master structure to hold the hw data which may be used in core module */
830struct ath11k_base {
831 enum ath11k_hw_rev hw_rev;
832 struct platform_device *pdev;
833 struct device *dev;
834 struct ath11k_qmi qmi;
835 struct ath11k_wmi_base wmi_ab;
836 struct completion fw_ready;
837 int num_radios;
838 /* HW channel counters frequency value in hertz common to all MACs */
839 u32 cc_freq_hz;
840
841 struct ath11k_htc htc;
842
843 struct ath11k_dp dp;
844
845 void __iomem *mem;
846 unsigned long mem_len;
847
848 struct {
849 enum ath11k_bus bus;
850 const struct ath11k_hif_ops *ops;
851 } hif;
852
853 struct {
854 struct completion wakeup_completed;
855 } wow;
856
857 struct ath11k_ce ce;
858 struct timer_list rx_replenish_retry;
859 struct ath11k_hal hal;
860 /* To synchronize core_start/core_stop */
861 struct mutex core_lock;
862 /* Protects data like peers */
863 spinlock_t base_lock;
864 struct ath11k_pdev pdevs[MAX_RADIOS];
865 struct {
866 enum WMI_HOST_WLAN_BAND supported_bands;
867 u32 pdev_id;
868 } target_pdev_ids[MAX_RADIOS];
869 u8 target_pdev_count;
870 struct ath11k_pdev __rcu *pdevs_active[MAX_RADIOS];
871 struct ath11k_hal_reg_capabilities_ext hal_reg_cap[MAX_RADIOS];
872 unsigned long long free_vdev_map;
873
874 /* To synchronize rhash tbl write operation */
875 struct mutex tbl_mtx_lock;
876
877 /* The rhashtable containing struct ath11k_peer keyed by mac addr */
878 struct rhashtable *rhead_peer_addr;
879 struct rhashtable_params rhash_peer_addr_param;
880
881 /* The rhashtable containing struct ath11k_peer keyed by id */
882 struct rhashtable *rhead_peer_id;
883 struct rhashtable_params rhash_peer_id_param;
884
885 struct list_head peers;
886 wait_queue_head_t peer_mapping_wq;
887 u8 mac_addr[ETH_ALEN];
888 bool wmi_ready;
889 u32 wlan_init_status;
890 int irq_num[ATH11K_IRQ_NUM_MAX];
891 struct ath11k_ext_irq_grp ext_irq_grp[ATH11K_EXT_IRQ_GRP_NUM_MAX];
892 struct ath11k_targ_cap target_caps;
893 u32 ext_service_bitmap[WMI_SERVICE_EXT_BM_SIZE];
894 bool pdevs_macaddr_valid;
895 int bd_api;
896
897 struct ath11k_hw_params hw_params;
898
899 const struct firmware *cal_file;
900
901 /* Below regd's are protected by ab->data_lock */
902 /* This is the regd set for every radio
903 * by the firmware during initialization
904 */
905 struct ieee80211_regdomain *default_regd[MAX_RADIOS];
906 /* This regd is set during dynamic country setting
907 * This may or may not be used during the runtime
908 */
909 struct ieee80211_regdomain *new_regd[MAX_RADIOS];
910
911 /* Current DFS Regulatory */
912 enum ath11k_dfs_region dfs_region;
913#ifdef CONFIG_ATH11K_DEBUGFS
914 struct dentry *debugfs_soc;
915 struct dentry *debugfs_ath11k;
916#endif
917 struct ath11k_soc_dp_stats soc_stats;
918
919 unsigned long dev_flags;
920 struct completion driver_recovery;
921 struct workqueue_struct *workqueue;
922 struct work_struct restart_work;
923 struct work_struct update_11d_work;
924 u8 new_alpha2[3];
925 struct workqueue_struct *workqueue_aux;
926 struct work_struct reset_work;
927 atomic_t reset_count;
928 atomic_t recovery_count;
929 atomic_t recovery_start_count;
930 bool is_reset;
931 struct completion reset_complete;
932 struct completion reconfigure_complete;
933 struct completion recovery_start;
934 /* continuous recovery fail count */
935 atomic_t fail_cont_count;
936 unsigned long reset_fail_timeout;
937 struct {
938 /* protected by data_lock */
939 u32 fw_crash_counter;
940 } stats;
941 u32 pktlog_defs_checksum;
942
943 struct ath11k_dbring_cap *db_caps;
944 u32 num_db_cap;
945
946 /* To synchronize 11d scan vdev id */
947 struct mutex vdev_id_11d_lock;
948 struct timer_list mon_reap_timer;
949
950 struct completion htc_suspend;
951
952 struct {
953 enum ath11k_bdf_search bdf_search;
954 u32 vendor;
955 u32 device;
956 u32 subsystem_vendor;
957 u32 subsystem_device;
958 } id;
959
960 struct {
961 struct {
962 const struct ath11k_msi_config *config;
963 u32 ep_base_data;
964 u32 irqs[32];
965 u32 addr_lo;
966 u32 addr_hi;
967 } msi;
968
969 const struct ath11k_pci_ops *ops;
970 } pci;
971
972 /* must be last */
973 u8 drv_priv[] __aligned(sizeof(void *));
974};
975
976struct ath11k_fw_stats_pdev {
977 struct list_head list;
978
979 /* PDEV stats */
980 s32 ch_noise_floor;
981 /* Cycles spent transmitting frames */
982 u32 tx_frame_count;
983 /* Cycles spent receiving frames */
984 u32 rx_frame_count;
985 /* Total channel busy time, evidently */
986 u32 rx_clear_count;
987 /* Total on-channel time */
988 u32 cycle_count;
989 u32 phy_err_count;
990 u32 chan_tx_power;
991 u32 ack_rx_bad;
992 u32 rts_bad;
993 u32 rts_good;
994 u32 fcs_bad;
995 u32 no_beacons;
996 u32 mib_int_count;
997
998 /* PDEV TX stats */
999 /* Num HTT cookies queued to dispatch list */
1000 s32 comp_queued;
1001 /* Num HTT cookies dispatched */
1002 s32 comp_delivered;
1003 /* Num MSDU queued to WAL */
1004 s32 msdu_enqued;
1005 /* Num MPDU queue to WAL */
1006 s32 mpdu_enqued;
1007 /* Num MSDUs dropped by WMM limit */
1008 s32 wmm_drop;
1009 /* Num Local frames queued */
1010 s32 local_enqued;
1011 /* Num Local frames done */
1012 s32 local_freed;
1013 /* Num queued to HW */
1014 s32 hw_queued;
1015 /* Num PPDU reaped from HW */
1016 s32 hw_reaped;
1017 /* Num underruns */
1018 s32 underrun;
1019 /* Num hw paused */
1020 u32 hw_paused;
1021 /* Num PPDUs cleaned up in TX abort */
1022 s32 tx_abort;
1023 /* Num MPDUs requeued by SW */
1024 s32 mpdus_requeued;
1025 /* excessive retries */
1026 u32 tx_ko;
1027 u32 tx_xretry;
1028 /* data hw rate code */
1029 u32 data_rc;
1030 /* Scheduler self triggers */
1031 u32 self_triggers;
1032 /* frames dropped due to excessive sw retries */
1033 u32 sw_retry_failure;
1034 /* illegal rate phy errors */
1035 u32 illgl_rate_phy_err;
1036 /* wal pdev continuous xretry */
1037 u32 pdev_cont_xretry;
1038 /* wal pdev tx timeouts */
1039 u32 pdev_tx_timeout;
1040 /* wal pdev resets */
1041 u32 pdev_resets;
1042 /* frames dropped due to non-availability of stateless TIDs */
1043 u32 stateless_tid_alloc_failure;
1044 /* PhY/BB underrun */
1045 u32 phy_underrun;
1046 /* MPDU is more than txop limit */
1047 u32 txop_ovf;
1048 /* Num sequences posted */
1049 u32 seq_posted;
1050 /* Num sequences failed in queueing */
1051 u32 seq_failed_queueing;
1052 /* Num sequences completed */
1053 u32 seq_completed;
1054 /* Num sequences restarted */
1055 u32 seq_restarted;
1056 /* Num of MU sequences posted */
1057 u32 mu_seq_posted;
1058 /* Num MPDUs flushed by SW, HWPAUSED, SW TXABORT
1059 * (Reset,channel change)
1060 */
1061 s32 mpdus_sw_flush;
1062 /* Num MPDUs filtered by HW, all filter condition (TTL expired) */
1063 s32 mpdus_hw_filter;
1064 /* Num MPDUs truncated by PDG (TXOP, TBTT,
1065 * PPDU_duration based on rate, dyn_bw)
1066 */
1067 s32 mpdus_truncated;
1068 /* Num MPDUs that was tried but didn't receive ACK or BA */
1069 s32 mpdus_ack_failed;
1070 /* Num MPDUs that was dropped du to expiry. */
1071 s32 mpdus_expired;
1072
1073 /* PDEV RX stats */
1074 /* Cnts any change in ring routing mid-ppdu */
1075 s32 mid_ppdu_route_change;
1076 /* Total number of statuses processed */
1077 s32 status_rcvd;
1078 /* Extra frags on rings 0-3 */
1079 s32 r0_frags;
1080 s32 r1_frags;
1081 s32 r2_frags;
1082 s32 r3_frags;
1083 /* MSDUs / MPDUs delivered to HTT */
1084 s32 htt_msdus;
1085 s32 htt_mpdus;
1086 /* MSDUs / MPDUs delivered to local stack */
1087 s32 loc_msdus;
1088 s32 loc_mpdus;
1089 /* AMSDUs that have more MSDUs than the status ring size */
1090 s32 oversize_amsdu;
1091 /* Number of PHY errors */
1092 s32 phy_errs;
1093 /* Number of PHY errors drops */
1094 s32 phy_err_drop;
1095 /* Number of mpdu errors - FCS, MIC, ENC etc. */
1096 s32 mpdu_errs;
1097 /* Num overflow errors */
1098 s32 rx_ovfl_errs;
1099};
1100
1101struct ath11k_fw_stats_vdev {
1102 struct list_head list;
1103
1104 u32 vdev_id;
1105 u32 beacon_snr;
1106 u32 data_snr;
1107 u32 num_tx_frames[WLAN_MAX_AC];
1108 u32 num_rx_frames;
1109 u32 num_tx_frames_retries[WLAN_MAX_AC];
1110 u32 num_tx_frames_failures[WLAN_MAX_AC];
1111 u32 num_rts_fail;
1112 u32 num_rts_success;
1113 u32 num_rx_err;
1114 u32 num_rx_discard;
1115 u32 num_tx_not_acked;
1116 u32 tx_rate_history[MAX_TX_RATE_VALUES];
1117 u32 beacon_rssi_history[MAX_TX_RATE_VALUES];
1118};
1119
1120struct ath11k_fw_stats_bcn {
1121 struct list_head list;
1122
1123 u32 vdev_id;
1124 u32 tx_bcn_succ_cnt;
1125 u32 tx_bcn_outage_cnt;
1126};
1127
1128void ath11k_fw_stats_init(struct ath11k *ar);
1129void ath11k_fw_stats_pdevs_free(struct list_head *head);
1130void ath11k_fw_stats_vdevs_free(struct list_head *head);
1131void ath11k_fw_stats_bcn_free(struct list_head *head);
1132void ath11k_fw_stats_free(struct ath11k_fw_stats *stats);
1133
1134extern const struct ce_pipe_config ath11k_target_ce_config_wlan_ipq8074[];
1135extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq8074[];
1136extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_ipq6018[];
1137
1138extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qca6390[];
1139extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qca6390[];
1140
1141extern const struct ce_pipe_config ath11k_target_ce_config_wlan_qcn9074[];
1142extern const struct service_to_pipe ath11k_target_service_to_ce_map_wlan_qcn9074[];
1143int ath11k_core_qmi_firmware_ready(struct ath11k_base *ab);
1144int ath11k_core_pre_init(struct ath11k_base *ab);
1145int ath11k_core_init(struct ath11k_base *ath11k);
1146void ath11k_core_deinit(struct ath11k_base *ath11k);
1147struct ath11k_base *ath11k_core_alloc(struct device *dev, size_t priv_size,
1148 enum ath11k_bus bus);
1149void ath11k_core_free(struct ath11k_base *ath11k);
1150int ath11k_core_fetch_bdf(struct ath11k_base *ath11k,
1151 struct ath11k_board_data *bd);
1152int ath11k_core_fetch_regdb(struct ath11k_base *ab, struct ath11k_board_data *bd);
1153int ath11k_core_fetch_board_data_api_1(struct ath11k_base *ab,
1154 struct ath11k_board_data *bd,
1155 const char *name);
1156void ath11k_core_free_bdf(struct ath11k_base *ab, struct ath11k_board_data *bd);
1157int ath11k_core_check_dt(struct ath11k_base *ath11k);
1158int ath11k_core_check_smbios(struct ath11k_base *ab);
1159void ath11k_core_halt(struct ath11k *ar);
1160int ath11k_core_resume(struct ath11k_base *ab);
1161int ath11k_core_suspend(struct ath11k_base *ab);
1162void ath11k_core_pre_reconfigure_recovery(struct ath11k_base *ab);
1163
1164const struct firmware *ath11k_core_firmware_request(struct ath11k_base *ab,
1165 const char *filename);
1166
1167static inline const char *ath11k_scan_state_str(enum ath11k_scan_state state)
1168{
1169 switch (state) {
1170 case ATH11K_SCAN_IDLE:
1171 return "idle";
1172 case ATH11K_SCAN_STARTING:
1173 return "starting";
1174 case ATH11K_SCAN_RUNNING:
1175 return "running";
1176 case ATH11K_SCAN_ABORTING:
1177 return "aborting";
1178 }
1179
1180 return "unknown";
1181}
1182
1183static inline struct ath11k_skb_cb *ATH11K_SKB_CB(struct sk_buff *skb)
1184{
1185 BUILD_BUG_ON(sizeof(struct ath11k_skb_cb) >
1186 IEEE80211_TX_INFO_DRIVER_DATA_SIZE);
1187 return (struct ath11k_skb_cb *)&IEEE80211_SKB_CB(skb)->driver_data;
1188}
1189
1190static inline struct ath11k_skb_rxcb *ATH11K_SKB_RXCB(struct sk_buff *skb)
1191{
1192 BUILD_BUG_ON(sizeof(struct ath11k_skb_rxcb) > sizeof(skb->cb));
1193 return (struct ath11k_skb_rxcb *)skb->cb;
1194}
1195
1196static inline struct ath11k_vif *ath11k_vif_to_arvif(struct ieee80211_vif *vif)
1197{
1198 return (struct ath11k_vif *)vif->drv_priv;
1199}
1200
1201static inline struct ath11k *ath11k_ab_to_ar(struct ath11k_base *ab,
1202 int mac_id)
1203{
1204 return ab->pdevs[ath11k_hw_mac_id_to_pdev_id(&ab->hw_params, mac_id)].ar;
1205}
1206
1207static inline void ath11k_core_create_firmware_path(struct ath11k_base *ab,
1208 const char *filename,
1209 void *buf, size_t buf_len)
1210{
1211 snprintf(buf, buf_len, "%s/%s/%s", ATH11K_FW_DIR,
1212 ab->hw_params.fw.dir, filename);
1213}
1214
1215static inline const char *ath11k_bus_str(enum ath11k_bus bus)
1216{
1217 switch (bus) {
1218 case ATH11K_BUS_PCI:
1219 return "pci";
1220 case ATH11K_BUS_AHB:
1221 return "ahb";
1222 }
1223
1224 return "unknown";
1225}
1226
1227#endif /* _CORE_H_ */