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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel & MS High Precision Event Timer Implementation.
4 *
5 * Copyright (C) 2003 Intel Corporation
6 * Venki Pallipadi
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
9 */
10
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/miscdevice.h>
15#include <linux/major.h>
16#include <linux/ioport.h>
17#include <linux/fcntl.h>
18#include <linux/init.h>
19#include <linux/io-64-nonatomic-lo-hi.h>
20#include <linux/poll.h>
21#include <linux/mm.h>
22#include <linux/proc_fs.h>
23#include <linux/spinlock.h>
24#include <linux/sysctl.h>
25#include <linux/wait.h>
26#include <linux/sched/signal.h>
27#include <linux/bcd.h>
28#include <linux/seq_file.h>
29#include <linux/bitops.h>
30#include <linux/compat.h>
31#include <linux/clocksource.h>
32#include <linux/uaccess.h>
33#include <linux/slab.h>
34#include <linux/io.h>
35#include <linux/acpi.h>
36#include <linux/hpet.h>
37#include <asm/current.h>
38#include <asm/irq.h>
39#include <asm/div64.h>
40
41/*
42 * The High Precision Event Timer driver.
43 * This driver is closely modelled after the rtc.c driver.
44 * See HPET spec revision 1.
45 */
46#define HPET_USER_FREQ (64)
47#define HPET_DRIFT (500)
48
49#define HPET_RANGE_SIZE 1024 /* from HPET spec */
50
51
52/* WARNING -- don't get confused. These macros are never used
53 * to write the (single) counter, and rarely to read it.
54 * They're badly named; to fix, someday.
55 */
56#if BITS_PER_LONG == 64
57#define write_counter(V, MC) writeq(V, MC)
58#define read_counter(MC) readq(MC)
59#else
60#define write_counter(V, MC) writel(V, MC)
61#define read_counter(MC) readl(MC)
62#endif
63
64static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
65static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
66
67/* A lock for concurrent access by app and isr hpet activity. */
68static DEFINE_SPINLOCK(hpet_lock);
69
70#define HPET_DEV_NAME (7)
71
72struct hpet_dev {
73 struct hpets *hd_hpets;
74 struct hpet __iomem *hd_hpet;
75 struct hpet_timer __iomem *hd_timer;
76 unsigned long hd_ireqfreq;
77 unsigned long hd_irqdata;
78 wait_queue_head_t hd_waitqueue;
79 struct fasync_struct *hd_async_queue;
80 unsigned int hd_flags;
81 unsigned int hd_irq;
82 unsigned int hd_hdwirq;
83 char hd_name[HPET_DEV_NAME];
84};
85
86struct hpets {
87 struct hpets *hp_next;
88 struct hpet __iomem *hp_hpet;
89 unsigned long hp_hpet_phys;
90 struct clocksource *hp_clocksource;
91 unsigned long long hp_tick_freq;
92 unsigned long hp_delta;
93 unsigned int hp_ntimer;
94 unsigned int hp_which;
95 struct hpet_dev hp_dev[] __counted_by(hp_ntimer);
96};
97
98static struct hpets *hpets;
99
100#define HPET_OPEN 0x0001
101#define HPET_IE 0x0002 /* interrupt enabled */
102#define HPET_PERIODIC 0x0004
103#define HPET_SHARED_IRQ 0x0008
104
105static irqreturn_t hpet_interrupt(int irq, void *data)
106{
107 struct hpet_dev *devp;
108 unsigned long isr;
109
110 devp = data;
111 isr = 1 << (devp - devp->hd_hpets->hp_dev);
112
113 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
114 !(isr & readl(&devp->hd_hpet->hpet_isr)))
115 return IRQ_NONE;
116
117 spin_lock(&hpet_lock);
118 devp->hd_irqdata++;
119
120 /*
121 * For non-periodic timers, increment the accumulator.
122 * This has the effect of treating non-periodic like periodic.
123 */
124 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
125 unsigned long t, mc, base, k;
126 struct hpet __iomem *hpet = devp->hd_hpet;
127 struct hpets *hpetp = devp->hd_hpets;
128
129 t = devp->hd_ireqfreq;
130 read_counter(&devp->hd_timer->hpet_compare);
131 mc = read_counter(&hpet->hpet_mc);
132 /* The time for the next interrupt would logically be t + m,
133 * however, if we are very unlucky and the interrupt is delayed
134 * for longer than t then we will completely miss the next
135 * interrupt if we set t + m and an application will hang.
136 * Therefore we need to make a more complex computation assuming
137 * that there exists a k for which the following is true:
138 * k * t + base < mc + delta
139 * (k + 1) * t + base > mc + delta
140 * where t is the interval in hpet ticks for the given freq,
141 * base is the theoretical start value 0 < base < t,
142 * mc is the main counter value at the time of the interrupt,
143 * delta is the time it takes to write the a value to the
144 * comparator.
145 * k may then be computed as (mc - base + delta) / t .
146 */
147 base = mc % t;
148 k = (mc - base + hpetp->hp_delta) / t;
149 write_counter(t * (k + 1) + base,
150 &devp->hd_timer->hpet_compare);
151 }
152
153 if (devp->hd_flags & HPET_SHARED_IRQ)
154 writel(isr, &devp->hd_hpet->hpet_isr);
155 spin_unlock(&hpet_lock);
156
157 wake_up_interruptible(&devp->hd_waitqueue);
158
159 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
160
161 return IRQ_HANDLED;
162}
163
164static void hpet_timer_set_irq(struct hpet_dev *devp)
165{
166 unsigned long v;
167 int irq, gsi;
168 struct hpet_timer __iomem *timer;
169
170 spin_lock_irq(&hpet_lock);
171 if (devp->hd_hdwirq) {
172 spin_unlock_irq(&hpet_lock);
173 return;
174 }
175
176 timer = devp->hd_timer;
177
178 /* we prefer level triggered mode */
179 v = readl(&timer->hpet_config);
180 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
181 v |= Tn_INT_TYPE_CNF_MASK;
182 writel(v, &timer->hpet_config);
183 }
184 spin_unlock_irq(&hpet_lock);
185
186 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
187 Tn_INT_ROUTE_CAP_SHIFT;
188
189 /*
190 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
191 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
192 */
193 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
194 v &= ~0xf3df;
195 else
196 v &= ~0xffff;
197
198 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
199 if (irq >= nr_irqs) {
200 irq = HPET_MAX_IRQ;
201 break;
202 }
203
204 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
205 ACPI_ACTIVE_LOW);
206 if (gsi > 0)
207 break;
208
209 /* FIXME: Setup interrupt source table */
210 }
211
212 if (irq < HPET_MAX_IRQ) {
213 spin_lock_irq(&hpet_lock);
214 v = readl(&timer->hpet_config);
215 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
216 writel(v, &timer->hpet_config);
217 devp->hd_hdwirq = gsi;
218 spin_unlock_irq(&hpet_lock);
219 }
220 return;
221}
222
223static int hpet_open(struct inode *inode, struct file *file)
224{
225 struct hpet_dev *devp;
226 struct hpets *hpetp;
227 int i;
228
229 if (file->f_mode & FMODE_WRITE)
230 return -EINVAL;
231
232 mutex_lock(&hpet_mutex);
233 spin_lock_irq(&hpet_lock);
234
235 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
236 for (i = 0; i < hpetp->hp_ntimer; i++)
237 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
238 continue;
239 } else {
240 devp = &hpetp->hp_dev[i];
241 break;
242 }
243
244 if (!devp) {
245 spin_unlock_irq(&hpet_lock);
246 mutex_unlock(&hpet_mutex);
247 return -EBUSY;
248 }
249
250 file->private_data = devp;
251 devp->hd_irqdata = 0;
252 devp->hd_flags |= HPET_OPEN;
253 spin_unlock_irq(&hpet_lock);
254 mutex_unlock(&hpet_mutex);
255
256 hpet_timer_set_irq(devp);
257
258 return 0;
259}
260
261static ssize_t
262hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
263{
264 DECLARE_WAITQUEUE(wait, current);
265 unsigned long data;
266 ssize_t retval;
267 struct hpet_dev *devp;
268
269 devp = file->private_data;
270 if (!devp->hd_ireqfreq)
271 return -EIO;
272
273 if (count < sizeof(unsigned long))
274 return -EINVAL;
275
276 add_wait_queue(&devp->hd_waitqueue, &wait);
277
278 for ( ; ; ) {
279 set_current_state(TASK_INTERRUPTIBLE);
280
281 spin_lock_irq(&hpet_lock);
282 data = devp->hd_irqdata;
283 devp->hd_irqdata = 0;
284 spin_unlock_irq(&hpet_lock);
285
286 if (data) {
287 break;
288 } else if (file->f_flags & O_NONBLOCK) {
289 retval = -EAGAIN;
290 goto out;
291 } else if (signal_pending(current)) {
292 retval = -ERESTARTSYS;
293 goto out;
294 }
295 schedule();
296 }
297
298 retval = put_user(data, (unsigned long __user *)buf);
299 if (!retval)
300 retval = sizeof(unsigned long);
301out:
302 __set_current_state(TASK_RUNNING);
303 remove_wait_queue(&devp->hd_waitqueue, &wait);
304
305 return retval;
306}
307
308static __poll_t hpet_poll(struct file *file, poll_table * wait)
309{
310 unsigned long v;
311 struct hpet_dev *devp;
312
313 devp = file->private_data;
314
315 if (!devp->hd_ireqfreq)
316 return 0;
317
318 poll_wait(file, &devp->hd_waitqueue, wait);
319
320 spin_lock_irq(&hpet_lock);
321 v = devp->hd_irqdata;
322 spin_unlock_irq(&hpet_lock);
323
324 if (v != 0)
325 return EPOLLIN | EPOLLRDNORM;
326
327 return 0;
328}
329
330#ifdef CONFIG_HPET_MMAP
331#ifdef CONFIG_HPET_MMAP_DEFAULT
332static int hpet_mmap_enabled = 1;
333#else
334static int hpet_mmap_enabled = 0;
335#endif
336
337static __init int hpet_mmap_enable(char *str)
338{
339 get_option(&str, &hpet_mmap_enabled);
340 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
341 return 1;
342}
343__setup("hpet_mmap=", hpet_mmap_enable);
344
345static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
346{
347 struct hpet_dev *devp;
348 unsigned long addr;
349
350 if (!hpet_mmap_enabled)
351 return -EACCES;
352
353 devp = file->private_data;
354 addr = devp->hd_hpets->hp_hpet_phys;
355
356 if (addr & (PAGE_SIZE - 1))
357 return -ENOSYS;
358
359 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
360 return vm_iomap_memory(vma, addr, PAGE_SIZE);
361}
362#else
363static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
364{
365 return -ENOSYS;
366}
367#endif
368
369static int hpet_fasync(int fd, struct file *file, int on)
370{
371 struct hpet_dev *devp;
372
373 devp = file->private_data;
374
375 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
376 return 0;
377 else
378 return -EIO;
379}
380
381static int hpet_release(struct inode *inode, struct file *file)
382{
383 struct hpet_dev *devp;
384 struct hpet_timer __iomem *timer;
385 int irq = 0;
386
387 devp = file->private_data;
388 timer = devp->hd_timer;
389
390 spin_lock_irq(&hpet_lock);
391
392 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
393 &timer->hpet_config);
394
395 irq = devp->hd_irq;
396 devp->hd_irq = 0;
397
398 devp->hd_ireqfreq = 0;
399
400 if (devp->hd_flags & HPET_PERIODIC
401 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
402 unsigned long v;
403
404 v = readq(&timer->hpet_config);
405 v ^= Tn_TYPE_CNF_MASK;
406 writeq(v, &timer->hpet_config);
407 }
408
409 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
410 spin_unlock_irq(&hpet_lock);
411
412 if (irq)
413 free_irq(irq, devp);
414
415 file->private_data = NULL;
416 return 0;
417}
418
419static int hpet_ioctl_ieon(struct hpet_dev *devp)
420{
421 struct hpet_timer __iomem *timer;
422 struct hpet __iomem *hpet;
423 struct hpets *hpetp;
424 int irq;
425 unsigned long g, v, t, m;
426 unsigned long flags, isr;
427
428 timer = devp->hd_timer;
429 hpet = devp->hd_hpet;
430 hpetp = devp->hd_hpets;
431
432 if (!devp->hd_ireqfreq)
433 return -EIO;
434
435 spin_lock_irq(&hpet_lock);
436
437 if (devp->hd_flags & HPET_IE) {
438 spin_unlock_irq(&hpet_lock);
439 return -EBUSY;
440 }
441
442 devp->hd_flags |= HPET_IE;
443
444 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
445 devp->hd_flags |= HPET_SHARED_IRQ;
446 spin_unlock_irq(&hpet_lock);
447
448 irq = devp->hd_hdwirq;
449
450 if (irq) {
451 unsigned long irq_flags;
452
453 if (devp->hd_flags & HPET_SHARED_IRQ) {
454 /*
455 * To prevent the interrupt handler from seeing an
456 * unwanted interrupt status bit, program the timer
457 * so that it will not fire in the near future ...
458 */
459 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
460 &timer->hpet_config);
461 write_counter(read_counter(&hpet->hpet_mc),
462 &timer->hpet_compare);
463 /* ... and clear any left-over status. */
464 isr = 1 << (devp - devp->hd_hpets->hp_dev);
465 writel(isr, &hpet->hpet_isr);
466 }
467
468 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
469 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
470 if (request_irq(irq, hpet_interrupt, irq_flags,
471 devp->hd_name, (void *)devp)) {
472 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
473 irq = 0;
474 }
475 }
476
477 if (irq == 0) {
478 spin_lock_irq(&hpet_lock);
479 devp->hd_flags ^= HPET_IE;
480 spin_unlock_irq(&hpet_lock);
481 return -EIO;
482 }
483
484 devp->hd_irq = irq;
485 t = devp->hd_ireqfreq;
486 v = readq(&timer->hpet_config);
487
488 /* 64-bit comparators are not yet supported through the ioctls,
489 * so force this into 32-bit mode if it supports both modes
490 */
491 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
492
493 if (devp->hd_flags & HPET_PERIODIC) {
494 g |= Tn_TYPE_CNF_MASK;
495 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
496 writeq(v, &timer->hpet_config);
497 local_irq_save(flags);
498
499 /*
500 * NOTE: First we modify the hidden accumulator
501 * register supported by periodic-capable comparators.
502 * We never want to modify the (single) counter; that
503 * would affect all the comparators. The value written
504 * is the counter value when the first interrupt is due.
505 */
506 m = read_counter(&hpet->hpet_mc);
507 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
508 /*
509 * Then we modify the comparator, indicating the period
510 * for subsequent interrupt.
511 */
512 write_counter(t, &timer->hpet_compare);
513 } else {
514 local_irq_save(flags);
515 m = read_counter(&hpet->hpet_mc);
516 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
517 }
518
519 if (devp->hd_flags & HPET_SHARED_IRQ) {
520 isr = 1 << (devp - devp->hd_hpets->hp_dev);
521 writel(isr, &hpet->hpet_isr);
522 }
523 writeq(g, &timer->hpet_config);
524 local_irq_restore(flags);
525
526 return 0;
527}
528
529/* converts Hz to number of timer ticks */
530static inline unsigned long hpet_time_div(struct hpets *hpets,
531 unsigned long dis)
532{
533 unsigned long long m;
534
535 m = hpets->hp_tick_freq + (dis >> 1);
536 return div64_ul(m, dis);
537}
538
539static int
540hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
541 struct hpet_info *info)
542{
543 struct hpet_timer __iomem *timer;
544 struct hpets *hpetp;
545 int err;
546 unsigned long v;
547
548 switch (cmd) {
549 case HPET_IE_OFF:
550 case HPET_INFO:
551 case HPET_EPI:
552 case HPET_DPI:
553 case HPET_IRQFREQ:
554 timer = devp->hd_timer;
555 hpetp = devp->hd_hpets;
556 break;
557 case HPET_IE_ON:
558 return hpet_ioctl_ieon(devp);
559 default:
560 return -EINVAL;
561 }
562
563 err = 0;
564
565 switch (cmd) {
566 case HPET_IE_OFF:
567 if ((devp->hd_flags & HPET_IE) == 0)
568 break;
569 v = readq(&timer->hpet_config);
570 v &= ~Tn_INT_ENB_CNF_MASK;
571 writeq(v, &timer->hpet_config);
572 if (devp->hd_irq) {
573 free_irq(devp->hd_irq, devp);
574 devp->hd_irq = 0;
575 }
576 devp->hd_flags ^= HPET_IE;
577 break;
578 case HPET_INFO:
579 {
580 memset(info, 0, sizeof(*info));
581 if (devp->hd_ireqfreq)
582 info->hi_ireqfreq =
583 hpet_time_div(hpetp, devp->hd_ireqfreq);
584 info->hi_flags =
585 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
586 info->hi_hpet = hpetp->hp_which;
587 info->hi_timer = devp - hpetp->hp_dev;
588 break;
589 }
590 case HPET_EPI:
591 v = readq(&timer->hpet_config);
592 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
593 err = -ENXIO;
594 break;
595 }
596 devp->hd_flags |= HPET_PERIODIC;
597 break;
598 case HPET_DPI:
599 v = readq(&timer->hpet_config);
600 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
601 err = -ENXIO;
602 break;
603 }
604 if (devp->hd_flags & HPET_PERIODIC &&
605 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
606 v = readq(&timer->hpet_config);
607 v ^= Tn_TYPE_CNF_MASK;
608 writeq(v, &timer->hpet_config);
609 }
610 devp->hd_flags &= ~HPET_PERIODIC;
611 break;
612 case HPET_IRQFREQ:
613 if ((arg > hpet_max_freq) &&
614 !capable(CAP_SYS_RESOURCE)) {
615 err = -EACCES;
616 break;
617 }
618
619 if (!arg) {
620 err = -EINVAL;
621 break;
622 }
623
624 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
625 }
626
627 return err;
628}
629
630static long
631hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
632{
633 struct hpet_info info;
634 int err;
635
636 mutex_lock(&hpet_mutex);
637 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
638 mutex_unlock(&hpet_mutex);
639
640 if ((cmd == HPET_INFO) && !err &&
641 (copy_to_user((void __user *)arg, &info, sizeof(info))))
642 err = -EFAULT;
643
644 return err;
645}
646
647#ifdef CONFIG_COMPAT
648struct compat_hpet_info {
649 compat_ulong_t hi_ireqfreq; /* Hz */
650 compat_ulong_t hi_flags; /* information */
651 unsigned short hi_hpet;
652 unsigned short hi_timer;
653};
654
655static long
656hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
657{
658 struct hpet_info info;
659 int err;
660
661 mutex_lock(&hpet_mutex);
662 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
663 mutex_unlock(&hpet_mutex);
664
665 if ((cmd == HPET_INFO) && !err) {
666 struct compat_hpet_info __user *u = compat_ptr(arg);
667 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
668 put_user(info.hi_flags, &u->hi_flags) ||
669 put_user(info.hi_hpet, &u->hi_hpet) ||
670 put_user(info.hi_timer, &u->hi_timer))
671 err = -EFAULT;
672 }
673
674 return err;
675}
676#endif
677
678static const struct file_operations hpet_fops = {
679 .owner = THIS_MODULE,
680 .llseek = no_llseek,
681 .read = hpet_read,
682 .poll = hpet_poll,
683 .unlocked_ioctl = hpet_ioctl,
684#ifdef CONFIG_COMPAT
685 .compat_ioctl = hpet_compat_ioctl,
686#endif
687 .open = hpet_open,
688 .release = hpet_release,
689 .fasync = hpet_fasync,
690 .mmap = hpet_mmap,
691};
692
693static int hpet_is_known(struct hpet_data *hdp)
694{
695 struct hpets *hpetp;
696
697 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
698 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
699 return 1;
700
701 return 0;
702}
703
704static struct ctl_table hpet_table[] = {
705 {
706 .procname = "max-user-freq",
707 .data = &hpet_max_freq,
708 .maxlen = sizeof(int),
709 .mode = 0644,
710 .proc_handler = proc_dointvec,
711 },
712};
713
714static struct ctl_table_header *sysctl_header;
715
716/*
717 * Adjustment for when arming the timer with
718 * initial conditions. That is, main counter
719 * ticks expired before interrupts are enabled.
720 */
721#define TICK_CALIBRATE (1000UL)
722
723static unsigned long __hpet_calibrate(struct hpets *hpetp)
724{
725 struct hpet_timer __iomem *timer = NULL;
726 unsigned long t, m, count, i, flags, start;
727 struct hpet_dev *devp;
728 int j;
729 struct hpet __iomem *hpet;
730
731 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
732 if ((devp->hd_flags & HPET_OPEN) == 0) {
733 timer = devp->hd_timer;
734 break;
735 }
736
737 if (!timer)
738 return 0;
739
740 hpet = hpetp->hp_hpet;
741 t = read_counter(&timer->hpet_compare);
742
743 i = 0;
744 count = hpet_time_div(hpetp, TICK_CALIBRATE);
745
746 local_irq_save(flags);
747
748 start = read_counter(&hpet->hpet_mc);
749
750 do {
751 m = read_counter(&hpet->hpet_mc);
752 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
753 } while (i++, (m - start) < count);
754
755 local_irq_restore(flags);
756
757 return (m - start) / i;
758}
759
760static unsigned long hpet_calibrate(struct hpets *hpetp)
761{
762 unsigned long ret = ~0UL;
763 unsigned long tmp;
764
765 /*
766 * Try to calibrate until return value becomes stable small value.
767 * If SMI interruption occurs in calibration loop, the return value
768 * will be big. This avoids its impact.
769 */
770 for ( ; ; ) {
771 tmp = __hpet_calibrate(hpetp);
772 if (ret <= tmp)
773 break;
774 ret = tmp;
775 }
776
777 return ret;
778}
779
780int hpet_alloc(struct hpet_data *hdp)
781{
782 u64 cap, mcfg;
783 struct hpet_dev *devp;
784 u32 i, ntimer;
785 struct hpets *hpetp;
786 struct hpet __iomem *hpet;
787 static struct hpets *last;
788 unsigned long period;
789 unsigned long long temp;
790 u32 remainder;
791
792 /*
793 * hpet_alloc can be called by platform dependent code.
794 * If platform dependent code has allocated the hpet that
795 * ACPI has also reported, then we catch it here.
796 */
797 if (hpet_is_known(hdp)) {
798 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
799 __func__);
800 return 0;
801 }
802
803 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
804 GFP_KERNEL);
805
806 if (!hpetp)
807 return -ENOMEM;
808
809 hpetp->hp_which = hpet_nhpet++;
810 hpetp->hp_hpet = hdp->hd_address;
811 hpetp->hp_hpet_phys = hdp->hd_phys_address;
812
813 hpetp->hp_ntimer = hdp->hd_nirqs;
814
815 for (i = 0; i < hdp->hd_nirqs; i++)
816 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
817
818 hpet = hpetp->hp_hpet;
819
820 cap = readq(&hpet->hpet_cap);
821
822 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
823
824 if (hpetp->hp_ntimer != ntimer) {
825 printk(KERN_WARNING "hpet: number irqs doesn't agree"
826 " with number of timers\n");
827 kfree(hpetp);
828 return -ENODEV;
829 }
830
831 if (last)
832 last->hp_next = hpetp;
833 else
834 hpets = hpetp;
835
836 last = hpetp;
837
838 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
839 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
840 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
841 temp += period >> 1; /* round */
842 do_div(temp, period);
843 hpetp->hp_tick_freq = temp; /* ticks per second */
844
845 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
846 hpetp->hp_which, hdp->hd_phys_address,
847 hpetp->hp_ntimer > 1 ? "s" : "");
848 for (i = 0; i < hpetp->hp_ntimer; i++)
849 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
850 printk(KERN_CONT "\n");
851
852 temp = hpetp->hp_tick_freq;
853 remainder = do_div(temp, 1000000);
854 printk(KERN_INFO
855 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
856 hpetp->hp_which, hpetp->hp_ntimer,
857 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
858 (unsigned) temp, remainder);
859
860 mcfg = readq(&hpet->hpet_config);
861 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
862 write_counter(0L, &hpet->hpet_mc);
863 mcfg |= HPET_ENABLE_CNF_MASK;
864 writeq(mcfg, &hpet->hpet_config);
865 }
866
867 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
868 struct hpet_timer __iomem *timer;
869
870 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
871
872 devp->hd_hpets = hpetp;
873 devp->hd_hpet = hpet;
874 devp->hd_timer = timer;
875
876 /*
877 * If the timer was reserved by platform code,
878 * then make timer unavailable for opens.
879 */
880 if (hdp->hd_state & (1 << i)) {
881 devp->hd_flags = HPET_OPEN;
882 continue;
883 }
884
885 init_waitqueue_head(&devp->hd_waitqueue);
886 }
887
888 hpetp->hp_delta = hpet_calibrate(hpetp);
889
890 return 0;
891}
892
893static acpi_status hpet_resources(struct acpi_resource *res, void *data)
894{
895 struct hpet_data *hdp;
896 acpi_status status;
897 struct acpi_resource_address64 addr;
898
899 hdp = data;
900
901 status = acpi_resource_to_address64(res, &addr);
902
903 if (ACPI_SUCCESS(status)) {
904 hdp->hd_phys_address = addr.address.minimum;
905 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
906 if (!hdp->hd_address)
907 return AE_ERROR;
908
909 if (hpet_is_known(hdp)) {
910 iounmap(hdp->hd_address);
911 return AE_ALREADY_EXISTS;
912 }
913 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
914 struct acpi_resource_fixed_memory32 *fixmem32;
915
916 fixmem32 = &res->data.fixed_memory32;
917
918 hdp->hd_phys_address = fixmem32->address;
919 hdp->hd_address = ioremap(fixmem32->address,
920 HPET_RANGE_SIZE);
921 if (!hdp->hd_address)
922 return AE_ERROR;
923
924 if (hpet_is_known(hdp)) {
925 iounmap(hdp->hd_address);
926 return AE_ALREADY_EXISTS;
927 }
928 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
929 struct acpi_resource_extended_irq *irqp;
930 int i, irq;
931
932 irqp = &res->data.extended_irq;
933
934 for (i = 0; i < irqp->interrupt_count; i++) {
935 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
936 break;
937
938 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
939 irqp->triggering,
940 irqp->polarity);
941 if (irq < 0)
942 return AE_ERROR;
943
944 hdp->hd_irq[hdp->hd_nirqs] = irq;
945 hdp->hd_nirqs++;
946 }
947 }
948
949 return AE_OK;
950}
951
952static int hpet_acpi_add(struct acpi_device *device)
953{
954 acpi_status result;
955 struct hpet_data data;
956
957 memset(&data, 0, sizeof(data));
958
959 result =
960 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
961 hpet_resources, &data);
962
963 if (ACPI_FAILURE(result))
964 return -ENODEV;
965
966 if (!data.hd_address || !data.hd_nirqs) {
967 if (data.hd_address)
968 iounmap(data.hd_address);
969 printk("%s: no address or irqs in _CRS\n", __func__);
970 return -ENODEV;
971 }
972
973 return hpet_alloc(&data);
974}
975
976static const struct acpi_device_id hpet_device_ids[] = {
977 {"PNP0103", 0},
978 {"", 0},
979};
980
981static struct acpi_driver hpet_acpi_driver = {
982 .name = "hpet",
983 .ids = hpet_device_ids,
984 .ops = {
985 .add = hpet_acpi_add,
986 },
987};
988
989static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
990
991static int __init hpet_init(void)
992{
993 int result;
994
995 result = misc_register(&hpet_misc);
996 if (result < 0)
997 return -ENODEV;
998
999 sysctl_header = register_sysctl("dev/hpet", hpet_table);
1000
1001 result = acpi_bus_register_driver(&hpet_acpi_driver);
1002 if (result < 0) {
1003 if (sysctl_header)
1004 unregister_sysctl_table(sysctl_header);
1005 misc_deregister(&hpet_misc);
1006 return result;
1007 }
1008
1009 return 0;
1010}
1011device_initcall(hpet_init);
1012
1013/*
1014MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1015MODULE_LICENSE("GPL");
1016*/
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Intel & MS High Precision Event Timer Implementation.
4 *
5 * Copyright (C) 2003 Intel Corporation
6 * Venki Pallipadi
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
9 */
10
11#include <linux/interrupt.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/miscdevice.h>
15#include <linux/major.h>
16#include <linux/ioport.h>
17#include <linux/fcntl.h>
18#include <linux/init.h>
19#include <linux/io-64-nonatomic-lo-hi.h>
20#include <linux/poll.h>
21#include <linux/mm.h>
22#include <linux/proc_fs.h>
23#include <linux/spinlock.h>
24#include <linux/sysctl.h>
25#include <linux/wait.h>
26#include <linux/sched/signal.h>
27#include <linux/bcd.h>
28#include <linux/seq_file.h>
29#include <linux/bitops.h>
30#include <linux/compat.h>
31#include <linux/clocksource.h>
32#include <linux/uaccess.h>
33#include <linux/slab.h>
34#include <linux/io.h>
35#include <linux/acpi.h>
36#include <linux/hpet.h>
37#include <asm/current.h>
38#include <asm/irq.h>
39#include <asm/div64.h>
40
41/*
42 * The High Precision Event Timer driver.
43 * This driver is closely modelled after the rtc.c driver.
44 * See HPET spec revision 1.
45 */
46#define HPET_USER_FREQ (64)
47#define HPET_DRIFT (500)
48
49#define HPET_RANGE_SIZE 1024 /* from HPET spec */
50
51
52/* WARNING -- don't get confused. These macros are never used
53 * to write the (single) counter, and rarely to read it.
54 * They're badly named; to fix, someday.
55 */
56#if BITS_PER_LONG == 64
57#define write_counter(V, MC) writeq(V, MC)
58#define read_counter(MC) readq(MC)
59#else
60#define write_counter(V, MC) writel(V, MC)
61#define read_counter(MC) readl(MC)
62#endif
63
64static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
65static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
66
67/* This clocksource driver currently only works on ia64 */
68#ifdef CONFIG_IA64
69static void __iomem *hpet_mctr;
70
71static u64 read_hpet(struct clocksource *cs)
72{
73 return (u64)read_counter((void __iomem *)hpet_mctr);
74}
75
76static struct clocksource clocksource_hpet = {
77 .name = "hpet",
78 .rating = 250,
79 .read = read_hpet,
80 .mask = CLOCKSOURCE_MASK(64),
81 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
82};
83static struct clocksource *hpet_clocksource;
84#endif
85
86/* A lock for concurrent access by app and isr hpet activity. */
87static DEFINE_SPINLOCK(hpet_lock);
88
89#define HPET_DEV_NAME (7)
90
91struct hpet_dev {
92 struct hpets *hd_hpets;
93 struct hpet __iomem *hd_hpet;
94 struct hpet_timer __iomem *hd_timer;
95 unsigned long hd_ireqfreq;
96 unsigned long hd_irqdata;
97 wait_queue_head_t hd_waitqueue;
98 struct fasync_struct *hd_async_queue;
99 unsigned int hd_flags;
100 unsigned int hd_irq;
101 unsigned int hd_hdwirq;
102 char hd_name[HPET_DEV_NAME];
103};
104
105struct hpets {
106 struct hpets *hp_next;
107 struct hpet __iomem *hp_hpet;
108 unsigned long hp_hpet_phys;
109 struct clocksource *hp_clocksource;
110 unsigned long long hp_tick_freq;
111 unsigned long hp_delta;
112 unsigned int hp_ntimer;
113 unsigned int hp_which;
114 struct hpet_dev hp_dev[];
115};
116
117static struct hpets *hpets;
118
119#define HPET_OPEN 0x0001
120#define HPET_IE 0x0002 /* interrupt enabled */
121#define HPET_PERIODIC 0x0004
122#define HPET_SHARED_IRQ 0x0008
123
124static irqreturn_t hpet_interrupt(int irq, void *data)
125{
126 struct hpet_dev *devp;
127 unsigned long isr;
128
129 devp = data;
130 isr = 1 << (devp - devp->hd_hpets->hp_dev);
131
132 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
133 !(isr & readl(&devp->hd_hpet->hpet_isr)))
134 return IRQ_NONE;
135
136 spin_lock(&hpet_lock);
137 devp->hd_irqdata++;
138
139 /*
140 * For non-periodic timers, increment the accumulator.
141 * This has the effect of treating non-periodic like periodic.
142 */
143 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
144 unsigned long t, mc, base, k;
145 struct hpet __iomem *hpet = devp->hd_hpet;
146 struct hpets *hpetp = devp->hd_hpets;
147
148 t = devp->hd_ireqfreq;
149 read_counter(&devp->hd_timer->hpet_compare);
150 mc = read_counter(&hpet->hpet_mc);
151 /* The time for the next interrupt would logically be t + m,
152 * however, if we are very unlucky and the interrupt is delayed
153 * for longer than t then we will completely miss the next
154 * interrupt if we set t + m and an application will hang.
155 * Therefore we need to make a more complex computation assuming
156 * that there exists a k for which the following is true:
157 * k * t + base < mc + delta
158 * (k + 1) * t + base > mc + delta
159 * where t is the interval in hpet ticks for the given freq,
160 * base is the theoretical start value 0 < base < t,
161 * mc is the main counter value at the time of the interrupt,
162 * delta is the time it takes to write the a value to the
163 * comparator.
164 * k may then be computed as (mc - base + delta) / t .
165 */
166 base = mc % t;
167 k = (mc - base + hpetp->hp_delta) / t;
168 write_counter(t * (k + 1) + base,
169 &devp->hd_timer->hpet_compare);
170 }
171
172 if (devp->hd_flags & HPET_SHARED_IRQ)
173 writel(isr, &devp->hd_hpet->hpet_isr);
174 spin_unlock(&hpet_lock);
175
176 wake_up_interruptible(&devp->hd_waitqueue);
177
178 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
179
180 return IRQ_HANDLED;
181}
182
183static void hpet_timer_set_irq(struct hpet_dev *devp)
184{
185 unsigned long v;
186 int irq, gsi;
187 struct hpet_timer __iomem *timer;
188
189 spin_lock_irq(&hpet_lock);
190 if (devp->hd_hdwirq) {
191 spin_unlock_irq(&hpet_lock);
192 return;
193 }
194
195 timer = devp->hd_timer;
196
197 /* we prefer level triggered mode */
198 v = readl(&timer->hpet_config);
199 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
200 v |= Tn_INT_TYPE_CNF_MASK;
201 writel(v, &timer->hpet_config);
202 }
203 spin_unlock_irq(&hpet_lock);
204
205 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
206 Tn_INT_ROUTE_CAP_SHIFT;
207
208 /*
209 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
210 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
211 */
212 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
213 v &= ~0xf3df;
214 else
215 v &= ~0xffff;
216
217 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
218 if (irq >= nr_irqs) {
219 irq = HPET_MAX_IRQ;
220 break;
221 }
222
223 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
224 ACPI_ACTIVE_LOW);
225 if (gsi > 0)
226 break;
227
228 /* FIXME: Setup interrupt source table */
229 }
230
231 if (irq < HPET_MAX_IRQ) {
232 spin_lock_irq(&hpet_lock);
233 v = readl(&timer->hpet_config);
234 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
235 writel(v, &timer->hpet_config);
236 devp->hd_hdwirq = gsi;
237 spin_unlock_irq(&hpet_lock);
238 }
239 return;
240}
241
242static int hpet_open(struct inode *inode, struct file *file)
243{
244 struct hpet_dev *devp;
245 struct hpets *hpetp;
246 int i;
247
248 if (file->f_mode & FMODE_WRITE)
249 return -EINVAL;
250
251 mutex_lock(&hpet_mutex);
252 spin_lock_irq(&hpet_lock);
253
254 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
255 for (i = 0; i < hpetp->hp_ntimer; i++)
256 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
257 continue;
258 } else {
259 devp = &hpetp->hp_dev[i];
260 break;
261 }
262
263 if (!devp) {
264 spin_unlock_irq(&hpet_lock);
265 mutex_unlock(&hpet_mutex);
266 return -EBUSY;
267 }
268
269 file->private_data = devp;
270 devp->hd_irqdata = 0;
271 devp->hd_flags |= HPET_OPEN;
272 spin_unlock_irq(&hpet_lock);
273 mutex_unlock(&hpet_mutex);
274
275 hpet_timer_set_irq(devp);
276
277 return 0;
278}
279
280static ssize_t
281hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
282{
283 DECLARE_WAITQUEUE(wait, current);
284 unsigned long data;
285 ssize_t retval;
286 struct hpet_dev *devp;
287
288 devp = file->private_data;
289 if (!devp->hd_ireqfreq)
290 return -EIO;
291
292 if (count < sizeof(unsigned long))
293 return -EINVAL;
294
295 add_wait_queue(&devp->hd_waitqueue, &wait);
296
297 for ( ; ; ) {
298 set_current_state(TASK_INTERRUPTIBLE);
299
300 spin_lock_irq(&hpet_lock);
301 data = devp->hd_irqdata;
302 devp->hd_irqdata = 0;
303 spin_unlock_irq(&hpet_lock);
304
305 if (data) {
306 break;
307 } else if (file->f_flags & O_NONBLOCK) {
308 retval = -EAGAIN;
309 goto out;
310 } else if (signal_pending(current)) {
311 retval = -ERESTARTSYS;
312 goto out;
313 }
314 schedule();
315 }
316
317 retval = put_user(data, (unsigned long __user *)buf);
318 if (!retval)
319 retval = sizeof(unsigned long);
320out:
321 __set_current_state(TASK_RUNNING);
322 remove_wait_queue(&devp->hd_waitqueue, &wait);
323
324 return retval;
325}
326
327static __poll_t hpet_poll(struct file *file, poll_table * wait)
328{
329 unsigned long v;
330 struct hpet_dev *devp;
331
332 devp = file->private_data;
333
334 if (!devp->hd_ireqfreq)
335 return 0;
336
337 poll_wait(file, &devp->hd_waitqueue, wait);
338
339 spin_lock_irq(&hpet_lock);
340 v = devp->hd_irqdata;
341 spin_unlock_irq(&hpet_lock);
342
343 if (v != 0)
344 return EPOLLIN | EPOLLRDNORM;
345
346 return 0;
347}
348
349#ifdef CONFIG_HPET_MMAP
350#ifdef CONFIG_HPET_MMAP_DEFAULT
351static int hpet_mmap_enabled = 1;
352#else
353static int hpet_mmap_enabled = 0;
354#endif
355
356static __init int hpet_mmap_enable(char *str)
357{
358 get_option(&str, &hpet_mmap_enabled);
359 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
360 return 1;
361}
362__setup("hpet_mmap=", hpet_mmap_enable);
363
364static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
365{
366 struct hpet_dev *devp;
367 unsigned long addr;
368
369 if (!hpet_mmap_enabled)
370 return -EACCES;
371
372 devp = file->private_data;
373 addr = devp->hd_hpets->hp_hpet_phys;
374
375 if (addr & (PAGE_SIZE - 1))
376 return -ENOSYS;
377
378 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
379 return vm_iomap_memory(vma, addr, PAGE_SIZE);
380}
381#else
382static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
383{
384 return -ENOSYS;
385}
386#endif
387
388static int hpet_fasync(int fd, struct file *file, int on)
389{
390 struct hpet_dev *devp;
391
392 devp = file->private_data;
393
394 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
395 return 0;
396 else
397 return -EIO;
398}
399
400static int hpet_release(struct inode *inode, struct file *file)
401{
402 struct hpet_dev *devp;
403 struct hpet_timer __iomem *timer;
404 int irq = 0;
405
406 devp = file->private_data;
407 timer = devp->hd_timer;
408
409 spin_lock_irq(&hpet_lock);
410
411 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
412 &timer->hpet_config);
413
414 irq = devp->hd_irq;
415 devp->hd_irq = 0;
416
417 devp->hd_ireqfreq = 0;
418
419 if (devp->hd_flags & HPET_PERIODIC
420 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
421 unsigned long v;
422
423 v = readq(&timer->hpet_config);
424 v ^= Tn_TYPE_CNF_MASK;
425 writeq(v, &timer->hpet_config);
426 }
427
428 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
429 spin_unlock_irq(&hpet_lock);
430
431 if (irq)
432 free_irq(irq, devp);
433
434 file->private_data = NULL;
435 return 0;
436}
437
438static int hpet_ioctl_ieon(struct hpet_dev *devp)
439{
440 struct hpet_timer __iomem *timer;
441 struct hpet __iomem *hpet;
442 struct hpets *hpetp;
443 int irq;
444 unsigned long g, v, t, m;
445 unsigned long flags, isr;
446
447 timer = devp->hd_timer;
448 hpet = devp->hd_hpet;
449 hpetp = devp->hd_hpets;
450
451 if (!devp->hd_ireqfreq)
452 return -EIO;
453
454 spin_lock_irq(&hpet_lock);
455
456 if (devp->hd_flags & HPET_IE) {
457 spin_unlock_irq(&hpet_lock);
458 return -EBUSY;
459 }
460
461 devp->hd_flags |= HPET_IE;
462
463 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
464 devp->hd_flags |= HPET_SHARED_IRQ;
465 spin_unlock_irq(&hpet_lock);
466
467 irq = devp->hd_hdwirq;
468
469 if (irq) {
470 unsigned long irq_flags;
471
472 if (devp->hd_flags & HPET_SHARED_IRQ) {
473 /*
474 * To prevent the interrupt handler from seeing an
475 * unwanted interrupt status bit, program the timer
476 * so that it will not fire in the near future ...
477 */
478 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
479 &timer->hpet_config);
480 write_counter(read_counter(&hpet->hpet_mc),
481 &timer->hpet_compare);
482 /* ... and clear any left-over status. */
483 isr = 1 << (devp - devp->hd_hpets->hp_dev);
484 writel(isr, &hpet->hpet_isr);
485 }
486
487 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
488 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
489 if (request_irq(irq, hpet_interrupt, irq_flags,
490 devp->hd_name, (void *)devp)) {
491 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
492 irq = 0;
493 }
494 }
495
496 if (irq == 0) {
497 spin_lock_irq(&hpet_lock);
498 devp->hd_flags ^= HPET_IE;
499 spin_unlock_irq(&hpet_lock);
500 return -EIO;
501 }
502
503 devp->hd_irq = irq;
504 t = devp->hd_ireqfreq;
505 v = readq(&timer->hpet_config);
506
507 /* 64-bit comparators are not yet supported through the ioctls,
508 * so force this into 32-bit mode if it supports both modes
509 */
510 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
511
512 if (devp->hd_flags & HPET_PERIODIC) {
513 g |= Tn_TYPE_CNF_MASK;
514 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
517
518 /*
519 * NOTE: First we modify the hidden accumulator
520 * register supported by periodic-capable comparators.
521 * We never want to modify the (single) counter; that
522 * would affect all the comparators. The value written
523 * is the counter value when the first interrupt is due.
524 */
525 m = read_counter(&hpet->hpet_mc);
526 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
527 /*
528 * Then we modify the comparator, indicating the period
529 * for subsequent interrupt.
530 */
531 write_counter(t, &timer->hpet_compare);
532 } else {
533 local_irq_save(flags);
534 m = read_counter(&hpet->hpet_mc);
535 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
536 }
537
538 if (devp->hd_flags & HPET_SHARED_IRQ) {
539 isr = 1 << (devp - devp->hd_hpets->hp_dev);
540 writel(isr, &hpet->hpet_isr);
541 }
542 writeq(g, &timer->hpet_config);
543 local_irq_restore(flags);
544
545 return 0;
546}
547
548/* converts Hz to number of timer ticks */
549static inline unsigned long hpet_time_div(struct hpets *hpets,
550 unsigned long dis)
551{
552 unsigned long long m;
553
554 m = hpets->hp_tick_freq + (dis >> 1);
555 return div64_ul(m, dis);
556}
557
558static int
559hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
560 struct hpet_info *info)
561{
562 struct hpet_timer __iomem *timer;
563 struct hpets *hpetp;
564 int err;
565 unsigned long v;
566
567 switch (cmd) {
568 case HPET_IE_OFF:
569 case HPET_INFO:
570 case HPET_EPI:
571 case HPET_DPI:
572 case HPET_IRQFREQ:
573 timer = devp->hd_timer;
574 hpetp = devp->hd_hpets;
575 break;
576 case HPET_IE_ON:
577 return hpet_ioctl_ieon(devp);
578 default:
579 return -EINVAL;
580 }
581
582 err = 0;
583
584 switch (cmd) {
585 case HPET_IE_OFF:
586 if ((devp->hd_flags & HPET_IE) == 0)
587 break;
588 v = readq(&timer->hpet_config);
589 v &= ~Tn_INT_ENB_CNF_MASK;
590 writeq(v, &timer->hpet_config);
591 if (devp->hd_irq) {
592 free_irq(devp->hd_irq, devp);
593 devp->hd_irq = 0;
594 }
595 devp->hd_flags ^= HPET_IE;
596 break;
597 case HPET_INFO:
598 {
599 memset(info, 0, sizeof(*info));
600 if (devp->hd_ireqfreq)
601 info->hi_ireqfreq =
602 hpet_time_div(hpetp, devp->hd_ireqfreq);
603 info->hi_flags =
604 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
605 info->hi_hpet = hpetp->hp_which;
606 info->hi_timer = devp - hpetp->hp_dev;
607 break;
608 }
609 case HPET_EPI:
610 v = readq(&timer->hpet_config);
611 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
612 err = -ENXIO;
613 break;
614 }
615 devp->hd_flags |= HPET_PERIODIC;
616 break;
617 case HPET_DPI:
618 v = readq(&timer->hpet_config);
619 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
620 err = -ENXIO;
621 break;
622 }
623 if (devp->hd_flags & HPET_PERIODIC &&
624 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
625 v = readq(&timer->hpet_config);
626 v ^= Tn_TYPE_CNF_MASK;
627 writeq(v, &timer->hpet_config);
628 }
629 devp->hd_flags &= ~HPET_PERIODIC;
630 break;
631 case HPET_IRQFREQ:
632 if ((arg > hpet_max_freq) &&
633 !capable(CAP_SYS_RESOURCE)) {
634 err = -EACCES;
635 break;
636 }
637
638 if (!arg) {
639 err = -EINVAL;
640 break;
641 }
642
643 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
644 }
645
646 return err;
647}
648
649static long
650hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
651{
652 struct hpet_info info;
653 int err;
654
655 mutex_lock(&hpet_mutex);
656 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
657 mutex_unlock(&hpet_mutex);
658
659 if ((cmd == HPET_INFO) && !err &&
660 (copy_to_user((void __user *)arg, &info, sizeof(info))))
661 err = -EFAULT;
662
663 return err;
664}
665
666#ifdef CONFIG_COMPAT
667struct compat_hpet_info {
668 compat_ulong_t hi_ireqfreq; /* Hz */
669 compat_ulong_t hi_flags; /* information */
670 unsigned short hi_hpet;
671 unsigned short hi_timer;
672};
673
674static long
675hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
676{
677 struct hpet_info info;
678 int err;
679
680 mutex_lock(&hpet_mutex);
681 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
682 mutex_unlock(&hpet_mutex);
683
684 if ((cmd == HPET_INFO) && !err) {
685 struct compat_hpet_info __user *u = compat_ptr(arg);
686 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
687 put_user(info.hi_flags, &u->hi_flags) ||
688 put_user(info.hi_hpet, &u->hi_hpet) ||
689 put_user(info.hi_timer, &u->hi_timer))
690 err = -EFAULT;
691 }
692
693 return err;
694}
695#endif
696
697static const struct file_operations hpet_fops = {
698 .owner = THIS_MODULE,
699 .llseek = no_llseek,
700 .read = hpet_read,
701 .poll = hpet_poll,
702 .unlocked_ioctl = hpet_ioctl,
703#ifdef CONFIG_COMPAT
704 .compat_ioctl = hpet_compat_ioctl,
705#endif
706 .open = hpet_open,
707 .release = hpet_release,
708 .fasync = hpet_fasync,
709 .mmap = hpet_mmap,
710};
711
712static int hpet_is_known(struct hpet_data *hdp)
713{
714 struct hpets *hpetp;
715
716 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
717 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
718 return 1;
719
720 return 0;
721}
722
723static struct ctl_table hpet_table[] = {
724 {
725 .procname = "max-user-freq",
726 .data = &hpet_max_freq,
727 .maxlen = sizeof(int),
728 .mode = 0644,
729 .proc_handler = proc_dointvec,
730 },
731 {}
732};
733
734static struct ctl_table_header *sysctl_header;
735
736/*
737 * Adjustment for when arming the timer with
738 * initial conditions. That is, main counter
739 * ticks expired before interrupts are enabled.
740 */
741#define TICK_CALIBRATE (1000UL)
742
743static unsigned long __hpet_calibrate(struct hpets *hpetp)
744{
745 struct hpet_timer __iomem *timer = NULL;
746 unsigned long t, m, count, i, flags, start;
747 struct hpet_dev *devp;
748 int j;
749 struct hpet __iomem *hpet;
750
751 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
752 if ((devp->hd_flags & HPET_OPEN) == 0) {
753 timer = devp->hd_timer;
754 break;
755 }
756
757 if (!timer)
758 return 0;
759
760 hpet = hpetp->hp_hpet;
761 t = read_counter(&timer->hpet_compare);
762
763 i = 0;
764 count = hpet_time_div(hpetp, TICK_CALIBRATE);
765
766 local_irq_save(flags);
767
768 start = read_counter(&hpet->hpet_mc);
769
770 do {
771 m = read_counter(&hpet->hpet_mc);
772 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
773 } while (i++, (m - start) < count);
774
775 local_irq_restore(flags);
776
777 return (m - start) / i;
778}
779
780static unsigned long hpet_calibrate(struct hpets *hpetp)
781{
782 unsigned long ret = ~0UL;
783 unsigned long tmp;
784
785 /*
786 * Try to calibrate until return value becomes stable small value.
787 * If SMI interruption occurs in calibration loop, the return value
788 * will be big. This avoids its impact.
789 */
790 for ( ; ; ) {
791 tmp = __hpet_calibrate(hpetp);
792 if (ret <= tmp)
793 break;
794 ret = tmp;
795 }
796
797 return ret;
798}
799
800int hpet_alloc(struct hpet_data *hdp)
801{
802 u64 cap, mcfg;
803 struct hpet_dev *devp;
804 u32 i, ntimer;
805 struct hpets *hpetp;
806 struct hpet __iomem *hpet;
807 static struct hpets *last;
808 unsigned long period;
809 unsigned long long temp;
810 u32 remainder;
811
812 /*
813 * hpet_alloc can be called by platform dependent code.
814 * If platform dependent code has allocated the hpet that
815 * ACPI has also reported, then we catch it here.
816 */
817 if (hpet_is_known(hdp)) {
818 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
819 __func__);
820 return 0;
821 }
822
823 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
824 GFP_KERNEL);
825
826 if (!hpetp)
827 return -ENOMEM;
828
829 hpetp->hp_which = hpet_nhpet++;
830 hpetp->hp_hpet = hdp->hd_address;
831 hpetp->hp_hpet_phys = hdp->hd_phys_address;
832
833 hpetp->hp_ntimer = hdp->hd_nirqs;
834
835 for (i = 0; i < hdp->hd_nirqs; i++)
836 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
837
838 hpet = hpetp->hp_hpet;
839
840 cap = readq(&hpet->hpet_cap);
841
842 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
843
844 if (hpetp->hp_ntimer != ntimer) {
845 printk(KERN_WARNING "hpet: number irqs doesn't agree"
846 " with number of timers\n");
847 kfree(hpetp);
848 return -ENODEV;
849 }
850
851 if (last)
852 last->hp_next = hpetp;
853 else
854 hpets = hpetp;
855
856 last = hpetp;
857
858 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
859 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
860 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
861 temp += period >> 1; /* round */
862 do_div(temp, period);
863 hpetp->hp_tick_freq = temp; /* ticks per second */
864
865 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
866 hpetp->hp_which, hdp->hd_phys_address,
867 hpetp->hp_ntimer > 1 ? "s" : "");
868 for (i = 0; i < hpetp->hp_ntimer; i++)
869 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
870 printk(KERN_CONT "\n");
871
872 temp = hpetp->hp_tick_freq;
873 remainder = do_div(temp, 1000000);
874 printk(KERN_INFO
875 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
876 hpetp->hp_which, hpetp->hp_ntimer,
877 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
878 (unsigned) temp, remainder);
879
880 mcfg = readq(&hpet->hpet_config);
881 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
882 write_counter(0L, &hpet->hpet_mc);
883 mcfg |= HPET_ENABLE_CNF_MASK;
884 writeq(mcfg, &hpet->hpet_config);
885 }
886
887 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
888 struct hpet_timer __iomem *timer;
889
890 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
891
892 devp->hd_hpets = hpetp;
893 devp->hd_hpet = hpet;
894 devp->hd_timer = timer;
895
896 /*
897 * If the timer was reserved by platform code,
898 * then make timer unavailable for opens.
899 */
900 if (hdp->hd_state & (1 << i)) {
901 devp->hd_flags = HPET_OPEN;
902 continue;
903 }
904
905 init_waitqueue_head(&devp->hd_waitqueue);
906 }
907
908 hpetp->hp_delta = hpet_calibrate(hpetp);
909
910/* This clocksource driver currently only works on ia64 */
911#ifdef CONFIG_IA64
912 if (!hpet_clocksource) {
913 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
914 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
915 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
916 hpetp->hp_clocksource = &clocksource_hpet;
917 hpet_clocksource = &clocksource_hpet;
918 }
919#endif
920
921 return 0;
922}
923
924static acpi_status hpet_resources(struct acpi_resource *res, void *data)
925{
926 struct hpet_data *hdp;
927 acpi_status status;
928 struct acpi_resource_address64 addr;
929
930 hdp = data;
931
932 status = acpi_resource_to_address64(res, &addr);
933
934 if (ACPI_SUCCESS(status)) {
935 hdp->hd_phys_address = addr.address.minimum;
936 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
937 if (!hdp->hd_address)
938 return AE_ERROR;
939
940 if (hpet_is_known(hdp)) {
941 iounmap(hdp->hd_address);
942 return AE_ALREADY_EXISTS;
943 }
944 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
945 struct acpi_resource_fixed_memory32 *fixmem32;
946
947 fixmem32 = &res->data.fixed_memory32;
948
949 hdp->hd_phys_address = fixmem32->address;
950 hdp->hd_address = ioremap(fixmem32->address,
951 HPET_RANGE_SIZE);
952 if (!hdp->hd_address)
953 return AE_ERROR;
954
955 if (hpet_is_known(hdp)) {
956 iounmap(hdp->hd_address);
957 return AE_ALREADY_EXISTS;
958 }
959 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
960 struct acpi_resource_extended_irq *irqp;
961 int i, irq;
962
963 irqp = &res->data.extended_irq;
964
965 for (i = 0; i < irqp->interrupt_count; i++) {
966 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
967 break;
968
969 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
970 irqp->triggering,
971 irqp->polarity);
972 if (irq < 0)
973 return AE_ERROR;
974
975 hdp->hd_irq[hdp->hd_nirqs] = irq;
976 hdp->hd_nirqs++;
977 }
978 }
979
980 return AE_OK;
981}
982
983static int hpet_acpi_add(struct acpi_device *device)
984{
985 acpi_status result;
986 struct hpet_data data;
987
988 memset(&data, 0, sizeof(data));
989
990 result =
991 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
992 hpet_resources, &data);
993
994 if (ACPI_FAILURE(result))
995 return -ENODEV;
996
997 if (!data.hd_address || !data.hd_nirqs) {
998 if (data.hd_address)
999 iounmap(data.hd_address);
1000 printk("%s: no address or irqs in _CRS\n", __func__);
1001 return -ENODEV;
1002 }
1003
1004 return hpet_alloc(&data);
1005}
1006
1007static const struct acpi_device_id hpet_device_ids[] = {
1008 {"PNP0103", 0},
1009 {"", 0},
1010};
1011
1012static struct acpi_driver hpet_acpi_driver = {
1013 .name = "hpet",
1014 .ids = hpet_device_ids,
1015 .ops = {
1016 .add = hpet_acpi_add,
1017 },
1018};
1019
1020static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1021
1022static int __init hpet_init(void)
1023{
1024 int result;
1025
1026 result = misc_register(&hpet_misc);
1027 if (result < 0)
1028 return -ENODEV;
1029
1030 sysctl_header = register_sysctl("dev/hpet", hpet_table);
1031
1032 result = acpi_bus_register_driver(&hpet_acpi_driver);
1033 if (result < 0) {
1034 if (sysctl_header)
1035 unregister_sysctl_table(sysctl_header);
1036 misc_deregister(&hpet_misc);
1037 return result;
1038 }
1039
1040 return 0;
1041}
1042device_initcall(hpet_init);
1043
1044/*
1045MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1046MODULE_LICENSE("GPL");
1047*/