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1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val << shift, buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val << shift, buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val << shift, buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
312}
313
314static void regmap_parse_inplace_noop(void *buf)
315{
316}
317
318static unsigned int regmap_parse_8(const void *buf)
319{
320 const u8 *b = buf;
321
322 return b[0];
323}
324
325static unsigned int regmap_parse_16_be(const void *buf)
326{
327 return get_unaligned_be16(buf);
328}
329
330static unsigned int regmap_parse_16_le(const void *buf)
331{
332 return get_unaligned_le16(buf);
333}
334
335static void regmap_parse_16_be_inplace(void *buf)
336{
337 u16 v = get_unaligned_be16(buf);
338
339 memcpy(buf, &v, sizeof(v));
340}
341
342static void regmap_parse_16_le_inplace(void *buf)
343{
344 u16 v = get_unaligned_le16(buf);
345
346 memcpy(buf, &v, sizeof(v));
347}
348
349static unsigned int regmap_parse_16_native(const void *buf)
350{
351 u16 v;
352
353 memcpy(&v, buf, sizeof(v));
354 return v;
355}
356
357static unsigned int regmap_parse_24_be(const void *buf)
358{
359 return get_unaligned_be24(buf);
360}
361
362static unsigned int regmap_parse_32_be(const void *buf)
363{
364 return get_unaligned_be32(buf);
365}
366
367static unsigned int regmap_parse_32_le(const void *buf)
368{
369 return get_unaligned_le32(buf);
370}
371
372static void regmap_parse_32_be_inplace(void *buf)
373{
374 u32 v = get_unaligned_be32(buf);
375
376 memcpy(buf, &v, sizeof(v));
377}
378
379static void regmap_parse_32_le_inplace(void *buf)
380{
381 u32 v = get_unaligned_le32(buf);
382
383 memcpy(buf, &v, sizeof(v));
384}
385
386static unsigned int regmap_parse_32_native(const void *buf)
387{
388 u32 v;
389
390 memcpy(&v, buf, sizeof(v));
391 return v;
392}
393
394static void regmap_lock_hwlock(void *__map)
395{
396 struct regmap *map = __map;
397
398 hwspin_lock_timeout(map->hwlock, UINT_MAX);
399}
400
401static void regmap_lock_hwlock_irq(void *__map)
402{
403 struct regmap *map = __map;
404
405 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
406}
407
408static void regmap_lock_hwlock_irqsave(void *__map)
409{
410 struct regmap *map = __map;
411
412 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
413 &map->spinlock_flags);
414}
415
416static void regmap_unlock_hwlock(void *__map)
417{
418 struct regmap *map = __map;
419
420 hwspin_unlock(map->hwlock);
421}
422
423static void regmap_unlock_hwlock_irq(void *__map)
424{
425 struct regmap *map = __map;
426
427 hwspin_unlock_irq(map->hwlock);
428}
429
430static void regmap_unlock_hwlock_irqrestore(void *__map)
431{
432 struct regmap *map = __map;
433
434 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
435}
436
437static void regmap_lock_unlock_none(void *__map)
438{
439
440}
441
442static void regmap_lock_mutex(void *__map)
443{
444 struct regmap *map = __map;
445 mutex_lock(&map->mutex);
446}
447
448static void regmap_unlock_mutex(void *__map)
449{
450 struct regmap *map = __map;
451 mutex_unlock(&map->mutex);
452}
453
454static void regmap_lock_spinlock(void *__map)
455__acquires(&map->spinlock)
456{
457 struct regmap *map = __map;
458 unsigned long flags;
459
460 spin_lock_irqsave(&map->spinlock, flags);
461 map->spinlock_flags = flags;
462}
463
464static void regmap_unlock_spinlock(void *__map)
465__releases(&map->spinlock)
466{
467 struct regmap *map = __map;
468 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
469}
470
471static void regmap_lock_raw_spinlock(void *__map)
472__acquires(&map->raw_spinlock)
473{
474 struct regmap *map = __map;
475 unsigned long flags;
476
477 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478 map->raw_spinlock_flags = flags;
479}
480
481static void regmap_unlock_raw_spinlock(void *__map)
482__releases(&map->raw_spinlock)
483{
484 struct regmap *map = __map;
485 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486}
487
488static void dev_get_regmap_release(struct device *dev, void *res)
489{
490 /*
491 * We don't actually have anything to do here; the goal here
492 * is not to manage the regmap but to provide a simple way to
493 * get the regmap back given a struct device.
494 */
495}
496
497static bool _regmap_range_add(struct regmap *map,
498 struct regmap_range_node *data)
499{
500 struct rb_root *root = &map->range_tree;
501 struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503 while (*new) {
504 struct regmap_range_node *this =
505 rb_entry(*new, struct regmap_range_node, node);
506
507 parent = *new;
508 if (data->range_max < this->range_min)
509 new = &((*new)->rb_left);
510 else if (data->range_min > this->range_max)
511 new = &((*new)->rb_right);
512 else
513 return false;
514 }
515
516 rb_link_node(&data->node, parent, new);
517 rb_insert_color(&data->node, root);
518
519 return true;
520}
521
522static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523 unsigned int reg)
524{
525 struct rb_node *node = map->range_tree.rb_node;
526
527 while (node) {
528 struct regmap_range_node *this =
529 rb_entry(node, struct regmap_range_node, node);
530
531 if (reg < this->range_min)
532 node = node->rb_left;
533 else if (reg > this->range_max)
534 node = node->rb_right;
535 else
536 return this;
537 }
538
539 return NULL;
540}
541
542static void regmap_range_exit(struct regmap *map)
543{
544 struct rb_node *next;
545 struct regmap_range_node *range_node;
546
547 next = rb_first(&map->range_tree);
548 while (next) {
549 range_node = rb_entry(next, struct regmap_range_node, node);
550 next = rb_next(&range_node->node);
551 rb_erase(&range_node->node, &map->range_tree);
552 kfree(range_node);
553 }
554
555 kfree(map->selector_work_buf);
556}
557
558static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559{
560 if (config->name) {
561 const char *name = kstrdup_const(config->name, GFP_KERNEL);
562
563 if (!name)
564 return -ENOMEM;
565
566 kfree_const(map->name);
567 map->name = name;
568 }
569
570 return 0;
571}
572
573int regmap_attach_dev(struct device *dev, struct regmap *map,
574 const struct regmap_config *config)
575{
576 struct regmap **m;
577 int ret;
578
579 map->dev = dev;
580
581 ret = regmap_set_name(map, config);
582 if (ret)
583 return ret;
584
585 regmap_debugfs_exit(map);
586 regmap_debugfs_init(map);
587
588 /* Add a devres resource for dev_get_regmap() */
589 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590 if (!m) {
591 regmap_debugfs_exit(map);
592 return -ENOMEM;
593 }
594 *m = map;
595 devres_add(dev, m);
596
597 return 0;
598}
599EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
602 const struct regmap_config *config)
603{
604 enum regmap_endian endian;
605
606 /* Retrieve the endianness specification from the regmap config */
607 endian = config->reg_format_endian;
608
609 /* If the regmap config specified a non-default value, use that */
610 if (endian != REGMAP_ENDIAN_DEFAULT)
611 return endian;
612
613 /* Retrieve the endianness specification from the bus config */
614 if (bus && bus->reg_format_endian_default)
615 endian = bus->reg_format_endian_default;
616
617 /* If the bus specified a non-default value, use that */
618 if (endian != REGMAP_ENDIAN_DEFAULT)
619 return endian;
620
621 /* Use this if no other value was found */
622 return REGMAP_ENDIAN_BIG;
623}
624
625enum regmap_endian regmap_get_val_endian(struct device *dev,
626 const struct regmap_bus *bus,
627 const struct regmap_config *config)
628{
629 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
630 enum regmap_endian endian;
631
632 /* Retrieve the endianness specification from the regmap config */
633 endian = config->val_format_endian;
634
635 /* If the regmap config specified a non-default value, use that */
636 if (endian != REGMAP_ENDIAN_DEFAULT)
637 return endian;
638
639 /* If the firmware node exist try to get endianness from it */
640 if (fwnode_property_read_bool(fwnode, "big-endian"))
641 endian = REGMAP_ENDIAN_BIG;
642 else if (fwnode_property_read_bool(fwnode, "little-endian"))
643 endian = REGMAP_ENDIAN_LITTLE;
644 else if (fwnode_property_read_bool(fwnode, "native-endian"))
645 endian = REGMAP_ENDIAN_NATIVE;
646
647 /* If the endianness was specified in fwnode, use that */
648 if (endian != REGMAP_ENDIAN_DEFAULT)
649 return endian;
650
651 /* Retrieve the endianness specification from the bus config */
652 if (bus && bus->val_format_endian_default)
653 endian = bus->val_format_endian_default;
654
655 /* If the bus specified a non-default value, use that */
656 if (endian != REGMAP_ENDIAN_DEFAULT)
657 return endian;
658
659 /* Use this if no other value was found */
660 return REGMAP_ENDIAN_BIG;
661}
662EXPORT_SYMBOL_GPL(regmap_get_val_endian);
663
664struct regmap *__regmap_init(struct device *dev,
665 const struct regmap_bus *bus,
666 void *bus_context,
667 const struct regmap_config *config,
668 struct lock_class_key *lock_key,
669 const char *lock_name)
670{
671 struct regmap *map;
672 int ret = -EINVAL;
673 enum regmap_endian reg_endian, val_endian;
674 int i, j;
675
676 if (!config)
677 goto err;
678
679 map = kzalloc(sizeof(*map), GFP_KERNEL);
680 if (map == NULL) {
681 ret = -ENOMEM;
682 goto err;
683 }
684
685 ret = regmap_set_name(map, config);
686 if (ret)
687 goto err_map;
688
689 ret = -EINVAL; /* Later error paths rely on this */
690
691 if (config->disable_locking) {
692 map->lock = map->unlock = regmap_lock_unlock_none;
693 map->can_sleep = config->can_sleep;
694 regmap_debugfs_disable(map);
695 } else if (config->lock && config->unlock) {
696 map->lock = config->lock;
697 map->unlock = config->unlock;
698 map->lock_arg = config->lock_arg;
699 map->can_sleep = config->can_sleep;
700 } else if (config->use_hwlock) {
701 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
702 if (!map->hwlock) {
703 ret = -ENXIO;
704 goto err_name;
705 }
706
707 switch (config->hwlock_mode) {
708 case HWLOCK_IRQSTATE:
709 map->lock = regmap_lock_hwlock_irqsave;
710 map->unlock = regmap_unlock_hwlock_irqrestore;
711 break;
712 case HWLOCK_IRQ:
713 map->lock = regmap_lock_hwlock_irq;
714 map->unlock = regmap_unlock_hwlock_irq;
715 break;
716 default:
717 map->lock = regmap_lock_hwlock;
718 map->unlock = regmap_unlock_hwlock;
719 break;
720 }
721
722 map->lock_arg = map;
723 } else {
724 if ((bus && bus->fast_io) ||
725 config->fast_io) {
726 if (config->use_raw_spinlock) {
727 raw_spin_lock_init(&map->raw_spinlock);
728 map->lock = regmap_lock_raw_spinlock;
729 map->unlock = regmap_unlock_raw_spinlock;
730 lockdep_set_class_and_name(&map->raw_spinlock,
731 lock_key, lock_name);
732 } else {
733 spin_lock_init(&map->spinlock);
734 map->lock = regmap_lock_spinlock;
735 map->unlock = regmap_unlock_spinlock;
736 lockdep_set_class_and_name(&map->spinlock,
737 lock_key, lock_name);
738 }
739 } else {
740 mutex_init(&map->mutex);
741 map->lock = regmap_lock_mutex;
742 map->unlock = regmap_unlock_mutex;
743 map->can_sleep = true;
744 lockdep_set_class_and_name(&map->mutex,
745 lock_key, lock_name);
746 }
747 map->lock_arg = map;
748 }
749
750 /*
751 * When we write in fast-paths with regmap_bulk_write() don't allocate
752 * scratch buffers with sleeping allocations.
753 */
754 if ((bus && bus->fast_io) || config->fast_io)
755 map->alloc_flags = GFP_ATOMIC;
756 else
757 map->alloc_flags = GFP_KERNEL;
758
759 map->reg_base = config->reg_base;
760
761 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762 map->format.pad_bytes = config->pad_bits / 8;
763 map->format.reg_shift = config->reg_shift;
764 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
765 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
766 config->val_bits + config->pad_bits, 8);
767 map->reg_shift = config->pad_bits % 8;
768 if (config->reg_stride)
769 map->reg_stride = config->reg_stride;
770 else
771 map->reg_stride = 1;
772 if (is_power_of_2(map->reg_stride))
773 map->reg_stride_order = ilog2(map->reg_stride);
774 else
775 map->reg_stride_order = -1;
776 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779 if (bus) {
780 map->max_raw_read = bus->max_raw_read;
781 map->max_raw_write = bus->max_raw_write;
782 } else if (config->max_raw_read && config->max_raw_write) {
783 map->max_raw_read = config->max_raw_read;
784 map->max_raw_write = config->max_raw_write;
785 }
786 map->dev = dev;
787 map->bus = bus;
788 map->bus_context = bus_context;
789 map->max_register = config->max_register;
790 map->wr_table = config->wr_table;
791 map->rd_table = config->rd_table;
792 map->volatile_table = config->volatile_table;
793 map->precious_table = config->precious_table;
794 map->wr_noinc_table = config->wr_noinc_table;
795 map->rd_noinc_table = config->rd_noinc_table;
796 map->writeable_reg = config->writeable_reg;
797 map->readable_reg = config->readable_reg;
798 map->volatile_reg = config->volatile_reg;
799 map->precious_reg = config->precious_reg;
800 map->writeable_noinc_reg = config->writeable_noinc_reg;
801 map->readable_noinc_reg = config->readable_noinc_reg;
802 map->cache_type = config->cache_type;
803
804 spin_lock_init(&map->async_lock);
805 INIT_LIST_HEAD(&map->async_list);
806 INIT_LIST_HEAD(&map->async_free);
807 init_waitqueue_head(&map->async_waitq);
808
809 if (config->read_flag_mask ||
810 config->write_flag_mask ||
811 config->zero_flag_mask) {
812 map->read_flag_mask = config->read_flag_mask;
813 map->write_flag_mask = config->write_flag_mask;
814 } else if (bus) {
815 map->read_flag_mask = bus->read_flag_mask;
816 }
817
818 if (config && config->read && config->write) {
819 map->reg_read = _regmap_bus_read;
820 if (config->reg_update_bits)
821 map->reg_update_bits = config->reg_update_bits;
822
823 /* Bulk read/write */
824 map->read = config->read;
825 map->write = config->write;
826
827 reg_endian = REGMAP_ENDIAN_NATIVE;
828 val_endian = REGMAP_ENDIAN_NATIVE;
829 } else if (!bus) {
830 map->reg_read = config->reg_read;
831 map->reg_write = config->reg_write;
832 map->reg_update_bits = config->reg_update_bits;
833
834 map->defer_caching = false;
835 goto skip_format_initialization;
836 } else if (!bus->read || !bus->write) {
837 map->reg_read = _regmap_bus_reg_read;
838 map->reg_write = _regmap_bus_reg_write;
839 map->reg_update_bits = bus->reg_update_bits;
840
841 map->defer_caching = false;
842 goto skip_format_initialization;
843 } else {
844 map->reg_read = _regmap_bus_read;
845 map->reg_update_bits = bus->reg_update_bits;
846 /* Bulk read/write */
847 map->read = bus->read;
848 map->write = bus->write;
849
850 reg_endian = regmap_get_reg_endian(bus, config);
851 val_endian = regmap_get_val_endian(dev, bus, config);
852 }
853
854 switch (config->reg_bits + map->reg_shift) {
855 case 2:
856 switch (config->val_bits) {
857 case 6:
858 map->format.format_write = regmap_format_2_6_write;
859 break;
860 default:
861 goto err_hwlock;
862 }
863 break;
864
865 case 4:
866 switch (config->val_bits) {
867 case 12:
868 map->format.format_write = regmap_format_4_12_write;
869 break;
870 default:
871 goto err_hwlock;
872 }
873 break;
874
875 case 7:
876 switch (config->val_bits) {
877 case 9:
878 map->format.format_write = regmap_format_7_9_write;
879 break;
880 case 17:
881 map->format.format_write = regmap_format_7_17_write;
882 break;
883 default:
884 goto err_hwlock;
885 }
886 break;
887
888 case 10:
889 switch (config->val_bits) {
890 case 14:
891 map->format.format_write = regmap_format_10_14_write;
892 break;
893 default:
894 goto err_hwlock;
895 }
896 break;
897
898 case 12:
899 switch (config->val_bits) {
900 case 20:
901 map->format.format_write = regmap_format_12_20_write;
902 break;
903 default:
904 goto err_hwlock;
905 }
906 break;
907
908 case 8:
909 map->format.format_reg = regmap_format_8;
910 break;
911
912 case 16:
913 switch (reg_endian) {
914 case REGMAP_ENDIAN_BIG:
915 map->format.format_reg = regmap_format_16_be;
916 break;
917 case REGMAP_ENDIAN_LITTLE:
918 map->format.format_reg = regmap_format_16_le;
919 break;
920 case REGMAP_ENDIAN_NATIVE:
921 map->format.format_reg = regmap_format_16_native;
922 break;
923 default:
924 goto err_hwlock;
925 }
926 break;
927
928 case 24:
929 switch (reg_endian) {
930 case REGMAP_ENDIAN_BIG:
931 map->format.format_reg = regmap_format_24_be;
932 break;
933 default:
934 goto err_hwlock;
935 }
936 break;
937
938 case 32:
939 switch (reg_endian) {
940 case REGMAP_ENDIAN_BIG:
941 map->format.format_reg = regmap_format_32_be;
942 break;
943 case REGMAP_ENDIAN_LITTLE:
944 map->format.format_reg = regmap_format_32_le;
945 break;
946 case REGMAP_ENDIAN_NATIVE:
947 map->format.format_reg = regmap_format_32_native;
948 break;
949 default:
950 goto err_hwlock;
951 }
952 break;
953
954 default:
955 goto err_hwlock;
956 }
957
958 if (val_endian == REGMAP_ENDIAN_NATIVE)
959 map->format.parse_inplace = regmap_parse_inplace_noop;
960
961 switch (config->val_bits) {
962 case 8:
963 map->format.format_val = regmap_format_8;
964 map->format.parse_val = regmap_parse_8;
965 map->format.parse_inplace = regmap_parse_inplace_noop;
966 break;
967 case 16:
968 switch (val_endian) {
969 case REGMAP_ENDIAN_BIG:
970 map->format.format_val = regmap_format_16_be;
971 map->format.parse_val = regmap_parse_16_be;
972 map->format.parse_inplace = regmap_parse_16_be_inplace;
973 break;
974 case REGMAP_ENDIAN_LITTLE:
975 map->format.format_val = regmap_format_16_le;
976 map->format.parse_val = regmap_parse_16_le;
977 map->format.parse_inplace = regmap_parse_16_le_inplace;
978 break;
979 case REGMAP_ENDIAN_NATIVE:
980 map->format.format_val = regmap_format_16_native;
981 map->format.parse_val = regmap_parse_16_native;
982 break;
983 default:
984 goto err_hwlock;
985 }
986 break;
987 case 24:
988 switch (val_endian) {
989 case REGMAP_ENDIAN_BIG:
990 map->format.format_val = regmap_format_24_be;
991 map->format.parse_val = regmap_parse_24_be;
992 break;
993 default:
994 goto err_hwlock;
995 }
996 break;
997 case 32:
998 switch (val_endian) {
999 case REGMAP_ENDIAN_BIG:
1000 map->format.format_val = regmap_format_32_be;
1001 map->format.parse_val = regmap_parse_32_be;
1002 map->format.parse_inplace = regmap_parse_32_be_inplace;
1003 break;
1004 case REGMAP_ENDIAN_LITTLE:
1005 map->format.format_val = regmap_format_32_le;
1006 map->format.parse_val = regmap_parse_32_le;
1007 map->format.parse_inplace = regmap_parse_32_le_inplace;
1008 break;
1009 case REGMAP_ENDIAN_NATIVE:
1010 map->format.format_val = regmap_format_32_native;
1011 map->format.parse_val = regmap_parse_32_native;
1012 break;
1013 default:
1014 goto err_hwlock;
1015 }
1016 break;
1017 }
1018
1019 if (map->format.format_write) {
1020 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1021 (val_endian != REGMAP_ENDIAN_BIG))
1022 goto err_hwlock;
1023 map->use_single_write = true;
1024 }
1025
1026 if (!map->format.format_write &&
1027 !(map->format.format_reg && map->format.format_val))
1028 goto err_hwlock;
1029
1030 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1031 if (map->work_buf == NULL) {
1032 ret = -ENOMEM;
1033 goto err_hwlock;
1034 }
1035
1036 if (map->format.format_write) {
1037 map->defer_caching = false;
1038 map->reg_write = _regmap_bus_formatted_write;
1039 } else if (map->format.format_val) {
1040 map->defer_caching = true;
1041 map->reg_write = _regmap_bus_raw_write;
1042 }
1043
1044skip_format_initialization:
1045
1046 map->range_tree = RB_ROOT;
1047 for (i = 0; i < config->num_ranges; i++) {
1048 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1049 struct regmap_range_node *new;
1050
1051 /* Sanity check */
1052 if (range_cfg->range_max < range_cfg->range_min) {
1053 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1054 range_cfg->range_max, range_cfg->range_min);
1055 goto err_range;
1056 }
1057
1058 if (range_cfg->range_max > map->max_register) {
1059 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1060 range_cfg->range_max, map->max_register);
1061 goto err_range;
1062 }
1063
1064 if (range_cfg->selector_reg > map->max_register) {
1065 dev_err(map->dev,
1066 "Invalid range %d: selector out of map\n", i);
1067 goto err_range;
1068 }
1069
1070 if (range_cfg->window_len == 0) {
1071 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1072 i);
1073 goto err_range;
1074 }
1075
1076 /* Make sure, that this register range has no selector
1077 or data window within its boundary */
1078 for (j = 0; j < config->num_ranges; j++) {
1079 unsigned int sel_reg = config->ranges[j].selector_reg;
1080 unsigned int win_min = config->ranges[j].window_start;
1081 unsigned int win_max = win_min +
1082 config->ranges[j].window_len - 1;
1083
1084 /* Allow data window inside its own virtual range */
1085 if (j == i)
1086 continue;
1087
1088 if (range_cfg->range_min <= sel_reg &&
1089 sel_reg <= range_cfg->range_max) {
1090 dev_err(map->dev,
1091 "Range %d: selector for %d in window\n",
1092 i, j);
1093 goto err_range;
1094 }
1095
1096 if (!(win_max < range_cfg->range_min ||
1097 win_min > range_cfg->range_max)) {
1098 dev_err(map->dev,
1099 "Range %d: window for %d in window\n",
1100 i, j);
1101 goto err_range;
1102 }
1103 }
1104
1105 new = kzalloc(sizeof(*new), GFP_KERNEL);
1106 if (new == NULL) {
1107 ret = -ENOMEM;
1108 goto err_range;
1109 }
1110
1111 new->map = map;
1112 new->name = range_cfg->name;
1113 new->range_min = range_cfg->range_min;
1114 new->range_max = range_cfg->range_max;
1115 new->selector_reg = range_cfg->selector_reg;
1116 new->selector_mask = range_cfg->selector_mask;
1117 new->selector_shift = range_cfg->selector_shift;
1118 new->window_start = range_cfg->window_start;
1119 new->window_len = range_cfg->window_len;
1120
1121 if (!_regmap_range_add(map, new)) {
1122 dev_err(map->dev, "Failed to add range %d\n", i);
1123 kfree(new);
1124 goto err_range;
1125 }
1126
1127 if (map->selector_work_buf == NULL) {
1128 map->selector_work_buf =
1129 kzalloc(map->format.buf_size, GFP_KERNEL);
1130 if (map->selector_work_buf == NULL) {
1131 ret = -ENOMEM;
1132 goto err_range;
1133 }
1134 }
1135 }
1136
1137 ret = regcache_init(map, config);
1138 if (ret != 0)
1139 goto err_range;
1140
1141 if (dev) {
1142 ret = regmap_attach_dev(dev, map, config);
1143 if (ret != 0)
1144 goto err_regcache;
1145 } else {
1146 regmap_debugfs_init(map);
1147 }
1148
1149 return map;
1150
1151err_regcache:
1152 regcache_exit(map);
1153err_range:
1154 regmap_range_exit(map);
1155 kfree(map->work_buf);
1156err_hwlock:
1157 if (map->hwlock)
1158 hwspin_lock_free(map->hwlock);
1159err_name:
1160 kfree_const(map->name);
1161err_map:
1162 kfree(map);
1163err:
1164 return ERR_PTR(ret);
1165}
1166EXPORT_SYMBOL_GPL(__regmap_init);
1167
1168static void devm_regmap_release(struct device *dev, void *res)
1169{
1170 regmap_exit(*(struct regmap **)res);
1171}
1172
1173struct regmap *__devm_regmap_init(struct device *dev,
1174 const struct regmap_bus *bus,
1175 void *bus_context,
1176 const struct regmap_config *config,
1177 struct lock_class_key *lock_key,
1178 const char *lock_name)
1179{
1180 struct regmap **ptr, *regmap;
1181
1182 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1183 if (!ptr)
1184 return ERR_PTR(-ENOMEM);
1185
1186 regmap = __regmap_init(dev, bus, bus_context, config,
1187 lock_key, lock_name);
1188 if (!IS_ERR(regmap)) {
1189 *ptr = regmap;
1190 devres_add(dev, ptr);
1191 } else {
1192 devres_free(ptr);
1193 }
1194
1195 return regmap;
1196}
1197EXPORT_SYMBOL_GPL(__devm_regmap_init);
1198
1199static void regmap_field_init(struct regmap_field *rm_field,
1200 struct regmap *regmap, struct reg_field reg_field)
1201{
1202 rm_field->regmap = regmap;
1203 rm_field->reg = reg_field.reg;
1204 rm_field->shift = reg_field.lsb;
1205 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1206
1207 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1208
1209 rm_field->id_size = reg_field.id_size;
1210 rm_field->id_offset = reg_field.id_offset;
1211}
1212
1213/**
1214 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1215 *
1216 * @dev: Device that will be interacted with
1217 * @regmap: regmap bank in which this register field is located.
1218 * @reg_field: Register field with in the bank.
1219 *
1220 * The return value will be an ERR_PTR() on error or a valid pointer
1221 * to a struct regmap_field. The regmap_field will be automatically freed
1222 * by the device management code.
1223 */
1224struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1225 struct regmap *regmap, struct reg_field reg_field)
1226{
1227 struct regmap_field *rm_field = devm_kzalloc(dev,
1228 sizeof(*rm_field), GFP_KERNEL);
1229 if (!rm_field)
1230 return ERR_PTR(-ENOMEM);
1231
1232 regmap_field_init(rm_field, regmap, reg_field);
1233
1234 return rm_field;
1235
1236}
1237EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1238
1239
1240/**
1241 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1242 *
1243 * @regmap: regmap bank in which this register field is located.
1244 * @rm_field: regmap register fields within the bank.
1245 * @reg_field: Register fields within the bank.
1246 * @num_fields: Number of register fields.
1247 *
1248 * The return value will be an -ENOMEM on error or zero for success.
1249 * Newly allocated regmap_fields should be freed by calling
1250 * regmap_field_bulk_free()
1251 */
1252int regmap_field_bulk_alloc(struct regmap *regmap,
1253 struct regmap_field **rm_field,
1254 const struct reg_field *reg_field,
1255 int num_fields)
1256{
1257 struct regmap_field *rf;
1258 int i;
1259
1260 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1261 if (!rf)
1262 return -ENOMEM;
1263
1264 for (i = 0; i < num_fields; i++) {
1265 regmap_field_init(&rf[i], regmap, reg_field[i]);
1266 rm_field[i] = &rf[i];
1267 }
1268
1269 return 0;
1270}
1271EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1272
1273/**
1274 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1275 * fields.
1276 *
1277 * @dev: Device that will be interacted with
1278 * @regmap: regmap bank in which this register field is located.
1279 * @rm_field: regmap register fields within the bank.
1280 * @reg_field: Register fields within the bank.
1281 * @num_fields: Number of register fields.
1282 *
1283 * The return value will be an -ENOMEM on error or zero for success.
1284 * Newly allocated regmap_fields will be automatically freed by the
1285 * device management code.
1286 */
1287int devm_regmap_field_bulk_alloc(struct device *dev,
1288 struct regmap *regmap,
1289 struct regmap_field **rm_field,
1290 const struct reg_field *reg_field,
1291 int num_fields)
1292{
1293 struct regmap_field *rf;
1294 int i;
1295
1296 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1297 if (!rf)
1298 return -ENOMEM;
1299
1300 for (i = 0; i < num_fields; i++) {
1301 regmap_field_init(&rf[i], regmap, reg_field[i]);
1302 rm_field[i] = &rf[i];
1303 }
1304
1305 return 0;
1306}
1307EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1308
1309/**
1310 * regmap_field_bulk_free() - Free register field allocated using
1311 * regmap_field_bulk_alloc.
1312 *
1313 * @field: regmap fields which should be freed.
1314 */
1315void regmap_field_bulk_free(struct regmap_field *field)
1316{
1317 kfree(field);
1318}
1319EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1320
1321/**
1322 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1323 * devm_regmap_field_bulk_alloc.
1324 *
1325 * @dev: Device that will be interacted with
1326 * @field: regmap field which should be freed.
1327 *
1328 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1329 * drivers need not call this function, as the memory allocated via devm
1330 * will be freed as per device-driver life-cycle.
1331 */
1332void devm_regmap_field_bulk_free(struct device *dev,
1333 struct regmap_field *field)
1334{
1335 devm_kfree(dev, field);
1336}
1337EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1338
1339/**
1340 * devm_regmap_field_free() - Free a register field allocated using
1341 * devm_regmap_field_alloc.
1342 *
1343 * @dev: Device that will be interacted with
1344 * @field: regmap field which should be freed.
1345 *
1346 * Free register field allocated using devm_regmap_field_alloc(). Usually
1347 * drivers need not call this function, as the memory allocated via devm
1348 * will be freed as per device-driver life-cyle.
1349 */
1350void devm_regmap_field_free(struct device *dev,
1351 struct regmap_field *field)
1352{
1353 devm_kfree(dev, field);
1354}
1355EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1356
1357/**
1358 * regmap_field_alloc() - Allocate and initialise a register field.
1359 *
1360 * @regmap: regmap bank in which this register field is located.
1361 * @reg_field: Register field with in the bank.
1362 *
1363 * The return value will be an ERR_PTR() on error or a valid pointer
1364 * to a struct regmap_field. The regmap_field should be freed by the
1365 * user once its finished working with it using regmap_field_free().
1366 */
1367struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1368 struct reg_field reg_field)
1369{
1370 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1371
1372 if (!rm_field)
1373 return ERR_PTR(-ENOMEM);
1374
1375 regmap_field_init(rm_field, regmap, reg_field);
1376
1377 return rm_field;
1378}
1379EXPORT_SYMBOL_GPL(regmap_field_alloc);
1380
1381/**
1382 * regmap_field_free() - Free register field allocated using
1383 * regmap_field_alloc.
1384 *
1385 * @field: regmap field which should be freed.
1386 */
1387void regmap_field_free(struct regmap_field *field)
1388{
1389 kfree(field);
1390}
1391EXPORT_SYMBOL_GPL(regmap_field_free);
1392
1393/**
1394 * regmap_reinit_cache() - Reinitialise the current register cache
1395 *
1396 * @map: Register map to operate on.
1397 * @config: New configuration. Only the cache data will be used.
1398 *
1399 * Discard any existing register cache for the map and initialize a
1400 * new cache. This can be used to restore the cache to defaults or to
1401 * update the cache configuration to reflect runtime discovery of the
1402 * hardware.
1403 *
1404 * No explicit locking is done here, the user needs to ensure that
1405 * this function will not race with other calls to regmap.
1406 */
1407int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1408{
1409 int ret;
1410
1411 regcache_exit(map);
1412 regmap_debugfs_exit(map);
1413
1414 map->max_register = config->max_register;
1415 map->writeable_reg = config->writeable_reg;
1416 map->readable_reg = config->readable_reg;
1417 map->volatile_reg = config->volatile_reg;
1418 map->precious_reg = config->precious_reg;
1419 map->writeable_noinc_reg = config->writeable_noinc_reg;
1420 map->readable_noinc_reg = config->readable_noinc_reg;
1421 map->cache_type = config->cache_type;
1422
1423 ret = regmap_set_name(map, config);
1424 if (ret)
1425 return ret;
1426
1427 regmap_debugfs_init(map);
1428
1429 map->cache_bypass = false;
1430 map->cache_only = false;
1431
1432 return regcache_init(map, config);
1433}
1434EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1435
1436/**
1437 * regmap_exit() - Free a previously allocated register map
1438 *
1439 * @map: Register map to operate on.
1440 */
1441void regmap_exit(struct regmap *map)
1442{
1443 struct regmap_async *async;
1444
1445 regcache_exit(map);
1446 regmap_debugfs_exit(map);
1447 regmap_range_exit(map);
1448 if (map->bus && map->bus->free_context)
1449 map->bus->free_context(map->bus_context);
1450 kfree(map->work_buf);
1451 while (!list_empty(&map->async_free)) {
1452 async = list_first_entry_or_null(&map->async_free,
1453 struct regmap_async,
1454 list);
1455 list_del(&async->list);
1456 kfree(async->work_buf);
1457 kfree(async);
1458 }
1459 if (map->hwlock)
1460 hwspin_lock_free(map->hwlock);
1461 if (map->lock == regmap_lock_mutex)
1462 mutex_destroy(&map->mutex);
1463 kfree_const(map->name);
1464 kfree(map->patch);
1465 if (map->bus && map->bus->free_on_exit)
1466 kfree(map->bus);
1467 kfree(map);
1468}
1469EXPORT_SYMBOL_GPL(regmap_exit);
1470
1471static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1472{
1473 struct regmap **r = res;
1474 if (!r || !*r) {
1475 WARN_ON(!r || !*r);
1476 return 0;
1477 }
1478
1479 /* If the user didn't specify a name match any */
1480 if (data)
1481 return (*r)->name && !strcmp((*r)->name, data);
1482 else
1483 return 1;
1484}
1485
1486/**
1487 * dev_get_regmap() - Obtain the regmap (if any) for a device
1488 *
1489 * @dev: Device to retrieve the map for
1490 * @name: Optional name for the register map, usually NULL.
1491 *
1492 * Returns the regmap for the device if one is present, or NULL. If
1493 * name is specified then it must match the name specified when
1494 * registering the device, if it is NULL then the first regmap found
1495 * will be used. Devices with multiple register maps are very rare,
1496 * generic code should normally not need to specify a name.
1497 */
1498struct regmap *dev_get_regmap(struct device *dev, const char *name)
1499{
1500 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1501 dev_get_regmap_match, (void *)name);
1502
1503 if (!r)
1504 return NULL;
1505 return *r;
1506}
1507EXPORT_SYMBOL_GPL(dev_get_regmap);
1508
1509/**
1510 * regmap_get_device() - Obtain the device from a regmap
1511 *
1512 * @map: Register map to operate on.
1513 *
1514 * Returns the underlying device that the regmap has been created for.
1515 */
1516struct device *regmap_get_device(struct regmap *map)
1517{
1518 return map->dev;
1519}
1520EXPORT_SYMBOL_GPL(regmap_get_device);
1521
1522static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1523 struct regmap_range_node *range,
1524 unsigned int val_num)
1525{
1526 void *orig_work_buf;
1527 unsigned int win_offset;
1528 unsigned int win_page;
1529 bool page_chg;
1530 int ret;
1531
1532 win_offset = (*reg - range->range_min) % range->window_len;
1533 win_page = (*reg - range->range_min) / range->window_len;
1534
1535 if (val_num > 1) {
1536 /* Bulk write shouldn't cross range boundary */
1537 if (*reg + val_num - 1 > range->range_max)
1538 return -EINVAL;
1539
1540 /* ... or single page boundary */
1541 if (val_num > range->window_len - win_offset)
1542 return -EINVAL;
1543 }
1544
1545 /* It is possible to have selector register inside data window.
1546 In that case, selector register is located on every page and
1547 it needs no page switching, when accessed alone. */
1548 if (val_num > 1 ||
1549 range->window_start + win_offset != range->selector_reg) {
1550 /* Use separate work_buf during page switching */
1551 orig_work_buf = map->work_buf;
1552 map->work_buf = map->selector_work_buf;
1553
1554 ret = _regmap_update_bits(map, range->selector_reg,
1555 range->selector_mask,
1556 win_page << range->selector_shift,
1557 &page_chg, false);
1558
1559 map->work_buf = orig_work_buf;
1560
1561 if (ret != 0)
1562 return ret;
1563 }
1564
1565 *reg = range->window_start + win_offset;
1566
1567 return 0;
1568}
1569
1570static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1571 unsigned long mask)
1572{
1573 u8 *buf;
1574 int i;
1575
1576 if (!mask || !map->work_buf)
1577 return;
1578
1579 buf = map->work_buf;
1580
1581 for (i = 0; i < max_bytes; i++)
1582 buf[i] |= (mask >> (8 * i)) & 0xff;
1583}
1584
1585static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1586{
1587 reg += map->reg_base;
1588
1589 if (map->format.reg_shift > 0)
1590 reg >>= map->format.reg_shift;
1591 else if (map->format.reg_shift < 0)
1592 reg <<= -(map->format.reg_shift);
1593
1594 return reg;
1595}
1596
1597static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1598 const void *val, size_t val_len, bool noinc)
1599{
1600 struct regmap_range_node *range;
1601 unsigned long flags;
1602 void *work_val = map->work_buf + map->format.reg_bytes +
1603 map->format.pad_bytes;
1604 void *buf;
1605 int ret = -ENOTSUPP;
1606 size_t len;
1607 int i;
1608
1609 /* Check for unwritable or noinc registers in range
1610 * before we start
1611 */
1612 if (!regmap_writeable_noinc(map, reg)) {
1613 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1614 unsigned int element =
1615 reg + regmap_get_offset(map, i);
1616 if (!regmap_writeable(map, element) ||
1617 regmap_writeable_noinc(map, element))
1618 return -EINVAL;
1619 }
1620 }
1621
1622 if (!map->cache_bypass && map->format.parse_val) {
1623 unsigned int ival, offset;
1624 int val_bytes = map->format.val_bytes;
1625
1626 /* Cache the last written value for noinc writes */
1627 i = noinc ? val_len - val_bytes : 0;
1628 for (; i < val_len; i += val_bytes) {
1629 ival = map->format.parse_val(val + i);
1630 offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
1631 ret = regcache_write(map, reg + offset, ival);
1632 if (ret) {
1633 dev_err(map->dev,
1634 "Error in caching of register: %x ret: %d\n",
1635 reg + offset, ret);
1636 return ret;
1637 }
1638 }
1639 if (map->cache_only) {
1640 map->cache_dirty = true;
1641 return 0;
1642 }
1643 }
1644
1645 range = _regmap_range_lookup(map, reg);
1646 if (range) {
1647 int val_num = val_len / map->format.val_bytes;
1648 int win_offset = (reg - range->range_min) % range->window_len;
1649 int win_residue = range->window_len - win_offset;
1650
1651 /* If the write goes beyond the end of the window split it */
1652 while (val_num > win_residue) {
1653 dev_dbg(map->dev, "Writing window %d/%zu\n",
1654 win_residue, val_len / map->format.val_bytes);
1655 ret = _regmap_raw_write_impl(map, reg, val,
1656 win_residue *
1657 map->format.val_bytes, noinc);
1658 if (ret != 0)
1659 return ret;
1660
1661 reg += win_residue;
1662 val_num -= win_residue;
1663 val += win_residue * map->format.val_bytes;
1664 val_len -= win_residue * map->format.val_bytes;
1665
1666 win_offset = (reg - range->range_min) %
1667 range->window_len;
1668 win_residue = range->window_len - win_offset;
1669 }
1670
1671 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1672 if (ret != 0)
1673 return ret;
1674 }
1675
1676 reg = regmap_reg_addr(map, reg);
1677 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1678 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1679 map->write_flag_mask);
1680
1681 /*
1682 * Essentially all I/O mechanisms will be faster with a single
1683 * buffer to write. Since register syncs often generate raw
1684 * writes of single registers optimise that case.
1685 */
1686 if (val != work_val && val_len == map->format.val_bytes) {
1687 memcpy(work_val, val, map->format.val_bytes);
1688 val = work_val;
1689 }
1690
1691 if (map->async && map->bus && map->bus->async_write) {
1692 struct regmap_async *async;
1693
1694 trace_regmap_async_write_start(map, reg, val_len);
1695
1696 spin_lock_irqsave(&map->async_lock, flags);
1697 async = list_first_entry_or_null(&map->async_free,
1698 struct regmap_async,
1699 list);
1700 if (async)
1701 list_del(&async->list);
1702 spin_unlock_irqrestore(&map->async_lock, flags);
1703
1704 if (!async) {
1705 async = map->bus->async_alloc();
1706 if (!async)
1707 return -ENOMEM;
1708
1709 async->work_buf = kzalloc(map->format.buf_size,
1710 GFP_KERNEL | GFP_DMA);
1711 if (!async->work_buf) {
1712 kfree(async);
1713 return -ENOMEM;
1714 }
1715 }
1716
1717 async->map = map;
1718
1719 /* If the caller supplied the value we can use it safely. */
1720 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1721 map->format.reg_bytes + map->format.val_bytes);
1722
1723 spin_lock_irqsave(&map->async_lock, flags);
1724 list_add_tail(&async->list, &map->async_list);
1725 spin_unlock_irqrestore(&map->async_lock, flags);
1726
1727 if (val != work_val)
1728 ret = map->bus->async_write(map->bus_context,
1729 async->work_buf,
1730 map->format.reg_bytes +
1731 map->format.pad_bytes,
1732 val, val_len, async);
1733 else
1734 ret = map->bus->async_write(map->bus_context,
1735 async->work_buf,
1736 map->format.reg_bytes +
1737 map->format.pad_bytes +
1738 val_len, NULL, 0, async);
1739
1740 if (ret != 0) {
1741 dev_err(map->dev, "Failed to schedule write: %d\n",
1742 ret);
1743
1744 spin_lock_irqsave(&map->async_lock, flags);
1745 list_move(&async->list, &map->async_free);
1746 spin_unlock_irqrestore(&map->async_lock, flags);
1747 }
1748
1749 return ret;
1750 }
1751
1752 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1753
1754 /* If we're doing a single register write we can probably just
1755 * send the work_buf directly, otherwise try to do a gather
1756 * write.
1757 */
1758 if (val == work_val)
1759 ret = map->write(map->bus_context, map->work_buf,
1760 map->format.reg_bytes +
1761 map->format.pad_bytes +
1762 val_len);
1763 else if (map->bus && map->bus->gather_write)
1764 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1765 map->format.reg_bytes +
1766 map->format.pad_bytes,
1767 val, val_len);
1768 else
1769 ret = -ENOTSUPP;
1770
1771 /* If that didn't work fall back on linearising by hand. */
1772 if (ret == -ENOTSUPP) {
1773 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1774 buf = kzalloc(len, GFP_KERNEL);
1775 if (!buf)
1776 return -ENOMEM;
1777
1778 memcpy(buf, map->work_buf, map->format.reg_bytes);
1779 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1780 val, val_len);
1781 ret = map->write(map->bus_context, buf, len);
1782
1783 kfree(buf);
1784 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1785 /* regcache_drop_region() takes lock that we already have,
1786 * thus call map->cache_ops->drop() directly
1787 */
1788 if (map->cache_ops && map->cache_ops->drop)
1789 map->cache_ops->drop(map, reg, reg + 1);
1790 }
1791
1792 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1793
1794 return ret;
1795}
1796
1797/**
1798 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1799 *
1800 * @map: Map to check.
1801 */
1802bool regmap_can_raw_write(struct regmap *map)
1803{
1804 return map->write && map->format.format_val && map->format.format_reg;
1805}
1806EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1807
1808/**
1809 * regmap_get_raw_read_max - Get the maximum size we can read
1810 *
1811 * @map: Map to check.
1812 */
1813size_t regmap_get_raw_read_max(struct regmap *map)
1814{
1815 return map->max_raw_read;
1816}
1817EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1818
1819/**
1820 * regmap_get_raw_write_max - Get the maximum size we can read
1821 *
1822 * @map: Map to check.
1823 */
1824size_t regmap_get_raw_write_max(struct regmap *map)
1825{
1826 return map->max_raw_write;
1827}
1828EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1829
1830static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1831 unsigned int val)
1832{
1833 int ret;
1834 struct regmap_range_node *range;
1835 struct regmap *map = context;
1836
1837 WARN_ON(!map->format.format_write);
1838
1839 range = _regmap_range_lookup(map, reg);
1840 if (range) {
1841 ret = _regmap_select_page(map, ®, range, 1);
1842 if (ret != 0)
1843 return ret;
1844 }
1845
1846 reg = regmap_reg_addr(map, reg);
1847 map->format.format_write(map, reg, val);
1848
1849 trace_regmap_hw_write_start(map, reg, 1);
1850
1851 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1852
1853 trace_regmap_hw_write_done(map, reg, 1);
1854
1855 return ret;
1856}
1857
1858static int _regmap_bus_reg_write(void *context, unsigned int reg,
1859 unsigned int val)
1860{
1861 struct regmap *map = context;
1862 struct regmap_range_node *range;
1863 int ret;
1864
1865 range = _regmap_range_lookup(map, reg);
1866 if (range) {
1867 ret = _regmap_select_page(map, ®, range, 1);
1868 if (ret != 0)
1869 return ret;
1870 }
1871
1872 reg = regmap_reg_addr(map, reg);
1873 return map->bus->reg_write(map->bus_context, reg, val);
1874}
1875
1876static int _regmap_bus_raw_write(void *context, unsigned int reg,
1877 unsigned int val)
1878{
1879 struct regmap *map = context;
1880
1881 WARN_ON(!map->format.format_val);
1882
1883 map->format.format_val(map->work_buf + map->format.reg_bytes
1884 + map->format.pad_bytes, val, 0);
1885 return _regmap_raw_write_impl(map, reg,
1886 map->work_buf +
1887 map->format.reg_bytes +
1888 map->format.pad_bytes,
1889 map->format.val_bytes,
1890 false);
1891}
1892
1893static inline void *_regmap_map_get_context(struct regmap *map)
1894{
1895 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1896}
1897
1898int _regmap_write(struct regmap *map, unsigned int reg,
1899 unsigned int val)
1900{
1901 int ret;
1902 void *context = _regmap_map_get_context(map);
1903
1904 if (!regmap_writeable(map, reg))
1905 return -EIO;
1906
1907 if (!map->cache_bypass && !map->defer_caching) {
1908 ret = regcache_write(map, reg, val);
1909 if (ret != 0)
1910 return ret;
1911 if (map->cache_only) {
1912 map->cache_dirty = true;
1913 return 0;
1914 }
1915 }
1916
1917 ret = map->reg_write(context, reg, val);
1918 if (ret == 0) {
1919 if (regmap_should_log(map))
1920 dev_info(map->dev, "%x <= %x\n", reg, val);
1921
1922 trace_regmap_reg_write(map, reg, val);
1923 }
1924
1925 return ret;
1926}
1927
1928/**
1929 * regmap_write() - Write a value to a single register
1930 *
1931 * @map: Register map to write to
1932 * @reg: Register to write to
1933 * @val: Value to be written
1934 *
1935 * A value of zero will be returned on success, a negative errno will
1936 * be returned in error cases.
1937 */
1938int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1939{
1940 int ret;
1941
1942 if (!IS_ALIGNED(reg, map->reg_stride))
1943 return -EINVAL;
1944
1945 map->lock(map->lock_arg);
1946
1947 ret = _regmap_write(map, reg, val);
1948
1949 map->unlock(map->lock_arg);
1950
1951 return ret;
1952}
1953EXPORT_SYMBOL_GPL(regmap_write);
1954
1955/**
1956 * regmap_write_async() - Write a value to a single register asynchronously
1957 *
1958 * @map: Register map to write to
1959 * @reg: Register to write to
1960 * @val: Value to be written
1961 *
1962 * A value of zero will be returned on success, a negative errno will
1963 * be returned in error cases.
1964 */
1965int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1966{
1967 int ret;
1968
1969 if (!IS_ALIGNED(reg, map->reg_stride))
1970 return -EINVAL;
1971
1972 map->lock(map->lock_arg);
1973
1974 map->async = true;
1975
1976 ret = _regmap_write(map, reg, val);
1977
1978 map->async = false;
1979
1980 map->unlock(map->lock_arg);
1981
1982 return ret;
1983}
1984EXPORT_SYMBOL_GPL(regmap_write_async);
1985
1986int _regmap_raw_write(struct regmap *map, unsigned int reg,
1987 const void *val, size_t val_len, bool noinc)
1988{
1989 size_t val_bytes = map->format.val_bytes;
1990 size_t val_count = val_len / val_bytes;
1991 size_t chunk_count, chunk_bytes;
1992 size_t chunk_regs = val_count;
1993 int ret, i;
1994
1995 if (!val_count)
1996 return -EINVAL;
1997
1998 if (map->use_single_write)
1999 chunk_regs = 1;
2000 else if (map->max_raw_write && val_len > map->max_raw_write)
2001 chunk_regs = map->max_raw_write / val_bytes;
2002
2003 chunk_count = val_count / chunk_regs;
2004 chunk_bytes = chunk_regs * val_bytes;
2005
2006 /* Write as many bytes as possible with chunk_size */
2007 for (i = 0; i < chunk_count; i++) {
2008 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2009 if (ret)
2010 return ret;
2011
2012 reg += regmap_get_offset(map, chunk_regs);
2013 val += chunk_bytes;
2014 val_len -= chunk_bytes;
2015 }
2016
2017 /* Write remaining bytes */
2018 if (val_len)
2019 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2020
2021 return ret;
2022}
2023
2024/**
2025 * regmap_raw_write() - Write raw values to one or more registers
2026 *
2027 * @map: Register map to write to
2028 * @reg: Initial register to write to
2029 * @val: Block of data to be written, laid out for direct transmission to the
2030 * device
2031 * @val_len: Length of data pointed to by val.
2032 *
2033 * This function is intended to be used for things like firmware
2034 * download where a large block of data needs to be transferred to the
2035 * device. No formatting will be done on the data provided.
2036 *
2037 * A value of zero will be returned on success, a negative errno will
2038 * be returned in error cases.
2039 */
2040int regmap_raw_write(struct regmap *map, unsigned int reg,
2041 const void *val, size_t val_len)
2042{
2043 int ret;
2044
2045 if (!regmap_can_raw_write(map))
2046 return -EINVAL;
2047 if (val_len % map->format.val_bytes)
2048 return -EINVAL;
2049
2050 map->lock(map->lock_arg);
2051
2052 ret = _regmap_raw_write(map, reg, val, val_len, false);
2053
2054 map->unlock(map->lock_arg);
2055
2056 return ret;
2057}
2058EXPORT_SYMBOL_GPL(regmap_raw_write);
2059
2060static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2061 void *val, unsigned int val_len, bool write)
2062{
2063 size_t val_bytes = map->format.val_bytes;
2064 size_t val_count = val_len / val_bytes;
2065 unsigned int lastval;
2066 u8 *u8p;
2067 u16 *u16p;
2068 u32 *u32p;
2069 int ret;
2070 int i;
2071
2072 switch (val_bytes) {
2073 case 1:
2074 u8p = val;
2075 if (write)
2076 lastval = (unsigned int)u8p[val_count - 1];
2077 break;
2078 case 2:
2079 u16p = val;
2080 if (write)
2081 lastval = (unsigned int)u16p[val_count - 1];
2082 break;
2083 case 4:
2084 u32p = val;
2085 if (write)
2086 lastval = (unsigned int)u32p[val_count - 1];
2087 break;
2088 default:
2089 return -EINVAL;
2090 }
2091
2092 /*
2093 * Update the cache with the last value we write, the rest is just
2094 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2095 * sure a single read from the cache will work.
2096 */
2097 if (write) {
2098 if (!map->cache_bypass && !map->defer_caching) {
2099 ret = regcache_write(map, reg, lastval);
2100 if (ret != 0)
2101 return ret;
2102 if (map->cache_only) {
2103 map->cache_dirty = true;
2104 return 0;
2105 }
2106 }
2107 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2108 } else {
2109 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2110 }
2111
2112 if (!ret && regmap_should_log(map)) {
2113 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2114 for (i = 0; i < val_count; i++) {
2115 switch (val_bytes) {
2116 case 1:
2117 pr_cont("%x", u8p[i]);
2118 break;
2119 case 2:
2120 pr_cont("%x", u16p[i]);
2121 break;
2122 case 4:
2123 pr_cont("%x", u32p[i]);
2124 break;
2125 default:
2126 break;
2127 }
2128 if (i == (val_count - 1))
2129 pr_cont("]\n");
2130 else
2131 pr_cont(",");
2132 }
2133 }
2134
2135 return 0;
2136}
2137
2138/**
2139 * regmap_noinc_write(): Write data to a register without incrementing the
2140 * register number
2141 *
2142 * @map: Register map to write to
2143 * @reg: Register to write to
2144 * @val: Pointer to data buffer
2145 * @val_len: Length of output buffer in bytes.
2146 *
2147 * The regmap API usually assumes that bulk bus write operations will write a
2148 * range of registers. Some devices have certain registers for which a write
2149 * operation can write to an internal FIFO.
2150 *
2151 * The target register must be volatile but registers after it can be
2152 * completely unrelated cacheable registers.
2153 *
2154 * This will attempt multiple writes as required to write val_len bytes.
2155 *
2156 * A value of zero will be returned on success, a negative errno will be
2157 * returned in error cases.
2158 */
2159int regmap_noinc_write(struct regmap *map, unsigned int reg,
2160 const void *val, size_t val_len)
2161{
2162 size_t write_len;
2163 int ret;
2164
2165 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2166 return -EINVAL;
2167 if (val_len % map->format.val_bytes)
2168 return -EINVAL;
2169 if (!IS_ALIGNED(reg, map->reg_stride))
2170 return -EINVAL;
2171 if (val_len == 0)
2172 return -EINVAL;
2173
2174 map->lock(map->lock_arg);
2175
2176 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2177 ret = -EINVAL;
2178 goto out_unlock;
2179 }
2180
2181 /*
2182 * Use the accelerated operation if we can. The val drops the const
2183 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2184 */
2185 if (map->bus->reg_noinc_write) {
2186 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2187 goto out_unlock;
2188 }
2189
2190 while (val_len) {
2191 if (map->max_raw_write && map->max_raw_write < val_len)
2192 write_len = map->max_raw_write;
2193 else
2194 write_len = val_len;
2195 ret = _regmap_raw_write(map, reg, val, write_len, true);
2196 if (ret)
2197 goto out_unlock;
2198 val = ((u8 *)val) + write_len;
2199 val_len -= write_len;
2200 }
2201
2202out_unlock:
2203 map->unlock(map->lock_arg);
2204 return ret;
2205}
2206EXPORT_SYMBOL_GPL(regmap_noinc_write);
2207
2208/**
2209 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2210 * register field.
2211 *
2212 * @field: Register field to write to
2213 * @mask: Bitmask to change
2214 * @val: Value to be written
2215 * @change: Boolean indicating if a write was done
2216 * @async: Boolean indicating asynchronously
2217 * @force: Boolean indicating use force update
2218 *
2219 * Perform a read/modify/write cycle on the register field with change,
2220 * async, force option.
2221 *
2222 * A value of zero will be returned on success, a negative errno will
2223 * be returned in error cases.
2224 */
2225int regmap_field_update_bits_base(struct regmap_field *field,
2226 unsigned int mask, unsigned int val,
2227 bool *change, bool async, bool force)
2228{
2229 mask = (mask << field->shift) & field->mask;
2230
2231 return regmap_update_bits_base(field->regmap, field->reg,
2232 mask, val << field->shift,
2233 change, async, force);
2234}
2235EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2236
2237/**
2238 * regmap_field_test_bits() - Check if all specified bits are set in a
2239 * register field.
2240 *
2241 * @field: Register field to operate on
2242 * @bits: Bits to test
2243 *
2244 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2245 * tested bits is not set and 1 if all tested bits are set.
2246 */
2247int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2248{
2249 unsigned int val, ret;
2250
2251 ret = regmap_field_read(field, &val);
2252 if (ret)
2253 return ret;
2254
2255 return (val & bits) == bits;
2256}
2257EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2258
2259/**
2260 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2261 * register field with port ID
2262 *
2263 * @field: Register field to write to
2264 * @id: port ID
2265 * @mask: Bitmask to change
2266 * @val: Value to be written
2267 * @change: Boolean indicating if a write was done
2268 * @async: Boolean indicating asynchronously
2269 * @force: Boolean indicating use force update
2270 *
2271 * A value of zero will be returned on success, a negative errno will
2272 * be returned in error cases.
2273 */
2274int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2275 unsigned int mask, unsigned int val,
2276 bool *change, bool async, bool force)
2277{
2278 if (id >= field->id_size)
2279 return -EINVAL;
2280
2281 mask = (mask << field->shift) & field->mask;
2282
2283 return regmap_update_bits_base(field->regmap,
2284 field->reg + (field->id_offset * id),
2285 mask, val << field->shift,
2286 change, async, force);
2287}
2288EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2289
2290/**
2291 * regmap_bulk_write() - Write multiple registers to the device
2292 *
2293 * @map: Register map to write to
2294 * @reg: First register to be write from
2295 * @val: Block of data to be written, in native register size for device
2296 * @val_count: Number of registers to write
2297 *
2298 * This function is intended to be used for writing a large block of
2299 * data to the device either in single transfer or multiple transfer.
2300 *
2301 * A value of zero will be returned on success, a negative errno will
2302 * be returned in error cases.
2303 */
2304int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2305 size_t val_count)
2306{
2307 int ret = 0, i;
2308 size_t val_bytes = map->format.val_bytes;
2309
2310 if (!IS_ALIGNED(reg, map->reg_stride))
2311 return -EINVAL;
2312
2313 /*
2314 * Some devices don't support bulk write, for them we have a series of
2315 * single write operations.
2316 */
2317 if (!map->write || !map->format.parse_inplace) {
2318 map->lock(map->lock_arg);
2319 for (i = 0; i < val_count; i++) {
2320 unsigned int ival;
2321
2322 switch (val_bytes) {
2323 case 1:
2324 ival = *(u8 *)(val + (i * val_bytes));
2325 break;
2326 case 2:
2327 ival = *(u16 *)(val + (i * val_bytes));
2328 break;
2329 case 4:
2330 ival = *(u32 *)(val + (i * val_bytes));
2331 break;
2332 default:
2333 ret = -EINVAL;
2334 goto out;
2335 }
2336
2337 ret = _regmap_write(map,
2338 reg + regmap_get_offset(map, i),
2339 ival);
2340 if (ret != 0)
2341 goto out;
2342 }
2343out:
2344 map->unlock(map->lock_arg);
2345 } else {
2346 void *wval;
2347
2348 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2349 if (!wval)
2350 return -ENOMEM;
2351
2352 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2353 map->format.parse_inplace(wval + i);
2354
2355 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2356
2357 kfree(wval);
2358 }
2359
2360 if (!ret)
2361 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2362
2363 return ret;
2364}
2365EXPORT_SYMBOL_GPL(regmap_bulk_write);
2366
2367/*
2368 * _regmap_raw_multi_reg_write()
2369 *
2370 * the (register,newvalue) pairs in regs have not been formatted, but
2371 * they are all in the same page and have been changed to being page
2372 * relative. The page register has been written if that was necessary.
2373 */
2374static int _regmap_raw_multi_reg_write(struct regmap *map,
2375 const struct reg_sequence *regs,
2376 size_t num_regs)
2377{
2378 int ret;
2379 void *buf;
2380 int i;
2381 u8 *u8;
2382 size_t val_bytes = map->format.val_bytes;
2383 size_t reg_bytes = map->format.reg_bytes;
2384 size_t pad_bytes = map->format.pad_bytes;
2385 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2386 size_t len = pair_size * num_regs;
2387
2388 if (!len)
2389 return -EINVAL;
2390
2391 buf = kzalloc(len, GFP_KERNEL);
2392 if (!buf)
2393 return -ENOMEM;
2394
2395 /* We have to linearise by hand. */
2396
2397 u8 = buf;
2398
2399 for (i = 0; i < num_regs; i++) {
2400 unsigned int reg = regs[i].reg;
2401 unsigned int val = regs[i].def;
2402 trace_regmap_hw_write_start(map, reg, 1);
2403 reg = regmap_reg_addr(map, reg);
2404 map->format.format_reg(u8, reg, map->reg_shift);
2405 u8 += reg_bytes + pad_bytes;
2406 map->format.format_val(u8, val, 0);
2407 u8 += val_bytes;
2408 }
2409 u8 = buf;
2410 *u8 |= map->write_flag_mask;
2411
2412 ret = map->write(map->bus_context, buf, len);
2413
2414 kfree(buf);
2415
2416 for (i = 0; i < num_regs; i++) {
2417 int reg = regs[i].reg;
2418 trace_regmap_hw_write_done(map, reg, 1);
2419 }
2420 return ret;
2421}
2422
2423static unsigned int _regmap_register_page(struct regmap *map,
2424 unsigned int reg,
2425 struct regmap_range_node *range)
2426{
2427 unsigned int win_page = (reg - range->range_min) / range->window_len;
2428
2429 return win_page;
2430}
2431
2432static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2433 struct reg_sequence *regs,
2434 size_t num_regs)
2435{
2436 int ret;
2437 int i, n;
2438 struct reg_sequence *base;
2439 unsigned int this_page = 0;
2440 unsigned int page_change = 0;
2441 /*
2442 * the set of registers are not neccessarily in order, but
2443 * since the order of write must be preserved this algorithm
2444 * chops the set each time the page changes. This also applies
2445 * if there is a delay required at any point in the sequence.
2446 */
2447 base = regs;
2448 for (i = 0, n = 0; i < num_regs; i++, n++) {
2449 unsigned int reg = regs[i].reg;
2450 struct regmap_range_node *range;
2451
2452 range = _regmap_range_lookup(map, reg);
2453 if (range) {
2454 unsigned int win_page = _regmap_register_page(map, reg,
2455 range);
2456
2457 if (i == 0)
2458 this_page = win_page;
2459 if (win_page != this_page) {
2460 this_page = win_page;
2461 page_change = 1;
2462 }
2463 }
2464
2465 /* If we have both a page change and a delay make sure to
2466 * write the regs and apply the delay before we change the
2467 * page.
2468 */
2469
2470 if (page_change || regs[i].delay_us) {
2471
2472 /* For situations where the first write requires
2473 * a delay we need to make sure we don't call
2474 * raw_multi_reg_write with n=0
2475 * This can't occur with page breaks as we
2476 * never write on the first iteration
2477 */
2478 if (regs[i].delay_us && i == 0)
2479 n = 1;
2480
2481 ret = _regmap_raw_multi_reg_write(map, base, n);
2482 if (ret != 0)
2483 return ret;
2484
2485 if (regs[i].delay_us) {
2486 if (map->can_sleep)
2487 fsleep(regs[i].delay_us);
2488 else
2489 udelay(regs[i].delay_us);
2490 }
2491
2492 base += n;
2493 n = 0;
2494
2495 if (page_change) {
2496 ret = _regmap_select_page(map,
2497 &base[n].reg,
2498 range, 1);
2499 if (ret != 0)
2500 return ret;
2501
2502 page_change = 0;
2503 }
2504
2505 }
2506
2507 }
2508 if (n > 0)
2509 return _regmap_raw_multi_reg_write(map, base, n);
2510 return 0;
2511}
2512
2513static int _regmap_multi_reg_write(struct regmap *map,
2514 const struct reg_sequence *regs,
2515 size_t num_regs)
2516{
2517 int i;
2518 int ret;
2519
2520 if (!map->can_multi_write) {
2521 for (i = 0; i < num_regs; i++) {
2522 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2523 if (ret != 0)
2524 return ret;
2525
2526 if (regs[i].delay_us) {
2527 if (map->can_sleep)
2528 fsleep(regs[i].delay_us);
2529 else
2530 udelay(regs[i].delay_us);
2531 }
2532 }
2533 return 0;
2534 }
2535
2536 if (!map->format.parse_inplace)
2537 return -EINVAL;
2538
2539 if (map->writeable_reg)
2540 for (i = 0; i < num_regs; i++) {
2541 int reg = regs[i].reg;
2542 if (!map->writeable_reg(map->dev, reg))
2543 return -EINVAL;
2544 if (!IS_ALIGNED(reg, map->reg_stride))
2545 return -EINVAL;
2546 }
2547
2548 if (!map->cache_bypass) {
2549 for (i = 0; i < num_regs; i++) {
2550 unsigned int val = regs[i].def;
2551 unsigned int reg = regs[i].reg;
2552 ret = regcache_write(map, reg, val);
2553 if (ret) {
2554 dev_err(map->dev,
2555 "Error in caching of register: %x ret: %d\n",
2556 reg, ret);
2557 return ret;
2558 }
2559 }
2560 if (map->cache_only) {
2561 map->cache_dirty = true;
2562 return 0;
2563 }
2564 }
2565
2566 WARN_ON(!map->bus);
2567
2568 for (i = 0; i < num_regs; i++) {
2569 unsigned int reg = regs[i].reg;
2570 struct regmap_range_node *range;
2571
2572 /* Coalesce all the writes between a page break or a delay
2573 * in a sequence
2574 */
2575 range = _regmap_range_lookup(map, reg);
2576 if (range || regs[i].delay_us) {
2577 size_t len = sizeof(struct reg_sequence)*num_regs;
2578 struct reg_sequence *base = kmemdup(regs, len,
2579 GFP_KERNEL);
2580 if (!base)
2581 return -ENOMEM;
2582 ret = _regmap_range_multi_paged_reg_write(map, base,
2583 num_regs);
2584 kfree(base);
2585
2586 return ret;
2587 }
2588 }
2589 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2590}
2591
2592/**
2593 * regmap_multi_reg_write() - Write multiple registers to the device
2594 *
2595 * @map: Register map to write to
2596 * @regs: Array of structures containing register,value to be written
2597 * @num_regs: Number of registers to write
2598 *
2599 * Write multiple registers to the device where the set of register, value
2600 * pairs are supplied in any order, possibly not all in a single range.
2601 *
2602 * The 'normal' block write mode will send ultimately send data on the
2603 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2604 * addressed. However, this alternative block multi write mode will send
2605 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2606 * must of course support the mode.
2607 *
2608 * A value of zero will be returned on success, a negative errno will be
2609 * returned in error cases.
2610 */
2611int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2612 int num_regs)
2613{
2614 int ret;
2615
2616 map->lock(map->lock_arg);
2617
2618 ret = _regmap_multi_reg_write(map, regs, num_regs);
2619
2620 map->unlock(map->lock_arg);
2621
2622 return ret;
2623}
2624EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2625
2626/**
2627 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2628 * device but not the cache
2629 *
2630 * @map: Register map to write to
2631 * @regs: Array of structures containing register,value to be written
2632 * @num_regs: Number of registers to write
2633 *
2634 * Write multiple registers to the device but not the cache where the set
2635 * of register are supplied in any order.
2636 *
2637 * This function is intended to be used for writing a large block of data
2638 * atomically to the device in single transfer for those I2C client devices
2639 * that implement this alternative block write mode.
2640 *
2641 * A value of zero will be returned on success, a negative errno will
2642 * be returned in error cases.
2643 */
2644int regmap_multi_reg_write_bypassed(struct regmap *map,
2645 const struct reg_sequence *regs,
2646 int num_regs)
2647{
2648 int ret;
2649 bool bypass;
2650
2651 map->lock(map->lock_arg);
2652
2653 bypass = map->cache_bypass;
2654 map->cache_bypass = true;
2655
2656 ret = _regmap_multi_reg_write(map, regs, num_regs);
2657
2658 map->cache_bypass = bypass;
2659
2660 map->unlock(map->lock_arg);
2661
2662 return ret;
2663}
2664EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2665
2666/**
2667 * regmap_raw_write_async() - Write raw values to one or more registers
2668 * asynchronously
2669 *
2670 * @map: Register map to write to
2671 * @reg: Initial register to write to
2672 * @val: Block of data to be written, laid out for direct transmission to the
2673 * device. Must be valid until regmap_async_complete() is called.
2674 * @val_len: Length of data pointed to by val.
2675 *
2676 * This function is intended to be used for things like firmware
2677 * download where a large block of data needs to be transferred to the
2678 * device. No formatting will be done on the data provided.
2679 *
2680 * If supported by the underlying bus the write will be scheduled
2681 * asynchronously, helping maximise I/O speed on higher speed buses
2682 * like SPI. regmap_async_complete() can be called to ensure that all
2683 * asynchrnous writes have been completed.
2684 *
2685 * A value of zero will be returned on success, a negative errno will
2686 * be returned in error cases.
2687 */
2688int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2689 const void *val, size_t val_len)
2690{
2691 int ret;
2692
2693 if (val_len % map->format.val_bytes)
2694 return -EINVAL;
2695 if (!IS_ALIGNED(reg, map->reg_stride))
2696 return -EINVAL;
2697
2698 map->lock(map->lock_arg);
2699
2700 map->async = true;
2701
2702 ret = _regmap_raw_write(map, reg, val, val_len, false);
2703
2704 map->async = false;
2705
2706 map->unlock(map->lock_arg);
2707
2708 return ret;
2709}
2710EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2711
2712static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2713 unsigned int val_len, bool noinc)
2714{
2715 struct regmap_range_node *range;
2716 int ret;
2717
2718 if (!map->read)
2719 return -EINVAL;
2720
2721 range = _regmap_range_lookup(map, reg);
2722 if (range) {
2723 ret = _regmap_select_page(map, ®, range,
2724 noinc ? 1 : val_len / map->format.val_bytes);
2725 if (ret != 0)
2726 return ret;
2727 }
2728
2729 reg = regmap_reg_addr(map, reg);
2730 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2731 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2732 map->read_flag_mask);
2733 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2734
2735 ret = map->read(map->bus_context, map->work_buf,
2736 map->format.reg_bytes + map->format.pad_bytes,
2737 val, val_len);
2738
2739 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2740
2741 return ret;
2742}
2743
2744static int _regmap_bus_reg_read(void *context, unsigned int reg,
2745 unsigned int *val)
2746{
2747 struct regmap *map = context;
2748 struct regmap_range_node *range;
2749 int ret;
2750
2751 range = _regmap_range_lookup(map, reg);
2752 if (range) {
2753 ret = _regmap_select_page(map, ®, range, 1);
2754 if (ret != 0)
2755 return ret;
2756 }
2757
2758 reg = regmap_reg_addr(map, reg);
2759 return map->bus->reg_read(map->bus_context, reg, val);
2760}
2761
2762static int _regmap_bus_read(void *context, unsigned int reg,
2763 unsigned int *val)
2764{
2765 int ret;
2766 struct regmap *map = context;
2767 void *work_val = map->work_buf + map->format.reg_bytes +
2768 map->format.pad_bytes;
2769
2770 if (!map->format.parse_val)
2771 return -EINVAL;
2772
2773 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2774 if (ret == 0)
2775 *val = map->format.parse_val(work_val);
2776
2777 return ret;
2778}
2779
2780static int _regmap_read(struct regmap *map, unsigned int reg,
2781 unsigned int *val)
2782{
2783 int ret;
2784 void *context = _regmap_map_get_context(map);
2785
2786 if (!map->cache_bypass) {
2787 ret = regcache_read(map, reg, val);
2788 if (ret == 0)
2789 return 0;
2790 }
2791
2792 if (map->cache_only)
2793 return -EBUSY;
2794
2795 if (!regmap_readable(map, reg))
2796 return -EIO;
2797
2798 ret = map->reg_read(context, reg, val);
2799 if (ret == 0) {
2800 if (regmap_should_log(map))
2801 dev_info(map->dev, "%x => %x\n", reg, *val);
2802
2803 trace_regmap_reg_read(map, reg, *val);
2804
2805 if (!map->cache_bypass)
2806 regcache_write(map, reg, *val);
2807 }
2808
2809 return ret;
2810}
2811
2812/**
2813 * regmap_read() - Read a value from a single register
2814 *
2815 * @map: Register map to read from
2816 * @reg: Register to be read from
2817 * @val: Pointer to store read value
2818 *
2819 * A value of zero will be returned on success, a negative errno will
2820 * be returned in error cases.
2821 */
2822int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2823{
2824 int ret;
2825
2826 if (!IS_ALIGNED(reg, map->reg_stride))
2827 return -EINVAL;
2828
2829 map->lock(map->lock_arg);
2830
2831 ret = _regmap_read(map, reg, val);
2832
2833 map->unlock(map->lock_arg);
2834
2835 return ret;
2836}
2837EXPORT_SYMBOL_GPL(regmap_read);
2838
2839/**
2840 * regmap_raw_read() - Read raw data from the device
2841 *
2842 * @map: Register map to read from
2843 * @reg: First register to be read from
2844 * @val: Pointer to store read value
2845 * @val_len: Size of data to read
2846 *
2847 * A value of zero will be returned on success, a negative errno will
2848 * be returned in error cases.
2849 */
2850int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2851 size_t val_len)
2852{
2853 size_t val_bytes = map->format.val_bytes;
2854 size_t val_count = val_len / val_bytes;
2855 unsigned int v;
2856 int ret, i;
2857
2858 if (val_len % map->format.val_bytes)
2859 return -EINVAL;
2860 if (!IS_ALIGNED(reg, map->reg_stride))
2861 return -EINVAL;
2862 if (val_count == 0)
2863 return -EINVAL;
2864
2865 map->lock(map->lock_arg);
2866
2867 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2868 map->cache_type == REGCACHE_NONE) {
2869 size_t chunk_count, chunk_bytes;
2870 size_t chunk_regs = val_count;
2871
2872 if (!map->cache_bypass && map->cache_only) {
2873 ret = -EBUSY;
2874 goto out;
2875 }
2876
2877 if (!map->read) {
2878 ret = -ENOTSUPP;
2879 goto out;
2880 }
2881
2882 if (map->use_single_read)
2883 chunk_regs = 1;
2884 else if (map->max_raw_read && val_len > map->max_raw_read)
2885 chunk_regs = map->max_raw_read / val_bytes;
2886
2887 chunk_count = val_count / chunk_regs;
2888 chunk_bytes = chunk_regs * val_bytes;
2889
2890 /* Read bytes that fit into whole chunks */
2891 for (i = 0; i < chunk_count; i++) {
2892 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2893 if (ret != 0)
2894 goto out;
2895
2896 reg += regmap_get_offset(map, chunk_regs);
2897 val += chunk_bytes;
2898 val_len -= chunk_bytes;
2899 }
2900
2901 /* Read remaining bytes */
2902 if (val_len) {
2903 ret = _regmap_raw_read(map, reg, val, val_len, false);
2904 if (ret != 0)
2905 goto out;
2906 }
2907 } else {
2908 /* Otherwise go word by word for the cache; should be low
2909 * cost as we expect to hit the cache.
2910 */
2911 for (i = 0; i < val_count; i++) {
2912 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2913 &v);
2914 if (ret != 0)
2915 goto out;
2916
2917 map->format.format_val(val + (i * val_bytes), v, 0);
2918 }
2919 }
2920
2921 out:
2922 map->unlock(map->lock_arg);
2923
2924 return ret;
2925}
2926EXPORT_SYMBOL_GPL(regmap_raw_read);
2927
2928/**
2929 * regmap_noinc_read(): Read data from a register without incrementing the
2930 * register number
2931 *
2932 * @map: Register map to read from
2933 * @reg: Register to read from
2934 * @val: Pointer to data buffer
2935 * @val_len: Length of output buffer in bytes.
2936 *
2937 * The regmap API usually assumes that bulk read operations will read a
2938 * range of registers. Some devices have certain registers for which a read
2939 * operation read will read from an internal FIFO.
2940 *
2941 * The target register must be volatile but registers after it can be
2942 * completely unrelated cacheable registers.
2943 *
2944 * This will attempt multiple reads as required to read val_len bytes.
2945 *
2946 * A value of zero will be returned on success, a negative errno will be
2947 * returned in error cases.
2948 */
2949int regmap_noinc_read(struct regmap *map, unsigned int reg,
2950 void *val, size_t val_len)
2951{
2952 size_t read_len;
2953 int ret;
2954
2955 if (!map->read)
2956 return -ENOTSUPP;
2957
2958 if (val_len % map->format.val_bytes)
2959 return -EINVAL;
2960 if (!IS_ALIGNED(reg, map->reg_stride))
2961 return -EINVAL;
2962 if (val_len == 0)
2963 return -EINVAL;
2964
2965 map->lock(map->lock_arg);
2966
2967 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2968 ret = -EINVAL;
2969 goto out_unlock;
2970 }
2971
2972 /*
2973 * We have not defined the FIFO semantics for cache, as the
2974 * cache is just one value deep. Should we return the last
2975 * written value? Just avoid this by always reading the FIFO
2976 * even when using cache. Cache only will not work.
2977 */
2978 if (!map->cache_bypass && map->cache_only) {
2979 ret = -EBUSY;
2980 goto out_unlock;
2981 }
2982
2983 /* Use the accelerated operation if we can */
2984 if (map->bus->reg_noinc_read) {
2985 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
2986 goto out_unlock;
2987 }
2988
2989 while (val_len) {
2990 if (map->max_raw_read && map->max_raw_read < val_len)
2991 read_len = map->max_raw_read;
2992 else
2993 read_len = val_len;
2994 ret = _regmap_raw_read(map, reg, val, read_len, true);
2995 if (ret)
2996 goto out_unlock;
2997 val = ((u8 *)val) + read_len;
2998 val_len -= read_len;
2999 }
3000
3001out_unlock:
3002 map->unlock(map->lock_arg);
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(regmap_noinc_read);
3006
3007/**
3008 * regmap_field_read(): Read a value to a single register field
3009 *
3010 * @field: Register field to read from
3011 * @val: Pointer to store read value
3012 *
3013 * A value of zero will be returned on success, a negative errno will
3014 * be returned in error cases.
3015 */
3016int regmap_field_read(struct regmap_field *field, unsigned int *val)
3017{
3018 int ret;
3019 unsigned int reg_val;
3020 ret = regmap_read(field->regmap, field->reg, ®_val);
3021 if (ret != 0)
3022 return ret;
3023
3024 reg_val &= field->mask;
3025 reg_val >>= field->shift;
3026 *val = reg_val;
3027
3028 return ret;
3029}
3030EXPORT_SYMBOL_GPL(regmap_field_read);
3031
3032/**
3033 * regmap_fields_read() - Read a value to a single register field with port ID
3034 *
3035 * @field: Register field to read from
3036 * @id: port ID
3037 * @val: Pointer to store read value
3038 *
3039 * A value of zero will be returned on success, a negative errno will
3040 * be returned in error cases.
3041 */
3042int regmap_fields_read(struct regmap_field *field, unsigned int id,
3043 unsigned int *val)
3044{
3045 int ret;
3046 unsigned int reg_val;
3047
3048 if (id >= field->id_size)
3049 return -EINVAL;
3050
3051 ret = regmap_read(field->regmap,
3052 field->reg + (field->id_offset * id),
3053 ®_val);
3054 if (ret != 0)
3055 return ret;
3056
3057 reg_val &= field->mask;
3058 reg_val >>= field->shift;
3059 *val = reg_val;
3060
3061 return ret;
3062}
3063EXPORT_SYMBOL_GPL(regmap_fields_read);
3064
3065/**
3066 * regmap_bulk_read() - Read multiple registers from the device
3067 *
3068 * @map: Register map to read from
3069 * @reg: First register to be read from
3070 * @val: Pointer to store read value, in native register size for device
3071 * @val_count: Number of registers to read
3072 *
3073 * A value of zero will be returned on success, a negative errno will
3074 * be returned in error cases.
3075 */
3076int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3077 size_t val_count)
3078{
3079 int ret, i;
3080 size_t val_bytes = map->format.val_bytes;
3081 bool vol = regmap_volatile_range(map, reg, val_count);
3082
3083 if (!IS_ALIGNED(reg, map->reg_stride))
3084 return -EINVAL;
3085 if (val_count == 0)
3086 return -EINVAL;
3087
3088 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3089 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3090 if (ret != 0)
3091 return ret;
3092
3093 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3094 map->format.parse_inplace(val + i);
3095 } else {
3096 u32 *u32 = val;
3097 u16 *u16 = val;
3098 u8 *u8 = val;
3099
3100 map->lock(map->lock_arg);
3101
3102 for (i = 0; i < val_count; i++) {
3103 unsigned int ival;
3104
3105 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3106 &ival);
3107 if (ret != 0)
3108 goto out;
3109
3110 switch (map->format.val_bytes) {
3111 case 4:
3112 u32[i] = ival;
3113 break;
3114 case 2:
3115 u16[i] = ival;
3116 break;
3117 case 1:
3118 u8[i] = ival;
3119 break;
3120 default:
3121 ret = -EINVAL;
3122 goto out;
3123 }
3124 }
3125
3126out:
3127 map->unlock(map->lock_arg);
3128 }
3129
3130 if (!ret)
3131 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3132
3133 return ret;
3134}
3135EXPORT_SYMBOL_GPL(regmap_bulk_read);
3136
3137static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3138 unsigned int mask, unsigned int val,
3139 bool *change, bool force_write)
3140{
3141 int ret;
3142 unsigned int tmp, orig;
3143
3144 if (change)
3145 *change = false;
3146
3147 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3148 reg = regmap_reg_addr(map, reg);
3149 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3150 if (ret == 0 && change)
3151 *change = true;
3152 } else {
3153 ret = _regmap_read(map, reg, &orig);
3154 if (ret != 0)
3155 return ret;
3156
3157 tmp = orig & ~mask;
3158 tmp |= val & mask;
3159
3160 if (force_write || (tmp != orig) || map->force_write_field) {
3161 ret = _regmap_write(map, reg, tmp);
3162 if (ret == 0 && change)
3163 *change = true;
3164 }
3165 }
3166
3167 return ret;
3168}
3169
3170/**
3171 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3172 *
3173 * @map: Register map to update
3174 * @reg: Register to update
3175 * @mask: Bitmask to change
3176 * @val: New value for bitmask
3177 * @change: Boolean indicating if a write was done
3178 * @async: Boolean indicating asynchronously
3179 * @force: Boolean indicating use force update
3180 *
3181 * Perform a read/modify/write cycle on a register map with change, async, force
3182 * options.
3183 *
3184 * If async is true:
3185 *
3186 * With most buses the read must be done synchronously so this is most useful
3187 * for devices with a cache which do not need to interact with the hardware to
3188 * determine the current register value.
3189 *
3190 * Returns zero for success, a negative number on error.
3191 */
3192int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3193 unsigned int mask, unsigned int val,
3194 bool *change, bool async, bool force)
3195{
3196 int ret;
3197
3198 map->lock(map->lock_arg);
3199
3200 map->async = async;
3201
3202 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3203
3204 map->async = false;
3205
3206 map->unlock(map->lock_arg);
3207
3208 return ret;
3209}
3210EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3211
3212/**
3213 * regmap_test_bits() - Check if all specified bits are set in a register.
3214 *
3215 * @map: Register map to operate on
3216 * @reg: Register to read from
3217 * @bits: Bits to test
3218 *
3219 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3220 * bits are set and a negative error number if the underlying regmap_read()
3221 * fails.
3222 */
3223int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3224{
3225 unsigned int val, ret;
3226
3227 ret = regmap_read(map, reg, &val);
3228 if (ret)
3229 return ret;
3230
3231 return (val & bits) == bits;
3232}
3233EXPORT_SYMBOL_GPL(regmap_test_bits);
3234
3235void regmap_async_complete_cb(struct regmap_async *async, int ret)
3236{
3237 struct regmap *map = async->map;
3238 bool wake;
3239
3240 trace_regmap_async_io_complete(map);
3241
3242 spin_lock(&map->async_lock);
3243 list_move(&async->list, &map->async_free);
3244 wake = list_empty(&map->async_list);
3245
3246 if (ret != 0)
3247 map->async_ret = ret;
3248
3249 spin_unlock(&map->async_lock);
3250
3251 if (wake)
3252 wake_up(&map->async_waitq);
3253}
3254EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3255
3256static int regmap_async_is_done(struct regmap *map)
3257{
3258 unsigned long flags;
3259 int ret;
3260
3261 spin_lock_irqsave(&map->async_lock, flags);
3262 ret = list_empty(&map->async_list);
3263 spin_unlock_irqrestore(&map->async_lock, flags);
3264
3265 return ret;
3266}
3267
3268/**
3269 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3270 *
3271 * @map: Map to operate on.
3272 *
3273 * Blocks until any pending asynchronous I/O has completed. Returns
3274 * an error code for any failed I/O operations.
3275 */
3276int regmap_async_complete(struct regmap *map)
3277{
3278 unsigned long flags;
3279 int ret;
3280
3281 /* Nothing to do with no async support */
3282 if (!map->bus || !map->bus->async_write)
3283 return 0;
3284
3285 trace_regmap_async_complete_start(map);
3286
3287 wait_event(map->async_waitq, regmap_async_is_done(map));
3288
3289 spin_lock_irqsave(&map->async_lock, flags);
3290 ret = map->async_ret;
3291 map->async_ret = 0;
3292 spin_unlock_irqrestore(&map->async_lock, flags);
3293
3294 trace_regmap_async_complete_done(map);
3295
3296 return ret;
3297}
3298EXPORT_SYMBOL_GPL(regmap_async_complete);
3299
3300/**
3301 * regmap_register_patch - Register and apply register updates to be applied
3302 * on device initialistion
3303 *
3304 * @map: Register map to apply updates to.
3305 * @regs: Values to update.
3306 * @num_regs: Number of entries in regs.
3307 *
3308 * Register a set of register updates to be applied to the device
3309 * whenever the device registers are synchronised with the cache and
3310 * apply them immediately. Typically this is used to apply
3311 * corrections to be applied to the device defaults on startup, such
3312 * as the updates some vendors provide to undocumented registers.
3313 *
3314 * The caller must ensure that this function cannot be called
3315 * concurrently with either itself or regcache_sync().
3316 */
3317int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3318 int num_regs)
3319{
3320 struct reg_sequence *p;
3321 int ret;
3322 bool bypass;
3323
3324 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3325 num_regs))
3326 return 0;
3327
3328 p = krealloc(map->patch,
3329 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3330 GFP_KERNEL);
3331 if (p) {
3332 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3333 map->patch = p;
3334 map->patch_regs += num_regs;
3335 } else {
3336 return -ENOMEM;
3337 }
3338
3339 map->lock(map->lock_arg);
3340
3341 bypass = map->cache_bypass;
3342
3343 map->cache_bypass = true;
3344 map->async = true;
3345
3346 ret = _regmap_multi_reg_write(map, regs, num_regs);
3347
3348 map->async = false;
3349 map->cache_bypass = bypass;
3350
3351 map->unlock(map->lock_arg);
3352
3353 regmap_async_complete(map);
3354
3355 return ret;
3356}
3357EXPORT_SYMBOL_GPL(regmap_register_patch);
3358
3359/**
3360 * regmap_get_val_bytes() - Report the size of a register value
3361 *
3362 * @map: Register map to operate on.
3363 *
3364 * Report the size of a register value, mainly intended to for use by
3365 * generic infrastructure built on top of regmap.
3366 */
3367int regmap_get_val_bytes(struct regmap *map)
3368{
3369 if (map->format.format_write)
3370 return -EINVAL;
3371
3372 return map->format.val_bytes;
3373}
3374EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3375
3376/**
3377 * regmap_get_max_register() - Report the max register value
3378 *
3379 * @map: Register map to operate on.
3380 *
3381 * Report the max register value, mainly intended to for use by
3382 * generic infrastructure built on top of regmap.
3383 */
3384int regmap_get_max_register(struct regmap *map)
3385{
3386 return map->max_register ? map->max_register : -EINVAL;
3387}
3388EXPORT_SYMBOL_GPL(regmap_get_max_register);
3389
3390/**
3391 * regmap_get_reg_stride() - Report the register address stride
3392 *
3393 * @map: Register map to operate on.
3394 *
3395 * Report the register address stride, mainly intended to for use by
3396 * generic infrastructure built on top of regmap.
3397 */
3398int regmap_get_reg_stride(struct regmap *map)
3399{
3400 return map->reg_stride;
3401}
3402EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3403
3404/**
3405 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3406 *
3407 * @map: Register map to operate on.
3408 *
3409 * Returns true if an access to the register might sleep, else false.
3410 */
3411bool regmap_might_sleep(struct regmap *map)
3412{
3413 return map->can_sleep;
3414}
3415EXPORT_SYMBOL_GPL(regmap_might_sleep);
3416
3417int regmap_parse_val(struct regmap *map, const void *buf,
3418 unsigned int *val)
3419{
3420 if (!map->format.parse_val)
3421 return -EINVAL;
3422
3423 *val = map->format.parse_val(buf);
3424
3425 return 0;
3426}
3427EXPORT_SYMBOL_GPL(regmap_parse_val);
3428
3429static int __init regmap_initcall(void)
3430{
3431 regmap_debugfs_initcall();
3432
3433 return 0;
3434}
3435postcore_initcall(regmap_initcall);
1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val << shift, buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val << shift, buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val << shift, buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
312}
313
314#ifdef CONFIG_64BIT
315static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
316{
317 put_unaligned_be64((u64) val << shift, buf);
318}
319
320static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
321{
322 put_unaligned_le64((u64) val << shift, buf);
323}
324
325static void regmap_format_64_native(void *buf, unsigned int val,
326 unsigned int shift)
327{
328 u64 v = (u64) val << shift;
329
330 memcpy(buf, &v, sizeof(v));
331}
332#endif
333
334static void regmap_parse_inplace_noop(void *buf)
335{
336}
337
338static unsigned int regmap_parse_8(const void *buf)
339{
340 const u8 *b = buf;
341
342 return b[0];
343}
344
345static unsigned int regmap_parse_16_be(const void *buf)
346{
347 return get_unaligned_be16(buf);
348}
349
350static unsigned int regmap_parse_16_le(const void *buf)
351{
352 return get_unaligned_le16(buf);
353}
354
355static void regmap_parse_16_be_inplace(void *buf)
356{
357 u16 v = get_unaligned_be16(buf);
358
359 memcpy(buf, &v, sizeof(v));
360}
361
362static void regmap_parse_16_le_inplace(void *buf)
363{
364 u16 v = get_unaligned_le16(buf);
365
366 memcpy(buf, &v, sizeof(v));
367}
368
369static unsigned int regmap_parse_16_native(const void *buf)
370{
371 u16 v;
372
373 memcpy(&v, buf, sizeof(v));
374 return v;
375}
376
377static unsigned int regmap_parse_24_be(const void *buf)
378{
379 return get_unaligned_be24(buf);
380}
381
382static unsigned int regmap_parse_32_be(const void *buf)
383{
384 return get_unaligned_be32(buf);
385}
386
387static unsigned int regmap_parse_32_le(const void *buf)
388{
389 return get_unaligned_le32(buf);
390}
391
392static void regmap_parse_32_be_inplace(void *buf)
393{
394 u32 v = get_unaligned_be32(buf);
395
396 memcpy(buf, &v, sizeof(v));
397}
398
399static void regmap_parse_32_le_inplace(void *buf)
400{
401 u32 v = get_unaligned_le32(buf);
402
403 memcpy(buf, &v, sizeof(v));
404}
405
406static unsigned int regmap_parse_32_native(const void *buf)
407{
408 u32 v;
409
410 memcpy(&v, buf, sizeof(v));
411 return v;
412}
413
414#ifdef CONFIG_64BIT
415static unsigned int regmap_parse_64_be(const void *buf)
416{
417 return get_unaligned_be64(buf);
418}
419
420static unsigned int regmap_parse_64_le(const void *buf)
421{
422 return get_unaligned_le64(buf);
423}
424
425static void regmap_parse_64_be_inplace(void *buf)
426{
427 u64 v = get_unaligned_be64(buf);
428
429 memcpy(buf, &v, sizeof(v));
430}
431
432static void regmap_parse_64_le_inplace(void *buf)
433{
434 u64 v = get_unaligned_le64(buf);
435
436 memcpy(buf, &v, sizeof(v));
437}
438
439static unsigned int regmap_parse_64_native(const void *buf)
440{
441 u64 v;
442
443 memcpy(&v, buf, sizeof(v));
444 return v;
445}
446#endif
447
448static void regmap_lock_hwlock(void *__map)
449{
450 struct regmap *map = __map;
451
452 hwspin_lock_timeout(map->hwlock, UINT_MAX);
453}
454
455static void regmap_lock_hwlock_irq(void *__map)
456{
457 struct regmap *map = __map;
458
459 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
460}
461
462static void regmap_lock_hwlock_irqsave(void *__map)
463{
464 struct regmap *map = __map;
465
466 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
467 &map->spinlock_flags);
468}
469
470static void regmap_unlock_hwlock(void *__map)
471{
472 struct regmap *map = __map;
473
474 hwspin_unlock(map->hwlock);
475}
476
477static void regmap_unlock_hwlock_irq(void *__map)
478{
479 struct regmap *map = __map;
480
481 hwspin_unlock_irq(map->hwlock);
482}
483
484static void regmap_unlock_hwlock_irqrestore(void *__map)
485{
486 struct regmap *map = __map;
487
488 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
489}
490
491static void regmap_lock_unlock_none(void *__map)
492{
493
494}
495
496static void regmap_lock_mutex(void *__map)
497{
498 struct regmap *map = __map;
499 mutex_lock(&map->mutex);
500}
501
502static void regmap_unlock_mutex(void *__map)
503{
504 struct regmap *map = __map;
505 mutex_unlock(&map->mutex);
506}
507
508static void regmap_lock_spinlock(void *__map)
509__acquires(&map->spinlock)
510{
511 struct regmap *map = __map;
512 unsigned long flags;
513
514 spin_lock_irqsave(&map->spinlock, flags);
515 map->spinlock_flags = flags;
516}
517
518static void regmap_unlock_spinlock(void *__map)
519__releases(&map->spinlock)
520{
521 struct regmap *map = __map;
522 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
523}
524
525static void regmap_lock_raw_spinlock(void *__map)
526__acquires(&map->raw_spinlock)
527{
528 struct regmap *map = __map;
529 unsigned long flags;
530
531 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
532 map->raw_spinlock_flags = flags;
533}
534
535static void regmap_unlock_raw_spinlock(void *__map)
536__releases(&map->raw_spinlock)
537{
538 struct regmap *map = __map;
539 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
540}
541
542static void dev_get_regmap_release(struct device *dev, void *res)
543{
544 /*
545 * We don't actually have anything to do here; the goal here
546 * is not to manage the regmap but to provide a simple way to
547 * get the regmap back given a struct device.
548 */
549}
550
551static bool _regmap_range_add(struct regmap *map,
552 struct regmap_range_node *data)
553{
554 struct rb_root *root = &map->range_tree;
555 struct rb_node **new = &(root->rb_node), *parent = NULL;
556
557 while (*new) {
558 struct regmap_range_node *this =
559 rb_entry(*new, struct regmap_range_node, node);
560
561 parent = *new;
562 if (data->range_max < this->range_min)
563 new = &((*new)->rb_left);
564 else if (data->range_min > this->range_max)
565 new = &((*new)->rb_right);
566 else
567 return false;
568 }
569
570 rb_link_node(&data->node, parent, new);
571 rb_insert_color(&data->node, root);
572
573 return true;
574}
575
576static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
577 unsigned int reg)
578{
579 struct rb_node *node = map->range_tree.rb_node;
580
581 while (node) {
582 struct regmap_range_node *this =
583 rb_entry(node, struct regmap_range_node, node);
584
585 if (reg < this->range_min)
586 node = node->rb_left;
587 else if (reg > this->range_max)
588 node = node->rb_right;
589 else
590 return this;
591 }
592
593 return NULL;
594}
595
596static void regmap_range_exit(struct regmap *map)
597{
598 struct rb_node *next;
599 struct regmap_range_node *range_node;
600
601 next = rb_first(&map->range_tree);
602 while (next) {
603 range_node = rb_entry(next, struct regmap_range_node, node);
604 next = rb_next(&range_node->node);
605 rb_erase(&range_node->node, &map->range_tree);
606 kfree(range_node);
607 }
608
609 kfree(map->selector_work_buf);
610}
611
612static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
613{
614 if (config->name) {
615 const char *name = kstrdup_const(config->name, GFP_KERNEL);
616
617 if (!name)
618 return -ENOMEM;
619
620 kfree_const(map->name);
621 map->name = name;
622 }
623
624 return 0;
625}
626
627int regmap_attach_dev(struct device *dev, struct regmap *map,
628 const struct regmap_config *config)
629{
630 struct regmap **m;
631 int ret;
632
633 map->dev = dev;
634
635 ret = regmap_set_name(map, config);
636 if (ret)
637 return ret;
638
639 regmap_debugfs_exit(map);
640 regmap_debugfs_init(map);
641
642 /* Add a devres resource for dev_get_regmap() */
643 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
644 if (!m) {
645 regmap_debugfs_exit(map);
646 return -ENOMEM;
647 }
648 *m = map;
649 devres_add(dev, m);
650
651 return 0;
652}
653EXPORT_SYMBOL_GPL(regmap_attach_dev);
654
655static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
656 const struct regmap_config *config)
657{
658 enum regmap_endian endian;
659
660 /* Retrieve the endianness specification from the regmap config */
661 endian = config->reg_format_endian;
662
663 /* If the regmap config specified a non-default value, use that */
664 if (endian != REGMAP_ENDIAN_DEFAULT)
665 return endian;
666
667 /* Retrieve the endianness specification from the bus config */
668 if (bus && bus->reg_format_endian_default)
669 endian = bus->reg_format_endian_default;
670
671 /* If the bus specified a non-default value, use that */
672 if (endian != REGMAP_ENDIAN_DEFAULT)
673 return endian;
674
675 /* Use this if no other value was found */
676 return REGMAP_ENDIAN_BIG;
677}
678
679enum regmap_endian regmap_get_val_endian(struct device *dev,
680 const struct regmap_bus *bus,
681 const struct regmap_config *config)
682{
683 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
684 enum regmap_endian endian;
685
686 /* Retrieve the endianness specification from the regmap config */
687 endian = config->val_format_endian;
688
689 /* If the regmap config specified a non-default value, use that */
690 if (endian != REGMAP_ENDIAN_DEFAULT)
691 return endian;
692
693 /* If the firmware node exist try to get endianness from it */
694 if (fwnode_property_read_bool(fwnode, "big-endian"))
695 endian = REGMAP_ENDIAN_BIG;
696 else if (fwnode_property_read_bool(fwnode, "little-endian"))
697 endian = REGMAP_ENDIAN_LITTLE;
698 else if (fwnode_property_read_bool(fwnode, "native-endian"))
699 endian = REGMAP_ENDIAN_NATIVE;
700
701 /* If the endianness was specified in fwnode, use that */
702 if (endian != REGMAP_ENDIAN_DEFAULT)
703 return endian;
704
705 /* Retrieve the endianness specification from the bus config */
706 if (bus && bus->val_format_endian_default)
707 endian = bus->val_format_endian_default;
708
709 /* If the bus specified a non-default value, use that */
710 if (endian != REGMAP_ENDIAN_DEFAULT)
711 return endian;
712
713 /* Use this if no other value was found */
714 return REGMAP_ENDIAN_BIG;
715}
716EXPORT_SYMBOL_GPL(regmap_get_val_endian);
717
718struct regmap *__regmap_init(struct device *dev,
719 const struct regmap_bus *bus,
720 void *bus_context,
721 const struct regmap_config *config,
722 struct lock_class_key *lock_key,
723 const char *lock_name)
724{
725 struct regmap *map;
726 int ret = -EINVAL;
727 enum regmap_endian reg_endian, val_endian;
728 int i, j;
729
730 if (!config)
731 goto err;
732
733 map = kzalloc(sizeof(*map), GFP_KERNEL);
734 if (map == NULL) {
735 ret = -ENOMEM;
736 goto err;
737 }
738
739 ret = regmap_set_name(map, config);
740 if (ret)
741 goto err_map;
742
743 ret = -EINVAL; /* Later error paths rely on this */
744
745 if (config->disable_locking) {
746 map->lock = map->unlock = regmap_lock_unlock_none;
747 map->can_sleep = config->can_sleep;
748 regmap_debugfs_disable(map);
749 } else if (config->lock && config->unlock) {
750 map->lock = config->lock;
751 map->unlock = config->unlock;
752 map->lock_arg = config->lock_arg;
753 map->can_sleep = config->can_sleep;
754 } else if (config->use_hwlock) {
755 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
756 if (!map->hwlock) {
757 ret = -ENXIO;
758 goto err_name;
759 }
760
761 switch (config->hwlock_mode) {
762 case HWLOCK_IRQSTATE:
763 map->lock = regmap_lock_hwlock_irqsave;
764 map->unlock = regmap_unlock_hwlock_irqrestore;
765 break;
766 case HWLOCK_IRQ:
767 map->lock = regmap_lock_hwlock_irq;
768 map->unlock = regmap_unlock_hwlock_irq;
769 break;
770 default:
771 map->lock = regmap_lock_hwlock;
772 map->unlock = regmap_unlock_hwlock;
773 break;
774 }
775
776 map->lock_arg = map;
777 } else {
778 if ((bus && bus->fast_io) ||
779 config->fast_io) {
780 if (config->use_raw_spinlock) {
781 raw_spin_lock_init(&map->raw_spinlock);
782 map->lock = regmap_lock_raw_spinlock;
783 map->unlock = regmap_unlock_raw_spinlock;
784 lockdep_set_class_and_name(&map->raw_spinlock,
785 lock_key, lock_name);
786 } else {
787 spin_lock_init(&map->spinlock);
788 map->lock = regmap_lock_spinlock;
789 map->unlock = regmap_unlock_spinlock;
790 lockdep_set_class_and_name(&map->spinlock,
791 lock_key, lock_name);
792 }
793 } else {
794 mutex_init(&map->mutex);
795 map->lock = regmap_lock_mutex;
796 map->unlock = regmap_unlock_mutex;
797 map->can_sleep = true;
798 lockdep_set_class_and_name(&map->mutex,
799 lock_key, lock_name);
800 }
801 map->lock_arg = map;
802 }
803
804 /*
805 * When we write in fast-paths with regmap_bulk_write() don't allocate
806 * scratch buffers with sleeping allocations.
807 */
808 if ((bus && bus->fast_io) || config->fast_io)
809 map->alloc_flags = GFP_ATOMIC;
810 else
811 map->alloc_flags = GFP_KERNEL;
812
813 map->reg_base = config->reg_base;
814
815 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
816 map->format.pad_bytes = config->pad_bits / 8;
817 map->format.reg_downshift = config->reg_downshift;
818 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
819 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
820 config->val_bits + config->pad_bits, 8);
821 map->reg_shift = config->pad_bits % 8;
822 if (config->reg_stride)
823 map->reg_stride = config->reg_stride;
824 else
825 map->reg_stride = 1;
826 if (is_power_of_2(map->reg_stride))
827 map->reg_stride_order = ilog2(map->reg_stride);
828 else
829 map->reg_stride_order = -1;
830 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
831 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
832 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
833 if (bus) {
834 map->max_raw_read = bus->max_raw_read;
835 map->max_raw_write = bus->max_raw_write;
836 } else if (config->max_raw_read && config->max_raw_write) {
837 map->max_raw_read = config->max_raw_read;
838 map->max_raw_write = config->max_raw_write;
839 }
840 map->dev = dev;
841 map->bus = bus;
842 map->bus_context = bus_context;
843 map->max_register = config->max_register;
844 map->wr_table = config->wr_table;
845 map->rd_table = config->rd_table;
846 map->volatile_table = config->volatile_table;
847 map->precious_table = config->precious_table;
848 map->wr_noinc_table = config->wr_noinc_table;
849 map->rd_noinc_table = config->rd_noinc_table;
850 map->writeable_reg = config->writeable_reg;
851 map->readable_reg = config->readable_reg;
852 map->volatile_reg = config->volatile_reg;
853 map->precious_reg = config->precious_reg;
854 map->writeable_noinc_reg = config->writeable_noinc_reg;
855 map->readable_noinc_reg = config->readable_noinc_reg;
856 map->cache_type = config->cache_type;
857
858 spin_lock_init(&map->async_lock);
859 INIT_LIST_HEAD(&map->async_list);
860 INIT_LIST_HEAD(&map->async_free);
861 init_waitqueue_head(&map->async_waitq);
862
863 if (config->read_flag_mask ||
864 config->write_flag_mask ||
865 config->zero_flag_mask) {
866 map->read_flag_mask = config->read_flag_mask;
867 map->write_flag_mask = config->write_flag_mask;
868 } else if (bus) {
869 map->read_flag_mask = bus->read_flag_mask;
870 }
871
872 if (config && config->read && config->write) {
873 map->reg_read = _regmap_bus_read;
874 if (config->reg_update_bits)
875 map->reg_update_bits = config->reg_update_bits;
876
877 /* Bulk read/write */
878 map->read = config->read;
879 map->write = config->write;
880
881 reg_endian = REGMAP_ENDIAN_NATIVE;
882 val_endian = REGMAP_ENDIAN_NATIVE;
883 } else if (!bus) {
884 map->reg_read = config->reg_read;
885 map->reg_write = config->reg_write;
886 map->reg_update_bits = config->reg_update_bits;
887
888 map->defer_caching = false;
889 goto skip_format_initialization;
890 } else if (!bus->read || !bus->write) {
891 map->reg_read = _regmap_bus_reg_read;
892 map->reg_write = _regmap_bus_reg_write;
893 map->reg_update_bits = bus->reg_update_bits;
894
895 map->defer_caching = false;
896 goto skip_format_initialization;
897 } else {
898 map->reg_read = _regmap_bus_read;
899 map->reg_update_bits = bus->reg_update_bits;
900 /* Bulk read/write */
901 map->read = bus->read;
902 map->write = bus->write;
903
904 reg_endian = regmap_get_reg_endian(bus, config);
905 val_endian = regmap_get_val_endian(dev, bus, config);
906 }
907
908 switch (config->reg_bits + map->reg_shift) {
909 case 2:
910 switch (config->val_bits) {
911 case 6:
912 map->format.format_write = regmap_format_2_6_write;
913 break;
914 default:
915 goto err_hwlock;
916 }
917 break;
918
919 case 4:
920 switch (config->val_bits) {
921 case 12:
922 map->format.format_write = regmap_format_4_12_write;
923 break;
924 default:
925 goto err_hwlock;
926 }
927 break;
928
929 case 7:
930 switch (config->val_bits) {
931 case 9:
932 map->format.format_write = regmap_format_7_9_write;
933 break;
934 case 17:
935 map->format.format_write = regmap_format_7_17_write;
936 break;
937 default:
938 goto err_hwlock;
939 }
940 break;
941
942 case 10:
943 switch (config->val_bits) {
944 case 14:
945 map->format.format_write = regmap_format_10_14_write;
946 break;
947 default:
948 goto err_hwlock;
949 }
950 break;
951
952 case 12:
953 switch (config->val_bits) {
954 case 20:
955 map->format.format_write = regmap_format_12_20_write;
956 break;
957 default:
958 goto err_hwlock;
959 }
960 break;
961
962 case 8:
963 map->format.format_reg = regmap_format_8;
964 break;
965
966 case 16:
967 switch (reg_endian) {
968 case REGMAP_ENDIAN_BIG:
969 map->format.format_reg = regmap_format_16_be;
970 break;
971 case REGMAP_ENDIAN_LITTLE:
972 map->format.format_reg = regmap_format_16_le;
973 break;
974 case REGMAP_ENDIAN_NATIVE:
975 map->format.format_reg = regmap_format_16_native;
976 break;
977 default:
978 goto err_hwlock;
979 }
980 break;
981
982 case 24:
983 switch (reg_endian) {
984 case REGMAP_ENDIAN_BIG:
985 map->format.format_reg = regmap_format_24_be;
986 break;
987 default:
988 goto err_hwlock;
989 }
990 break;
991
992 case 32:
993 switch (reg_endian) {
994 case REGMAP_ENDIAN_BIG:
995 map->format.format_reg = regmap_format_32_be;
996 break;
997 case REGMAP_ENDIAN_LITTLE:
998 map->format.format_reg = regmap_format_32_le;
999 break;
1000 case REGMAP_ENDIAN_NATIVE:
1001 map->format.format_reg = regmap_format_32_native;
1002 break;
1003 default:
1004 goto err_hwlock;
1005 }
1006 break;
1007
1008#ifdef CONFIG_64BIT
1009 case 64:
1010 switch (reg_endian) {
1011 case REGMAP_ENDIAN_BIG:
1012 map->format.format_reg = regmap_format_64_be;
1013 break;
1014 case REGMAP_ENDIAN_LITTLE:
1015 map->format.format_reg = regmap_format_64_le;
1016 break;
1017 case REGMAP_ENDIAN_NATIVE:
1018 map->format.format_reg = regmap_format_64_native;
1019 break;
1020 default:
1021 goto err_hwlock;
1022 }
1023 break;
1024#endif
1025
1026 default:
1027 goto err_hwlock;
1028 }
1029
1030 if (val_endian == REGMAP_ENDIAN_NATIVE)
1031 map->format.parse_inplace = regmap_parse_inplace_noop;
1032
1033 switch (config->val_bits) {
1034 case 8:
1035 map->format.format_val = regmap_format_8;
1036 map->format.parse_val = regmap_parse_8;
1037 map->format.parse_inplace = regmap_parse_inplace_noop;
1038 break;
1039 case 16:
1040 switch (val_endian) {
1041 case REGMAP_ENDIAN_BIG:
1042 map->format.format_val = regmap_format_16_be;
1043 map->format.parse_val = regmap_parse_16_be;
1044 map->format.parse_inplace = regmap_parse_16_be_inplace;
1045 break;
1046 case REGMAP_ENDIAN_LITTLE:
1047 map->format.format_val = regmap_format_16_le;
1048 map->format.parse_val = regmap_parse_16_le;
1049 map->format.parse_inplace = regmap_parse_16_le_inplace;
1050 break;
1051 case REGMAP_ENDIAN_NATIVE:
1052 map->format.format_val = regmap_format_16_native;
1053 map->format.parse_val = regmap_parse_16_native;
1054 break;
1055 default:
1056 goto err_hwlock;
1057 }
1058 break;
1059 case 24:
1060 switch (val_endian) {
1061 case REGMAP_ENDIAN_BIG:
1062 map->format.format_val = regmap_format_24_be;
1063 map->format.parse_val = regmap_parse_24_be;
1064 break;
1065 default:
1066 goto err_hwlock;
1067 }
1068 break;
1069 case 32:
1070 switch (val_endian) {
1071 case REGMAP_ENDIAN_BIG:
1072 map->format.format_val = regmap_format_32_be;
1073 map->format.parse_val = regmap_parse_32_be;
1074 map->format.parse_inplace = regmap_parse_32_be_inplace;
1075 break;
1076 case REGMAP_ENDIAN_LITTLE:
1077 map->format.format_val = regmap_format_32_le;
1078 map->format.parse_val = regmap_parse_32_le;
1079 map->format.parse_inplace = regmap_parse_32_le_inplace;
1080 break;
1081 case REGMAP_ENDIAN_NATIVE:
1082 map->format.format_val = regmap_format_32_native;
1083 map->format.parse_val = regmap_parse_32_native;
1084 break;
1085 default:
1086 goto err_hwlock;
1087 }
1088 break;
1089#ifdef CONFIG_64BIT
1090 case 64:
1091 switch (val_endian) {
1092 case REGMAP_ENDIAN_BIG:
1093 map->format.format_val = regmap_format_64_be;
1094 map->format.parse_val = regmap_parse_64_be;
1095 map->format.parse_inplace = regmap_parse_64_be_inplace;
1096 break;
1097 case REGMAP_ENDIAN_LITTLE:
1098 map->format.format_val = regmap_format_64_le;
1099 map->format.parse_val = regmap_parse_64_le;
1100 map->format.parse_inplace = regmap_parse_64_le_inplace;
1101 break;
1102 case REGMAP_ENDIAN_NATIVE:
1103 map->format.format_val = regmap_format_64_native;
1104 map->format.parse_val = regmap_parse_64_native;
1105 break;
1106 default:
1107 goto err_hwlock;
1108 }
1109 break;
1110#endif
1111 }
1112
1113 if (map->format.format_write) {
1114 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1115 (val_endian != REGMAP_ENDIAN_BIG))
1116 goto err_hwlock;
1117 map->use_single_write = true;
1118 }
1119
1120 if (!map->format.format_write &&
1121 !(map->format.format_reg && map->format.format_val))
1122 goto err_hwlock;
1123
1124 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1125 if (map->work_buf == NULL) {
1126 ret = -ENOMEM;
1127 goto err_hwlock;
1128 }
1129
1130 if (map->format.format_write) {
1131 map->defer_caching = false;
1132 map->reg_write = _regmap_bus_formatted_write;
1133 } else if (map->format.format_val) {
1134 map->defer_caching = true;
1135 map->reg_write = _regmap_bus_raw_write;
1136 }
1137
1138skip_format_initialization:
1139
1140 map->range_tree = RB_ROOT;
1141 for (i = 0; i < config->num_ranges; i++) {
1142 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1143 struct regmap_range_node *new;
1144
1145 /* Sanity check */
1146 if (range_cfg->range_max < range_cfg->range_min) {
1147 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1148 range_cfg->range_max, range_cfg->range_min);
1149 goto err_range;
1150 }
1151
1152 if (range_cfg->range_max > map->max_register) {
1153 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1154 range_cfg->range_max, map->max_register);
1155 goto err_range;
1156 }
1157
1158 if (range_cfg->selector_reg > map->max_register) {
1159 dev_err(map->dev,
1160 "Invalid range %d: selector out of map\n", i);
1161 goto err_range;
1162 }
1163
1164 if (range_cfg->window_len == 0) {
1165 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1166 i);
1167 goto err_range;
1168 }
1169
1170 /* Make sure, that this register range has no selector
1171 or data window within its boundary */
1172 for (j = 0; j < config->num_ranges; j++) {
1173 unsigned int sel_reg = config->ranges[j].selector_reg;
1174 unsigned int win_min = config->ranges[j].window_start;
1175 unsigned int win_max = win_min +
1176 config->ranges[j].window_len - 1;
1177
1178 /* Allow data window inside its own virtual range */
1179 if (j == i)
1180 continue;
1181
1182 if (range_cfg->range_min <= sel_reg &&
1183 sel_reg <= range_cfg->range_max) {
1184 dev_err(map->dev,
1185 "Range %d: selector for %d in window\n",
1186 i, j);
1187 goto err_range;
1188 }
1189
1190 if (!(win_max < range_cfg->range_min ||
1191 win_min > range_cfg->range_max)) {
1192 dev_err(map->dev,
1193 "Range %d: window for %d in window\n",
1194 i, j);
1195 goto err_range;
1196 }
1197 }
1198
1199 new = kzalloc(sizeof(*new), GFP_KERNEL);
1200 if (new == NULL) {
1201 ret = -ENOMEM;
1202 goto err_range;
1203 }
1204
1205 new->map = map;
1206 new->name = range_cfg->name;
1207 new->range_min = range_cfg->range_min;
1208 new->range_max = range_cfg->range_max;
1209 new->selector_reg = range_cfg->selector_reg;
1210 new->selector_mask = range_cfg->selector_mask;
1211 new->selector_shift = range_cfg->selector_shift;
1212 new->window_start = range_cfg->window_start;
1213 new->window_len = range_cfg->window_len;
1214
1215 if (!_regmap_range_add(map, new)) {
1216 dev_err(map->dev, "Failed to add range %d\n", i);
1217 kfree(new);
1218 goto err_range;
1219 }
1220
1221 if (map->selector_work_buf == NULL) {
1222 map->selector_work_buf =
1223 kzalloc(map->format.buf_size, GFP_KERNEL);
1224 if (map->selector_work_buf == NULL) {
1225 ret = -ENOMEM;
1226 goto err_range;
1227 }
1228 }
1229 }
1230
1231 ret = regcache_init(map, config);
1232 if (ret != 0)
1233 goto err_range;
1234
1235 if (dev) {
1236 ret = regmap_attach_dev(dev, map, config);
1237 if (ret != 0)
1238 goto err_regcache;
1239 } else {
1240 regmap_debugfs_init(map);
1241 }
1242
1243 return map;
1244
1245err_regcache:
1246 regcache_exit(map);
1247err_range:
1248 regmap_range_exit(map);
1249 kfree(map->work_buf);
1250err_hwlock:
1251 if (map->hwlock)
1252 hwspin_lock_free(map->hwlock);
1253err_name:
1254 kfree_const(map->name);
1255err_map:
1256 kfree(map);
1257err:
1258 return ERR_PTR(ret);
1259}
1260EXPORT_SYMBOL_GPL(__regmap_init);
1261
1262static void devm_regmap_release(struct device *dev, void *res)
1263{
1264 regmap_exit(*(struct regmap **)res);
1265}
1266
1267struct regmap *__devm_regmap_init(struct device *dev,
1268 const struct regmap_bus *bus,
1269 void *bus_context,
1270 const struct regmap_config *config,
1271 struct lock_class_key *lock_key,
1272 const char *lock_name)
1273{
1274 struct regmap **ptr, *regmap;
1275
1276 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1277 if (!ptr)
1278 return ERR_PTR(-ENOMEM);
1279
1280 regmap = __regmap_init(dev, bus, bus_context, config,
1281 lock_key, lock_name);
1282 if (!IS_ERR(regmap)) {
1283 *ptr = regmap;
1284 devres_add(dev, ptr);
1285 } else {
1286 devres_free(ptr);
1287 }
1288
1289 return regmap;
1290}
1291EXPORT_SYMBOL_GPL(__devm_regmap_init);
1292
1293static void regmap_field_init(struct regmap_field *rm_field,
1294 struct regmap *regmap, struct reg_field reg_field)
1295{
1296 rm_field->regmap = regmap;
1297 rm_field->reg = reg_field.reg;
1298 rm_field->shift = reg_field.lsb;
1299 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1300
1301 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1302
1303 rm_field->id_size = reg_field.id_size;
1304 rm_field->id_offset = reg_field.id_offset;
1305}
1306
1307/**
1308 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1309 *
1310 * @dev: Device that will be interacted with
1311 * @regmap: regmap bank in which this register field is located.
1312 * @reg_field: Register field with in the bank.
1313 *
1314 * The return value will be an ERR_PTR() on error or a valid pointer
1315 * to a struct regmap_field. The regmap_field will be automatically freed
1316 * by the device management code.
1317 */
1318struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1319 struct regmap *regmap, struct reg_field reg_field)
1320{
1321 struct regmap_field *rm_field = devm_kzalloc(dev,
1322 sizeof(*rm_field), GFP_KERNEL);
1323 if (!rm_field)
1324 return ERR_PTR(-ENOMEM);
1325
1326 regmap_field_init(rm_field, regmap, reg_field);
1327
1328 return rm_field;
1329
1330}
1331EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1332
1333
1334/**
1335 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1336 *
1337 * @regmap: regmap bank in which this register field is located.
1338 * @rm_field: regmap register fields within the bank.
1339 * @reg_field: Register fields within the bank.
1340 * @num_fields: Number of register fields.
1341 *
1342 * The return value will be an -ENOMEM on error or zero for success.
1343 * Newly allocated regmap_fields should be freed by calling
1344 * regmap_field_bulk_free()
1345 */
1346int regmap_field_bulk_alloc(struct regmap *regmap,
1347 struct regmap_field **rm_field,
1348 const struct reg_field *reg_field,
1349 int num_fields)
1350{
1351 struct regmap_field *rf;
1352 int i;
1353
1354 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1355 if (!rf)
1356 return -ENOMEM;
1357
1358 for (i = 0; i < num_fields; i++) {
1359 regmap_field_init(&rf[i], regmap, reg_field[i]);
1360 rm_field[i] = &rf[i];
1361 }
1362
1363 return 0;
1364}
1365EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1366
1367/**
1368 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1369 * fields.
1370 *
1371 * @dev: Device that will be interacted with
1372 * @regmap: regmap bank in which this register field is located.
1373 * @rm_field: regmap register fields within the bank.
1374 * @reg_field: Register fields within the bank.
1375 * @num_fields: Number of register fields.
1376 *
1377 * The return value will be an -ENOMEM on error or zero for success.
1378 * Newly allocated regmap_fields will be automatically freed by the
1379 * device management code.
1380 */
1381int devm_regmap_field_bulk_alloc(struct device *dev,
1382 struct regmap *regmap,
1383 struct regmap_field **rm_field,
1384 const struct reg_field *reg_field,
1385 int num_fields)
1386{
1387 struct regmap_field *rf;
1388 int i;
1389
1390 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1391 if (!rf)
1392 return -ENOMEM;
1393
1394 for (i = 0; i < num_fields; i++) {
1395 regmap_field_init(&rf[i], regmap, reg_field[i]);
1396 rm_field[i] = &rf[i];
1397 }
1398
1399 return 0;
1400}
1401EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1402
1403/**
1404 * regmap_field_bulk_free() - Free register field allocated using
1405 * regmap_field_bulk_alloc.
1406 *
1407 * @field: regmap fields which should be freed.
1408 */
1409void regmap_field_bulk_free(struct regmap_field *field)
1410{
1411 kfree(field);
1412}
1413EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1414
1415/**
1416 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1417 * devm_regmap_field_bulk_alloc.
1418 *
1419 * @dev: Device that will be interacted with
1420 * @field: regmap field which should be freed.
1421 *
1422 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1423 * drivers need not call this function, as the memory allocated via devm
1424 * will be freed as per device-driver life-cycle.
1425 */
1426void devm_regmap_field_bulk_free(struct device *dev,
1427 struct regmap_field *field)
1428{
1429 devm_kfree(dev, field);
1430}
1431EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1432
1433/**
1434 * devm_regmap_field_free() - Free a register field allocated using
1435 * devm_regmap_field_alloc.
1436 *
1437 * @dev: Device that will be interacted with
1438 * @field: regmap field which should be freed.
1439 *
1440 * Free register field allocated using devm_regmap_field_alloc(). Usually
1441 * drivers need not call this function, as the memory allocated via devm
1442 * will be freed as per device-driver life-cyle.
1443 */
1444void devm_regmap_field_free(struct device *dev,
1445 struct regmap_field *field)
1446{
1447 devm_kfree(dev, field);
1448}
1449EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1450
1451/**
1452 * regmap_field_alloc() - Allocate and initialise a register field.
1453 *
1454 * @regmap: regmap bank in which this register field is located.
1455 * @reg_field: Register field with in the bank.
1456 *
1457 * The return value will be an ERR_PTR() on error or a valid pointer
1458 * to a struct regmap_field. The regmap_field should be freed by the
1459 * user once its finished working with it using regmap_field_free().
1460 */
1461struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1462 struct reg_field reg_field)
1463{
1464 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1465
1466 if (!rm_field)
1467 return ERR_PTR(-ENOMEM);
1468
1469 regmap_field_init(rm_field, regmap, reg_field);
1470
1471 return rm_field;
1472}
1473EXPORT_SYMBOL_GPL(regmap_field_alloc);
1474
1475/**
1476 * regmap_field_free() - Free register field allocated using
1477 * regmap_field_alloc.
1478 *
1479 * @field: regmap field which should be freed.
1480 */
1481void regmap_field_free(struct regmap_field *field)
1482{
1483 kfree(field);
1484}
1485EXPORT_SYMBOL_GPL(regmap_field_free);
1486
1487/**
1488 * regmap_reinit_cache() - Reinitialise the current register cache
1489 *
1490 * @map: Register map to operate on.
1491 * @config: New configuration. Only the cache data will be used.
1492 *
1493 * Discard any existing register cache for the map and initialize a
1494 * new cache. This can be used to restore the cache to defaults or to
1495 * update the cache configuration to reflect runtime discovery of the
1496 * hardware.
1497 *
1498 * No explicit locking is done here, the user needs to ensure that
1499 * this function will not race with other calls to regmap.
1500 */
1501int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1502{
1503 int ret;
1504
1505 regcache_exit(map);
1506 regmap_debugfs_exit(map);
1507
1508 map->max_register = config->max_register;
1509 map->writeable_reg = config->writeable_reg;
1510 map->readable_reg = config->readable_reg;
1511 map->volatile_reg = config->volatile_reg;
1512 map->precious_reg = config->precious_reg;
1513 map->writeable_noinc_reg = config->writeable_noinc_reg;
1514 map->readable_noinc_reg = config->readable_noinc_reg;
1515 map->cache_type = config->cache_type;
1516
1517 ret = regmap_set_name(map, config);
1518 if (ret)
1519 return ret;
1520
1521 regmap_debugfs_init(map);
1522
1523 map->cache_bypass = false;
1524 map->cache_only = false;
1525
1526 return regcache_init(map, config);
1527}
1528EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1529
1530/**
1531 * regmap_exit() - Free a previously allocated register map
1532 *
1533 * @map: Register map to operate on.
1534 */
1535void regmap_exit(struct regmap *map)
1536{
1537 struct regmap_async *async;
1538
1539 regcache_exit(map);
1540 regmap_debugfs_exit(map);
1541 regmap_range_exit(map);
1542 if (map->bus && map->bus->free_context)
1543 map->bus->free_context(map->bus_context);
1544 kfree(map->work_buf);
1545 while (!list_empty(&map->async_free)) {
1546 async = list_first_entry_or_null(&map->async_free,
1547 struct regmap_async,
1548 list);
1549 list_del(&async->list);
1550 kfree(async->work_buf);
1551 kfree(async);
1552 }
1553 if (map->hwlock)
1554 hwspin_lock_free(map->hwlock);
1555 if (map->lock == regmap_lock_mutex)
1556 mutex_destroy(&map->mutex);
1557 kfree_const(map->name);
1558 kfree(map->patch);
1559 if (map->bus && map->bus->free_on_exit)
1560 kfree(map->bus);
1561 kfree(map);
1562}
1563EXPORT_SYMBOL_GPL(regmap_exit);
1564
1565static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1566{
1567 struct regmap **r = res;
1568 if (!r || !*r) {
1569 WARN_ON(!r || !*r);
1570 return 0;
1571 }
1572
1573 /* If the user didn't specify a name match any */
1574 if (data)
1575 return !strcmp((*r)->name, data);
1576 else
1577 return 1;
1578}
1579
1580/**
1581 * dev_get_regmap() - Obtain the regmap (if any) for a device
1582 *
1583 * @dev: Device to retrieve the map for
1584 * @name: Optional name for the register map, usually NULL.
1585 *
1586 * Returns the regmap for the device if one is present, or NULL. If
1587 * name is specified then it must match the name specified when
1588 * registering the device, if it is NULL then the first regmap found
1589 * will be used. Devices with multiple register maps are very rare,
1590 * generic code should normally not need to specify a name.
1591 */
1592struct regmap *dev_get_regmap(struct device *dev, const char *name)
1593{
1594 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1595 dev_get_regmap_match, (void *)name);
1596
1597 if (!r)
1598 return NULL;
1599 return *r;
1600}
1601EXPORT_SYMBOL_GPL(dev_get_regmap);
1602
1603/**
1604 * regmap_get_device() - Obtain the device from a regmap
1605 *
1606 * @map: Register map to operate on.
1607 *
1608 * Returns the underlying device that the regmap has been created for.
1609 */
1610struct device *regmap_get_device(struct regmap *map)
1611{
1612 return map->dev;
1613}
1614EXPORT_SYMBOL_GPL(regmap_get_device);
1615
1616static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1617 struct regmap_range_node *range,
1618 unsigned int val_num)
1619{
1620 void *orig_work_buf;
1621 unsigned int win_offset;
1622 unsigned int win_page;
1623 bool page_chg;
1624 int ret;
1625
1626 win_offset = (*reg - range->range_min) % range->window_len;
1627 win_page = (*reg - range->range_min) / range->window_len;
1628
1629 if (val_num > 1) {
1630 /* Bulk write shouldn't cross range boundary */
1631 if (*reg + val_num - 1 > range->range_max)
1632 return -EINVAL;
1633
1634 /* ... or single page boundary */
1635 if (val_num > range->window_len - win_offset)
1636 return -EINVAL;
1637 }
1638
1639 /* It is possible to have selector register inside data window.
1640 In that case, selector register is located on every page and
1641 it needs no page switching, when accessed alone. */
1642 if (val_num > 1 ||
1643 range->window_start + win_offset != range->selector_reg) {
1644 /* Use separate work_buf during page switching */
1645 orig_work_buf = map->work_buf;
1646 map->work_buf = map->selector_work_buf;
1647
1648 ret = _regmap_update_bits(map, range->selector_reg,
1649 range->selector_mask,
1650 win_page << range->selector_shift,
1651 &page_chg, false);
1652
1653 map->work_buf = orig_work_buf;
1654
1655 if (ret != 0)
1656 return ret;
1657 }
1658
1659 *reg = range->window_start + win_offset;
1660
1661 return 0;
1662}
1663
1664static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1665 unsigned long mask)
1666{
1667 u8 *buf;
1668 int i;
1669
1670 if (!mask || !map->work_buf)
1671 return;
1672
1673 buf = map->work_buf;
1674
1675 for (i = 0; i < max_bytes; i++)
1676 buf[i] |= (mask >> (8 * i)) & 0xff;
1677}
1678
1679static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1680 const void *val, size_t val_len, bool noinc)
1681{
1682 struct regmap_range_node *range;
1683 unsigned long flags;
1684 void *work_val = map->work_buf + map->format.reg_bytes +
1685 map->format.pad_bytes;
1686 void *buf;
1687 int ret = -ENOTSUPP;
1688 size_t len;
1689 int i;
1690
1691 /* Check for unwritable or noinc registers in range
1692 * before we start
1693 */
1694 if (!regmap_writeable_noinc(map, reg)) {
1695 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1696 unsigned int element =
1697 reg + regmap_get_offset(map, i);
1698 if (!regmap_writeable(map, element) ||
1699 regmap_writeable_noinc(map, element))
1700 return -EINVAL;
1701 }
1702 }
1703
1704 if (!map->cache_bypass && map->format.parse_val) {
1705 unsigned int ival;
1706 int val_bytes = map->format.val_bytes;
1707 for (i = 0; i < val_len / val_bytes; i++) {
1708 ival = map->format.parse_val(val + (i * val_bytes));
1709 ret = regcache_write(map,
1710 reg + regmap_get_offset(map, i),
1711 ival);
1712 if (ret) {
1713 dev_err(map->dev,
1714 "Error in caching of register: %x ret: %d\n",
1715 reg + regmap_get_offset(map, i), ret);
1716 return ret;
1717 }
1718 }
1719 if (map->cache_only) {
1720 map->cache_dirty = true;
1721 return 0;
1722 }
1723 }
1724
1725 range = _regmap_range_lookup(map, reg);
1726 if (range) {
1727 int val_num = val_len / map->format.val_bytes;
1728 int win_offset = (reg - range->range_min) % range->window_len;
1729 int win_residue = range->window_len - win_offset;
1730
1731 /* If the write goes beyond the end of the window split it */
1732 while (val_num > win_residue) {
1733 dev_dbg(map->dev, "Writing window %d/%zu\n",
1734 win_residue, val_len / map->format.val_bytes);
1735 ret = _regmap_raw_write_impl(map, reg, val,
1736 win_residue *
1737 map->format.val_bytes, noinc);
1738 if (ret != 0)
1739 return ret;
1740
1741 reg += win_residue;
1742 val_num -= win_residue;
1743 val += win_residue * map->format.val_bytes;
1744 val_len -= win_residue * map->format.val_bytes;
1745
1746 win_offset = (reg - range->range_min) %
1747 range->window_len;
1748 win_residue = range->window_len - win_offset;
1749 }
1750
1751 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1752 if (ret != 0)
1753 return ret;
1754 }
1755
1756 reg += map->reg_base;
1757 reg >>= map->format.reg_downshift;
1758 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1759 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1760 map->write_flag_mask);
1761
1762 /*
1763 * Essentially all I/O mechanisms will be faster with a single
1764 * buffer to write. Since register syncs often generate raw
1765 * writes of single registers optimise that case.
1766 */
1767 if (val != work_val && val_len == map->format.val_bytes) {
1768 memcpy(work_val, val, map->format.val_bytes);
1769 val = work_val;
1770 }
1771
1772 if (map->async && map->bus && map->bus->async_write) {
1773 struct regmap_async *async;
1774
1775 trace_regmap_async_write_start(map, reg, val_len);
1776
1777 spin_lock_irqsave(&map->async_lock, flags);
1778 async = list_first_entry_or_null(&map->async_free,
1779 struct regmap_async,
1780 list);
1781 if (async)
1782 list_del(&async->list);
1783 spin_unlock_irqrestore(&map->async_lock, flags);
1784
1785 if (!async) {
1786 async = map->bus->async_alloc();
1787 if (!async)
1788 return -ENOMEM;
1789
1790 async->work_buf = kzalloc(map->format.buf_size,
1791 GFP_KERNEL | GFP_DMA);
1792 if (!async->work_buf) {
1793 kfree(async);
1794 return -ENOMEM;
1795 }
1796 }
1797
1798 async->map = map;
1799
1800 /* If the caller supplied the value we can use it safely. */
1801 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1802 map->format.reg_bytes + map->format.val_bytes);
1803
1804 spin_lock_irqsave(&map->async_lock, flags);
1805 list_add_tail(&async->list, &map->async_list);
1806 spin_unlock_irqrestore(&map->async_lock, flags);
1807
1808 if (val != work_val)
1809 ret = map->bus->async_write(map->bus_context,
1810 async->work_buf,
1811 map->format.reg_bytes +
1812 map->format.pad_bytes,
1813 val, val_len, async);
1814 else
1815 ret = map->bus->async_write(map->bus_context,
1816 async->work_buf,
1817 map->format.reg_bytes +
1818 map->format.pad_bytes +
1819 val_len, NULL, 0, async);
1820
1821 if (ret != 0) {
1822 dev_err(map->dev, "Failed to schedule write: %d\n",
1823 ret);
1824
1825 spin_lock_irqsave(&map->async_lock, flags);
1826 list_move(&async->list, &map->async_free);
1827 spin_unlock_irqrestore(&map->async_lock, flags);
1828 }
1829
1830 return ret;
1831 }
1832
1833 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1834
1835 /* If we're doing a single register write we can probably just
1836 * send the work_buf directly, otherwise try to do a gather
1837 * write.
1838 */
1839 if (val == work_val)
1840 ret = map->write(map->bus_context, map->work_buf,
1841 map->format.reg_bytes +
1842 map->format.pad_bytes +
1843 val_len);
1844 else if (map->bus && map->bus->gather_write)
1845 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1846 map->format.reg_bytes +
1847 map->format.pad_bytes,
1848 val, val_len);
1849 else
1850 ret = -ENOTSUPP;
1851
1852 /* If that didn't work fall back on linearising by hand. */
1853 if (ret == -ENOTSUPP) {
1854 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1855 buf = kzalloc(len, GFP_KERNEL);
1856 if (!buf)
1857 return -ENOMEM;
1858
1859 memcpy(buf, map->work_buf, map->format.reg_bytes);
1860 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1861 val, val_len);
1862 ret = map->write(map->bus_context, buf, len);
1863
1864 kfree(buf);
1865 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1866 /* regcache_drop_region() takes lock that we already have,
1867 * thus call map->cache_ops->drop() directly
1868 */
1869 if (map->cache_ops && map->cache_ops->drop)
1870 map->cache_ops->drop(map, reg, reg + 1);
1871 }
1872
1873 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1874
1875 return ret;
1876}
1877
1878/**
1879 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1880 *
1881 * @map: Map to check.
1882 */
1883bool regmap_can_raw_write(struct regmap *map)
1884{
1885 return map->write && map->format.format_val && map->format.format_reg;
1886}
1887EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1888
1889/**
1890 * regmap_get_raw_read_max - Get the maximum size we can read
1891 *
1892 * @map: Map to check.
1893 */
1894size_t regmap_get_raw_read_max(struct regmap *map)
1895{
1896 return map->max_raw_read;
1897}
1898EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1899
1900/**
1901 * regmap_get_raw_write_max - Get the maximum size we can read
1902 *
1903 * @map: Map to check.
1904 */
1905size_t regmap_get_raw_write_max(struct regmap *map)
1906{
1907 return map->max_raw_write;
1908}
1909EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1910
1911static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1912 unsigned int val)
1913{
1914 int ret;
1915 struct regmap_range_node *range;
1916 struct regmap *map = context;
1917
1918 WARN_ON(!map->format.format_write);
1919
1920 range = _regmap_range_lookup(map, reg);
1921 if (range) {
1922 ret = _regmap_select_page(map, ®, range, 1);
1923 if (ret != 0)
1924 return ret;
1925 }
1926
1927 reg += map->reg_base;
1928 reg >>= map->format.reg_downshift;
1929 map->format.format_write(map, reg, val);
1930
1931 trace_regmap_hw_write_start(map, reg, 1);
1932
1933 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1934
1935 trace_regmap_hw_write_done(map, reg, 1);
1936
1937 return ret;
1938}
1939
1940static int _regmap_bus_reg_write(void *context, unsigned int reg,
1941 unsigned int val)
1942{
1943 struct regmap *map = context;
1944
1945 return map->bus->reg_write(map->bus_context, reg, val);
1946}
1947
1948static int _regmap_bus_raw_write(void *context, unsigned int reg,
1949 unsigned int val)
1950{
1951 struct regmap *map = context;
1952
1953 WARN_ON(!map->format.format_val);
1954
1955 map->format.format_val(map->work_buf + map->format.reg_bytes
1956 + map->format.pad_bytes, val, 0);
1957 return _regmap_raw_write_impl(map, reg,
1958 map->work_buf +
1959 map->format.reg_bytes +
1960 map->format.pad_bytes,
1961 map->format.val_bytes,
1962 false);
1963}
1964
1965static inline void *_regmap_map_get_context(struct regmap *map)
1966{
1967 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1968}
1969
1970int _regmap_write(struct regmap *map, unsigned int reg,
1971 unsigned int val)
1972{
1973 int ret;
1974 void *context = _regmap_map_get_context(map);
1975
1976 if (!regmap_writeable(map, reg))
1977 return -EIO;
1978
1979 if (!map->cache_bypass && !map->defer_caching) {
1980 ret = regcache_write(map, reg, val);
1981 if (ret != 0)
1982 return ret;
1983 if (map->cache_only) {
1984 map->cache_dirty = true;
1985 return 0;
1986 }
1987 }
1988
1989 ret = map->reg_write(context, reg, val);
1990 if (ret == 0) {
1991 if (regmap_should_log(map))
1992 dev_info(map->dev, "%x <= %x\n", reg, val);
1993
1994 trace_regmap_reg_write(map, reg, val);
1995 }
1996
1997 return ret;
1998}
1999
2000/**
2001 * regmap_write() - Write a value to a single register
2002 *
2003 * @map: Register map to write to
2004 * @reg: Register to write to
2005 * @val: Value to be written
2006 *
2007 * A value of zero will be returned on success, a negative errno will
2008 * be returned in error cases.
2009 */
2010int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
2011{
2012 int ret;
2013
2014 if (!IS_ALIGNED(reg, map->reg_stride))
2015 return -EINVAL;
2016
2017 map->lock(map->lock_arg);
2018
2019 ret = _regmap_write(map, reg, val);
2020
2021 map->unlock(map->lock_arg);
2022
2023 return ret;
2024}
2025EXPORT_SYMBOL_GPL(regmap_write);
2026
2027/**
2028 * regmap_write_async() - Write a value to a single register asynchronously
2029 *
2030 * @map: Register map to write to
2031 * @reg: Register to write to
2032 * @val: Value to be written
2033 *
2034 * A value of zero will be returned on success, a negative errno will
2035 * be returned in error cases.
2036 */
2037int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
2038{
2039 int ret;
2040
2041 if (!IS_ALIGNED(reg, map->reg_stride))
2042 return -EINVAL;
2043
2044 map->lock(map->lock_arg);
2045
2046 map->async = true;
2047
2048 ret = _regmap_write(map, reg, val);
2049
2050 map->async = false;
2051
2052 map->unlock(map->lock_arg);
2053
2054 return ret;
2055}
2056EXPORT_SYMBOL_GPL(regmap_write_async);
2057
2058int _regmap_raw_write(struct regmap *map, unsigned int reg,
2059 const void *val, size_t val_len, bool noinc)
2060{
2061 size_t val_bytes = map->format.val_bytes;
2062 size_t val_count = val_len / val_bytes;
2063 size_t chunk_count, chunk_bytes;
2064 size_t chunk_regs = val_count;
2065 int ret, i;
2066
2067 if (!val_count)
2068 return -EINVAL;
2069
2070 if (map->use_single_write)
2071 chunk_regs = 1;
2072 else if (map->max_raw_write && val_len > map->max_raw_write)
2073 chunk_regs = map->max_raw_write / val_bytes;
2074
2075 chunk_count = val_count / chunk_regs;
2076 chunk_bytes = chunk_regs * val_bytes;
2077
2078 /* Write as many bytes as possible with chunk_size */
2079 for (i = 0; i < chunk_count; i++) {
2080 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2081 if (ret)
2082 return ret;
2083
2084 reg += regmap_get_offset(map, chunk_regs);
2085 val += chunk_bytes;
2086 val_len -= chunk_bytes;
2087 }
2088
2089 /* Write remaining bytes */
2090 if (val_len)
2091 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2092
2093 return ret;
2094}
2095
2096/**
2097 * regmap_raw_write() - Write raw values to one or more registers
2098 *
2099 * @map: Register map to write to
2100 * @reg: Initial register to write to
2101 * @val: Block of data to be written, laid out for direct transmission to the
2102 * device
2103 * @val_len: Length of data pointed to by val.
2104 *
2105 * This function is intended to be used for things like firmware
2106 * download where a large block of data needs to be transferred to the
2107 * device. No formatting will be done on the data provided.
2108 *
2109 * A value of zero will be returned on success, a negative errno will
2110 * be returned in error cases.
2111 */
2112int regmap_raw_write(struct regmap *map, unsigned int reg,
2113 const void *val, size_t val_len)
2114{
2115 int ret;
2116
2117 if (!regmap_can_raw_write(map))
2118 return -EINVAL;
2119 if (val_len % map->format.val_bytes)
2120 return -EINVAL;
2121
2122 map->lock(map->lock_arg);
2123
2124 ret = _regmap_raw_write(map, reg, val, val_len, false);
2125
2126 map->unlock(map->lock_arg);
2127
2128 return ret;
2129}
2130EXPORT_SYMBOL_GPL(regmap_raw_write);
2131
2132static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2133 void *val, unsigned int val_len, bool write)
2134{
2135 size_t val_bytes = map->format.val_bytes;
2136 size_t val_count = val_len / val_bytes;
2137 unsigned int lastval;
2138 u8 *u8p;
2139 u16 *u16p;
2140 u32 *u32p;
2141#ifdef CONFIG_64BIT
2142 u64 *u64p;
2143#endif
2144 int ret;
2145 int i;
2146
2147 switch (val_bytes) {
2148 case 1:
2149 u8p = val;
2150 if (write)
2151 lastval = (unsigned int)u8p[val_count - 1];
2152 break;
2153 case 2:
2154 u16p = val;
2155 if (write)
2156 lastval = (unsigned int)u16p[val_count - 1];
2157 break;
2158 case 4:
2159 u32p = val;
2160 if (write)
2161 lastval = (unsigned int)u32p[val_count - 1];
2162 break;
2163#ifdef CONFIG_64BIT
2164 case 8:
2165 u64p = val;
2166 if (write)
2167 lastval = (unsigned int)u64p[val_count - 1];
2168 break;
2169#endif
2170 default:
2171 return -EINVAL;
2172 }
2173
2174 /*
2175 * Update the cache with the last value we write, the rest is just
2176 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2177 * sure a single read from the cache will work.
2178 */
2179 if (write) {
2180 if (!map->cache_bypass && !map->defer_caching) {
2181 ret = regcache_write(map, reg, lastval);
2182 if (ret != 0)
2183 return ret;
2184 if (map->cache_only) {
2185 map->cache_dirty = true;
2186 return 0;
2187 }
2188 }
2189 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2190 } else {
2191 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2192 }
2193
2194 if (!ret && regmap_should_log(map)) {
2195 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2196 for (i = 0; i < val_count; i++) {
2197 switch (val_bytes) {
2198 case 1:
2199 pr_cont("%x", u8p[i]);
2200 break;
2201 case 2:
2202 pr_cont("%x", u16p[i]);
2203 break;
2204 case 4:
2205 pr_cont("%x", u32p[i]);
2206 break;
2207#ifdef CONFIG_64BIT
2208 case 8:
2209 pr_cont("%llx", u64p[i]);
2210 break;
2211#endif
2212 default:
2213 break;
2214 }
2215 if (i == (val_count - 1))
2216 pr_cont("]\n");
2217 else
2218 pr_cont(",");
2219 }
2220 }
2221
2222 return 0;
2223}
2224
2225/**
2226 * regmap_noinc_write(): Write data from a register without incrementing the
2227 * register number
2228 *
2229 * @map: Register map to write to
2230 * @reg: Register to write to
2231 * @val: Pointer to data buffer
2232 * @val_len: Length of output buffer in bytes.
2233 *
2234 * The regmap API usually assumes that bulk bus write operations will write a
2235 * range of registers. Some devices have certain registers for which a write
2236 * operation can write to an internal FIFO.
2237 *
2238 * The target register must be volatile but registers after it can be
2239 * completely unrelated cacheable registers.
2240 *
2241 * This will attempt multiple writes as required to write val_len bytes.
2242 *
2243 * A value of zero will be returned on success, a negative errno will be
2244 * returned in error cases.
2245 */
2246int regmap_noinc_write(struct regmap *map, unsigned int reg,
2247 const void *val, size_t val_len)
2248{
2249 size_t write_len;
2250 int ret;
2251
2252 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2253 return -EINVAL;
2254 if (val_len % map->format.val_bytes)
2255 return -EINVAL;
2256 if (!IS_ALIGNED(reg, map->reg_stride))
2257 return -EINVAL;
2258 if (val_len == 0)
2259 return -EINVAL;
2260
2261 map->lock(map->lock_arg);
2262
2263 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2264 ret = -EINVAL;
2265 goto out_unlock;
2266 }
2267
2268 /*
2269 * Use the accelerated operation if we can. The val drops the const
2270 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2271 */
2272 if (map->bus->reg_noinc_write) {
2273 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2274 goto out_unlock;
2275 }
2276
2277 while (val_len) {
2278 if (map->max_raw_write && map->max_raw_write < val_len)
2279 write_len = map->max_raw_write;
2280 else
2281 write_len = val_len;
2282 ret = _regmap_raw_write(map, reg, val, write_len, true);
2283 if (ret)
2284 goto out_unlock;
2285 val = ((u8 *)val) + write_len;
2286 val_len -= write_len;
2287 }
2288
2289out_unlock:
2290 map->unlock(map->lock_arg);
2291 return ret;
2292}
2293EXPORT_SYMBOL_GPL(regmap_noinc_write);
2294
2295/**
2296 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2297 * register field.
2298 *
2299 * @field: Register field to write to
2300 * @mask: Bitmask to change
2301 * @val: Value to be written
2302 * @change: Boolean indicating if a write was done
2303 * @async: Boolean indicating asynchronously
2304 * @force: Boolean indicating use force update
2305 *
2306 * Perform a read/modify/write cycle on the register field with change,
2307 * async, force option.
2308 *
2309 * A value of zero will be returned on success, a negative errno will
2310 * be returned in error cases.
2311 */
2312int regmap_field_update_bits_base(struct regmap_field *field,
2313 unsigned int mask, unsigned int val,
2314 bool *change, bool async, bool force)
2315{
2316 mask = (mask << field->shift) & field->mask;
2317
2318 return regmap_update_bits_base(field->regmap, field->reg,
2319 mask, val << field->shift,
2320 change, async, force);
2321}
2322EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2323
2324/**
2325 * regmap_field_test_bits() - Check if all specified bits are set in a
2326 * register field.
2327 *
2328 * @field: Register field to operate on
2329 * @bits: Bits to test
2330 *
2331 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2332 * tested bits is not set and 1 if all tested bits are set.
2333 */
2334int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2335{
2336 unsigned int val, ret;
2337
2338 ret = regmap_field_read(field, &val);
2339 if (ret)
2340 return ret;
2341
2342 return (val & bits) == bits;
2343}
2344EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2345
2346/**
2347 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2348 * register field with port ID
2349 *
2350 * @field: Register field to write to
2351 * @id: port ID
2352 * @mask: Bitmask to change
2353 * @val: Value to be written
2354 * @change: Boolean indicating if a write was done
2355 * @async: Boolean indicating asynchronously
2356 * @force: Boolean indicating use force update
2357 *
2358 * A value of zero will be returned on success, a negative errno will
2359 * be returned in error cases.
2360 */
2361int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2362 unsigned int mask, unsigned int val,
2363 bool *change, bool async, bool force)
2364{
2365 if (id >= field->id_size)
2366 return -EINVAL;
2367
2368 mask = (mask << field->shift) & field->mask;
2369
2370 return regmap_update_bits_base(field->regmap,
2371 field->reg + (field->id_offset * id),
2372 mask, val << field->shift,
2373 change, async, force);
2374}
2375EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2376
2377/**
2378 * regmap_bulk_write() - Write multiple registers to the device
2379 *
2380 * @map: Register map to write to
2381 * @reg: First register to be write from
2382 * @val: Block of data to be written, in native register size for device
2383 * @val_count: Number of registers to write
2384 *
2385 * This function is intended to be used for writing a large block of
2386 * data to the device either in single transfer or multiple transfer.
2387 *
2388 * A value of zero will be returned on success, a negative errno will
2389 * be returned in error cases.
2390 */
2391int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2392 size_t val_count)
2393{
2394 int ret = 0, i;
2395 size_t val_bytes = map->format.val_bytes;
2396
2397 if (!IS_ALIGNED(reg, map->reg_stride))
2398 return -EINVAL;
2399
2400 /*
2401 * Some devices don't support bulk write, for them we have a series of
2402 * single write operations.
2403 */
2404 if (!map->write || !map->format.parse_inplace) {
2405 map->lock(map->lock_arg);
2406 for (i = 0; i < val_count; i++) {
2407 unsigned int ival;
2408
2409 switch (val_bytes) {
2410 case 1:
2411 ival = *(u8 *)(val + (i * val_bytes));
2412 break;
2413 case 2:
2414 ival = *(u16 *)(val + (i * val_bytes));
2415 break;
2416 case 4:
2417 ival = *(u32 *)(val + (i * val_bytes));
2418 break;
2419#ifdef CONFIG_64BIT
2420 case 8:
2421 ival = *(u64 *)(val + (i * val_bytes));
2422 break;
2423#endif
2424 default:
2425 ret = -EINVAL;
2426 goto out;
2427 }
2428
2429 ret = _regmap_write(map,
2430 reg + regmap_get_offset(map, i),
2431 ival);
2432 if (ret != 0)
2433 goto out;
2434 }
2435out:
2436 map->unlock(map->lock_arg);
2437 } else {
2438 void *wval;
2439
2440 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2441 if (!wval)
2442 return -ENOMEM;
2443
2444 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2445 map->format.parse_inplace(wval + i);
2446
2447 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2448
2449 kfree(wval);
2450 }
2451
2452 if (!ret)
2453 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2454
2455 return ret;
2456}
2457EXPORT_SYMBOL_GPL(regmap_bulk_write);
2458
2459/*
2460 * _regmap_raw_multi_reg_write()
2461 *
2462 * the (register,newvalue) pairs in regs have not been formatted, but
2463 * they are all in the same page and have been changed to being page
2464 * relative. The page register has been written if that was necessary.
2465 */
2466static int _regmap_raw_multi_reg_write(struct regmap *map,
2467 const struct reg_sequence *regs,
2468 size_t num_regs)
2469{
2470 int ret;
2471 void *buf;
2472 int i;
2473 u8 *u8;
2474 size_t val_bytes = map->format.val_bytes;
2475 size_t reg_bytes = map->format.reg_bytes;
2476 size_t pad_bytes = map->format.pad_bytes;
2477 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2478 size_t len = pair_size * num_regs;
2479
2480 if (!len)
2481 return -EINVAL;
2482
2483 buf = kzalloc(len, GFP_KERNEL);
2484 if (!buf)
2485 return -ENOMEM;
2486
2487 /* We have to linearise by hand. */
2488
2489 u8 = buf;
2490
2491 for (i = 0; i < num_regs; i++) {
2492 unsigned int reg = regs[i].reg;
2493 unsigned int val = regs[i].def;
2494 trace_regmap_hw_write_start(map, reg, 1);
2495 reg += map->reg_base;
2496 reg >>= map->format.reg_downshift;
2497 map->format.format_reg(u8, reg, map->reg_shift);
2498 u8 += reg_bytes + pad_bytes;
2499 map->format.format_val(u8, val, 0);
2500 u8 += val_bytes;
2501 }
2502 u8 = buf;
2503 *u8 |= map->write_flag_mask;
2504
2505 ret = map->write(map->bus_context, buf, len);
2506
2507 kfree(buf);
2508
2509 for (i = 0; i < num_regs; i++) {
2510 int reg = regs[i].reg;
2511 trace_regmap_hw_write_done(map, reg, 1);
2512 }
2513 return ret;
2514}
2515
2516static unsigned int _regmap_register_page(struct regmap *map,
2517 unsigned int reg,
2518 struct regmap_range_node *range)
2519{
2520 unsigned int win_page = (reg - range->range_min) / range->window_len;
2521
2522 return win_page;
2523}
2524
2525static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2526 struct reg_sequence *regs,
2527 size_t num_regs)
2528{
2529 int ret;
2530 int i, n;
2531 struct reg_sequence *base;
2532 unsigned int this_page = 0;
2533 unsigned int page_change = 0;
2534 /*
2535 * the set of registers are not neccessarily in order, but
2536 * since the order of write must be preserved this algorithm
2537 * chops the set each time the page changes. This also applies
2538 * if there is a delay required at any point in the sequence.
2539 */
2540 base = regs;
2541 for (i = 0, n = 0; i < num_regs; i++, n++) {
2542 unsigned int reg = regs[i].reg;
2543 struct regmap_range_node *range;
2544
2545 range = _regmap_range_lookup(map, reg);
2546 if (range) {
2547 unsigned int win_page = _regmap_register_page(map, reg,
2548 range);
2549
2550 if (i == 0)
2551 this_page = win_page;
2552 if (win_page != this_page) {
2553 this_page = win_page;
2554 page_change = 1;
2555 }
2556 }
2557
2558 /* If we have both a page change and a delay make sure to
2559 * write the regs and apply the delay before we change the
2560 * page.
2561 */
2562
2563 if (page_change || regs[i].delay_us) {
2564
2565 /* For situations where the first write requires
2566 * a delay we need to make sure we don't call
2567 * raw_multi_reg_write with n=0
2568 * This can't occur with page breaks as we
2569 * never write on the first iteration
2570 */
2571 if (regs[i].delay_us && i == 0)
2572 n = 1;
2573
2574 ret = _regmap_raw_multi_reg_write(map, base, n);
2575 if (ret != 0)
2576 return ret;
2577
2578 if (regs[i].delay_us) {
2579 if (map->can_sleep)
2580 fsleep(regs[i].delay_us);
2581 else
2582 udelay(regs[i].delay_us);
2583 }
2584
2585 base += n;
2586 n = 0;
2587
2588 if (page_change) {
2589 ret = _regmap_select_page(map,
2590 &base[n].reg,
2591 range, 1);
2592 if (ret != 0)
2593 return ret;
2594
2595 page_change = 0;
2596 }
2597
2598 }
2599
2600 }
2601 if (n > 0)
2602 return _regmap_raw_multi_reg_write(map, base, n);
2603 return 0;
2604}
2605
2606static int _regmap_multi_reg_write(struct regmap *map,
2607 const struct reg_sequence *regs,
2608 size_t num_regs)
2609{
2610 int i;
2611 int ret;
2612
2613 if (!map->can_multi_write) {
2614 for (i = 0; i < num_regs; i++) {
2615 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2616 if (ret != 0)
2617 return ret;
2618
2619 if (regs[i].delay_us) {
2620 if (map->can_sleep)
2621 fsleep(regs[i].delay_us);
2622 else
2623 udelay(regs[i].delay_us);
2624 }
2625 }
2626 return 0;
2627 }
2628
2629 if (!map->format.parse_inplace)
2630 return -EINVAL;
2631
2632 if (map->writeable_reg)
2633 for (i = 0; i < num_regs; i++) {
2634 int reg = regs[i].reg;
2635 if (!map->writeable_reg(map->dev, reg))
2636 return -EINVAL;
2637 if (!IS_ALIGNED(reg, map->reg_stride))
2638 return -EINVAL;
2639 }
2640
2641 if (!map->cache_bypass) {
2642 for (i = 0; i < num_regs; i++) {
2643 unsigned int val = regs[i].def;
2644 unsigned int reg = regs[i].reg;
2645 ret = regcache_write(map, reg, val);
2646 if (ret) {
2647 dev_err(map->dev,
2648 "Error in caching of register: %x ret: %d\n",
2649 reg, ret);
2650 return ret;
2651 }
2652 }
2653 if (map->cache_only) {
2654 map->cache_dirty = true;
2655 return 0;
2656 }
2657 }
2658
2659 WARN_ON(!map->bus);
2660
2661 for (i = 0; i < num_regs; i++) {
2662 unsigned int reg = regs[i].reg;
2663 struct regmap_range_node *range;
2664
2665 /* Coalesce all the writes between a page break or a delay
2666 * in a sequence
2667 */
2668 range = _regmap_range_lookup(map, reg);
2669 if (range || regs[i].delay_us) {
2670 size_t len = sizeof(struct reg_sequence)*num_regs;
2671 struct reg_sequence *base = kmemdup(regs, len,
2672 GFP_KERNEL);
2673 if (!base)
2674 return -ENOMEM;
2675 ret = _regmap_range_multi_paged_reg_write(map, base,
2676 num_regs);
2677 kfree(base);
2678
2679 return ret;
2680 }
2681 }
2682 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2683}
2684
2685/**
2686 * regmap_multi_reg_write() - Write multiple registers to the device
2687 *
2688 * @map: Register map to write to
2689 * @regs: Array of structures containing register,value to be written
2690 * @num_regs: Number of registers to write
2691 *
2692 * Write multiple registers to the device where the set of register, value
2693 * pairs are supplied in any order, possibly not all in a single range.
2694 *
2695 * The 'normal' block write mode will send ultimately send data on the
2696 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2697 * addressed. However, this alternative block multi write mode will send
2698 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2699 * must of course support the mode.
2700 *
2701 * A value of zero will be returned on success, a negative errno will be
2702 * returned in error cases.
2703 */
2704int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2705 int num_regs)
2706{
2707 int ret;
2708
2709 map->lock(map->lock_arg);
2710
2711 ret = _regmap_multi_reg_write(map, regs, num_regs);
2712
2713 map->unlock(map->lock_arg);
2714
2715 return ret;
2716}
2717EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2718
2719/**
2720 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2721 * device but not the cache
2722 *
2723 * @map: Register map to write to
2724 * @regs: Array of structures containing register,value to be written
2725 * @num_regs: Number of registers to write
2726 *
2727 * Write multiple registers to the device but not the cache where the set
2728 * of register are supplied in any order.
2729 *
2730 * This function is intended to be used for writing a large block of data
2731 * atomically to the device in single transfer for those I2C client devices
2732 * that implement this alternative block write mode.
2733 *
2734 * A value of zero will be returned on success, a negative errno will
2735 * be returned in error cases.
2736 */
2737int regmap_multi_reg_write_bypassed(struct regmap *map,
2738 const struct reg_sequence *regs,
2739 int num_regs)
2740{
2741 int ret;
2742 bool bypass;
2743
2744 map->lock(map->lock_arg);
2745
2746 bypass = map->cache_bypass;
2747 map->cache_bypass = true;
2748
2749 ret = _regmap_multi_reg_write(map, regs, num_regs);
2750
2751 map->cache_bypass = bypass;
2752
2753 map->unlock(map->lock_arg);
2754
2755 return ret;
2756}
2757EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2758
2759/**
2760 * regmap_raw_write_async() - Write raw values to one or more registers
2761 * asynchronously
2762 *
2763 * @map: Register map to write to
2764 * @reg: Initial register to write to
2765 * @val: Block of data to be written, laid out for direct transmission to the
2766 * device. Must be valid until regmap_async_complete() is called.
2767 * @val_len: Length of data pointed to by val.
2768 *
2769 * This function is intended to be used for things like firmware
2770 * download where a large block of data needs to be transferred to the
2771 * device. No formatting will be done on the data provided.
2772 *
2773 * If supported by the underlying bus the write will be scheduled
2774 * asynchronously, helping maximise I/O speed on higher speed buses
2775 * like SPI. regmap_async_complete() can be called to ensure that all
2776 * asynchrnous writes have been completed.
2777 *
2778 * A value of zero will be returned on success, a negative errno will
2779 * be returned in error cases.
2780 */
2781int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2782 const void *val, size_t val_len)
2783{
2784 int ret;
2785
2786 if (val_len % map->format.val_bytes)
2787 return -EINVAL;
2788 if (!IS_ALIGNED(reg, map->reg_stride))
2789 return -EINVAL;
2790
2791 map->lock(map->lock_arg);
2792
2793 map->async = true;
2794
2795 ret = _regmap_raw_write(map, reg, val, val_len, false);
2796
2797 map->async = false;
2798
2799 map->unlock(map->lock_arg);
2800
2801 return ret;
2802}
2803EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2804
2805static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2806 unsigned int val_len, bool noinc)
2807{
2808 struct regmap_range_node *range;
2809 int ret;
2810
2811 if (!map->read)
2812 return -EINVAL;
2813
2814 range = _regmap_range_lookup(map, reg);
2815 if (range) {
2816 ret = _regmap_select_page(map, ®, range,
2817 noinc ? 1 : val_len / map->format.val_bytes);
2818 if (ret != 0)
2819 return ret;
2820 }
2821
2822 reg += map->reg_base;
2823 reg >>= map->format.reg_downshift;
2824 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2825 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2826 map->read_flag_mask);
2827 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2828
2829 ret = map->read(map->bus_context, map->work_buf,
2830 map->format.reg_bytes + map->format.pad_bytes,
2831 val, val_len);
2832
2833 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2834
2835 return ret;
2836}
2837
2838static int _regmap_bus_reg_read(void *context, unsigned int reg,
2839 unsigned int *val)
2840{
2841 struct regmap *map = context;
2842
2843 return map->bus->reg_read(map->bus_context, reg, val);
2844}
2845
2846static int _regmap_bus_read(void *context, unsigned int reg,
2847 unsigned int *val)
2848{
2849 int ret;
2850 struct regmap *map = context;
2851 void *work_val = map->work_buf + map->format.reg_bytes +
2852 map->format.pad_bytes;
2853
2854 if (!map->format.parse_val)
2855 return -EINVAL;
2856
2857 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2858 if (ret == 0)
2859 *val = map->format.parse_val(work_val);
2860
2861 return ret;
2862}
2863
2864static int _regmap_read(struct regmap *map, unsigned int reg,
2865 unsigned int *val)
2866{
2867 int ret;
2868 void *context = _regmap_map_get_context(map);
2869
2870 if (!map->cache_bypass) {
2871 ret = regcache_read(map, reg, val);
2872 if (ret == 0)
2873 return 0;
2874 }
2875
2876 if (map->cache_only)
2877 return -EBUSY;
2878
2879 if (!regmap_readable(map, reg))
2880 return -EIO;
2881
2882 ret = map->reg_read(context, reg, val);
2883 if (ret == 0) {
2884 if (regmap_should_log(map))
2885 dev_info(map->dev, "%x => %x\n", reg, *val);
2886
2887 trace_regmap_reg_read(map, reg, *val);
2888
2889 if (!map->cache_bypass)
2890 regcache_write(map, reg, *val);
2891 }
2892
2893 return ret;
2894}
2895
2896/**
2897 * regmap_read() - Read a value from a single register
2898 *
2899 * @map: Register map to read from
2900 * @reg: Register to be read from
2901 * @val: Pointer to store read value
2902 *
2903 * A value of zero will be returned on success, a negative errno will
2904 * be returned in error cases.
2905 */
2906int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2907{
2908 int ret;
2909
2910 if (!IS_ALIGNED(reg, map->reg_stride))
2911 return -EINVAL;
2912
2913 map->lock(map->lock_arg);
2914
2915 ret = _regmap_read(map, reg, val);
2916
2917 map->unlock(map->lock_arg);
2918
2919 return ret;
2920}
2921EXPORT_SYMBOL_GPL(regmap_read);
2922
2923/**
2924 * regmap_raw_read() - Read raw data from the device
2925 *
2926 * @map: Register map to read from
2927 * @reg: First register to be read from
2928 * @val: Pointer to store read value
2929 * @val_len: Size of data to read
2930 *
2931 * A value of zero will be returned on success, a negative errno will
2932 * be returned in error cases.
2933 */
2934int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2935 size_t val_len)
2936{
2937 size_t val_bytes = map->format.val_bytes;
2938 size_t val_count = val_len / val_bytes;
2939 unsigned int v;
2940 int ret, i;
2941
2942 if (val_len % map->format.val_bytes)
2943 return -EINVAL;
2944 if (!IS_ALIGNED(reg, map->reg_stride))
2945 return -EINVAL;
2946 if (val_count == 0)
2947 return -EINVAL;
2948
2949 map->lock(map->lock_arg);
2950
2951 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2952 map->cache_type == REGCACHE_NONE) {
2953 size_t chunk_count, chunk_bytes;
2954 size_t chunk_regs = val_count;
2955
2956 if (!map->read) {
2957 ret = -ENOTSUPP;
2958 goto out;
2959 }
2960
2961 if (map->use_single_read)
2962 chunk_regs = 1;
2963 else if (map->max_raw_read && val_len > map->max_raw_read)
2964 chunk_regs = map->max_raw_read / val_bytes;
2965
2966 chunk_count = val_count / chunk_regs;
2967 chunk_bytes = chunk_regs * val_bytes;
2968
2969 /* Read bytes that fit into whole chunks */
2970 for (i = 0; i < chunk_count; i++) {
2971 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2972 if (ret != 0)
2973 goto out;
2974
2975 reg += regmap_get_offset(map, chunk_regs);
2976 val += chunk_bytes;
2977 val_len -= chunk_bytes;
2978 }
2979
2980 /* Read remaining bytes */
2981 if (val_len) {
2982 ret = _regmap_raw_read(map, reg, val, val_len, false);
2983 if (ret != 0)
2984 goto out;
2985 }
2986 } else {
2987 /* Otherwise go word by word for the cache; should be low
2988 * cost as we expect to hit the cache.
2989 */
2990 for (i = 0; i < val_count; i++) {
2991 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2992 &v);
2993 if (ret != 0)
2994 goto out;
2995
2996 map->format.format_val(val + (i * val_bytes), v, 0);
2997 }
2998 }
2999
3000 out:
3001 map->unlock(map->lock_arg);
3002
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(regmap_raw_read);
3006
3007/**
3008 * regmap_noinc_read(): Read data from a register without incrementing the
3009 * register number
3010 *
3011 * @map: Register map to read from
3012 * @reg: Register to read from
3013 * @val: Pointer to data buffer
3014 * @val_len: Length of output buffer in bytes.
3015 *
3016 * The regmap API usually assumes that bulk read operations will read a
3017 * range of registers. Some devices have certain registers for which a read
3018 * operation read will read from an internal FIFO.
3019 *
3020 * The target register must be volatile but registers after it can be
3021 * completely unrelated cacheable registers.
3022 *
3023 * This will attempt multiple reads as required to read val_len bytes.
3024 *
3025 * A value of zero will be returned on success, a negative errno will be
3026 * returned in error cases.
3027 */
3028int regmap_noinc_read(struct regmap *map, unsigned int reg,
3029 void *val, size_t val_len)
3030{
3031 size_t read_len;
3032 int ret;
3033
3034 if (!map->read)
3035 return -ENOTSUPP;
3036
3037 if (val_len % map->format.val_bytes)
3038 return -EINVAL;
3039 if (!IS_ALIGNED(reg, map->reg_stride))
3040 return -EINVAL;
3041 if (val_len == 0)
3042 return -EINVAL;
3043
3044 map->lock(map->lock_arg);
3045
3046 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
3047 ret = -EINVAL;
3048 goto out_unlock;
3049 }
3050
3051 /* Use the accelerated operation if we can */
3052 if (map->bus->reg_noinc_read) {
3053 /*
3054 * We have not defined the FIFO semantics for cache, as the
3055 * cache is just one value deep. Should we return the last
3056 * written value? Just avoid this by always reading the FIFO
3057 * even when using cache. Cache only will not work.
3058 */
3059 if (map->cache_only) {
3060 ret = -EBUSY;
3061 goto out_unlock;
3062 }
3063 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
3064 goto out_unlock;
3065 }
3066
3067 while (val_len) {
3068 if (map->max_raw_read && map->max_raw_read < val_len)
3069 read_len = map->max_raw_read;
3070 else
3071 read_len = val_len;
3072 ret = _regmap_raw_read(map, reg, val, read_len, true);
3073 if (ret)
3074 goto out_unlock;
3075 val = ((u8 *)val) + read_len;
3076 val_len -= read_len;
3077 }
3078
3079out_unlock:
3080 map->unlock(map->lock_arg);
3081 return ret;
3082}
3083EXPORT_SYMBOL_GPL(regmap_noinc_read);
3084
3085/**
3086 * regmap_field_read(): Read a value to a single register field
3087 *
3088 * @field: Register field to read from
3089 * @val: Pointer to store read value
3090 *
3091 * A value of zero will be returned on success, a negative errno will
3092 * be returned in error cases.
3093 */
3094int regmap_field_read(struct regmap_field *field, unsigned int *val)
3095{
3096 int ret;
3097 unsigned int reg_val;
3098 ret = regmap_read(field->regmap, field->reg, ®_val);
3099 if (ret != 0)
3100 return ret;
3101
3102 reg_val &= field->mask;
3103 reg_val >>= field->shift;
3104 *val = reg_val;
3105
3106 return ret;
3107}
3108EXPORT_SYMBOL_GPL(regmap_field_read);
3109
3110/**
3111 * regmap_fields_read() - Read a value to a single register field with port ID
3112 *
3113 * @field: Register field to read from
3114 * @id: port ID
3115 * @val: Pointer to store read value
3116 *
3117 * A value of zero will be returned on success, a negative errno will
3118 * be returned in error cases.
3119 */
3120int regmap_fields_read(struct regmap_field *field, unsigned int id,
3121 unsigned int *val)
3122{
3123 int ret;
3124 unsigned int reg_val;
3125
3126 if (id >= field->id_size)
3127 return -EINVAL;
3128
3129 ret = regmap_read(field->regmap,
3130 field->reg + (field->id_offset * id),
3131 ®_val);
3132 if (ret != 0)
3133 return ret;
3134
3135 reg_val &= field->mask;
3136 reg_val >>= field->shift;
3137 *val = reg_val;
3138
3139 return ret;
3140}
3141EXPORT_SYMBOL_GPL(regmap_fields_read);
3142
3143/**
3144 * regmap_bulk_read() - Read multiple registers from the device
3145 *
3146 * @map: Register map to read from
3147 * @reg: First register to be read from
3148 * @val: Pointer to store read value, in native register size for device
3149 * @val_count: Number of registers to read
3150 *
3151 * A value of zero will be returned on success, a negative errno will
3152 * be returned in error cases.
3153 */
3154int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3155 size_t val_count)
3156{
3157 int ret, i;
3158 size_t val_bytes = map->format.val_bytes;
3159 bool vol = regmap_volatile_range(map, reg, val_count);
3160
3161 if (!IS_ALIGNED(reg, map->reg_stride))
3162 return -EINVAL;
3163 if (val_count == 0)
3164 return -EINVAL;
3165
3166 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3167 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3168 if (ret != 0)
3169 return ret;
3170
3171 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3172 map->format.parse_inplace(val + i);
3173 } else {
3174#ifdef CONFIG_64BIT
3175 u64 *u64 = val;
3176#endif
3177 u32 *u32 = val;
3178 u16 *u16 = val;
3179 u8 *u8 = val;
3180
3181 map->lock(map->lock_arg);
3182
3183 for (i = 0; i < val_count; i++) {
3184 unsigned int ival;
3185
3186 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3187 &ival);
3188 if (ret != 0)
3189 goto out;
3190
3191 switch (map->format.val_bytes) {
3192#ifdef CONFIG_64BIT
3193 case 8:
3194 u64[i] = ival;
3195 break;
3196#endif
3197 case 4:
3198 u32[i] = ival;
3199 break;
3200 case 2:
3201 u16[i] = ival;
3202 break;
3203 case 1:
3204 u8[i] = ival;
3205 break;
3206 default:
3207 ret = -EINVAL;
3208 goto out;
3209 }
3210 }
3211
3212out:
3213 map->unlock(map->lock_arg);
3214 }
3215
3216 if (!ret)
3217 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3218
3219 return ret;
3220}
3221EXPORT_SYMBOL_GPL(regmap_bulk_read);
3222
3223static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3224 unsigned int mask, unsigned int val,
3225 bool *change, bool force_write)
3226{
3227 int ret;
3228 unsigned int tmp, orig;
3229
3230 if (change)
3231 *change = false;
3232
3233 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3234 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3235 if (ret == 0 && change)
3236 *change = true;
3237 } else {
3238 ret = _regmap_read(map, reg, &orig);
3239 if (ret != 0)
3240 return ret;
3241
3242 tmp = orig & ~mask;
3243 tmp |= val & mask;
3244
3245 if (force_write || (tmp != orig)) {
3246 ret = _regmap_write(map, reg, tmp);
3247 if (ret == 0 && change)
3248 *change = true;
3249 }
3250 }
3251
3252 return ret;
3253}
3254
3255/**
3256 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3257 *
3258 * @map: Register map to update
3259 * @reg: Register to update
3260 * @mask: Bitmask to change
3261 * @val: New value for bitmask
3262 * @change: Boolean indicating if a write was done
3263 * @async: Boolean indicating asynchronously
3264 * @force: Boolean indicating use force update
3265 *
3266 * Perform a read/modify/write cycle on a register map with change, async, force
3267 * options.
3268 *
3269 * If async is true:
3270 *
3271 * With most buses the read must be done synchronously so this is most useful
3272 * for devices with a cache which do not need to interact with the hardware to
3273 * determine the current register value.
3274 *
3275 * Returns zero for success, a negative number on error.
3276 */
3277int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3278 unsigned int mask, unsigned int val,
3279 bool *change, bool async, bool force)
3280{
3281 int ret;
3282
3283 map->lock(map->lock_arg);
3284
3285 map->async = async;
3286
3287 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3288
3289 map->async = false;
3290
3291 map->unlock(map->lock_arg);
3292
3293 return ret;
3294}
3295EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3296
3297/**
3298 * regmap_test_bits() - Check if all specified bits are set in a register.
3299 *
3300 * @map: Register map to operate on
3301 * @reg: Register to read from
3302 * @bits: Bits to test
3303 *
3304 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3305 * bits are set and a negative error number if the underlying regmap_read()
3306 * fails.
3307 */
3308int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3309{
3310 unsigned int val, ret;
3311
3312 ret = regmap_read(map, reg, &val);
3313 if (ret)
3314 return ret;
3315
3316 return (val & bits) == bits;
3317}
3318EXPORT_SYMBOL_GPL(regmap_test_bits);
3319
3320void regmap_async_complete_cb(struct regmap_async *async, int ret)
3321{
3322 struct regmap *map = async->map;
3323 bool wake;
3324
3325 trace_regmap_async_io_complete(map);
3326
3327 spin_lock(&map->async_lock);
3328 list_move(&async->list, &map->async_free);
3329 wake = list_empty(&map->async_list);
3330
3331 if (ret != 0)
3332 map->async_ret = ret;
3333
3334 spin_unlock(&map->async_lock);
3335
3336 if (wake)
3337 wake_up(&map->async_waitq);
3338}
3339EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3340
3341static int regmap_async_is_done(struct regmap *map)
3342{
3343 unsigned long flags;
3344 int ret;
3345
3346 spin_lock_irqsave(&map->async_lock, flags);
3347 ret = list_empty(&map->async_list);
3348 spin_unlock_irqrestore(&map->async_lock, flags);
3349
3350 return ret;
3351}
3352
3353/**
3354 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3355 *
3356 * @map: Map to operate on.
3357 *
3358 * Blocks until any pending asynchronous I/O has completed. Returns
3359 * an error code for any failed I/O operations.
3360 */
3361int regmap_async_complete(struct regmap *map)
3362{
3363 unsigned long flags;
3364 int ret;
3365
3366 /* Nothing to do with no async support */
3367 if (!map->bus || !map->bus->async_write)
3368 return 0;
3369
3370 trace_regmap_async_complete_start(map);
3371
3372 wait_event(map->async_waitq, regmap_async_is_done(map));
3373
3374 spin_lock_irqsave(&map->async_lock, flags);
3375 ret = map->async_ret;
3376 map->async_ret = 0;
3377 spin_unlock_irqrestore(&map->async_lock, flags);
3378
3379 trace_regmap_async_complete_done(map);
3380
3381 return ret;
3382}
3383EXPORT_SYMBOL_GPL(regmap_async_complete);
3384
3385/**
3386 * regmap_register_patch - Register and apply register updates to be applied
3387 * on device initialistion
3388 *
3389 * @map: Register map to apply updates to.
3390 * @regs: Values to update.
3391 * @num_regs: Number of entries in regs.
3392 *
3393 * Register a set of register updates to be applied to the device
3394 * whenever the device registers are synchronised with the cache and
3395 * apply them immediately. Typically this is used to apply
3396 * corrections to be applied to the device defaults on startup, such
3397 * as the updates some vendors provide to undocumented registers.
3398 *
3399 * The caller must ensure that this function cannot be called
3400 * concurrently with either itself or regcache_sync().
3401 */
3402int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3403 int num_regs)
3404{
3405 struct reg_sequence *p;
3406 int ret;
3407 bool bypass;
3408
3409 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3410 num_regs))
3411 return 0;
3412
3413 p = krealloc(map->patch,
3414 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3415 GFP_KERNEL);
3416 if (p) {
3417 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3418 map->patch = p;
3419 map->patch_regs += num_regs;
3420 } else {
3421 return -ENOMEM;
3422 }
3423
3424 map->lock(map->lock_arg);
3425
3426 bypass = map->cache_bypass;
3427
3428 map->cache_bypass = true;
3429 map->async = true;
3430
3431 ret = _regmap_multi_reg_write(map, regs, num_regs);
3432
3433 map->async = false;
3434 map->cache_bypass = bypass;
3435
3436 map->unlock(map->lock_arg);
3437
3438 regmap_async_complete(map);
3439
3440 return ret;
3441}
3442EXPORT_SYMBOL_GPL(regmap_register_patch);
3443
3444/**
3445 * regmap_get_val_bytes() - Report the size of a register value
3446 *
3447 * @map: Register map to operate on.
3448 *
3449 * Report the size of a register value, mainly intended to for use by
3450 * generic infrastructure built on top of regmap.
3451 */
3452int regmap_get_val_bytes(struct regmap *map)
3453{
3454 if (map->format.format_write)
3455 return -EINVAL;
3456
3457 return map->format.val_bytes;
3458}
3459EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3460
3461/**
3462 * regmap_get_max_register() - Report the max register value
3463 *
3464 * @map: Register map to operate on.
3465 *
3466 * Report the max register value, mainly intended to for use by
3467 * generic infrastructure built on top of regmap.
3468 */
3469int regmap_get_max_register(struct regmap *map)
3470{
3471 return map->max_register ? map->max_register : -EINVAL;
3472}
3473EXPORT_SYMBOL_GPL(regmap_get_max_register);
3474
3475/**
3476 * regmap_get_reg_stride() - Report the register address stride
3477 *
3478 * @map: Register map to operate on.
3479 *
3480 * Report the register address stride, mainly intended to for use by
3481 * generic infrastructure built on top of regmap.
3482 */
3483int regmap_get_reg_stride(struct regmap *map)
3484{
3485 return map->reg_stride;
3486}
3487EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3488
3489/**
3490 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3491 *
3492 * @map: Register map to operate on.
3493 *
3494 * Returns true if an access to the register might sleep, else false.
3495 */
3496bool regmap_might_sleep(struct regmap *map)
3497{
3498 return map->can_sleep;
3499}
3500EXPORT_SYMBOL_GPL(regmap_might_sleep);
3501
3502int regmap_parse_val(struct regmap *map, const void *buf,
3503 unsigned int *val)
3504{
3505 if (!map->format.parse_val)
3506 return -EINVAL;
3507
3508 *val = map->format.parse_val(buf);
3509
3510 return 0;
3511}
3512EXPORT_SYMBOL_GPL(regmap_parse_val);
3513
3514static int __init regmap_initcall(void)
3515{
3516 regmap_debugfs_initcall();
3517
3518 return 0;
3519}
3520postcore_initcall(regmap_initcall);