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1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val << shift, buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val << shift, buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val << shift, buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
312}
313
314static void regmap_parse_inplace_noop(void *buf)
315{
316}
317
318static unsigned int regmap_parse_8(const void *buf)
319{
320 const u8 *b = buf;
321
322 return b[0];
323}
324
325static unsigned int regmap_parse_16_be(const void *buf)
326{
327 return get_unaligned_be16(buf);
328}
329
330static unsigned int regmap_parse_16_le(const void *buf)
331{
332 return get_unaligned_le16(buf);
333}
334
335static void regmap_parse_16_be_inplace(void *buf)
336{
337 u16 v = get_unaligned_be16(buf);
338
339 memcpy(buf, &v, sizeof(v));
340}
341
342static void regmap_parse_16_le_inplace(void *buf)
343{
344 u16 v = get_unaligned_le16(buf);
345
346 memcpy(buf, &v, sizeof(v));
347}
348
349static unsigned int regmap_parse_16_native(const void *buf)
350{
351 u16 v;
352
353 memcpy(&v, buf, sizeof(v));
354 return v;
355}
356
357static unsigned int regmap_parse_24_be(const void *buf)
358{
359 return get_unaligned_be24(buf);
360}
361
362static unsigned int regmap_parse_32_be(const void *buf)
363{
364 return get_unaligned_be32(buf);
365}
366
367static unsigned int regmap_parse_32_le(const void *buf)
368{
369 return get_unaligned_le32(buf);
370}
371
372static void regmap_parse_32_be_inplace(void *buf)
373{
374 u32 v = get_unaligned_be32(buf);
375
376 memcpy(buf, &v, sizeof(v));
377}
378
379static void regmap_parse_32_le_inplace(void *buf)
380{
381 u32 v = get_unaligned_le32(buf);
382
383 memcpy(buf, &v, sizeof(v));
384}
385
386static unsigned int regmap_parse_32_native(const void *buf)
387{
388 u32 v;
389
390 memcpy(&v, buf, sizeof(v));
391 return v;
392}
393
394static void regmap_lock_hwlock(void *__map)
395{
396 struct regmap *map = __map;
397
398 hwspin_lock_timeout(map->hwlock, UINT_MAX);
399}
400
401static void regmap_lock_hwlock_irq(void *__map)
402{
403 struct regmap *map = __map;
404
405 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
406}
407
408static void regmap_lock_hwlock_irqsave(void *__map)
409{
410 struct regmap *map = __map;
411
412 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
413 &map->spinlock_flags);
414}
415
416static void regmap_unlock_hwlock(void *__map)
417{
418 struct regmap *map = __map;
419
420 hwspin_unlock(map->hwlock);
421}
422
423static void regmap_unlock_hwlock_irq(void *__map)
424{
425 struct regmap *map = __map;
426
427 hwspin_unlock_irq(map->hwlock);
428}
429
430static void regmap_unlock_hwlock_irqrestore(void *__map)
431{
432 struct regmap *map = __map;
433
434 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
435}
436
437static void regmap_lock_unlock_none(void *__map)
438{
439
440}
441
442static void regmap_lock_mutex(void *__map)
443{
444 struct regmap *map = __map;
445 mutex_lock(&map->mutex);
446}
447
448static void regmap_unlock_mutex(void *__map)
449{
450 struct regmap *map = __map;
451 mutex_unlock(&map->mutex);
452}
453
454static void regmap_lock_spinlock(void *__map)
455__acquires(&map->spinlock)
456{
457 struct regmap *map = __map;
458 unsigned long flags;
459
460 spin_lock_irqsave(&map->spinlock, flags);
461 map->spinlock_flags = flags;
462}
463
464static void regmap_unlock_spinlock(void *__map)
465__releases(&map->spinlock)
466{
467 struct regmap *map = __map;
468 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
469}
470
471static void regmap_lock_raw_spinlock(void *__map)
472__acquires(&map->raw_spinlock)
473{
474 struct regmap *map = __map;
475 unsigned long flags;
476
477 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478 map->raw_spinlock_flags = flags;
479}
480
481static void regmap_unlock_raw_spinlock(void *__map)
482__releases(&map->raw_spinlock)
483{
484 struct regmap *map = __map;
485 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486}
487
488static void dev_get_regmap_release(struct device *dev, void *res)
489{
490 /*
491 * We don't actually have anything to do here; the goal here
492 * is not to manage the regmap but to provide a simple way to
493 * get the regmap back given a struct device.
494 */
495}
496
497static bool _regmap_range_add(struct regmap *map,
498 struct regmap_range_node *data)
499{
500 struct rb_root *root = &map->range_tree;
501 struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503 while (*new) {
504 struct regmap_range_node *this =
505 rb_entry(*new, struct regmap_range_node, node);
506
507 parent = *new;
508 if (data->range_max < this->range_min)
509 new = &((*new)->rb_left);
510 else if (data->range_min > this->range_max)
511 new = &((*new)->rb_right);
512 else
513 return false;
514 }
515
516 rb_link_node(&data->node, parent, new);
517 rb_insert_color(&data->node, root);
518
519 return true;
520}
521
522static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523 unsigned int reg)
524{
525 struct rb_node *node = map->range_tree.rb_node;
526
527 while (node) {
528 struct regmap_range_node *this =
529 rb_entry(node, struct regmap_range_node, node);
530
531 if (reg < this->range_min)
532 node = node->rb_left;
533 else if (reg > this->range_max)
534 node = node->rb_right;
535 else
536 return this;
537 }
538
539 return NULL;
540}
541
542static void regmap_range_exit(struct regmap *map)
543{
544 struct rb_node *next;
545 struct regmap_range_node *range_node;
546
547 next = rb_first(&map->range_tree);
548 while (next) {
549 range_node = rb_entry(next, struct regmap_range_node, node);
550 next = rb_next(&range_node->node);
551 rb_erase(&range_node->node, &map->range_tree);
552 kfree(range_node);
553 }
554
555 kfree(map->selector_work_buf);
556}
557
558static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559{
560 if (config->name) {
561 const char *name = kstrdup_const(config->name, GFP_KERNEL);
562
563 if (!name)
564 return -ENOMEM;
565
566 kfree_const(map->name);
567 map->name = name;
568 }
569
570 return 0;
571}
572
573int regmap_attach_dev(struct device *dev, struct regmap *map,
574 const struct regmap_config *config)
575{
576 struct regmap **m;
577 int ret;
578
579 map->dev = dev;
580
581 ret = regmap_set_name(map, config);
582 if (ret)
583 return ret;
584
585 regmap_debugfs_exit(map);
586 regmap_debugfs_init(map);
587
588 /* Add a devres resource for dev_get_regmap() */
589 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590 if (!m) {
591 regmap_debugfs_exit(map);
592 return -ENOMEM;
593 }
594 *m = map;
595 devres_add(dev, m);
596
597 return 0;
598}
599EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
602 const struct regmap_config *config)
603{
604 enum regmap_endian endian;
605
606 /* Retrieve the endianness specification from the regmap config */
607 endian = config->reg_format_endian;
608
609 /* If the regmap config specified a non-default value, use that */
610 if (endian != REGMAP_ENDIAN_DEFAULT)
611 return endian;
612
613 /* Retrieve the endianness specification from the bus config */
614 if (bus && bus->reg_format_endian_default)
615 endian = bus->reg_format_endian_default;
616
617 /* If the bus specified a non-default value, use that */
618 if (endian != REGMAP_ENDIAN_DEFAULT)
619 return endian;
620
621 /* Use this if no other value was found */
622 return REGMAP_ENDIAN_BIG;
623}
624
625enum regmap_endian regmap_get_val_endian(struct device *dev,
626 const struct regmap_bus *bus,
627 const struct regmap_config *config)
628{
629 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
630 enum regmap_endian endian;
631
632 /* Retrieve the endianness specification from the regmap config */
633 endian = config->val_format_endian;
634
635 /* If the regmap config specified a non-default value, use that */
636 if (endian != REGMAP_ENDIAN_DEFAULT)
637 return endian;
638
639 /* If the firmware node exist try to get endianness from it */
640 if (fwnode_property_read_bool(fwnode, "big-endian"))
641 endian = REGMAP_ENDIAN_BIG;
642 else if (fwnode_property_read_bool(fwnode, "little-endian"))
643 endian = REGMAP_ENDIAN_LITTLE;
644 else if (fwnode_property_read_bool(fwnode, "native-endian"))
645 endian = REGMAP_ENDIAN_NATIVE;
646
647 /* If the endianness was specified in fwnode, use that */
648 if (endian != REGMAP_ENDIAN_DEFAULT)
649 return endian;
650
651 /* Retrieve the endianness specification from the bus config */
652 if (bus && bus->val_format_endian_default)
653 endian = bus->val_format_endian_default;
654
655 /* If the bus specified a non-default value, use that */
656 if (endian != REGMAP_ENDIAN_DEFAULT)
657 return endian;
658
659 /* Use this if no other value was found */
660 return REGMAP_ENDIAN_BIG;
661}
662EXPORT_SYMBOL_GPL(regmap_get_val_endian);
663
664struct regmap *__regmap_init(struct device *dev,
665 const struct regmap_bus *bus,
666 void *bus_context,
667 const struct regmap_config *config,
668 struct lock_class_key *lock_key,
669 const char *lock_name)
670{
671 struct regmap *map;
672 int ret = -EINVAL;
673 enum regmap_endian reg_endian, val_endian;
674 int i, j;
675
676 if (!config)
677 goto err;
678
679 map = kzalloc(sizeof(*map), GFP_KERNEL);
680 if (map == NULL) {
681 ret = -ENOMEM;
682 goto err;
683 }
684
685 ret = regmap_set_name(map, config);
686 if (ret)
687 goto err_map;
688
689 ret = -EINVAL; /* Later error paths rely on this */
690
691 if (config->disable_locking) {
692 map->lock = map->unlock = regmap_lock_unlock_none;
693 map->can_sleep = config->can_sleep;
694 regmap_debugfs_disable(map);
695 } else if (config->lock && config->unlock) {
696 map->lock = config->lock;
697 map->unlock = config->unlock;
698 map->lock_arg = config->lock_arg;
699 map->can_sleep = config->can_sleep;
700 } else if (config->use_hwlock) {
701 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
702 if (!map->hwlock) {
703 ret = -ENXIO;
704 goto err_name;
705 }
706
707 switch (config->hwlock_mode) {
708 case HWLOCK_IRQSTATE:
709 map->lock = regmap_lock_hwlock_irqsave;
710 map->unlock = regmap_unlock_hwlock_irqrestore;
711 break;
712 case HWLOCK_IRQ:
713 map->lock = regmap_lock_hwlock_irq;
714 map->unlock = regmap_unlock_hwlock_irq;
715 break;
716 default:
717 map->lock = regmap_lock_hwlock;
718 map->unlock = regmap_unlock_hwlock;
719 break;
720 }
721
722 map->lock_arg = map;
723 } else {
724 if ((bus && bus->fast_io) ||
725 config->fast_io) {
726 if (config->use_raw_spinlock) {
727 raw_spin_lock_init(&map->raw_spinlock);
728 map->lock = regmap_lock_raw_spinlock;
729 map->unlock = regmap_unlock_raw_spinlock;
730 lockdep_set_class_and_name(&map->raw_spinlock,
731 lock_key, lock_name);
732 } else {
733 spin_lock_init(&map->spinlock);
734 map->lock = regmap_lock_spinlock;
735 map->unlock = regmap_unlock_spinlock;
736 lockdep_set_class_and_name(&map->spinlock,
737 lock_key, lock_name);
738 }
739 } else {
740 mutex_init(&map->mutex);
741 map->lock = regmap_lock_mutex;
742 map->unlock = regmap_unlock_mutex;
743 map->can_sleep = true;
744 lockdep_set_class_and_name(&map->mutex,
745 lock_key, lock_name);
746 }
747 map->lock_arg = map;
748 }
749
750 /*
751 * When we write in fast-paths with regmap_bulk_write() don't allocate
752 * scratch buffers with sleeping allocations.
753 */
754 if ((bus && bus->fast_io) || config->fast_io)
755 map->alloc_flags = GFP_ATOMIC;
756 else
757 map->alloc_flags = GFP_KERNEL;
758
759 map->reg_base = config->reg_base;
760
761 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762 map->format.pad_bytes = config->pad_bits / 8;
763 map->format.reg_shift = config->reg_shift;
764 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
765 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
766 config->val_bits + config->pad_bits, 8);
767 map->reg_shift = config->pad_bits % 8;
768 if (config->reg_stride)
769 map->reg_stride = config->reg_stride;
770 else
771 map->reg_stride = 1;
772 if (is_power_of_2(map->reg_stride))
773 map->reg_stride_order = ilog2(map->reg_stride);
774 else
775 map->reg_stride_order = -1;
776 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779 if (bus) {
780 map->max_raw_read = bus->max_raw_read;
781 map->max_raw_write = bus->max_raw_write;
782 } else if (config->max_raw_read && config->max_raw_write) {
783 map->max_raw_read = config->max_raw_read;
784 map->max_raw_write = config->max_raw_write;
785 }
786 map->dev = dev;
787 map->bus = bus;
788 map->bus_context = bus_context;
789 map->max_register = config->max_register;
790 map->wr_table = config->wr_table;
791 map->rd_table = config->rd_table;
792 map->volatile_table = config->volatile_table;
793 map->precious_table = config->precious_table;
794 map->wr_noinc_table = config->wr_noinc_table;
795 map->rd_noinc_table = config->rd_noinc_table;
796 map->writeable_reg = config->writeable_reg;
797 map->readable_reg = config->readable_reg;
798 map->volatile_reg = config->volatile_reg;
799 map->precious_reg = config->precious_reg;
800 map->writeable_noinc_reg = config->writeable_noinc_reg;
801 map->readable_noinc_reg = config->readable_noinc_reg;
802 map->cache_type = config->cache_type;
803
804 spin_lock_init(&map->async_lock);
805 INIT_LIST_HEAD(&map->async_list);
806 INIT_LIST_HEAD(&map->async_free);
807 init_waitqueue_head(&map->async_waitq);
808
809 if (config->read_flag_mask ||
810 config->write_flag_mask ||
811 config->zero_flag_mask) {
812 map->read_flag_mask = config->read_flag_mask;
813 map->write_flag_mask = config->write_flag_mask;
814 } else if (bus) {
815 map->read_flag_mask = bus->read_flag_mask;
816 }
817
818 if (config && config->read && config->write) {
819 map->reg_read = _regmap_bus_read;
820 if (config->reg_update_bits)
821 map->reg_update_bits = config->reg_update_bits;
822
823 /* Bulk read/write */
824 map->read = config->read;
825 map->write = config->write;
826
827 reg_endian = REGMAP_ENDIAN_NATIVE;
828 val_endian = REGMAP_ENDIAN_NATIVE;
829 } else if (!bus) {
830 map->reg_read = config->reg_read;
831 map->reg_write = config->reg_write;
832 map->reg_update_bits = config->reg_update_bits;
833
834 map->defer_caching = false;
835 goto skip_format_initialization;
836 } else if (!bus->read || !bus->write) {
837 map->reg_read = _regmap_bus_reg_read;
838 map->reg_write = _regmap_bus_reg_write;
839 map->reg_update_bits = bus->reg_update_bits;
840
841 map->defer_caching = false;
842 goto skip_format_initialization;
843 } else {
844 map->reg_read = _regmap_bus_read;
845 map->reg_update_bits = bus->reg_update_bits;
846 /* Bulk read/write */
847 map->read = bus->read;
848 map->write = bus->write;
849
850 reg_endian = regmap_get_reg_endian(bus, config);
851 val_endian = regmap_get_val_endian(dev, bus, config);
852 }
853
854 switch (config->reg_bits + map->reg_shift) {
855 case 2:
856 switch (config->val_bits) {
857 case 6:
858 map->format.format_write = regmap_format_2_6_write;
859 break;
860 default:
861 goto err_hwlock;
862 }
863 break;
864
865 case 4:
866 switch (config->val_bits) {
867 case 12:
868 map->format.format_write = regmap_format_4_12_write;
869 break;
870 default:
871 goto err_hwlock;
872 }
873 break;
874
875 case 7:
876 switch (config->val_bits) {
877 case 9:
878 map->format.format_write = regmap_format_7_9_write;
879 break;
880 case 17:
881 map->format.format_write = regmap_format_7_17_write;
882 break;
883 default:
884 goto err_hwlock;
885 }
886 break;
887
888 case 10:
889 switch (config->val_bits) {
890 case 14:
891 map->format.format_write = regmap_format_10_14_write;
892 break;
893 default:
894 goto err_hwlock;
895 }
896 break;
897
898 case 12:
899 switch (config->val_bits) {
900 case 20:
901 map->format.format_write = regmap_format_12_20_write;
902 break;
903 default:
904 goto err_hwlock;
905 }
906 break;
907
908 case 8:
909 map->format.format_reg = regmap_format_8;
910 break;
911
912 case 16:
913 switch (reg_endian) {
914 case REGMAP_ENDIAN_BIG:
915 map->format.format_reg = regmap_format_16_be;
916 break;
917 case REGMAP_ENDIAN_LITTLE:
918 map->format.format_reg = regmap_format_16_le;
919 break;
920 case REGMAP_ENDIAN_NATIVE:
921 map->format.format_reg = regmap_format_16_native;
922 break;
923 default:
924 goto err_hwlock;
925 }
926 break;
927
928 case 24:
929 switch (reg_endian) {
930 case REGMAP_ENDIAN_BIG:
931 map->format.format_reg = regmap_format_24_be;
932 break;
933 default:
934 goto err_hwlock;
935 }
936 break;
937
938 case 32:
939 switch (reg_endian) {
940 case REGMAP_ENDIAN_BIG:
941 map->format.format_reg = regmap_format_32_be;
942 break;
943 case REGMAP_ENDIAN_LITTLE:
944 map->format.format_reg = regmap_format_32_le;
945 break;
946 case REGMAP_ENDIAN_NATIVE:
947 map->format.format_reg = regmap_format_32_native;
948 break;
949 default:
950 goto err_hwlock;
951 }
952 break;
953
954 default:
955 goto err_hwlock;
956 }
957
958 if (val_endian == REGMAP_ENDIAN_NATIVE)
959 map->format.parse_inplace = regmap_parse_inplace_noop;
960
961 switch (config->val_bits) {
962 case 8:
963 map->format.format_val = regmap_format_8;
964 map->format.parse_val = regmap_parse_8;
965 map->format.parse_inplace = regmap_parse_inplace_noop;
966 break;
967 case 16:
968 switch (val_endian) {
969 case REGMAP_ENDIAN_BIG:
970 map->format.format_val = regmap_format_16_be;
971 map->format.parse_val = regmap_parse_16_be;
972 map->format.parse_inplace = regmap_parse_16_be_inplace;
973 break;
974 case REGMAP_ENDIAN_LITTLE:
975 map->format.format_val = regmap_format_16_le;
976 map->format.parse_val = regmap_parse_16_le;
977 map->format.parse_inplace = regmap_parse_16_le_inplace;
978 break;
979 case REGMAP_ENDIAN_NATIVE:
980 map->format.format_val = regmap_format_16_native;
981 map->format.parse_val = regmap_parse_16_native;
982 break;
983 default:
984 goto err_hwlock;
985 }
986 break;
987 case 24:
988 switch (val_endian) {
989 case REGMAP_ENDIAN_BIG:
990 map->format.format_val = regmap_format_24_be;
991 map->format.parse_val = regmap_parse_24_be;
992 break;
993 default:
994 goto err_hwlock;
995 }
996 break;
997 case 32:
998 switch (val_endian) {
999 case REGMAP_ENDIAN_BIG:
1000 map->format.format_val = regmap_format_32_be;
1001 map->format.parse_val = regmap_parse_32_be;
1002 map->format.parse_inplace = regmap_parse_32_be_inplace;
1003 break;
1004 case REGMAP_ENDIAN_LITTLE:
1005 map->format.format_val = regmap_format_32_le;
1006 map->format.parse_val = regmap_parse_32_le;
1007 map->format.parse_inplace = regmap_parse_32_le_inplace;
1008 break;
1009 case REGMAP_ENDIAN_NATIVE:
1010 map->format.format_val = regmap_format_32_native;
1011 map->format.parse_val = regmap_parse_32_native;
1012 break;
1013 default:
1014 goto err_hwlock;
1015 }
1016 break;
1017 }
1018
1019 if (map->format.format_write) {
1020 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1021 (val_endian != REGMAP_ENDIAN_BIG))
1022 goto err_hwlock;
1023 map->use_single_write = true;
1024 }
1025
1026 if (!map->format.format_write &&
1027 !(map->format.format_reg && map->format.format_val))
1028 goto err_hwlock;
1029
1030 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1031 if (map->work_buf == NULL) {
1032 ret = -ENOMEM;
1033 goto err_hwlock;
1034 }
1035
1036 if (map->format.format_write) {
1037 map->defer_caching = false;
1038 map->reg_write = _regmap_bus_formatted_write;
1039 } else if (map->format.format_val) {
1040 map->defer_caching = true;
1041 map->reg_write = _regmap_bus_raw_write;
1042 }
1043
1044skip_format_initialization:
1045
1046 map->range_tree = RB_ROOT;
1047 for (i = 0; i < config->num_ranges; i++) {
1048 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1049 struct regmap_range_node *new;
1050
1051 /* Sanity check */
1052 if (range_cfg->range_max < range_cfg->range_min) {
1053 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1054 range_cfg->range_max, range_cfg->range_min);
1055 goto err_range;
1056 }
1057
1058 if (range_cfg->range_max > map->max_register) {
1059 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1060 range_cfg->range_max, map->max_register);
1061 goto err_range;
1062 }
1063
1064 if (range_cfg->selector_reg > map->max_register) {
1065 dev_err(map->dev,
1066 "Invalid range %d: selector out of map\n", i);
1067 goto err_range;
1068 }
1069
1070 if (range_cfg->window_len == 0) {
1071 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1072 i);
1073 goto err_range;
1074 }
1075
1076 /* Make sure, that this register range has no selector
1077 or data window within its boundary */
1078 for (j = 0; j < config->num_ranges; j++) {
1079 unsigned int sel_reg = config->ranges[j].selector_reg;
1080 unsigned int win_min = config->ranges[j].window_start;
1081 unsigned int win_max = win_min +
1082 config->ranges[j].window_len - 1;
1083
1084 /* Allow data window inside its own virtual range */
1085 if (j == i)
1086 continue;
1087
1088 if (range_cfg->range_min <= sel_reg &&
1089 sel_reg <= range_cfg->range_max) {
1090 dev_err(map->dev,
1091 "Range %d: selector for %d in window\n",
1092 i, j);
1093 goto err_range;
1094 }
1095
1096 if (!(win_max < range_cfg->range_min ||
1097 win_min > range_cfg->range_max)) {
1098 dev_err(map->dev,
1099 "Range %d: window for %d in window\n",
1100 i, j);
1101 goto err_range;
1102 }
1103 }
1104
1105 new = kzalloc(sizeof(*new), GFP_KERNEL);
1106 if (new == NULL) {
1107 ret = -ENOMEM;
1108 goto err_range;
1109 }
1110
1111 new->map = map;
1112 new->name = range_cfg->name;
1113 new->range_min = range_cfg->range_min;
1114 new->range_max = range_cfg->range_max;
1115 new->selector_reg = range_cfg->selector_reg;
1116 new->selector_mask = range_cfg->selector_mask;
1117 new->selector_shift = range_cfg->selector_shift;
1118 new->window_start = range_cfg->window_start;
1119 new->window_len = range_cfg->window_len;
1120
1121 if (!_regmap_range_add(map, new)) {
1122 dev_err(map->dev, "Failed to add range %d\n", i);
1123 kfree(new);
1124 goto err_range;
1125 }
1126
1127 if (map->selector_work_buf == NULL) {
1128 map->selector_work_buf =
1129 kzalloc(map->format.buf_size, GFP_KERNEL);
1130 if (map->selector_work_buf == NULL) {
1131 ret = -ENOMEM;
1132 goto err_range;
1133 }
1134 }
1135 }
1136
1137 ret = regcache_init(map, config);
1138 if (ret != 0)
1139 goto err_range;
1140
1141 if (dev) {
1142 ret = regmap_attach_dev(dev, map, config);
1143 if (ret != 0)
1144 goto err_regcache;
1145 } else {
1146 regmap_debugfs_init(map);
1147 }
1148
1149 return map;
1150
1151err_regcache:
1152 regcache_exit(map);
1153err_range:
1154 regmap_range_exit(map);
1155 kfree(map->work_buf);
1156err_hwlock:
1157 if (map->hwlock)
1158 hwspin_lock_free(map->hwlock);
1159err_name:
1160 kfree_const(map->name);
1161err_map:
1162 kfree(map);
1163err:
1164 return ERR_PTR(ret);
1165}
1166EXPORT_SYMBOL_GPL(__regmap_init);
1167
1168static void devm_regmap_release(struct device *dev, void *res)
1169{
1170 regmap_exit(*(struct regmap **)res);
1171}
1172
1173struct regmap *__devm_regmap_init(struct device *dev,
1174 const struct regmap_bus *bus,
1175 void *bus_context,
1176 const struct regmap_config *config,
1177 struct lock_class_key *lock_key,
1178 const char *lock_name)
1179{
1180 struct regmap **ptr, *regmap;
1181
1182 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1183 if (!ptr)
1184 return ERR_PTR(-ENOMEM);
1185
1186 regmap = __regmap_init(dev, bus, bus_context, config,
1187 lock_key, lock_name);
1188 if (!IS_ERR(regmap)) {
1189 *ptr = regmap;
1190 devres_add(dev, ptr);
1191 } else {
1192 devres_free(ptr);
1193 }
1194
1195 return regmap;
1196}
1197EXPORT_SYMBOL_GPL(__devm_regmap_init);
1198
1199static void regmap_field_init(struct regmap_field *rm_field,
1200 struct regmap *regmap, struct reg_field reg_field)
1201{
1202 rm_field->regmap = regmap;
1203 rm_field->reg = reg_field.reg;
1204 rm_field->shift = reg_field.lsb;
1205 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1206
1207 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1208
1209 rm_field->id_size = reg_field.id_size;
1210 rm_field->id_offset = reg_field.id_offset;
1211}
1212
1213/**
1214 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1215 *
1216 * @dev: Device that will be interacted with
1217 * @regmap: regmap bank in which this register field is located.
1218 * @reg_field: Register field with in the bank.
1219 *
1220 * The return value will be an ERR_PTR() on error or a valid pointer
1221 * to a struct regmap_field. The regmap_field will be automatically freed
1222 * by the device management code.
1223 */
1224struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1225 struct regmap *regmap, struct reg_field reg_field)
1226{
1227 struct regmap_field *rm_field = devm_kzalloc(dev,
1228 sizeof(*rm_field), GFP_KERNEL);
1229 if (!rm_field)
1230 return ERR_PTR(-ENOMEM);
1231
1232 regmap_field_init(rm_field, regmap, reg_field);
1233
1234 return rm_field;
1235
1236}
1237EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1238
1239
1240/**
1241 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1242 *
1243 * @regmap: regmap bank in which this register field is located.
1244 * @rm_field: regmap register fields within the bank.
1245 * @reg_field: Register fields within the bank.
1246 * @num_fields: Number of register fields.
1247 *
1248 * The return value will be an -ENOMEM on error or zero for success.
1249 * Newly allocated regmap_fields should be freed by calling
1250 * regmap_field_bulk_free()
1251 */
1252int regmap_field_bulk_alloc(struct regmap *regmap,
1253 struct regmap_field **rm_field,
1254 const struct reg_field *reg_field,
1255 int num_fields)
1256{
1257 struct regmap_field *rf;
1258 int i;
1259
1260 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1261 if (!rf)
1262 return -ENOMEM;
1263
1264 for (i = 0; i < num_fields; i++) {
1265 regmap_field_init(&rf[i], regmap, reg_field[i]);
1266 rm_field[i] = &rf[i];
1267 }
1268
1269 return 0;
1270}
1271EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1272
1273/**
1274 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1275 * fields.
1276 *
1277 * @dev: Device that will be interacted with
1278 * @regmap: regmap bank in which this register field is located.
1279 * @rm_field: regmap register fields within the bank.
1280 * @reg_field: Register fields within the bank.
1281 * @num_fields: Number of register fields.
1282 *
1283 * The return value will be an -ENOMEM on error or zero for success.
1284 * Newly allocated regmap_fields will be automatically freed by the
1285 * device management code.
1286 */
1287int devm_regmap_field_bulk_alloc(struct device *dev,
1288 struct regmap *regmap,
1289 struct regmap_field **rm_field,
1290 const struct reg_field *reg_field,
1291 int num_fields)
1292{
1293 struct regmap_field *rf;
1294 int i;
1295
1296 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1297 if (!rf)
1298 return -ENOMEM;
1299
1300 for (i = 0; i < num_fields; i++) {
1301 regmap_field_init(&rf[i], regmap, reg_field[i]);
1302 rm_field[i] = &rf[i];
1303 }
1304
1305 return 0;
1306}
1307EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1308
1309/**
1310 * regmap_field_bulk_free() - Free register field allocated using
1311 * regmap_field_bulk_alloc.
1312 *
1313 * @field: regmap fields which should be freed.
1314 */
1315void regmap_field_bulk_free(struct regmap_field *field)
1316{
1317 kfree(field);
1318}
1319EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1320
1321/**
1322 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1323 * devm_regmap_field_bulk_alloc.
1324 *
1325 * @dev: Device that will be interacted with
1326 * @field: regmap field which should be freed.
1327 *
1328 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1329 * drivers need not call this function, as the memory allocated via devm
1330 * will be freed as per device-driver life-cycle.
1331 */
1332void devm_regmap_field_bulk_free(struct device *dev,
1333 struct regmap_field *field)
1334{
1335 devm_kfree(dev, field);
1336}
1337EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1338
1339/**
1340 * devm_regmap_field_free() - Free a register field allocated using
1341 * devm_regmap_field_alloc.
1342 *
1343 * @dev: Device that will be interacted with
1344 * @field: regmap field which should be freed.
1345 *
1346 * Free register field allocated using devm_regmap_field_alloc(). Usually
1347 * drivers need not call this function, as the memory allocated via devm
1348 * will be freed as per device-driver life-cyle.
1349 */
1350void devm_regmap_field_free(struct device *dev,
1351 struct regmap_field *field)
1352{
1353 devm_kfree(dev, field);
1354}
1355EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1356
1357/**
1358 * regmap_field_alloc() - Allocate and initialise a register field.
1359 *
1360 * @regmap: regmap bank in which this register field is located.
1361 * @reg_field: Register field with in the bank.
1362 *
1363 * The return value will be an ERR_PTR() on error or a valid pointer
1364 * to a struct regmap_field. The regmap_field should be freed by the
1365 * user once its finished working with it using regmap_field_free().
1366 */
1367struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1368 struct reg_field reg_field)
1369{
1370 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1371
1372 if (!rm_field)
1373 return ERR_PTR(-ENOMEM);
1374
1375 regmap_field_init(rm_field, regmap, reg_field);
1376
1377 return rm_field;
1378}
1379EXPORT_SYMBOL_GPL(regmap_field_alloc);
1380
1381/**
1382 * regmap_field_free() - Free register field allocated using
1383 * regmap_field_alloc.
1384 *
1385 * @field: regmap field which should be freed.
1386 */
1387void regmap_field_free(struct regmap_field *field)
1388{
1389 kfree(field);
1390}
1391EXPORT_SYMBOL_GPL(regmap_field_free);
1392
1393/**
1394 * regmap_reinit_cache() - Reinitialise the current register cache
1395 *
1396 * @map: Register map to operate on.
1397 * @config: New configuration. Only the cache data will be used.
1398 *
1399 * Discard any existing register cache for the map and initialize a
1400 * new cache. This can be used to restore the cache to defaults or to
1401 * update the cache configuration to reflect runtime discovery of the
1402 * hardware.
1403 *
1404 * No explicit locking is done here, the user needs to ensure that
1405 * this function will not race with other calls to regmap.
1406 */
1407int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1408{
1409 int ret;
1410
1411 regcache_exit(map);
1412 regmap_debugfs_exit(map);
1413
1414 map->max_register = config->max_register;
1415 map->writeable_reg = config->writeable_reg;
1416 map->readable_reg = config->readable_reg;
1417 map->volatile_reg = config->volatile_reg;
1418 map->precious_reg = config->precious_reg;
1419 map->writeable_noinc_reg = config->writeable_noinc_reg;
1420 map->readable_noinc_reg = config->readable_noinc_reg;
1421 map->cache_type = config->cache_type;
1422
1423 ret = regmap_set_name(map, config);
1424 if (ret)
1425 return ret;
1426
1427 regmap_debugfs_init(map);
1428
1429 map->cache_bypass = false;
1430 map->cache_only = false;
1431
1432 return regcache_init(map, config);
1433}
1434EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1435
1436/**
1437 * regmap_exit() - Free a previously allocated register map
1438 *
1439 * @map: Register map to operate on.
1440 */
1441void regmap_exit(struct regmap *map)
1442{
1443 struct regmap_async *async;
1444
1445 regcache_exit(map);
1446 regmap_debugfs_exit(map);
1447 regmap_range_exit(map);
1448 if (map->bus && map->bus->free_context)
1449 map->bus->free_context(map->bus_context);
1450 kfree(map->work_buf);
1451 while (!list_empty(&map->async_free)) {
1452 async = list_first_entry_or_null(&map->async_free,
1453 struct regmap_async,
1454 list);
1455 list_del(&async->list);
1456 kfree(async->work_buf);
1457 kfree(async);
1458 }
1459 if (map->hwlock)
1460 hwspin_lock_free(map->hwlock);
1461 if (map->lock == regmap_lock_mutex)
1462 mutex_destroy(&map->mutex);
1463 kfree_const(map->name);
1464 kfree(map->patch);
1465 if (map->bus && map->bus->free_on_exit)
1466 kfree(map->bus);
1467 kfree(map);
1468}
1469EXPORT_SYMBOL_GPL(regmap_exit);
1470
1471static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1472{
1473 struct regmap **r = res;
1474 if (!r || !*r) {
1475 WARN_ON(!r || !*r);
1476 return 0;
1477 }
1478
1479 /* If the user didn't specify a name match any */
1480 if (data)
1481 return (*r)->name && !strcmp((*r)->name, data);
1482 else
1483 return 1;
1484}
1485
1486/**
1487 * dev_get_regmap() - Obtain the regmap (if any) for a device
1488 *
1489 * @dev: Device to retrieve the map for
1490 * @name: Optional name for the register map, usually NULL.
1491 *
1492 * Returns the regmap for the device if one is present, or NULL. If
1493 * name is specified then it must match the name specified when
1494 * registering the device, if it is NULL then the first regmap found
1495 * will be used. Devices with multiple register maps are very rare,
1496 * generic code should normally not need to specify a name.
1497 */
1498struct regmap *dev_get_regmap(struct device *dev, const char *name)
1499{
1500 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1501 dev_get_regmap_match, (void *)name);
1502
1503 if (!r)
1504 return NULL;
1505 return *r;
1506}
1507EXPORT_SYMBOL_GPL(dev_get_regmap);
1508
1509/**
1510 * regmap_get_device() - Obtain the device from a regmap
1511 *
1512 * @map: Register map to operate on.
1513 *
1514 * Returns the underlying device that the regmap has been created for.
1515 */
1516struct device *regmap_get_device(struct regmap *map)
1517{
1518 return map->dev;
1519}
1520EXPORT_SYMBOL_GPL(regmap_get_device);
1521
1522static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1523 struct regmap_range_node *range,
1524 unsigned int val_num)
1525{
1526 void *orig_work_buf;
1527 unsigned int win_offset;
1528 unsigned int win_page;
1529 bool page_chg;
1530 int ret;
1531
1532 win_offset = (*reg - range->range_min) % range->window_len;
1533 win_page = (*reg - range->range_min) / range->window_len;
1534
1535 if (val_num > 1) {
1536 /* Bulk write shouldn't cross range boundary */
1537 if (*reg + val_num - 1 > range->range_max)
1538 return -EINVAL;
1539
1540 /* ... or single page boundary */
1541 if (val_num > range->window_len - win_offset)
1542 return -EINVAL;
1543 }
1544
1545 /* It is possible to have selector register inside data window.
1546 In that case, selector register is located on every page and
1547 it needs no page switching, when accessed alone. */
1548 if (val_num > 1 ||
1549 range->window_start + win_offset != range->selector_reg) {
1550 /* Use separate work_buf during page switching */
1551 orig_work_buf = map->work_buf;
1552 map->work_buf = map->selector_work_buf;
1553
1554 ret = _regmap_update_bits(map, range->selector_reg,
1555 range->selector_mask,
1556 win_page << range->selector_shift,
1557 &page_chg, false);
1558
1559 map->work_buf = orig_work_buf;
1560
1561 if (ret != 0)
1562 return ret;
1563 }
1564
1565 *reg = range->window_start + win_offset;
1566
1567 return 0;
1568}
1569
1570static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1571 unsigned long mask)
1572{
1573 u8 *buf;
1574 int i;
1575
1576 if (!mask || !map->work_buf)
1577 return;
1578
1579 buf = map->work_buf;
1580
1581 for (i = 0; i < max_bytes; i++)
1582 buf[i] |= (mask >> (8 * i)) & 0xff;
1583}
1584
1585static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1586{
1587 reg += map->reg_base;
1588
1589 if (map->format.reg_shift > 0)
1590 reg >>= map->format.reg_shift;
1591 else if (map->format.reg_shift < 0)
1592 reg <<= -(map->format.reg_shift);
1593
1594 return reg;
1595}
1596
1597static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1598 const void *val, size_t val_len, bool noinc)
1599{
1600 struct regmap_range_node *range;
1601 unsigned long flags;
1602 void *work_val = map->work_buf + map->format.reg_bytes +
1603 map->format.pad_bytes;
1604 void *buf;
1605 int ret = -ENOTSUPP;
1606 size_t len;
1607 int i;
1608
1609 /* Check for unwritable or noinc registers in range
1610 * before we start
1611 */
1612 if (!regmap_writeable_noinc(map, reg)) {
1613 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1614 unsigned int element =
1615 reg + regmap_get_offset(map, i);
1616 if (!regmap_writeable(map, element) ||
1617 regmap_writeable_noinc(map, element))
1618 return -EINVAL;
1619 }
1620 }
1621
1622 if (!map->cache_bypass && map->format.parse_val) {
1623 unsigned int ival, offset;
1624 int val_bytes = map->format.val_bytes;
1625
1626 /* Cache the last written value for noinc writes */
1627 i = noinc ? val_len - val_bytes : 0;
1628 for (; i < val_len; i += val_bytes) {
1629 ival = map->format.parse_val(val + i);
1630 offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
1631 ret = regcache_write(map, reg + offset, ival);
1632 if (ret) {
1633 dev_err(map->dev,
1634 "Error in caching of register: %x ret: %d\n",
1635 reg + offset, ret);
1636 return ret;
1637 }
1638 }
1639 if (map->cache_only) {
1640 map->cache_dirty = true;
1641 return 0;
1642 }
1643 }
1644
1645 range = _regmap_range_lookup(map, reg);
1646 if (range) {
1647 int val_num = val_len / map->format.val_bytes;
1648 int win_offset = (reg - range->range_min) % range->window_len;
1649 int win_residue = range->window_len - win_offset;
1650
1651 /* If the write goes beyond the end of the window split it */
1652 while (val_num > win_residue) {
1653 dev_dbg(map->dev, "Writing window %d/%zu\n",
1654 win_residue, val_len / map->format.val_bytes);
1655 ret = _regmap_raw_write_impl(map, reg, val,
1656 win_residue *
1657 map->format.val_bytes, noinc);
1658 if (ret != 0)
1659 return ret;
1660
1661 reg += win_residue;
1662 val_num -= win_residue;
1663 val += win_residue * map->format.val_bytes;
1664 val_len -= win_residue * map->format.val_bytes;
1665
1666 win_offset = (reg - range->range_min) %
1667 range->window_len;
1668 win_residue = range->window_len - win_offset;
1669 }
1670
1671 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1672 if (ret != 0)
1673 return ret;
1674 }
1675
1676 reg = regmap_reg_addr(map, reg);
1677 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1678 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1679 map->write_flag_mask);
1680
1681 /*
1682 * Essentially all I/O mechanisms will be faster with a single
1683 * buffer to write. Since register syncs often generate raw
1684 * writes of single registers optimise that case.
1685 */
1686 if (val != work_val && val_len == map->format.val_bytes) {
1687 memcpy(work_val, val, map->format.val_bytes);
1688 val = work_val;
1689 }
1690
1691 if (map->async && map->bus && map->bus->async_write) {
1692 struct regmap_async *async;
1693
1694 trace_regmap_async_write_start(map, reg, val_len);
1695
1696 spin_lock_irqsave(&map->async_lock, flags);
1697 async = list_first_entry_or_null(&map->async_free,
1698 struct regmap_async,
1699 list);
1700 if (async)
1701 list_del(&async->list);
1702 spin_unlock_irqrestore(&map->async_lock, flags);
1703
1704 if (!async) {
1705 async = map->bus->async_alloc();
1706 if (!async)
1707 return -ENOMEM;
1708
1709 async->work_buf = kzalloc(map->format.buf_size,
1710 GFP_KERNEL | GFP_DMA);
1711 if (!async->work_buf) {
1712 kfree(async);
1713 return -ENOMEM;
1714 }
1715 }
1716
1717 async->map = map;
1718
1719 /* If the caller supplied the value we can use it safely. */
1720 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1721 map->format.reg_bytes + map->format.val_bytes);
1722
1723 spin_lock_irqsave(&map->async_lock, flags);
1724 list_add_tail(&async->list, &map->async_list);
1725 spin_unlock_irqrestore(&map->async_lock, flags);
1726
1727 if (val != work_val)
1728 ret = map->bus->async_write(map->bus_context,
1729 async->work_buf,
1730 map->format.reg_bytes +
1731 map->format.pad_bytes,
1732 val, val_len, async);
1733 else
1734 ret = map->bus->async_write(map->bus_context,
1735 async->work_buf,
1736 map->format.reg_bytes +
1737 map->format.pad_bytes +
1738 val_len, NULL, 0, async);
1739
1740 if (ret != 0) {
1741 dev_err(map->dev, "Failed to schedule write: %d\n",
1742 ret);
1743
1744 spin_lock_irqsave(&map->async_lock, flags);
1745 list_move(&async->list, &map->async_free);
1746 spin_unlock_irqrestore(&map->async_lock, flags);
1747 }
1748
1749 return ret;
1750 }
1751
1752 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1753
1754 /* If we're doing a single register write we can probably just
1755 * send the work_buf directly, otherwise try to do a gather
1756 * write.
1757 */
1758 if (val == work_val)
1759 ret = map->write(map->bus_context, map->work_buf,
1760 map->format.reg_bytes +
1761 map->format.pad_bytes +
1762 val_len);
1763 else if (map->bus && map->bus->gather_write)
1764 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1765 map->format.reg_bytes +
1766 map->format.pad_bytes,
1767 val, val_len);
1768 else
1769 ret = -ENOTSUPP;
1770
1771 /* If that didn't work fall back on linearising by hand. */
1772 if (ret == -ENOTSUPP) {
1773 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1774 buf = kzalloc(len, GFP_KERNEL);
1775 if (!buf)
1776 return -ENOMEM;
1777
1778 memcpy(buf, map->work_buf, map->format.reg_bytes);
1779 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1780 val, val_len);
1781 ret = map->write(map->bus_context, buf, len);
1782
1783 kfree(buf);
1784 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1785 /* regcache_drop_region() takes lock that we already have,
1786 * thus call map->cache_ops->drop() directly
1787 */
1788 if (map->cache_ops && map->cache_ops->drop)
1789 map->cache_ops->drop(map, reg, reg + 1);
1790 }
1791
1792 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1793
1794 return ret;
1795}
1796
1797/**
1798 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1799 *
1800 * @map: Map to check.
1801 */
1802bool regmap_can_raw_write(struct regmap *map)
1803{
1804 return map->write && map->format.format_val && map->format.format_reg;
1805}
1806EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1807
1808/**
1809 * regmap_get_raw_read_max - Get the maximum size we can read
1810 *
1811 * @map: Map to check.
1812 */
1813size_t regmap_get_raw_read_max(struct regmap *map)
1814{
1815 return map->max_raw_read;
1816}
1817EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1818
1819/**
1820 * regmap_get_raw_write_max - Get the maximum size we can read
1821 *
1822 * @map: Map to check.
1823 */
1824size_t regmap_get_raw_write_max(struct regmap *map)
1825{
1826 return map->max_raw_write;
1827}
1828EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1829
1830static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1831 unsigned int val)
1832{
1833 int ret;
1834 struct regmap_range_node *range;
1835 struct regmap *map = context;
1836
1837 WARN_ON(!map->format.format_write);
1838
1839 range = _regmap_range_lookup(map, reg);
1840 if (range) {
1841 ret = _regmap_select_page(map, ®, range, 1);
1842 if (ret != 0)
1843 return ret;
1844 }
1845
1846 reg = regmap_reg_addr(map, reg);
1847 map->format.format_write(map, reg, val);
1848
1849 trace_regmap_hw_write_start(map, reg, 1);
1850
1851 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1852
1853 trace_regmap_hw_write_done(map, reg, 1);
1854
1855 return ret;
1856}
1857
1858static int _regmap_bus_reg_write(void *context, unsigned int reg,
1859 unsigned int val)
1860{
1861 struct regmap *map = context;
1862 struct regmap_range_node *range;
1863 int ret;
1864
1865 range = _regmap_range_lookup(map, reg);
1866 if (range) {
1867 ret = _regmap_select_page(map, ®, range, 1);
1868 if (ret != 0)
1869 return ret;
1870 }
1871
1872 reg = regmap_reg_addr(map, reg);
1873 return map->bus->reg_write(map->bus_context, reg, val);
1874}
1875
1876static int _regmap_bus_raw_write(void *context, unsigned int reg,
1877 unsigned int val)
1878{
1879 struct regmap *map = context;
1880
1881 WARN_ON(!map->format.format_val);
1882
1883 map->format.format_val(map->work_buf + map->format.reg_bytes
1884 + map->format.pad_bytes, val, 0);
1885 return _regmap_raw_write_impl(map, reg,
1886 map->work_buf +
1887 map->format.reg_bytes +
1888 map->format.pad_bytes,
1889 map->format.val_bytes,
1890 false);
1891}
1892
1893static inline void *_regmap_map_get_context(struct regmap *map)
1894{
1895 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1896}
1897
1898int _regmap_write(struct regmap *map, unsigned int reg,
1899 unsigned int val)
1900{
1901 int ret;
1902 void *context = _regmap_map_get_context(map);
1903
1904 if (!regmap_writeable(map, reg))
1905 return -EIO;
1906
1907 if (!map->cache_bypass && !map->defer_caching) {
1908 ret = regcache_write(map, reg, val);
1909 if (ret != 0)
1910 return ret;
1911 if (map->cache_only) {
1912 map->cache_dirty = true;
1913 return 0;
1914 }
1915 }
1916
1917 ret = map->reg_write(context, reg, val);
1918 if (ret == 0) {
1919 if (regmap_should_log(map))
1920 dev_info(map->dev, "%x <= %x\n", reg, val);
1921
1922 trace_regmap_reg_write(map, reg, val);
1923 }
1924
1925 return ret;
1926}
1927
1928/**
1929 * regmap_write() - Write a value to a single register
1930 *
1931 * @map: Register map to write to
1932 * @reg: Register to write to
1933 * @val: Value to be written
1934 *
1935 * A value of zero will be returned on success, a negative errno will
1936 * be returned in error cases.
1937 */
1938int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1939{
1940 int ret;
1941
1942 if (!IS_ALIGNED(reg, map->reg_stride))
1943 return -EINVAL;
1944
1945 map->lock(map->lock_arg);
1946
1947 ret = _regmap_write(map, reg, val);
1948
1949 map->unlock(map->lock_arg);
1950
1951 return ret;
1952}
1953EXPORT_SYMBOL_GPL(regmap_write);
1954
1955/**
1956 * regmap_write_async() - Write a value to a single register asynchronously
1957 *
1958 * @map: Register map to write to
1959 * @reg: Register to write to
1960 * @val: Value to be written
1961 *
1962 * A value of zero will be returned on success, a negative errno will
1963 * be returned in error cases.
1964 */
1965int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1966{
1967 int ret;
1968
1969 if (!IS_ALIGNED(reg, map->reg_stride))
1970 return -EINVAL;
1971
1972 map->lock(map->lock_arg);
1973
1974 map->async = true;
1975
1976 ret = _regmap_write(map, reg, val);
1977
1978 map->async = false;
1979
1980 map->unlock(map->lock_arg);
1981
1982 return ret;
1983}
1984EXPORT_SYMBOL_GPL(regmap_write_async);
1985
1986int _regmap_raw_write(struct regmap *map, unsigned int reg,
1987 const void *val, size_t val_len, bool noinc)
1988{
1989 size_t val_bytes = map->format.val_bytes;
1990 size_t val_count = val_len / val_bytes;
1991 size_t chunk_count, chunk_bytes;
1992 size_t chunk_regs = val_count;
1993 int ret, i;
1994
1995 if (!val_count)
1996 return -EINVAL;
1997
1998 if (map->use_single_write)
1999 chunk_regs = 1;
2000 else if (map->max_raw_write && val_len > map->max_raw_write)
2001 chunk_regs = map->max_raw_write / val_bytes;
2002
2003 chunk_count = val_count / chunk_regs;
2004 chunk_bytes = chunk_regs * val_bytes;
2005
2006 /* Write as many bytes as possible with chunk_size */
2007 for (i = 0; i < chunk_count; i++) {
2008 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2009 if (ret)
2010 return ret;
2011
2012 reg += regmap_get_offset(map, chunk_regs);
2013 val += chunk_bytes;
2014 val_len -= chunk_bytes;
2015 }
2016
2017 /* Write remaining bytes */
2018 if (val_len)
2019 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2020
2021 return ret;
2022}
2023
2024/**
2025 * regmap_raw_write() - Write raw values to one or more registers
2026 *
2027 * @map: Register map to write to
2028 * @reg: Initial register to write to
2029 * @val: Block of data to be written, laid out for direct transmission to the
2030 * device
2031 * @val_len: Length of data pointed to by val.
2032 *
2033 * This function is intended to be used for things like firmware
2034 * download where a large block of data needs to be transferred to the
2035 * device. No formatting will be done on the data provided.
2036 *
2037 * A value of zero will be returned on success, a negative errno will
2038 * be returned in error cases.
2039 */
2040int regmap_raw_write(struct regmap *map, unsigned int reg,
2041 const void *val, size_t val_len)
2042{
2043 int ret;
2044
2045 if (!regmap_can_raw_write(map))
2046 return -EINVAL;
2047 if (val_len % map->format.val_bytes)
2048 return -EINVAL;
2049
2050 map->lock(map->lock_arg);
2051
2052 ret = _regmap_raw_write(map, reg, val, val_len, false);
2053
2054 map->unlock(map->lock_arg);
2055
2056 return ret;
2057}
2058EXPORT_SYMBOL_GPL(regmap_raw_write);
2059
2060static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2061 void *val, unsigned int val_len, bool write)
2062{
2063 size_t val_bytes = map->format.val_bytes;
2064 size_t val_count = val_len / val_bytes;
2065 unsigned int lastval;
2066 u8 *u8p;
2067 u16 *u16p;
2068 u32 *u32p;
2069 int ret;
2070 int i;
2071
2072 switch (val_bytes) {
2073 case 1:
2074 u8p = val;
2075 if (write)
2076 lastval = (unsigned int)u8p[val_count - 1];
2077 break;
2078 case 2:
2079 u16p = val;
2080 if (write)
2081 lastval = (unsigned int)u16p[val_count - 1];
2082 break;
2083 case 4:
2084 u32p = val;
2085 if (write)
2086 lastval = (unsigned int)u32p[val_count - 1];
2087 break;
2088 default:
2089 return -EINVAL;
2090 }
2091
2092 /*
2093 * Update the cache with the last value we write, the rest is just
2094 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2095 * sure a single read from the cache will work.
2096 */
2097 if (write) {
2098 if (!map->cache_bypass && !map->defer_caching) {
2099 ret = regcache_write(map, reg, lastval);
2100 if (ret != 0)
2101 return ret;
2102 if (map->cache_only) {
2103 map->cache_dirty = true;
2104 return 0;
2105 }
2106 }
2107 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2108 } else {
2109 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2110 }
2111
2112 if (!ret && regmap_should_log(map)) {
2113 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2114 for (i = 0; i < val_count; i++) {
2115 switch (val_bytes) {
2116 case 1:
2117 pr_cont("%x", u8p[i]);
2118 break;
2119 case 2:
2120 pr_cont("%x", u16p[i]);
2121 break;
2122 case 4:
2123 pr_cont("%x", u32p[i]);
2124 break;
2125 default:
2126 break;
2127 }
2128 if (i == (val_count - 1))
2129 pr_cont("]\n");
2130 else
2131 pr_cont(",");
2132 }
2133 }
2134
2135 return 0;
2136}
2137
2138/**
2139 * regmap_noinc_write(): Write data to a register without incrementing the
2140 * register number
2141 *
2142 * @map: Register map to write to
2143 * @reg: Register to write to
2144 * @val: Pointer to data buffer
2145 * @val_len: Length of output buffer in bytes.
2146 *
2147 * The regmap API usually assumes that bulk bus write operations will write a
2148 * range of registers. Some devices have certain registers for which a write
2149 * operation can write to an internal FIFO.
2150 *
2151 * The target register must be volatile but registers after it can be
2152 * completely unrelated cacheable registers.
2153 *
2154 * This will attempt multiple writes as required to write val_len bytes.
2155 *
2156 * A value of zero will be returned on success, a negative errno will be
2157 * returned in error cases.
2158 */
2159int regmap_noinc_write(struct regmap *map, unsigned int reg,
2160 const void *val, size_t val_len)
2161{
2162 size_t write_len;
2163 int ret;
2164
2165 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2166 return -EINVAL;
2167 if (val_len % map->format.val_bytes)
2168 return -EINVAL;
2169 if (!IS_ALIGNED(reg, map->reg_stride))
2170 return -EINVAL;
2171 if (val_len == 0)
2172 return -EINVAL;
2173
2174 map->lock(map->lock_arg);
2175
2176 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2177 ret = -EINVAL;
2178 goto out_unlock;
2179 }
2180
2181 /*
2182 * Use the accelerated operation if we can. The val drops the const
2183 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2184 */
2185 if (map->bus->reg_noinc_write) {
2186 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2187 goto out_unlock;
2188 }
2189
2190 while (val_len) {
2191 if (map->max_raw_write && map->max_raw_write < val_len)
2192 write_len = map->max_raw_write;
2193 else
2194 write_len = val_len;
2195 ret = _regmap_raw_write(map, reg, val, write_len, true);
2196 if (ret)
2197 goto out_unlock;
2198 val = ((u8 *)val) + write_len;
2199 val_len -= write_len;
2200 }
2201
2202out_unlock:
2203 map->unlock(map->lock_arg);
2204 return ret;
2205}
2206EXPORT_SYMBOL_GPL(regmap_noinc_write);
2207
2208/**
2209 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2210 * register field.
2211 *
2212 * @field: Register field to write to
2213 * @mask: Bitmask to change
2214 * @val: Value to be written
2215 * @change: Boolean indicating if a write was done
2216 * @async: Boolean indicating asynchronously
2217 * @force: Boolean indicating use force update
2218 *
2219 * Perform a read/modify/write cycle on the register field with change,
2220 * async, force option.
2221 *
2222 * A value of zero will be returned on success, a negative errno will
2223 * be returned in error cases.
2224 */
2225int regmap_field_update_bits_base(struct regmap_field *field,
2226 unsigned int mask, unsigned int val,
2227 bool *change, bool async, bool force)
2228{
2229 mask = (mask << field->shift) & field->mask;
2230
2231 return regmap_update_bits_base(field->regmap, field->reg,
2232 mask, val << field->shift,
2233 change, async, force);
2234}
2235EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2236
2237/**
2238 * regmap_field_test_bits() - Check if all specified bits are set in a
2239 * register field.
2240 *
2241 * @field: Register field to operate on
2242 * @bits: Bits to test
2243 *
2244 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2245 * tested bits is not set and 1 if all tested bits are set.
2246 */
2247int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2248{
2249 unsigned int val, ret;
2250
2251 ret = regmap_field_read(field, &val);
2252 if (ret)
2253 return ret;
2254
2255 return (val & bits) == bits;
2256}
2257EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2258
2259/**
2260 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2261 * register field with port ID
2262 *
2263 * @field: Register field to write to
2264 * @id: port ID
2265 * @mask: Bitmask to change
2266 * @val: Value to be written
2267 * @change: Boolean indicating if a write was done
2268 * @async: Boolean indicating asynchronously
2269 * @force: Boolean indicating use force update
2270 *
2271 * A value of zero will be returned on success, a negative errno will
2272 * be returned in error cases.
2273 */
2274int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2275 unsigned int mask, unsigned int val,
2276 bool *change, bool async, bool force)
2277{
2278 if (id >= field->id_size)
2279 return -EINVAL;
2280
2281 mask = (mask << field->shift) & field->mask;
2282
2283 return regmap_update_bits_base(field->regmap,
2284 field->reg + (field->id_offset * id),
2285 mask, val << field->shift,
2286 change, async, force);
2287}
2288EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2289
2290/**
2291 * regmap_bulk_write() - Write multiple registers to the device
2292 *
2293 * @map: Register map to write to
2294 * @reg: First register to be write from
2295 * @val: Block of data to be written, in native register size for device
2296 * @val_count: Number of registers to write
2297 *
2298 * This function is intended to be used for writing a large block of
2299 * data to the device either in single transfer or multiple transfer.
2300 *
2301 * A value of zero will be returned on success, a negative errno will
2302 * be returned in error cases.
2303 */
2304int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2305 size_t val_count)
2306{
2307 int ret = 0, i;
2308 size_t val_bytes = map->format.val_bytes;
2309
2310 if (!IS_ALIGNED(reg, map->reg_stride))
2311 return -EINVAL;
2312
2313 /*
2314 * Some devices don't support bulk write, for them we have a series of
2315 * single write operations.
2316 */
2317 if (!map->write || !map->format.parse_inplace) {
2318 map->lock(map->lock_arg);
2319 for (i = 0; i < val_count; i++) {
2320 unsigned int ival;
2321
2322 switch (val_bytes) {
2323 case 1:
2324 ival = *(u8 *)(val + (i * val_bytes));
2325 break;
2326 case 2:
2327 ival = *(u16 *)(val + (i * val_bytes));
2328 break;
2329 case 4:
2330 ival = *(u32 *)(val + (i * val_bytes));
2331 break;
2332 default:
2333 ret = -EINVAL;
2334 goto out;
2335 }
2336
2337 ret = _regmap_write(map,
2338 reg + regmap_get_offset(map, i),
2339 ival);
2340 if (ret != 0)
2341 goto out;
2342 }
2343out:
2344 map->unlock(map->lock_arg);
2345 } else {
2346 void *wval;
2347
2348 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2349 if (!wval)
2350 return -ENOMEM;
2351
2352 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2353 map->format.parse_inplace(wval + i);
2354
2355 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2356
2357 kfree(wval);
2358 }
2359
2360 if (!ret)
2361 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2362
2363 return ret;
2364}
2365EXPORT_SYMBOL_GPL(regmap_bulk_write);
2366
2367/*
2368 * _regmap_raw_multi_reg_write()
2369 *
2370 * the (register,newvalue) pairs in regs have not been formatted, but
2371 * they are all in the same page and have been changed to being page
2372 * relative. The page register has been written if that was necessary.
2373 */
2374static int _regmap_raw_multi_reg_write(struct regmap *map,
2375 const struct reg_sequence *regs,
2376 size_t num_regs)
2377{
2378 int ret;
2379 void *buf;
2380 int i;
2381 u8 *u8;
2382 size_t val_bytes = map->format.val_bytes;
2383 size_t reg_bytes = map->format.reg_bytes;
2384 size_t pad_bytes = map->format.pad_bytes;
2385 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2386 size_t len = pair_size * num_regs;
2387
2388 if (!len)
2389 return -EINVAL;
2390
2391 buf = kzalloc(len, GFP_KERNEL);
2392 if (!buf)
2393 return -ENOMEM;
2394
2395 /* We have to linearise by hand. */
2396
2397 u8 = buf;
2398
2399 for (i = 0; i < num_regs; i++) {
2400 unsigned int reg = regs[i].reg;
2401 unsigned int val = regs[i].def;
2402 trace_regmap_hw_write_start(map, reg, 1);
2403 reg = regmap_reg_addr(map, reg);
2404 map->format.format_reg(u8, reg, map->reg_shift);
2405 u8 += reg_bytes + pad_bytes;
2406 map->format.format_val(u8, val, 0);
2407 u8 += val_bytes;
2408 }
2409 u8 = buf;
2410 *u8 |= map->write_flag_mask;
2411
2412 ret = map->write(map->bus_context, buf, len);
2413
2414 kfree(buf);
2415
2416 for (i = 0; i < num_regs; i++) {
2417 int reg = regs[i].reg;
2418 trace_regmap_hw_write_done(map, reg, 1);
2419 }
2420 return ret;
2421}
2422
2423static unsigned int _regmap_register_page(struct regmap *map,
2424 unsigned int reg,
2425 struct regmap_range_node *range)
2426{
2427 unsigned int win_page = (reg - range->range_min) / range->window_len;
2428
2429 return win_page;
2430}
2431
2432static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2433 struct reg_sequence *regs,
2434 size_t num_regs)
2435{
2436 int ret;
2437 int i, n;
2438 struct reg_sequence *base;
2439 unsigned int this_page = 0;
2440 unsigned int page_change = 0;
2441 /*
2442 * the set of registers are not neccessarily in order, but
2443 * since the order of write must be preserved this algorithm
2444 * chops the set each time the page changes. This also applies
2445 * if there is a delay required at any point in the sequence.
2446 */
2447 base = regs;
2448 for (i = 0, n = 0; i < num_regs; i++, n++) {
2449 unsigned int reg = regs[i].reg;
2450 struct regmap_range_node *range;
2451
2452 range = _regmap_range_lookup(map, reg);
2453 if (range) {
2454 unsigned int win_page = _regmap_register_page(map, reg,
2455 range);
2456
2457 if (i == 0)
2458 this_page = win_page;
2459 if (win_page != this_page) {
2460 this_page = win_page;
2461 page_change = 1;
2462 }
2463 }
2464
2465 /* If we have both a page change and a delay make sure to
2466 * write the regs and apply the delay before we change the
2467 * page.
2468 */
2469
2470 if (page_change || regs[i].delay_us) {
2471
2472 /* For situations where the first write requires
2473 * a delay we need to make sure we don't call
2474 * raw_multi_reg_write with n=0
2475 * This can't occur with page breaks as we
2476 * never write on the first iteration
2477 */
2478 if (regs[i].delay_us && i == 0)
2479 n = 1;
2480
2481 ret = _regmap_raw_multi_reg_write(map, base, n);
2482 if (ret != 0)
2483 return ret;
2484
2485 if (regs[i].delay_us) {
2486 if (map->can_sleep)
2487 fsleep(regs[i].delay_us);
2488 else
2489 udelay(regs[i].delay_us);
2490 }
2491
2492 base += n;
2493 n = 0;
2494
2495 if (page_change) {
2496 ret = _regmap_select_page(map,
2497 &base[n].reg,
2498 range, 1);
2499 if (ret != 0)
2500 return ret;
2501
2502 page_change = 0;
2503 }
2504
2505 }
2506
2507 }
2508 if (n > 0)
2509 return _regmap_raw_multi_reg_write(map, base, n);
2510 return 0;
2511}
2512
2513static int _regmap_multi_reg_write(struct regmap *map,
2514 const struct reg_sequence *regs,
2515 size_t num_regs)
2516{
2517 int i;
2518 int ret;
2519
2520 if (!map->can_multi_write) {
2521 for (i = 0; i < num_regs; i++) {
2522 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2523 if (ret != 0)
2524 return ret;
2525
2526 if (regs[i].delay_us) {
2527 if (map->can_sleep)
2528 fsleep(regs[i].delay_us);
2529 else
2530 udelay(regs[i].delay_us);
2531 }
2532 }
2533 return 0;
2534 }
2535
2536 if (!map->format.parse_inplace)
2537 return -EINVAL;
2538
2539 if (map->writeable_reg)
2540 for (i = 0; i < num_regs; i++) {
2541 int reg = regs[i].reg;
2542 if (!map->writeable_reg(map->dev, reg))
2543 return -EINVAL;
2544 if (!IS_ALIGNED(reg, map->reg_stride))
2545 return -EINVAL;
2546 }
2547
2548 if (!map->cache_bypass) {
2549 for (i = 0; i < num_regs; i++) {
2550 unsigned int val = regs[i].def;
2551 unsigned int reg = regs[i].reg;
2552 ret = regcache_write(map, reg, val);
2553 if (ret) {
2554 dev_err(map->dev,
2555 "Error in caching of register: %x ret: %d\n",
2556 reg, ret);
2557 return ret;
2558 }
2559 }
2560 if (map->cache_only) {
2561 map->cache_dirty = true;
2562 return 0;
2563 }
2564 }
2565
2566 WARN_ON(!map->bus);
2567
2568 for (i = 0; i < num_regs; i++) {
2569 unsigned int reg = regs[i].reg;
2570 struct regmap_range_node *range;
2571
2572 /* Coalesce all the writes between a page break or a delay
2573 * in a sequence
2574 */
2575 range = _regmap_range_lookup(map, reg);
2576 if (range || regs[i].delay_us) {
2577 size_t len = sizeof(struct reg_sequence)*num_regs;
2578 struct reg_sequence *base = kmemdup(regs, len,
2579 GFP_KERNEL);
2580 if (!base)
2581 return -ENOMEM;
2582 ret = _regmap_range_multi_paged_reg_write(map, base,
2583 num_regs);
2584 kfree(base);
2585
2586 return ret;
2587 }
2588 }
2589 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2590}
2591
2592/**
2593 * regmap_multi_reg_write() - Write multiple registers to the device
2594 *
2595 * @map: Register map to write to
2596 * @regs: Array of structures containing register,value to be written
2597 * @num_regs: Number of registers to write
2598 *
2599 * Write multiple registers to the device where the set of register, value
2600 * pairs are supplied in any order, possibly not all in a single range.
2601 *
2602 * The 'normal' block write mode will send ultimately send data on the
2603 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2604 * addressed. However, this alternative block multi write mode will send
2605 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2606 * must of course support the mode.
2607 *
2608 * A value of zero will be returned on success, a negative errno will be
2609 * returned in error cases.
2610 */
2611int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2612 int num_regs)
2613{
2614 int ret;
2615
2616 map->lock(map->lock_arg);
2617
2618 ret = _regmap_multi_reg_write(map, regs, num_regs);
2619
2620 map->unlock(map->lock_arg);
2621
2622 return ret;
2623}
2624EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2625
2626/**
2627 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2628 * device but not the cache
2629 *
2630 * @map: Register map to write to
2631 * @regs: Array of structures containing register,value to be written
2632 * @num_regs: Number of registers to write
2633 *
2634 * Write multiple registers to the device but not the cache where the set
2635 * of register are supplied in any order.
2636 *
2637 * This function is intended to be used for writing a large block of data
2638 * atomically to the device in single transfer for those I2C client devices
2639 * that implement this alternative block write mode.
2640 *
2641 * A value of zero will be returned on success, a negative errno will
2642 * be returned in error cases.
2643 */
2644int regmap_multi_reg_write_bypassed(struct regmap *map,
2645 const struct reg_sequence *regs,
2646 int num_regs)
2647{
2648 int ret;
2649 bool bypass;
2650
2651 map->lock(map->lock_arg);
2652
2653 bypass = map->cache_bypass;
2654 map->cache_bypass = true;
2655
2656 ret = _regmap_multi_reg_write(map, regs, num_regs);
2657
2658 map->cache_bypass = bypass;
2659
2660 map->unlock(map->lock_arg);
2661
2662 return ret;
2663}
2664EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2665
2666/**
2667 * regmap_raw_write_async() - Write raw values to one or more registers
2668 * asynchronously
2669 *
2670 * @map: Register map to write to
2671 * @reg: Initial register to write to
2672 * @val: Block of data to be written, laid out for direct transmission to the
2673 * device. Must be valid until regmap_async_complete() is called.
2674 * @val_len: Length of data pointed to by val.
2675 *
2676 * This function is intended to be used for things like firmware
2677 * download where a large block of data needs to be transferred to the
2678 * device. No formatting will be done on the data provided.
2679 *
2680 * If supported by the underlying bus the write will be scheduled
2681 * asynchronously, helping maximise I/O speed on higher speed buses
2682 * like SPI. regmap_async_complete() can be called to ensure that all
2683 * asynchrnous writes have been completed.
2684 *
2685 * A value of zero will be returned on success, a negative errno will
2686 * be returned in error cases.
2687 */
2688int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2689 const void *val, size_t val_len)
2690{
2691 int ret;
2692
2693 if (val_len % map->format.val_bytes)
2694 return -EINVAL;
2695 if (!IS_ALIGNED(reg, map->reg_stride))
2696 return -EINVAL;
2697
2698 map->lock(map->lock_arg);
2699
2700 map->async = true;
2701
2702 ret = _regmap_raw_write(map, reg, val, val_len, false);
2703
2704 map->async = false;
2705
2706 map->unlock(map->lock_arg);
2707
2708 return ret;
2709}
2710EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2711
2712static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2713 unsigned int val_len, bool noinc)
2714{
2715 struct regmap_range_node *range;
2716 int ret;
2717
2718 if (!map->read)
2719 return -EINVAL;
2720
2721 range = _regmap_range_lookup(map, reg);
2722 if (range) {
2723 ret = _regmap_select_page(map, ®, range,
2724 noinc ? 1 : val_len / map->format.val_bytes);
2725 if (ret != 0)
2726 return ret;
2727 }
2728
2729 reg = regmap_reg_addr(map, reg);
2730 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2731 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2732 map->read_flag_mask);
2733 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2734
2735 ret = map->read(map->bus_context, map->work_buf,
2736 map->format.reg_bytes + map->format.pad_bytes,
2737 val, val_len);
2738
2739 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2740
2741 return ret;
2742}
2743
2744static int _regmap_bus_reg_read(void *context, unsigned int reg,
2745 unsigned int *val)
2746{
2747 struct regmap *map = context;
2748 struct regmap_range_node *range;
2749 int ret;
2750
2751 range = _regmap_range_lookup(map, reg);
2752 if (range) {
2753 ret = _regmap_select_page(map, ®, range, 1);
2754 if (ret != 0)
2755 return ret;
2756 }
2757
2758 reg = regmap_reg_addr(map, reg);
2759 return map->bus->reg_read(map->bus_context, reg, val);
2760}
2761
2762static int _regmap_bus_read(void *context, unsigned int reg,
2763 unsigned int *val)
2764{
2765 int ret;
2766 struct regmap *map = context;
2767 void *work_val = map->work_buf + map->format.reg_bytes +
2768 map->format.pad_bytes;
2769
2770 if (!map->format.parse_val)
2771 return -EINVAL;
2772
2773 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2774 if (ret == 0)
2775 *val = map->format.parse_val(work_val);
2776
2777 return ret;
2778}
2779
2780static int _regmap_read(struct regmap *map, unsigned int reg,
2781 unsigned int *val)
2782{
2783 int ret;
2784 void *context = _regmap_map_get_context(map);
2785
2786 if (!map->cache_bypass) {
2787 ret = regcache_read(map, reg, val);
2788 if (ret == 0)
2789 return 0;
2790 }
2791
2792 if (map->cache_only)
2793 return -EBUSY;
2794
2795 if (!regmap_readable(map, reg))
2796 return -EIO;
2797
2798 ret = map->reg_read(context, reg, val);
2799 if (ret == 0) {
2800 if (regmap_should_log(map))
2801 dev_info(map->dev, "%x => %x\n", reg, *val);
2802
2803 trace_regmap_reg_read(map, reg, *val);
2804
2805 if (!map->cache_bypass)
2806 regcache_write(map, reg, *val);
2807 }
2808
2809 return ret;
2810}
2811
2812/**
2813 * regmap_read() - Read a value from a single register
2814 *
2815 * @map: Register map to read from
2816 * @reg: Register to be read from
2817 * @val: Pointer to store read value
2818 *
2819 * A value of zero will be returned on success, a negative errno will
2820 * be returned in error cases.
2821 */
2822int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2823{
2824 int ret;
2825
2826 if (!IS_ALIGNED(reg, map->reg_stride))
2827 return -EINVAL;
2828
2829 map->lock(map->lock_arg);
2830
2831 ret = _regmap_read(map, reg, val);
2832
2833 map->unlock(map->lock_arg);
2834
2835 return ret;
2836}
2837EXPORT_SYMBOL_GPL(regmap_read);
2838
2839/**
2840 * regmap_raw_read() - Read raw data from the device
2841 *
2842 * @map: Register map to read from
2843 * @reg: First register to be read from
2844 * @val: Pointer to store read value
2845 * @val_len: Size of data to read
2846 *
2847 * A value of zero will be returned on success, a negative errno will
2848 * be returned in error cases.
2849 */
2850int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2851 size_t val_len)
2852{
2853 size_t val_bytes = map->format.val_bytes;
2854 size_t val_count = val_len / val_bytes;
2855 unsigned int v;
2856 int ret, i;
2857
2858 if (val_len % map->format.val_bytes)
2859 return -EINVAL;
2860 if (!IS_ALIGNED(reg, map->reg_stride))
2861 return -EINVAL;
2862 if (val_count == 0)
2863 return -EINVAL;
2864
2865 map->lock(map->lock_arg);
2866
2867 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2868 map->cache_type == REGCACHE_NONE) {
2869 size_t chunk_count, chunk_bytes;
2870 size_t chunk_regs = val_count;
2871
2872 if (!map->cache_bypass && map->cache_only) {
2873 ret = -EBUSY;
2874 goto out;
2875 }
2876
2877 if (!map->read) {
2878 ret = -ENOTSUPP;
2879 goto out;
2880 }
2881
2882 if (map->use_single_read)
2883 chunk_regs = 1;
2884 else if (map->max_raw_read && val_len > map->max_raw_read)
2885 chunk_regs = map->max_raw_read / val_bytes;
2886
2887 chunk_count = val_count / chunk_regs;
2888 chunk_bytes = chunk_regs * val_bytes;
2889
2890 /* Read bytes that fit into whole chunks */
2891 for (i = 0; i < chunk_count; i++) {
2892 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2893 if (ret != 0)
2894 goto out;
2895
2896 reg += regmap_get_offset(map, chunk_regs);
2897 val += chunk_bytes;
2898 val_len -= chunk_bytes;
2899 }
2900
2901 /* Read remaining bytes */
2902 if (val_len) {
2903 ret = _regmap_raw_read(map, reg, val, val_len, false);
2904 if (ret != 0)
2905 goto out;
2906 }
2907 } else {
2908 /* Otherwise go word by word for the cache; should be low
2909 * cost as we expect to hit the cache.
2910 */
2911 for (i = 0; i < val_count; i++) {
2912 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2913 &v);
2914 if (ret != 0)
2915 goto out;
2916
2917 map->format.format_val(val + (i * val_bytes), v, 0);
2918 }
2919 }
2920
2921 out:
2922 map->unlock(map->lock_arg);
2923
2924 return ret;
2925}
2926EXPORT_SYMBOL_GPL(regmap_raw_read);
2927
2928/**
2929 * regmap_noinc_read(): Read data from a register without incrementing the
2930 * register number
2931 *
2932 * @map: Register map to read from
2933 * @reg: Register to read from
2934 * @val: Pointer to data buffer
2935 * @val_len: Length of output buffer in bytes.
2936 *
2937 * The regmap API usually assumes that bulk read operations will read a
2938 * range of registers. Some devices have certain registers for which a read
2939 * operation read will read from an internal FIFO.
2940 *
2941 * The target register must be volatile but registers after it can be
2942 * completely unrelated cacheable registers.
2943 *
2944 * This will attempt multiple reads as required to read val_len bytes.
2945 *
2946 * A value of zero will be returned on success, a negative errno will be
2947 * returned in error cases.
2948 */
2949int regmap_noinc_read(struct regmap *map, unsigned int reg,
2950 void *val, size_t val_len)
2951{
2952 size_t read_len;
2953 int ret;
2954
2955 if (!map->read)
2956 return -ENOTSUPP;
2957
2958 if (val_len % map->format.val_bytes)
2959 return -EINVAL;
2960 if (!IS_ALIGNED(reg, map->reg_stride))
2961 return -EINVAL;
2962 if (val_len == 0)
2963 return -EINVAL;
2964
2965 map->lock(map->lock_arg);
2966
2967 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2968 ret = -EINVAL;
2969 goto out_unlock;
2970 }
2971
2972 /*
2973 * We have not defined the FIFO semantics for cache, as the
2974 * cache is just one value deep. Should we return the last
2975 * written value? Just avoid this by always reading the FIFO
2976 * even when using cache. Cache only will not work.
2977 */
2978 if (!map->cache_bypass && map->cache_only) {
2979 ret = -EBUSY;
2980 goto out_unlock;
2981 }
2982
2983 /* Use the accelerated operation if we can */
2984 if (map->bus->reg_noinc_read) {
2985 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
2986 goto out_unlock;
2987 }
2988
2989 while (val_len) {
2990 if (map->max_raw_read && map->max_raw_read < val_len)
2991 read_len = map->max_raw_read;
2992 else
2993 read_len = val_len;
2994 ret = _regmap_raw_read(map, reg, val, read_len, true);
2995 if (ret)
2996 goto out_unlock;
2997 val = ((u8 *)val) + read_len;
2998 val_len -= read_len;
2999 }
3000
3001out_unlock:
3002 map->unlock(map->lock_arg);
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(regmap_noinc_read);
3006
3007/**
3008 * regmap_field_read(): Read a value to a single register field
3009 *
3010 * @field: Register field to read from
3011 * @val: Pointer to store read value
3012 *
3013 * A value of zero will be returned on success, a negative errno will
3014 * be returned in error cases.
3015 */
3016int regmap_field_read(struct regmap_field *field, unsigned int *val)
3017{
3018 int ret;
3019 unsigned int reg_val;
3020 ret = regmap_read(field->regmap, field->reg, ®_val);
3021 if (ret != 0)
3022 return ret;
3023
3024 reg_val &= field->mask;
3025 reg_val >>= field->shift;
3026 *val = reg_val;
3027
3028 return ret;
3029}
3030EXPORT_SYMBOL_GPL(regmap_field_read);
3031
3032/**
3033 * regmap_fields_read() - Read a value to a single register field with port ID
3034 *
3035 * @field: Register field to read from
3036 * @id: port ID
3037 * @val: Pointer to store read value
3038 *
3039 * A value of zero will be returned on success, a negative errno will
3040 * be returned in error cases.
3041 */
3042int regmap_fields_read(struct regmap_field *field, unsigned int id,
3043 unsigned int *val)
3044{
3045 int ret;
3046 unsigned int reg_val;
3047
3048 if (id >= field->id_size)
3049 return -EINVAL;
3050
3051 ret = regmap_read(field->regmap,
3052 field->reg + (field->id_offset * id),
3053 ®_val);
3054 if (ret != 0)
3055 return ret;
3056
3057 reg_val &= field->mask;
3058 reg_val >>= field->shift;
3059 *val = reg_val;
3060
3061 return ret;
3062}
3063EXPORT_SYMBOL_GPL(regmap_fields_read);
3064
3065/**
3066 * regmap_bulk_read() - Read multiple registers from the device
3067 *
3068 * @map: Register map to read from
3069 * @reg: First register to be read from
3070 * @val: Pointer to store read value, in native register size for device
3071 * @val_count: Number of registers to read
3072 *
3073 * A value of zero will be returned on success, a negative errno will
3074 * be returned in error cases.
3075 */
3076int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3077 size_t val_count)
3078{
3079 int ret, i;
3080 size_t val_bytes = map->format.val_bytes;
3081 bool vol = regmap_volatile_range(map, reg, val_count);
3082
3083 if (!IS_ALIGNED(reg, map->reg_stride))
3084 return -EINVAL;
3085 if (val_count == 0)
3086 return -EINVAL;
3087
3088 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3089 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3090 if (ret != 0)
3091 return ret;
3092
3093 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3094 map->format.parse_inplace(val + i);
3095 } else {
3096 u32 *u32 = val;
3097 u16 *u16 = val;
3098 u8 *u8 = val;
3099
3100 map->lock(map->lock_arg);
3101
3102 for (i = 0; i < val_count; i++) {
3103 unsigned int ival;
3104
3105 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3106 &ival);
3107 if (ret != 0)
3108 goto out;
3109
3110 switch (map->format.val_bytes) {
3111 case 4:
3112 u32[i] = ival;
3113 break;
3114 case 2:
3115 u16[i] = ival;
3116 break;
3117 case 1:
3118 u8[i] = ival;
3119 break;
3120 default:
3121 ret = -EINVAL;
3122 goto out;
3123 }
3124 }
3125
3126out:
3127 map->unlock(map->lock_arg);
3128 }
3129
3130 if (!ret)
3131 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3132
3133 return ret;
3134}
3135EXPORT_SYMBOL_GPL(regmap_bulk_read);
3136
3137static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3138 unsigned int mask, unsigned int val,
3139 bool *change, bool force_write)
3140{
3141 int ret;
3142 unsigned int tmp, orig;
3143
3144 if (change)
3145 *change = false;
3146
3147 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3148 reg = regmap_reg_addr(map, reg);
3149 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3150 if (ret == 0 && change)
3151 *change = true;
3152 } else {
3153 ret = _regmap_read(map, reg, &orig);
3154 if (ret != 0)
3155 return ret;
3156
3157 tmp = orig & ~mask;
3158 tmp |= val & mask;
3159
3160 if (force_write || (tmp != orig) || map->force_write_field) {
3161 ret = _regmap_write(map, reg, tmp);
3162 if (ret == 0 && change)
3163 *change = true;
3164 }
3165 }
3166
3167 return ret;
3168}
3169
3170/**
3171 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3172 *
3173 * @map: Register map to update
3174 * @reg: Register to update
3175 * @mask: Bitmask to change
3176 * @val: New value for bitmask
3177 * @change: Boolean indicating if a write was done
3178 * @async: Boolean indicating asynchronously
3179 * @force: Boolean indicating use force update
3180 *
3181 * Perform a read/modify/write cycle on a register map with change, async, force
3182 * options.
3183 *
3184 * If async is true:
3185 *
3186 * With most buses the read must be done synchronously so this is most useful
3187 * for devices with a cache which do not need to interact with the hardware to
3188 * determine the current register value.
3189 *
3190 * Returns zero for success, a negative number on error.
3191 */
3192int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3193 unsigned int mask, unsigned int val,
3194 bool *change, bool async, bool force)
3195{
3196 int ret;
3197
3198 map->lock(map->lock_arg);
3199
3200 map->async = async;
3201
3202 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3203
3204 map->async = false;
3205
3206 map->unlock(map->lock_arg);
3207
3208 return ret;
3209}
3210EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3211
3212/**
3213 * regmap_test_bits() - Check if all specified bits are set in a register.
3214 *
3215 * @map: Register map to operate on
3216 * @reg: Register to read from
3217 * @bits: Bits to test
3218 *
3219 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3220 * bits are set and a negative error number if the underlying regmap_read()
3221 * fails.
3222 */
3223int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3224{
3225 unsigned int val, ret;
3226
3227 ret = regmap_read(map, reg, &val);
3228 if (ret)
3229 return ret;
3230
3231 return (val & bits) == bits;
3232}
3233EXPORT_SYMBOL_GPL(regmap_test_bits);
3234
3235void regmap_async_complete_cb(struct regmap_async *async, int ret)
3236{
3237 struct regmap *map = async->map;
3238 bool wake;
3239
3240 trace_regmap_async_io_complete(map);
3241
3242 spin_lock(&map->async_lock);
3243 list_move(&async->list, &map->async_free);
3244 wake = list_empty(&map->async_list);
3245
3246 if (ret != 0)
3247 map->async_ret = ret;
3248
3249 spin_unlock(&map->async_lock);
3250
3251 if (wake)
3252 wake_up(&map->async_waitq);
3253}
3254EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3255
3256static int regmap_async_is_done(struct regmap *map)
3257{
3258 unsigned long flags;
3259 int ret;
3260
3261 spin_lock_irqsave(&map->async_lock, flags);
3262 ret = list_empty(&map->async_list);
3263 spin_unlock_irqrestore(&map->async_lock, flags);
3264
3265 return ret;
3266}
3267
3268/**
3269 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3270 *
3271 * @map: Map to operate on.
3272 *
3273 * Blocks until any pending asynchronous I/O has completed. Returns
3274 * an error code for any failed I/O operations.
3275 */
3276int regmap_async_complete(struct regmap *map)
3277{
3278 unsigned long flags;
3279 int ret;
3280
3281 /* Nothing to do with no async support */
3282 if (!map->bus || !map->bus->async_write)
3283 return 0;
3284
3285 trace_regmap_async_complete_start(map);
3286
3287 wait_event(map->async_waitq, regmap_async_is_done(map));
3288
3289 spin_lock_irqsave(&map->async_lock, flags);
3290 ret = map->async_ret;
3291 map->async_ret = 0;
3292 spin_unlock_irqrestore(&map->async_lock, flags);
3293
3294 trace_regmap_async_complete_done(map);
3295
3296 return ret;
3297}
3298EXPORT_SYMBOL_GPL(regmap_async_complete);
3299
3300/**
3301 * regmap_register_patch - Register and apply register updates to be applied
3302 * on device initialistion
3303 *
3304 * @map: Register map to apply updates to.
3305 * @regs: Values to update.
3306 * @num_regs: Number of entries in regs.
3307 *
3308 * Register a set of register updates to be applied to the device
3309 * whenever the device registers are synchronised with the cache and
3310 * apply them immediately. Typically this is used to apply
3311 * corrections to be applied to the device defaults on startup, such
3312 * as the updates some vendors provide to undocumented registers.
3313 *
3314 * The caller must ensure that this function cannot be called
3315 * concurrently with either itself or regcache_sync().
3316 */
3317int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3318 int num_regs)
3319{
3320 struct reg_sequence *p;
3321 int ret;
3322 bool bypass;
3323
3324 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3325 num_regs))
3326 return 0;
3327
3328 p = krealloc(map->patch,
3329 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3330 GFP_KERNEL);
3331 if (p) {
3332 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3333 map->patch = p;
3334 map->patch_regs += num_regs;
3335 } else {
3336 return -ENOMEM;
3337 }
3338
3339 map->lock(map->lock_arg);
3340
3341 bypass = map->cache_bypass;
3342
3343 map->cache_bypass = true;
3344 map->async = true;
3345
3346 ret = _regmap_multi_reg_write(map, regs, num_regs);
3347
3348 map->async = false;
3349 map->cache_bypass = bypass;
3350
3351 map->unlock(map->lock_arg);
3352
3353 regmap_async_complete(map);
3354
3355 return ret;
3356}
3357EXPORT_SYMBOL_GPL(regmap_register_patch);
3358
3359/**
3360 * regmap_get_val_bytes() - Report the size of a register value
3361 *
3362 * @map: Register map to operate on.
3363 *
3364 * Report the size of a register value, mainly intended to for use by
3365 * generic infrastructure built on top of regmap.
3366 */
3367int regmap_get_val_bytes(struct regmap *map)
3368{
3369 if (map->format.format_write)
3370 return -EINVAL;
3371
3372 return map->format.val_bytes;
3373}
3374EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3375
3376/**
3377 * regmap_get_max_register() - Report the max register value
3378 *
3379 * @map: Register map to operate on.
3380 *
3381 * Report the max register value, mainly intended to for use by
3382 * generic infrastructure built on top of regmap.
3383 */
3384int regmap_get_max_register(struct regmap *map)
3385{
3386 return map->max_register ? map->max_register : -EINVAL;
3387}
3388EXPORT_SYMBOL_GPL(regmap_get_max_register);
3389
3390/**
3391 * regmap_get_reg_stride() - Report the register address stride
3392 *
3393 * @map: Register map to operate on.
3394 *
3395 * Report the register address stride, mainly intended to for use by
3396 * generic infrastructure built on top of regmap.
3397 */
3398int regmap_get_reg_stride(struct regmap *map)
3399{
3400 return map->reg_stride;
3401}
3402EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3403
3404/**
3405 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3406 *
3407 * @map: Register map to operate on.
3408 *
3409 * Returns true if an access to the register might sleep, else false.
3410 */
3411bool regmap_might_sleep(struct regmap *map)
3412{
3413 return map->can_sleep;
3414}
3415EXPORT_SYMBOL_GPL(regmap_might_sleep);
3416
3417int regmap_parse_val(struct regmap *map, const void *buf,
3418 unsigned int *val)
3419{
3420 if (!map->format.parse_val)
3421 return -EINVAL;
3422
3423 *val = map->format.parse_val(buf);
3424
3425 return 0;
3426}
3427EXPORT_SYMBOL_GPL(regmap_parse_val);
3428
3429static int __init regmap_initcall(void)
3430{
3431 regmap_debugfs_initcall();
3432
3433 return 0;
3434}
3435postcore_initcall(regmap_initcall);
1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_2_6_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 *out = (reg << 6) | val;
218}
219
220static void regmap_format_4_12_write(struct regmap *map,
221 unsigned int reg, unsigned int val)
222{
223 __be16 *out = map->work_buf;
224 *out = cpu_to_be16((reg << 12) | val);
225}
226
227static void regmap_format_7_9_write(struct regmap *map,
228 unsigned int reg, unsigned int val)
229{
230 __be16 *out = map->work_buf;
231 *out = cpu_to_be16((reg << 9) | val);
232}
233
234static void regmap_format_10_14_write(struct regmap *map,
235 unsigned int reg, unsigned int val)
236{
237 u8 *out = map->work_buf;
238
239 out[2] = val;
240 out[1] = (val >> 8) | (reg << 6);
241 out[0] = reg >> 2;
242}
243
244static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
245{
246 u8 *b = buf;
247
248 b[0] = val << shift;
249}
250
251static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
252{
253 put_unaligned_be16(val << shift, buf);
254}
255
256static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
257{
258 put_unaligned_le16(val << shift, buf);
259}
260
261static void regmap_format_16_native(void *buf, unsigned int val,
262 unsigned int shift)
263{
264 u16 v = val << shift;
265
266 memcpy(buf, &v, sizeof(v));
267}
268
269static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
270{
271 u8 *b = buf;
272
273 val <<= shift;
274
275 b[0] = val >> 16;
276 b[1] = val >> 8;
277 b[2] = val;
278}
279
280static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
281{
282 put_unaligned_be32(val << shift, buf);
283}
284
285static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
286{
287 put_unaligned_le32(val << shift, buf);
288}
289
290static void regmap_format_32_native(void *buf, unsigned int val,
291 unsigned int shift)
292{
293 u32 v = val << shift;
294
295 memcpy(buf, &v, sizeof(v));
296}
297
298#ifdef CONFIG_64BIT
299static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
300{
301 put_unaligned_be64((u64) val << shift, buf);
302}
303
304static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
305{
306 put_unaligned_le64((u64) val << shift, buf);
307}
308
309static void regmap_format_64_native(void *buf, unsigned int val,
310 unsigned int shift)
311{
312 u64 v = (u64) val << shift;
313
314 memcpy(buf, &v, sizeof(v));
315}
316#endif
317
318static void regmap_parse_inplace_noop(void *buf)
319{
320}
321
322static unsigned int regmap_parse_8(const void *buf)
323{
324 const u8 *b = buf;
325
326 return b[0];
327}
328
329static unsigned int regmap_parse_16_be(const void *buf)
330{
331 return get_unaligned_be16(buf);
332}
333
334static unsigned int regmap_parse_16_le(const void *buf)
335{
336 return get_unaligned_le16(buf);
337}
338
339static void regmap_parse_16_be_inplace(void *buf)
340{
341 u16 v = get_unaligned_be16(buf);
342
343 memcpy(buf, &v, sizeof(v));
344}
345
346static void regmap_parse_16_le_inplace(void *buf)
347{
348 u16 v = get_unaligned_le16(buf);
349
350 memcpy(buf, &v, sizeof(v));
351}
352
353static unsigned int regmap_parse_16_native(const void *buf)
354{
355 u16 v;
356
357 memcpy(&v, buf, sizeof(v));
358 return v;
359}
360
361static unsigned int regmap_parse_24(const void *buf)
362{
363 const u8 *b = buf;
364 unsigned int ret = b[2];
365 ret |= ((unsigned int)b[1]) << 8;
366 ret |= ((unsigned int)b[0]) << 16;
367
368 return ret;
369}
370
371static unsigned int regmap_parse_32_be(const void *buf)
372{
373 return get_unaligned_be32(buf);
374}
375
376static unsigned int regmap_parse_32_le(const void *buf)
377{
378 return get_unaligned_le32(buf);
379}
380
381static void regmap_parse_32_be_inplace(void *buf)
382{
383 u32 v = get_unaligned_be32(buf);
384
385 memcpy(buf, &v, sizeof(v));
386}
387
388static void regmap_parse_32_le_inplace(void *buf)
389{
390 u32 v = get_unaligned_le32(buf);
391
392 memcpy(buf, &v, sizeof(v));
393}
394
395static unsigned int regmap_parse_32_native(const void *buf)
396{
397 u32 v;
398
399 memcpy(&v, buf, sizeof(v));
400 return v;
401}
402
403#ifdef CONFIG_64BIT
404static unsigned int regmap_parse_64_be(const void *buf)
405{
406 return get_unaligned_be64(buf);
407}
408
409static unsigned int regmap_parse_64_le(const void *buf)
410{
411 return get_unaligned_le64(buf);
412}
413
414static void regmap_parse_64_be_inplace(void *buf)
415{
416 u64 v = get_unaligned_be64(buf);
417
418 memcpy(buf, &v, sizeof(v));
419}
420
421static void regmap_parse_64_le_inplace(void *buf)
422{
423 u64 v = get_unaligned_le64(buf);
424
425 memcpy(buf, &v, sizeof(v));
426}
427
428static unsigned int regmap_parse_64_native(const void *buf)
429{
430 u64 v;
431
432 memcpy(&v, buf, sizeof(v));
433 return v;
434}
435#endif
436
437static void regmap_lock_hwlock(void *__map)
438{
439 struct regmap *map = __map;
440
441 hwspin_lock_timeout(map->hwlock, UINT_MAX);
442}
443
444static void regmap_lock_hwlock_irq(void *__map)
445{
446 struct regmap *map = __map;
447
448 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
449}
450
451static void regmap_lock_hwlock_irqsave(void *__map)
452{
453 struct regmap *map = __map;
454
455 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
456 &map->spinlock_flags);
457}
458
459static void regmap_unlock_hwlock(void *__map)
460{
461 struct regmap *map = __map;
462
463 hwspin_unlock(map->hwlock);
464}
465
466static void regmap_unlock_hwlock_irq(void *__map)
467{
468 struct regmap *map = __map;
469
470 hwspin_unlock_irq(map->hwlock);
471}
472
473static void regmap_unlock_hwlock_irqrestore(void *__map)
474{
475 struct regmap *map = __map;
476
477 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
478}
479
480static void regmap_lock_unlock_none(void *__map)
481{
482
483}
484
485static void regmap_lock_mutex(void *__map)
486{
487 struct regmap *map = __map;
488 mutex_lock(&map->mutex);
489}
490
491static void regmap_unlock_mutex(void *__map)
492{
493 struct regmap *map = __map;
494 mutex_unlock(&map->mutex);
495}
496
497static void regmap_lock_spinlock(void *__map)
498__acquires(&map->spinlock)
499{
500 struct regmap *map = __map;
501 unsigned long flags;
502
503 spin_lock_irqsave(&map->spinlock, flags);
504 map->spinlock_flags = flags;
505}
506
507static void regmap_unlock_spinlock(void *__map)
508__releases(&map->spinlock)
509{
510 struct regmap *map = __map;
511 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
512}
513
514static void dev_get_regmap_release(struct device *dev, void *res)
515{
516 /*
517 * We don't actually have anything to do here; the goal here
518 * is not to manage the regmap but to provide a simple way to
519 * get the regmap back given a struct device.
520 */
521}
522
523static bool _regmap_range_add(struct regmap *map,
524 struct regmap_range_node *data)
525{
526 struct rb_root *root = &map->range_tree;
527 struct rb_node **new = &(root->rb_node), *parent = NULL;
528
529 while (*new) {
530 struct regmap_range_node *this =
531 rb_entry(*new, struct regmap_range_node, node);
532
533 parent = *new;
534 if (data->range_max < this->range_min)
535 new = &((*new)->rb_left);
536 else if (data->range_min > this->range_max)
537 new = &((*new)->rb_right);
538 else
539 return false;
540 }
541
542 rb_link_node(&data->node, parent, new);
543 rb_insert_color(&data->node, root);
544
545 return true;
546}
547
548static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
549 unsigned int reg)
550{
551 struct rb_node *node = map->range_tree.rb_node;
552
553 while (node) {
554 struct regmap_range_node *this =
555 rb_entry(node, struct regmap_range_node, node);
556
557 if (reg < this->range_min)
558 node = node->rb_left;
559 else if (reg > this->range_max)
560 node = node->rb_right;
561 else
562 return this;
563 }
564
565 return NULL;
566}
567
568static void regmap_range_exit(struct regmap *map)
569{
570 struct rb_node *next;
571 struct regmap_range_node *range_node;
572
573 next = rb_first(&map->range_tree);
574 while (next) {
575 range_node = rb_entry(next, struct regmap_range_node, node);
576 next = rb_next(&range_node->node);
577 rb_erase(&range_node->node, &map->range_tree);
578 kfree(range_node);
579 }
580
581 kfree(map->selector_work_buf);
582}
583
584static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
585{
586 if (config->name) {
587 const char *name = kstrdup_const(config->name, GFP_KERNEL);
588
589 if (!name)
590 return -ENOMEM;
591
592 kfree_const(map->name);
593 map->name = name;
594 }
595
596 return 0;
597}
598
599int regmap_attach_dev(struct device *dev, struct regmap *map,
600 const struct regmap_config *config)
601{
602 struct regmap **m;
603 int ret;
604
605 map->dev = dev;
606
607 ret = regmap_set_name(map, config);
608 if (ret)
609 return ret;
610
611 regmap_debugfs_init(map);
612
613 /* Add a devres resource for dev_get_regmap() */
614 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
615 if (!m) {
616 regmap_debugfs_exit(map);
617 return -ENOMEM;
618 }
619 *m = map;
620 devres_add(dev, m);
621
622 return 0;
623}
624EXPORT_SYMBOL_GPL(regmap_attach_dev);
625
626static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
627 const struct regmap_config *config)
628{
629 enum regmap_endian endian;
630
631 /* Retrieve the endianness specification from the regmap config */
632 endian = config->reg_format_endian;
633
634 /* If the regmap config specified a non-default value, use that */
635 if (endian != REGMAP_ENDIAN_DEFAULT)
636 return endian;
637
638 /* Retrieve the endianness specification from the bus config */
639 if (bus && bus->reg_format_endian_default)
640 endian = bus->reg_format_endian_default;
641
642 /* If the bus specified a non-default value, use that */
643 if (endian != REGMAP_ENDIAN_DEFAULT)
644 return endian;
645
646 /* Use this if no other value was found */
647 return REGMAP_ENDIAN_BIG;
648}
649
650enum regmap_endian regmap_get_val_endian(struct device *dev,
651 const struct regmap_bus *bus,
652 const struct regmap_config *config)
653{
654 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
655 enum regmap_endian endian;
656
657 /* Retrieve the endianness specification from the regmap config */
658 endian = config->val_format_endian;
659
660 /* If the regmap config specified a non-default value, use that */
661 if (endian != REGMAP_ENDIAN_DEFAULT)
662 return endian;
663
664 /* If the firmware node exist try to get endianness from it */
665 if (fwnode_property_read_bool(fwnode, "big-endian"))
666 endian = REGMAP_ENDIAN_BIG;
667 else if (fwnode_property_read_bool(fwnode, "little-endian"))
668 endian = REGMAP_ENDIAN_LITTLE;
669 else if (fwnode_property_read_bool(fwnode, "native-endian"))
670 endian = REGMAP_ENDIAN_NATIVE;
671
672 /* If the endianness was specified in fwnode, use that */
673 if (endian != REGMAP_ENDIAN_DEFAULT)
674 return endian;
675
676 /* Retrieve the endianness specification from the bus config */
677 if (bus && bus->val_format_endian_default)
678 endian = bus->val_format_endian_default;
679
680 /* If the bus specified a non-default value, use that */
681 if (endian != REGMAP_ENDIAN_DEFAULT)
682 return endian;
683
684 /* Use this if no other value was found */
685 return REGMAP_ENDIAN_BIG;
686}
687EXPORT_SYMBOL_GPL(regmap_get_val_endian);
688
689struct regmap *__regmap_init(struct device *dev,
690 const struct regmap_bus *bus,
691 void *bus_context,
692 const struct regmap_config *config,
693 struct lock_class_key *lock_key,
694 const char *lock_name)
695{
696 struct regmap *map;
697 int ret = -EINVAL;
698 enum regmap_endian reg_endian, val_endian;
699 int i, j;
700
701 if (!config)
702 goto err;
703
704 map = kzalloc(sizeof(*map), GFP_KERNEL);
705 if (map == NULL) {
706 ret = -ENOMEM;
707 goto err;
708 }
709
710 ret = regmap_set_name(map, config);
711 if (ret)
712 goto err_map;
713
714 if (config->disable_locking) {
715 map->lock = map->unlock = regmap_lock_unlock_none;
716 regmap_debugfs_disable(map);
717 } else if (config->lock && config->unlock) {
718 map->lock = config->lock;
719 map->unlock = config->unlock;
720 map->lock_arg = config->lock_arg;
721 } else if (config->use_hwlock) {
722 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
723 if (!map->hwlock) {
724 ret = -ENXIO;
725 goto err_name;
726 }
727
728 switch (config->hwlock_mode) {
729 case HWLOCK_IRQSTATE:
730 map->lock = regmap_lock_hwlock_irqsave;
731 map->unlock = regmap_unlock_hwlock_irqrestore;
732 break;
733 case HWLOCK_IRQ:
734 map->lock = regmap_lock_hwlock_irq;
735 map->unlock = regmap_unlock_hwlock_irq;
736 break;
737 default:
738 map->lock = regmap_lock_hwlock;
739 map->unlock = regmap_unlock_hwlock;
740 break;
741 }
742
743 map->lock_arg = map;
744 } else {
745 if ((bus && bus->fast_io) ||
746 config->fast_io) {
747 spin_lock_init(&map->spinlock);
748 map->lock = regmap_lock_spinlock;
749 map->unlock = regmap_unlock_spinlock;
750 lockdep_set_class_and_name(&map->spinlock,
751 lock_key, lock_name);
752 } else {
753 mutex_init(&map->mutex);
754 map->lock = regmap_lock_mutex;
755 map->unlock = regmap_unlock_mutex;
756 lockdep_set_class_and_name(&map->mutex,
757 lock_key, lock_name);
758 }
759 map->lock_arg = map;
760 }
761
762 /*
763 * When we write in fast-paths with regmap_bulk_write() don't allocate
764 * scratch buffers with sleeping allocations.
765 */
766 if ((bus && bus->fast_io) || config->fast_io)
767 map->alloc_flags = GFP_ATOMIC;
768 else
769 map->alloc_flags = GFP_KERNEL;
770
771 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
772 map->format.pad_bytes = config->pad_bits / 8;
773 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
774 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
775 config->val_bits + config->pad_bits, 8);
776 map->reg_shift = config->pad_bits % 8;
777 if (config->reg_stride)
778 map->reg_stride = config->reg_stride;
779 else
780 map->reg_stride = 1;
781 if (is_power_of_2(map->reg_stride))
782 map->reg_stride_order = ilog2(map->reg_stride);
783 else
784 map->reg_stride_order = -1;
785 map->use_single_read = config->use_single_read || !bus || !bus->read;
786 map->use_single_write = config->use_single_write || !bus || !bus->write;
787 map->can_multi_write = config->can_multi_write && bus && bus->write;
788 if (bus) {
789 map->max_raw_read = bus->max_raw_read;
790 map->max_raw_write = bus->max_raw_write;
791 }
792 map->dev = dev;
793 map->bus = bus;
794 map->bus_context = bus_context;
795 map->max_register = config->max_register;
796 map->wr_table = config->wr_table;
797 map->rd_table = config->rd_table;
798 map->volatile_table = config->volatile_table;
799 map->precious_table = config->precious_table;
800 map->wr_noinc_table = config->wr_noinc_table;
801 map->rd_noinc_table = config->rd_noinc_table;
802 map->writeable_reg = config->writeable_reg;
803 map->readable_reg = config->readable_reg;
804 map->volatile_reg = config->volatile_reg;
805 map->precious_reg = config->precious_reg;
806 map->writeable_noinc_reg = config->writeable_noinc_reg;
807 map->readable_noinc_reg = config->readable_noinc_reg;
808 map->cache_type = config->cache_type;
809
810 spin_lock_init(&map->async_lock);
811 INIT_LIST_HEAD(&map->async_list);
812 INIT_LIST_HEAD(&map->async_free);
813 init_waitqueue_head(&map->async_waitq);
814
815 if (config->read_flag_mask ||
816 config->write_flag_mask ||
817 config->zero_flag_mask) {
818 map->read_flag_mask = config->read_flag_mask;
819 map->write_flag_mask = config->write_flag_mask;
820 } else if (bus) {
821 map->read_flag_mask = bus->read_flag_mask;
822 }
823
824 if (!bus) {
825 map->reg_read = config->reg_read;
826 map->reg_write = config->reg_write;
827
828 map->defer_caching = false;
829 goto skip_format_initialization;
830 } else if (!bus->read || !bus->write) {
831 map->reg_read = _regmap_bus_reg_read;
832 map->reg_write = _regmap_bus_reg_write;
833 map->reg_update_bits = bus->reg_update_bits;
834
835 map->defer_caching = false;
836 goto skip_format_initialization;
837 } else {
838 map->reg_read = _regmap_bus_read;
839 map->reg_update_bits = bus->reg_update_bits;
840 }
841
842 reg_endian = regmap_get_reg_endian(bus, config);
843 val_endian = regmap_get_val_endian(dev, bus, config);
844
845 switch (config->reg_bits + map->reg_shift) {
846 case 2:
847 switch (config->val_bits) {
848 case 6:
849 map->format.format_write = regmap_format_2_6_write;
850 break;
851 default:
852 goto err_hwlock;
853 }
854 break;
855
856 case 4:
857 switch (config->val_bits) {
858 case 12:
859 map->format.format_write = regmap_format_4_12_write;
860 break;
861 default:
862 goto err_hwlock;
863 }
864 break;
865
866 case 7:
867 switch (config->val_bits) {
868 case 9:
869 map->format.format_write = regmap_format_7_9_write;
870 break;
871 default:
872 goto err_hwlock;
873 }
874 break;
875
876 case 10:
877 switch (config->val_bits) {
878 case 14:
879 map->format.format_write = regmap_format_10_14_write;
880 break;
881 default:
882 goto err_hwlock;
883 }
884 break;
885
886 case 8:
887 map->format.format_reg = regmap_format_8;
888 break;
889
890 case 16:
891 switch (reg_endian) {
892 case REGMAP_ENDIAN_BIG:
893 map->format.format_reg = regmap_format_16_be;
894 break;
895 case REGMAP_ENDIAN_LITTLE:
896 map->format.format_reg = regmap_format_16_le;
897 break;
898 case REGMAP_ENDIAN_NATIVE:
899 map->format.format_reg = regmap_format_16_native;
900 break;
901 default:
902 goto err_hwlock;
903 }
904 break;
905
906 case 24:
907 if (reg_endian != REGMAP_ENDIAN_BIG)
908 goto err_hwlock;
909 map->format.format_reg = regmap_format_24;
910 break;
911
912 case 32:
913 switch (reg_endian) {
914 case REGMAP_ENDIAN_BIG:
915 map->format.format_reg = regmap_format_32_be;
916 break;
917 case REGMAP_ENDIAN_LITTLE:
918 map->format.format_reg = regmap_format_32_le;
919 break;
920 case REGMAP_ENDIAN_NATIVE:
921 map->format.format_reg = regmap_format_32_native;
922 break;
923 default:
924 goto err_hwlock;
925 }
926 break;
927
928#ifdef CONFIG_64BIT
929 case 64:
930 switch (reg_endian) {
931 case REGMAP_ENDIAN_BIG:
932 map->format.format_reg = regmap_format_64_be;
933 break;
934 case REGMAP_ENDIAN_LITTLE:
935 map->format.format_reg = regmap_format_64_le;
936 break;
937 case REGMAP_ENDIAN_NATIVE:
938 map->format.format_reg = regmap_format_64_native;
939 break;
940 default:
941 goto err_hwlock;
942 }
943 break;
944#endif
945
946 default:
947 goto err_hwlock;
948 }
949
950 if (val_endian == REGMAP_ENDIAN_NATIVE)
951 map->format.parse_inplace = regmap_parse_inplace_noop;
952
953 switch (config->val_bits) {
954 case 8:
955 map->format.format_val = regmap_format_8;
956 map->format.parse_val = regmap_parse_8;
957 map->format.parse_inplace = regmap_parse_inplace_noop;
958 break;
959 case 16:
960 switch (val_endian) {
961 case REGMAP_ENDIAN_BIG:
962 map->format.format_val = regmap_format_16_be;
963 map->format.parse_val = regmap_parse_16_be;
964 map->format.parse_inplace = regmap_parse_16_be_inplace;
965 break;
966 case REGMAP_ENDIAN_LITTLE:
967 map->format.format_val = regmap_format_16_le;
968 map->format.parse_val = regmap_parse_16_le;
969 map->format.parse_inplace = regmap_parse_16_le_inplace;
970 break;
971 case REGMAP_ENDIAN_NATIVE:
972 map->format.format_val = regmap_format_16_native;
973 map->format.parse_val = regmap_parse_16_native;
974 break;
975 default:
976 goto err_hwlock;
977 }
978 break;
979 case 24:
980 if (val_endian != REGMAP_ENDIAN_BIG)
981 goto err_hwlock;
982 map->format.format_val = regmap_format_24;
983 map->format.parse_val = regmap_parse_24;
984 break;
985 case 32:
986 switch (val_endian) {
987 case REGMAP_ENDIAN_BIG:
988 map->format.format_val = regmap_format_32_be;
989 map->format.parse_val = regmap_parse_32_be;
990 map->format.parse_inplace = regmap_parse_32_be_inplace;
991 break;
992 case REGMAP_ENDIAN_LITTLE:
993 map->format.format_val = regmap_format_32_le;
994 map->format.parse_val = regmap_parse_32_le;
995 map->format.parse_inplace = regmap_parse_32_le_inplace;
996 break;
997 case REGMAP_ENDIAN_NATIVE:
998 map->format.format_val = regmap_format_32_native;
999 map->format.parse_val = regmap_parse_32_native;
1000 break;
1001 default:
1002 goto err_hwlock;
1003 }
1004 break;
1005#ifdef CONFIG_64BIT
1006 case 64:
1007 switch (val_endian) {
1008 case REGMAP_ENDIAN_BIG:
1009 map->format.format_val = regmap_format_64_be;
1010 map->format.parse_val = regmap_parse_64_be;
1011 map->format.parse_inplace = regmap_parse_64_be_inplace;
1012 break;
1013 case REGMAP_ENDIAN_LITTLE:
1014 map->format.format_val = regmap_format_64_le;
1015 map->format.parse_val = regmap_parse_64_le;
1016 map->format.parse_inplace = regmap_parse_64_le_inplace;
1017 break;
1018 case REGMAP_ENDIAN_NATIVE:
1019 map->format.format_val = regmap_format_64_native;
1020 map->format.parse_val = regmap_parse_64_native;
1021 break;
1022 default:
1023 goto err_hwlock;
1024 }
1025 break;
1026#endif
1027 }
1028
1029 if (map->format.format_write) {
1030 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1031 (val_endian != REGMAP_ENDIAN_BIG))
1032 goto err_hwlock;
1033 map->use_single_write = true;
1034 }
1035
1036 if (!map->format.format_write &&
1037 !(map->format.format_reg && map->format.format_val))
1038 goto err_hwlock;
1039
1040 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1041 if (map->work_buf == NULL) {
1042 ret = -ENOMEM;
1043 goto err_hwlock;
1044 }
1045
1046 if (map->format.format_write) {
1047 map->defer_caching = false;
1048 map->reg_write = _regmap_bus_formatted_write;
1049 } else if (map->format.format_val) {
1050 map->defer_caching = true;
1051 map->reg_write = _regmap_bus_raw_write;
1052 }
1053
1054skip_format_initialization:
1055
1056 map->range_tree = RB_ROOT;
1057 for (i = 0; i < config->num_ranges; i++) {
1058 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1059 struct regmap_range_node *new;
1060
1061 /* Sanity check */
1062 if (range_cfg->range_max < range_cfg->range_min) {
1063 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1064 range_cfg->range_max, range_cfg->range_min);
1065 goto err_range;
1066 }
1067
1068 if (range_cfg->range_max > map->max_register) {
1069 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1070 range_cfg->range_max, map->max_register);
1071 goto err_range;
1072 }
1073
1074 if (range_cfg->selector_reg > map->max_register) {
1075 dev_err(map->dev,
1076 "Invalid range %d: selector out of map\n", i);
1077 goto err_range;
1078 }
1079
1080 if (range_cfg->window_len == 0) {
1081 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1082 i);
1083 goto err_range;
1084 }
1085
1086 /* Make sure, that this register range has no selector
1087 or data window within its boundary */
1088 for (j = 0; j < config->num_ranges; j++) {
1089 unsigned sel_reg = config->ranges[j].selector_reg;
1090 unsigned win_min = config->ranges[j].window_start;
1091 unsigned win_max = win_min +
1092 config->ranges[j].window_len - 1;
1093
1094 /* Allow data window inside its own virtual range */
1095 if (j == i)
1096 continue;
1097
1098 if (range_cfg->range_min <= sel_reg &&
1099 sel_reg <= range_cfg->range_max) {
1100 dev_err(map->dev,
1101 "Range %d: selector for %d in window\n",
1102 i, j);
1103 goto err_range;
1104 }
1105
1106 if (!(win_max < range_cfg->range_min ||
1107 win_min > range_cfg->range_max)) {
1108 dev_err(map->dev,
1109 "Range %d: window for %d in window\n",
1110 i, j);
1111 goto err_range;
1112 }
1113 }
1114
1115 new = kzalloc(sizeof(*new), GFP_KERNEL);
1116 if (new == NULL) {
1117 ret = -ENOMEM;
1118 goto err_range;
1119 }
1120
1121 new->map = map;
1122 new->name = range_cfg->name;
1123 new->range_min = range_cfg->range_min;
1124 new->range_max = range_cfg->range_max;
1125 new->selector_reg = range_cfg->selector_reg;
1126 new->selector_mask = range_cfg->selector_mask;
1127 new->selector_shift = range_cfg->selector_shift;
1128 new->window_start = range_cfg->window_start;
1129 new->window_len = range_cfg->window_len;
1130
1131 if (!_regmap_range_add(map, new)) {
1132 dev_err(map->dev, "Failed to add range %d\n", i);
1133 kfree(new);
1134 goto err_range;
1135 }
1136
1137 if (map->selector_work_buf == NULL) {
1138 map->selector_work_buf =
1139 kzalloc(map->format.buf_size, GFP_KERNEL);
1140 if (map->selector_work_buf == NULL) {
1141 ret = -ENOMEM;
1142 goto err_range;
1143 }
1144 }
1145 }
1146
1147 ret = regcache_init(map, config);
1148 if (ret != 0)
1149 goto err_range;
1150
1151 if (dev) {
1152 ret = regmap_attach_dev(dev, map, config);
1153 if (ret != 0)
1154 goto err_regcache;
1155 } else {
1156 regmap_debugfs_init(map);
1157 }
1158
1159 return map;
1160
1161err_regcache:
1162 regcache_exit(map);
1163err_range:
1164 regmap_range_exit(map);
1165 kfree(map->work_buf);
1166err_hwlock:
1167 if (map->hwlock)
1168 hwspin_lock_free(map->hwlock);
1169err_name:
1170 kfree_const(map->name);
1171err_map:
1172 kfree(map);
1173err:
1174 return ERR_PTR(ret);
1175}
1176EXPORT_SYMBOL_GPL(__regmap_init);
1177
1178static void devm_regmap_release(struct device *dev, void *res)
1179{
1180 regmap_exit(*(struct regmap **)res);
1181}
1182
1183struct regmap *__devm_regmap_init(struct device *dev,
1184 const struct regmap_bus *bus,
1185 void *bus_context,
1186 const struct regmap_config *config,
1187 struct lock_class_key *lock_key,
1188 const char *lock_name)
1189{
1190 struct regmap **ptr, *regmap;
1191
1192 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1193 if (!ptr)
1194 return ERR_PTR(-ENOMEM);
1195
1196 regmap = __regmap_init(dev, bus, bus_context, config,
1197 lock_key, lock_name);
1198 if (!IS_ERR(regmap)) {
1199 *ptr = regmap;
1200 devres_add(dev, ptr);
1201 } else {
1202 devres_free(ptr);
1203 }
1204
1205 return regmap;
1206}
1207EXPORT_SYMBOL_GPL(__devm_regmap_init);
1208
1209static void regmap_field_init(struct regmap_field *rm_field,
1210 struct regmap *regmap, struct reg_field reg_field)
1211{
1212 rm_field->regmap = regmap;
1213 rm_field->reg = reg_field.reg;
1214 rm_field->shift = reg_field.lsb;
1215 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1216 rm_field->id_size = reg_field.id_size;
1217 rm_field->id_offset = reg_field.id_offset;
1218}
1219
1220/**
1221 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1222 *
1223 * @dev: Device that will be interacted with
1224 * @regmap: regmap bank in which this register field is located.
1225 * @reg_field: Register field with in the bank.
1226 *
1227 * The return value will be an ERR_PTR() on error or a valid pointer
1228 * to a struct regmap_field. The regmap_field will be automatically freed
1229 * by the device management code.
1230 */
1231struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1232 struct regmap *regmap, struct reg_field reg_field)
1233{
1234 struct regmap_field *rm_field = devm_kzalloc(dev,
1235 sizeof(*rm_field), GFP_KERNEL);
1236 if (!rm_field)
1237 return ERR_PTR(-ENOMEM);
1238
1239 regmap_field_init(rm_field, regmap, reg_field);
1240
1241 return rm_field;
1242
1243}
1244EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1245
1246/**
1247 * devm_regmap_field_free() - Free a register field allocated using
1248 * devm_regmap_field_alloc.
1249 *
1250 * @dev: Device that will be interacted with
1251 * @field: regmap field which should be freed.
1252 *
1253 * Free register field allocated using devm_regmap_field_alloc(). Usually
1254 * drivers need not call this function, as the memory allocated via devm
1255 * will be freed as per device-driver life-cyle.
1256 */
1257void devm_regmap_field_free(struct device *dev,
1258 struct regmap_field *field)
1259{
1260 devm_kfree(dev, field);
1261}
1262EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1263
1264/**
1265 * regmap_field_alloc() - Allocate and initialise a register field.
1266 *
1267 * @regmap: regmap bank in which this register field is located.
1268 * @reg_field: Register field with in the bank.
1269 *
1270 * The return value will be an ERR_PTR() on error or a valid pointer
1271 * to a struct regmap_field. The regmap_field should be freed by the
1272 * user once its finished working with it using regmap_field_free().
1273 */
1274struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1275 struct reg_field reg_field)
1276{
1277 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1278
1279 if (!rm_field)
1280 return ERR_PTR(-ENOMEM);
1281
1282 regmap_field_init(rm_field, regmap, reg_field);
1283
1284 return rm_field;
1285}
1286EXPORT_SYMBOL_GPL(regmap_field_alloc);
1287
1288/**
1289 * regmap_field_free() - Free register field allocated using
1290 * regmap_field_alloc.
1291 *
1292 * @field: regmap field which should be freed.
1293 */
1294void regmap_field_free(struct regmap_field *field)
1295{
1296 kfree(field);
1297}
1298EXPORT_SYMBOL_GPL(regmap_field_free);
1299
1300/**
1301 * regmap_reinit_cache() - Reinitialise the current register cache
1302 *
1303 * @map: Register map to operate on.
1304 * @config: New configuration. Only the cache data will be used.
1305 *
1306 * Discard any existing register cache for the map and initialize a
1307 * new cache. This can be used to restore the cache to defaults or to
1308 * update the cache configuration to reflect runtime discovery of the
1309 * hardware.
1310 *
1311 * No explicit locking is done here, the user needs to ensure that
1312 * this function will not race with other calls to regmap.
1313 */
1314int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1315{
1316 int ret;
1317
1318 regcache_exit(map);
1319 regmap_debugfs_exit(map);
1320
1321 map->max_register = config->max_register;
1322 map->writeable_reg = config->writeable_reg;
1323 map->readable_reg = config->readable_reg;
1324 map->volatile_reg = config->volatile_reg;
1325 map->precious_reg = config->precious_reg;
1326 map->writeable_noinc_reg = config->writeable_noinc_reg;
1327 map->readable_noinc_reg = config->readable_noinc_reg;
1328 map->cache_type = config->cache_type;
1329
1330 ret = regmap_set_name(map, config);
1331 if (ret)
1332 return ret;
1333
1334 regmap_debugfs_init(map);
1335
1336 map->cache_bypass = false;
1337 map->cache_only = false;
1338
1339 return regcache_init(map, config);
1340}
1341EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1342
1343/**
1344 * regmap_exit() - Free a previously allocated register map
1345 *
1346 * @map: Register map to operate on.
1347 */
1348void regmap_exit(struct regmap *map)
1349{
1350 struct regmap_async *async;
1351
1352 regcache_exit(map);
1353 regmap_debugfs_exit(map);
1354 regmap_range_exit(map);
1355 if (map->bus && map->bus->free_context)
1356 map->bus->free_context(map->bus_context);
1357 kfree(map->work_buf);
1358 while (!list_empty(&map->async_free)) {
1359 async = list_first_entry_or_null(&map->async_free,
1360 struct regmap_async,
1361 list);
1362 list_del(&async->list);
1363 kfree(async->work_buf);
1364 kfree(async);
1365 }
1366 if (map->hwlock)
1367 hwspin_lock_free(map->hwlock);
1368 kfree_const(map->name);
1369 kfree(map->patch);
1370 kfree(map);
1371}
1372EXPORT_SYMBOL_GPL(regmap_exit);
1373
1374static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1375{
1376 struct regmap **r = res;
1377 if (!r || !*r) {
1378 WARN_ON(!r || !*r);
1379 return 0;
1380 }
1381
1382 /* If the user didn't specify a name match any */
1383 if (data)
1384 return !strcmp((*r)->name, data);
1385 else
1386 return 1;
1387}
1388
1389/**
1390 * dev_get_regmap() - Obtain the regmap (if any) for a device
1391 *
1392 * @dev: Device to retrieve the map for
1393 * @name: Optional name for the register map, usually NULL.
1394 *
1395 * Returns the regmap for the device if one is present, or NULL. If
1396 * name is specified then it must match the name specified when
1397 * registering the device, if it is NULL then the first regmap found
1398 * will be used. Devices with multiple register maps are very rare,
1399 * generic code should normally not need to specify a name.
1400 */
1401struct regmap *dev_get_regmap(struct device *dev, const char *name)
1402{
1403 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1404 dev_get_regmap_match, (void *)name);
1405
1406 if (!r)
1407 return NULL;
1408 return *r;
1409}
1410EXPORT_SYMBOL_GPL(dev_get_regmap);
1411
1412/**
1413 * regmap_get_device() - Obtain the device from a regmap
1414 *
1415 * @map: Register map to operate on.
1416 *
1417 * Returns the underlying device that the regmap has been created for.
1418 */
1419struct device *regmap_get_device(struct regmap *map)
1420{
1421 return map->dev;
1422}
1423EXPORT_SYMBOL_GPL(regmap_get_device);
1424
1425static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1426 struct regmap_range_node *range,
1427 unsigned int val_num)
1428{
1429 void *orig_work_buf;
1430 unsigned int win_offset;
1431 unsigned int win_page;
1432 bool page_chg;
1433 int ret;
1434
1435 win_offset = (*reg - range->range_min) % range->window_len;
1436 win_page = (*reg - range->range_min) / range->window_len;
1437
1438 if (val_num > 1) {
1439 /* Bulk write shouldn't cross range boundary */
1440 if (*reg + val_num - 1 > range->range_max)
1441 return -EINVAL;
1442
1443 /* ... or single page boundary */
1444 if (val_num > range->window_len - win_offset)
1445 return -EINVAL;
1446 }
1447
1448 /* It is possible to have selector register inside data window.
1449 In that case, selector register is located on every page and
1450 it needs no page switching, when accessed alone. */
1451 if (val_num > 1 ||
1452 range->window_start + win_offset != range->selector_reg) {
1453 /* Use separate work_buf during page switching */
1454 orig_work_buf = map->work_buf;
1455 map->work_buf = map->selector_work_buf;
1456
1457 ret = _regmap_update_bits(map, range->selector_reg,
1458 range->selector_mask,
1459 win_page << range->selector_shift,
1460 &page_chg, false);
1461
1462 map->work_buf = orig_work_buf;
1463
1464 if (ret != 0)
1465 return ret;
1466 }
1467
1468 *reg = range->window_start + win_offset;
1469
1470 return 0;
1471}
1472
1473static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1474 unsigned long mask)
1475{
1476 u8 *buf;
1477 int i;
1478
1479 if (!mask || !map->work_buf)
1480 return;
1481
1482 buf = map->work_buf;
1483
1484 for (i = 0; i < max_bytes; i++)
1485 buf[i] |= (mask >> (8 * i)) & 0xff;
1486}
1487
1488static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1489 const void *val, size_t val_len, bool noinc)
1490{
1491 struct regmap_range_node *range;
1492 unsigned long flags;
1493 void *work_val = map->work_buf + map->format.reg_bytes +
1494 map->format.pad_bytes;
1495 void *buf;
1496 int ret = -ENOTSUPP;
1497 size_t len;
1498 int i;
1499
1500 WARN_ON(!map->bus);
1501
1502 /* Check for unwritable or noinc registers in range
1503 * before we start
1504 */
1505 if (!regmap_writeable_noinc(map, reg)) {
1506 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1507 unsigned int element =
1508 reg + regmap_get_offset(map, i);
1509 if (!regmap_writeable(map, element) ||
1510 regmap_writeable_noinc(map, element))
1511 return -EINVAL;
1512 }
1513 }
1514
1515 if (!map->cache_bypass && map->format.parse_val) {
1516 unsigned int ival;
1517 int val_bytes = map->format.val_bytes;
1518 for (i = 0; i < val_len / val_bytes; i++) {
1519 ival = map->format.parse_val(val + (i * val_bytes));
1520 ret = regcache_write(map,
1521 reg + regmap_get_offset(map, i),
1522 ival);
1523 if (ret) {
1524 dev_err(map->dev,
1525 "Error in caching of register: %x ret: %d\n",
1526 reg + i, ret);
1527 return ret;
1528 }
1529 }
1530 if (map->cache_only) {
1531 map->cache_dirty = true;
1532 return 0;
1533 }
1534 }
1535
1536 range = _regmap_range_lookup(map, reg);
1537 if (range) {
1538 int val_num = val_len / map->format.val_bytes;
1539 int win_offset = (reg - range->range_min) % range->window_len;
1540 int win_residue = range->window_len - win_offset;
1541
1542 /* If the write goes beyond the end of the window split it */
1543 while (val_num > win_residue) {
1544 dev_dbg(map->dev, "Writing window %d/%zu\n",
1545 win_residue, val_len / map->format.val_bytes);
1546 ret = _regmap_raw_write_impl(map, reg, val,
1547 win_residue *
1548 map->format.val_bytes, noinc);
1549 if (ret != 0)
1550 return ret;
1551
1552 reg += win_residue;
1553 val_num -= win_residue;
1554 val += win_residue * map->format.val_bytes;
1555 val_len -= win_residue * map->format.val_bytes;
1556
1557 win_offset = (reg - range->range_min) %
1558 range->window_len;
1559 win_residue = range->window_len - win_offset;
1560 }
1561
1562 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1563 if (ret != 0)
1564 return ret;
1565 }
1566
1567 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1568 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1569 map->write_flag_mask);
1570
1571 /*
1572 * Essentially all I/O mechanisms will be faster with a single
1573 * buffer to write. Since register syncs often generate raw
1574 * writes of single registers optimise that case.
1575 */
1576 if (val != work_val && val_len == map->format.val_bytes) {
1577 memcpy(work_val, val, map->format.val_bytes);
1578 val = work_val;
1579 }
1580
1581 if (map->async && map->bus->async_write) {
1582 struct regmap_async *async;
1583
1584 trace_regmap_async_write_start(map, reg, val_len);
1585
1586 spin_lock_irqsave(&map->async_lock, flags);
1587 async = list_first_entry_or_null(&map->async_free,
1588 struct regmap_async,
1589 list);
1590 if (async)
1591 list_del(&async->list);
1592 spin_unlock_irqrestore(&map->async_lock, flags);
1593
1594 if (!async) {
1595 async = map->bus->async_alloc();
1596 if (!async)
1597 return -ENOMEM;
1598
1599 async->work_buf = kzalloc(map->format.buf_size,
1600 GFP_KERNEL | GFP_DMA);
1601 if (!async->work_buf) {
1602 kfree(async);
1603 return -ENOMEM;
1604 }
1605 }
1606
1607 async->map = map;
1608
1609 /* If the caller supplied the value we can use it safely. */
1610 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1611 map->format.reg_bytes + map->format.val_bytes);
1612
1613 spin_lock_irqsave(&map->async_lock, flags);
1614 list_add_tail(&async->list, &map->async_list);
1615 spin_unlock_irqrestore(&map->async_lock, flags);
1616
1617 if (val != work_val)
1618 ret = map->bus->async_write(map->bus_context,
1619 async->work_buf,
1620 map->format.reg_bytes +
1621 map->format.pad_bytes,
1622 val, val_len, async);
1623 else
1624 ret = map->bus->async_write(map->bus_context,
1625 async->work_buf,
1626 map->format.reg_bytes +
1627 map->format.pad_bytes +
1628 val_len, NULL, 0, async);
1629
1630 if (ret != 0) {
1631 dev_err(map->dev, "Failed to schedule write: %d\n",
1632 ret);
1633
1634 spin_lock_irqsave(&map->async_lock, flags);
1635 list_move(&async->list, &map->async_free);
1636 spin_unlock_irqrestore(&map->async_lock, flags);
1637 }
1638
1639 return ret;
1640 }
1641
1642 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1643
1644 /* If we're doing a single register write we can probably just
1645 * send the work_buf directly, otherwise try to do a gather
1646 * write.
1647 */
1648 if (val == work_val)
1649 ret = map->bus->write(map->bus_context, map->work_buf,
1650 map->format.reg_bytes +
1651 map->format.pad_bytes +
1652 val_len);
1653 else if (map->bus->gather_write)
1654 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1655 map->format.reg_bytes +
1656 map->format.pad_bytes,
1657 val, val_len);
1658 else
1659 ret = -ENOTSUPP;
1660
1661 /* If that didn't work fall back on linearising by hand. */
1662 if (ret == -ENOTSUPP) {
1663 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1664 buf = kzalloc(len, GFP_KERNEL);
1665 if (!buf)
1666 return -ENOMEM;
1667
1668 memcpy(buf, map->work_buf, map->format.reg_bytes);
1669 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1670 val, val_len);
1671 ret = map->bus->write(map->bus_context, buf, len);
1672
1673 kfree(buf);
1674 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1675 /* regcache_drop_region() takes lock that we already have,
1676 * thus call map->cache_ops->drop() directly
1677 */
1678 if (map->cache_ops && map->cache_ops->drop)
1679 map->cache_ops->drop(map, reg, reg + 1);
1680 }
1681
1682 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1683
1684 return ret;
1685}
1686
1687/**
1688 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1689 *
1690 * @map: Map to check.
1691 */
1692bool regmap_can_raw_write(struct regmap *map)
1693{
1694 return map->bus && map->bus->write && map->format.format_val &&
1695 map->format.format_reg;
1696}
1697EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1698
1699/**
1700 * regmap_get_raw_read_max - Get the maximum size we can read
1701 *
1702 * @map: Map to check.
1703 */
1704size_t regmap_get_raw_read_max(struct regmap *map)
1705{
1706 return map->max_raw_read;
1707}
1708EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1709
1710/**
1711 * regmap_get_raw_write_max - Get the maximum size we can read
1712 *
1713 * @map: Map to check.
1714 */
1715size_t regmap_get_raw_write_max(struct regmap *map)
1716{
1717 return map->max_raw_write;
1718}
1719EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1720
1721static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1722 unsigned int val)
1723{
1724 int ret;
1725 struct regmap_range_node *range;
1726 struct regmap *map = context;
1727
1728 WARN_ON(!map->bus || !map->format.format_write);
1729
1730 range = _regmap_range_lookup(map, reg);
1731 if (range) {
1732 ret = _regmap_select_page(map, ®, range, 1);
1733 if (ret != 0)
1734 return ret;
1735 }
1736
1737 map->format.format_write(map, reg, val);
1738
1739 trace_regmap_hw_write_start(map, reg, 1);
1740
1741 ret = map->bus->write(map->bus_context, map->work_buf,
1742 map->format.buf_size);
1743
1744 trace_regmap_hw_write_done(map, reg, 1);
1745
1746 return ret;
1747}
1748
1749static int _regmap_bus_reg_write(void *context, unsigned int reg,
1750 unsigned int val)
1751{
1752 struct regmap *map = context;
1753
1754 return map->bus->reg_write(map->bus_context, reg, val);
1755}
1756
1757static int _regmap_bus_raw_write(void *context, unsigned int reg,
1758 unsigned int val)
1759{
1760 struct regmap *map = context;
1761
1762 WARN_ON(!map->bus || !map->format.format_val);
1763
1764 map->format.format_val(map->work_buf + map->format.reg_bytes
1765 + map->format.pad_bytes, val, 0);
1766 return _regmap_raw_write_impl(map, reg,
1767 map->work_buf +
1768 map->format.reg_bytes +
1769 map->format.pad_bytes,
1770 map->format.val_bytes,
1771 false);
1772}
1773
1774static inline void *_regmap_map_get_context(struct regmap *map)
1775{
1776 return (map->bus) ? map : map->bus_context;
1777}
1778
1779int _regmap_write(struct regmap *map, unsigned int reg,
1780 unsigned int val)
1781{
1782 int ret;
1783 void *context = _regmap_map_get_context(map);
1784
1785 if (!regmap_writeable(map, reg))
1786 return -EIO;
1787
1788 if (!map->cache_bypass && !map->defer_caching) {
1789 ret = regcache_write(map, reg, val);
1790 if (ret != 0)
1791 return ret;
1792 if (map->cache_only) {
1793 map->cache_dirty = true;
1794 return 0;
1795 }
1796 }
1797
1798 if (regmap_should_log(map))
1799 dev_info(map->dev, "%x <= %x\n", reg, val);
1800
1801 trace_regmap_reg_write(map, reg, val);
1802
1803 return map->reg_write(context, reg, val);
1804}
1805
1806/**
1807 * regmap_write() - Write a value to a single register
1808 *
1809 * @map: Register map to write to
1810 * @reg: Register to write to
1811 * @val: Value to be written
1812 *
1813 * A value of zero will be returned on success, a negative errno will
1814 * be returned in error cases.
1815 */
1816int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1817{
1818 int ret;
1819
1820 if (!IS_ALIGNED(reg, map->reg_stride))
1821 return -EINVAL;
1822
1823 map->lock(map->lock_arg);
1824
1825 ret = _regmap_write(map, reg, val);
1826
1827 map->unlock(map->lock_arg);
1828
1829 return ret;
1830}
1831EXPORT_SYMBOL_GPL(regmap_write);
1832
1833/**
1834 * regmap_write_async() - Write a value to a single register asynchronously
1835 *
1836 * @map: Register map to write to
1837 * @reg: Register to write to
1838 * @val: Value to be written
1839 *
1840 * A value of zero will be returned on success, a negative errno will
1841 * be returned in error cases.
1842 */
1843int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1844{
1845 int ret;
1846
1847 if (!IS_ALIGNED(reg, map->reg_stride))
1848 return -EINVAL;
1849
1850 map->lock(map->lock_arg);
1851
1852 map->async = true;
1853
1854 ret = _regmap_write(map, reg, val);
1855
1856 map->async = false;
1857
1858 map->unlock(map->lock_arg);
1859
1860 return ret;
1861}
1862EXPORT_SYMBOL_GPL(regmap_write_async);
1863
1864int _regmap_raw_write(struct regmap *map, unsigned int reg,
1865 const void *val, size_t val_len, bool noinc)
1866{
1867 size_t val_bytes = map->format.val_bytes;
1868 size_t val_count = val_len / val_bytes;
1869 size_t chunk_count, chunk_bytes;
1870 size_t chunk_regs = val_count;
1871 int ret, i;
1872
1873 if (!val_count)
1874 return -EINVAL;
1875
1876 if (map->use_single_write)
1877 chunk_regs = 1;
1878 else if (map->max_raw_write && val_len > map->max_raw_write)
1879 chunk_regs = map->max_raw_write / val_bytes;
1880
1881 chunk_count = val_count / chunk_regs;
1882 chunk_bytes = chunk_regs * val_bytes;
1883
1884 /* Write as many bytes as possible with chunk_size */
1885 for (i = 0; i < chunk_count; i++) {
1886 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
1887 if (ret)
1888 return ret;
1889
1890 reg += regmap_get_offset(map, chunk_regs);
1891 val += chunk_bytes;
1892 val_len -= chunk_bytes;
1893 }
1894
1895 /* Write remaining bytes */
1896 if (val_len)
1897 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
1898
1899 return ret;
1900}
1901
1902/**
1903 * regmap_raw_write() - Write raw values to one or more registers
1904 *
1905 * @map: Register map to write to
1906 * @reg: Initial register to write to
1907 * @val: Block of data to be written, laid out for direct transmission to the
1908 * device
1909 * @val_len: Length of data pointed to by val.
1910 *
1911 * This function is intended to be used for things like firmware
1912 * download where a large block of data needs to be transferred to the
1913 * device. No formatting will be done on the data provided.
1914 *
1915 * A value of zero will be returned on success, a negative errno will
1916 * be returned in error cases.
1917 */
1918int regmap_raw_write(struct regmap *map, unsigned int reg,
1919 const void *val, size_t val_len)
1920{
1921 int ret;
1922
1923 if (!regmap_can_raw_write(map))
1924 return -EINVAL;
1925 if (val_len % map->format.val_bytes)
1926 return -EINVAL;
1927
1928 map->lock(map->lock_arg);
1929
1930 ret = _regmap_raw_write(map, reg, val, val_len, false);
1931
1932 map->unlock(map->lock_arg);
1933
1934 return ret;
1935}
1936EXPORT_SYMBOL_GPL(regmap_raw_write);
1937
1938/**
1939 * regmap_noinc_write(): Write data from a register without incrementing the
1940 * register number
1941 *
1942 * @map: Register map to write to
1943 * @reg: Register to write to
1944 * @val: Pointer to data buffer
1945 * @val_len: Length of output buffer in bytes.
1946 *
1947 * The regmap API usually assumes that bulk bus write operations will write a
1948 * range of registers. Some devices have certain registers for which a write
1949 * operation can write to an internal FIFO.
1950 *
1951 * The target register must be volatile but registers after it can be
1952 * completely unrelated cacheable registers.
1953 *
1954 * This will attempt multiple writes as required to write val_len bytes.
1955 *
1956 * A value of zero will be returned on success, a negative errno will be
1957 * returned in error cases.
1958 */
1959int regmap_noinc_write(struct regmap *map, unsigned int reg,
1960 const void *val, size_t val_len)
1961{
1962 size_t write_len;
1963 int ret;
1964
1965 if (!map->bus)
1966 return -EINVAL;
1967 if (!map->bus->write)
1968 return -ENOTSUPP;
1969 if (val_len % map->format.val_bytes)
1970 return -EINVAL;
1971 if (!IS_ALIGNED(reg, map->reg_stride))
1972 return -EINVAL;
1973 if (val_len == 0)
1974 return -EINVAL;
1975
1976 map->lock(map->lock_arg);
1977
1978 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
1979 ret = -EINVAL;
1980 goto out_unlock;
1981 }
1982
1983 while (val_len) {
1984 if (map->max_raw_write && map->max_raw_write < val_len)
1985 write_len = map->max_raw_write;
1986 else
1987 write_len = val_len;
1988 ret = _regmap_raw_write(map, reg, val, write_len, true);
1989 if (ret)
1990 goto out_unlock;
1991 val = ((u8 *)val) + write_len;
1992 val_len -= write_len;
1993 }
1994
1995out_unlock:
1996 map->unlock(map->lock_arg);
1997 return ret;
1998}
1999EXPORT_SYMBOL_GPL(regmap_noinc_write);
2000
2001/**
2002 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2003 * register field.
2004 *
2005 * @field: Register field to write to
2006 * @mask: Bitmask to change
2007 * @val: Value to be written
2008 * @change: Boolean indicating if a write was done
2009 * @async: Boolean indicating asynchronously
2010 * @force: Boolean indicating use force update
2011 *
2012 * Perform a read/modify/write cycle on the register field with change,
2013 * async, force option.
2014 *
2015 * A value of zero will be returned on success, a negative errno will
2016 * be returned in error cases.
2017 */
2018int regmap_field_update_bits_base(struct regmap_field *field,
2019 unsigned int mask, unsigned int val,
2020 bool *change, bool async, bool force)
2021{
2022 mask = (mask << field->shift) & field->mask;
2023
2024 return regmap_update_bits_base(field->regmap, field->reg,
2025 mask, val << field->shift,
2026 change, async, force);
2027}
2028EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2029
2030/**
2031 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2032 * register field with port ID
2033 *
2034 * @field: Register field to write to
2035 * @id: port ID
2036 * @mask: Bitmask to change
2037 * @val: Value to be written
2038 * @change: Boolean indicating if a write was done
2039 * @async: Boolean indicating asynchronously
2040 * @force: Boolean indicating use force update
2041 *
2042 * A value of zero will be returned on success, a negative errno will
2043 * be returned in error cases.
2044 */
2045int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2046 unsigned int mask, unsigned int val,
2047 bool *change, bool async, bool force)
2048{
2049 if (id >= field->id_size)
2050 return -EINVAL;
2051
2052 mask = (mask << field->shift) & field->mask;
2053
2054 return regmap_update_bits_base(field->regmap,
2055 field->reg + (field->id_offset * id),
2056 mask, val << field->shift,
2057 change, async, force);
2058}
2059EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2060
2061/**
2062 * regmap_bulk_write() - Write multiple registers to the device
2063 *
2064 * @map: Register map to write to
2065 * @reg: First register to be write from
2066 * @val: Block of data to be written, in native register size for device
2067 * @val_count: Number of registers to write
2068 *
2069 * This function is intended to be used for writing a large block of
2070 * data to the device either in single transfer or multiple transfer.
2071 *
2072 * A value of zero will be returned on success, a negative errno will
2073 * be returned in error cases.
2074 */
2075int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2076 size_t val_count)
2077{
2078 int ret = 0, i;
2079 size_t val_bytes = map->format.val_bytes;
2080
2081 if (!IS_ALIGNED(reg, map->reg_stride))
2082 return -EINVAL;
2083
2084 /*
2085 * Some devices don't support bulk write, for them we have a series of
2086 * single write operations.
2087 */
2088 if (!map->bus || !map->format.parse_inplace) {
2089 map->lock(map->lock_arg);
2090 for (i = 0; i < val_count; i++) {
2091 unsigned int ival;
2092
2093 switch (val_bytes) {
2094 case 1:
2095 ival = *(u8 *)(val + (i * val_bytes));
2096 break;
2097 case 2:
2098 ival = *(u16 *)(val + (i * val_bytes));
2099 break;
2100 case 4:
2101 ival = *(u32 *)(val + (i * val_bytes));
2102 break;
2103#ifdef CONFIG_64BIT
2104 case 8:
2105 ival = *(u64 *)(val + (i * val_bytes));
2106 break;
2107#endif
2108 default:
2109 ret = -EINVAL;
2110 goto out;
2111 }
2112
2113 ret = _regmap_write(map,
2114 reg + regmap_get_offset(map, i),
2115 ival);
2116 if (ret != 0)
2117 goto out;
2118 }
2119out:
2120 map->unlock(map->lock_arg);
2121 } else {
2122 void *wval;
2123
2124 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2125 if (!wval)
2126 return -ENOMEM;
2127
2128 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2129 map->format.parse_inplace(wval + i);
2130
2131 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2132
2133 kfree(wval);
2134 }
2135 return ret;
2136}
2137EXPORT_SYMBOL_GPL(regmap_bulk_write);
2138
2139/*
2140 * _regmap_raw_multi_reg_write()
2141 *
2142 * the (register,newvalue) pairs in regs have not been formatted, but
2143 * they are all in the same page and have been changed to being page
2144 * relative. The page register has been written if that was necessary.
2145 */
2146static int _regmap_raw_multi_reg_write(struct regmap *map,
2147 const struct reg_sequence *regs,
2148 size_t num_regs)
2149{
2150 int ret;
2151 void *buf;
2152 int i;
2153 u8 *u8;
2154 size_t val_bytes = map->format.val_bytes;
2155 size_t reg_bytes = map->format.reg_bytes;
2156 size_t pad_bytes = map->format.pad_bytes;
2157 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2158 size_t len = pair_size * num_regs;
2159
2160 if (!len)
2161 return -EINVAL;
2162
2163 buf = kzalloc(len, GFP_KERNEL);
2164 if (!buf)
2165 return -ENOMEM;
2166
2167 /* We have to linearise by hand. */
2168
2169 u8 = buf;
2170
2171 for (i = 0; i < num_regs; i++) {
2172 unsigned int reg = regs[i].reg;
2173 unsigned int val = regs[i].def;
2174 trace_regmap_hw_write_start(map, reg, 1);
2175 map->format.format_reg(u8, reg, map->reg_shift);
2176 u8 += reg_bytes + pad_bytes;
2177 map->format.format_val(u8, val, 0);
2178 u8 += val_bytes;
2179 }
2180 u8 = buf;
2181 *u8 |= map->write_flag_mask;
2182
2183 ret = map->bus->write(map->bus_context, buf, len);
2184
2185 kfree(buf);
2186
2187 for (i = 0; i < num_regs; i++) {
2188 int reg = regs[i].reg;
2189 trace_regmap_hw_write_done(map, reg, 1);
2190 }
2191 return ret;
2192}
2193
2194static unsigned int _regmap_register_page(struct regmap *map,
2195 unsigned int reg,
2196 struct regmap_range_node *range)
2197{
2198 unsigned int win_page = (reg - range->range_min) / range->window_len;
2199
2200 return win_page;
2201}
2202
2203static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2204 struct reg_sequence *regs,
2205 size_t num_regs)
2206{
2207 int ret;
2208 int i, n;
2209 struct reg_sequence *base;
2210 unsigned int this_page = 0;
2211 unsigned int page_change = 0;
2212 /*
2213 * the set of registers are not neccessarily in order, but
2214 * since the order of write must be preserved this algorithm
2215 * chops the set each time the page changes. This also applies
2216 * if there is a delay required at any point in the sequence.
2217 */
2218 base = regs;
2219 for (i = 0, n = 0; i < num_regs; i++, n++) {
2220 unsigned int reg = regs[i].reg;
2221 struct regmap_range_node *range;
2222
2223 range = _regmap_range_lookup(map, reg);
2224 if (range) {
2225 unsigned int win_page = _regmap_register_page(map, reg,
2226 range);
2227
2228 if (i == 0)
2229 this_page = win_page;
2230 if (win_page != this_page) {
2231 this_page = win_page;
2232 page_change = 1;
2233 }
2234 }
2235
2236 /* If we have both a page change and a delay make sure to
2237 * write the regs and apply the delay before we change the
2238 * page.
2239 */
2240
2241 if (page_change || regs[i].delay_us) {
2242
2243 /* For situations where the first write requires
2244 * a delay we need to make sure we don't call
2245 * raw_multi_reg_write with n=0
2246 * This can't occur with page breaks as we
2247 * never write on the first iteration
2248 */
2249 if (regs[i].delay_us && i == 0)
2250 n = 1;
2251
2252 ret = _regmap_raw_multi_reg_write(map, base, n);
2253 if (ret != 0)
2254 return ret;
2255
2256 if (regs[i].delay_us)
2257 udelay(regs[i].delay_us);
2258
2259 base += n;
2260 n = 0;
2261
2262 if (page_change) {
2263 ret = _regmap_select_page(map,
2264 &base[n].reg,
2265 range, 1);
2266 if (ret != 0)
2267 return ret;
2268
2269 page_change = 0;
2270 }
2271
2272 }
2273
2274 }
2275 if (n > 0)
2276 return _regmap_raw_multi_reg_write(map, base, n);
2277 return 0;
2278}
2279
2280static int _regmap_multi_reg_write(struct regmap *map,
2281 const struct reg_sequence *regs,
2282 size_t num_regs)
2283{
2284 int i;
2285 int ret;
2286
2287 if (!map->can_multi_write) {
2288 for (i = 0; i < num_regs; i++) {
2289 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2290 if (ret != 0)
2291 return ret;
2292
2293 if (regs[i].delay_us)
2294 udelay(regs[i].delay_us);
2295 }
2296 return 0;
2297 }
2298
2299 if (!map->format.parse_inplace)
2300 return -EINVAL;
2301
2302 if (map->writeable_reg)
2303 for (i = 0; i < num_regs; i++) {
2304 int reg = regs[i].reg;
2305 if (!map->writeable_reg(map->dev, reg))
2306 return -EINVAL;
2307 if (!IS_ALIGNED(reg, map->reg_stride))
2308 return -EINVAL;
2309 }
2310
2311 if (!map->cache_bypass) {
2312 for (i = 0; i < num_regs; i++) {
2313 unsigned int val = regs[i].def;
2314 unsigned int reg = regs[i].reg;
2315 ret = regcache_write(map, reg, val);
2316 if (ret) {
2317 dev_err(map->dev,
2318 "Error in caching of register: %x ret: %d\n",
2319 reg, ret);
2320 return ret;
2321 }
2322 }
2323 if (map->cache_only) {
2324 map->cache_dirty = true;
2325 return 0;
2326 }
2327 }
2328
2329 WARN_ON(!map->bus);
2330
2331 for (i = 0; i < num_regs; i++) {
2332 unsigned int reg = regs[i].reg;
2333 struct regmap_range_node *range;
2334
2335 /* Coalesce all the writes between a page break or a delay
2336 * in a sequence
2337 */
2338 range = _regmap_range_lookup(map, reg);
2339 if (range || regs[i].delay_us) {
2340 size_t len = sizeof(struct reg_sequence)*num_regs;
2341 struct reg_sequence *base = kmemdup(regs, len,
2342 GFP_KERNEL);
2343 if (!base)
2344 return -ENOMEM;
2345 ret = _regmap_range_multi_paged_reg_write(map, base,
2346 num_regs);
2347 kfree(base);
2348
2349 return ret;
2350 }
2351 }
2352 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2353}
2354
2355/**
2356 * regmap_multi_reg_write() - Write multiple registers to the device
2357 *
2358 * @map: Register map to write to
2359 * @regs: Array of structures containing register,value to be written
2360 * @num_regs: Number of registers to write
2361 *
2362 * Write multiple registers to the device where the set of register, value
2363 * pairs are supplied in any order, possibly not all in a single range.
2364 *
2365 * The 'normal' block write mode will send ultimately send data on the
2366 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2367 * addressed. However, this alternative block multi write mode will send
2368 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2369 * must of course support the mode.
2370 *
2371 * A value of zero will be returned on success, a negative errno will be
2372 * returned in error cases.
2373 */
2374int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2375 int num_regs)
2376{
2377 int ret;
2378
2379 map->lock(map->lock_arg);
2380
2381 ret = _regmap_multi_reg_write(map, regs, num_regs);
2382
2383 map->unlock(map->lock_arg);
2384
2385 return ret;
2386}
2387EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2388
2389/**
2390 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2391 * device but not the cache
2392 *
2393 * @map: Register map to write to
2394 * @regs: Array of structures containing register,value to be written
2395 * @num_regs: Number of registers to write
2396 *
2397 * Write multiple registers to the device but not the cache where the set
2398 * of register are supplied in any order.
2399 *
2400 * This function is intended to be used for writing a large block of data
2401 * atomically to the device in single transfer for those I2C client devices
2402 * that implement this alternative block write mode.
2403 *
2404 * A value of zero will be returned on success, a negative errno will
2405 * be returned in error cases.
2406 */
2407int regmap_multi_reg_write_bypassed(struct regmap *map,
2408 const struct reg_sequence *regs,
2409 int num_regs)
2410{
2411 int ret;
2412 bool bypass;
2413
2414 map->lock(map->lock_arg);
2415
2416 bypass = map->cache_bypass;
2417 map->cache_bypass = true;
2418
2419 ret = _regmap_multi_reg_write(map, regs, num_regs);
2420
2421 map->cache_bypass = bypass;
2422
2423 map->unlock(map->lock_arg);
2424
2425 return ret;
2426}
2427EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2428
2429/**
2430 * regmap_raw_write_async() - Write raw values to one or more registers
2431 * asynchronously
2432 *
2433 * @map: Register map to write to
2434 * @reg: Initial register to write to
2435 * @val: Block of data to be written, laid out for direct transmission to the
2436 * device. Must be valid until regmap_async_complete() is called.
2437 * @val_len: Length of data pointed to by val.
2438 *
2439 * This function is intended to be used for things like firmware
2440 * download where a large block of data needs to be transferred to the
2441 * device. No formatting will be done on the data provided.
2442 *
2443 * If supported by the underlying bus the write will be scheduled
2444 * asynchronously, helping maximise I/O speed on higher speed buses
2445 * like SPI. regmap_async_complete() can be called to ensure that all
2446 * asynchrnous writes have been completed.
2447 *
2448 * A value of zero will be returned on success, a negative errno will
2449 * be returned in error cases.
2450 */
2451int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2452 const void *val, size_t val_len)
2453{
2454 int ret;
2455
2456 if (val_len % map->format.val_bytes)
2457 return -EINVAL;
2458 if (!IS_ALIGNED(reg, map->reg_stride))
2459 return -EINVAL;
2460
2461 map->lock(map->lock_arg);
2462
2463 map->async = true;
2464
2465 ret = _regmap_raw_write(map, reg, val, val_len, false);
2466
2467 map->async = false;
2468
2469 map->unlock(map->lock_arg);
2470
2471 return ret;
2472}
2473EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2474
2475static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2476 unsigned int val_len, bool noinc)
2477{
2478 struct regmap_range_node *range;
2479 int ret;
2480
2481 WARN_ON(!map->bus);
2482
2483 if (!map->bus || !map->bus->read)
2484 return -EINVAL;
2485
2486 range = _regmap_range_lookup(map, reg);
2487 if (range) {
2488 ret = _regmap_select_page(map, ®, range,
2489 noinc ? 1 : val_len / map->format.val_bytes);
2490 if (ret != 0)
2491 return ret;
2492 }
2493
2494 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2495 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2496 map->read_flag_mask);
2497 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2498
2499 ret = map->bus->read(map->bus_context, map->work_buf,
2500 map->format.reg_bytes + map->format.pad_bytes,
2501 val, val_len);
2502
2503 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2504
2505 return ret;
2506}
2507
2508static int _regmap_bus_reg_read(void *context, unsigned int reg,
2509 unsigned int *val)
2510{
2511 struct regmap *map = context;
2512
2513 return map->bus->reg_read(map->bus_context, reg, val);
2514}
2515
2516static int _regmap_bus_read(void *context, unsigned int reg,
2517 unsigned int *val)
2518{
2519 int ret;
2520 struct regmap *map = context;
2521 void *work_val = map->work_buf + map->format.reg_bytes +
2522 map->format.pad_bytes;
2523
2524 if (!map->format.parse_val)
2525 return -EINVAL;
2526
2527 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2528 if (ret == 0)
2529 *val = map->format.parse_val(work_val);
2530
2531 return ret;
2532}
2533
2534static int _regmap_read(struct regmap *map, unsigned int reg,
2535 unsigned int *val)
2536{
2537 int ret;
2538 void *context = _regmap_map_get_context(map);
2539
2540 if (!map->cache_bypass) {
2541 ret = regcache_read(map, reg, val);
2542 if (ret == 0)
2543 return 0;
2544 }
2545
2546 if (map->cache_only)
2547 return -EBUSY;
2548
2549 if (!regmap_readable(map, reg))
2550 return -EIO;
2551
2552 ret = map->reg_read(context, reg, val);
2553 if (ret == 0) {
2554 if (regmap_should_log(map))
2555 dev_info(map->dev, "%x => %x\n", reg, *val);
2556
2557 trace_regmap_reg_read(map, reg, *val);
2558
2559 if (!map->cache_bypass)
2560 regcache_write(map, reg, *val);
2561 }
2562
2563 return ret;
2564}
2565
2566/**
2567 * regmap_read() - Read a value from a single register
2568 *
2569 * @map: Register map to read from
2570 * @reg: Register to be read from
2571 * @val: Pointer to store read value
2572 *
2573 * A value of zero will be returned on success, a negative errno will
2574 * be returned in error cases.
2575 */
2576int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2577{
2578 int ret;
2579
2580 if (!IS_ALIGNED(reg, map->reg_stride))
2581 return -EINVAL;
2582
2583 map->lock(map->lock_arg);
2584
2585 ret = _regmap_read(map, reg, val);
2586
2587 map->unlock(map->lock_arg);
2588
2589 return ret;
2590}
2591EXPORT_SYMBOL_GPL(regmap_read);
2592
2593/**
2594 * regmap_raw_read() - Read raw data from the device
2595 *
2596 * @map: Register map to read from
2597 * @reg: First register to be read from
2598 * @val: Pointer to store read value
2599 * @val_len: Size of data to read
2600 *
2601 * A value of zero will be returned on success, a negative errno will
2602 * be returned in error cases.
2603 */
2604int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2605 size_t val_len)
2606{
2607 size_t val_bytes = map->format.val_bytes;
2608 size_t val_count = val_len / val_bytes;
2609 unsigned int v;
2610 int ret, i;
2611
2612 if (!map->bus)
2613 return -EINVAL;
2614 if (val_len % map->format.val_bytes)
2615 return -EINVAL;
2616 if (!IS_ALIGNED(reg, map->reg_stride))
2617 return -EINVAL;
2618 if (val_count == 0)
2619 return -EINVAL;
2620
2621 map->lock(map->lock_arg);
2622
2623 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2624 map->cache_type == REGCACHE_NONE) {
2625 size_t chunk_count, chunk_bytes;
2626 size_t chunk_regs = val_count;
2627
2628 if (!map->bus->read) {
2629 ret = -ENOTSUPP;
2630 goto out;
2631 }
2632
2633 if (map->use_single_read)
2634 chunk_regs = 1;
2635 else if (map->max_raw_read && val_len > map->max_raw_read)
2636 chunk_regs = map->max_raw_read / val_bytes;
2637
2638 chunk_count = val_count / chunk_regs;
2639 chunk_bytes = chunk_regs * val_bytes;
2640
2641 /* Read bytes that fit into whole chunks */
2642 for (i = 0; i < chunk_count; i++) {
2643 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2644 if (ret != 0)
2645 goto out;
2646
2647 reg += regmap_get_offset(map, chunk_regs);
2648 val += chunk_bytes;
2649 val_len -= chunk_bytes;
2650 }
2651
2652 /* Read remaining bytes */
2653 if (val_len) {
2654 ret = _regmap_raw_read(map, reg, val, val_len, false);
2655 if (ret != 0)
2656 goto out;
2657 }
2658 } else {
2659 /* Otherwise go word by word for the cache; should be low
2660 * cost as we expect to hit the cache.
2661 */
2662 for (i = 0; i < val_count; i++) {
2663 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2664 &v);
2665 if (ret != 0)
2666 goto out;
2667
2668 map->format.format_val(val + (i * val_bytes), v, 0);
2669 }
2670 }
2671
2672 out:
2673 map->unlock(map->lock_arg);
2674
2675 return ret;
2676}
2677EXPORT_SYMBOL_GPL(regmap_raw_read);
2678
2679/**
2680 * regmap_noinc_read(): Read data from a register without incrementing the
2681 * register number
2682 *
2683 * @map: Register map to read from
2684 * @reg: Register to read from
2685 * @val: Pointer to data buffer
2686 * @val_len: Length of output buffer in bytes.
2687 *
2688 * The regmap API usually assumes that bulk bus read operations will read a
2689 * range of registers. Some devices have certain registers for which a read
2690 * operation read will read from an internal FIFO.
2691 *
2692 * The target register must be volatile but registers after it can be
2693 * completely unrelated cacheable registers.
2694 *
2695 * This will attempt multiple reads as required to read val_len bytes.
2696 *
2697 * A value of zero will be returned on success, a negative errno will be
2698 * returned in error cases.
2699 */
2700int regmap_noinc_read(struct regmap *map, unsigned int reg,
2701 void *val, size_t val_len)
2702{
2703 size_t read_len;
2704 int ret;
2705
2706 if (!map->bus)
2707 return -EINVAL;
2708 if (!map->bus->read)
2709 return -ENOTSUPP;
2710 if (val_len % map->format.val_bytes)
2711 return -EINVAL;
2712 if (!IS_ALIGNED(reg, map->reg_stride))
2713 return -EINVAL;
2714 if (val_len == 0)
2715 return -EINVAL;
2716
2717 map->lock(map->lock_arg);
2718
2719 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2720 ret = -EINVAL;
2721 goto out_unlock;
2722 }
2723
2724 while (val_len) {
2725 if (map->max_raw_read && map->max_raw_read < val_len)
2726 read_len = map->max_raw_read;
2727 else
2728 read_len = val_len;
2729 ret = _regmap_raw_read(map, reg, val, read_len, true);
2730 if (ret)
2731 goto out_unlock;
2732 val = ((u8 *)val) + read_len;
2733 val_len -= read_len;
2734 }
2735
2736out_unlock:
2737 map->unlock(map->lock_arg);
2738 return ret;
2739}
2740EXPORT_SYMBOL_GPL(regmap_noinc_read);
2741
2742/**
2743 * regmap_field_read(): Read a value to a single register field
2744 *
2745 * @field: Register field to read from
2746 * @val: Pointer to store read value
2747 *
2748 * A value of zero will be returned on success, a negative errno will
2749 * be returned in error cases.
2750 */
2751int regmap_field_read(struct regmap_field *field, unsigned int *val)
2752{
2753 int ret;
2754 unsigned int reg_val;
2755 ret = regmap_read(field->regmap, field->reg, ®_val);
2756 if (ret != 0)
2757 return ret;
2758
2759 reg_val &= field->mask;
2760 reg_val >>= field->shift;
2761 *val = reg_val;
2762
2763 return ret;
2764}
2765EXPORT_SYMBOL_GPL(regmap_field_read);
2766
2767/**
2768 * regmap_fields_read() - Read a value to a single register field with port ID
2769 *
2770 * @field: Register field to read from
2771 * @id: port ID
2772 * @val: Pointer to store read value
2773 *
2774 * A value of zero will be returned on success, a negative errno will
2775 * be returned in error cases.
2776 */
2777int regmap_fields_read(struct regmap_field *field, unsigned int id,
2778 unsigned int *val)
2779{
2780 int ret;
2781 unsigned int reg_val;
2782
2783 if (id >= field->id_size)
2784 return -EINVAL;
2785
2786 ret = regmap_read(field->regmap,
2787 field->reg + (field->id_offset * id),
2788 ®_val);
2789 if (ret != 0)
2790 return ret;
2791
2792 reg_val &= field->mask;
2793 reg_val >>= field->shift;
2794 *val = reg_val;
2795
2796 return ret;
2797}
2798EXPORT_SYMBOL_GPL(regmap_fields_read);
2799
2800/**
2801 * regmap_bulk_read() - Read multiple registers from the device
2802 *
2803 * @map: Register map to read from
2804 * @reg: First register to be read from
2805 * @val: Pointer to store read value, in native register size for device
2806 * @val_count: Number of registers to read
2807 *
2808 * A value of zero will be returned on success, a negative errno will
2809 * be returned in error cases.
2810 */
2811int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2812 size_t val_count)
2813{
2814 int ret, i;
2815 size_t val_bytes = map->format.val_bytes;
2816 bool vol = regmap_volatile_range(map, reg, val_count);
2817
2818 if (!IS_ALIGNED(reg, map->reg_stride))
2819 return -EINVAL;
2820 if (val_count == 0)
2821 return -EINVAL;
2822
2823 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2824 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
2825 if (ret != 0)
2826 return ret;
2827
2828 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2829 map->format.parse_inplace(val + i);
2830 } else {
2831#ifdef CONFIG_64BIT
2832 u64 *u64 = val;
2833#endif
2834 u32 *u32 = val;
2835 u16 *u16 = val;
2836 u8 *u8 = val;
2837
2838 map->lock(map->lock_arg);
2839
2840 for (i = 0; i < val_count; i++) {
2841 unsigned int ival;
2842
2843 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2844 &ival);
2845 if (ret != 0)
2846 goto out;
2847
2848 switch (map->format.val_bytes) {
2849#ifdef CONFIG_64BIT
2850 case 8:
2851 u64[i] = ival;
2852 break;
2853#endif
2854 case 4:
2855 u32[i] = ival;
2856 break;
2857 case 2:
2858 u16[i] = ival;
2859 break;
2860 case 1:
2861 u8[i] = ival;
2862 break;
2863 default:
2864 ret = -EINVAL;
2865 goto out;
2866 }
2867 }
2868
2869out:
2870 map->unlock(map->lock_arg);
2871 }
2872
2873 return ret;
2874}
2875EXPORT_SYMBOL_GPL(regmap_bulk_read);
2876
2877static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2878 unsigned int mask, unsigned int val,
2879 bool *change, bool force_write)
2880{
2881 int ret;
2882 unsigned int tmp, orig;
2883
2884 if (change)
2885 *change = false;
2886
2887 if (regmap_volatile(map, reg) && map->reg_update_bits) {
2888 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
2889 if (ret == 0 && change)
2890 *change = true;
2891 } else {
2892 ret = _regmap_read(map, reg, &orig);
2893 if (ret != 0)
2894 return ret;
2895
2896 tmp = orig & ~mask;
2897 tmp |= val & mask;
2898
2899 if (force_write || (tmp != orig)) {
2900 ret = _regmap_write(map, reg, tmp);
2901 if (ret == 0 && change)
2902 *change = true;
2903 }
2904 }
2905
2906 return ret;
2907}
2908
2909/**
2910 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
2911 *
2912 * @map: Register map to update
2913 * @reg: Register to update
2914 * @mask: Bitmask to change
2915 * @val: New value for bitmask
2916 * @change: Boolean indicating if a write was done
2917 * @async: Boolean indicating asynchronously
2918 * @force: Boolean indicating use force update
2919 *
2920 * Perform a read/modify/write cycle on a register map with change, async, force
2921 * options.
2922 *
2923 * If async is true:
2924 *
2925 * With most buses the read must be done synchronously so this is most useful
2926 * for devices with a cache which do not need to interact with the hardware to
2927 * determine the current register value.
2928 *
2929 * Returns zero for success, a negative number on error.
2930 */
2931int regmap_update_bits_base(struct regmap *map, unsigned int reg,
2932 unsigned int mask, unsigned int val,
2933 bool *change, bool async, bool force)
2934{
2935 int ret;
2936
2937 map->lock(map->lock_arg);
2938
2939 map->async = async;
2940
2941 ret = _regmap_update_bits(map, reg, mask, val, change, force);
2942
2943 map->async = false;
2944
2945 map->unlock(map->lock_arg);
2946
2947 return ret;
2948}
2949EXPORT_SYMBOL_GPL(regmap_update_bits_base);
2950
2951/**
2952 * regmap_test_bits() - Check if all specified bits are set in a register.
2953 *
2954 * @map: Register map to operate on
2955 * @reg: Register to read from
2956 * @bits: Bits to test
2957 *
2958 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
2959 * bits are set and a negative error number if the underlying regmap_read()
2960 * fails.
2961 */
2962int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
2963{
2964 unsigned int val, ret;
2965
2966 ret = regmap_read(map, reg, &val);
2967 if (ret)
2968 return ret;
2969
2970 return (val & bits) == bits;
2971}
2972EXPORT_SYMBOL_GPL(regmap_test_bits);
2973
2974void regmap_async_complete_cb(struct regmap_async *async, int ret)
2975{
2976 struct regmap *map = async->map;
2977 bool wake;
2978
2979 trace_regmap_async_io_complete(map);
2980
2981 spin_lock(&map->async_lock);
2982 list_move(&async->list, &map->async_free);
2983 wake = list_empty(&map->async_list);
2984
2985 if (ret != 0)
2986 map->async_ret = ret;
2987
2988 spin_unlock(&map->async_lock);
2989
2990 if (wake)
2991 wake_up(&map->async_waitq);
2992}
2993EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
2994
2995static int regmap_async_is_done(struct regmap *map)
2996{
2997 unsigned long flags;
2998 int ret;
2999
3000 spin_lock_irqsave(&map->async_lock, flags);
3001 ret = list_empty(&map->async_list);
3002 spin_unlock_irqrestore(&map->async_lock, flags);
3003
3004 return ret;
3005}
3006
3007/**
3008 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3009 *
3010 * @map: Map to operate on.
3011 *
3012 * Blocks until any pending asynchronous I/O has completed. Returns
3013 * an error code for any failed I/O operations.
3014 */
3015int regmap_async_complete(struct regmap *map)
3016{
3017 unsigned long flags;
3018 int ret;
3019
3020 /* Nothing to do with no async support */
3021 if (!map->bus || !map->bus->async_write)
3022 return 0;
3023
3024 trace_regmap_async_complete_start(map);
3025
3026 wait_event(map->async_waitq, regmap_async_is_done(map));
3027
3028 spin_lock_irqsave(&map->async_lock, flags);
3029 ret = map->async_ret;
3030 map->async_ret = 0;
3031 spin_unlock_irqrestore(&map->async_lock, flags);
3032
3033 trace_regmap_async_complete_done(map);
3034
3035 return ret;
3036}
3037EXPORT_SYMBOL_GPL(regmap_async_complete);
3038
3039/**
3040 * regmap_register_patch - Register and apply register updates to be applied
3041 * on device initialistion
3042 *
3043 * @map: Register map to apply updates to.
3044 * @regs: Values to update.
3045 * @num_regs: Number of entries in regs.
3046 *
3047 * Register a set of register updates to be applied to the device
3048 * whenever the device registers are synchronised with the cache and
3049 * apply them immediately. Typically this is used to apply
3050 * corrections to be applied to the device defaults on startup, such
3051 * as the updates some vendors provide to undocumented registers.
3052 *
3053 * The caller must ensure that this function cannot be called
3054 * concurrently with either itself or regcache_sync().
3055 */
3056int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3057 int num_regs)
3058{
3059 struct reg_sequence *p;
3060 int ret;
3061 bool bypass;
3062
3063 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3064 num_regs))
3065 return 0;
3066
3067 p = krealloc(map->patch,
3068 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3069 GFP_KERNEL);
3070 if (p) {
3071 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3072 map->patch = p;
3073 map->patch_regs += num_regs;
3074 } else {
3075 return -ENOMEM;
3076 }
3077
3078 map->lock(map->lock_arg);
3079
3080 bypass = map->cache_bypass;
3081
3082 map->cache_bypass = true;
3083 map->async = true;
3084
3085 ret = _regmap_multi_reg_write(map, regs, num_regs);
3086
3087 map->async = false;
3088 map->cache_bypass = bypass;
3089
3090 map->unlock(map->lock_arg);
3091
3092 regmap_async_complete(map);
3093
3094 return ret;
3095}
3096EXPORT_SYMBOL_GPL(regmap_register_patch);
3097
3098/**
3099 * regmap_get_val_bytes() - Report the size of a register value
3100 *
3101 * @map: Register map to operate on.
3102 *
3103 * Report the size of a register value, mainly intended to for use by
3104 * generic infrastructure built on top of regmap.
3105 */
3106int regmap_get_val_bytes(struct regmap *map)
3107{
3108 if (map->format.format_write)
3109 return -EINVAL;
3110
3111 return map->format.val_bytes;
3112}
3113EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3114
3115/**
3116 * regmap_get_max_register() - Report the max register value
3117 *
3118 * @map: Register map to operate on.
3119 *
3120 * Report the max register value, mainly intended to for use by
3121 * generic infrastructure built on top of regmap.
3122 */
3123int regmap_get_max_register(struct regmap *map)
3124{
3125 return map->max_register ? map->max_register : -EINVAL;
3126}
3127EXPORT_SYMBOL_GPL(regmap_get_max_register);
3128
3129/**
3130 * regmap_get_reg_stride() - Report the register address stride
3131 *
3132 * @map: Register map to operate on.
3133 *
3134 * Report the register address stride, mainly intended to for use by
3135 * generic infrastructure built on top of regmap.
3136 */
3137int regmap_get_reg_stride(struct regmap *map)
3138{
3139 return map->reg_stride;
3140}
3141EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3142
3143int regmap_parse_val(struct regmap *map, const void *buf,
3144 unsigned int *val)
3145{
3146 if (!map->format.parse_val)
3147 return -EINVAL;
3148
3149 *val = map->format.parse_val(buf);
3150
3151 return 0;
3152}
3153EXPORT_SYMBOL_GPL(regmap_parse_val);
3154
3155static int __init regmap_initcall(void)
3156{
3157 regmap_debugfs_initcall();
3158
3159 return 0;
3160}
3161postcore_initcall(regmap_initcall);