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1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
292{
293 put_unaligned_be24(val << shift, buf);
294}
295
296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
297{
298 put_unaligned_be32(val << shift, buf);
299}
300
301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
303 put_unaligned_le32(val << shift, buf);
304}
305
306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
312}
313
314static void regmap_parse_inplace_noop(void *buf)
315{
316}
317
318static unsigned int regmap_parse_8(const void *buf)
319{
320 const u8 *b = buf;
321
322 return b[0];
323}
324
325static unsigned int regmap_parse_16_be(const void *buf)
326{
327 return get_unaligned_be16(buf);
328}
329
330static unsigned int regmap_parse_16_le(const void *buf)
331{
332 return get_unaligned_le16(buf);
333}
334
335static void regmap_parse_16_be_inplace(void *buf)
336{
337 u16 v = get_unaligned_be16(buf);
338
339 memcpy(buf, &v, sizeof(v));
340}
341
342static void regmap_parse_16_le_inplace(void *buf)
343{
344 u16 v = get_unaligned_le16(buf);
345
346 memcpy(buf, &v, sizeof(v));
347}
348
349static unsigned int regmap_parse_16_native(const void *buf)
350{
351 u16 v;
352
353 memcpy(&v, buf, sizeof(v));
354 return v;
355}
356
357static unsigned int regmap_parse_24_be(const void *buf)
358{
359 return get_unaligned_be24(buf);
360}
361
362static unsigned int regmap_parse_32_be(const void *buf)
363{
364 return get_unaligned_be32(buf);
365}
366
367static unsigned int regmap_parse_32_le(const void *buf)
368{
369 return get_unaligned_le32(buf);
370}
371
372static void regmap_parse_32_be_inplace(void *buf)
373{
374 u32 v = get_unaligned_be32(buf);
375
376 memcpy(buf, &v, sizeof(v));
377}
378
379static void regmap_parse_32_le_inplace(void *buf)
380{
381 u32 v = get_unaligned_le32(buf);
382
383 memcpy(buf, &v, sizeof(v));
384}
385
386static unsigned int regmap_parse_32_native(const void *buf)
387{
388 u32 v;
389
390 memcpy(&v, buf, sizeof(v));
391 return v;
392}
393
394static void regmap_lock_hwlock(void *__map)
395{
396 struct regmap *map = __map;
397
398 hwspin_lock_timeout(map->hwlock, UINT_MAX);
399}
400
401static void regmap_lock_hwlock_irq(void *__map)
402{
403 struct regmap *map = __map;
404
405 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
406}
407
408static void regmap_lock_hwlock_irqsave(void *__map)
409{
410 struct regmap *map = __map;
411
412 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
413 &map->spinlock_flags);
414}
415
416static void regmap_unlock_hwlock(void *__map)
417{
418 struct regmap *map = __map;
419
420 hwspin_unlock(map->hwlock);
421}
422
423static void regmap_unlock_hwlock_irq(void *__map)
424{
425 struct regmap *map = __map;
426
427 hwspin_unlock_irq(map->hwlock);
428}
429
430static void regmap_unlock_hwlock_irqrestore(void *__map)
431{
432 struct regmap *map = __map;
433
434 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
435}
436
437static void regmap_lock_unlock_none(void *__map)
438{
439
440}
441
442static void regmap_lock_mutex(void *__map)
443{
444 struct regmap *map = __map;
445 mutex_lock(&map->mutex);
446}
447
448static void regmap_unlock_mutex(void *__map)
449{
450 struct regmap *map = __map;
451 mutex_unlock(&map->mutex);
452}
453
454static void regmap_lock_spinlock(void *__map)
455__acquires(&map->spinlock)
456{
457 struct regmap *map = __map;
458 unsigned long flags;
459
460 spin_lock_irqsave(&map->spinlock, flags);
461 map->spinlock_flags = flags;
462}
463
464static void regmap_unlock_spinlock(void *__map)
465__releases(&map->spinlock)
466{
467 struct regmap *map = __map;
468 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
469}
470
471static void regmap_lock_raw_spinlock(void *__map)
472__acquires(&map->raw_spinlock)
473{
474 struct regmap *map = __map;
475 unsigned long flags;
476
477 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478 map->raw_spinlock_flags = flags;
479}
480
481static void regmap_unlock_raw_spinlock(void *__map)
482__releases(&map->raw_spinlock)
483{
484 struct regmap *map = __map;
485 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486}
487
488static void dev_get_regmap_release(struct device *dev, void *res)
489{
490 /*
491 * We don't actually have anything to do here; the goal here
492 * is not to manage the regmap but to provide a simple way to
493 * get the regmap back given a struct device.
494 */
495}
496
497static bool _regmap_range_add(struct regmap *map,
498 struct regmap_range_node *data)
499{
500 struct rb_root *root = &map->range_tree;
501 struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503 while (*new) {
504 struct regmap_range_node *this =
505 rb_entry(*new, struct regmap_range_node, node);
506
507 parent = *new;
508 if (data->range_max < this->range_min)
509 new = &((*new)->rb_left);
510 else if (data->range_min > this->range_max)
511 new = &((*new)->rb_right);
512 else
513 return false;
514 }
515
516 rb_link_node(&data->node, parent, new);
517 rb_insert_color(&data->node, root);
518
519 return true;
520}
521
522static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523 unsigned int reg)
524{
525 struct rb_node *node = map->range_tree.rb_node;
526
527 while (node) {
528 struct regmap_range_node *this =
529 rb_entry(node, struct regmap_range_node, node);
530
531 if (reg < this->range_min)
532 node = node->rb_left;
533 else if (reg > this->range_max)
534 node = node->rb_right;
535 else
536 return this;
537 }
538
539 return NULL;
540}
541
542static void regmap_range_exit(struct regmap *map)
543{
544 struct rb_node *next;
545 struct regmap_range_node *range_node;
546
547 next = rb_first(&map->range_tree);
548 while (next) {
549 range_node = rb_entry(next, struct regmap_range_node, node);
550 next = rb_next(&range_node->node);
551 rb_erase(&range_node->node, &map->range_tree);
552 kfree(range_node);
553 }
554
555 kfree(map->selector_work_buf);
556}
557
558static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559{
560 if (config->name) {
561 const char *name = kstrdup_const(config->name, GFP_KERNEL);
562
563 if (!name)
564 return -ENOMEM;
565
566 kfree_const(map->name);
567 map->name = name;
568 }
569
570 return 0;
571}
572
573int regmap_attach_dev(struct device *dev, struct regmap *map,
574 const struct regmap_config *config)
575{
576 struct regmap **m;
577 int ret;
578
579 map->dev = dev;
580
581 ret = regmap_set_name(map, config);
582 if (ret)
583 return ret;
584
585 regmap_debugfs_exit(map);
586 regmap_debugfs_init(map);
587
588 /* Add a devres resource for dev_get_regmap() */
589 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590 if (!m) {
591 regmap_debugfs_exit(map);
592 return -ENOMEM;
593 }
594 *m = map;
595 devres_add(dev, m);
596
597 return 0;
598}
599EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
601static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
602 const struct regmap_config *config)
603{
604 enum regmap_endian endian;
605
606 /* Retrieve the endianness specification from the regmap config */
607 endian = config->reg_format_endian;
608
609 /* If the regmap config specified a non-default value, use that */
610 if (endian != REGMAP_ENDIAN_DEFAULT)
611 return endian;
612
613 /* Retrieve the endianness specification from the bus config */
614 if (bus && bus->reg_format_endian_default)
615 endian = bus->reg_format_endian_default;
616
617 /* If the bus specified a non-default value, use that */
618 if (endian != REGMAP_ENDIAN_DEFAULT)
619 return endian;
620
621 /* Use this if no other value was found */
622 return REGMAP_ENDIAN_BIG;
623}
624
625enum regmap_endian regmap_get_val_endian(struct device *dev,
626 const struct regmap_bus *bus,
627 const struct regmap_config *config)
628{
629 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
630 enum regmap_endian endian;
631
632 /* Retrieve the endianness specification from the regmap config */
633 endian = config->val_format_endian;
634
635 /* If the regmap config specified a non-default value, use that */
636 if (endian != REGMAP_ENDIAN_DEFAULT)
637 return endian;
638
639 /* If the firmware node exist try to get endianness from it */
640 if (fwnode_property_read_bool(fwnode, "big-endian"))
641 endian = REGMAP_ENDIAN_BIG;
642 else if (fwnode_property_read_bool(fwnode, "little-endian"))
643 endian = REGMAP_ENDIAN_LITTLE;
644 else if (fwnode_property_read_bool(fwnode, "native-endian"))
645 endian = REGMAP_ENDIAN_NATIVE;
646
647 /* If the endianness was specified in fwnode, use that */
648 if (endian != REGMAP_ENDIAN_DEFAULT)
649 return endian;
650
651 /* Retrieve the endianness specification from the bus config */
652 if (bus && bus->val_format_endian_default)
653 endian = bus->val_format_endian_default;
654
655 /* If the bus specified a non-default value, use that */
656 if (endian != REGMAP_ENDIAN_DEFAULT)
657 return endian;
658
659 /* Use this if no other value was found */
660 return REGMAP_ENDIAN_BIG;
661}
662EXPORT_SYMBOL_GPL(regmap_get_val_endian);
663
664struct regmap *__regmap_init(struct device *dev,
665 const struct regmap_bus *bus,
666 void *bus_context,
667 const struct regmap_config *config,
668 struct lock_class_key *lock_key,
669 const char *lock_name)
670{
671 struct regmap *map;
672 int ret = -EINVAL;
673 enum regmap_endian reg_endian, val_endian;
674 int i, j;
675
676 if (!config)
677 goto err;
678
679 map = kzalloc(sizeof(*map), GFP_KERNEL);
680 if (map == NULL) {
681 ret = -ENOMEM;
682 goto err;
683 }
684
685 ret = regmap_set_name(map, config);
686 if (ret)
687 goto err_map;
688
689 ret = -EINVAL; /* Later error paths rely on this */
690
691 if (config->disable_locking) {
692 map->lock = map->unlock = regmap_lock_unlock_none;
693 map->can_sleep = config->can_sleep;
694 regmap_debugfs_disable(map);
695 } else if (config->lock && config->unlock) {
696 map->lock = config->lock;
697 map->unlock = config->unlock;
698 map->lock_arg = config->lock_arg;
699 map->can_sleep = config->can_sleep;
700 } else if (config->use_hwlock) {
701 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
702 if (!map->hwlock) {
703 ret = -ENXIO;
704 goto err_name;
705 }
706
707 switch (config->hwlock_mode) {
708 case HWLOCK_IRQSTATE:
709 map->lock = regmap_lock_hwlock_irqsave;
710 map->unlock = regmap_unlock_hwlock_irqrestore;
711 break;
712 case HWLOCK_IRQ:
713 map->lock = regmap_lock_hwlock_irq;
714 map->unlock = regmap_unlock_hwlock_irq;
715 break;
716 default:
717 map->lock = regmap_lock_hwlock;
718 map->unlock = regmap_unlock_hwlock;
719 break;
720 }
721
722 map->lock_arg = map;
723 } else {
724 if ((bus && bus->fast_io) ||
725 config->fast_io) {
726 if (config->use_raw_spinlock) {
727 raw_spin_lock_init(&map->raw_spinlock);
728 map->lock = regmap_lock_raw_spinlock;
729 map->unlock = regmap_unlock_raw_spinlock;
730 lockdep_set_class_and_name(&map->raw_spinlock,
731 lock_key, lock_name);
732 } else {
733 spin_lock_init(&map->spinlock);
734 map->lock = regmap_lock_spinlock;
735 map->unlock = regmap_unlock_spinlock;
736 lockdep_set_class_and_name(&map->spinlock,
737 lock_key, lock_name);
738 }
739 } else {
740 mutex_init(&map->mutex);
741 map->lock = regmap_lock_mutex;
742 map->unlock = regmap_unlock_mutex;
743 map->can_sleep = true;
744 lockdep_set_class_and_name(&map->mutex,
745 lock_key, lock_name);
746 }
747 map->lock_arg = map;
748 }
749
750 /*
751 * When we write in fast-paths with regmap_bulk_write() don't allocate
752 * scratch buffers with sleeping allocations.
753 */
754 if ((bus && bus->fast_io) || config->fast_io)
755 map->alloc_flags = GFP_ATOMIC;
756 else
757 map->alloc_flags = GFP_KERNEL;
758
759 map->reg_base = config->reg_base;
760
761 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
762 map->format.pad_bytes = config->pad_bits / 8;
763 map->format.reg_shift = config->reg_shift;
764 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
765 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
766 config->val_bits + config->pad_bits, 8);
767 map->reg_shift = config->pad_bits % 8;
768 if (config->reg_stride)
769 map->reg_stride = config->reg_stride;
770 else
771 map->reg_stride = 1;
772 if (is_power_of_2(map->reg_stride))
773 map->reg_stride_order = ilog2(map->reg_stride);
774 else
775 map->reg_stride_order = -1;
776 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
777 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
778 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
779 if (bus) {
780 map->max_raw_read = bus->max_raw_read;
781 map->max_raw_write = bus->max_raw_write;
782 } else if (config->max_raw_read && config->max_raw_write) {
783 map->max_raw_read = config->max_raw_read;
784 map->max_raw_write = config->max_raw_write;
785 }
786 map->dev = dev;
787 map->bus = bus;
788 map->bus_context = bus_context;
789 map->max_register = config->max_register;
790 map->wr_table = config->wr_table;
791 map->rd_table = config->rd_table;
792 map->volatile_table = config->volatile_table;
793 map->precious_table = config->precious_table;
794 map->wr_noinc_table = config->wr_noinc_table;
795 map->rd_noinc_table = config->rd_noinc_table;
796 map->writeable_reg = config->writeable_reg;
797 map->readable_reg = config->readable_reg;
798 map->volatile_reg = config->volatile_reg;
799 map->precious_reg = config->precious_reg;
800 map->writeable_noinc_reg = config->writeable_noinc_reg;
801 map->readable_noinc_reg = config->readable_noinc_reg;
802 map->cache_type = config->cache_type;
803
804 spin_lock_init(&map->async_lock);
805 INIT_LIST_HEAD(&map->async_list);
806 INIT_LIST_HEAD(&map->async_free);
807 init_waitqueue_head(&map->async_waitq);
808
809 if (config->read_flag_mask ||
810 config->write_flag_mask ||
811 config->zero_flag_mask) {
812 map->read_flag_mask = config->read_flag_mask;
813 map->write_flag_mask = config->write_flag_mask;
814 } else if (bus) {
815 map->read_flag_mask = bus->read_flag_mask;
816 }
817
818 if (config && config->read && config->write) {
819 map->reg_read = _regmap_bus_read;
820 if (config->reg_update_bits)
821 map->reg_update_bits = config->reg_update_bits;
822
823 /* Bulk read/write */
824 map->read = config->read;
825 map->write = config->write;
826
827 reg_endian = REGMAP_ENDIAN_NATIVE;
828 val_endian = REGMAP_ENDIAN_NATIVE;
829 } else if (!bus) {
830 map->reg_read = config->reg_read;
831 map->reg_write = config->reg_write;
832 map->reg_update_bits = config->reg_update_bits;
833
834 map->defer_caching = false;
835 goto skip_format_initialization;
836 } else if (!bus->read || !bus->write) {
837 map->reg_read = _regmap_bus_reg_read;
838 map->reg_write = _regmap_bus_reg_write;
839 map->reg_update_bits = bus->reg_update_bits;
840
841 map->defer_caching = false;
842 goto skip_format_initialization;
843 } else {
844 map->reg_read = _regmap_bus_read;
845 map->reg_update_bits = bus->reg_update_bits;
846 /* Bulk read/write */
847 map->read = bus->read;
848 map->write = bus->write;
849
850 reg_endian = regmap_get_reg_endian(bus, config);
851 val_endian = regmap_get_val_endian(dev, bus, config);
852 }
853
854 switch (config->reg_bits + map->reg_shift) {
855 case 2:
856 switch (config->val_bits) {
857 case 6:
858 map->format.format_write = regmap_format_2_6_write;
859 break;
860 default:
861 goto err_hwlock;
862 }
863 break;
864
865 case 4:
866 switch (config->val_bits) {
867 case 12:
868 map->format.format_write = regmap_format_4_12_write;
869 break;
870 default:
871 goto err_hwlock;
872 }
873 break;
874
875 case 7:
876 switch (config->val_bits) {
877 case 9:
878 map->format.format_write = regmap_format_7_9_write;
879 break;
880 case 17:
881 map->format.format_write = regmap_format_7_17_write;
882 break;
883 default:
884 goto err_hwlock;
885 }
886 break;
887
888 case 10:
889 switch (config->val_bits) {
890 case 14:
891 map->format.format_write = regmap_format_10_14_write;
892 break;
893 default:
894 goto err_hwlock;
895 }
896 break;
897
898 case 12:
899 switch (config->val_bits) {
900 case 20:
901 map->format.format_write = regmap_format_12_20_write;
902 break;
903 default:
904 goto err_hwlock;
905 }
906 break;
907
908 case 8:
909 map->format.format_reg = regmap_format_8;
910 break;
911
912 case 16:
913 switch (reg_endian) {
914 case REGMAP_ENDIAN_BIG:
915 map->format.format_reg = regmap_format_16_be;
916 break;
917 case REGMAP_ENDIAN_LITTLE:
918 map->format.format_reg = regmap_format_16_le;
919 break;
920 case REGMAP_ENDIAN_NATIVE:
921 map->format.format_reg = regmap_format_16_native;
922 break;
923 default:
924 goto err_hwlock;
925 }
926 break;
927
928 case 24:
929 switch (reg_endian) {
930 case REGMAP_ENDIAN_BIG:
931 map->format.format_reg = regmap_format_24_be;
932 break;
933 default:
934 goto err_hwlock;
935 }
936 break;
937
938 case 32:
939 switch (reg_endian) {
940 case REGMAP_ENDIAN_BIG:
941 map->format.format_reg = regmap_format_32_be;
942 break;
943 case REGMAP_ENDIAN_LITTLE:
944 map->format.format_reg = regmap_format_32_le;
945 break;
946 case REGMAP_ENDIAN_NATIVE:
947 map->format.format_reg = regmap_format_32_native;
948 break;
949 default:
950 goto err_hwlock;
951 }
952 break;
953
954 default:
955 goto err_hwlock;
956 }
957
958 if (val_endian == REGMAP_ENDIAN_NATIVE)
959 map->format.parse_inplace = regmap_parse_inplace_noop;
960
961 switch (config->val_bits) {
962 case 8:
963 map->format.format_val = regmap_format_8;
964 map->format.parse_val = regmap_parse_8;
965 map->format.parse_inplace = regmap_parse_inplace_noop;
966 break;
967 case 16:
968 switch (val_endian) {
969 case REGMAP_ENDIAN_BIG:
970 map->format.format_val = regmap_format_16_be;
971 map->format.parse_val = regmap_parse_16_be;
972 map->format.parse_inplace = regmap_parse_16_be_inplace;
973 break;
974 case REGMAP_ENDIAN_LITTLE:
975 map->format.format_val = regmap_format_16_le;
976 map->format.parse_val = regmap_parse_16_le;
977 map->format.parse_inplace = regmap_parse_16_le_inplace;
978 break;
979 case REGMAP_ENDIAN_NATIVE:
980 map->format.format_val = regmap_format_16_native;
981 map->format.parse_val = regmap_parse_16_native;
982 break;
983 default:
984 goto err_hwlock;
985 }
986 break;
987 case 24:
988 switch (val_endian) {
989 case REGMAP_ENDIAN_BIG:
990 map->format.format_val = regmap_format_24_be;
991 map->format.parse_val = regmap_parse_24_be;
992 break;
993 default:
994 goto err_hwlock;
995 }
996 break;
997 case 32:
998 switch (val_endian) {
999 case REGMAP_ENDIAN_BIG:
1000 map->format.format_val = regmap_format_32_be;
1001 map->format.parse_val = regmap_parse_32_be;
1002 map->format.parse_inplace = regmap_parse_32_be_inplace;
1003 break;
1004 case REGMAP_ENDIAN_LITTLE:
1005 map->format.format_val = regmap_format_32_le;
1006 map->format.parse_val = regmap_parse_32_le;
1007 map->format.parse_inplace = regmap_parse_32_le_inplace;
1008 break;
1009 case REGMAP_ENDIAN_NATIVE:
1010 map->format.format_val = regmap_format_32_native;
1011 map->format.parse_val = regmap_parse_32_native;
1012 break;
1013 default:
1014 goto err_hwlock;
1015 }
1016 break;
1017 }
1018
1019 if (map->format.format_write) {
1020 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1021 (val_endian != REGMAP_ENDIAN_BIG))
1022 goto err_hwlock;
1023 map->use_single_write = true;
1024 }
1025
1026 if (!map->format.format_write &&
1027 !(map->format.format_reg && map->format.format_val))
1028 goto err_hwlock;
1029
1030 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1031 if (map->work_buf == NULL) {
1032 ret = -ENOMEM;
1033 goto err_hwlock;
1034 }
1035
1036 if (map->format.format_write) {
1037 map->defer_caching = false;
1038 map->reg_write = _regmap_bus_formatted_write;
1039 } else if (map->format.format_val) {
1040 map->defer_caching = true;
1041 map->reg_write = _regmap_bus_raw_write;
1042 }
1043
1044skip_format_initialization:
1045
1046 map->range_tree = RB_ROOT;
1047 for (i = 0; i < config->num_ranges; i++) {
1048 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1049 struct regmap_range_node *new;
1050
1051 /* Sanity check */
1052 if (range_cfg->range_max < range_cfg->range_min) {
1053 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1054 range_cfg->range_max, range_cfg->range_min);
1055 goto err_range;
1056 }
1057
1058 if (range_cfg->range_max > map->max_register) {
1059 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1060 range_cfg->range_max, map->max_register);
1061 goto err_range;
1062 }
1063
1064 if (range_cfg->selector_reg > map->max_register) {
1065 dev_err(map->dev,
1066 "Invalid range %d: selector out of map\n", i);
1067 goto err_range;
1068 }
1069
1070 if (range_cfg->window_len == 0) {
1071 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1072 i);
1073 goto err_range;
1074 }
1075
1076 /* Make sure, that this register range has no selector
1077 or data window within its boundary */
1078 for (j = 0; j < config->num_ranges; j++) {
1079 unsigned int sel_reg = config->ranges[j].selector_reg;
1080 unsigned int win_min = config->ranges[j].window_start;
1081 unsigned int win_max = win_min +
1082 config->ranges[j].window_len - 1;
1083
1084 /* Allow data window inside its own virtual range */
1085 if (j == i)
1086 continue;
1087
1088 if (range_cfg->range_min <= sel_reg &&
1089 sel_reg <= range_cfg->range_max) {
1090 dev_err(map->dev,
1091 "Range %d: selector for %d in window\n",
1092 i, j);
1093 goto err_range;
1094 }
1095
1096 if (!(win_max < range_cfg->range_min ||
1097 win_min > range_cfg->range_max)) {
1098 dev_err(map->dev,
1099 "Range %d: window for %d in window\n",
1100 i, j);
1101 goto err_range;
1102 }
1103 }
1104
1105 new = kzalloc(sizeof(*new), GFP_KERNEL);
1106 if (new == NULL) {
1107 ret = -ENOMEM;
1108 goto err_range;
1109 }
1110
1111 new->map = map;
1112 new->name = range_cfg->name;
1113 new->range_min = range_cfg->range_min;
1114 new->range_max = range_cfg->range_max;
1115 new->selector_reg = range_cfg->selector_reg;
1116 new->selector_mask = range_cfg->selector_mask;
1117 new->selector_shift = range_cfg->selector_shift;
1118 new->window_start = range_cfg->window_start;
1119 new->window_len = range_cfg->window_len;
1120
1121 if (!_regmap_range_add(map, new)) {
1122 dev_err(map->dev, "Failed to add range %d\n", i);
1123 kfree(new);
1124 goto err_range;
1125 }
1126
1127 if (map->selector_work_buf == NULL) {
1128 map->selector_work_buf =
1129 kzalloc(map->format.buf_size, GFP_KERNEL);
1130 if (map->selector_work_buf == NULL) {
1131 ret = -ENOMEM;
1132 goto err_range;
1133 }
1134 }
1135 }
1136
1137 ret = regcache_init(map, config);
1138 if (ret != 0)
1139 goto err_range;
1140
1141 if (dev) {
1142 ret = regmap_attach_dev(dev, map, config);
1143 if (ret != 0)
1144 goto err_regcache;
1145 } else {
1146 regmap_debugfs_init(map);
1147 }
1148
1149 return map;
1150
1151err_regcache:
1152 regcache_exit(map);
1153err_range:
1154 regmap_range_exit(map);
1155 kfree(map->work_buf);
1156err_hwlock:
1157 if (map->hwlock)
1158 hwspin_lock_free(map->hwlock);
1159err_name:
1160 kfree_const(map->name);
1161err_map:
1162 kfree(map);
1163err:
1164 return ERR_PTR(ret);
1165}
1166EXPORT_SYMBOL_GPL(__regmap_init);
1167
1168static void devm_regmap_release(struct device *dev, void *res)
1169{
1170 regmap_exit(*(struct regmap **)res);
1171}
1172
1173struct regmap *__devm_regmap_init(struct device *dev,
1174 const struct regmap_bus *bus,
1175 void *bus_context,
1176 const struct regmap_config *config,
1177 struct lock_class_key *lock_key,
1178 const char *lock_name)
1179{
1180 struct regmap **ptr, *regmap;
1181
1182 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1183 if (!ptr)
1184 return ERR_PTR(-ENOMEM);
1185
1186 regmap = __regmap_init(dev, bus, bus_context, config,
1187 lock_key, lock_name);
1188 if (!IS_ERR(regmap)) {
1189 *ptr = regmap;
1190 devres_add(dev, ptr);
1191 } else {
1192 devres_free(ptr);
1193 }
1194
1195 return regmap;
1196}
1197EXPORT_SYMBOL_GPL(__devm_regmap_init);
1198
1199static void regmap_field_init(struct regmap_field *rm_field,
1200 struct regmap *regmap, struct reg_field reg_field)
1201{
1202 rm_field->regmap = regmap;
1203 rm_field->reg = reg_field.reg;
1204 rm_field->shift = reg_field.lsb;
1205 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1206
1207 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1208
1209 rm_field->id_size = reg_field.id_size;
1210 rm_field->id_offset = reg_field.id_offset;
1211}
1212
1213/**
1214 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1215 *
1216 * @dev: Device that will be interacted with
1217 * @regmap: regmap bank in which this register field is located.
1218 * @reg_field: Register field with in the bank.
1219 *
1220 * The return value will be an ERR_PTR() on error or a valid pointer
1221 * to a struct regmap_field. The regmap_field will be automatically freed
1222 * by the device management code.
1223 */
1224struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1225 struct regmap *regmap, struct reg_field reg_field)
1226{
1227 struct regmap_field *rm_field = devm_kzalloc(dev,
1228 sizeof(*rm_field), GFP_KERNEL);
1229 if (!rm_field)
1230 return ERR_PTR(-ENOMEM);
1231
1232 regmap_field_init(rm_field, regmap, reg_field);
1233
1234 return rm_field;
1235
1236}
1237EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1238
1239
1240/**
1241 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1242 *
1243 * @regmap: regmap bank in which this register field is located.
1244 * @rm_field: regmap register fields within the bank.
1245 * @reg_field: Register fields within the bank.
1246 * @num_fields: Number of register fields.
1247 *
1248 * The return value will be an -ENOMEM on error or zero for success.
1249 * Newly allocated regmap_fields should be freed by calling
1250 * regmap_field_bulk_free()
1251 */
1252int regmap_field_bulk_alloc(struct regmap *regmap,
1253 struct regmap_field **rm_field,
1254 const struct reg_field *reg_field,
1255 int num_fields)
1256{
1257 struct regmap_field *rf;
1258 int i;
1259
1260 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1261 if (!rf)
1262 return -ENOMEM;
1263
1264 for (i = 0; i < num_fields; i++) {
1265 regmap_field_init(&rf[i], regmap, reg_field[i]);
1266 rm_field[i] = &rf[i];
1267 }
1268
1269 return 0;
1270}
1271EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1272
1273/**
1274 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1275 * fields.
1276 *
1277 * @dev: Device that will be interacted with
1278 * @regmap: regmap bank in which this register field is located.
1279 * @rm_field: regmap register fields within the bank.
1280 * @reg_field: Register fields within the bank.
1281 * @num_fields: Number of register fields.
1282 *
1283 * The return value will be an -ENOMEM on error or zero for success.
1284 * Newly allocated regmap_fields will be automatically freed by the
1285 * device management code.
1286 */
1287int devm_regmap_field_bulk_alloc(struct device *dev,
1288 struct regmap *regmap,
1289 struct regmap_field **rm_field,
1290 const struct reg_field *reg_field,
1291 int num_fields)
1292{
1293 struct regmap_field *rf;
1294 int i;
1295
1296 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1297 if (!rf)
1298 return -ENOMEM;
1299
1300 for (i = 0; i < num_fields; i++) {
1301 regmap_field_init(&rf[i], regmap, reg_field[i]);
1302 rm_field[i] = &rf[i];
1303 }
1304
1305 return 0;
1306}
1307EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1308
1309/**
1310 * regmap_field_bulk_free() - Free register field allocated using
1311 * regmap_field_bulk_alloc.
1312 *
1313 * @field: regmap fields which should be freed.
1314 */
1315void regmap_field_bulk_free(struct regmap_field *field)
1316{
1317 kfree(field);
1318}
1319EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1320
1321/**
1322 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1323 * devm_regmap_field_bulk_alloc.
1324 *
1325 * @dev: Device that will be interacted with
1326 * @field: regmap field which should be freed.
1327 *
1328 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1329 * drivers need not call this function, as the memory allocated via devm
1330 * will be freed as per device-driver life-cycle.
1331 */
1332void devm_regmap_field_bulk_free(struct device *dev,
1333 struct regmap_field *field)
1334{
1335 devm_kfree(dev, field);
1336}
1337EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1338
1339/**
1340 * devm_regmap_field_free() - Free a register field allocated using
1341 * devm_regmap_field_alloc.
1342 *
1343 * @dev: Device that will be interacted with
1344 * @field: regmap field which should be freed.
1345 *
1346 * Free register field allocated using devm_regmap_field_alloc(). Usually
1347 * drivers need not call this function, as the memory allocated via devm
1348 * will be freed as per device-driver life-cyle.
1349 */
1350void devm_regmap_field_free(struct device *dev,
1351 struct regmap_field *field)
1352{
1353 devm_kfree(dev, field);
1354}
1355EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1356
1357/**
1358 * regmap_field_alloc() - Allocate and initialise a register field.
1359 *
1360 * @regmap: regmap bank in which this register field is located.
1361 * @reg_field: Register field with in the bank.
1362 *
1363 * The return value will be an ERR_PTR() on error or a valid pointer
1364 * to a struct regmap_field. The regmap_field should be freed by the
1365 * user once its finished working with it using regmap_field_free().
1366 */
1367struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1368 struct reg_field reg_field)
1369{
1370 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1371
1372 if (!rm_field)
1373 return ERR_PTR(-ENOMEM);
1374
1375 regmap_field_init(rm_field, regmap, reg_field);
1376
1377 return rm_field;
1378}
1379EXPORT_SYMBOL_GPL(regmap_field_alloc);
1380
1381/**
1382 * regmap_field_free() - Free register field allocated using
1383 * regmap_field_alloc.
1384 *
1385 * @field: regmap field which should be freed.
1386 */
1387void regmap_field_free(struct regmap_field *field)
1388{
1389 kfree(field);
1390}
1391EXPORT_SYMBOL_GPL(regmap_field_free);
1392
1393/**
1394 * regmap_reinit_cache() - Reinitialise the current register cache
1395 *
1396 * @map: Register map to operate on.
1397 * @config: New configuration. Only the cache data will be used.
1398 *
1399 * Discard any existing register cache for the map and initialize a
1400 * new cache. This can be used to restore the cache to defaults or to
1401 * update the cache configuration to reflect runtime discovery of the
1402 * hardware.
1403 *
1404 * No explicit locking is done here, the user needs to ensure that
1405 * this function will not race with other calls to regmap.
1406 */
1407int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1408{
1409 int ret;
1410
1411 regcache_exit(map);
1412 regmap_debugfs_exit(map);
1413
1414 map->max_register = config->max_register;
1415 map->writeable_reg = config->writeable_reg;
1416 map->readable_reg = config->readable_reg;
1417 map->volatile_reg = config->volatile_reg;
1418 map->precious_reg = config->precious_reg;
1419 map->writeable_noinc_reg = config->writeable_noinc_reg;
1420 map->readable_noinc_reg = config->readable_noinc_reg;
1421 map->cache_type = config->cache_type;
1422
1423 ret = regmap_set_name(map, config);
1424 if (ret)
1425 return ret;
1426
1427 regmap_debugfs_init(map);
1428
1429 map->cache_bypass = false;
1430 map->cache_only = false;
1431
1432 return regcache_init(map, config);
1433}
1434EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1435
1436/**
1437 * regmap_exit() - Free a previously allocated register map
1438 *
1439 * @map: Register map to operate on.
1440 */
1441void regmap_exit(struct regmap *map)
1442{
1443 struct regmap_async *async;
1444
1445 regcache_exit(map);
1446 regmap_debugfs_exit(map);
1447 regmap_range_exit(map);
1448 if (map->bus && map->bus->free_context)
1449 map->bus->free_context(map->bus_context);
1450 kfree(map->work_buf);
1451 while (!list_empty(&map->async_free)) {
1452 async = list_first_entry_or_null(&map->async_free,
1453 struct regmap_async,
1454 list);
1455 list_del(&async->list);
1456 kfree(async->work_buf);
1457 kfree(async);
1458 }
1459 if (map->hwlock)
1460 hwspin_lock_free(map->hwlock);
1461 if (map->lock == regmap_lock_mutex)
1462 mutex_destroy(&map->mutex);
1463 kfree_const(map->name);
1464 kfree(map->patch);
1465 if (map->bus && map->bus->free_on_exit)
1466 kfree(map->bus);
1467 kfree(map);
1468}
1469EXPORT_SYMBOL_GPL(regmap_exit);
1470
1471static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1472{
1473 struct regmap **r = res;
1474 if (!r || !*r) {
1475 WARN_ON(!r || !*r);
1476 return 0;
1477 }
1478
1479 /* If the user didn't specify a name match any */
1480 if (data)
1481 return (*r)->name && !strcmp((*r)->name, data);
1482 else
1483 return 1;
1484}
1485
1486/**
1487 * dev_get_regmap() - Obtain the regmap (if any) for a device
1488 *
1489 * @dev: Device to retrieve the map for
1490 * @name: Optional name for the register map, usually NULL.
1491 *
1492 * Returns the regmap for the device if one is present, or NULL. If
1493 * name is specified then it must match the name specified when
1494 * registering the device, if it is NULL then the first regmap found
1495 * will be used. Devices with multiple register maps are very rare,
1496 * generic code should normally not need to specify a name.
1497 */
1498struct regmap *dev_get_regmap(struct device *dev, const char *name)
1499{
1500 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1501 dev_get_regmap_match, (void *)name);
1502
1503 if (!r)
1504 return NULL;
1505 return *r;
1506}
1507EXPORT_SYMBOL_GPL(dev_get_regmap);
1508
1509/**
1510 * regmap_get_device() - Obtain the device from a regmap
1511 *
1512 * @map: Register map to operate on.
1513 *
1514 * Returns the underlying device that the regmap has been created for.
1515 */
1516struct device *regmap_get_device(struct regmap *map)
1517{
1518 return map->dev;
1519}
1520EXPORT_SYMBOL_GPL(regmap_get_device);
1521
1522static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1523 struct regmap_range_node *range,
1524 unsigned int val_num)
1525{
1526 void *orig_work_buf;
1527 unsigned int win_offset;
1528 unsigned int win_page;
1529 bool page_chg;
1530 int ret;
1531
1532 win_offset = (*reg - range->range_min) % range->window_len;
1533 win_page = (*reg - range->range_min) / range->window_len;
1534
1535 if (val_num > 1) {
1536 /* Bulk write shouldn't cross range boundary */
1537 if (*reg + val_num - 1 > range->range_max)
1538 return -EINVAL;
1539
1540 /* ... or single page boundary */
1541 if (val_num > range->window_len - win_offset)
1542 return -EINVAL;
1543 }
1544
1545 /* It is possible to have selector register inside data window.
1546 In that case, selector register is located on every page and
1547 it needs no page switching, when accessed alone. */
1548 if (val_num > 1 ||
1549 range->window_start + win_offset != range->selector_reg) {
1550 /* Use separate work_buf during page switching */
1551 orig_work_buf = map->work_buf;
1552 map->work_buf = map->selector_work_buf;
1553
1554 ret = _regmap_update_bits(map, range->selector_reg,
1555 range->selector_mask,
1556 win_page << range->selector_shift,
1557 &page_chg, false);
1558
1559 map->work_buf = orig_work_buf;
1560
1561 if (ret != 0)
1562 return ret;
1563 }
1564
1565 *reg = range->window_start + win_offset;
1566
1567 return 0;
1568}
1569
1570static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1571 unsigned long mask)
1572{
1573 u8 *buf;
1574 int i;
1575
1576 if (!mask || !map->work_buf)
1577 return;
1578
1579 buf = map->work_buf;
1580
1581 for (i = 0; i < max_bytes; i++)
1582 buf[i] |= (mask >> (8 * i)) & 0xff;
1583}
1584
1585static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1586{
1587 reg += map->reg_base;
1588
1589 if (map->format.reg_shift > 0)
1590 reg >>= map->format.reg_shift;
1591 else if (map->format.reg_shift < 0)
1592 reg <<= -(map->format.reg_shift);
1593
1594 return reg;
1595}
1596
1597static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1598 const void *val, size_t val_len, bool noinc)
1599{
1600 struct regmap_range_node *range;
1601 unsigned long flags;
1602 void *work_val = map->work_buf + map->format.reg_bytes +
1603 map->format.pad_bytes;
1604 void *buf;
1605 int ret = -ENOTSUPP;
1606 size_t len;
1607 int i;
1608
1609 /* Check for unwritable or noinc registers in range
1610 * before we start
1611 */
1612 if (!regmap_writeable_noinc(map, reg)) {
1613 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1614 unsigned int element =
1615 reg + regmap_get_offset(map, i);
1616 if (!regmap_writeable(map, element) ||
1617 regmap_writeable_noinc(map, element))
1618 return -EINVAL;
1619 }
1620 }
1621
1622 if (!map->cache_bypass && map->format.parse_val) {
1623 unsigned int ival, offset;
1624 int val_bytes = map->format.val_bytes;
1625
1626 /* Cache the last written value for noinc writes */
1627 i = noinc ? val_len - val_bytes : 0;
1628 for (; i < val_len; i += val_bytes) {
1629 ival = map->format.parse_val(val + i);
1630 offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
1631 ret = regcache_write(map, reg + offset, ival);
1632 if (ret) {
1633 dev_err(map->dev,
1634 "Error in caching of register: %x ret: %d\n",
1635 reg + offset, ret);
1636 return ret;
1637 }
1638 }
1639 if (map->cache_only) {
1640 map->cache_dirty = true;
1641 return 0;
1642 }
1643 }
1644
1645 range = _regmap_range_lookup(map, reg);
1646 if (range) {
1647 int val_num = val_len / map->format.val_bytes;
1648 int win_offset = (reg - range->range_min) % range->window_len;
1649 int win_residue = range->window_len - win_offset;
1650
1651 /* If the write goes beyond the end of the window split it */
1652 while (val_num > win_residue) {
1653 dev_dbg(map->dev, "Writing window %d/%zu\n",
1654 win_residue, val_len / map->format.val_bytes);
1655 ret = _regmap_raw_write_impl(map, reg, val,
1656 win_residue *
1657 map->format.val_bytes, noinc);
1658 if (ret != 0)
1659 return ret;
1660
1661 reg += win_residue;
1662 val_num -= win_residue;
1663 val += win_residue * map->format.val_bytes;
1664 val_len -= win_residue * map->format.val_bytes;
1665
1666 win_offset = (reg - range->range_min) %
1667 range->window_len;
1668 win_residue = range->window_len - win_offset;
1669 }
1670
1671 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1672 if (ret != 0)
1673 return ret;
1674 }
1675
1676 reg = regmap_reg_addr(map, reg);
1677 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1678 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1679 map->write_flag_mask);
1680
1681 /*
1682 * Essentially all I/O mechanisms will be faster with a single
1683 * buffer to write. Since register syncs often generate raw
1684 * writes of single registers optimise that case.
1685 */
1686 if (val != work_val && val_len == map->format.val_bytes) {
1687 memcpy(work_val, val, map->format.val_bytes);
1688 val = work_val;
1689 }
1690
1691 if (map->async && map->bus && map->bus->async_write) {
1692 struct regmap_async *async;
1693
1694 trace_regmap_async_write_start(map, reg, val_len);
1695
1696 spin_lock_irqsave(&map->async_lock, flags);
1697 async = list_first_entry_or_null(&map->async_free,
1698 struct regmap_async,
1699 list);
1700 if (async)
1701 list_del(&async->list);
1702 spin_unlock_irqrestore(&map->async_lock, flags);
1703
1704 if (!async) {
1705 async = map->bus->async_alloc();
1706 if (!async)
1707 return -ENOMEM;
1708
1709 async->work_buf = kzalloc(map->format.buf_size,
1710 GFP_KERNEL | GFP_DMA);
1711 if (!async->work_buf) {
1712 kfree(async);
1713 return -ENOMEM;
1714 }
1715 }
1716
1717 async->map = map;
1718
1719 /* If the caller supplied the value we can use it safely. */
1720 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1721 map->format.reg_bytes + map->format.val_bytes);
1722
1723 spin_lock_irqsave(&map->async_lock, flags);
1724 list_add_tail(&async->list, &map->async_list);
1725 spin_unlock_irqrestore(&map->async_lock, flags);
1726
1727 if (val != work_val)
1728 ret = map->bus->async_write(map->bus_context,
1729 async->work_buf,
1730 map->format.reg_bytes +
1731 map->format.pad_bytes,
1732 val, val_len, async);
1733 else
1734 ret = map->bus->async_write(map->bus_context,
1735 async->work_buf,
1736 map->format.reg_bytes +
1737 map->format.pad_bytes +
1738 val_len, NULL, 0, async);
1739
1740 if (ret != 0) {
1741 dev_err(map->dev, "Failed to schedule write: %d\n",
1742 ret);
1743
1744 spin_lock_irqsave(&map->async_lock, flags);
1745 list_move(&async->list, &map->async_free);
1746 spin_unlock_irqrestore(&map->async_lock, flags);
1747 }
1748
1749 return ret;
1750 }
1751
1752 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1753
1754 /* If we're doing a single register write we can probably just
1755 * send the work_buf directly, otherwise try to do a gather
1756 * write.
1757 */
1758 if (val == work_val)
1759 ret = map->write(map->bus_context, map->work_buf,
1760 map->format.reg_bytes +
1761 map->format.pad_bytes +
1762 val_len);
1763 else if (map->bus && map->bus->gather_write)
1764 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1765 map->format.reg_bytes +
1766 map->format.pad_bytes,
1767 val, val_len);
1768 else
1769 ret = -ENOTSUPP;
1770
1771 /* If that didn't work fall back on linearising by hand. */
1772 if (ret == -ENOTSUPP) {
1773 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1774 buf = kzalloc(len, GFP_KERNEL);
1775 if (!buf)
1776 return -ENOMEM;
1777
1778 memcpy(buf, map->work_buf, map->format.reg_bytes);
1779 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1780 val, val_len);
1781 ret = map->write(map->bus_context, buf, len);
1782
1783 kfree(buf);
1784 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1785 /* regcache_drop_region() takes lock that we already have,
1786 * thus call map->cache_ops->drop() directly
1787 */
1788 if (map->cache_ops && map->cache_ops->drop)
1789 map->cache_ops->drop(map, reg, reg + 1);
1790 }
1791
1792 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1793
1794 return ret;
1795}
1796
1797/**
1798 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1799 *
1800 * @map: Map to check.
1801 */
1802bool regmap_can_raw_write(struct regmap *map)
1803{
1804 return map->write && map->format.format_val && map->format.format_reg;
1805}
1806EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1807
1808/**
1809 * regmap_get_raw_read_max - Get the maximum size we can read
1810 *
1811 * @map: Map to check.
1812 */
1813size_t regmap_get_raw_read_max(struct regmap *map)
1814{
1815 return map->max_raw_read;
1816}
1817EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1818
1819/**
1820 * regmap_get_raw_write_max - Get the maximum size we can read
1821 *
1822 * @map: Map to check.
1823 */
1824size_t regmap_get_raw_write_max(struct regmap *map)
1825{
1826 return map->max_raw_write;
1827}
1828EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1829
1830static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1831 unsigned int val)
1832{
1833 int ret;
1834 struct regmap_range_node *range;
1835 struct regmap *map = context;
1836
1837 WARN_ON(!map->format.format_write);
1838
1839 range = _regmap_range_lookup(map, reg);
1840 if (range) {
1841 ret = _regmap_select_page(map, ®, range, 1);
1842 if (ret != 0)
1843 return ret;
1844 }
1845
1846 reg = regmap_reg_addr(map, reg);
1847 map->format.format_write(map, reg, val);
1848
1849 trace_regmap_hw_write_start(map, reg, 1);
1850
1851 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
1852
1853 trace_regmap_hw_write_done(map, reg, 1);
1854
1855 return ret;
1856}
1857
1858static int _regmap_bus_reg_write(void *context, unsigned int reg,
1859 unsigned int val)
1860{
1861 struct regmap *map = context;
1862 struct regmap_range_node *range;
1863 int ret;
1864
1865 range = _regmap_range_lookup(map, reg);
1866 if (range) {
1867 ret = _regmap_select_page(map, ®, range, 1);
1868 if (ret != 0)
1869 return ret;
1870 }
1871
1872 reg = regmap_reg_addr(map, reg);
1873 return map->bus->reg_write(map->bus_context, reg, val);
1874}
1875
1876static int _regmap_bus_raw_write(void *context, unsigned int reg,
1877 unsigned int val)
1878{
1879 struct regmap *map = context;
1880
1881 WARN_ON(!map->format.format_val);
1882
1883 map->format.format_val(map->work_buf + map->format.reg_bytes
1884 + map->format.pad_bytes, val, 0);
1885 return _regmap_raw_write_impl(map, reg,
1886 map->work_buf +
1887 map->format.reg_bytes +
1888 map->format.pad_bytes,
1889 map->format.val_bytes,
1890 false);
1891}
1892
1893static inline void *_regmap_map_get_context(struct regmap *map)
1894{
1895 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
1896}
1897
1898int _regmap_write(struct regmap *map, unsigned int reg,
1899 unsigned int val)
1900{
1901 int ret;
1902 void *context = _regmap_map_get_context(map);
1903
1904 if (!regmap_writeable(map, reg))
1905 return -EIO;
1906
1907 if (!map->cache_bypass && !map->defer_caching) {
1908 ret = regcache_write(map, reg, val);
1909 if (ret != 0)
1910 return ret;
1911 if (map->cache_only) {
1912 map->cache_dirty = true;
1913 return 0;
1914 }
1915 }
1916
1917 ret = map->reg_write(context, reg, val);
1918 if (ret == 0) {
1919 if (regmap_should_log(map))
1920 dev_info(map->dev, "%x <= %x\n", reg, val);
1921
1922 trace_regmap_reg_write(map, reg, val);
1923 }
1924
1925 return ret;
1926}
1927
1928/**
1929 * regmap_write() - Write a value to a single register
1930 *
1931 * @map: Register map to write to
1932 * @reg: Register to write to
1933 * @val: Value to be written
1934 *
1935 * A value of zero will be returned on success, a negative errno will
1936 * be returned in error cases.
1937 */
1938int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1939{
1940 int ret;
1941
1942 if (!IS_ALIGNED(reg, map->reg_stride))
1943 return -EINVAL;
1944
1945 map->lock(map->lock_arg);
1946
1947 ret = _regmap_write(map, reg, val);
1948
1949 map->unlock(map->lock_arg);
1950
1951 return ret;
1952}
1953EXPORT_SYMBOL_GPL(regmap_write);
1954
1955/**
1956 * regmap_write_async() - Write a value to a single register asynchronously
1957 *
1958 * @map: Register map to write to
1959 * @reg: Register to write to
1960 * @val: Value to be written
1961 *
1962 * A value of zero will be returned on success, a negative errno will
1963 * be returned in error cases.
1964 */
1965int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1966{
1967 int ret;
1968
1969 if (!IS_ALIGNED(reg, map->reg_stride))
1970 return -EINVAL;
1971
1972 map->lock(map->lock_arg);
1973
1974 map->async = true;
1975
1976 ret = _regmap_write(map, reg, val);
1977
1978 map->async = false;
1979
1980 map->unlock(map->lock_arg);
1981
1982 return ret;
1983}
1984EXPORT_SYMBOL_GPL(regmap_write_async);
1985
1986int _regmap_raw_write(struct regmap *map, unsigned int reg,
1987 const void *val, size_t val_len, bool noinc)
1988{
1989 size_t val_bytes = map->format.val_bytes;
1990 size_t val_count = val_len / val_bytes;
1991 size_t chunk_count, chunk_bytes;
1992 size_t chunk_regs = val_count;
1993 int ret, i;
1994
1995 if (!val_count)
1996 return -EINVAL;
1997
1998 if (map->use_single_write)
1999 chunk_regs = 1;
2000 else if (map->max_raw_write && val_len > map->max_raw_write)
2001 chunk_regs = map->max_raw_write / val_bytes;
2002
2003 chunk_count = val_count / chunk_regs;
2004 chunk_bytes = chunk_regs * val_bytes;
2005
2006 /* Write as many bytes as possible with chunk_size */
2007 for (i = 0; i < chunk_count; i++) {
2008 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2009 if (ret)
2010 return ret;
2011
2012 reg += regmap_get_offset(map, chunk_regs);
2013 val += chunk_bytes;
2014 val_len -= chunk_bytes;
2015 }
2016
2017 /* Write remaining bytes */
2018 if (val_len)
2019 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2020
2021 return ret;
2022}
2023
2024/**
2025 * regmap_raw_write() - Write raw values to one or more registers
2026 *
2027 * @map: Register map to write to
2028 * @reg: Initial register to write to
2029 * @val: Block of data to be written, laid out for direct transmission to the
2030 * device
2031 * @val_len: Length of data pointed to by val.
2032 *
2033 * This function is intended to be used for things like firmware
2034 * download where a large block of data needs to be transferred to the
2035 * device. No formatting will be done on the data provided.
2036 *
2037 * A value of zero will be returned on success, a negative errno will
2038 * be returned in error cases.
2039 */
2040int regmap_raw_write(struct regmap *map, unsigned int reg,
2041 const void *val, size_t val_len)
2042{
2043 int ret;
2044
2045 if (!regmap_can_raw_write(map))
2046 return -EINVAL;
2047 if (val_len % map->format.val_bytes)
2048 return -EINVAL;
2049
2050 map->lock(map->lock_arg);
2051
2052 ret = _regmap_raw_write(map, reg, val, val_len, false);
2053
2054 map->unlock(map->lock_arg);
2055
2056 return ret;
2057}
2058EXPORT_SYMBOL_GPL(regmap_raw_write);
2059
2060static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2061 void *val, unsigned int val_len, bool write)
2062{
2063 size_t val_bytes = map->format.val_bytes;
2064 size_t val_count = val_len / val_bytes;
2065 unsigned int lastval;
2066 u8 *u8p;
2067 u16 *u16p;
2068 u32 *u32p;
2069 int ret;
2070 int i;
2071
2072 switch (val_bytes) {
2073 case 1:
2074 u8p = val;
2075 if (write)
2076 lastval = (unsigned int)u8p[val_count - 1];
2077 break;
2078 case 2:
2079 u16p = val;
2080 if (write)
2081 lastval = (unsigned int)u16p[val_count - 1];
2082 break;
2083 case 4:
2084 u32p = val;
2085 if (write)
2086 lastval = (unsigned int)u32p[val_count - 1];
2087 break;
2088 default:
2089 return -EINVAL;
2090 }
2091
2092 /*
2093 * Update the cache with the last value we write, the rest is just
2094 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2095 * sure a single read from the cache will work.
2096 */
2097 if (write) {
2098 if (!map->cache_bypass && !map->defer_caching) {
2099 ret = regcache_write(map, reg, lastval);
2100 if (ret != 0)
2101 return ret;
2102 if (map->cache_only) {
2103 map->cache_dirty = true;
2104 return 0;
2105 }
2106 }
2107 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2108 } else {
2109 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2110 }
2111
2112 if (!ret && regmap_should_log(map)) {
2113 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
2114 for (i = 0; i < val_count; i++) {
2115 switch (val_bytes) {
2116 case 1:
2117 pr_cont("%x", u8p[i]);
2118 break;
2119 case 2:
2120 pr_cont("%x", u16p[i]);
2121 break;
2122 case 4:
2123 pr_cont("%x", u32p[i]);
2124 break;
2125 default:
2126 break;
2127 }
2128 if (i == (val_count - 1))
2129 pr_cont("]\n");
2130 else
2131 pr_cont(",");
2132 }
2133 }
2134
2135 return 0;
2136}
2137
2138/**
2139 * regmap_noinc_write(): Write data to a register without incrementing the
2140 * register number
2141 *
2142 * @map: Register map to write to
2143 * @reg: Register to write to
2144 * @val: Pointer to data buffer
2145 * @val_len: Length of output buffer in bytes.
2146 *
2147 * The regmap API usually assumes that bulk bus write operations will write a
2148 * range of registers. Some devices have certain registers for which a write
2149 * operation can write to an internal FIFO.
2150 *
2151 * The target register must be volatile but registers after it can be
2152 * completely unrelated cacheable registers.
2153 *
2154 * This will attempt multiple writes as required to write val_len bytes.
2155 *
2156 * A value of zero will be returned on success, a negative errno will be
2157 * returned in error cases.
2158 */
2159int regmap_noinc_write(struct regmap *map, unsigned int reg,
2160 const void *val, size_t val_len)
2161{
2162 size_t write_len;
2163 int ret;
2164
2165 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2166 return -EINVAL;
2167 if (val_len % map->format.val_bytes)
2168 return -EINVAL;
2169 if (!IS_ALIGNED(reg, map->reg_stride))
2170 return -EINVAL;
2171 if (val_len == 0)
2172 return -EINVAL;
2173
2174 map->lock(map->lock_arg);
2175
2176 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2177 ret = -EINVAL;
2178 goto out_unlock;
2179 }
2180
2181 /*
2182 * Use the accelerated operation if we can. The val drops the const
2183 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2184 */
2185 if (map->bus->reg_noinc_write) {
2186 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2187 goto out_unlock;
2188 }
2189
2190 while (val_len) {
2191 if (map->max_raw_write && map->max_raw_write < val_len)
2192 write_len = map->max_raw_write;
2193 else
2194 write_len = val_len;
2195 ret = _regmap_raw_write(map, reg, val, write_len, true);
2196 if (ret)
2197 goto out_unlock;
2198 val = ((u8 *)val) + write_len;
2199 val_len -= write_len;
2200 }
2201
2202out_unlock:
2203 map->unlock(map->lock_arg);
2204 return ret;
2205}
2206EXPORT_SYMBOL_GPL(regmap_noinc_write);
2207
2208/**
2209 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2210 * register field.
2211 *
2212 * @field: Register field to write to
2213 * @mask: Bitmask to change
2214 * @val: Value to be written
2215 * @change: Boolean indicating if a write was done
2216 * @async: Boolean indicating asynchronously
2217 * @force: Boolean indicating use force update
2218 *
2219 * Perform a read/modify/write cycle on the register field with change,
2220 * async, force option.
2221 *
2222 * A value of zero will be returned on success, a negative errno will
2223 * be returned in error cases.
2224 */
2225int regmap_field_update_bits_base(struct regmap_field *field,
2226 unsigned int mask, unsigned int val,
2227 bool *change, bool async, bool force)
2228{
2229 mask = (mask << field->shift) & field->mask;
2230
2231 return regmap_update_bits_base(field->regmap, field->reg,
2232 mask, val << field->shift,
2233 change, async, force);
2234}
2235EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2236
2237/**
2238 * regmap_field_test_bits() - Check if all specified bits are set in a
2239 * register field.
2240 *
2241 * @field: Register field to operate on
2242 * @bits: Bits to test
2243 *
2244 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2245 * tested bits is not set and 1 if all tested bits are set.
2246 */
2247int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2248{
2249 unsigned int val, ret;
2250
2251 ret = regmap_field_read(field, &val);
2252 if (ret)
2253 return ret;
2254
2255 return (val & bits) == bits;
2256}
2257EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2258
2259/**
2260 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2261 * register field with port ID
2262 *
2263 * @field: Register field to write to
2264 * @id: port ID
2265 * @mask: Bitmask to change
2266 * @val: Value to be written
2267 * @change: Boolean indicating if a write was done
2268 * @async: Boolean indicating asynchronously
2269 * @force: Boolean indicating use force update
2270 *
2271 * A value of zero will be returned on success, a negative errno will
2272 * be returned in error cases.
2273 */
2274int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2275 unsigned int mask, unsigned int val,
2276 bool *change, bool async, bool force)
2277{
2278 if (id >= field->id_size)
2279 return -EINVAL;
2280
2281 mask = (mask << field->shift) & field->mask;
2282
2283 return regmap_update_bits_base(field->regmap,
2284 field->reg + (field->id_offset * id),
2285 mask, val << field->shift,
2286 change, async, force);
2287}
2288EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2289
2290/**
2291 * regmap_bulk_write() - Write multiple registers to the device
2292 *
2293 * @map: Register map to write to
2294 * @reg: First register to be write from
2295 * @val: Block of data to be written, in native register size for device
2296 * @val_count: Number of registers to write
2297 *
2298 * This function is intended to be used for writing a large block of
2299 * data to the device either in single transfer or multiple transfer.
2300 *
2301 * A value of zero will be returned on success, a negative errno will
2302 * be returned in error cases.
2303 */
2304int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2305 size_t val_count)
2306{
2307 int ret = 0, i;
2308 size_t val_bytes = map->format.val_bytes;
2309
2310 if (!IS_ALIGNED(reg, map->reg_stride))
2311 return -EINVAL;
2312
2313 /*
2314 * Some devices don't support bulk write, for them we have a series of
2315 * single write operations.
2316 */
2317 if (!map->write || !map->format.parse_inplace) {
2318 map->lock(map->lock_arg);
2319 for (i = 0; i < val_count; i++) {
2320 unsigned int ival;
2321
2322 switch (val_bytes) {
2323 case 1:
2324 ival = *(u8 *)(val + (i * val_bytes));
2325 break;
2326 case 2:
2327 ival = *(u16 *)(val + (i * val_bytes));
2328 break;
2329 case 4:
2330 ival = *(u32 *)(val + (i * val_bytes));
2331 break;
2332 default:
2333 ret = -EINVAL;
2334 goto out;
2335 }
2336
2337 ret = _regmap_write(map,
2338 reg + regmap_get_offset(map, i),
2339 ival);
2340 if (ret != 0)
2341 goto out;
2342 }
2343out:
2344 map->unlock(map->lock_arg);
2345 } else {
2346 void *wval;
2347
2348 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2349 if (!wval)
2350 return -ENOMEM;
2351
2352 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2353 map->format.parse_inplace(wval + i);
2354
2355 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2356
2357 kfree(wval);
2358 }
2359
2360 if (!ret)
2361 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2362
2363 return ret;
2364}
2365EXPORT_SYMBOL_GPL(regmap_bulk_write);
2366
2367/*
2368 * _regmap_raw_multi_reg_write()
2369 *
2370 * the (register,newvalue) pairs in regs have not been formatted, but
2371 * they are all in the same page and have been changed to being page
2372 * relative. The page register has been written if that was necessary.
2373 */
2374static int _regmap_raw_multi_reg_write(struct regmap *map,
2375 const struct reg_sequence *regs,
2376 size_t num_regs)
2377{
2378 int ret;
2379 void *buf;
2380 int i;
2381 u8 *u8;
2382 size_t val_bytes = map->format.val_bytes;
2383 size_t reg_bytes = map->format.reg_bytes;
2384 size_t pad_bytes = map->format.pad_bytes;
2385 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2386 size_t len = pair_size * num_regs;
2387
2388 if (!len)
2389 return -EINVAL;
2390
2391 buf = kzalloc(len, GFP_KERNEL);
2392 if (!buf)
2393 return -ENOMEM;
2394
2395 /* We have to linearise by hand. */
2396
2397 u8 = buf;
2398
2399 for (i = 0; i < num_regs; i++) {
2400 unsigned int reg = regs[i].reg;
2401 unsigned int val = regs[i].def;
2402 trace_regmap_hw_write_start(map, reg, 1);
2403 reg = regmap_reg_addr(map, reg);
2404 map->format.format_reg(u8, reg, map->reg_shift);
2405 u8 += reg_bytes + pad_bytes;
2406 map->format.format_val(u8, val, 0);
2407 u8 += val_bytes;
2408 }
2409 u8 = buf;
2410 *u8 |= map->write_flag_mask;
2411
2412 ret = map->write(map->bus_context, buf, len);
2413
2414 kfree(buf);
2415
2416 for (i = 0; i < num_regs; i++) {
2417 int reg = regs[i].reg;
2418 trace_regmap_hw_write_done(map, reg, 1);
2419 }
2420 return ret;
2421}
2422
2423static unsigned int _regmap_register_page(struct regmap *map,
2424 unsigned int reg,
2425 struct regmap_range_node *range)
2426{
2427 unsigned int win_page = (reg - range->range_min) / range->window_len;
2428
2429 return win_page;
2430}
2431
2432static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2433 struct reg_sequence *regs,
2434 size_t num_regs)
2435{
2436 int ret;
2437 int i, n;
2438 struct reg_sequence *base;
2439 unsigned int this_page = 0;
2440 unsigned int page_change = 0;
2441 /*
2442 * the set of registers are not neccessarily in order, but
2443 * since the order of write must be preserved this algorithm
2444 * chops the set each time the page changes. This also applies
2445 * if there is a delay required at any point in the sequence.
2446 */
2447 base = regs;
2448 for (i = 0, n = 0; i < num_regs; i++, n++) {
2449 unsigned int reg = regs[i].reg;
2450 struct regmap_range_node *range;
2451
2452 range = _regmap_range_lookup(map, reg);
2453 if (range) {
2454 unsigned int win_page = _regmap_register_page(map, reg,
2455 range);
2456
2457 if (i == 0)
2458 this_page = win_page;
2459 if (win_page != this_page) {
2460 this_page = win_page;
2461 page_change = 1;
2462 }
2463 }
2464
2465 /* If we have both a page change and a delay make sure to
2466 * write the regs and apply the delay before we change the
2467 * page.
2468 */
2469
2470 if (page_change || regs[i].delay_us) {
2471
2472 /* For situations where the first write requires
2473 * a delay we need to make sure we don't call
2474 * raw_multi_reg_write with n=0
2475 * This can't occur with page breaks as we
2476 * never write on the first iteration
2477 */
2478 if (regs[i].delay_us && i == 0)
2479 n = 1;
2480
2481 ret = _regmap_raw_multi_reg_write(map, base, n);
2482 if (ret != 0)
2483 return ret;
2484
2485 if (regs[i].delay_us) {
2486 if (map->can_sleep)
2487 fsleep(regs[i].delay_us);
2488 else
2489 udelay(regs[i].delay_us);
2490 }
2491
2492 base += n;
2493 n = 0;
2494
2495 if (page_change) {
2496 ret = _regmap_select_page(map,
2497 &base[n].reg,
2498 range, 1);
2499 if (ret != 0)
2500 return ret;
2501
2502 page_change = 0;
2503 }
2504
2505 }
2506
2507 }
2508 if (n > 0)
2509 return _regmap_raw_multi_reg_write(map, base, n);
2510 return 0;
2511}
2512
2513static int _regmap_multi_reg_write(struct regmap *map,
2514 const struct reg_sequence *regs,
2515 size_t num_regs)
2516{
2517 int i;
2518 int ret;
2519
2520 if (!map->can_multi_write) {
2521 for (i = 0; i < num_regs; i++) {
2522 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2523 if (ret != 0)
2524 return ret;
2525
2526 if (regs[i].delay_us) {
2527 if (map->can_sleep)
2528 fsleep(regs[i].delay_us);
2529 else
2530 udelay(regs[i].delay_us);
2531 }
2532 }
2533 return 0;
2534 }
2535
2536 if (!map->format.parse_inplace)
2537 return -EINVAL;
2538
2539 if (map->writeable_reg)
2540 for (i = 0; i < num_regs; i++) {
2541 int reg = regs[i].reg;
2542 if (!map->writeable_reg(map->dev, reg))
2543 return -EINVAL;
2544 if (!IS_ALIGNED(reg, map->reg_stride))
2545 return -EINVAL;
2546 }
2547
2548 if (!map->cache_bypass) {
2549 for (i = 0; i < num_regs; i++) {
2550 unsigned int val = regs[i].def;
2551 unsigned int reg = regs[i].reg;
2552 ret = regcache_write(map, reg, val);
2553 if (ret) {
2554 dev_err(map->dev,
2555 "Error in caching of register: %x ret: %d\n",
2556 reg, ret);
2557 return ret;
2558 }
2559 }
2560 if (map->cache_only) {
2561 map->cache_dirty = true;
2562 return 0;
2563 }
2564 }
2565
2566 WARN_ON(!map->bus);
2567
2568 for (i = 0; i < num_regs; i++) {
2569 unsigned int reg = regs[i].reg;
2570 struct regmap_range_node *range;
2571
2572 /* Coalesce all the writes between a page break or a delay
2573 * in a sequence
2574 */
2575 range = _regmap_range_lookup(map, reg);
2576 if (range || regs[i].delay_us) {
2577 size_t len = sizeof(struct reg_sequence)*num_regs;
2578 struct reg_sequence *base = kmemdup(regs, len,
2579 GFP_KERNEL);
2580 if (!base)
2581 return -ENOMEM;
2582 ret = _regmap_range_multi_paged_reg_write(map, base,
2583 num_regs);
2584 kfree(base);
2585
2586 return ret;
2587 }
2588 }
2589 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2590}
2591
2592/**
2593 * regmap_multi_reg_write() - Write multiple registers to the device
2594 *
2595 * @map: Register map to write to
2596 * @regs: Array of structures containing register,value to be written
2597 * @num_regs: Number of registers to write
2598 *
2599 * Write multiple registers to the device where the set of register, value
2600 * pairs are supplied in any order, possibly not all in a single range.
2601 *
2602 * The 'normal' block write mode will send ultimately send data on the
2603 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2604 * addressed. However, this alternative block multi write mode will send
2605 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2606 * must of course support the mode.
2607 *
2608 * A value of zero will be returned on success, a negative errno will be
2609 * returned in error cases.
2610 */
2611int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2612 int num_regs)
2613{
2614 int ret;
2615
2616 map->lock(map->lock_arg);
2617
2618 ret = _regmap_multi_reg_write(map, regs, num_regs);
2619
2620 map->unlock(map->lock_arg);
2621
2622 return ret;
2623}
2624EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2625
2626/**
2627 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2628 * device but not the cache
2629 *
2630 * @map: Register map to write to
2631 * @regs: Array of structures containing register,value to be written
2632 * @num_regs: Number of registers to write
2633 *
2634 * Write multiple registers to the device but not the cache where the set
2635 * of register are supplied in any order.
2636 *
2637 * This function is intended to be used for writing a large block of data
2638 * atomically to the device in single transfer for those I2C client devices
2639 * that implement this alternative block write mode.
2640 *
2641 * A value of zero will be returned on success, a negative errno will
2642 * be returned in error cases.
2643 */
2644int regmap_multi_reg_write_bypassed(struct regmap *map,
2645 const struct reg_sequence *regs,
2646 int num_regs)
2647{
2648 int ret;
2649 bool bypass;
2650
2651 map->lock(map->lock_arg);
2652
2653 bypass = map->cache_bypass;
2654 map->cache_bypass = true;
2655
2656 ret = _regmap_multi_reg_write(map, regs, num_regs);
2657
2658 map->cache_bypass = bypass;
2659
2660 map->unlock(map->lock_arg);
2661
2662 return ret;
2663}
2664EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2665
2666/**
2667 * regmap_raw_write_async() - Write raw values to one or more registers
2668 * asynchronously
2669 *
2670 * @map: Register map to write to
2671 * @reg: Initial register to write to
2672 * @val: Block of data to be written, laid out for direct transmission to the
2673 * device. Must be valid until regmap_async_complete() is called.
2674 * @val_len: Length of data pointed to by val.
2675 *
2676 * This function is intended to be used for things like firmware
2677 * download where a large block of data needs to be transferred to the
2678 * device. No formatting will be done on the data provided.
2679 *
2680 * If supported by the underlying bus the write will be scheduled
2681 * asynchronously, helping maximise I/O speed on higher speed buses
2682 * like SPI. regmap_async_complete() can be called to ensure that all
2683 * asynchrnous writes have been completed.
2684 *
2685 * A value of zero will be returned on success, a negative errno will
2686 * be returned in error cases.
2687 */
2688int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2689 const void *val, size_t val_len)
2690{
2691 int ret;
2692
2693 if (val_len % map->format.val_bytes)
2694 return -EINVAL;
2695 if (!IS_ALIGNED(reg, map->reg_stride))
2696 return -EINVAL;
2697
2698 map->lock(map->lock_arg);
2699
2700 map->async = true;
2701
2702 ret = _regmap_raw_write(map, reg, val, val_len, false);
2703
2704 map->async = false;
2705
2706 map->unlock(map->lock_arg);
2707
2708 return ret;
2709}
2710EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2711
2712static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2713 unsigned int val_len, bool noinc)
2714{
2715 struct regmap_range_node *range;
2716 int ret;
2717
2718 if (!map->read)
2719 return -EINVAL;
2720
2721 range = _regmap_range_lookup(map, reg);
2722 if (range) {
2723 ret = _regmap_select_page(map, ®, range,
2724 noinc ? 1 : val_len / map->format.val_bytes);
2725 if (ret != 0)
2726 return ret;
2727 }
2728
2729 reg = regmap_reg_addr(map, reg);
2730 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2731 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2732 map->read_flag_mask);
2733 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2734
2735 ret = map->read(map->bus_context, map->work_buf,
2736 map->format.reg_bytes + map->format.pad_bytes,
2737 val, val_len);
2738
2739 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2740
2741 return ret;
2742}
2743
2744static int _regmap_bus_reg_read(void *context, unsigned int reg,
2745 unsigned int *val)
2746{
2747 struct regmap *map = context;
2748 struct regmap_range_node *range;
2749 int ret;
2750
2751 range = _regmap_range_lookup(map, reg);
2752 if (range) {
2753 ret = _regmap_select_page(map, ®, range, 1);
2754 if (ret != 0)
2755 return ret;
2756 }
2757
2758 reg = regmap_reg_addr(map, reg);
2759 return map->bus->reg_read(map->bus_context, reg, val);
2760}
2761
2762static int _regmap_bus_read(void *context, unsigned int reg,
2763 unsigned int *val)
2764{
2765 int ret;
2766 struct regmap *map = context;
2767 void *work_val = map->work_buf + map->format.reg_bytes +
2768 map->format.pad_bytes;
2769
2770 if (!map->format.parse_val)
2771 return -EINVAL;
2772
2773 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2774 if (ret == 0)
2775 *val = map->format.parse_val(work_val);
2776
2777 return ret;
2778}
2779
2780static int _regmap_read(struct regmap *map, unsigned int reg,
2781 unsigned int *val)
2782{
2783 int ret;
2784 void *context = _regmap_map_get_context(map);
2785
2786 if (!map->cache_bypass) {
2787 ret = regcache_read(map, reg, val);
2788 if (ret == 0)
2789 return 0;
2790 }
2791
2792 if (map->cache_only)
2793 return -EBUSY;
2794
2795 if (!regmap_readable(map, reg))
2796 return -EIO;
2797
2798 ret = map->reg_read(context, reg, val);
2799 if (ret == 0) {
2800 if (regmap_should_log(map))
2801 dev_info(map->dev, "%x => %x\n", reg, *val);
2802
2803 trace_regmap_reg_read(map, reg, *val);
2804
2805 if (!map->cache_bypass)
2806 regcache_write(map, reg, *val);
2807 }
2808
2809 return ret;
2810}
2811
2812/**
2813 * regmap_read() - Read a value from a single register
2814 *
2815 * @map: Register map to read from
2816 * @reg: Register to be read from
2817 * @val: Pointer to store read value
2818 *
2819 * A value of zero will be returned on success, a negative errno will
2820 * be returned in error cases.
2821 */
2822int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2823{
2824 int ret;
2825
2826 if (!IS_ALIGNED(reg, map->reg_stride))
2827 return -EINVAL;
2828
2829 map->lock(map->lock_arg);
2830
2831 ret = _regmap_read(map, reg, val);
2832
2833 map->unlock(map->lock_arg);
2834
2835 return ret;
2836}
2837EXPORT_SYMBOL_GPL(regmap_read);
2838
2839/**
2840 * regmap_raw_read() - Read raw data from the device
2841 *
2842 * @map: Register map to read from
2843 * @reg: First register to be read from
2844 * @val: Pointer to store read value
2845 * @val_len: Size of data to read
2846 *
2847 * A value of zero will be returned on success, a negative errno will
2848 * be returned in error cases.
2849 */
2850int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2851 size_t val_len)
2852{
2853 size_t val_bytes = map->format.val_bytes;
2854 size_t val_count = val_len / val_bytes;
2855 unsigned int v;
2856 int ret, i;
2857
2858 if (val_len % map->format.val_bytes)
2859 return -EINVAL;
2860 if (!IS_ALIGNED(reg, map->reg_stride))
2861 return -EINVAL;
2862 if (val_count == 0)
2863 return -EINVAL;
2864
2865 map->lock(map->lock_arg);
2866
2867 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2868 map->cache_type == REGCACHE_NONE) {
2869 size_t chunk_count, chunk_bytes;
2870 size_t chunk_regs = val_count;
2871
2872 if (!map->cache_bypass && map->cache_only) {
2873 ret = -EBUSY;
2874 goto out;
2875 }
2876
2877 if (!map->read) {
2878 ret = -ENOTSUPP;
2879 goto out;
2880 }
2881
2882 if (map->use_single_read)
2883 chunk_regs = 1;
2884 else if (map->max_raw_read && val_len > map->max_raw_read)
2885 chunk_regs = map->max_raw_read / val_bytes;
2886
2887 chunk_count = val_count / chunk_regs;
2888 chunk_bytes = chunk_regs * val_bytes;
2889
2890 /* Read bytes that fit into whole chunks */
2891 for (i = 0; i < chunk_count; i++) {
2892 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2893 if (ret != 0)
2894 goto out;
2895
2896 reg += regmap_get_offset(map, chunk_regs);
2897 val += chunk_bytes;
2898 val_len -= chunk_bytes;
2899 }
2900
2901 /* Read remaining bytes */
2902 if (val_len) {
2903 ret = _regmap_raw_read(map, reg, val, val_len, false);
2904 if (ret != 0)
2905 goto out;
2906 }
2907 } else {
2908 /* Otherwise go word by word for the cache; should be low
2909 * cost as we expect to hit the cache.
2910 */
2911 for (i = 0; i < val_count; i++) {
2912 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2913 &v);
2914 if (ret != 0)
2915 goto out;
2916
2917 map->format.format_val(val + (i * val_bytes), v, 0);
2918 }
2919 }
2920
2921 out:
2922 map->unlock(map->lock_arg);
2923
2924 return ret;
2925}
2926EXPORT_SYMBOL_GPL(regmap_raw_read);
2927
2928/**
2929 * regmap_noinc_read(): Read data from a register without incrementing the
2930 * register number
2931 *
2932 * @map: Register map to read from
2933 * @reg: Register to read from
2934 * @val: Pointer to data buffer
2935 * @val_len: Length of output buffer in bytes.
2936 *
2937 * The regmap API usually assumes that bulk read operations will read a
2938 * range of registers. Some devices have certain registers for which a read
2939 * operation read will read from an internal FIFO.
2940 *
2941 * The target register must be volatile but registers after it can be
2942 * completely unrelated cacheable registers.
2943 *
2944 * This will attempt multiple reads as required to read val_len bytes.
2945 *
2946 * A value of zero will be returned on success, a negative errno will be
2947 * returned in error cases.
2948 */
2949int regmap_noinc_read(struct regmap *map, unsigned int reg,
2950 void *val, size_t val_len)
2951{
2952 size_t read_len;
2953 int ret;
2954
2955 if (!map->read)
2956 return -ENOTSUPP;
2957
2958 if (val_len % map->format.val_bytes)
2959 return -EINVAL;
2960 if (!IS_ALIGNED(reg, map->reg_stride))
2961 return -EINVAL;
2962 if (val_len == 0)
2963 return -EINVAL;
2964
2965 map->lock(map->lock_arg);
2966
2967 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2968 ret = -EINVAL;
2969 goto out_unlock;
2970 }
2971
2972 /*
2973 * We have not defined the FIFO semantics for cache, as the
2974 * cache is just one value deep. Should we return the last
2975 * written value? Just avoid this by always reading the FIFO
2976 * even when using cache. Cache only will not work.
2977 */
2978 if (!map->cache_bypass && map->cache_only) {
2979 ret = -EBUSY;
2980 goto out_unlock;
2981 }
2982
2983 /* Use the accelerated operation if we can */
2984 if (map->bus->reg_noinc_read) {
2985 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
2986 goto out_unlock;
2987 }
2988
2989 while (val_len) {
2990 if (map->max_raw_read && map->max_raw_read < val_len)
2991 read_len = map->max_raw_read;
2992 else
2993 read_len = val_len;
2994 ret = _regmap_raw_read(map, reg, val, read_len, true);
2995 if (ret)
2996 goto out_unlock;
2997 val = ((u8 *)val) + read_len;
2998 val_len -= read_len;
2999 }
3000
3001out_unlock:
3002 map->unlock(map->lock_arg);
3003 return ret;
3004}
3005EXPORT_SYMBOL_GPL(regmap_noinc_read);
3006
3007/**
3008 * regmap_field_read(): Read a value to a single register field
3009 *
3010 * @field: Register field to read from
3011 * @val: Pointer to store read value
3012 *
3013 * A value of zero will be returned on success, a negative errno will
3014 * be returned in error cases.
3015 */
3016int regmap_field_read(struct regmap_field *field, unsigned int *val)
3017{
3018 int ret;
3019 unsigned int reg_val;
3020 ret = regmap_read(field->regmap, field->reg, ®_val);
3021 if (ret != 0)
3022 return ret;
3023
3024 reg_val &= field->mask;
3025 reg_val >>= field->shift;
3026 *val = reg_val;
3027
3028 return ret;
3029}
3030EXPORT_SYMBOL_GPL(regmap_field_read);
3031
3032/**
3033 * regmap_fields_read() - Read a value to a single register field with port ID
3034 *
3035 * @field: Register field to read from
3036 * @id: port ID
3037 * @val: Pointer to store read value
3038 *
3039 * A value of zero will be returned on success, a negative errno will
3040 * be returned in error cases.
3041 */
3042int regmap_fields_read(struct regmap_field *field, unsigned int id,
3043 unsigned int *val)
3044{
3045 int ret;
3046 unsigned int reg_val;
3047
3048 if (id >= field->id_size)
3049 return -EINVAL;
3050
3051 ret = regmap_read(field->regmap,
3052 field->reg + (field->id_offset * id),
3053 ®_val);
3054 if (ret != 0)
3055 return ret;
3056
3057 reg_val &= field->mask;
3058 reg_val >>= field->shift;
3059 *val = reg_val;
3060
3061 return ret;
3062}
3063EXPORT_SYMBOL_GPL(regmap_fields_read);
3064
3065/**
3066 * regmap_bulk_read() - Read multiple registers from the device
3067 *
3068 * @map: Register map to read from
3069 * @reg: First register to be read from
3070 * @val: Pointer to store read value, in native register size for device
3071 * @val_count: Number of registers to read
3072 *
3073 * A value of zero will be returned on success, a negative errno will
3074 * be returned in error cases.
3075 */
3076int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3077 size_t val_count)
3078{
3079 int ret, i;
3080 size_t val_bytes = map->format.val_bytes;
3081 bool vol = regmap_volatile_range(map, reg, val_count);
3082
3083 if (!IS_ALIGNED(reg, map->reg_stride))
3084 return -EINVAL;
3085 if (val_count == 0)
3086 return -EINVAL;
3087
3088 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
3089 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3090 if (ret != 0)
3091 return ret;
3092
3093 for (i = 0; i < val_count * val_bytes; i += val_bytes)
3094 map->format.parse_inplace(val + i);
3095 } else {
3096 u32 *u32 = val;
3097 u16 *u16 = val;
3098 u8 *u8 = val;
3099
3100 map->lock(map->lock_arg);
3101
3102 for (i = 0; i < val_count; i++) {
3103 unsigned int ival;
3104
3105 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
3106 &ival);
3107 if (ret != 0)
3108 goto out;
3109
3110 switch (map->format.val_bytes) {
3111 case 4:
3112 u32[i] = ival;
3113 break;
3114 case 2:
3115 u16[i] = ival;
3116 break;
3117 case 1:
3118 u8[i] = ival;
3119 break;
3120 default:
3121 ret = -EINVAL;
3122 goto out;
3123 }
3124 }
3125
3126out:
3127 map->unlock(map->lock_arg);
3128 }
3129
3130 if (!ret)
3131 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
3132
3133 return ret;
3134}
3135EXPORT_SYMBOL_GPL(regmap_bulk_read);
3136
3137static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3138 unsigned int mask, unsigned int val,
3139 bool *change, bool force_write)
3140{
3141 int ret;
3142 unsigned int tmp, orig;
3143
3144 if (change)
3145 *change = false;
3146
3147 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3148 reg = regmap_reg_addr(map, reg);
3149 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3150 if (ret == 0 && change)
3151 *change = true;
3152 } else {
3153 ret = _regmap_read(map, reg, &orig);
3154 if (ret != 0)
3155 return ret;
3156
3157 tmp = orig & ~mask;
3158 tmp |= val & mask;
3159
3160 if (force_write || (tmp != orig) || map->force_write_field) {
3161 ret = _regmap_write(map, reg, tmp);
3162 if (ret == 0 && change)
3163 *change = true;
3164 }
3165 }
3166
3167 return ret;
3168}
3169
3170/**
3171 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3172 *
3173 * @map: Register map to update
3174 * @reg: Register to update
3175 * @mask: Bitmask to change
3176 * @val: New value for bitmask
3177 * @change: Boolean indicating if a write was done
3178 * @async: Boolean indicating asynchronously
3179 * @force: Boolean indicating use force update
3180 *
3181 * Perform a read/modify/write cycle on a register map with change, async, force
3182 * options.
3183 *
3184 * If async is true:
3185 *
3186 * With most buses the read must be done synchronously so this is most useful
3187 * for devices with a cache which do not need to interact with the hardware to
3188 * determine the current register value.
3189 *
3190 * Returns zero for success, a negative number on error.
3191 */
3192int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3193 unsigned int mask, unsigned int val,
3194 bool *change, bool async, bool force)
3195{
3196 int ret;
3197
3198 map->lock(map->lock_arg);
3199
3200 map->async = async;
3201
3202 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3203
3204 map->async = false;
3205
3206 map->unlock(map->lock_arg);
3207
3208 return ret;
3209}
3210EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3211
3212/**
3213 * regmap_test_bits() - Check if all specified bits are set in a register.
3214 *
3215 * @map: Register map to operate on
3216 * @reg: Register to read from
3217 * @bits: Bits to test
3218 *
3219 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3220 * bits are set and a negative error number if the underlying regmap_read()
3221 * fails.
3222 */
3223int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3224{
3225 unsigned int val, ret;
3226
3227 ret = regmap_read(map, reg, &val);
3228 if (ret)
3229 return ret;
3230
3231 return (val & bits) == bits;
3232}
3233EXPORT_SYMBOL_GPL(regmap_test_bits);
3234
3235void regmap_async_complete_cb(struct regmap_async *async, int ret)
3236{
3237 struct regmap *map = async->map;
3238 bool wake;
3239
3240 trace_regmap_async_io_complete(map);
3241
3242 spin_lock(&map->async_lock);
3243 list_move(&async->list, &map->async_free);
3244 wake = list_empty(&map->async_list);
3245
3246 if (ret != 0)
3247 map->async_ret = ret;
3248
3249 spin_unlock(&map->async_lock);
3250
3251 if (wake)
3252 wake_up(&map->async_waitq);
3253}
3254EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3255
3256static int regmap_async_is_done(struct regmap *map)
3257{
3258 unsigned long flags;
3259 int ret;
3260
3261 spin_lock_irqsave(&map->async_lock, flags);
3262 ret = list_empty(&map->async_list);
3263 spin_unlock_irqrestore(&map->async_lock, flags);
3264
3265 return ret;
3266}
3267
3268/**
3269 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3270 *
3271 * @map: Map to operate on.
3272 *
3273 * Blocks until any pending asynchronous I/O has completed. Returns
3274 * an error code for any failed I/O operations.
3275 */
3276int regmap_async_complete(struct regmap *map)
3277{
3278 unsigned long flags;
3279 int ret;
3280
3281 /* Nothing to do with no async support */
3282 if (!map->bus || !map->bus->async_write)
3283 return 0;
3284
3285 trace_regmap_async_complete_start(map);
3286
3287 wait_event(map->async_waitq, regmap_async_is_done(map));
3288
3289 spin_lock_irqsave(&map->async_lock, flags);
3290 ret = map->async_ret;
3291 map->async_ret = 0;
3292 spin_unlock_irqrestore(&map->async_lock, flags);
3293
3294 trace_regmap_async_complete_done(map);
3295
3296 return ret;
3297}
3298EXPORT_SYMBOL_GPL(regmap_async_complete);
3299
3300/**
3301 * regmap_register_patch - Register and apply register updates to be applied
3302 * on device initialistion
3303 *
3304 * @map: Register map to apply updates to.
3305 * @regs: Values to update.
3306 * @num_regs: Number of entries in regs.
3307 *
3308 * Register a set of register updates to be applied to the device
3309 * whenever the device registers are synchronised with the cache and
3310 * apply them immediately. Typically this is used to apply
3311 * corrections to be applied to the device defaults on startup, such
3312 * as the updates some vendors provide to undocumented registers.
3313 *
3314 * The caller must ensure that this function cannot be called
3315 * concurrently with either itself or regcache_sync().
3316 */
3317int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3318 int num_regs)
3319{
3320 struct reg_sequence *p;
3321 int ret;
3322 bool bypass;
3323
3324 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3325 num_regs))
3326 return 0;
3327
3328 p = krealloc(map->patch,
3329 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3330 GFP_KERNEL);
3331 if (p) {
3332 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3333 map->patch = p;
3334 map->patch_regs += num_regs;
3335 } else {
3336 return -ENOMEM;
3337 }
3338
3339 map->lock(map->lock_arg);
3340
3341 bypass = map->cache_bypass;
3342
3343 map->cache_bypass = true;
3344 map->async = true;
3345
3346 ret = _regmap_multi_reg_write(map, regs, num_regs);
3347
3348 map->async = false;
3349 map->cache_bypass = bypass;
3350
3351 map->unlock(map->lock_arg);
3352
3353 regmap_async_complete(map);
3354
3355 return ret;
3356}
3357EXPORT_SYMBOL_GPL(regmap_register_patch);
3358
3359/**
3360 * regmap_get_val_bytes() - Report the size of a register value
3361 *
3362 * @map: Register map to operate on.
3363 *
3364 * Report the size of a register value, mainly intended to for use by
3365 * generic infrastructure built on top of regmap.
3366 */
3367int regmap_get_val_bytes(struct regmap *map)
3368{
3369 if (map->format.format_write)
3370 return -EINVAL;
3371
3372 return map->format.val_bytes;
3373}
3374EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3375
3376/**
3377 * regmap_get_max_register() - Report the max register value
3378 *
3379 * @map: Register map to operate on.
3380 *
3381 * Report the max register value, mainly intended to for use by
3382 * generic infrastructure built on top of regmap.
3383 */
3384int regmap_get_max_register(struct regmap *map)
3385{
3386 return map->max_register ? map->max_register : -EINVAL;
3387}
3388EXPORT_SYMBOL_GPL(regmap_get_max_register);
3389
3390/**
3391 * regmap_get_reg_stride() - Report the register address stride
3392 *
3393 * @map: Register map to operate on.
3394 *
3395 * Report the register address stride, mainly intended to for use by
3396 * generic infrastructure built on top of regmap.
3397 */
3398int regmap_get_reg_stride(struct regmap *map)
3399{
3400 return map->reg_stride;
3401}
3402EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3403
3404/**
3405 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3406 *
3407 * @map: Register map to operate on.
3408 *
3409 * Returns true if an access to the register might sleep, else false.
3410 */
3411bool regmap_might_sleep(struct regmap *map)
3412{
3413 return map->can_sleep;
3414}
3415EXPORT_SYMBOL_GPL(regmap_might_sleep);
3416
3417int regmap_parse_val(struct regmap *map, const void *buf,
3418 unsigned int *val)
3419{
3420 if (!map->format.parse_val)
3421 return -EINVAL;
3422
3423 *val = map->format.parse_val(buf);
3424
3425 return 0;
3426}
3427EXPORT_SYMBOL_GPL(regmap_parse_val);
3428
3429static int __init regmap_initcall(void)
3430{
3431 regmap_debugfs_initcall();
3432
3433 return 0;
3434}
3435postcore_initcall(regmap_initcall);
1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
8
9#include <linux/device.h>
10#include <linux/slab.h>
11#include <linux/export.h>
12#include <linux/mutex.h>
13#include <linux/err.h>
14#include <linux/property.h>
15#include <linux/rbtree.h>
16#include <linux/sched.h>
17#include <linux/delay.h>
18#include <linux/log2.h>
19#include <linux/hwspinlock.h>
20#include <asm/unaligned.h>
21
22#define CREATE_TRACE_POINTS
23#include "trace.h"
24
25#include "internal.h"
26
27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
47 bool *change, bool force_write);
48
49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
59
60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
88EXPORT_SYMBOL_GPL(regmap_check_range_table);
89
90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
92 if (map->max_register && reg > map->max_register)
93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
98 if (map->wr_table)
99 return regmap_check_range_table(map, reg, map->wr_table);
100
101 return true;
102}
103
104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
109 if (map->cache_type == REGCACHE_NONE)
110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
115 if (map->max_register && reg > map->max_register)
116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
129 if (!map->reg_read)
130 return false;
131
132 if (map->max_register && reg > map->max_register)
133 return false;
134
135 if (map->format.format_write)
136 return false;
137
138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
141 if (map->rd_table)
142 return regmap_check_range_table(map, reg, map->rd_table);
143
144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
149 if (!map->format.format_write && !regmap_readable(map, reg))
150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
155 if (map->volatile_table)
156 return regmap_check_range_table(map, reg, map->volatile_table);
157
158 if (map->cache_ops)
159 return false;
160 else
161 return true;
162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
166 if (!regmap_readable(map, reg))
167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
172 if (map->precious_table)
173 return regmap_check_range_table(map, reg, map->precious_table);
174
175 return false;
176}
177
178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
201 size_t num)
202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
207 return false;
208
209 return true;
210}
211
212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
267{
268 u8 *b = buf;
269
270 b[0] = val << shift;
271}
272
273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
274{
275 put_unaligned_be16(val << shift, buf);
276}
277
278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
280 put_unaligned_le16(val << shift, buf);
281}
282
283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
289}
290
291static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
292{
293 u8 *b = buf;
294
295 val <<= shift;
296
297 b[0] = val >> 16;
298 b[1] = val >> 8;
299 b[2] = val;
300}
301
302static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
303{
304 put_unaligned_be32(val << shift, buf);
305}
306
307static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
308{
309 put_unaligned_le32(val << shift, buf);
310}
311
312static void regmap_format_32_native(void *buf, unsigned int val,
313 unsigned int shift)
314{
315 u32 v = val << shift;
316
317 memcpy(buf, &v, sizeof(v));
318}
319
320#ifdef CONFIG_64BIT
321static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift)
322{
323 put_unaligned_be64((u64) val << shift, buf);
324}
325
326static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift)
327{
328 put_unaligned_le64((u64) val << shift, buf);
329}
330
331static void regmap_format_64_native(void *buf, unsigned int val,
332 unsigned int shift)
333{
334 u64 v = (u64) val << shift;
335
336 memcpy(buf, &v, sizeof(v));
337}
338#endif
339
340static void regmap_parse_inplace_noop(void *buf)
341{
342}
343
344static unsigned int regmap_parse_8(const void *buf)
345{
346 const u8 *b = buf;
347
348 return b[0];
349}
350
351static unsigned int regmap_parse_16_be(const void *buf)
352{
353 return get_unaligned_be16(buf);
354}
355
356static unsigned int regmap_parse_16_le(const void *buf)
357{
358 return get_unaligned_le16(buf);
359}
360
361static void regmap_parse_16_be_inplace(void *buf)
362{
363 u16 v = get_unaligned_be16(buf);
364
365 memcpy(buf, &v, sizeof(v));
366}
367
368static void regmap_parse_16_le_inplace(void *buf)
369{
370 u16 v = get_unaligned_le16(buf);
371
372 memcpy(buf, &v, sizeof(v));
373}
374
375static unsigned int regmap_parse_16_native(const void *buf)
376{
377 u16 v;
378
379 memcpy(&v, buf, sizeof(v));
380 return v;
381}
382
383static unsigned int regmap_parse_24(const void *buf)
384{
385 const u8 *b = buf;
386 unsigned int ret = b[2];
387 ret |= ((unsigned int)b[1]) << 8;
388 ret |= ((unsigned int)b[0]) << 16;
389
390 return ret;
391}
392
393static unsigned int regmap_parse_32_be(const void *buf)
394{
395 return get_unaligned_be32(buf);
396}
397
398static unsigned int regmap_parse_32_le(const void *buf)
399{
400 return get_unaligned_le32(buf);
401}
402
403static void regmap_parse_32_be_inplace(void *buf)
404{
405 u32 v = get_unaligned_be32(buf);
406
407 memcpy(buf, &v, sizeof(v));
408}
409
410static void regmap_parse_32_le_inplace(void *buf)
411{
412 u32 v = get_unaligned_le32(buf);
413
414 memcpy(buf, &v, sizeof(v));
415}
416
417static unsigned int regmap_parse_32_native(const void *buf)
418{
419 u32 v;
420
421 memcpy(&v, buf, sizeof(v));
422 return v;
423}
424
425#ifdef CONFIG_64BIT
426static unsigned int regmap_parse_64_be(const void *buf)
427{
428 return get_unaligned_be64(buf);
429}
430
431static unsigned int regmap_parse_64_le(const void *buf)
432{
433 return get_unaligned_le64(buf);
434}
435
436static void regmap_parse_64_be_inplace(void *buf)
437{
438 u64 v = get_unaligned_be64(buf);
439
440 memcpy(buf, &v, sizeof(v));
441}
442
443static void regmap_parse_64_le_inplace(void *buf)
444{
445 u64 v = get_unaligned_le64(buf);
446
447 memcpy(buf, &v, sizeof(v));
448}
449
450static unsigned int regmap_parse_64_native(const void *buf)
451{
452 u64 v;
453
454 memcpy(&v, buf, sizeof(v));
455 return v;
456}
457#endif
458
459static void regmap_lock_hwlock(void *__map)
460{
461 struct regmap *map = __map;
462
463 hwspin_lock_timeout(map->hwlock, UINT_MAX);
464}
465
466static void regmap_lock_hwlock_irq(void *__map)
467{
468 struct regmap *map = __map;
469
470 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
471}
472
473static void regmap_lock_hwlock_irqsave(void *__map)
474{
475 struct regmap *map = __map;
476
477 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
478 &map->spinlock_flags);
479}
480
481static void regmap_unlock_hwlock(void *__map)
482{
483 struct regmap *map = __map;
484
485 hwspin_unlock(map->hwlock);
486}
487
488static void regmap_unlock_hwlock_irq(void *__map)
489{
490 struct regmap *map = __map;
491
492 hwspin_unlock_irq(map->hwlock);
493}
494
495static void regmap_unlock_hwlock_irqrestore(void *__map)
496{
497 struct regmap *map = __map;
498
499 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
500}
501
502static void regmap_lock_unlock_none(void *__map)
503{
504
505}
506
507static void regmap_lock_mutex(void *__map)
508{
509 struct regmap *map = __map;
510 mutex_lock(&map->mutex);
511}
512
513static void regmap_unlock_mutex(void *__map)
514{
515 struct regmap *map = __map;
516 mutex_unlock(&map->mutex);
517}
518
519static void regmap_lock_spinlock(void *__map)
520__acquires(&map->spinlock)
521{
522 struct regmap *map = __map;
523 unsigned long flags;
524
525 spin_lock_irqsave(&map->spinlock, flags);
526 map->spinlock_flags = flags;
527}
528
529static void regmap_unlock_spinlock(void *__map)
530__releases(&map->spinlock)
531{
532 struct regmap *map = __map;
533 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
534}
535
536static void dev_get_regmap_release(struct device *dev, void *res)
537{
538 /*
539 * We don't actually have anything to do here; the goal here
540 * is not to manage the regmap but to provide a simple way to
541 * get the regmap back given a struct device.
542 */
543}
544
545static bool _regmap_range_add(struct regmap *map,
546 struct regmap_range_node *data)
547{
548 struct rb_root *root = &map->range_tree;
549 struct rb_node **new = &(root->rb_node), *parent = NULL;
550
551 while (*new) {
552 struct regmap_range_node *this =
553 rb_entry(*new, struct regmap_range_node, node);
554
555 parent = *new;
556 if (data->range_max < this->range_min)
557 new = &((*new)->rb_left);
558 else if (data->range_min > this->range_max)
559 new = &((*new)->rb_right);
560 else
561 return false;
562 }
563
564 rb_link_node(&data->node, parent, new);
565 rb_insert_color(&data->node, root);
566
567 return true;
568}
569
570static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
571 unsigned int reg)
572{
573 struct rb_node *node = map->range_tree.rb_node;
574
575 while (node) {
576 struct regmap_range_node *this =
577 rb_entry(node, struct regmap_range_node, node);
578
579 if (reg < this->range_min)
580 node = node->rb_left;
581 else if (reg > this->range_max)
582 node = node->rb_right;
583 else
584 return this;
585 }
586
587 return NULL;
588}
589
590static void regmap_range_exit(struct regmap *map)
591{
592 struct rb_node *next;
593 struct regmap_range_node *range_node;
594
595 next = rb_first(&map->range_tree);
596 while (next) {
597 range_node = rb_entry(next, struct regmap_range_node, node);
598 next = rb_next(&range_node->node);
599 rb_erase(&range_node->node, &map->range_tree);
600 kfree(range_node);
601 }
602
603 kfree(map->selector_work_buf);
604}
605
606static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
607{
608 if (config->name) {
609 const char *name = kstrdup_const(config->name, GFP_KERNEL);
610
611 if (!name)
612 return -ENOMEM;
613
614 kfree_const(map->name);
615 map->name = name;
616 }
617
618 return 0;
619}
620
621int regmap_attach_dev(struct device *dev, struct regmap *map,
622 const struct regmap_config *config)
623{
624 struct regmap **m;
625 int ret;
626
627 map->dev = dev;
628
629 ret = regmap_set_name(map, config);
630 if (ret)
631 return ret;
632
633 regmap_debugfs_init(map);
634
635 /* Add a devres resource for dev_get_regmap() */
636 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
637 if (!m) {
638 regmap_debugfs_exit(map);
639 return -ENOMEM;
640 }
641 *m = map;
642 devres_add(dev, m);
643
644 return 0;
645}
646EXPORT_SYMBOL_GPL(regmap_attach_dev);
647
648static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
649 const struct regmap_config *config)
650{
651 enum regmap_endian endian;
652
653 /* Retrieve the endianness specification from the regmap config */
654 endian = config->reg_format_endian;
655
656 /* If the regmap config specified a non-default value, use that */
657 if (endian != REGMAP_ENDIAN_DEFAULT)
658 return endian;
659
660 /* Retrieve the endianness specification from the bus config */
661 if (bus && bus->reg_format_endian_default)
662 endian = bus->reg_format_endian_default;
663
664 /* If the bus specified a non-default value, use that */
665 if (endian != REGMAP_ENDIAN_DEFAULT)
666 return endian;
667
668 /* Use this if no other value was found */
669 return REGMAP_ENDIAN_BIG;
670}
671
672enum regmap_endian regmap_get_val_endian(struct device *dev,
673 const struct regmap_bus *bus,
674 const struct regmap_config *config)
675{
676 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
677 enum regmap_endian endian;
678
679 /* Retrieve the endianness specification from the regmap config */
680 endian = config->val_format_endian;
681
682 /* If the regmap config specified a non-default value, use that */
683 if (endian != REGMAP_ENDIAN_DEFAULT)
684 return endian;
685
686 /* If the firmware node exist try to get endianness from it */
687 if (fwnode_property_read_bool(fwnode, "big-endian"))
688 endian = REGMAP_ENDIAN_BIG;
689 else if (fwnode_property_read_bool(fwnode, "little-endian"))
690 endian = REGMAP_ENDIAN_LITTLE;
691 else if (fwnode_property_read_bool(fwnode, "native-endian"))
692 endian = REGMAP_ENDIAN_NATIVE;
693
694 /* If the endianness was specified in fwnode, use that */
695 if (endian != REGMAP_ENDIAN_DEFAULT)
696 return endian;
697
698 /* Retrieve the endianness specification from the bus config */
699 if (bus && bus->val_format_endian_default)
700 endian = bus->val_format_endian_default;
701
702 /* If the bus specified a non-default value, use that */
703 if (endian != REGMAP_ENDIAN_DEFAULT)
704 return endian;
705
706 /* Use this if no other value was found */
707 return REGMAP_ENDIAN_BIG;
708}
709EXPORT_SYMBOL_GPL(regmap_get_val_endian);
710
711struct regmap *__regmap_init(struct device *dev,
712 const struct regmap_bus *bus,
713 void *bus_context,
714 const struct regmap_config *config,
715 struct lock_class_key *lock_key,
716 const char *lock_name)
717{
718 struct regmap *map;
719 int ret = -EINVAL;
720 enum regmap_endian reg_endian, val_endian;
721 int i, j;
722
723 if (!config)
724 goto err;
725
726 map = kzalloc(sizeof(*map), GFP_KERNEL);
727 if (map == NULL) {
728 ret = -ENOMEM;
729 goto err;
730 }
731
732 ret = regmap_set_name(map, config);
733 if (ret)
734 goto err_map;
735
736 ret = -EINVAL; /* Later error paths rely on this */
737
738 if (config->disable_locking) {
739 map->lock = map->unlock = regmap_lock_unlock_none;
740 map->can_sleep = config->can_sleep;
741 regmap_debugfs_disable(map);
742 } else if (config->lock && config->unlock) {
743 map->lock = config->lock;
744 map->unlock = config->unlock;
745 map->lock_arg = config->lock_arg;
746 map->can_sleep = config->can_sleep;
747 } else if (config->use_hwlock) {
748 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
749 if (!map->hwlock) {
750 ret = -ENXIO;
751 goto err_name;
752 }
753
754 switch (config->hwlock_mode) {
755 case HWLOCK_IRQSTATE:
756 map->lock = regmap_lock_hwlock_irqsave;
757 map->unlock = regmap_unlock_hwlock_irqrestore;
758 break;
759 case HWLOCK_IRQ:
760 map->lock = regmap_lock_hwlock_irq;
761 map->unlock = regmap_unlock_hwlock_irq;
762 break;
763 default:
764 map->lock = regmap_lock_hwlock;
765 map->unlock = regmap_unlock_hwlock;
766 break;
767 }
768
769 map->lock_arg = map;
770 } else {
771 if ((bus && bus->fast_io) ||
772 config->fast_io) {
773 spin_lock_init(&map->spinlock);
774 map->lock = regmap_lock_spinlock;
775 map->unlock = regmap_unlock_spinlock;
776 lockdep_set_class_and_name(&map->spinlock,
777 lock_key, lock_name);
778 } else {
779 mutex_init(&map->mutex);
780 map->lock = regmap_lock_mutex;
781 map->unlock = regmap_unlock_mutex;
782 map->can_sleep = true;
783 lockdep_set_class_and_name(&map->mutex,
784 lock_key, lock_name);
785 }
786 map->lock_arg = map;
787 }
788
789 /*
790 * When we write in fast-paths with regmap_bulk_write() don't allocate
791 * scratch buffers with sleeping allocations.
792 */
793 if ((bus && bus->fast_io) || config->fast_io)
794 map->alloc_flags = GFP_ATOMIC;
795 else
796 map->alloc_flags = GFP_KERNEL;
797
798 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
799 map->format.pad_bytes = config->pad_bits / 8;
800 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
801 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
802 config->val_bits + config->pad_bits, 8);
803 map->reg_shift = config->pad_bits % 8;
804 if (config->reg_stride)
805 map->reg_stride = config->reg_stride;
806 else
807 map->reg_stride = 1;
808 if (is_power_of_2(map->reg_stride))
809 map->reg_stride_order = ilog2(map->reg_stride);
810 else
811 map->reg_stride_order = -1;
812 map->use_single_read = config->use_single_read || !bus || !bus->read;
813 map->use_single_write = config->use_single_write || !bus || !bus->write;
814 map->can_multi_write = config->can_multi_write && bus && bus->write;
815 if (bus) {
816 map->max_raw_read = bus->max_raw_read;
817 map->max_raw_write = bus->max_raw_write;
818 }
819 map->dev = dev;
820 map->bus = bus;
821 map->bus_context = bus_context;
822 map->max_register = config->max_register;
823 map->wr_table = config->wr_table;
824 map->rd_table = config->rd_table;
825 map->volatile_table = config->volatile_table;
826 map->precious_table = config->precious_table;
827 map->wr_noinc_table = config->wr_noinc_table;
828 map->rd_noinc_table = config->rd_noinc_table;
829 map->writeable_reg = config->writeable_reg;
830 map->readable_reg = config->readable_reg;
831 map->volatile_reg = config->volatile_reg;
832 map->precious_reg = config->precious_reg;
833 map->writeable_noinc_reg = config->writeable_noinc_reg;
834 map->readable_noinc_reg = config->readable_noinc_reg;
835 map->cache_type = config->cache_type;
836
837 spin_lock_init(&map->async_lock);
838 INIT_LIST_HEAD(&map->async_list);
839 INIT_LIST_HEAD(&map->async_free);
840 init_waitqueue_head(&map->async_waitq);
841
842 if (config->read_flag_mask ||
843 config->write_flag_mask ||
844 config->zero_flag_mask) {
845 map->read_flag_mask = config->read_flag_mask;
846 map->write_flag_mask = config->write_flag_mask;
847 } else if (bus) {
848 map->read_flag_mask = bus->read_flag_mask;
849 }
850
851 if (!bus) {
852 map->reg_read = config->reg_read;
853 map->reg_write = config->reg_write;
854
855 map->defer_caching = false;
856 goto skip_format_initialization;
857 } else if (!bus->read || !bus->write) {
858 map->reg_read = _regmap_bus_reg_read;
859 map->reg_write = _regmap_bus_reg_write;
860 map->reg_update_bits = bus->reg_update_bits;
861
862 map->defer_caching = false;
863 goto skip_format_initialization;
864 } else {
865 map->reg_read = _regmap_bus_read;
866 map->reg_update_bits = bus->reg_update_bits;
867 }
868
869 reg_endian = regmap_get_reg_endian(bus, config);
870 val_endian = regmap_get_val_endian(dev, bus, config);
871
872 switch (config->reg_bits + map->reg_shift) {
873 case 2:
874 switch (config->val_bits) {
875 case 6:
876 map->format.format_write = regmap_format_2_6_write;
877 break;
878 default:
879 goto err_hwlock;
880 }
881 break;
882
883 case 4:
884 switch (config->val_bits) {
885 case 12:
886 map->format.format_write = regmap_format_4_12_write;
887 break;
888 default:
889 goto err_hwlock;
890 }
891 break;
892
893 case 7:
894 switch (config->val_bits) {
895 case 9:
896 map->format.format_write = regmap_format_7_9_write;
897 break;
898 case 17:
899 map->format.format_write = regmap_format_7_17_write;
900 break;
901 default:
902 goto err_hwlock;
903 }
904 break;
905
906 case 10:
907 switch (config->val_bits) {
908 case 14:
909 map->format.format_write = regmap_format_10_14_write;
910 break;
911 default:
912 goto err_hwlock;
913 }
914 break;
915
916 case 12:
917 switch (config->val_bits) {
918 case 20:
919 map->format.format_write = regmap_format_12_20_write;
920 break;
921 default:
922 goto err_hwlock;
923 }
924 break;
925
926 case 8:
927 map->format.format_reg = regmap_format_8;
928 break;
929
930 case 16:
931 switch (reg_endian) {
932 case REGMAP_ENDIAN_BIG:
933 map->format.format_reg = regmap_format_16_be;
934 break;
935 case REGMAP_ENDIAN_LITTLE:
936 map->format.format_reg = regmap_format_16_le;
937 break;
938 case REGMAP_ENDIAN_NATIVE:
939 map->format.format_reg = regmap_format_16_native;
940 break;
941 default:
942 goto err_hwlock;
943 }
944 break;
945
946 case 24:
947 if (reg_endian != REGMAP_ENDIAN_BIG)
948 goto err_hwlock;
949 map->format.format_reg = regmap_format_24;
950 break;
951
952 case 32:
953 switch (reg_endian) {
954 case REGMAP_ENDIAN_BIG:
955 map->format.format_reg = regmap_format_32_be;
956 break;
957 case REGMAP_ENDIAN_LITTLE:
958 map->format.format_reg = regmap_format_32_le;
959 break;
960 case REGMAP_ENDIAN_NATIVE:
961 map->format.format_reg = regmap_format_32_native;
962 break;
963 default:
964 goto err_hwlock;
965 }
966 break;
967
968#ifdef CONFIG_64BIT
969 case 64:
970 switch (reg_endian) {
971 case REGMAP_ENDIAN_BIG:
972 map->format.format_reg = regmap_format_64_be;
973 break;
974 case REGMAP_ENDIAN_LITTLE:
975 map->format.format_reg = regmap_format_64_le;
976 break;
977 case REGMAP_ENDIAN_NATIVE:
978 map->format.format_reg = regmap_format_64_native;
979 break;
980 default:
981 goto err_hwlock;
982 }
983 break;
984#endif
985
986 default:
987 goto err_hwlock;
988 }
989
990 if (val_endian == REGMAP_ENDIAN_NATIVE)
991 map->format.parse_inplace = regmap_parse_inplace_noop;
992
993 switch (config->val_bits) {
994 case 8:
995 map->format.format_val = regmap_format_8;
996 map->format.parse_val = regmap_parse_8;
997 map->format.parse_inplace = regmap_parse_inplace_noop;
998 break;
999 case 16:
1000 switch (val_endian) {
1001 case REGMAP_ENDIAN_BIG:
1002 map->format.format_val = regmap_format_16_be;
1003 map->format.parse_val = regmap_parse_16_be;
1004 map->format.parse_inplace = regmap_parse_16_be_inplace;
1005 break;
1006 case REGMAP_ENDIAN_LITTLE:
1007 map->format.format_val = regmap_format_16_le;
1008 map->format.parse_val = regmap_parse_16_le;
1009 map->format.parse_inplace = regmap_parse_16_le_inplace;
1010 break;
1011 case REGMAP_ENDIAN_NATIVE:
1012 map->format.format_val = regmap_format_16_native;
1013 map->format.parse_val = regmap_parse_16_native;
1014 break;
1015 default:
1016 goto err_hwlock;
1017 }
1018 break;
1019 case 24:
1020 if (val_endian != REGMAP_ENDIAN_BIG)
1021 goto err_hwlock;
1022 map->format.format_val = regmap_format_24;
1023 map->format.parse_val = regmap_parse_24;
1024 break;
1025 case 32:
1026 switch (val_endian) {
1027 case REGMAP_ENDIAN_BIG:
1028 map->format.format_val = regmap_format_32_be;
1029 map->format.parse_val = regmap_parse_32_be;
1030 map->format.parse_inplace = regmap_parse_32_be_inplace;
1031 break;
1032 case REGMAP_ENDIAN_LITTLE:
1033 map->format.format_val = regmap_format_32_le;
1034 map->format.parse_val = regmap_parse_32_le;
1035 map->format.parse_inplace = regmap_parse_32_le_inplace;
1036 break;
1037 case REGMAP_ENDIAN_NATIVE:
1038 map->format.format_val = regmap_format_32_native;
1039 map->format.parse_val = regmap_parse_32_native;
1040 break;
1041 default:
1042 goto err_hwlock;
1043 }
1044 break;
1045#ifdef CONFIG_64BIT
1046 case 64:
1047 switch (val_endian) {
1048 case REGMAP_ENDIAN_BIG:
1049 map->format.format_val = regmap_format_64_be;
1050 map->format.parse_val = regmap_parse_64_be;
1051 map->format.parse_inplace = regmap_parse_64_be_inplace;
1052 break;
1053 case REGMAP_ENDIAN_LITTLE:
1054 map->format.format_val = regmap_format_64_le;
1055 map->format.parse_val = regmap_parse_64_le;
1056 map->format.parse_inplace = regmap_parse_64_le_inplace;
1057 break;
1058 case REGMAP_ENDIAN_NATIVE:
1059 map->format.format_val = regmap_format_64_native;
1060 map->format.parse_val = regmap_parse_64_native;
1061 break;
1062 default:
1063 goto err_hwlock;
1064 }
1065 break;
1066#endif
1067 }
1068
1069 if (map->format.format_write) {
1070 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1071 (val_endian != REGMAP_ENDIAN_BIG))
1072 goto err_hwlock;
1073 map->use_single_write = true;
1074 }
1075
1076 if (!map->format.format_write &&
1077 !(map->format.format_reg && map->format.format_val))
1078 goto err_hwlock;
1079
1080 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
1081 if (map->work_buf == NULL) {
1082 ret = -ENOMEM;
1083 goto err_hwlock;
1084 }
1085
1086 if (map->format.format_write) {
1087 map->defer_caching = false;
1088 map->reg_write = _regmap_bus_formatted_write;
1089 } else if (map->format.format_val) {
1090 map->defer_caching = true;
1091 map->reg_write = _regmap_bus_raw_write;
1092 }
1093
1094skip_format_initialization:
1095
1096 map->range_tree = RB_ROOT;
1097 for (i = 0; i < config->num_ranges; i++) {
1098 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1099 struct regmap_range_node *new;
1100
1101 /* Sanity check */
1102 if (range_cfg->range_max < range_cfg->range_min) {
1103 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
1104 range_cfg->range_max, range_cfg->range_min);
1105 goto err_range;
1106 }
1107
1108 if (range_cfg->range_max > map->max_register) {
1109 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
1110 range_cfg->range_max, map->max_register);
1111 goto err_range;
1112 }
1113
1114 if (range_cfg->selector_reg > map->max_register) {
1115 dev_err(map->dev,
1116 "Invalid range %d: selector out of map\n", i);
1117 goto err_range;
1118 }
1119
1120 if (range_cfg->window_len == 0) {
1121 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1122 i);
1123 goto err_range;
1124 }
1125
1126 /* Make sure, that this register range has no selector
1127 or data window within its boundary */
1128 for (j = 0; j < config->num_ranges; j++) {
1129 unsigned sel_reg = config->ranges[j].selector_reg;
1130 unsigned win_min = config->ranges[j].window_start;
1131 unsigned win_max = win_min +
1132 config->ranges[j].window_len - 1;
1133
1134 /* Allow data window inside its own virtual range */
1135 if (j == i)
1136 continue;
1137
1138 if (range_cfg->range_min <= sel_reg &&
1139 sel_reg <= range_cfg->range_max) {
1140 dev_err(map->dev,
1141 "Range %d: selector for %d in window\n",
1142 i, j);
1143 goto err_range;
1144 }
1145
1146 if (!(win_max < range_cfg->range_min ||
1147 win_min > range_cfg->range_max)) {
1148 dev_err(map->dev,
1149 "Range %d: window for %d in window\n",
1150 i, j);
1151 goto err_range;
1152 }
1153 }
1154
1155 new = kzalloc(sizeof(*new), GFP_KERNEL);
1156 if (new == NULL) {
1157 ret = -ENOMEM;
1158 goto err_range;
1159 }
1160
1161 new->map = map;
1162 new->name = range_cfg->name;
1163 new->range_min = range_cfg->range_min;
1164 new->range_max = range_cfg->range_max;
1165 new->selector_reg = range_cfg->selector_reg;
1166 new->selector_mask = range_cfg->selector_mask;
1167 new->selector_shift = range_cfg->selector_shift;
1168 new->window_start = range_cfg->window_start;
1169 new->window_len = range_cfg->window_len;
1170
1171 if (!_regmap_range_add(map, new)) {
1172 dev_err(map->dev, "Failed to add range %d\n", i);
1173 kfree(new);
1174 goto err_range;
1175 }
1176
1177 if (map->selector_work_buf == NULL) {
1178 map->selector_work_buf =
1179 kzalloc(map->format.buf_size, GFP_KERNEL);
1180 if (map->selector_work_buf == NULL) {
1181 ret = -ENOMEM;
1182 goto err_range;
1183 }
1184 }
1185 }
1186
1187 ret = regcache_init(map, config);
1188 if (ret != 0)
1189 goto err_range;
1190
1191 if (dev) {
1192 ret = regmap_attach_dev(dev, map, config);
1193 if (ret != 0)
1194 goto err_regcache;
1195 } else {
1196 regmap_debugfs_init(map);
1197 }
1198
1199 return map;
1200
1201err_regcache:
1202 regcache_exit(map);
1203err_range:
1204 regmap_range_exit(map);
1205 kfree(map->work_buf);
1206err_hwlock:
1207 if (map->hwlock)
1208 hwspin_lock_free(map->hwlock);
1209err_name:
1210 kfree_const(map->name);
1211err_map:
1212 kfree(map);
1213err:
1214 return ERR_PTR(ret);
1215}
1216EXPORT_SYMBOL_GPL(__regmap_init);
1217
1218static void devm_regmap_release(struct device *dev, void *res)
1219{
1220 regmap_exit(*(struct regmap **)res);
1221}
1222
1223struct regmap *__devm_regmap_init(struct device *dev,
1224 const struct regmap_bus *bus,
1225 void *bus_context,
1226 const struct regmap_config *config,
1227 struct lock_class_key *lock_key,
1228 const char *lock_name)
1229{
1230 struct regmap **ptr, *regmap;
1231
1232 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1233 if (!ptr)
1234 return ERR_PTR(-ENOMEM);
1235
1236 regmap = __regmap_init(dev, bus, bus_context, config,
1237 lock_key, lock_name);
1238 if (!IS_ERR(regmap)) {
1239 *ptr = regmap;
1240 devres_add(dev, ptr);
1241 } else {
1242 devres_free(ptr);
1243 }
1244
1245 return regmap;
1246}
1247EXPORT_SYMBOL_GPL(__devm_regmap_init);
1248
1249static void regmap_field_init(struct regmap_field *rm_field,
1250 struct regmap *regmap, struct reg_field reg_field)
1251{
1252 rm_field->regmap = regmap;
1253 rm_field->reg = reg_field.reg;
1254 rm_field->shift = reg_field.lsb;
1255 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
1256 rm_field->id_size = reg_field.id_size;
1257 rm_field->id_offset = reg_field.id_offset;
1258}
1259
1260/**
1261 * devm_regmap_field_alloc() - Allocate and initialise a register field.
1262 *
1263 * @dev: Device that will be interacted with
1264 * @regmap: regmap bank in which this register field is located.
1265 * @reg_field: Register field with in the bank.
1266 *
1267 * The return value will be an ERR_PTR() on error or a valid pointer
1268 * to a struct regmap_field. The regmap_field will be automatically freed
1269 * by the device management code.
1270 */
1271struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1272 struct regmap *regmap, struct reg_field reg_field)
1273{
1274 struct regmap_field *rm_field = devm_kzalloc(dev,
1275 sizeof(*rm_field), GFP_KERNEL);
1276 if (!rm_field)
1277 return ERR_PTR(-ENOMEM);
1278
1279 regmap_field_init(rm_field, regmap, reg_field);
1280
1281 return rm_field;
1282
1283}
1284EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1285
1286
1287/**
1288 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1289 *
1290 * @regmap: regmap bank in which this register field is located.
1291 * @rm_field: regmap register fields within the bank.
1292 * @reg_field: Register fields within the bank.
1293 * @num_fields: Number of register fields.
1294 *
1295 * The return value will be an -ENOMEM on error or zero for success.
1296 * Newly allocated regmap_fields should be freed by calling
1297 * regmap_field_bulk_free()
1298 */
1299int regmap_field_bulk_alloc(struct regmap *regmap,
1300 struct regmap_field **rm_field,
1301 struct reg_field *reg_field,
1302 int num_fields)
1303{
1304 struct regmap_field *rf;
1305 int i;
1306
1307 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1308 if (!rf)
1309 return -ENOMEM;
1310
1311 for (i = 0; i < num_fields; i++) {
1312 regmap_field_init(&rf[i], regmap, reg_field[i]);
1313 rm_field[i] = &rf[i];
1314 }
1315
1316 return 0;
1317}
1318EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1319
1320/**
1321 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1322 * fields.
1323 *
1324 * @dev: Device that will be interacted with
1325 * @regmap: regmap bank in which this register field is located.
1326 * @rm_field: regmap register fields within the bank.
1327 * @reg_field: Register fields within the bank.
1328 * @num_fields: Number of register fields.
1329 *
1330 * The return value will be an -ENOMEM on error or zero for success.
1331 * Newly allocated regmap_fields will be automatically freed by the
1332 * device management code.
1333 */
1334int devm_regmap_field_bulk_alloc(struct device *dev,
1335 struct regmap *regmap,
1336 struct regmap_field **rm_field,
1337 struct reg_field *reg_field,
1338 int num_fields)
1339{
1340 struct regmap_field *rf;
1341 int i;
1342
1343 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1344 if (!rf)
1345 return -ENOMEM;
1346
1347 for (i = 0; i < num_fields; i++) {
1348 regmap_field_init(&rf[i], regmap, reg_field[i]);
1349 rm_field[i] = &rf[i];
1350 }
1351
1352 return 0;
1353}
1354EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1355
1356/**
1357 * regmap_field_bulk_free() - Free register field allocated using
1358 * regmap_field_bulk_alloc.
1359 *
1360 * @field: regmap fields which should be freed.
1361 */
1362void regmap_field_bulk_free(struct regmap_field *field)
1363{
1364 kfree(field);
1365}
1366EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1367
1368/**
1369 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1370 * devm_regmap_field_bulk_alloc.
1371 *
1372 * @dev: Device that will be interacted with
1373 * @field: regmap field which should be freed.
1374 *
1375 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1376 * drivers need not call this function, as the memory allocated via devm
1377 * will be freed as per device-driver life-cycle.
1378 */
1379void devm_regmap_field_bulk_free(struct device *dev,
1380 struct regmap_field *field)
1381{
1382 devm_kfree(dev, field);
1383}
1384EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1385
1386/**
1387 * devm_regmap_field_free() - Free a register field allocated using
1388 * devm_regmap_field_alloc.
1389 *
1390 * @dev: Device that will be interacted with
1391 * @field: regmap field which should be freed.
1392 *
1393 * Free register field allocated using devm_regmap_field_alloc(). Usually
1394 * drivers need not call this function, as the memory allocated via devm
1395 * will be freed as per device-driver life-cyle.
1396 */
1397void devm_regmap_field_free(struct device *dev,
1398 struct regmap_field *field)
1399{
1400 devm_kfree(dev, field);
1401}
1402EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1403
1404/**
1405 * regmap_field_alloc() - Allocate and initialise a register field.
1406 *
1407 * @regmap: regmap bank in which this register field is located.
1408 * @reg_field: Register field with in the bank.
1409 *
1410 * The return value will be an ERR_PTR() on error or a valid pointer
1411 * to a struct regmap_field. The regmap_field should be freed by the
1412 * user once its finished working with it using regmap_field_free().
1413 */
1414struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1415 struct reg_field reg_field)
1416{
1417 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1418
1419 if (!rm_field)
1420 return ERR_PTR(-ENOMEM);
1421
1422 regmap_field_init(rm_field, regmap, reg_field);
1423
1424 return rm_field;
1425}
1426EXPORT_SYMBOL_GPL(regmap_field_alloc);
1427
1428/**
1429 * regmap_field_free() - Free register field allocated using
1430 * regmap_field_alloc.
1431 *
1432 * @field: regmap field which should be freed.
1433 */
1434void regmap_field_free(struct regmap_field *field)
1435{
1436 kfree(field);
1437}
1438EXPORT_SYMBOL_GPL(regmap_field_free);
1439
1440/**
1441 * regmap_reinit_cache() - Reinitialise the current register cache
1442 *
1443 * @map: Register map to operate on.
1444 * @config: New configuration. Only the cache data will be used.
1445 *
1446 * Discard any existing register cache for the map and initialize a
1447 * new cache. This can be used to restore the cache to defaults or to
1448 * update the cache configuration to reflect runtime discovery of the
1449 * hardware.
1450 *
1451 * No explicit locking is done here, the user needs to ensure that
1452 * this function will not race with other calls to regmap.
1453 */
1454int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1455{
1456 int ret;
1457
1458 regcache_exit(map);
1459 regmap_debugfs_exit(map);
1460
1461 map->max_register = config->max_register;
1462 map->writeable_reg = config->writeable_reg;
1463 map->readable_reg = config->readable_reg;
1464 map->volatile_reg = config->volatile_reg;
1465 map->precious_reg = config->precious_reg;
1466 map->writeable_noinc_reg = config->writeable_noinc_reg;
1467 map->readable_noinc_reg = config->readable_noinc_reg;
1468 map->cache_type = config->cache_type;
1469
1470 ret = regmap_set_name(map, config);
1471 if (ret)
1472 return ret;
1473
1474 regmap_debugfs_init(map);
1475
1476 map->cache_bypass = false;
1477 map->cache_only = false;
1478
1479 return regcache_init(map, config);
1480}
1481EXPORT_SYMBOL_GPL(regmap_reinit_cache);
1482
1483/**
1484 * regmap_exit() - Free a previously allocated register map
1485 *
1486 * @map: Register map to operate on.
1487 */
1488void regmap_exit(struct regmap *map)
1489{
1490 struct regmap_async *async;
1491
1492 regcache_exit(map);
1493 regmap_debugfs_exit(map);
1494 regmap_range_exit(map);
1495 if (map->bus && map->bus->free_context)
1496 map->bus->free_context(map->bus_context);
1497 kfree(map->work_buf);
1498 while (!list_empty(&map->async_free)) {
1499 async = list_first_entry_or_null(&map->async_free,
1500 struct regmap_async,
1501 list);
1502 list_del(&async->list);
1503 kfree(async->work_buf);
1504 kfree(async);
1505 }
1506 if (map->hwlock)
1507 hwspin_lock_free(map->hwlock);
1508 if (map->lock == regmap_lock_mutex)
1509 mutex_destroy(&map->mutex);
1510 kfree_const(map->name);
1511 kfree(map->patch);
1512 if (map->bus && map->bus->free_on_exit)
1513 kfree(map->bus);
1514 kfree(map);
1515}
1516EXPORT_SYMBOL_GPL(regmap_exit);
1517
1518static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1519{
1520 struct regmap **r = res;
1521 if (!r || !*r) {
1522 WARN_ON(!r || !*r);
1523 return 0;
1524 }
1525
1526 /* If the user didn't specify a name match any */
1527 if (data)
1528 return !strcmp((*r)->name, data);
1529 else
1530 return 1;
1531}
1532
1533/**
1534 * dev_get_regmap() - Obtain the regmap (if any) for a device
1535 *
1536 * @dev: Device to retrieve the map for
1537 * @name: Optional name for the register map, usually NULL.
1538 *
1539 * Returns the regmap for the device if one is present, or NULL. If
1540 * name is specified then it must match the name specified when
1541 * registering the device, if it is NULL then the first regmap found
1542 * will be used. Devices with multiple register maps are very rare,
1543 * generic code should normally not need to specify a name.
1544 */
1545struct regmap *dev_get_regmap(struct device *dev, const char *name)
1546{
1547 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1548 dev_get_regmap_match, (void *)name);
1549
1550 if (!r)
1551 return NULL;
1552 return *r;
1553}
1554EXPORT_SYMBOL_GPL(dev_get_regmap);
1555
1556/**
1557 * regmap_get_device() - Obtain the device from a regmap
1558 *
1559 * @map: Register map to operate on.
1560 *
1561 * Returns the underlying device that the regmap has been created for.
1562 */
1563struct device *regmap_get_device(struct regmap *map)
1564{
1565 return map->dev;
1566}
1567EXPORT_SYMBOL_GPL(regmap_get_device);
1568
1569static int _regmap_select_page(struct regmap *map, unsigned int *reg,
1570 struct regmap_range_node *range,
1571 unsigned int val_num)
1572{
1573 void *orig_work_buf;
1574 unsigned int win_offset;
1575 unsigned int win_page;
1576 bool page_chg;
1577 int ret;
1578
1579 win_offset = (*reg - range->range_min) % range->window_len;
1580 win_page = (*reg - range->range_min) / range->window_len;
1581
1582 if (val_num > 1) {
1583 /* Bulk write shouldn't cross range boundary */
1584 if (*reg + val_num - 1 > range->range_max)
1585 return -EINVAL;
1586
1587 /* ... or single page boundary */
1588 if (val_num > range->window_len - win_offset)
1589 return -EINVAL;
1590 }
1591
1592 /* It is possible to have selector register inside data window.
1593 In that case, selector register is located on every page and
1594 it needs no page switching, when accessed alone. */
1595 if (val_num > 1 ||
1596 range->window_start + win_offset != range->selector_reg) {
1597 /* Use separate work_buf during page switching */
1598 orig_work_buf = map->work_buf;
1599 map->work_buf = map->selector_work_buf;
1600
1601 ret = _regmap_update_bits(map, range->selector_reg,
1602 range->selector_mask,
1603 win_page << range->selector_shift,
1604 &page_chg, false);
1605
1606 map->work_buf = orig_work_buf;
1607
1608 if (ret != 0)
1609 return ret;
1610 }
1611
1612 *reg = range->window_start + win_offset;
1613
1614 return 0;
1615}
1616
1617static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1618 unsigned long mask)
1619{
1620 u8 *buf;
1621 int i;
1622
1623 if (!mask || !map->work_buf)
1624 return;
1625
1626 buf = map->work_buf;
1627
1628 for (i = 0; i < max_bytes; i++)
1629 buf[i] |= (mask >> (8 * i)) & 0xff;
1630}
1631
1632static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
1633 const void *val, size_t val_len, bool noinc)
1634{
1635 struct regmap_range_node *range;
1636 unsigned long flags;
1637 void *work_val = map->work_buf + map->format.reg_bytes +
1638 map->format.pad_bytes;
1639 void *buf;
1640 int ret = -ENOTSUPP;
1641 size_t len;
1642 int i;
1643
1644 WARN_ON(!map->bus);
1645
1646 /* Check for unwritable or noinc registers in range
1647 * before we start
1648 */
1649 if (!regmap_writeable_noinc(map, reg)) {
1650 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1651 unsigned int element =
1652 reg + regmap_get_offset(map, i);
1653 if (!regmap_writeable(map, element) ||
1654 regmap_writeable_noinc(map, element))
1655 return -EINVAL;
1656 }
1657 }
1658
1659 if (!map->cache_bypass && map->format.parse_val) {
1660 unsigned int ival;
1661 int val_bytes = map->format.val_bytes;
1662 for (i = 0; i < val_len / val_bytes; i++) {
1663 ival = map->format.parse_val(val + (i * val_bytes));
1664 ret = regcache_write(map,
1665 reg + regmap_get_offset(map, i),
1666 ival);
1667 if (ret) {
1668 dev_err(map->dev,
1669 "Error in caching of register: %x ret: %d\n",
1670 reg + regmap_get_offset(map, i), ret);
1671 return ret;
1672 }
1673 }
1674 if (map->cache_only) {
1675 map->cache_dirty = true;
1676 return 0;
1677 }
1678 }
1679
1680 range = _regmap_range_lookup(map, reg);
1681 if (range) {
1682 int val_num = val_len / map->format.val_bytes;
1683 int win_offset = (reg - range->range_min) % range->window_len;
1684 int win_residue = range->window_len - win_offset;
1685
1686 /* If the write goes beyond the end of the window split it */
1687 while (val_num > win_residue) {
1688 dev_dbg(map->dev, "Writing window %d/%zu\n",
1689 win_residue, val_len / map->format.val_bytes);
1690 ret = _regmap_raw_write_impl(map, reg, val,
1691 win_residue *
1692 map->format.val_bytes, noinc);
1693 if (ret != 0)
1694 return ret;
1695
1696 reg += win_residue;
1697 val_num -= win_residue;
1698 val += win_residue * map->format.val_bytes;
1699 val_len -= win_residue * map->format.val_bytes;
1700
1701 win_offset = (reg - range->range_min) %
1702 range->window_len;
1703 win_residue = range->window_len - win_offset;
1704 }
1705
1706 ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num);
1707 if (ret != 0)
1708 return ret;
1709 }
1710
1711 map->format.format_reg(map->work_buf, reg, map->reg_shift);
1712 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1713 map->write_flag_mask);
1714
1715 /*
1716 * Essentially all I/O mechanisms will be faster with a single
1717 * buffer to write. Since register syncs often generate raw
1718 * writes of single registers optimise that case.
1719 */
1720 if (val != work_val && val_len == map->format.val_bytes) {
1721 memcpy(work_val, val, map->format.val_bytes);
1722 val = work_val;
1723 }
1724
1725 if (map->async && map->bus->async_write) {
1726 struct regmap_async *async;
1727
1728 trace_regmap_async_write_start(map, reg, val_len);
1729
1730 spin_lock_irqsave(&map->async_lock, flags);
1731 async = list_first_entry_or_null(&map->async_free,
1732 struct regmap_async,
1733 list);
1734 if (async)
1735 list_del(&async->list);
1736 spin_unlock_irqrestore(&map->async_lock, flags);
1737
1738 if (!async) {
1739 async = map->bus->async_alloc();
1740 if (!async)
1741 return -ENOMEM;
1742
1743 async->work_buf = kzalloc(map->format.buf_size,
1744 GFP_KERNEL | GFP_DMA);
1745 if (!async->work_buf) {
1746 kfree(async);
1747 return -ENOMEM;
1748 }
1749 }
1750
1751 async->map = map;
1752
1753 /* If the caller supplied the value we can use it safely. */
1754 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1755 map->format.reg_bytes + map->format.val_bytes);
1756
1757 spin_lock_irqsave(&map->async_lock, flags);
1758 list_add_tail(&async->list, &map->async_list);
1759 spin_unlock_irqrestore(&map->async_lock, flags);
1760
1761 if (val != work_val)
1762 ret = map->bus->async_write(map->bus_context,
1763 async->work_buf,
1764 map->format.reg_bytes +
1765 map->format.pad_bytes,
1766 val, val_len, async);
1767 else
1768 ret = map->bus->async_write(map->bus_context,
1769 async->work_buf,
1770 map->format.reg_bytes +
1771 map->format.pad_bytes +
1772 val_len, NULL, 0, async);
1773
1774 if (ret != 0) {
1775 dev_err(map->dev, "Failed to schedule write: %d\n",
1776 ret);
1777
1778 spin_lock_irqsave(&map->async_lock, flags);
1779 list_move(&async->list, &map->async_free);
1780 spin_unlock_irqrestore(&map->async_lock, flags);
1781 }
1782
1783 return ret;
1784 }
1785
1786 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
1787
1788 /* If we're doing a single register write we can probably just
1789 * send the work_buf directly, otherwise try to do a gather
1790 * write.
1791 */
1792 if (val == work_val)
1793 ret = map->bus->write(map->bus_context, map->work_buf,
1794 map->format.reg_bytes +
1795 map->format.pad_bytes +
1796 val_len);
1797 else if (map->bus->gather_write)
1798 ret = map->bus->gather_write(map->bus_context, map->work_buf,
1799 map->format.reg_bytes +
1800 map->format.pad_bytes,
1801 val, val_len);
1802 else
1803 ret = -ENOTSUPP;
1804
1805 /* If that didn't work fall back on linearising by hand. */
1806 if (ret == -ENOTSUPP) {
1807 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1808 buf = kzalloc(len, GFP_KERNEL);
1809 if (!buf)
1810 return -ENOMEM;
1811
1812 memcpy(buf, map->work_buf, map->format.reg_bytes);
1813 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1814 val, val_len);
1815 ret = map->bus->write(map->bus_context, buf, len);
1816
1817 kfree(buf);
1818 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
1819 /* regcache_drop_region() takes lock that we already have,
1820 * thus call map->cache_ops->drop() directly
1821 */
1822 if (map->cache_ops && map->cache_ops->drop)
1823 map->cache_ops->drop(map, reg, reg + 1);
1824 }
1825
1826 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
1827
1828 return ret;
1829}
1830
1831/**
1832 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1833 *
1834 * @map: Map to check.
1835 */
1836bool regmap_can_raw_write(struct regmap *map)
1837{
1838 return map->bus && map->bus->write && map->format.format_val &&
1839 map->format.format_reg;
1840}
1841EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1842
1843/**
1844 * regmap_get_raw_read_max - Get the maximum size we can read
1845 *
1846 * @map: Map to check.
1847 */
1848size_t regmap_get_raw_read_max(struct regmap *map)
1849{
1850 return map->max_raw_read;
1851}
1852EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1853
1854/**
1855 * regmap_get_raw_write_max - Get the maximum size we can read
1856 *
1857 * @map: Map to check.
1858 */
1859size_t regmap_get_raw_write_max(struct regmap *map)
1860{
1861 return map->max_raw_write;
1862}
1863EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1864
1865static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1866 unsigned int val)
1867{
1868 int ret;
1869 struct regmap_range_node *range;
1870 struct regmap *map = context;
1871
1872 WARN_ON(!map->bus || !map->format.format_write);
1873
1874 range = _regmap_range_lookup(map, reg);
1875 if (range) {
1876 ret = _regmap_select_page(map, ®, range, 1);
1877 if (ret != 0)
1878 return ret;
1879 }
1880
1881 map->format.format_write(map, reg, val);
1882
1883 trace_regmap_hw_write_start(map, reg, 1);
1884
1885 ret = map->bus->write(map->bus_context, map->work_buf,
1886 map->format.buf_size);
1887
1888 trace_regmap_hw_write_done(map, reg, 1);
1889
1890 return ret;
1891}
1892
1893static int _regmap_bus_reg_write(void *context, unsigned int reg,
1894 unsigned int val)
1895{
1896 struct regmap *map = context;
1897
1898 return map->bus->reg_write(map->bus_context, reg, val);
1899}
1900
1901static int _regmap_bus_raw_write(void *context, unsigned int reg,
1902 unsigned int val)
1903{
1904 struct regmap *map = context;
1905
1906 WARN_ON(!map->bus || !map->format.format_val);
1907
1908 map->format.format_val(map->work_buf + map->format.reg_bytes
1909 + map->format.pad_bytes, val, 0);
1910 return _regmap_raw_write_impl(map, reg,
1911 map->work_buf +
1912 map->format.reg_bytes +
1913 map->format.pad_bytes,
1914 map->format.val_bytes,
1915 false);
1916}
1917
1918static inline void *_regmap_map_get_context(struct regmap *map)
1919{
1920 return (map->bus) ? map : map->bus_context;
1921}
1922
1923int _regmap_write(struct regmap *map, unsigned int reg,
1924 unsigned int val)
1925{
1926 int ret;
1927 void *context = _regmap_map_get_context(map);
1928
1929 if (!regmap_writeable(map, reg))
1930 return -EIO;
1931
1932 if (!map->cache_bypass && !map->defer_caching) {
1933 ret = regcache_write(map, reg, val);
1934 if (ret != 0)
1935 return ret;
1936 if (map->cache_only) {
1937 map->cache_dirty = true;
1938 return 0;
1939 }
1940 }
1941
1942 ret = map->reg_write(context, reg, val);
1943 if (ret == 0) {
1944 if (regmap_should_log(map))
1945 dev_info(map->dev, "%x <= %x\n", reg, val);
1946
1947 trace_regmap_reg_write(map, reg, val);
1948 }
1949
1950 return ret;
1951}
1952
1953/**
1954 * regmap_write() - Write a value to a single register
1955 *
1956 * @map: Register map to write to
1957 * @reg: Register to write to
1958 * @val: Value to be written
1959 *
1960 * A value of zero will be returned on success, a negative errno will
1961 * be returned in error cases.
1962 */
1963int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1964{
1965 int ret;
1966
1967 if (!IS_ALIGNED(reg, map->reg_stride))
1968 return -EINVAL;
1969
1970 map->lock(map->lock_arg);
1971
1972 ret = _regmap_write(map, reg, val);
1973
1974 map->unlock(map->lock_arg);
1975
1976 return ret;
1977}
1978EXPORT_SYMBOL_GPL(regmap_write);
1979
1980/**
1981 * regmap_write_async() - Write a value to a single register asynchronously
1982 *
1983 * @map: Register map to write to
1984 * @reg: Register to write to
1985 * @val: Value to be written
1986 *
1987 * A value of zero will be returned on success, a negative errno will
1988 * be returned in error cases.
1989 */
1990int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1991{
1992 int ret;
1993
1994 if (!IS_ALIGNED(reg, map->reg_stride))
1995 return -EINVAL;
1996
1997 map->lock(map->lock_arg);
1998
1999 map->async = true;
2000
2001 ret = _regmap_write(map, reg, val);
2002
2003 map->async = false;
2004
2005 map->unlock(map->lock_arg);
2006
2007 return ret;
2008}
2009EXPORT_SYMBOL_GPL(regmap_write_async);
2010
2011int _regmap_raw_write(struct regmap *map, unsigned int reg,
2012 const void *val, size_t val_len, bool noinc)
2013{
2014 size_t val_bytes = map->format.val_bytes;
2015 size_t val_count = val_len / val_bytes;
2016 size_t chunk_count, chunk_bytes;
2017 size_t chunk_regs = val_count;
2018 int ret, i;
2019
2020 if (!val_count)
2021 return -EINVAL;
2022
2023 if (map->use_single_write)
2024 chunk_regs = 1;
2025 else if (map->max_raw_write && val_len > map->max_raw_write)
2026 chunk_regs = map->max_raw_write / val_bytes;
2027
2028 chunk_count = val_count / chunk_regs;
2029 chunk_bytes = chunk_regs * val_bytes;
2030
2031 /* Write as many bytes as possible with chunk_size */
2032 for (i = 0; i < chunk_count; i++) {
2033 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
2034 if (ret)
2035 return ret;
2036
2037 reg += regmap_get_offset(map, chunk_regs);
2038 val += chunk_bytes;
2039 val_len -= chunk_bytes;
2040 }
2041
2042 /* Write remaining bytes */
2043 if (val_len)
2044 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
2045
2046 return ret;
2047}
2048
2049/**
2050 * regmap_raw_write() - Write raw values to one or more registers
2051 *
2052 * @map: Register map to write to
2053 * @reg: Initial register to write to
2054 * @val: Block of data to be written, laid out for direct transmission to the
2055 * device
2056 * @val_len: Length of data pointed to by val.
2057 *
2058 * This function is intended to be used for things like firmware
2059 * download where a large block of data needs to be transferred to the
2060 * device. No formatting will be done on the data provided.
2061 *
2062 * A value of zero will be returned on success, a negative errno will
2063 * be returned in error cases.
2064 */
2065int regmap_raw_write(struct regmap *map, unsigned int reg,
2066 const void *val, size_t val_len)
2067{
2068 int ret;
2069
2070 if (!regmap_can_raw_write(map))
2071 return -EINVAL;
2072 if (val_len % map->format.val_bytes)
2073 return -EINVAL;
2074
2075 map->lock(map->lock_arg);
2076
2077 ret = _regmap_raw_write(map, reg, val, val_len, false);
2078
2079 map->unlock(map->lock_arg);
2080
2081 return ret;
2082}
2083EXPORT_SYMBOL_GPL(regmap_raw_write);
2084
2085/**
2086 * regmap_noinc_write(): Write data from a register without incrementing the
2087 * register number
2088 *
2089 * @map: Register map to write to
2090 * @reg: Register to write to
2091 * @val: Pointer to data buffer
2092 * @val_len: Length of output buffer in bytes.
2093 *
2094 * The regmap API usually assumes that bulk bus write operations will write a
2095 * range of registers. Some devices have certain registers for which a write
2096 * operation can write to an internal FIFO.
2097 *
2098 * The target register must be volatile but registers after it can be
2099 * completely unrelated cacheable registers.
2100 *
2101 * This will attempt multiple writes as required to write val_len bytes.
2102 *
2103 * A value of zero will be returned on success, a negative errno will be
2104 * returned in error cases.
2105 */
2106int regmap_noinc_write(struct regmap *map, unsigned int reg,
2107 const void *val, size_t val_len)
2108{
2109 size_t write_len;
2110 int ret;
2111
2112 if (!map->bus)
2113 return -EINVAL;
2114 if (!map->bus->write)
2115 return -ENOTSUPP;
2116 if (val_len % map->format.val_bytes)
2117 return -EINVAL;
2118 if (!IS_ALIGNED(reg, map->reg_stride))
2119 return -EINVAL;
2120 if (val_len == 0)
2121 return -EINVAL;
2122
2123 map->lock(map->lock_arg);
2124
2125 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2126 ret = -EINVAL;
2127 goto out_unlock;
2128 }
2129
2130 while (val_len) {
2131 if (map->max_raw_write && map->max_raw_write < val_len)
2132 write_len = map->max_raw_write;
2133 else
2134 write_len = val_len;
2135 ret = _regmap_raw_write(map, reg, val, write_len, true);
2136 if (ret)
2137 goto out_unlock;
2138 val = ((u8 *)val) + write_len;
2139 val_len -= write_len;
2140 }
2141
2142out_unlock:
2143 map->unlock(map->lock_arg);
2144 return ret;
2145}
2146EXPORT_SYMBOL_GPL(regmap_noinc_write);
2147
2148/**
2149 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2150 * register field.
2151 *
2152 * @field: Register field to write to
2153 * @mask: Bitmask to change
2154 * @val: Value to be written
2155 * @change: Boolean indicating if a write was done
2156 * @async: Boolean indicating asynchronously
2157 * @force: Boolean indicating use force update
2158 *
2159 * Perform a read/modify/write cycle on the register field with change,
2160 * async, force option.
2161 *
2162 * A value of zero will be returned on success, a negative errno will
2163 * be returned in error cases.
2164 */
2165int regmap_field_update_bits_base(struct regmap_field *field,
2166 unsigned int mask, unsigned int val,
2167 bool *change, bool async, bool force)
2168{
2169 mask = (mask << field->shift) & field->mask;
2170
2171 return regmap_update_bits_base(field->regmap, field->reg,
2172 mask, val << field->shift,
2173 change, async, force);
2174}
2175EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
2176
2177/**
2178 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2179 * register field with port ID
2180 *
2181 * @field: Register field to write to
2182 * @id: port ID
2183 * @mask: Bitmask to change
2184 * @val: Value to be written
2185 * @change: Boolean indicating if a write was done
2186 * @async: Boolean indicating asynchronously
2187 * @force: Boolean indicating use force update
2188 *
2189 * A value of zero will be returned on success, a negative errno will
2190 * be returned in error cases.
2191 */
2192int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
2193 unsigned int mask, unsigned int val,
2194 bool *change, bool async, bool force)
2195{
2196 if (id >= field->id_size)
2197 return -EINVAL;
2198
2199 mask = (mask << field->shift) & field->mask;
2200
2201 return regmap_update_bits_base(field->regmap,
2202 field->reg + (field->id_offset * id),
2203 mask, val << field->shift,
2204 change, async, force);
2205}
2206EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
2207
2208/**
2209 * regmap_bulk_write() - Write multiple registers to the device
2210 *
2211 * @map: Register map to write to
2212 * @reg: First register to be write from
2213 * @val: Block of data to be written, in native register size for device
2214 * @val_count: Number of registers to write
2215 *
2216 * This function is intended to be used for writing a large block of
2217 * data to the device either in single transfer or multiple transfer.
2218 *
2219 * A value of zero will be returned on success, a negative errno will
2220 * be returned in error cases.
2221 */
2222int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2223 size_t val_count)
2224{
2225 int ret = 0, i;
2226 size_t val_bytes = map->format.val_bytes;
2227
2228 if (!IS_ALIGNED(reg, map->reg_stride))
2229 return -EINVAL;
2230
2231 /*
2232 * Some devices don't support bulk write, for them we have a series of
2233 * single write operations.
2234 */
2235 if (!map->bus || !map->format.parse_inplace) {
2236 map->lock(map->lock_arg);
2237 for (i = 0; i < val_count; i++) {
2238 unsigned int ival;
2239
2240 switch (val_bytes) {
2241 case 1:
2242 ival = *(u8 *)(val + (i * val_bytes));
2243 break;
2244 case 2:
2245 ival = *(u16 *)(val + (i * val_bytes));
2246 break;
2247 case 4:
2248 ival = *(u32 *)(val + (i * val_bytes));
2249 break;
2250#ifdef CONFIG_64BIT
2251 case 8:
2252 ival = *(u64 *)(val + (i * val_bytes));
2253 break;
2254#endif
2255 default:
2256 ret = -EINVAL;
2257 goto out;
2258 }
2259
2260 ret = _regmap_write(map,
2261 reg + regmap_get_offset(map, i),
2262 ival);
2263 if (ret != 0)
2264 goto out;
2265 }
2266out:
2267 map->unlock(map->lock_arg);
2268 } else {
2269 void *wval;
2270
2271 wval = kmemdup(val, val_count * val_bytes, map->alloc_flags);
2272 if (!wval)
2273 return -ENOMEM;
2274
2275 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2276 map->format.parse_inplace(wval + i);
2277
2278 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
2279
2280 kfree(wval);
2281 }
2282 return ret;
2283}
2284EXPORT_SYMBOL_GPL(regmap_bulk_write);
2285
2286/*
2287 * _regmap_raw_multi_reg_write()
2288 *
2289 * the (register,newvalue) pairs in regs have not been formatted, but
2290 * they are all in the same page and have been changed to being page
2291 * relative. The page register has been written if that was necessary.
2292 */
2293static int _regmap_raw_multi_reg_write(struct regmap *map,
2294 const struct reg_sequence *regs,
2295 size_t num_regs)
2296{
2297 int ret;
2298 void *buf;
2299 int i;
2300 u8 *u8;
2301 size_t val_bytes = map->format.val_bytes;
2302 size_t reg_bytes = map->format.reg_bytes;
2303 size_t pad_bytes = map->format.pad_bytes;
2304 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2305 size_t len = pair_size * num_regs;
2306
2307 if (!len)
2308 return -EINVAL;
2309
2310 buf = kzalloc(len, GFP_KERNEL);
2311 if (!buf)
2312 return -ENOMEM;
2313
2314 /* We have to linearise by hand. */
2315
2316 u8 = buf;
2317
2318 for (i = 0; i < num_regs; i++) {
2319 unsigned int reg = regs[i].reg;
2320 unsigned int val = regs[i].def;
2321 trace_regmap_hw_write_start(map, reg, 1);
2322 map->format.format_reg(u8, reg, map->reg_shift);
2323 u8 += reg_bytes + pad_bytes;
2324 map->format.format_val(u8, val, 0);
2325 u8 += val_bytes;
2326 }
2327 u8 = buf;
2328 *u8 |= map->write_flag_mask;
2329
2330 ret = map->bus->write(map->bus_context, buf, len);
2331
2332 kfree(buf);
2333
2334 for (i = 0; i < num_regs; i++) {
2335 int reg = regs[i].reg;
2336 trace_regmap_hw_write_done(map, reg, 1);
2337 }
2338 return ret;
2339}
2340
2341static unsigned int _regmap_register_page(struct regmap *map,
2342 unsigned int reg,
2343 struct regmap_range_node *range)
2344{
2345 unsigned int win_page = (reg - range->range_min) / range->window_len;
2346
2347 return win_page;
2348}
2349
2350static int _regmap_range_multi_paged_reg_write(struct regmap *map,
2351 struct reg_sequence *regs,
2352 size_t num_regs)
2353{
2354 int ret;
2355 int i, n;
2356 struct reg_sequence *base;
2357 unsigned int this_page = 0;
2358 unsigned int page_change = 0;
2359 /*
2360 * the set of registers are not neccessarily in order, but
2361 * since the order of write must be preserved this algorithm
2362 * chops the set each time the page changes. This also applies
2363 * if there is a delay required at any point in the sequence.
2364 */
2365 base = regs;
2366 for (i = 0, n = 0; i < num_regs; i++, n++) {
2367 unsigned int reg = regs[i].reg;
2368 struct regmap_range_node *range;
2369
2370 range = _regmap_range_lookup(map, reg);
2371 if (range) {
2372 unsigned int win_page = _regmap_register_page(map, reg,
2373 range);
2374
2375 if (i == 0)
2376 this_page = win_page;
2377 if (win_page != this_page) {
2378 this_page = win_page;
2379 page_change = 1;
2380 }
2381 }
2382
2383 /* If we have both a page change and a delay make sure to
2384 * write the regs and apply the delay before we change the
2385 * page.
2386 */
2387
2388 if (page_change || regs[i].delay_us) {
2389
2390 /* For situations where the first write requires
2391 * a delay we need to make sure we don't call
2392 * raw_multi_reg_write with n=0
2393 * This can't occur with page breaks as we
2394 * never write on the first iteration
2395 */
2396 if (regs[i].delay_us && i == 0)
2397 n = 1;
2398
2399 ret = _regmap_raw_multi_reg_write(map, base, n);
2400 if (ret != 0)
2401 return ret;
2402
2403 if (regs[i].delay_us) {
2404 if (map->can_sleep)
2405 fsleep(regs[i].delay_us);
2406 else
2407 udelay(regs[i].delay_us);
2408 }
2409
2410 base += n;
2411 n = 0;
2412
2413 if (page_change) {
2414 ret = _regmap_select_page(map,
2415 &base[n].reg,
2416 range, 1);
2417 if (ret != 0)
2418 return ret;
2419
2420 page_change = 0;
2421 }
2422
2423 }
2424
2425 }
2426 if (n > 0)
2427 return _regmap_raw_multi_reg_write(map, base, n);
2428 return 0;
2429}
2430
2431static int _regmap_multi_reg_write(struct regmap *map,
2432 const struct reg_sequence *regs,
2433 size_t num_regs)
2434{
2435 int i;
2436 int ret;
2437
2438 if (!map->can_multi_write) {
2439 for (i = 0; i < num_regs; i++) {
2440 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2441 if (ret != 0)
2442 return ret;
2443
2444 if (regs[i].delay_us) {
2445 if (map->can_sleep)
2446 fsleep(regs[i].delay_us);
2447 else
2448 udelay(regs[i].delay_us);
2449 }
2450 }
2451 return 0;
2452 }
2453
2454 if (!map->format.parse_inplace)
2455 return -EINVAL;
2456
2457 if (map->writeable_reg)
2458 for (i = 0; i < num_regs; i++) {
2459 int reg = regs[i].reg;
2460 if (!map->writeable_reg(map->dev, reg))
2461 return -EINVAL;
2462 if (!IS_ALIGNED(reg, map->reg_stride))
2463 return -EINVAL;
2464 }
2465
2466 if (!map->cache_bypass) {
2467 for (i = 0; i < num_regs; i++) {
2468 unsigned int val = regs[i].def;
2469 unsigned int reg = regs[i].reg;
2470 ret = regcache_write(map, reg, val);
2471 if (ret) {
2472 dev_err(map->dev,
2473 "Error in caching of register: %x ret: %d\n",
2474 reg, ret);
2475 return ret;
2476 }
2477 }
2478 if (map->cache_only) {
2479 map->cache_dirty = true;
2480 return 0;
2481 }
2482 }
2483
2484 WARN_ON(!map->bus);
2485
2486 for (i = 0; i < num_regs; i++) {
2487 unsigned int reg = regs[i].reg;
2488 struct regmap_range_node *range;
2489
2490 /* Coalesce all the writes between a page break or a delay
2491 * in a sequence
2492 */
2493 range = _regmap_range_lookup(map, reg);
2494 if (range || regs[i].delay_us) {
2495 size_t len = sizeof(struct reg_sequence)*num_regs;
2496 struct reg_sequence *base = kmemdup(regs, len,
2497 GFP_KERNEL);
2498 if (!base)
2499 return -ENOMEM;
2500 ret = _regmap_range_multi_paged_reg_write(map, base,
2501 num_regs);
2502 kfree(base);
2503
2504 return ret;
2505 }
2506 }
2507 return _regmap_raw_multi_reg_write(map, regs, num_regs);
2508}
2509
2510/**
2511 * regmap_multi_reg_write() - Write multiple registers to the device
2512 *
2513 * @map: Register map to write to
2514 * @regs: Array of structures containing register,value to be written
2515 * @num_regs: Number of registers to write
2516 *
2517 * Write multiple registers to the device where the set of register, value
2518 * pairs are supplied in any order, possibly not all in a single range.
2519 *
2520 * The 'normal' block write mode will send ultimately send data on the
2521 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
2522 * addressed. However, this alternative block multi write mode will send
2523 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2524 * must of course support the mode.
2525 *
2526 * A value of zero will be returned on success, a negative errno will be
2527 * returned in error cases.
2528 */
2529int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
2530 int num_regs)
2531{
2532 int ret;
2533
2534 map->lock(map->lock_arg);
2535
2536 ret = _regmap_multi_reg_write(map, regs, num_regs);
2537
2538 map->unlock(map->lock_arg);
2539
2540 return ret;
2541}
2542EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2543
2544/**
2545 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2546 * device but not the cache
2547 *
2548 * @map: Register map to write to
2549 * @regs: Array of structures containing register,value to be written
2550 * @num_regs: Number of registers to write
2551 *
2552 * Write multiple registers to the device but not the cache where the set
2553 * of register are supplied in any order.
2554 *
2555 * This function is intended to be used for writing a large block of data
2556 * atomically to the device in single transfer for those I2C client devices
2557 * that implement this alternative block write mode.
2558 *
2559 * A value of zero will be returned on success, a negative errno will
2560 * be returned in error cases.
2561 */
2562int regmap_multi_reg_write_bypassed(struct regmap *map,
2563 const struct reg_sequence *regs,
2564 int num_regs)
2565{
2566 int ret;
2567 bool bypass;
2568
2569 map->lock(map->lock_arg);
2570
2571 bypass = map->cache_bypass;
2572 map->cache_bypass = true;
2573
2574 ret = _regmap_multi_reg_write(map, regs, num_regs);
2575
2576 map->cache_bypass = bypass;
2577
2578 map->unlock(map->lock_arg);
2579
2580 return ret;
2581}
2582EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
2583
2584/**
2585 * regmap_raw_write_async() - Write raw values to one or more registers
2586 * asynchronously
2587 *
2588 * @map: Register map to write to
2589 * @reg: Initial register to write to
2590 * @val: Block of data to be written, laid out for direct transmission to the
2591 * device. Must be valid until regmap_async_complete() is called.
2592 * @val_len: Length of data pointed to by val.
2593 *
2594 * This function is intended to be used for things like firmware
2595 * download where a large block of data needs to be transferred to the
2596 * device. No formatting will be done on the data provided.
2597 *
2598 * If supported by the underlying bus the write will be scheduled
2599 * asynchronously, helping maximise I/O speed on higher speed buses
2600 * like SPI. regmap_async_complete() can be called to ensure that all
2601 * asynchrnous writes have been completed.
2602 *
2603 * A value of zero will be returned on success, a negative errno will
2604 * be returned in error cases.
2605 */
2606int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2607 const void *val, size_t val_len)
2608{
2609 int ret;
2610
2611 if (val_len % map->format.val_bytes)
2612 return -EINVAL;
2613 if (!IS_ALIGNED(reg, map->reg_stride))
2614 return -EINVAL;
2615
2616 map->lock(map->lock_arg);
2617
2618 map->async = true;
2619
2620 ret = _regmap_raw_write(map, reg, val, val_len, false);
2621
2622 map->async = false;
2623
2624 map->unlock(map->lock_arg);
2625
2626 return ret;
2627}
2628EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2629
2630static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2631 unsigned int val_len, bool noinc)
2632{
2633 struct regmap_range_node *range;
2634 int ret;
2635
2636 WARN_ON(!map->bus);
2637
2638 if (!map->bus || !map->bus->read)
2639 return -EINVAL;
2640
2641 range = _regmap_range_lookup(map, reg);
2642 if (range) {
2643 ret = _regmap_select_page(map, ®, range,
2644 noinc ? 1 : val_len / map->format.val_bytes);
2645 if (ret != 0)
2646 return ret;
2647 }
2648
2649 map->format.format_reg(map->work_buf, reg, map->reg_shift);
2650 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2651 map->read_flag_mask);
2652 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
2653
2654 ret = map->bus->read(map->bus_context, map->work_buf,
2655 map->format.reg_bytes + map->format.pad_bytes,
2656 val, val_len);
2657
2658 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
2659
2660 return ret;
2661}
2662
2663static int _regmap_bus_reg_read(void *context, unsigned int reg,
2664 unsigned int *val)
2665{
2666 struct regmap *map = context;
2667
2668 return map->bus->reg_read(map->bus_context, reg, val);
2669}
2670
2671static int _regmap_bus_read(void *context, unsigned int reg,
2672 unsigned int *val)
2673{
2674 int ret;
2675 struct regmap *map = context;
2676 void *work_val = map->work_buf + map->format.reg_bytes +
2677 map->format.pad_bytes;
2678
2679 if (!map->format.parse_val)
2680 return -EINVAL;
2681
2682 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
2683 if (ret == 0)
2684 *val = map->format.parse_val(work_val);
2685
2686 return ret;
2687}
2688
2689static int _regmap_read(struct regmap *map, unsigned int reg,
2690 unsigned int *val)
2691{
2692 int ret;
2693 void *context = _regmap_map_get_context(map);
2694
2695 if (!map->cache_bypass) {
2696 ret = regcache_read(map, reg, val);
2697 if (ret == 0)
2698 return 0;
2699 }
2700
2701 if (map->cache_only)
2702 return -EBUSY;
2703
2704 if (!regmap_readable(map, reg))
2705 return -EIO;
2706
2707 ret = map->reg_read(context, reg, val);
2708 if (ret == 0) {
2709 if (regmap_should_log(map))
2710 dev_info(map->dev, "%x => %x\n", reg, *val);
2711
2712 trace_regmap_reg_read(map, reg, *val);
2713
2714 if (!map->cache_bypass)
2715 regcache_write(map, reg, *val);
2716 }
2717
2718 return ret;
2719}
2720
2721/**
2722 * regmap_read() - Read a value from a single register
2723 *
2724 * @map: Register map to read from
2725 * @reg: Register to be read from
2726 * @val: Pointer to store read value
2727 *
2728 * A value of zero will be returned on success, a negative errno will
2729 * be returned in error cases.
2730 */
2731int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2732{
2733 int ret;
2734
2735 if (!IS_ALIGNED(reg, map->reg_stride))
2736 return -EINVAL;
2737
2738 map->lock(map->lock_arg);
2739
2740 ret = _regmap_read(map, reg, val);
2741
2742 map->unlock(map->lock_arg);
2743
2744 return ret;
2745}
2746EXPORT_SYMBOL_GPL(regmap_read);
2747
2748/**
2749 * regmap_raw_read() - Read raw data from the device
2750 *
2751 * @map: Register map to read from
2752 * @reg: First register to be read from
2753 * @val: Pointer to store read value
2754 * @val_len: Size of data to read
2755 *
2756 * A value of zero will be returned on success, a negative errno will
2757 * be returned in error cases.
2758 */
2759int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2760 size_t val_len)
2761{
2762 size_t val_bytes = map->format.val_bytes;
2763 size_t val_count = val_len / val_bytes;
2764 unsigned int v;
2765 int ret, i;
2766
2767 if (!map->bus)
2768 return -EINVAL;
2769 if (val_len % map->format.val_bytes)
2770 return -EINVAL;
2771 if (!IS_ALIGNED(reg, map->reg_stride))
2772 return -EINVAL;
2773 if (val_count == 0)
2774 return -EINVAL;
2775
2776 map->lock(map->lock_arg);
2777
2778 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2779 map->cache_type == REGCACHE_NONE) {
2780 size_t chunk_count, chunk_bytes;
2781 size_t chunk_regs = val_count;
2782
2783 if (!map->bus->read) {
2784 ret = -ENOTSUPP;
2785 goto out;
2786 }
2787
2788 if (map->use_single_read)
2789 chunk_regs = 1;
2790 else if (map->max_raw_read && val_len > map->max_raw_read)
2791 chunk_regs = map->max_raw_read / val_bytes;
2792
2793 chunk_count = val_count / chunk_regs;
2794 chunk_bytes = chunk_regs * val_bytes;
2795
2796 /* Read bytes that fit into whole chunks */
2797 for (i = 0; i < chunk_count; i++) {
2798 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
2799 if (ret != 0)
2800 goto out;
2801
2802 reg += regmap_get_offset(map, chunk_regs);
2803 val += chunk_bytes;
2804 val_len -= chunk_bytes;
2805 }
2806
2807 /* Read remaining bytes */
2808 if (val_len) {
2809 ret = _regmap_raw_read(map, reg, val, val_len, false);
2810 if (ret != 0)
2811 goto out;
2812 }
2813 } else {
2814 /* Otherwise go word by word for the cache; should be low
2815 * cost as we expect to hit the cache.
2816 */
2817 for (i = 0; i < val_count; i++) {
2818 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2819 &v);
2820 if (ret != 0)
2821 goto out;
2822
2823 map->format.format_val(val + (i * val_bytes), v, 0);
2824 }
2825 }
2826
2827 out:
2828 map->unlock(map->lock_arg);
2829
2830 return ret;
2831}
2832EXPORT_SYMBOL_GPL(regmap_raw_read);
2833
2834/**
2835 * regmap_noinc_read(): Read data from a register without incrementing the
2836 * register number
2837 *
2838 * @map: Register map to read from
2839 * @reg: Register to read from
2840 * @val: Pointer to data buffer
2841 * @val_len: Length of output buffer in bytes.
2842 *
2843 * The regmap API usually assumes that bulk bus read operations will read a
2844 * range of registers. Some devices have certain registers for which a read
2845 * operation read will read from an internal FIFO.
2846 *
2847 * The target register must be volatile but registers after it can be
2848 * completely unrelated cacheable registers.
2849 *
2850 * This will attempt multiple reads as required to read val_len bytes.
2851 *
2852 * A value of zero will be returned on success, a negative errno will be
2853 * returned in error cases.
2854 */
2855int regmap_noinc_read(struct regmap *map, unsigned int reg,
2856 void *val, size_t val_len)
2857{
2858 size_t read_len;
2859 int ret;
2860
2861 if (!map->bus)
2862 return -EINVAL;
2863 if (!map->bus->read)
2864 return -ENOTSUPP;
2865 if (val_len % map->format.val_bytes)
2866 return -EINVAL;
2867 if (!IS_ALIGNED(reg, map->reg_stride))
2868 return -EINVAL;
2869 if (val_len == 0)
2870 return -EINVAL;
2871
2872 map->lock(map->lock_arg);
2873
2874 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
2875 ret = -EINVAL;
2876 goto out_unlock;
2877 }
2878
2879 while (val_len) {
2880 if (map->max_raw_read && map->max_raw_read < val_len)
2881 read_len = map->max_raw_read;
2882 else
2883 read_len = val_len;
2884 ret = _regmap_raw_read(map, reg, val, read_len, true);
2885 if (ret)
2886 goto out_unlock;
2887 val = ((u8 *)val) + read_len;
2888 val_len -= read_len;
2889 }
2890
2891out_unlock:
2892 map->unlock(map->lock_arg);
2893 return ret;
2894}
2895EXPORT_SYMBOL_GPL(regmap_noinc_read);
2896
2897/**
2898 * regmap_field_read(): Read a value to a single register field
2899 *
2900 * @field: Register field to read from
2901 * @val: Pointer to store read value
2902 *
2903 * A value of zero will be returned on success, a negative errno will
2904 * be returned in error cases.
2905 */
2906int regmap_field_read(struct regmap_field *field, unsigned int *val)
2907{
2908 int ret;
2909 unsigned int reg_val;
2910 ret = regmap_read(field->regmap, field->reg, ®_val);
2911 if (ret != 0)
2912 return ret;
2913
2914 reg_val &= field->mask;
2915 reg_val >>= field->shift;
2916 *val = reg_val;
2917
2918 return ret;
2919}
2920EXPORT_SYMBOL_GPL(regmap_field_read);
2921
2922/**
2923 * regmap_fields_read() - Read a value to a single register field with port ID
2924 *
2925 * @field: Register field to read from
2926 * @id: port ID
2927 * @val: Pointer to store read value
2928 *
2929 * A value of zero will be returned on success, a negative errno will
2930 * be returned in error cases.
2931 */
2932int regmap_fields_read(struct regmap_field *field, unsigned int id,
2933 unsigned int *val)
2934{
2935 int ret;
2936 unsigned int reg_val;
2937
2938 if (id >= field->id_size)
2939 return -EINVAL;
2940
2941 ret = regmap_read(field->regmap,
2942 field->reg + (field->id_offset * id),
2943 ®_val);
2944 if (ret != 0)
2945 return ret;
2946
2947 reg_val &= field->mask;
2948 reg_val >>= field->shift;
2949 *val = reg_val;
2950
2951 return ret;
2952}
2953EXPORT_SYMBOL_GPL(regmap_fields_read);
2954
2955/**
2956 * regmap_bulk_read() - Read multiple registers from the device
2957 *
2958 * @map: Register map to read from
2959 * @reg: First register to be read from
2960 * @val: Pointer to store read value, in native register size for device
2961 * @val_count: Number of registers to read
2962 *
2963 * A value of zero will be returned on success, a negative errno will
2964 * be returned in error cases.
2965 */
2966int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2967 size_t val_count)
2968{
2969 int ret, i;
2970 size_t val_bytes = map->format.val_bytes;
2971 bool vol = regmap_volatile_range(map, reg, val_count);
2972
2973 if (!IS_ALIGNED(reg, map->reg_stride))
2974 return -EINVAL;
2975 if (val_count == 0)
2976 return -EINVAL;
2977
2978 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2979 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
2980 if (ret != 0)
2981 return ret;
2982
2983 for (i = 0; i < val_count * val_bytes; i += val_bytes)
2984 map->format.parse_inplace(val + i);
2985 } else {
2986#ifdef CONFIG_64BIT
2987 u64 *u64 = val;
2988#endif
2989 u32 *u32 = val;
2990 u16 *u16 = val;
2991 u8 *u8 = val;
2992
2993 map->lock(map->lock_arg);
2994
2995 for (i = 0; i < val_count; i++) {
2996 unsigned int ival;
2997
2998 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
2999 &ival);
3000 if (ret != 0)
3001 goto out;
3002
3003 switch (map->format.val_bytes) {
3004#ifdef CONFIG_64BIT
3005 case 8:
3006 u64[i] = ival;
3007 break;
3008#endif
3009 case 4:
3010 u32[i] = ival;
3011 break;
3012 case 2:
3013 u16[i] = ival;
3014 break;
3015 case 1:
3016 u8[i] = ival;
3017 break;
3018 default:
3019 ret = -EINVAL;
3020 goto out;
3021 }
3022 }
3023
3024out:
3025 map->unlock(map->lock_arg);
3026 }
3027
3028 return ret;
3029}
3030EXPORT_SYMBOL_GPL(regmap_bulk_read);
3031
3032static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3033 unsigned int mask, unsigned int val,
3034 bool *change, bool force_write)
3035{
3036 int ret;
3037 unsigned int tmp, orig;
3038
3039 if (change)
3040 *change = false;
3041
3042 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3043 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3044 if (ret == 0 && change)
3045 *change = true;
3046 } else {
3047 ret = _regmap_read(map, reg, &orig);
3048 if (ret != 0)
3049 return ret;
3050
3051 tmp = orig & ~mask;
3052 tmp |= val & mask;
3053
3054 if (force_write || (tmp != orig)) {
3055 ret = _regmap_write(map, reg, tmp);
3056 if (ret == 0 && change)
3057 *change = true;
3058 }
3059 }
3060
3061 return ret;
3062}
3063
3064/**
3065 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
3066 *
3067 * @map: Register map to update
3068 * @reg: Register to update
3069 * @mask: Bitmask to change
3070 * @val: New value for bitmask
3071 * @change: Boolean indicating if a write was done
3072 * @async: Boolean indicating asynchronously
3073 * @force: Boolean indicating use force update
3074 *
3075 * Perform a read/modify/write cycle on a register map with change, async, force
3076 * options.
3077 *
3078 * If async is true:
3079 *
3080 * With most buses the read must be done synchronously so this is most useful
3081 * for devices with a cache which do not need to interact with the hardware to
3082 * determine the current register value.
3083 *
3084 * Returns zero for success, a negative number on error.
3085 */
3086int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3087 unsigned int mask, unsigned int val,
3088 bool *change, bool async, bool force)
3089{
3090 int ret;
3091
3092 map->lock(map->lock_arg);
3093
3094 map->async = async;
3095
3096 ret = _regmap_update_bits(map, reg, mask, val, change, force);
3097
3098 map->async = false;
3099
3100 map->unlock(map->lock_arg);
3101
3102 return ret;
3103}
3104EXPORT_SYMBOL_GPL(regmap_update_bits_base);
3105
3106/**
3107 * regmap_test_bits() - Check if all specified bits are set in a register.
3108 *
3109 * @map: Register map to operate on
3110 * @reg: Register to read from
3111 * @bits: Bits to test
3112 *
3113 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3114 * bits are set and a negative error number if the underlying regmap_read()
3115 * fails.
3116 */
3117int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3118{
3119 unsigned int val, ret;
3120
3121 ret = regmap_read(map, reg, &val);
3122 if (ret)
3123 return ret;
3124
3125 return (val & bits) == bits;
3126}
3127EXPORT_SYMBOL_GPL(regmap_test_bits);
3128
3129void regmap_async_complete_cb(struct regmap_async *async, int ret)
3130{
3131 struct regmap *map = async->map;
3132 bool wake;
3133
3134 trace_regmap_async_io_complete(map);
3135
3136 spin_lock(&map->async_lock);
3137 list_move(&async->list, &map->async_free);
3138 wake = list_empty(&map->async_list);
3139
3140 if (ret != 0)
3141 map->async_ret = ret;
3142
3143 spin_unlock(&map->async_lock);
3144
3145 if (wake)
3146 wake_up(&map->async_waitq);
3147}
3148EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
3149
3150static int regmap_async_is_done(struct regmap *map)
3151{
3152 unsigned long flags;
3153 int ret;
3154
3155 spin_lock_irqsave(&map->async_lock, flags);
3156 ret = list_empty(&map->async_list);
3157 spin_unlock_irqrestore(&map->async_lock, flags);
3158
3159 return ret;
3160}
3161
3162/**
3163 * regmap_async_complete - Ensure all asynchronous I/O has completed.
3164 *
3165 * @map: Map to operate on.
3166 *
3167 * Blocks until any pending asynchronous I/O has completed. Returns
3168 * an error code for any failed I/O operations.
3169 */
3170int regmap_async_complete(struct regmap *map)
3171{
3172 unsigned long flags;
3173 int ret;
3174
3175 /* Nothing to do with no async support */
3176 if (!map->bus || !map->bus->async_write)
3177 return 0;
3178
3179 trace_regmap_async_complete_start(map);
3180
3181 wait_event(map->async_waitq, regmap_async_is_done(map));
3182
3183 spin_lock_irqsave(&map->async_lock, flags);
3184 ret = map->async_ret;
3185 map->async_ret = 0;
3186 spin_unlock_irqrestore(&map->async_lock, flags);
3187
3188 trace_regmap_async_complete_done(map);
3189
3190 return ret;
3191}
3192EXPORT_SYMBOL_GPL(regmap_async_complete);
3193
3194/**
3195 * regmap_register_patch - Register and apply register updates to be applied
3196 * on device initialistion
3197 *
3198 * @map: Register map to apply updates to.
3199 * @regs: Values to update.
3200 * @num_regs: Number of entries in regs.
3201 *
3202 * Register a set of register updates to be applied to the device
3203 * whenever the device registers are synchronised with the cache and
3204 * apply them immediately. Typically this is used to apply
3205 * corrections to be applied to the device defaults on startup, such
3206 * as the updates some vendors provide to undocumented registers.
3207 *
3208 * The caller must ensure that this function cannot be called
3209 * concurrently with either itself or regcache_sync().
3210 */
3211int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
3212 int num_regs)
3213{
3214 struct reg_sequence *p;
3215 int ret;
3216 bool bypass;
3217
3218 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3219 num_regs))
3220 return 0;
3221
3222 p = krealloc(map->patch,
3223 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
3224 GFP_KERNEL);
3225 if (p) {
3226 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3227 map->patch = p;
3228 map->patch_regs += num_regs;
3229 } else {
3230 return -ENOMEM;
3231 }
3232
3233 map->lock(map->lock_arg);
3234
3235 bypass = map->cache_bypass;
3236
3237 map->cache_bypass = true;
3238 map->async = true;
3239
3240 ret = _regmap_multi_reg_write(map, regs, num_regs);
3241
3242 map->async = false;
3243 map->cache_bypass = bypass;
3244
3245 map->unlock(map->lock_arg);
3246
3247 regmap_async_complete(map);
3248
3249 return ret;
3250}
3251EXPORT_SYMBOL_GPL(regmap_register_patch);
3252
3253/**
3254 * regmap_get_val_bytes() - Report the size of a register value
3255 *
3256 * @map: Register map to operate on.
3257 *
3258 * Report the size of a register value, mainly intended to for use by
3259 * generic infrastructure built on top of regmap.
3260 */
3261int regmap_get_val_bytes(struct regmap *map)
3262{
3263 if (map->format.format_write)
3264 return -EINVAL;
3265
3266 return map->format.val_bytes;
3267}
3268EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3269
3270/**
3271 * regmap_get_max_register() - Report the max register value
3272 *
3273 * @map: Register map to operate on.
3274 *
3275 * Report the max register value, mainly intended to for use by
3276 * generic infrastructure built on top of regmap.
3277 */
3278int regmap_get_max_register(struct regmap *map)
3279{
3280 return map->max_register ? map->max_register : -EINVAL;
3281}
3282EXPORT_SYMBOL_GPL(regmap_get_max_register);
3283
3284/**
3285 * regmap_get_reg_stride() - Report the register address stride
3286 *
3287 * @map: Register map to operate on.
3288 *
3289 * Report the register address stride, mainly intended to for use by
3290 * generic infrastructure built on top of regmap.
3291 */
3292int regmap_get_reg_stride(struct regmap *map)
3293{
3294 return map->reg_stride;
3295}
3296EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3297
3298int regmap_parse_val(struct regmap *map, const void *buf,
3299 unsigned int *val)
3300{
3301 if (!map->format.parse_val)
3302 return -EINVAL;
3303
3304 *val = map->format.parse_val(buf);
3305
3306 return 0;
3307}
3308EXPORT_SYMBOL_GPL(regmap_parse_val);
3309
3310static int __init regmap_initcall(void)
3311{
3312 regmap_debugfs_initcall();
3313
3314 return 0;
3315}
3316postcore_initcall(regmap_initcall);