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v6.8
   1// SPDX-License-Identifier: GPL-2.0-or-later
   2/*
   3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
   4 *          monitoring
   5 * Copyright (C) 2003-2010  Jean Delvare <jdelvare@suse.de>
   6 *
   7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
   8 * Semiconductor. It reports up to two temperatures (its own plus up to
   9 * one external one) with a 0.125 deg resolution (1 deg for local
  10 * temperature) and a 3-4 deg accuracy.
  11 *
  12 * This driver also supports the LM89 and LM99, two other sensor chips
  13 * made by National Semiconductor. Both have an increased remote
  14 * temperature measurement accuracy (1 degree), and the LM99
  15 * additionally shifts remote temperatures (measured and limits) by 16
  16 * degrees, which allows for higher temperatures measurement.
  17 * Note that there is no way to differentiate between both chips.
  18 * When device is auto-detected, the driver will assume an LM99.
  19 *
  20 * This driver also supports the LM86, another sensor chip made by
  21 * National Semiconductor. It is exactly similar to the LM90 except it
  22 * has a higher accuracy.
  23 *
  24 * This driver also supports the ADM1032, a sensor chip made by Analog
  25 * Devices. That chip is similar to the LM90, with a few differences
  26 * that are not handled by this driver. Among others, it has a higher
  27 * accuracy than the LM90, much like the LM86 does.
  28 *
  29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
  30 * chips made by Maxim. These chips are similar to the LM86.
  31 * Note that there is no easy way to differentiate between the three
  32 * variants. We use the device address to detect MAX6659, which will result
  33 * in a detection as max6657 if it is on address 0x4c. The extra address
  34 * and features of the MAX6659 are only supported if the chip is configured
  35 * explicitly as max6659, or if its address is not 0x4c.
  36 * These chips lack the remote temperature offset feature.
  37 *
  38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
  39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
  40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
  41 * limits. Extended range is available by setting the configuration register
  42 * accordingly, and is done during initialization. Extended precision is only
  43 * available at conversion rates of 1 Hz and slower. Note that extended
  44 * precision is not enabled by default, as this driver initializes all chips
  45 * to 2 Hz by design. The driver also supports MAX6690, which is practically
  46 * identical to MAX6654.
  47 *
  48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
  49 * MAX6692 chips made by Maxim.  These are again similar to the LM86,
  50 * but they use unsigned temperature values and can report temperatures
  51 * from 0 to 145 degrees.
  52 *
  53 * This driver also supports the MAX6680 and MAX6681, two other sensor
  54 * chips made by Maxim. These are quite similar to the other Maxim
  55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
  56 * be treated identically.
  57 *
  58 * This driver also supports the MAX6695 and MAX6696, two other sensor
  59 * chips made by Maxim. These are also quite similar to other Maxim
  60 * chips, but support three temperature sensors instead of two. MAX6695
  61 * and MAX6696 only differ in the pinout so they can be treated identically.
  62 *
  63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
  64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
  65 * and extended mode. They are mostly compatible with LM90 except for a data
  66 * format difference for the temperature value registers.
  67 *
  68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
  69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external
  70 * temperature sensors.
  71 *
  72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
  73 * The chips are similar to ADT7461/ADT7461A but have full PEC support
  74 * (undocumented).
  75 *
  76 * This driver also supports the SA56004 from Philips. This device is
  77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
  78 *
  79 * This driver also supports the G781 from GMT. This device is compatible
  80 * with the ADM1032.
  81 *
  82 * This driver also supports TMP451 and TMP461 from Texas Instruments.
  83 * Those devices are supported in both compatibility and extended mode.
  84 * They are mostly compatible with ADT7461 except for local temperature
  85 * low byte register and max conversion rate.
  86 *
  87 * This driver also supports MAX1617 and various clones such as G767
  88 * and NE1617. Such clones will be detected as MAX1617.
  89 *
  90 * This driver also supports NE1618 from Philips. It is similar to NE1617
  91 * but supports 11 bit external temperature values.
  92 *
  93 * Since the LM90 was the first chipset supported by this driver, most
  94 * comments will refer to this chipset, but are actually general and
  95 * concern all supported chipsets, unless mentioned otherwise.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  96 */
  97
  98#include <linux/bits.h>
  99#include <linux/device.h>
 100#include <linux/err.h>
 101#include <linux/i2c.h>
 102#include <linux/init.h>
 103#include <linux/interrupt.h>
 104#include <linux/jiffies.h>
 
 105#include <linux/hwmon.h>
 106#include <linux/kstrtox.h>
 107#include <linux/module.h>
 108#include <linux/mutex.h>
 109#include <linux/of.h>
 
 110#include <linux/regulator/consumer.h>
 111#include <linux/slab.h>
 112#include <linux/workqueue.h>
 113
 114/* The maximum number of channels currently supported */
 115#define MAX_CHANNELS	3
 116
 117/*
 118 * Addresses to scan
 119 * Address is fully defined internally and cannot be changed except for
 120 * MAX6659, MAX6680 and MAX6681.
 121 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
 122 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
 123 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
 124 * have address 0x4d.
 125 * MAX6647 has address 0x4e.
 126 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
 127 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
 128 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
 129 * SA56004 can have address 0x48 through 0x4F.
 130 */
 131
 132static const unsigned short normal_i2c[] = {
 133	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
 134	0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
 135
 136enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
 137	g781, lm84, lm90, lm99,
 138	max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
 139	nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,
 140};
 141
 142/*
 143 * The LM90 registers
 144 */
 145
 146#define LM90_REG_MAN_ID			0xFE
 147#define LM90_REG_CHIP_ID		0xFF
 148#define LM90_REG_CONFIG1		0x03
 149#define LM90_REG_CONFIG2		0xBF
 150#define LM90_REG_CONVRATE		0x04
 151#define LM90_REG_STATUS			0x02
 152#define LM90_REG_LOCAL_TEMP		0x00
 153#define LM90_REG_LOCAL_HIGH		0x05
 154#define LM90_REG_LOCAL_LOW		0x06
 155#define LM90_REG_LOCAL_CRIT		0x20
 156#define LM90_REG_REMOTE_TEMPH		0x01
 157#define LM90_REG_REMOTE_TEMPL		0x10
 158#define LM90_REG_REMOTE_OFFSH		0x11
 159#define LM90_REG_REMOTE_OFFSL		0x12
 160#define LM90_REG_REMOTE_HIGHH		0x07
 161#define LM90_REG_REMOTE_HIGHL		0x13
 162#define LM90_REG_REMOTE_LOWH		0x08
 163#define LM90_REG_REMOTE_LOWL		0x14
 164#define LM90_REG_REMOTE_CRIT		0x19
 165#define LM90_REG_TCRIT_HYST		0x21
 166
 167/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
 168
 169#define MAX6657_REG_LOCAL_TEMPL		0x11
 170#define MAX6696_REG_STATUS2		0x12
 171#define MAX6659_REG_REMOTE_EMERG	0x16
 172#define MAX6659_REG_LOCAL_EMERG		0x17
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 173
 174/*  SA56004 registers */
 175
 176#define SA56004_REG_LOCAL_TEMPL		0x22
 177
 178#define LM90_MAX_CONVRATE_MS	16000	/* Maximum conversion rate in ms */
 179
 180/* TMP451/TMP461 registers */
 181#define TMP451_REG_LOCAL_TEMPL		0x15
 182#define TMP451_REG_CONALERT		0x22
 183
 184#define TMP461_REG_CHEN			0x16
 185#define TMP461_REG_DFC			0x24
 186
 187/* ADT7481 registers */
 188#define ADT7481_REG_STATUS2		0x23
 189#define ADT7481_REG_CONFIG2		0x24
 190
 191#define ADT7481_REG_MAN_ID		0x3e
 192#define ADT7481_REG_CHIP_ID		0x3d
 193
 
 
 
 
 194/* Device features */
 195#define LM90_HAVE_EXTENDED_TEMP	BIT(0)	/* extended temperature support	*/
 196#define LM90_HAVE_OFFSET	BIT(1)	/* temperature offset register	*/
 197#define LM90_HAVE_UNSIGNED_TEMP	BIT(2)	/* temperatures are unsigned	*/
 198#define LM90_HAVE_REM_LIMIT_EXT	BIT(3)	/* extended remote limit	*/
 199#define LM90_HAVE_EMERGENCY	BIT(4)	/* 3rd upper (emergency) limit	*/
 200#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm		*/
 201#define LM90_HAVE_TEMP3		BIT(6)	/* 3rd temperature sensor	*/
 202#define LM90_HAVE_BROKEN_ALERT	BIT(7)	/* Broken alert			*/
 203#define LM90_PAUSE_FOR_CONFIG	BIT(8)	/* Pause conversion for config	*/
 204#define LM90_HAVE_CRIT		BIT(9)	/* Chip supports CRIT/OVERT register	*/
 205#define LM90_HAVE_CRIT_ALRM_SWP	BIT(10)	/* critical alarm bits swapped	*/
 206#define LM90_HAVE_PEC		BIT(11)	/* Chip supports PEC		*/
 207#define LM90_HAVE_PARTIAL_PEC	BIT(12)	/* Partial PEC support (adm1032)*/
 208#define LM90_HAVE_ALARMS	BIT(13)	/* Create 'alarms' attribute	*/
 209#define LM90_HAVE_EXT_UNSIGNED	BIT(14)	/* extended unsigned temperature*/
 210#define LM90_HAVE_LOW		BIT(15)	/* low limits			*/
 211#define LM90_HAVE_CONVRATE	BIT(16)	/* conversion rate		*/
 212#define LM90_HAVE_REMOTE_EXT	BIT(17)	/* extended remote temperature	*/
 213#define LM90_HAVE_FAULTQUEUE	BIT(18)	/* configurable samples count	*/
 214
 215/* LM90 status */
 216#define LM90_STATUS_LTHRM	BIT(0)	/* local THERM limit tripped */
 217#define LM90_STATUS_RTHRM	BIT(1)	/* remote THERM limit tripped */
 218#define LM90_STATUS_ROPEN	BIT(2)	/* remote is an open circuit */
 219#define LM90_STATUS_RLOW	BIT(3)	/* remote low temp limit tripped */
 220#define LM90_STATUS_RHIGH	BIT(4)	/* remote high temp limit tripped */
 221#define LM90_STATUS_LLOW	BIT(5)	/* local low temp limit tripped */
 222#define LM90_STATUS_LHIGH	BIT(6)	/* local high temp limit tripped */
 223#define LM90_STATUS_BUSY	BIT(7)	/* conversion is ongoing */
 224
 225/* MAX6695/6696 and ADT7481 2nd status register */
 226#define MAX6696_STATUS2_R2THRM	BIT(1)	/* remote2 THERM limit tripped */
 227#define MAX6696_STATUS2_R2OPEN	BIT(2)	/* remote2 is an open circuit */
 228#define MAX6696_STATUS2_R2LOW	BIT(3)	/* remote2 low temp limit tripped */
 229#define MAX6696_STATUS2_R2HIGH	BIT(4)	/* remote2 high temp limit tripped */
 230#define MAX6696_STATUS2_ROT2	BIT(5)	/* remote emergency limit tripped */
 231#define MAX6696_STATUS2_R2OT2	BIT(6)	/* remote2 emergency limit tripped */
 232#define MAX6696_STATUS2_LOT2	BIT(7)	/* local emergency limit tripped */
 233
 234/*
 235 * Driver data (common to all clients)
 236 */
 237
 238static const struct i2c_device_id lm90_id[] = {
 239	{ "adm1020", max1617 },
 240	{ "adm1021", max1617 },
 241	{ "adm1023", adm1023 },
 242	{ "adm1032", adm1032 },
 243	{ "adt7421", adt7461a },
 244	{ "adt7461", adt7461 },
 245	{ "adt7461a", adt7461a },
 246	{ "adt7481", adt7481 },
 247	{ "adt7482", adt7481 },
 248	{ "adt7483a", adt7481 },
 249	{ "g781", g781 },
 250	{ "gl523sm", max1617 },
 251	{ "lm84", lm84 },
 252	{ "lm86", lm90 },
 253	{ "lm89", lm90 },
 254	{ "lm90", lm90 },
 
 
 255	{ "lm99", lm99 },
 256	{ "max1617", max1617 },
 257	{ "max6642", max6642 },
 258	{ "max6646", max6646 },
 259	{ "max6647", max6646 },
 260	{ "max6648", max6648 },
 261	{ "max6649", max6646 },
 262	{ "max6654", max6654 },
 263	{ "max6657", max6657 },
 264	{ "max6658", max6657 },
 265	{ "max6659", max6659 },
 266	{ "max6680", max6680 },
 267	{ "max6681", max6680 },
 268	{ "max6690", max6654 },
 269	{ "max6692", max6648 },
 270	{ "max6695", max6696 },
 271	{ "max6696", max6696 },
 272	{ "mc1066", max1617 },
 273	{ "nct1008", adt7461a },
 274	{ "nct210", nct210 },
 275	{ "nct214", nct72 },
 276	{ "nct218", nct72 },
 277	{ "nct72", nct72 },
 278	{ "ne1618", ne1618 },
 279	{ "w83l771", w83l771 },
 280	{ "sa56004", sa56004 },
 281	{ "thmc10", max1617 },
 282	{ "tmp451", tmp451 },
 283	{ "tmp461", tmp461 },
 284	{ }
 285};
 286MODULE_DEVICE_TABLE(i2c, lm90_id);
 287
 288static const struct of_device_id __maybe_unused lm90_of_match[] = {
 289	{
 290		.compatible = "adi,adm1032",
 291		.data = (void *)adm1032
 292	},
 293	{
 294		.compatible = "adi,adt7461",
 295		.data = (void *)adt7461
 296	},
 297	{
 298		.compatible = "adi,adt7461a",
 299		.data = (void *)adt7461a
 300	},
 301	{
 302		.compatible = "adi,adt7481",
 303		.data = (void *)adt7481
 304	},
 305	{
 306		.compatible = "gmt,g781",
 307		.data = (void *)g781
 308	},
 309	{
 310		.compatible = "national,lm90",
 311		.data = (void *)lm90
 312	},
 313	{
 314		.compatible = "national,lm86",
 315		.data = (void *)lm90
 316	},
 317	{
 318		.compatible = "national,lm89",
 319		.data = (void *)lm90
 320	},
 321	{
 322		.compatible = "national,lm99",
 323		.data = (void *)lm99
 324	},
 325	{
 326		.compatible = "dallas,max6646",
 327		.data = (void *)max6646
 328	},
 329	{
 330		.compatible = "dallas,max6647",
 331		.data = (void *)max6646
 332	},
 333	{
 334		.compatible = "dallas,max6649",
 335		.data = (void *)max6646
 336	},
 337	{
 338		.compatible = "dallas,max6654",
 339		.data = (void *)max6654
 340	},
 341	{
 342		.compatible = "dallas,max6657",
 343		.data = (void *)max6657
 344	},
 345	{
 346		.compatible = "dallas,max6658",
 347		.data = (void *)max6657
 348	},
 349	{
 350		.compatible = "dallas,max6659",
 351		.data = (void *)max6659
 352	},
 353	{
 354		.compatible = "dallas,max6680",
 355		.data = (void *)max6680
 356	},
 357	{
 358		.compatible = "dallas,max6681",
 359		.data = (void *)max6680
 360	},
 361	{
 362		.compatible = "dallas,max6695",
 363		.data = (void *)max6696
 364	},
 365	{
 366		.compatible = "dallas,max6696",
 367		.data = (void *)max6696
 368	},
 369	{
 370		.compatible = "onnn,nct1008",
 371		.data = (void *)adt7461a
 372	},
 373	{
 374		.compatible = "onnn,nct214",
 375		.data = (void *)nct72
 376	},
 377	{
 378		.compatible = "onnn,nct218",
 379		.data = (void *)nct72
 380	},
 381	{
 382		.compatible = "onnn,nct72",
 383		.data = (void *)nct72
 384	},
 385	{
 386		.compatible = "winbond,w83l771",
 387		.data = (void *)w83l771
 388	},
 389	{
 390		.compatible = "nxp,sa56004",
 391		.data = (void *)sa56004
 392	},
 393	{
 394		.compatible = "ti,tmp451",
 395		.data = (void *)tmp451
 396	},
 397	{
 398		.compatible = "ti,tmp461",
 399		.data = (void *)tmp461
 400	},
 401	{ },
 402};
 403MODULE_DEVICE_TABLE(of, lm90_of_match);
 404
 405/*
 406 * chip type specific parameters
 407 */
 408struct lm90_params {
 409	u32 flags;		/* Capabilities */
 410	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
 411				/* Upper 8 bits for max6695/96 */
 412	u8 max_convrate;	/* Maximum conversion rate register value */
 413	u8 resolution;		/* 16-bit resolution (default 11 bit) */
 414	u8 reg_status2;		/* 2nd status register (optional) */
 415	u8 reg_local_ext;	/* Extended local temp register (optional) */
 416	u8 faultqueue_mask;	/* fault queue bit mask */
 417	u8 faultqueue_depth;	/* fault queue depth if mask is used */
 418};
 419
 420static const struct lm90_params lm90_params[] = {
 421	[adm1023] = {
 422		.flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
 423		  | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 424		  | LM90_HAVE_REMOTE_EXT,
 425		.alert_alarms = 0x7c,
 426		.resolution = 8,
 427		.max_convrate = 7,
 428	},
 429	[adm1032] = {
 430		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 431		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
 432		  | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
 433		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 434		  | LM90_HAVE_FAULTQUEUE,
 435		.alert_alarms = 0x7c,
 436		.max_convrate = 10,
 437	},
 438	[adt7461] = {
 439		/*
 440		 * Standard temperature range is supposed to be unsigned,
 441		 * but that does not match reality. Negative temperatures
 442		 * are always reported.
 443		 */
 444		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 445		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
 446		  | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
 447		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 448		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 449		.alert_alarms = 0x7c,
 450		.max_convrate = 10,
 451		.resolution = 10,
 452	},
 453	[adt7461a] = {
 454		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 455		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
 456		  | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
 457		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 458		  | LM90_HAVE_FAULTQUEUE,
 459		.alert_alarms = 0x7c,
 460		.max_convrate = 10,
 461	},
 462	[adt7481] = {
 463		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 464		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
 465		  | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
 466		  | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
 467		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 468		  | LM90_HAVE_FAULTQUEUE,
 469		.alert_alarms = 0x1c7c,
 470		.max_convrate = 11,
 471		.resolution = 10,
 472		.reg_status2 = ADT7481_REG_STATUS2,
 473	},
 474	[g781] = {
 475		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 476		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
 477		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 478		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 479		.alert_alarms = 0x7c,
 480		.max_convrate = 7,
 481	},
 482	[lm84] = {
 483		.flags = LM90_HAVE_ALARMS,
 484		.resolution = 8,
 
 485	},
 486	[lm90] = {
 487		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 488		  | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
 489		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 490		  | LM90_HAVE_FAULTQUEUE,
 491		.alert_alarms = 0x7b,
 492		.max_convrate = 9,
 493		.faultqueue_mask = BIT(0),
 494		.faultqueue_depth = 3,
 495	},
 496	[lm99] = {
 497		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 498		  | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
 499		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 500		  | LM90_HAVE_FAULTQUEUE,
 501		.alert_alarms = 0x7b,
 502		.max_convrate = 9,
 503		.faultqueue_mask = BIT(0),
 504		.faultqueue_depth = 3,
 505	},
 506	[max1617] = {
 507		.flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
 508		  LM90_HAVE_LOW | LM90_HAVE_ALARMS,
 509		.alert_alarms = 0x78,
 510		.resolution = 8,
 511		.max_convrate = 7,
 512	},
 513	[max6642] = {
 514		.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
 515		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 516		.alert_alarms = 0x50,
 517		.resolution = 10,
 518		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 519		.faultqueue_mask = BIT(4),
 520		.faultqueue_depth = 2,
 521	},
 522	[max6646] = {
 523		.flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
 524		  | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
 525		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
 526		.alert_alarms = 0x7c,
 527		.max_convrate = 6,
 528		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 529	},
 530	[max6648] = {
 531		.flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
 532		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
 533		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
 534		.alert_alarms = 0x7c,
 535		.max_convrate = 6,
 536		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 537	},
 538	[max6654] = {
 539		.flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
 540		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
 541		.alert_alarms = 0x7c,
 542		.max_convrate = 7,
 543		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 544	},
 545	[max6657] = {
 546		.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
 547		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 548		  | LM90_HAVE_REMOTE_EXT,
 549		.alert_alarms = 0x7c,
 550		.max_convrate = 8,
 551		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 552	},
 553	[max6659] = {
 554		.flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
 555		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 556		  | LM90_HAVE_REMOTE_EXT,
 557		.alert_alarms = 0x7c,
 558		.max_convrate = 8,
 559		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 560	},
 561	[max6680] = {
 562		/*
 563		 * Apparent temperatures of 128 degrees C or higher are reported
 564		 * and treated as negative temperatures (meaning min_alarm will
 565		 * be set).
 566		 */
 567		.flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
 568		  | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
 569		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 570		  | LM90_HAVE_REMOTE_EXT,
 571		.alert_alarms = 0x7c,
 572		.max_convrate = 7,
 573	},
 574	[max6696] = {
 575		.flags = LM90_HAVE_EMERGENCY
 576		  | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
 577		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 578		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 579		.alert_alarms = 0x1c7c,
 580		.max_convrate = 6,
 581		.reg_status2 = MAX6696_REG_STATUS2,
 582		.reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
 583		.faultqueue_mask = BIT(5),
 584		.faultqueue_depth = 4,
 585	},
 586	[nct72] = {
 587		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 588		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
 589		  | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
 590		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
 591		  | LM90_HAVE_FAULTQUEUE,
 592		.alert_alarms = 0x7c,
 593		.max_convrate = 10,
 594		.resolution = 10,
 595	},
 596	[nct210] = {
 597		.flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
 598		  | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 599		  | LM90_HAVE_REMOTE_EXT,
 600		.alert_alarms = 0x7c,
 601		.resolution = 11,
 602		.max_convrate = 7,
 603	},
 604	[ne1618] = {
 605		.flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
 606		  | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
 607		.alert_alarms = 0x7c,
 608		.resolution = 11,
 609		.max_convrate = 7,
 610	},
 611	[w83l771] = {
 612		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
 613		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 614		  | LM90_HAVE_REMOTE_EXT,
 615		.alert_alarms = 0x7c,
 616		.max_convrate = 8,
 617	},
 618	[sa56004] = {
 619		/*
 620		 * Apparent temperatures of 128 degrees C or higher are reported
 621		 * and treated as negative temperatures (meaning min_alarm will
 622		 * be set).
 623		 */
 624		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
 625		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 626		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 627		.alert_alarms = 0x7b,
 628		.max_convrate = 9,
 629		.reg_local_ext = SA56004_REG_LOCAL_TEMPL,
 630		.faultqueue_mask = BIT(0),
 631		.faultqueue_depth = 3,
 632	},
 633	[tmp451] = {
 634		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 635		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
 636		  | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
 637		  | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 638		.alert_alarms = 0x7c,
 639		.max_convrate = 9,
 640		.resolution = 12,
 641		.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
 642	},
 643	[tmp461] = {
 644		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 645		  | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
 646		  | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
 647		  | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
 648		.alert_alarms = 0x7c,
 649		.max_convrate = 9,
 650		.resolution = 12,
 651		.reg_local_ext = TMP451_REG_LOCAL_TEMPL,
 652	},
 653};
 654
 655/*
 656 * temperature register index
 657 */
 658enum lm90_temp_reg_index {
 659	LOCAL_LOW = 0,
 660	LOCAL_HIGH,
 661	LOCAL_CRIT,
 662	REMOTE_CRIT,
 663	LOCAL_EMERG,	/* max6659 and max6695/96 */
 664	REMOTE_EMERG,	/* max6659 and max6695/96 */
 665	REMOTE2_CRIT,	/* max6695/96 only */
 666	REMOTE2_EMERG,	/* max6695/96 only */
 
 
 667
 668	REMOTE_TEMP,
 
 
 
 
 669	REMOTE_LOW,
 670	REMOTE_HIGH,
 671	REMOTE_OFFSET,	/* except max6646, max6657/58/59, and max6695/96 */
 672	LOCAL_TEMP,
 673	REMOTE2_TEMP,	/* max6695/96 only */
 674	REMOTE2_LOW,	/* max6695/96 only */
 675	REMOTE2_HIGH,	/* max6695/96 only */
 676	REMOTE2_OFFSET,
 677
 678	TEMP_REG_NUM
 679};
 680
 681/*
 682 * Client data (each client gets its own)
 683 */
 684
 685struct lm90_data {
 686	struct i2c_client *client;
 687	struct device *hwmon_dev;
 688	u32 chip_config[2];
 689	u32 channel_config[MAX_CHANNELS + 1];
 690	const char *channel_label[MAX_CHANNELS];
 691	struct hwmon_channel_info chip_info;
 692	struct hwmon_channel_info temp_info;
 693	const struct hwmon_channel_info *info[3];
 694	struct hwmon_chip_info chip;
 695	struct mutex update_lock;
 696	struct delayed_work alert_work;
 697	struct work_struct report_work;
 698	bool valid;		/* true if register values are valid */
 699	bool alarms_valid;	/* true if status register values are valid */
 700	unsigned long last_updated; /* in jiffies */
 701	unsigned long alarms_updated; /* in jiffies */
 702	int kind;
 703	u32 flags;
 704
 705	unsigned int update_interval; /* in milliseconds */
 706
 707	u8 config;		/* Current configuration register value */
 708	u8 config_orig;		/* Original configuration register value */
 709	u8 convrate_orig;	/* Original conversion rate register value */
 710	u8 resolution;		/* temperature resolution in bit */
 711	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
 712				/* Upper 8 bits for max6695/96 */
 713	u8 max_convrate;	/* Maximum conversion rate */
 714	u8 reg_status2;		/* 2nd status register (optional) */
 715	u8 reg_local_ext;	/* local extension register offset */
 716	u8 reg_remote_ext;	/* remote temperature low byte */
 717	u8 faultqueue_mask;	/* fault queue mask */
 718	u8 faultqueue_depth;	/* fault queue mask */
 719
 720	/* registers values */
 721	u16 temp[TEMP_REG_NUM];
 
 722	u8 temp_hyst;
 723	u8 conalert;
 724	u16 reported_alarms;	/* alarms reported as sysfs/udev events */
 725	u16 current_alarms;	/* current alarms, reported by chip */
 726	u16 alarms;		/* alarms not yet reported to user */
 727};
 728
 729/*
 730 * Support functions
 731 */
 732
 733/*
 734 * If the chip supports PEC but not on write byte transactions, we need
 735 * to explicitly ask for a transaction without PEC.
 736 */
 737static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
 738{
 739	return i2c_smbus_xfer(client->adapter, client->addr,
 740			      client->flags & ~I2C_CLIENT_PEC,
 741			      I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
 742}
 743
 744/*
 745 * It is assumed that client->update_lock is held (unless we are in
 746 * detection or initialization steps). This matters when PEC is enabled
 747 * for chips with partial PEC support, because we don't want the address
 748 * pointer to change between the write byte and the read byte transactions.
 749 */
 750static int lm90_read_reg(struct i2c_client *client, u8 reg)
 751{
 752	struct lm90_data *data = i2c_get_clientdata(client);
 753	bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
 754			(data->flags & LM90_HAVE_PARTIAL_PEC);
 755	int err;
 756
 757	if (partial_pec) {
 758		err = lm90_write_no_pec(client, reg);
 759		if (err)
 760			return err;
 761		return i2c_smbus_read_byte(client);
 762	}
 763	return i2c_smbus_read_byte_data(client, reg);
 764}
 765
 766/*
 767 * Return register write address
 768 *
 769 * The write address for registers 0x03 .. 0x08 is the read address plus 6.
 770 * For other registers the write address matches the read address.
 771 */
 772static u8 lm90_write_reg_addr(u8 reg)
 773{
 774	if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
 775		return reg + 6;
 776	return reg;
 777}
 778
 779/*
 780 * Write into LM90 register.
 781 * Convert register address to write address if needed, then execute the
 782 * operation.
 783 */
 784static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
 785{
 786	return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
 787}
 788
 789/*
 790 * Write into 16-bit LM90 register.
 791 * Convert register addresses to write address if needed, then execute the
 792 * operation.
 793 */
 794static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
 795{
 796	int ret;
 797
 798	ret = lm90_write_reg(client, regh, val >> 8);
 799	if (ret < 0 || !regl)
 800		return ret;
 801	return lm90_write_reg(client, regl, val & 0xff);
 802}
 803
 804static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
 805		       bool is_volatile)
 806{
 807	int oldh, newh, l;
 808
 809	oldh = lm90_read_reg(client, regh);
 810	if (oldh < 0)
 811		return oldh;
 812
 813	if (!regl)
 814		return oldh << 8;
 815
 816	l = lm90_read_reg(client, regl);
 817	if (l < 0)
 818		return l;
 819
 820	if (!is_volatile)
 821		return (oldh << 8) | l;
 822
 823	/*
 824	 * For volatile registers we have to use a trick.
 825	 * We have to read two registers to have the sensor temperature,
 826	 * but we have to beware a conversion could occur between the
 827	 * readings. The datasheet says we should either use
 828	 * the one-shot conversion register, which we don't want to do
 829	 * (disables hardware monitoring) or monitor the busy bit, which is
 830	 * impossible (we can't read the values and monitor that bit at the
 831	 * exact same time). So the solution used here is to read the high
 832	 * the high byte again. If the new high byte matches the old one,
 833	 * then we have a valid reading. Otherwise we have to read the low
 834	 * byte again, and now we believe we have a correct reading.
 
 835	 */
 
 
 
 
 
 
 836	newh = lm90_read_reg(client, regh);
 837	if (newh < 0)
 838		return newh;
 839	if (oldh != newh) {
 840		l = lm90_read_reg(client, regl);
 841		if (l < 0)
 842			return l;
 843	}
 844	return (newh << 8) | l;
 845}
 846
 847static int lm90_update_confreg(struct lm90_data *data, u8 config)
 848{
 849	if (data->config != config) {
 850		int err;
 851
 852		err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
 853		if (err)
 854			return err;
 855		data->config = config;
 856	}
 857	return 0;
 858}
 859
 860/*
 861 * client->update_lock must be held when calling this function (unless we are
 862 * in detection or initialization steps), and while a remote channel other
 863 * than channel 0 is selected. Also, calling code must make sure to re-select
 864 * external channel 0 before releasing the lock. This is necessary because
 865 * various registers have different meanings as a result of selecting a
 866 * non-default remote channel.
 867 */
 868static int lm90_select_remote_channel(struct lm90_data *data, bool second)
 869{
 870	u8 config = data->config & ~0x08;
 871
 872	if (second)
 873		config |= 0x08;
 874
 875	return lm90_update_confreg(data, config);
 876}
 877
 878static int lm90_write_convrate(struct lm90_data *data, int val)
 879{
 880	u8 config = data->config;
 881	int err;
 882
 883	/* Save config and pause conversion */
 884	if (data->flags & LM90_PAUSE_FOR_CONFIG) {
 885		err = lm90_update_confreg(data, config | 0x40);
 886		if (err < 0)
 887			return err;
 888	}
 889
 890	/* Set conv rate */
 891	err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
 892
 893	/* Revert change to config */
 894	lm90_update_confreg(data, config);
 895
 896	return err;
 897}
 898
 899/*
 900 * Set conversion rate.
 901 * client->update_lock must be held when calling this function (unless we are
 902 * in detection or initialization steps).
 903 */
 904static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
 905			     unsigned int interval)
 906{
 907	unsigned int update_interval;
 908	int i, err;
 909
 910	/* Shift calculations to avoid rounding errors */
 911	interval <<= 6;
 912
 913	/* find the nearest update rate */
 914	for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
 915	     i < data->max_convrate; i++, update_interval >>= 1)
 916		if (interval >= update_interval * 3 / 4)
 917			break;
 918
 919	err = lm90_write_convrate(data, i);
 920	data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
 921	return err;
 922}
 923
 924static int lm90_set_faultqueue(struct i2c_client *client,
 925			       struct lm90_data *data, int val)
 926{
 927	int err;
 928
 929	if (data->faultqueue_mask) {
 930		err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
 931					  data->config & ~data->faultqueue_mask :
 932					  data->config | data->faultqueue_mask);
 933	} else {
 934		static const u8 values[4] = {0, 2, 6, 0x0e};
 935
 936		data->conalert = (data->conalert & 0xf1) | values[val - 1];
 937		err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
 938				     data->conalert);
 939	}
 940
 941	return err;
 942}
 943
 944static int lm90_update_limits(struct device *dev)
 945{
 946	struct lm90_data *data = dev_get_drvdata(dev);
 947	struct i2c_client *client = data->client;
 948	int val;
 949
 950	if (data->flags & LM90_HAVE_CRIT) {
 951		val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
 952		if (val < 0)
 953			return val;
 954		data->temp[LOCAL_CRIT] = val << 8;
 955
 956		val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
 957		if (val < 0)
 958			return val;
 959		data->temp[REMOTE_CRIT] = val << 8;
 960
 961		val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
 962		if (val < 0)
 963			return val;
 964		data->temp_hyst = val;
 965	}
 966	if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
 967		val = lm90_read_reg(client, TMP451_REG_CONALERT);
 
 
 
 
 
 968		if (val < 0)
 969			return val;
 970		data->conalert = val;
 971	}
 972
 973	val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
 974			  (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
 975			  false);
 976	if (val < 0)
 977		return val;
 978	data->temp[REMOTE_LOW] = val;
 979
 980	val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
 981			  (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
 982			  false);
 983	if (val < 0)
 984		return val;
 985	data->temp[REMOTE_HIGH] = val;
 986
 987	if (data->flags & LM90_HAVE_OFFSET) {
 988		val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
 989				  LM90_REG_REMOTE_OFFSL, false);
 990		if (val < 0)
 991			return val;
 992		data->temp[REMOTE_OFFSET] = val;
 993	}
 994
 995	if (data->flags & LM90_HAVE_EMERGENCY) {
 996		val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
 997		if (val < 0)
 998			return val;
 999		data->temp[LOCAL_EMERG] = val << 8;
1000
1001		val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1002		if (val < 0)
1003			return val;
1004		data->temp[REMOTE_EMERG] = val << 8;
1005	}
1006
1007	if (data->flags & LM90_HAVE_TEMP3) {
1008		val = lm90_select_remote_channel(data, true);
1009		if (val < 0)
1010			return val;
1011
1012		val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1013		if (val < 0)
1014			return val;
1015		data->temp[REMOTE2_CRIT] = val << 8;
1016
1017		if (data->flags & LM90_HAVE_EMERGENCY) {
1018			val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1019			if (val < 0)
1020				return val;
1021			data->temp[REMOTE2_EMERG] = val << 8;
1022		}
1023
1024		val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
1025		if (val < 0)
1026			return val;
1027		data->temp[REMOTE2_LOW] = val << 8;
1028
1029		val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
1030		if (val < 0)
1031			return val;
1032		data->temp[REMOTE2_HIGH] = val << 8;
1033
1034		if (data->flags & LM90_HAVE_OFFSET) {
1035			val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1036					  LM90_REG_REMOTE_OFFSL, false);
1037			if (val < 0)
1038				return val;
1039			data->temp[REMOTE2_OFFSET] = val;
1040		}
1041
1042		lm90_select_remote_channel(data, false);
1043	}
1044
1045	return 0;
1046}
1047
1048static void lm90_report_alarms(struct work_struct *work)
1049{
1050	struct lm90_data *data = container_of(work, struct lm90_data, report_work);
1051	u16 cleared_alarms, new_alarms, current_alarms;
1052	struct device *hwmon_dev = data->hwmon_dev;
1053	struct device *dev = &data->client->dev;
1054	int st, st2;
1055
1056	current_alarms = data->current_alarms;
1057	cleared_alarms = data->reported_alarms & ~current_alarms;
1058	new_alarms = current_alarms & ~data->reported_alarms;
1059
1060	if (!cleared_alarms && !new_alarms)
1061		return;
1062
1063	st = new_alarms & 0xff;
1064	st2 = new_alarms >> 8;
1065
1066	if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1067	    (st2 & MAX6696_STATUS2_LOT2))
1068		dev_dbg(dev, "temp%d out of range, please check!\n", 1);
1069	if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1070	    (st2 & MAX6696_STATUS2_ROT2))
1071		dev_dbg(dev, "temp%d out of range, please check!\n", 2);
1072	if (st & LM90_STATUS_ROPEN)
1073		dev_dbg(dev, "temp%d diode open, please check!\n", 2);
1074	if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1075		   MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1076		dev_dbg(dev, "temp%d out of range, please check!\n", 3);
1077	if (st2 & MAX6696_STATUS2_R2OPEN)
1078		dev_dbg(dev, "temp%d diode open, please check!\n", 3);
1079
1080	st |= cleared_alarms & 0xff;
1081	st2 |= cleared_alarms >> 8;
1082
1083	if (st & LM90_STATUS_LLOW)
1084		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
1085	if (st & LM90_STATUS_RLOW)
1086		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
1087	if (st2 & MAX6696_STATUS2_R2LOW)
1088		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
1089
1090	if (st & LM90_STATUS_LHIGH)
1091		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
1092	if (st & LM90_STATUS_RHIGH)
1093		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
1094	if (st2 & MAX6696_STATUS2_R2HIGH)
1095		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
1096
1097	if (st & LM90_STATUS_LTHRM)
1098		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
1099	if (st & LM90_STATUS_RTHRM)
1100		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
1101	if (st2 & MAX6696_STATUS2_R2THRM)
1102		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
1103
1104	if (st2 & MAX6696_STATUS2_LOT2)
1105		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
1106	if (st2 & MAX6696_STATUS2_ROT2)
1107		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
1108	if (st2 & MAX6696_STATUS2_R2OT2)
1109		hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
1110
1111	data->reported_alarms = current_alarms;
1112}
1113
1114static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
1115{
1116	if (force || !data->alarms_valid ||
1117	    time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
1118		struct i2c_client *client = data->client;
1119		bool check_enable;
1120		u16 alarms;
1121		int val;
1122
1123		data->alarms_valid = false;
1124
1125		val = lm90_read_reg(client, LM90_REG_STATUS);
1126		if (val < 0)
1127			return val;
1128		alarms = val & ~LM90_STATUS_BUSY;
1129
1130		if (data->reg_status2) {
1131			val = lm90_read_reg(client, data->reg_status2);
1132			if (val < 0)
1133				return val;
1134			alarms |= val << 8;
1135		}
1136		/*
1137		 * If the update is forced (called from interrupt or alert
1138		 * handler) and alarm data is valid, the alarms may have been
1139		 * updated after the last update interval, and the status
1140		 * register may still be cleared. Only add additional alarms
1141		 * in this case. Alarms will be cleared later if appropriate.
1142		 */
1143		if (force && data->alarms_valid)
1144			data->current_alarms |= alarms;
1145		else
1146			data->current_alarms = alarms;
1147		data->alarms |= alarms;
1148
1149		check_enable = (client->irq || !(data->config_orig & 0x80)) &&
1150			(data->config & 0x80);
1151
1152		if (force || check_enable)
1153			schedule_work(&data->report_work);
1154
1155		/*
1156		 * Re-enable ALERT# output if it was originally enabled, relevant
1157		 * alarms are all clear, and alerts are currently disabled.
1158		 * Otherwise (re)schedule worker if needed.
1159		 */
1160		if (check_enable) {
1161			if (!(data->current_alarms & data->alert_alarms)) {
1162				dev_dbg(&client->dev, "Re-enabling ALERT#\n");
1163				lm90_update_confreg(data, data->config & ~0x80);
1164				/*
1165				 * We may have been called from the update handler.
1166				 * If so, the worker, if scheduled, is no longer
1167				 * needed. Cancel it. Don't synchronize because
1168				 * it may already be running.
1169				 */
1170				cancel_delayed_work(&data->alert_work);
1171			} else {
1172				schedule_delayed_work(&data->alert_work,
1173					max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
1174			}
1175		}
1176		data->alarms_updated = jiffies;
1177		data->alarms_valid = true;
1178	}
1179	return 0;
1180}
1181
1182static int lm90_update_alarms(struct lm90_data *data, bool force)
1183{
1184	int err;
1185
1186	mutex_lock(&data->update_lock);
1187	err = lm90_update_alarms_locked(data, force);
1188	mutex_unlock(&data->update_lock);
1189
1190	return err;
1191}
1192
1193static void lm90_alert_work(struct work_struct *__work)
1194{
1195	struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
1196	struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
1197
1198	/* Nothing to do if alerts are enabled */
1199	if (!(data->config & 0x80))
1200		return;
1201
1202	lm90_update_alarms(data, true);
1203}
1204
1205static int lm90_update_device(struct device *dev)
1206{
1207	struct lm90_data *data = dev_get_drvdata(dev);
1208	struct i2c_client *client = data->client;
1209	unsigned long next_update;
1210	int val;
1211
1212	if (!data->valid) {
1213		val = lm90_update_limits(dev);
1214		if (val < 0)
1215			return val;
1216	}
1217
1218	next_update = data->last_updated +
1219		      msecs_to_jiffies(data->update_interval);
1220	if (time_after(jiffies, next_update) || !data->valid) {
1221		dev_dbg(&client->dev, "Updating lm90 data.\n");
1222
1223		data->valid = false;
1224
1225		val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
1226		if (val < 0)
1227			return val;
1228		data->temp[LOCAL_LOW] = val << 8;
1229
1230		val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
1231		if (val < 0)
1232			return val;
1233		data->temp[LOCAL_HIGH] = val << 8;
1234
1235		val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
1236				  data->reg_local_ext, true);
 
 
 
 
 
 
 
 
 
 
 
 
1237		if (val < 0)
1238			return val;
1239		data->temp[LOCAL_TEMP] = val;
1240		val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1241				  data->reg_remote_ext, true);
1242		if (val < 0)
1243			return val;
1244		data->temp[REMOTE_TEMP] = val;
1245
1246		if (data->flags & LM90_HAVE_TEMP3) {
1247			val = lm90_select_remote_channel(data, true);
1248			if (val < 0)
1249				return val;
1250
1251			val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1252					  data->reg_remote_ext, true);
1253			if (val < 0) {
1254				lm90_select_remote_channel(data, false);
1255				return val;
1256			}
1257			data->temp[REMOTE2_TEMP] = val;
 
 
1258
1259			lm90_select_remote_channel(data, false);
 
 
 
1260		}
1261
1262		val = lm90_update_alarms_locked(data, false);
1263		if (val < 0)
1264			return val;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1265
1266		data->last_updated = jiffies;
1267		data->valid = true;
1268	}
1269
1270	return 0;
1271}
1272
1273/* pec used for devices with PEC support */
1274static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1275			char *buf)
1276{
1277	struct i2c_client *client = to_i2c_client(dev);
1278
1279	return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
1280}
1281
1282static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
1283			 const char *buf, size_t count)
1284{
1285	struct i2c_client *client = to_i2c_client(dev);
1286	long val;
1287	int err;
1288
1289	err = kstrtol(buf, 10, &val);
1290	if (err < 0)
1291		return err;
1292
1293	switch (val) {
1294	case 0:
1295		client->flags &= ~I2C_CLIENT_PEC;
1296		break;
1297	case 1:
1298		client->flags |= I2C_CLIENT_PEC;
1299		break;
1300	default:
1301		return -EINVAL;
1302	}
1303
1304	return count;
1305}
1306
1307static DEVICE_ATTR_RW(pec);
1308
1309static int lm90_temp_get_resolution(struct lm90_data *data, int index)
1310{
1311	switch (index) {
1312	case REMOTE_TEMP:
1313		if (data->reg_remote_ext)
1314			return data->resolution;
1315		return 8;
1316	case REMOTE_OFFSET:
1317	case REMOTE2_OFFSET:
1318	case REMOTE2_TEMP:
1319		return data->resolution;
1320	case LOCAL_TEMP:
1321		if (data->reg_local_ext)
1322			return data->resolution;
1323		return 8;
1324	case REMOTE_LOW:
1325	case REMOTE_HIGH:
1326	case REMOTE2_LOW:
1327	case REMOTE2_HIGH:
1328		if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1329			return data->resolution;
1330		return 8;
1331	default:
1332		return 8;
1333	}
1334}
1335
1336static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
1337{
1338	int val;
1339
1340	if (flags & LM90_HAVE_EXTENDED_TEMP)
1341		val = regval - 0x4000;
1342	else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
1343		val = regval;
1344	else
1345		val = (s16)regval;
1346
1347	return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
1348}
1349
1350static int lm90_get_temp(struct lm90_data *data, int index, int channel)
1351{
1352	int temp = lm90_temp_from_reg(data->flags, data->temp[index],
1353				      lm90_temp_get_resolution(data, index));
1354
1355	/* +16 degrees offset for remote temperature on LM99 */
1356	if (data->kind == lm99 && channel)
1357		temp += 16000;
1358
1359	return temp;
1360}
1361
1362static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
1363{
1364	int fraction = resolution > 8 ?
1365			1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
1366
1367	if (flags & LM90_HAVE_EXTENDED_TEMP) {
1368		val = clamp_val(val, -64000, 191000 + fraction);
1369		val += 64000;
1370	} else if (flags & LM90_HAVE_EXT_UNSIGNED) {
1371		val = clamp_val(val, 0, 255000 + fraction);
1372	} else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
1373		val = clamp_val(val, 0, 127000 + fraction);
1374	} else {
1375		val = clamp_val(val, -128000, 127000 + fraction);
1376	}
1377
1378	return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
1379}
1380
1381static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
1382{
1383	static const u8 regs[] = {
1384		[LOCAL_LOW] = LM90_REG_LOCAL_LOW,
1385		[LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
1386		[LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
1387		[REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
1388		[LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
1389		[REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
1390		[REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
1391		[REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
1392		[REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
1393		[REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
1394		[REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
1395		[REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
1396	};
1397	struct i2c_client *client = data->client;
1398	u8 regh = regs[index];
1399	u8 regl = 0;
1400	int err;
1401
1402	if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
1403		if (index == REMOTE_LOW || index == REMOTE2_LOW)
1404			regl = LM90_REG_REMOTE_LOWL;
1405		else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
1406			regl = LM90_REG_REMOTE_HIGHL;
1407	}
1408
1409	/* +16 degrees offset for remote temperature on LM99 */
1410	if (data->kind == lm99 && channel) {
1411		/* prevent integer underflow */
1412		val = max(val, -128000l);
1413		val -= 16000;
1414	}
1415
1416	data->temp[index] = lm90_temp_to_reg(data->flags, val,
1417					     lm90_temp_get_resolution(data, index));
1418
1419	if (channel > 1)
1420		lm90_select_remote_channel(data, true);
1421
1422	err = lm90_write16(client, regh, regl, data->temp[index]);
 
1423
1424	if (channel > 1)
1425		lm90_select_remote_channel(data, false);
 
 
 
 
 
 
1426
 
1427	return err;
1428}
1429
1430static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
1431{
1432	int temp = lm90_get_temp(data, index, channel);
 
1433
1434	return temp - data->temp_hyst * 1000;
 
 
 
 
 
 
 
 
 
 
 
1435}
1436
1437static int lm90_set_temphyst(struct lm90_data *data, long val)
1438{
1439	int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
 
 
 
 
 
 
 
 
 
 
 
1440
1441	/* prevent integer overflow/underflow */
1442	val = clamp_val(val, -128000l, 255000l);
1443	data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
1444
1445	return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
1446}
 
 
 
 
1447
1448static int lm90_get_temp_offset(struct lm90_data *data, int index)
1449{
1450	int res = lm90_temp_get_resolution(data, index);
1451
1452	return lm90_temp_from_reg(0, data->temp[index], res);
1453}
1454
1455static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
1456{
1457	int err;
1458
1459	val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
1460
1461	/* For ADT7481 we can use the same registers for remote channel 1 and 2 */
1462	if (channel > 1)
1463		lm90_select_remote_channel(data, true);
 
 
 
1464
1465	err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
 
 
1466
1467	if (channel > 1)
1468		lm90_select_remote_channel(data, false);
1469
1470	if (err)
1471		return err;
 
 
 
1472
1473	data->temp[index] = val;
 
 
 
 
 
1474
1475	return 0;
 
 
 
1476}
1477
1478static const u8 lm90_temp_index[MAX_CHANNELS] = {
1479	LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1480};
1481
1482static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1483	LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1484};
1485
1486static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1487	LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1488};
1489
1490static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1491	LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1492};
1493
1494static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1495	LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1496};
1497
1498static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1499	-1, REMOTE_OFFSET, REMOTE2_OFFSET
1500};
1501
1502static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
1503static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
1504static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
1505static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
1506static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
1507static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
1508
1509static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1510{
1511	struct lm90_data *data = dev_get_drvdata(dev);
1512	int err;
1513	u16 bit;
1514
1515	mutex_lock(&data->update_lock);
1516	err = lm90_update_device(dev);
1517	mutex_unlock(&data->update_lock);
1518	if (err)
1519		return err;
1520
1521	switch (attr) {
1522	case hwmon_temp_input:
1523		*val = lm90_get_temp(data, lm90_temp_index[channel], channel);
1524		break;
1525	case hwmon_temp_min_alarm:
 
 
1526	case hwmon_temp_max_alarm:
 
 
1527	case hwmon_temp_crit_alarm:
 
 
1528	case hwmon_temp_emergency_alarm:
 
 
1529	case hwmon_temp_fault:
1530		switch (attr) {
1531		case hwmon_temp_min_alarm:
1532			bit = lm90_min_alarm_bits[channel];
1533			break;
1534		case hwmon_temp_max_alarm:
1535			bit = lm90_max_alarm_bits[channel];
1536			break;
1537		case hwmon_temp_crit_alarm:
1538			if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1539				bit = lm90_crit_alarm_bits_swapped[channel];
1540			else
1541				bit = lm90_crit_alarm_bits[channel];
1542			break;
1543		case hwmon_temp_emergency_alarm:
1544			bit = lm90_emergency_alarm_bits[channel];
1545			break;
1546		case hwmon_temp_fault:
1547			bit = lm90_fault_bits[channel];
1548			break;
1549		}
1550		*val = !!(data->alarms & bit);
1551		data->alarms &= ~bit;
1552		data->alarms |= data->current_alarms;
1553		break;
1554	case hwmon_temp_min:
1555		*val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
 
 
 
 
 
1556		break;
1557	case hwmon_temp_max:
1558		*val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
 
 
 
 
 
1559		break;
1560	case hwmon_temp_crit:
1561		*val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
1562		break;
1563	case hwmon_temp_crit_hyst:
1564		*val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
1565		break;
1566	case hwmon_temp_emergency:
1567		*val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
1568		break;
1569	case hwmon_temp_emergency_hyst:
1570		*val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
1571		break;
1572	case hwmon_temp_offset:
1573		*val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
1574		break;
1575	default:
1576		return -EOPNOTSUPP;
1577	}
1578	return 0;
1579}
1580
1581static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1582{
1583	struct lm90_data *data = dev_get_drvdata(dev);
1584	int err;
1585
1586	mutex_lock(&data->update_lock);
1587
1588	err = lm90_update_device(dev);
1589	if (err)
1590		goto error;
1591
1592	switch (attr) {
1593	case hwmon_temp_min:
1594		err = lm90_set_temp(data, lm90_temp_min_index[channel],
1595				    channel, val);
 
 
 
 
 
 
1596		break;
1597	case hwmon_temp_max:
1598		err = lm90_set_temp(data, lm90_temp_max_index[channel],
1599				    channel, val);
 
 
 
 
 
 
1600		break;
1601	case hwmon_temp_crit:
1602		err = lm90_set_temp(data, lm90_temp_crit_index[channel],
1603				    channel, val);
1604		break;
1605	case hwmon_temp_crit_hyst:
1606		err = lm90_set_temphyst(data, val);
1607		break;
1608	case hwmon_temp_emergency:
1609		err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
1610				    channel, val);
1611		break;
1612	case hwmon_temp_offset:
1613		err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
1614					   channel, val);
1615		break;
1616	default:
1617		err = -EOPNOTSUPP;
1618		break;
1619	}
1620error:
1621	mutex_unlock(&data->update_lock);
1622
1623	return err;
1624}
1625
1626static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1627{
1628	switch (attr) {
1629	case hwmon_temp_input:
1630	case hwmon_temp_min_alarm:
1631	case hwmon_temp_max_alarm:
1632	case hwmon_temp_crit_alarm:
1633	case hwmon_temp_emergency_alarm:
1634	case hwmon_temp_emergency_hyst:
1635	case hwmon_temp_fault:
1636	case hwmon_temp_label:
1637		return 0444;
1638	case hwmon_temp_min:
1639	case hwmon_temp_max:
1640	case hwmon_temp_crit:
1641	case hwmon_temp_emergency:
1642	case hwmon_temp_offset:
1643		return 0644;
1644	case hwmon_temp_crit_hyst:
1645		if (channel == 0)
1646			return 0644;
1647		return 0444;
1648	default:
1649		return 0;
1650	}
1651}
1652
1653static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1654{
1655	struct lm90_data *data = dev_get_drvdata(dev);
1656	int err;
1657
1658	mutex_lock(&data->update_lock);
1659	err = lm90_update_device(dev);
1660	mutex_unlock(&data->update_lock);
1661	if (err)
1662		return err;
1663
1664	switch (attr) {
1665	case hwmon_chip_update_interval:
1666		*val = data->update_interval;
1667		break;
1668	case hwmon_chip_alarms:
1669		*val = data->alarms;
1670		break;
1671	case hwmon_chip_temp_samples:
1672		if (data->faultqueue_mask) {
1673			*val = (data->config & data->faultqueue_mask) ?
1674				data->faultqueue_depth : 1;
1675		} else {
1676			switch (data->conalert & 0x0e) {
1677			case 0x0:
1678			default:
1679				*val = 1;
1680				break;
1681			case 0x2:
1682				*val = 2;
1683				break;
1684			case 0x6:
1685				*val = 3;
1686				break;
1687			case 0xe:
1688				*val = 4;
1689				break;
1690			}
1691		}
1692		break;
1693	default:
1694		return -EOPNOTSUPP;
1695	}
1696
1697	return 0;
1698}
1699
1700static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1701{
1702	struct lm90_data *data = dev_get_drvdata(dev);
1703	struct i2c_client *client = data->client;
1704	int err;
1705
1706	mutex_lock(&data->update_lock);
1707
1708	err = lm90_update_device(dev);
1709	if (err)
1710		goto error;
1711
1712	switch (attr) {
1713	case hwmon_chip_update_interval:
1714		err = lm90_set_convrate(client, data,
1715					clamp_val(val, 0, 100000));
1716		break;
1717	case hwmon_chip_temp_samples:
1718		err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
1719		break;
1720	default:
1721		err = -EOPNOTSUPP;
1722		break;
1723	}
1724error:
1725	mutex_unlock(&data->update_lock);
1726
1727	return err;
1728}
1729
1730static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1731{
1732	switch (attr) {
1733	case hwmon_chip_update_interval:
1734	case hwmon_chip_temp_samples:
1735		return 0644;
1736	case hwmon_chip_alarms:
1737		return 0444;
1738	default:
1739		return 0;
1740	}
1741}
1742
1743static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1744		     u32 attr, int channel, long *val)
1745{
1746	switch (type) {
1747	case hwmon_chip:
1748		return lm90_chip_read(dev, attr, channel, val);
1749	case hwmon_temp:
1750		return lm90_temp_read(dev, attr, channel, val);
1751	default:
1752		return -EOPNOTSUPP;
1753	}
1754}
1755
1756static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
1757			    u32 attr, int channel, const char **str)
1758{
1759	struct lm90_data *data = dev_get_drvdata(dev);
1760
1761	*str = data->channel_label[channel];
1762
1763	return 0;
1764}
1765
1766static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1767		      u32 attr, int channel, long val)
1768{
1769	switch (type) {
1770	case hwmon_chip:
1771		return lm90_chip_write(dev, attr, channel, val);
1772	case hwmon_temp:
1773		return lm90_temp_write(dev, attr, channel, val);
1774	default:
1775		return -EOPNOTSUPP;
1776	}
1777}
1778
1779static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1780			       u32 attr, int channel)
1781{
1782	switch (type) {
1783	case hwmon_chip:
1784		return lm90_chip_is_visible(data, attr, channel);
1785	case hwmon_temp:
1786		return lm90_temp_is_visible(data, attr, channel);
1787	default:
1788		return 0;
1789	}
1790}
1791
1792static const char *lm90_detect_lm84(struct i2c_client *client)
1793{
1794	static const u8 regs[] = {
1795		LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
1796		LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
1797	};
1798	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1799	int reg1, reg2, reg3, reg4;
1800	bool nonzero = false;
1801	u8 ff = 0xff;
1802	int i;
1803
1804	if (status < 0 || (status & 0xab))
1805		return NULL;
1806
1807	/*
1808	 * For LM84, undefined registers return the most recent value.
1809	 * Repeat several times, each time checking against a different
1810	 * (presumably) existing register.
1811	 */
1812	for (i = 0; i < ARRAY_SIZE(regs); i++) {
1813		reg1 = i2c_smbus_read_byte_data(client, regs[i]);
1814		reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
1815		reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1816		reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1817
1818		if (reg1 < 0)
1819			return NULL;
1820
1821		/* If any register has a different value, this is not an LM84 */
1822		if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
1823			return NULL;
1824
1825		nonzero |= reg1 || reg2 || reg3 || reg4;
1826		ff &= reg1;
1827	}
1828	/*
1829	 * If all registers always returned 0 or 0xff, all bets are off,
1830	 * and we can not make any predictions about the chip type.
1831	 */
1832	return nonzero && ff != 0xff ? "lm84" : NULL;
1833}
1834
1835static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
1836{
1837	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1838	int llo, rlo, lhi, rhi;
1839
1840	if (status < 0 || (status & 0x03))
1841		return NULL;
1842
1843	if (config1 & 0x3f)
1844		return NULL;
1845
1846	/*
1847	 * Fail if unsupported registers return anything but 0xff.
1848	 * The calling code already checked man_id and chip_id.
1849	 * A byte read operation repeats the most recent read operation
1850	 * and should also return 0xff.
1851	 */
1852	if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
1853	    i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
1854	    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
1855	    i2c_smbus_read_byte(client) != 0xff)
1856		return NULL;
1857
1858	llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1859	rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1860
1861	lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
1862	rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
1863
1864	if (llo < 0 || rlo < 0)
1865		return NULL;
1866
1867	/*
1868	 * A byte read operation repeats the most recent read and should
1869	 * return the same value.
1870	 */
1871	if (i2c_smbus_read_byte(client) != rhi)
1872		return NULL;
1873
1874	/*
1875	 * The following two checks are marginal since the checked values
1876	 * are strictly speaking valid.
1877	 */
1878
1879	/* fail for negative high limits; this also catches read errors */
1880	if ((s8)lhi < 0 || (s8)rhi < 0)
1881		return NULL;
1882
1883	/* fail if low limits are larger than or equal to high limits */
1884	if ((s8)llo >= lhi || (s8)rlo >= rhi)
1885		return NULL;
1886
1887	if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1888		/*
1889		 * Word read operations return 0xff in second byte
1890		 */
1891		if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
1892						0xffff)
1893			return NULL;
1894		if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
1895						(config1 | 0xff00))
1896			return NULL;
1897		if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
1898						(lhi | 0xff00))
1899			return NULL;
1900	}
1901
1902	return "max1617";
1903}
1904
1905static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
1906					int config1, int convrate)
1907{
1908	int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
1909	int address = client->addr;
1910	const char *name = NULL;
1911
1912	if (config2 < 0)
1913		return NULL;
1914
1915	if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
1916		return NULL;
1917
1918	if (address != 0x4c && address != 0x4d)
1919		return NULL;
1920
1921	switch (chip_id & 0xf0) {
1922	case 0x10:	/* LM86 */
1923		if (address == 0x4c)
1924			name = "lm86";
1925		break;
1926	case 0x20:	/* LM90 */
1927		if (address == 0x4c)
1928			name = "lm90";
1929		break;
1930	case 0x30:	/* LM89/LM99 */
1931		name = "lm99";	/* detect LM89 as LM99 */
1932		break;
1933	default:
1934		break;
1935	}
1936
1937	return name;
1938}
1939
1940static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
1941				  int convrate)
1942{
 
1943	int address = client->addr;
1944	const char *name = NULL;
 
1945
1946	switch (chip_id) {
1947	case 0xca:		/* NCT218 */
1948		if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
1949		    convrate <= 0x0a)
1950			name = "nct218";
1951		break;
1952	default:
1953		break;
1954	}
1955	return name;
1956}
1957
1958static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
1959				      int chip_id, int config1, int convrate)
1960{
1961	int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1962	int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
1963	int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
1964	int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
1965	int address = client->addr;
1966	const char *name = NULL;
1967
1968	if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
1969		return NULL;
 
 
 
 
1970
1971	/*
1972	 * The following chips should be detected by this function. Known
1973	 * register values are listed. Registers 0x3d .. 0x3e are undocumented
1974	 * for most of the chips, yet appear to return a well defined value.
1975	 * Register 0xff is undocumented for some of the chips. Register 0x3f
1976	 * is undocumented for all chips, but also returns a well defined value.
1977	 * Values are as reported from real chips unless mentioned otherwise.
1978	 * The code below checks values for registers 0x3d, 0x3e, and 0xff,
1979	 * but not for register 0x3f.
1980	 *
1981	 * Chip			Register
1982	 *		3d	3e	3f	fe	ff	Notes
1983	 * ----------------------------------------------------------
1984	 * adm1020	00	00	00	41	39
1985	 * adm1021	00	00	00	41	03
1986	 * adm1021a	00	00	00	41	3c
1987	 * adm1023	00	00	00	41	3c	same as adm1021a
1988	 * adm1032	00	00	00	41	42
1989	 *
1990	 * adt7421	21	41	04	41	04
1991	 * adt7461	00	00	00	41	51
1992	 * adt7461a	61	41	05	41	57
1993	 * adt7481	81	41	02	41	62
1994	 * adt7482	-	-	-	41	65	datasheet
1995	 *		82	41	05	41	75	real chip
1996	 * adt7483	83	41	04	41	94
1997	 *
1998	 * nct72	61	41	07	41	55
1999	 * nct210	00	00	00	41	3f
2000	 * nct214	61	41	08	41	5a
2001	 * nct1008	-	-	-	41	57	datasheet rev. 3
2002	 *		61	41	06	41	54	real chip
2003	 *
2004	 * nvt210	-	-	-	41	-	datasheet
2005	 * nvt211	-	-	-	41	-	datasheet
2006	 */
2007	switch (chip_id) {
2008	case 0x00 ... 0x03:	/* ADM1021 */
2009	case 0x05 ... 0x0f:
2010		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2011		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2012			name = "adm1021";
2013		break;
2014	case 0x04:		/* ADT7421 (undocumented) */
2015		if (man_id2 == 0x41 && chip_id2 == 0x21 &&
2016		    (address == 0x4c || address == 0x4d) &&
2017		    (config1 & 0x0b) == 0x08 && convrate <= 0x0a)
2018			name = "adt7421";
2019		break;
2020	case 0x30 ... 0x38:	/* ADM1021A, ADM1023 */
2021	case 0x3a ... 0x3e:
2022		/*
2023		 * ADM1021A and compatible chips will be mis-detected as
2024		 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
2025		 * found to have a Chip ID of 0x3c.
2026		 * ADM1021A does not officially support low byte registers
2027		 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
2028		 * Official support for the temperature offset high byte
2029		 * register (0x11) was added to revision F of the ADM1021A
2030		 * datasheet.
2031		 * It is currently unknown if there is a means to distinguish
2032		 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
2033		 * which differ in functionality from ADM1023.
2034		 */
2035		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2036		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2037			name = "adm1023";
2038		break;
2039	case 0x39:		/* ADM1020 (undocumented) */
2040		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2041		    (address == 0x4c || address == 0x4d || address == 0x4e) &&
2042		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2043			name = "adm1020";
2044		break;
2045	case 0x3f:		/* NCT210 */
2046		if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2047		    !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2048			name = "nct210";
2049		break;
2050	case 0x40 ... 0x4f:	/* ADM1032 */
2051		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2052		    (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
2053		    convrate <= 0x0a)
2054			name = "adm1032";
2055		break;
2056	case 0x51:	/* ADT7461 */
2057		if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2058		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2059		    convrate <= 0x0a)
 
 
 
 
 
 
2060			name = "adt7461";
2061		break;
2062	case 0x54:	/* NCT1008 */
2063		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2064		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2065		    convrate <= 0x0a)
2066			name = "nct1008";
2067		break;
2068	case 0x55:	/* NCT72 */
2069		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2070		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2071		    convrate <= 0x0a)
2072			name = "nct72";
2073		break;
2074	case 0x57:	/* ADT7461A, NCT1008 (datasheet rev. 3) */
2075		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2076		    (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2077		    convrate <= 0x0a)
2078			name = "adt7461a";
2079		break;
2080	case 0x5a:	/* NCT214 */
2081		if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2082		    common_address && !(config1 & 0x1b) && convrate <= 0x0a)
2083			name = "nct214";
2084		break;
2085	case 0x62:	/* ADT7481, undocumented */
2086		if (man_id2 == 0x41 && chip_id2 == 0x81 &&
2087		    (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
2088		    !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
2089			name = "adt7481";
2090		}
2091		break;
2092	case 0x65:	/* ADT7482, datasheet */
2093	case 0x75:	/* ADT7482, real chip */
2094		if (man_id2 == 0x41 && chip_id2 == 0x82 &&
2095		    address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
2096		    convrate <= 0x0a)
2097			name = "adt7482";
2098		break;
2099	case 0x94:	/* ADT7483 */
2100		if (man_id2 == 0x41 && chip_id2 == 0x83 &&
2101		    common_address &&
2102		    ((address >= 0x18 && address <= 0x1a) ||
2103		     (address >= 0x29 && address <= 0x2b) ||
2104		     (address >= 0x4c && address <= 0x4e)) &&
2105		    !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
2106			name = "adt7483a";
2107		break;
2108	default:
2109		break;
2110	}
2111
2112	return name;
2113}
2114
2115static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
2116				     int chip_id, int config1, int convrate)
2117{
2118	int man_id, emerg, emerg2, status2;
2119	int address = client->addr;
2120	const char *name = NULL;
2121
2122	switch (chip_id) {
2123	case 0x01:
2124		if (!common_address)
2125			break;
2126
2127		/*
2128		 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read
2129		 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
2130		 * exists, both readings will reflect the same value. Otherwise,
2131		 * the readings will be different.
2132		 */
2133		emerg = i2c_smbus_read_byte_data(client,
2134						 MAX6659_REG_REMOTE_EMERG);
2135		man_id = i2c_smbus_read_byte_data(client,
2136						  LM90_REG_MAN_ID);
2137		emerg2 = i2c_smbus_read_byte_data(client,
2138						  MAX6659_REG_REMOTE_EMERG);
2139		status2 = i2c_smbus_read_byte_data(client,
2140						   MAX6696_REG_STATUS2);
2141		if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
2142			return NULL;
2143
2144		/*
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2145		 * Even though MAX6695 and MAX6696 do not have a chip ID
2146		 * register, reading it returns 0x01. Bit 4 of the config1
2147		 * register is unused and should return zero when read. Bit 0 of
2148		 * the status2 register is unused and should return zero when
2149		 * read.
2150		 *
2151		 * MAX6695 and MAX6696 have an additional set of temperature
2152		 * limit registers. We can detect those chips by checking if
2153		 * one of those registers exists.
2154		 */
2155		if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
2156		    convrate <= 0x07)
 
 
 
2157			name = "max6696";
 
2158		/*
2159		 * The chip_id register of the MAX6680 and MAX6681 holds the
2160		 * revision of the chip. The lowest bit of the config1 register
2161		 * is unused and should return zero when read, so should the
2162		 * second to last bit of config1 (software reset). Register
2163		 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
2164		 * should differ from emerg2, and emerg2 should match man_id
2165		 * since it does not exist.
2166		 */
2167		else if (!(config1 & 0x03) && convrate <= 0x07 &&
2168			 emerg2 == man_id && emerg2 != status2)
 
2169			name = "max6680";
2170		/*
2171		 * MAX1617A does not have any extended registers (register
2172		 * address 0x10 or higher) except for manufacturer and
2173		 * device ID registers. Unlike other chips of this series,
2174		 * unsupported registers were observed to return a fixed value
2175		 * of 0x01.
2176		 * Note: Multiple chips with different markings labeled as
2177		 * "MAX1617" (no "A") were observed to report manufacturer ID
2178		 * 0x4d and device ID 0x01. It is unknown if other variants of
2179		 * MAX1617/MAX617A with different behavior exist. The detection
2180		 * code below works for those chips.
2181		 */
2182		else if (!(config1 & 0x03f) && convrate <= 0x07 &&
2183			 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
2184			name = "max1617";
2185		break;
2186	case 0x08:
2187		/*
2188		 * The chip_id of the MAX6654 holds the revision of the chip.
2189		 * The lowest 3 bits of the config1 register are unused and
2190		 * should return zero when read.
2191		 */
2192		if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2193			name = "max6654";
2194		break;
2195	case 0x09:
2196		/*
2197		 * The chip_id of the MAX6690 holds the revision of the chip.
2198		 * The lowest 3 bits of the config1 register are unused and
2199		 * should return zero when read.
2200		 * Note that MAX6654 and MAX6690 are practically the same chips.
2201		 * The only diference is the rated accuracy. Rev. 1 of the
2202		 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
2203		 * MAX6654 was observed to have a chip ID of 0x09.
2204		 */
2205		if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2206			name = "max6690";
2207		break;
2208	case 0x4d:
2209		/*
2210		 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
2211		 * register. Reading from that address will return the last
2212		 * read value, which in our case is those of the man_id
2213		 * register, or 0x4d.
2214		 * MAX6642 does not have a conversion rate register, nor low
2215		 * limit registers. Reading from those registers returns the
2216		 * last read value.
2217		 *
2218		 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks
2219		 * a low nibble, so the value will be those of the previous
2220		 * read, so in our case again those of the man_id register.
2221		 * MAX6659 has a third set of upper temperature limit registers.
2222		 * Those registers also return values on MAX6657 and MAX6658,
2223		 * thus the only way to detect MAX6659 is by its address.
2224		 * For this reason it will be mis-detected as MAX6657 if its
2225		 * address is 0x4c.
2226		 */
2227		if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
2228		    !(config1 & 0x0f)) {
2229			int regval;
2230
2231			/*
2232			 * We know that this is not a MAX6657/58/59 because its
2233			 * configuration register has the wrong value and it does
2234			 * not appear to have a conversion rate register.
2235			 */
2236
2237			/* re-read manufacturer ID to have a good baseline */
2238			if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
2239				break;
2240
2241			/* check various non-existing registers */
2242			if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
2243			    i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
2244			    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
2245				break;
2246
2247			/* check for unused status register bits */
2248			regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
2249			if (regval < 0 || (regval & 0x2b))
2250				break;
2251
2252			/* re-check unsupported registers */
2253			if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
2254			    i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
2255			    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
2256				break;
2257
2258			name = "max6642";
2259		} else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
2260			   (config1 & 0x1f) == 0x0d && convrate <= 0x09) {
2261			if (address == 0x4c)
2262				name = "max6657";
2263			else
2264				name = "max6659";
2265		}
2266		break;
2267	case 0x59:
2268		/*
2269		 * The chip_id register of the MAX6646/6647/6649 holds the
2270		 * revision of the chip. The lowest 6 bits of the config1
2271		 * register are unused and should return zero when read.
2272		 * The I2C address of MAX6648/6692 is fixed at 0x4c.
2273		 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
2274		 * and MAX6649 is at address 0x4c. A slight difference between
2275		 * the two sets of chips is that the remote temperature register
2276		 * reports different values if the DXP pin is open or shorted.
2277		 * We can use that information to help distinguish between the
2278		 * chips. MAX6648 will be mis-detected as MAX6649 if the remote
2279		 * diode is connected, but there isn't really anything we can
2280		 * do about that.
2281		 */
2282		if (!(config1 & 0x3f) && convrate <= 0x07) {
2283			int temp;
2284
2285			switch (address) {
2286			case 0x4c:
2287				/*
2288				 * MAX6649 reports an external temperature
2289				 * value of 0xff if DXP is open or shorted.
2290				 * MAX6648 reports 0x80 in that case.
2291				 */
2292				temp = i2c_smbus_read_byte_data(client,
2293								LM90_REG_REMOTE_TEMPH);
2294				if (temp == 0x80)
2295					name = "max6648";
2296				else
2297					name = "max6649";
2298				break;
2299			case 0x4d:
2300				name = "max6646";
2301				break;
2302			case 0x4e:
2303				name = "max6647";
2304				break;
2305			default:
2306				break;
2307			}
2308		}
2309		break;
2310	default:
2311		break;
2312	}
2313
2314	return name;
2315}
2316
2317static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
2318				       int config1, int convrate)
2319{
2320	int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2321	int address = client->addr;
2322	const char *name = NULL;
2323
2324	if (config2 < 0)
2325		return NULL;
2326
2327	if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
2328		if (chip_id == 0x01 && convrate <= 0x09) {
2329			/* W83L771W/G */
2330			name = "w83l771";
2331		} else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
2332			/* W83L771AWG/ASG */
2333			name = "w83l771";
2334		}
2335	}
2336	return name;
2337}
2338
2339static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
2340				   int chip_id, int config1, int convrate)
2341{
2342	int address = client->addr;
2343	const char *name = NULL;
2344	int config2;
2345
2346	switch (chip_id) {
2347	case 0x00:
2348		config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2349		if (config2 < 0)
2350			return NULL;
2351		if (address >= 0x48 && address <= 0x4f &&
2352		    !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
2353			name = "sa56004";
2354		break;
2355	case 0x80:
2356		if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
2357			name = "ne1618";
2358		break;
2359	default:
2360		break;
2361	}
2362	return name;
2363}
2364
2365static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
2366				   int config1, int convrate)
2367{
2368	int address = client->addr;
2369
2370	/*
2371	 * According to the datasheet, G781 is supposed to be at I2C Address
2372	 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
2373	 * address 0x4d and have a chip ID of 0x03. However, when support
2374	 * for G781 was added, chips at 0x4c and 0x4d were found to have a
2375	 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
2376	 * chip ID 0x03.
2377	 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both
2378	 * addresses.
2379	 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
2380	 * datasheet is not available. Extensive testing suggests that
2381	 * the chip appears to be fully compatible with G781.
2382	 * Available register dumps show that G751 also reports manufacturer
2383	 * ID 0x47 and chip ID 0x01 even though that chip does not officially
2384	 * support those registers. This makes chip detection somewhat
2385	 * vulnerable. To improve detection quality, read the offset low byte
2386	 * and alert fault queue registers and verify that only expected bits
2387	 * are set.
2388	 */
2389	if ((chip_id == 0x01 || chip_id == 0x03) &&
2390	    (address == 0x4c || address == 0x4d) &&
2391	    !(config1 & 0x3f) && convrate <= 0x08) {
2392		int reg;
2393
2394		reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
2395		if (reg < 0 || reg & 0x1f)
2396			return NULL;
2397		reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
2398		if (reg < 0 || reg & 0xf1)
2399			return NULL;
2400
2401		return "g781";
2402	}
2403
2404	return NULL;
2405}
2406
2407static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
2408				    int chip_id, int config1, int convrate)
2409{
2410	if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
2411		/* THMC10: Unsupported registers return 0xff */
2412		if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
2413		    i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
2414			return "thmc10";
2415	}
2416	return NULL;
2417}
2418
2419static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
2420				  int config1, int convrate)
2421{
2422	int address = client->addr;
2423	const char *name = NULL;
2424
2425	if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
2426		int local_ext, conalert, chen, dfc;
2427
2428		local_ext = i2c_smbus_read_byte_data(client,
2429						     TMP451_REG_LOCAL_TEMPL);
2430		conalert = i2c_smbus_read_byte_data(client,
2431						    TMP451_REG_CONALERT);
2432		chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
2433		dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
2434
2435		if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
2436		    (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
2437			if (address == 0x4c && !(chen & 0x03))
2438				name = "tmp451";
2439			else if (address >= 0x48 && address <= 0x4f)
2440				name = "tmp461";
2441		}
2442	}
2443
2444	return name;
2445}
 
 
 
 
 
 
 
2446
2447/* Return 0 if detection is successful, -ENODEV otherwise */
2448static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
2449{
2450	struct i2c_adapter *adapter = client->adapter;
2451	int man_id, chip_id, config1, convrate, lhigh;
2452	const char *name = NULL;
2453	int address = client->addr;
2454	bool common_address =
2455			(address >= 0x18 && address <= 0x1a) ||
2456			(address >= 0x29 && address <= 0x2b) ||
2457			(address >= 0x4c && address <= 0x4e);
2458
2459	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2460		return -ENODEV;
2461
2462	/*
2463	 * Get well defined register value for chips with neither man_id nor
2464	 * chip_id registers.
2465	 */
2466	lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
2467
2468	/* detection and identification */
2469	man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2470	chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2471	config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
2472	convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2473	if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
2474		return -ENODEV;
2475
2476	/* Bail out immediately if all register report the same value */
2477	if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
2478		return -ENODEV;
2479
2480	/*
2481	 * If reading man_id and chip_id both return the same value as lhigh,
2482	 * the chip may not support those registers and return the most recent read
2483	 * value. Check again with a different register and handle accordingly.
2484	 */
2485	if (man_id == lhigh && chip_id == lhigh) {
2486		convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2487		man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2488		chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2489		if (convrate < 0 || man_id < 0 || chip_id < 0)
2490			return -ENODEV;
2491		if (man_id == convrate && chip_id == convrate)
2492			man_id = -1;
2493	}
2494	switch (man_id) {
2495	case -1:	/* Chip does not support man_id / chip_id */
2496		if (common_address && !convrate && !(config1 & 0x7f))
2497			name = lm90_detect_lm84(client);
2498		break;
2499	case 0x01:	/* National Semiconductor */
2500		name = lm90_detect_national(client, chip_id, config1, convrate);
2501		break;
2502	case 0x1a:	/* ON */
2503		name = lm90_detect_on(client, chip_id, config1, convrate);
2504		break;
2505	case 0x23:	/* Genesys Logic */
2506		if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2507			name = "gl523sm";
2508		break;
2509	case 0x41:	/* Analog Devices */
2510		name = lm90_detect_analog(client, common_address, chip_id, config1,
2511					  convrate);
2512		break;
2513	case 0x47:	/* GMT */
2514		name = lm90_detect_gmt(client, chip_id, config1, convrate);
2515		break;
2516	case 0x49:	/* TI */
2517		name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
2518		break;
2519	case 0x4d:	/* Maxim Integrated */
2520		name = lm90_detect_maxim(client, common_address, chip_id,
2521					 config1, convrate);
2522		break;
2523	case 0x54:	/* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
2524		if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2525			name = "mc1066";
2526		break;
2527	case 0x55:	/* TI */
2528		name = lm90_detect_ti(client, chip_id, config1, convrate);
2529		break;
2530	case 0x5c:	/* Winbond/Nuvoton */
2531		name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
2532		break;
2533	case 0xa1:	/*  NXP Semiconductor/Philips */
2534		name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
2535		break;
2536	case 0xff:	/* MAX1617, G767, NE1617 */
2537		if (common_address && chip_id == 0xff && convrate < 8)
2538			name = lm90_detect_max1617(client, config1);
2539		break;
2540	default:
2541		break;
2542	}
2543
2544	if (!name) {	/* identification failed */
2545		dev_dbg(&adapter->dev,
2546			"Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
2547			client->addr, man_id, chip_id);
2548		return -ENODEV;
2549	}
2550
2551	strscpy(info->type, name, I2C_NAME_SIZE);
2552
2553	return 0;
2554}
2555
2556static void lm90_restore_conf(void *_data)
2557{
2558	struct lm90_data *data = _data;
2559	struct i2c_client *client = data->client;
2560
2561	cancel_delayed_work_sync(&data->alert_work);
2562	cancel_work_sync(&data->report_work);
2563
2564	/* Restore initial configuration */
2565	if (data->flags & LM90_HAVE_CONVRATE)
2566		lm90_write_convrate(data, data->convrate_orig);
2567	lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
 
2568}
2569
2570static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
2571{
2572	struct device_node *np = client->dev.of_node;
2573	int config, convrate;
2574
2575	if (data->flags & LM90_HAVE_CONVRATE) {
2576		convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
2577		if (convrate < 0)
2578			return convrate;
2579		data->convrate_orig = convrate;
2580		lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
2581	} else {
2582		data->update_interval = 500;
2583	}
2584
2585	/*
2586	 * Start the conversions.
2587	 */
2588	config = lm90_read_reg(client, LM90_REG_CONFIG1);
 
2589	if (config < 0)
2590		return config;
2591	data->config_orig = config;
2592	data->config = config;
2593
2594	/* Check Temperature Range Select */
2595	if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
2596		if (of_property_read_bool(np, "ti,extended-range-enable"))
2597			config |= 0x04;
2598		if (!(config & 0x04))
2599			data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
2600	}
2601
2602	/*
2603	 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
2604	 * 0.125 degree resolution) and range (0x08, extend range
2605	 * to -64 degree) mode for the remote temperature sensor.
2606	 * Note that expeciments with an actual chip do not show a difference
2607	 * if bit 3 is set or not.
2608	 */
2609	if (data->kind == max6680)
2610		config |= 0x18;
2611
2612	/*
2613	 * Put MAX6654 into extended range (0x20, extend minimum range from
2614	 * 0 degrees to -64 degrees). Note that extended resolution is not
2615	 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
2616	 * slower, which is intentionally not done by default.
2617	 */
2618	if (data->kind == max6654)
2619		config |= 0x20;
2620
2621	/*
2622	 * Select external channel 0 for devices with three sensors
2623	 */
2624	if (data->flags & LM90_HAVE_TEMP3)
2625		config &= ~0x08;
2626
2627	/*
2628	 * Interrupt is enabled by default on reset, but it may be disabled
2629	 * by bootloader, unmask it.
2630	 */
2631	if (client->irq)
2632		config &= ~0x80;
2633
2634	config &= 0xBF;	/* run */
2635	lm90_update_confreg(data, config);
 
2636
2637	return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
2638}
2639
2640static bool lm90_is_tripped(struct i2c_client *client)
2641{
2642	struct lm90_data *data = i2c_get_clientdata(client);
2643	int ret;
 
 
 
 
 
 
 
 
 
 
 
 
2644
2645	ret = lm90_update_alarms(data, true);
2646	if (ret < 0)
2647		return false;
2648
2649	return !!data->current_alarms;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2650}
2651
2652static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
2653{
2654	struct i2c_client *client = dev_id;
 
2655
2656	if (lm90_is_tripped(client))
2657		return IRQ_HANDLED;
2658	else
2659		return IRQ_NONE;
2660}
2661
2662static void lm90_remove_pec(void *dev)
2663{
2664	device_remove_file(dev, &dev_attr_pec);
2665}
2666
2667static int lm90_probe_channel_from_dt(struct i2c_client *client,
2668				      struct device_node *child,
2669				      struct lm90_data *data)
2670{
2671	u32 id;
2672	s32 val;
2673	int err;
2674	struct device *dev = &client->dev;
2675
2676	err = of_property_read_u32(child, "reg", &id);
2677	if (err) {
2678		dev_err(dev, "missing reg property of %pOFn\n", child);
2679		return err;
2680	}
2681
2682	if (id >= MAX_CHANNELS) {
2683		dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
2684		return -EINVAL;
2685	}
2686
2687	err = of_property_read_string(child, "label", &data->channel_label[id]);
2688	if (err == -ENODATA || err == -EILSEQ) {
2689		dev_err(dev, "invalid label property in %pOFn\n", child);
2690		return err;
2691	}
2692
2693	if (data->channel_label[id])
2694		data->channel_config[id] |= HWMON_T_LABEL;
2695
2696	err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
2697	if (!err) {
2698		if (id == 0) {
2699			dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
2700			return -EINVAL;
2701		}
2702
2703		err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
2704		if (err) {
2705			dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
2706				val, id, err);
2707			return err;
2708		}
2709	}
2710
2711	return 0;
2712}
2713
2714static int lm90_parse_dt_channel_info(struct i2c_client *client,
2715				      struct lm90_data *data)
2716{
2717	int err;
2718	struct device_node *child;
2719	struct device *dev = &client->dev;
2720	const struct device_node *np = dev->of_node;
2721
2722	for_each_child_of_node(np, child) {
2723		if (strcmp(child->name, "channel"))
2724			continue;
2725
2726		err = lm90_probe_channel_from_dt(client, child, data);
2727		if (err) {
2728			of_node_put(child);
2729			return err;
2730		}
2731	}
2732
2733	return 0;
2734}
2735
2736static const struct hwmon_ops lm90_ops = {
2737	.is_visible = lm90_is_visible,
2738	.read = lm90_read,
2739	.read_string = lm90_read_string,
2740	.write = lm90_write,
2741};
2742
2743static int lm90_probe(struct i2c_client *client)
 
2744{
2745	struct device *dev = &client->dev;
2746	struct i2c_adapter *adapter = client->adapter;
2747	struct hwmon_channel_info *info;
 
2748	struct device *hwmon_dev;
2749	struct lm90_data *data;
2750	int err;
2751
2752	err = devm_regulator_get_enable(dev, "vcc");
 
 
 
 
 
 
 
 
 
 
2753	if (err)
2754		return dev_err_probe(dev, err, "Failed to enable regulator\n");
2755
2756	data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
2757	if (!data)
2758		return -ENOMEM;
2759
2760	data->client = client;
2761	i2c_set_clientdata(client, data);
2762	mutex_init(&data->update_lock);
2763	INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
2764	INIT_WORK(&data->report_work, lm90_report_alarms);
2765
2766	/* Set the device type */
2767	if (client->dev.of_node)
2768		data->kind = (uintptr_t)of_device_get_match_data(&client->dev);
2769	else
2770		data->kind = i2c_match_id(lm90_id, client)->driver_data;
 
2771
2772	/*
2773	 * Different devices have different alarm bits triggering the
2774	 * ALERT# output
2775	 */
2776	data->alert_alarms = lm90_params[data->kind].alert_alarms;
2777	data->resolution = lm90_params[data->kind].resolution ? : 11;
2778
2779	/* Set chip capabilities */
2780	data->flags = lm90_params[data->kind].flags;
2781
2782	if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
2783	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
2784		data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
2785
2786	if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
2787	    !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
2788		data->flags &= ~LM90_HAVE_PARTIAL_PEC;
2789
2790	data->chip.ops = &lm90_ops;
2791	data->chip.info = data->info;
2792
2793	data->info[0] = &data->chip_info;
2794	info = &data->chip_info;
2795	info->type = hwmon_chip;
2796	info->config = data->chip_config;
2797
2798	data->chip_config[0] = HWMON_C_REGISTER_TZ;
2799	if (data->flags & LM90_HAVE_ALARMS)
2800		data->chip_config[0] |= HWMON_C_ALARMS;
2801	if (data->flags & LM90_HAVE_CONVRATE)
2802		data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
2803	if (data->flags & LM90_HAVE_FAULTQUEUE)
2804		data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
2805	data->info[1] = &data->temp_info;
2806
2807	info = &data->temp_info;
2808	info->type = hwmon_temp;
2809	info->config = data->channel_config;
2810
2811	data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
2812		HWMON_T_MAX_ALARM;
2813	data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
2814		HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2815
2816	if (data->flags & LM90_HAVE_LOW) {
2817		data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2818		data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2819	}
2820
2821	if (data->flags & LM90_HAVE_CRIT) {
2822		data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2823		data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2824	}
2825
2826	if (data->flags & LM90_HAVE_OFFSET)
2827		data->channel_config[1] |= HWMON_T_OFFSET;
2828
2829	if (data->flags & LM90_HAVE_EMERGENCY) {
2830		data->channel_config[0] |= HWMON_T_EMERGENCY |
2831			HWMON_T_EMERGENCY_HYST;
2832		data->channel_config[1] |= HWMON_T_EMERGENCY |
2833			HWMON_T_EMERGENCY_HYST;
2834	}
2835
2836	if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2837		data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2838		data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2839	}
2840
2841	if (data->flags & LM90_HAVE_TEMP3) {
2842		data->channel_config[2] = HWMON_T_INPUT |
2843			HWMON_T_MIN | HWMON_T_MAX |
2844			HWMON_T_CRIT | HWMON_T_CRIT_HYST |
 
2845			HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2846			HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
2847		if (data->flags & LM90_HAVE_EMERGENCY) {
2848			data->channel_config[2] |= HWMON_T_EMERGENCY |
2849				HWMON_T_EMERGENCY_HYST;
2850		}
2851		if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
2852			data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
2853		if (data->flags & LM90_HAVE_OFFSET)
2854			data->channel_config[2] |= HWMON_T_OFFSET;
2855	}
2856
2857	data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
2858	data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
2859	data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
2860	if (data->flags & LM90_HAVE_REMOTE_EXT)
2861		data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
2862	data->reg_status2 = lm90_params[data->kind].reg_status2;
2863
2864	/* Set maximum conversion rate */
2865	data->max_convrate = lm90_params[data->kind].max_convrate;
2866
2867	/* Parse device-tree channel information */
2868	if (client->dev.of_node) {
2869		err = lm90_parse_dt_channel_info(client, data);
2870		if (err)
2871			return err;
2872	}
2873
2874	/* Initialize the LM90 chip */
2875	err = lm90_init_client(client, data);
2876	if (err < 0) {
2877		dev_err(dev, "Failed to initialize device\n");
2878		return err;
2879	}
2880
2881	/*
2882	 * The 'pec' attribute is attached to the i2c device and thus created
2883	 * separately.
2884	 */
2885	if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) {
2886		err = device_create_file(dev, &dev_attr_pec);
2887		if (err)
2888			return err;
2889		err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
2890		if (err)
2891			return err;
2892	}
2893
2894	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2895							 data, &data->chip,
2896							 NULL);
2897	if (IS_ERR(hwmon_dev))
2898		return PTR_ERR(hwmon_dev);
2899
2900	data->hwmon_dev = hwmon_dev;
2901
2902	if (client->irq) {
2903		dev_dbg(dev, "IRQ: %d\n", client->irq);
2904		err = devm_request_threaded_irq(dev, client->irq,
2905						NULL, lm90_irq_thread,
2906						IRQF_ONESHOT, "lm90", client);
 
2907		if (err < 0) {
2908			dev_err(dev, "cannot request IRQ %d\n", client->irq);
2909			return err;
2910		}
2911	}
2912
2913	return 0;
2914}
2915
2916static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2917		       unsigned int flag)
2918{
 
 
2919	if (type != I2C_PROTOCOL_SMBUS_ALERT)
2920		return;
2921
2922	if (lm90_is_tripped(client)) {
2923		/*
2924		 * Disable ALERT# output, because these chips don't implement
2925		 * SMBus alert correctly; they should only hold the alert line
2926		 * low briefly.
2927		 */
2928		struct lm90_data *data = i2c_get_clientdata(client);
2929
2930		if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2931		    (data->current_alarms & data->alert_alarms)) {
2932			if (!(data->config & 0x80)) {
2933				dev_dbg(&client->dev, "Disabling ALERT#\n");
2934				lm90_update_confreg(data, data->config | 0x80);
2935			}
2936			schedule_delayed_work(&data->alert_work,
2937				max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
 
 
2938		}
2939	} else {
2940		dev_dbg(&client->dev, "Everything OK\n");
2941	}
2942}
2943
2944static int lm90_suspend(struct device *dev)
2945{
2946	struct lm90_data *data = dev_get_drvdata(dev);
2947	struct i2c_client *client = data->client;
2948
2949	if (client->irq)
2950		disable_irq(client->irq);
2951
2952	return 0;
2953}
2954
2955static int lm90_resume(struct device *dev)
2956{
2957	struct lm90_data *data = dev_get_drvdata(dev);
2958	struct i2c_client *client = data->client;
2959
2960	if (client->irq)
2961		enable_irq(client->irq);
2962
2963	return 0;
2964}
2965
2966static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2967
2968static struct i2c_driver lm90_driver = {
2969	.class		= I2C_CLASS_HWMON,
2970	.driver = {
2971		.name	= "lm90",
2972		.of_match_table = of_match_ptr(lm90_of_match),
2973		.pm	= pm_sleep_ptr(&lm90_pm_ops),
2974	},
2975	.probe		= lm90_probe,
2976	.alert		= lm90_alert,
2977	.id_table	= lm90_id,
2978	.detect		= lm90_detect,
2979	.address_list	= normal_i2c,
2980};
2981
2982module_i2c_driver(lm90_driver);
2983
2984MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2985MODULE_DESCRIPTION("LM90/ADM1032 driver");
2986MODULE_LICENSE("GPL");
v4.10.11
 
   1/*
   2 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
   3 *          monitoring
   4 * Copyright (C) 2003-2010  Jean Delvare <jdelvare@suse.de>
   5 *
   6 * Based on the lm83 driver. The LM90 is a sensor chip made by National
   7 * Semiconductor. It reports up to two temperatures (its own plus up to
   8 * one external one) with a 0.125 deg resolution (1 deg for local
   9 * temperature) and a 3-4 deg accuracy.
  10 *
  11 * This driver also supports the LM89 and LM99, two other sensor chips
  12 * made by National Semiconductor. Both have an increased remote
  13 * temperature measurement accuracy (1 degree), and the LM99
  14 * additionally shifts remote temperatures (measured and limits) by 16
  15 * degrees, which allows for higher temperatures measurement.
  16 * Note that there is no way to differentiate between both chips.
  17 * When device is auto-detected, the driver will assume an LM99.
  18 *
  19 * This driver also supports the LM86, another sensor chip made by
  20 * National Semiconductor. It is exactly similar to the LM90 except it
  21 * has a higher accuracy.
  22 *
  23 * This driver also supports the ADM1032, a sensor chip made by Analog
  24 * Devices. That chip is similar to the LM90, with a few differences
  25 * that are not handled by this driver. Among others, it has a higher
  26 * accuracy than the LM90, much like the LM86 does.
  27 *
  28 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
  29 * chips made by Maxim. These chips are similar to the LM86.
  30 * Note that there is no easy way to differentiate between the three
  31 * variants. We use the device address to detect MAX6659, which will result
  32 * in a detection as max6657 if it is on address 0x4c. The extra address
  33 * and features of the MAX6659 are only supported if the chip is configured
  34 * explicitly as max6659, or if its address is not 0x4c.
  35 * These chips lack the remote temperature offset feature.
  36 *
 
 
 
 
 
 
 
 
 
 
  37 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
  38 * MAX6692 chips made by Maxim.  These are again similar to the LM86,
  39 * but they use unsigned temperature values and can report temperatures
  40 * from 0 to 145 degrees.
  41 *
  42 * This driver also supports the MAX6680 and MAX6681, two other sensor
  43 * chips made by Maxim. These are quite similar to the other Maxim
  44 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
  45 * be treated identically.
  46 *
  47 * This driver also supports the MAX6695 and MAX6696, two other sensor
  48 * chips made by Maxim. These are also quite similar to other Maxim
  49 * chips, but support three temperature sensors instead of two. MAX6695
  50 * and MAX6696 only differ in the pinout so they can be treated identically.
  51 *
  52 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
  53 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
  54 * and extended mode. They are mostly compatible with LM90 except for a data
  55 * format difference for the temperature value registers.
  56 *
 
 
 
 
 
 
 
 
  57 * This driver also supports the SA56004 from Philips. This device is
  58 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
  59 *
  60 * This driver also supports the G781 from GMT. This device is compatible
  61 * with the ADM1032.
  62 *
  63 * This driver also supports TMP451 from Texas Instruments. This device is
  64 * supported in both compatibility and extended mode. It's mostly compatible
  65 * with ADT7461 except for local temperature low byte register and max
  66 * conversion rate.
 
 
 
 
 
 
  67 *
  68 * Since the LM90 was the first chipset supported by this driver, most
  69 * comments will refer to this chipset, but are actually general and
  70 * concern all supported chipsets, unless mentioned otherwise.
  71 *
  72 * This program is free software; you can redistribute it and/or modify
  73 * it under the terms of the GNU General Public License as published by
  74 * the Free Software Foundation; either version 2 of the License, or
  75 * (at your option) any later version.
  76 *
  77 * This program is distributed in the hope that it will be useful,
  78 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  79 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  80 * GNU General Public License for more details.
  81 *
  82 * You should have received a copy of the GNU General Public License
  83 * along with this program; if not, write to the Free Software
  84 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  85 */
  86
  87#include <linux/module.h>
 
 
 
  88#include <linux/init.h>
  89#include <linux/slab.h>
  90#include <linux/jiffies.h>
  91#include <linux/i2c.h>
  92#include <linux/hwmon.h>
  93#include <linux/err.h>
 
  94#include <linux/mutex.h>
  95#include <linux/sysfs.h>
  96#include <linux/interrupt.h>
  97#include <linux/regulator/consumer.h>
 
 
 
 
 
  98
  99/*
 100 * Addresses to scan
 101 * Address is fully defined internally and cannot be changed except for
 102 * MAX6659, MAX6680 and MAX6681.
 103 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
 104 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
 105 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
 106 * have address 0x4d.
 107 * MAX6647 has address 0x4e.
 108 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
 109 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
 110 * 0x4c, 0x4d or 0x4e.
 111 * SA56004 can have address 0x48 through 0x4F.
 112 */
 113
 114static const unsigned short normal_i2c[] = {
 115	0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
 116	0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
 117
 118enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
 119	max6646, w83l771, max6696, sa56004, g781, tmp451 };
 
 
 
 120
 121/*
 122 * The LM90 registers
 123 */
 124
 125#define LM90_REG_R_MAN_ID		0xFE
 126#define LM90_REG_R_CHIP_ID		0xFF
 127#define LM90_REG_R_CONFIG1		0x03
 128#define LM90_REG_W_CONFIG1		0x09
 129#define LM90_REG_R_CONFIG2		0xBF
 130#define LM90_REG_W_CONFIG2		0xBF
 131#define LM90_REG_R_CONVRATE		0x04
 132#define LM90_REG_W_CONVRATE		0x0A
 133#define LM90_REG_R_STATUS		0x02
 134#define LM90_REG_R_LOCAL_TEMP		0x00
 135#define LM90_REG_R_LOCAL_HIGH		0x05
 136#define LM90_REG_W_LOCAL_HIGH		0x0B
 137#define LM90_REG_R_LOCAL_LOW		0x06
 138#define LM90_REG_W_LOCAL_LOW		0x0C
 139#define LM90_REG_R_LOCAL_CRIT		0x20
 140#define LM90_REG_W_LOCAL_CRIT		0x20
 141#define LM90_REG_R_REMOTE_TEMPH		0x01
 142#define LM90_REG_R_REMOTE_TEMPL		0x10
 143#define LM90_REG_R_REMOTE_OFFSH		0x11
 144#define LM90_REG_W_REMOTE_OFFSH		0x11
 145#define LM90_REG_R_REMOTE_OFFSL		0x12
 146#define LM90_REG_W_REMOTE_OFFSL		0x12
 147#define LM90_REG_R_REMOTE_HIGHH		0x07
 148#define LM90_REG_W_REMOTE_HIGHH		0x0D
 149#define LM90_REG_R_REMOTE_HIGHL		0x13
 150#define LM90_REG_W_REMOTE_HIGHL		0x13
 151#define LM90_REG_R_REMOTE_LOWH		0x08
 152#define LM90_REG_W_REMOTE_LOWH		0x0E
 153#define LM90_REG_R_REMOTE_LOWL		0x14
 154#define LM90_REG_W_REMOTE_LOWL		0x14
 155#define LM90_REG_R_REMOTE_CRIT		0x19
 156#define LM90_REG_W_REMOTE_CRIT		0x19
 157#define LM90_REG_R_TCRIT_HYST		0x21
 158#define LM90_REG_W_TCRIT_HYST		0x21
 159
 160/* MAX6646/6647/6649/6657/6658/6659/6695/6696 registers */
 161
 162#define MAX6657_REG_R_LOCAL_TEMPL	0x11
 163#define MAX6696_REG_R_STATUS2		0x12
 164#define MAX6659_REG_R_REMOTE_EMERG	0x16
 165#define MAX6659_REG_W_REMOTE_EMERG	0x16
 166#define MAX6659_REG_R_LOCAL_EMERG	0x17
 167#define MAX6659_REG_W_LOCAL_EMERG	0x17
 168
 169/*  SA56004 registers */
 170
 171#define SA56004_REG_R_LOCAL_TEMPL 0x22
 172
 173#define LM90_MAX_CONVRATE_MS	16000	/* Maximum conversion rate in ms */
 174
 175/* TMP451 registers */
 176#define TMP451_REG_R_LOCAL_TEMPL	0x15
 
 
 
 
 
 
 
 
 
 
 
 177
 178/*
 179 * Device flags
 180 */
 181#define LM90_FLAG_ADT7461_EXT	(1 << 0) /* ADT7461 extended mode	*/
 182/* Device features */
 183#define LM90_HAVE_OFFSET	(1 << 1) /* temperature offset register	*/
 184#define LM90_HAVE_REM_LIMIT_EXT	(1 << 3) /* extended remote limit	*/
 185#define LM90_HAVE_EMERGENCY	(1 << 4) /* 3rd upper (emergency) limit	*/
 186#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm		*/
 187#define LM90_HAVE_TEMP3		(1 << 6) /* 3rd temperature sensor	*/
 188#define LM90_HAVE_BROKEN_ALERT	(1 << 7) /* Broken alert		*/
 
 
 
 
 
 
 
 
 
 
 
 
 
 189
 190/* LM90 status */
 191#define LM90_STATUS_LTHRM	(1 << 0) /* local THERM limit tripped */
 192#define LM90_STATUS_RTHRM	(1 << 1) /* remote THERM limit tripped */
 193#define LM90_STATUS_ROPEN	(1 << 2) /* remote is an open circuit */
 194#define LM90_STATUS_RLOW	(1 << 3) /* remote low temp limit tripped */
 195#define LM90_STATUS_RHIGH	(1 << 4) /* remote high temp limit tripped */
 196#define LM90_STATUS_LLOW	(1 << 5) /* local low temp limit tripped */
 197#define LM90_STATUS_LHIGH	(1 << 6) /* local high temp limit tripped */
 198
 199#define MAX6696_STATUS2_R2THRM	(1 << 1) /* remote2 THERM limit tripped */
 200#define MAX6696_STATUS2_R2OPEN	(1 << 2) /* remote2 is an open circuit */
 201#define MAX6696_STATUS2_R2LOW	(1 << 3) /* remote2 low temp limit tripped */
 202#define MAX6696_STATUS2_R2HIGH	(1 << 4) /* remote2 high temp limit tripped */
 203#define MAX6696_STATUS2_ROT2	(1 << 5) /* remote emergency limit tripped */
 204#define MAX6696_STATUS2_R2OT2	(1 << 6) /* remote2 emergency limit tripped */
 205#define MAX6696_STATUS2_LOT2	(1 << 7) /* local emergency limit tripped */
 
 
 206
 207/*
 208 * Driver data (common to all clients)
 209 */
 210
 211static const struct i2c_device_id lm90_id[] = {
 
 
 
 212	{ "adm1032", adm1032 },
 
 213	{ "adt7461", adt7461 },
 214	{ "adt7461a", adt7461 },
 
 
 
 215	{ "g781", g781 },
 
 
 
 
 216	{ "lm90", lm90 },
 217	{ "lm86", lm86 },
 218	{ "lm89", lm86 },
 219	{ "lm99", lm99 },
 
 
 220	{ "max6646", max6646 },
 221	{ "max6647", max6646 },
 
 222	{ "max6649", max6646 },
 
 223	{ "max6657", max6657 },
 224	{ "max6658", max6657 },
 225	{ "max6659", max6659 },
 226	{ "max6680", max6680 },
 227	{ "max6681", max6680 },
 
 
 228	{ "max6695", max6696 },
 229	{ "max6696", max6696 },
 230	{ "nct1008", adt7461 },
 
 
 
 
 
 
 231	{ "w83l771", w83l771 },
 232	{ "sa56004", sa56004 },
 
 233	{ "tmp451", tmp451 },
 
 234	{ }
 235};
 236MODULE_DEVICE_TABLE(i2c, lm90_id);
 237
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 238/*
 239 * chip type specific parameters
 240 */
 241struct lm90_params {
 242	u32 flags;		/* Capabilities */
 243	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
 244				/* Upper 8 bits for max6695/96 */
 245	u8 max_convrate;	/* Maximum conversion rate register value */
 
 
 246	u8 reg_local_ext;	/* Extended local temp register (optional) */
 
 
 247};
 248
 249static const struct lm90_params lm90_params[] = {
 
 
 
 
 
 
 
 
 250	[adm1032] = {
 251		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 252		  | LM90_HAVE_BROKEN_ALERT,
 
 
 
 253		.alert_alarms = 0x7c,
 254		.max_convrate = 10,
 255	},
 256	[adt7461] = {
 
 
 
 
 
 257		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 258		  | LM90_HAVE_BROKEN_ALERT,
 
 
 
 259		.alert_alarms = 0x7c,
 260		.max_convrate = 10,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 261	},
 262	[g781] = {
 263		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 264		  | LM90_HAVE_BROKEN_ALERT,
 
 
 265		.alert_alarms = 0x7c,
 266		.max_convrate = 8,
 267	},
 268	[lm86] = {
 269		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
 270		.alert_alarms = 0x7b,
 271		.max_convrate = 9,
 272	},
 273	[lm90] = {
 274		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
 
 
 
 275		.alert_alarms = 0x7b,
 276		.max_convrate = 9,
 
 
 277	},
 278	[lm99] = {
 279		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
 
 
 
 280		.alert_alarms = 0x7b,
 281		.max_convrate = 9,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 282	},
 283	[max6646] = {
 
 
 
 284		.alert_alarms = 0x7c,
 285		.max_convrate = 6,
 286		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 287	},
 288	[max6657] = {
 
 
 
 289		.alert_alarms = 0x7c,
 290		.max_convrate = 8,
 291		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 292	},
 293	[max6659] = {
 294		.flags = LM90_HAVE_EMERGENCY,
 
 
 295		.alert_alarms = 0x7c,
 296		.max_convrate = 8,
 297		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 298	},
 299	[max6680] = {
 300		.flags = LM90_HAVE_OFFSET,
 
 
 
 
 
 
 
 
 301		.alert_alarms = 0x7c,
 302		.max_convrate = 7,
 303	},
 304	[max6696] = {
 305		.flags = LM90_HAVE_EMERGENCY
 306		  | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
 
 
 307		.alert_alarms = 0x1c7c,
 308		.max_convrate = 6,
 309		.reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 310	},
 311	[w83l771] = {
 312		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
 
 
 313		.alert_alarms = 0x7c,
 314		.max_convrate = 8,
 315	},
 316	[sa56004] = {
 317		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
 
 
 
 
 
 
 
 318		.alert_alarms = 0x7b,
 319		.max_convrate = 9,
 320		.reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
 
 
 321	},
 322	[tmp451] = {
 323		.flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
 324		  | LM90_HAVE_BROKEN_ALERT,
 
 
 
 
 
 
 
 
 
 
 
 
 325		.alert_alarms = 0x7c,
 326		.max_convrate = 9,
 327		.reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
 
 328	},
 329};
 330
 331/*
 332 * TEMP8 register index
 333 */
 334enum lm90_temp8_reg_index {
 335	LOCAL_LOW = 0,
 336	LOCAL_HIGH,
 337	LOCAL_CRIT,
 338	REMOTE_CRIT,
 339	LOCAL_EMERG,	/* max6659 and max6695/96 */
 340	REMOTE_EMERG,	/* max6659 and max6695/96 */
 341	REMOTE2_CRIT,	/* max6695/96 only */
 342	REMOTE2_EMERG,	/* max6695/96 only */
 343	TEMP8_REG_NUM
 344};
 345
 346/*
 347 * TEMP11 register index
 348 */
 349enum lm90_temp11_reg_index {
 350	REMOTE_TEMP = 0,
 351	REMOTE_LOW,
 352	REMOTE_HIGH,
 353	REMOTE_OFFSET,	/* except max6646, max6657/58/59, and max6695/96 */
 354	LOCAL_TEMP,
 355	REMOTE2_TEMP,	/* max6695/96 only */
 356	REMOTE2_LOW,	/* max6695/96 only */
 357	REMOTE2_HIGH,	/* max6695/96 only */
 358	TEMP11_REG_NUM
 
 
 359};
 360
 361/*
 362 * Client data (each client gets its own)
 363 */
 364
 365struct lm90_data {
 366	struct i2c_client *client;
 367	u32 channel_config[4];
 
 
 
 
 368	struct hwmon_channel_info temp_info;
 369	const struct hwmon_channel_info *info[3];
 370	struct hwmon_chip_info chip;
 371	struct mutex update_lock;
 
 
 372	bool valid;		/* true if register values are valid */
 
 373	unsigned long last_updated; /* in jiffies */
 
 374	int kind;
 375	u32 flags;
 376
 377	unsigned int update_interval; /* in milliseconds */
 378
 
 379	u8 config_orig;		/* Original configuration register value */
 380	u8 convrate_orig;	/* Original conversion rate register value */
 
 381	u16 alert_alarms;	/* Which alarm bits trigger ALERT# */
 382				/* Upper 8 bits for max6695/96 */
 383	u8 max_convrate;	/* Maximum conversion rate */
 
 384	u8 reg_local_ext;	/* local extension register offset */
 
 
 
 385
 386	/* registers values */
 387	s8 temp8[TEMP8_REG_NUM];
 388	s16 temp11[TEMP11_REG_NUM];
 389	u8 temp_hyst;
 390	u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
 
 
 
 391};
 392
 393/*
 394 * Support functions
 395 */
 396
 397/*
 398 * The ADM1032 supports PEC but not on write byte transactions, so we need
 399 * to explicitly ask for a transaction without PEC.
 400 */
 401static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
 402{
 403	return i2c_smbus_xfer(client->adapter, client->addr,
 404			      client->flags & ~I2C_CLIENT_PEC,
 405			      I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
 406}
 407
 408/*
 409 * It is assumed that client->update_lock is held (unless we are in
 410 * detection or initialization steps). This matters when PEC is enabled,
 411 * because we don't want the address pointer to change between the write
 412 * byte and the read byte transactions.
 413 */
 414static int lm90_read_reg(struct i2c_client *client, u8 reg)
 415{
 
 
 
 416	int err;
 417
 418	if (client->flags & I2C_CLIENT_PEC) {
 419		err = adm1032_write_byte(client, reg);
 420		if (err >= 0)
 421			err = i2c_smbus_read_byte(client);
 422	} else
 423		err = i2c_smbus_read_byte_data(client, reg);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 424
 425	return err;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 426}
 427
 428static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
 
 429{
 430	int oldh, newh, l;
 431
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 432	/*
 433	 * There is a trick here. We have to read two registers to have the
 434	 * sensor temperature, but we have to beware a conversion could occur
 435	 * between the readings. The datasheet says we should either use
 
 436	 * the one-shot conversion register, which we don't want to do
 437	 * (disables hardware monitoring) or monitor the busy bit, which is
 438	 * impossible (we can't read the values and monitor that bit at the
 439	 * exact same time). So the solution used here is to read the high
 440	 * byte once, then the low byte, then the high byte again. If the new
 441	 * high byte matches the old one, then we have a valid reading. Else
 442	 * we have to read the low byte again, and now we believe we have a
 443	 * correct reading.
 444	 */
 445	oldh = lm90_read_reg(client, regh);
 446	if (oldh < 0)
 447		return oldh;
 448	l = lm90_read_reg(client, regl);
 449	if (l < 0)
 450		return l;
 451	newh = lm90_read_reg(client, regh);
 452	if (newh < 0)
 453		return newh;
 454	if (oldh != newh) {
 455		l = lm90_read_reg(client, regl);
 456		if (l < 0)
 457			return l;
 458	}
 459	return (newh << 8) | l;
 460}
 461
 
 
 
 
 
 
 
 
 
 
 
 
 
 462/*
 463 * client->update_lock must be held when calling this function (unless we are
 464 * in detection or initialization steps), and while a remote channel other
 465 * than channel 0 is selected. Also, calling code must make sure to re-select
 466 * external channel 0 before releasing the lock. This is necessary because
 467 * various registers have different meanings as a result of selecting a
 468 * non-default remote channel.
 469 */
 470static inline int lm90_select_remote_channel(struct i2c_client *client,
 471					     struct lm90_data *data,
 472					     int channel)
 473{
 474	int config;
 475
 476	if (data->kind == max6696) {
 477		config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
 478		if (config < 0)
 479			return config;
 480		config &= ~0x08;
 481		if (channel)
 482			config |= 0x08;
 483		i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
 484					  config);
 
 
 
 
 
 485	}
 486	return 0;
 
 
 
 
 
 
 
 487}
 488
 489/*
 490 * Set conversion rate.
 491 * client->update_lock must be held when calling this function (unless we are
 492 * in detection or initialization steps).
 493 */
 494static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
 495			     unsigned int interval)
 496{
 497	unsigned int update_interval;
 498	int i, err;
 499
 500	/* Shift calculations to avoid rounding errors */
 501	interval <<= 6;
 502
 503	/* find the nearest update rate */
 504	for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
 505	     i < data->max_convrate; i++, update_interval >>= 1)
 506		if (interval >= update_interval * 3 / 4)
 507			break;
 508
 509	err = i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE, i);
 510	data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
 511	return err;
 512}
 513
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 514static int lm90_update_limits(struct device *dev)
 515{
 516	struct lm90_data *data = dev_get_drvdata(dev);
 517	struct i2c_client *client = data->client;
 518	int val;
 519
 520	val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
 521	if (val < 0)
 522		return val;
 523	data->temp8[LOCAL_CRIT] = val;
 
 524
 525	val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
 526	if (val < 0)
 527		return val;
 528	data->temp8[REMOTE_CRIT] = val;
 529
 530	val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
 531	if (val < 0)
 532		return val;
 533	data->temp_hyst = val;
 534
 535	val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
 536	if (val < 0)
 537		return val;
 538	data->temp11[REMOTE_LOW] = val << 8;
 539
 540	if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
 541		val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
 542		if (val < 0)
 543			return val;
 544		data->temp11[REMOTE_LOW] |= val;
 545	}
 546
 547	val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
 
 
 548	if (val < 0)
 549		return val;
 550	data->temp11[REMOTE_HIGH] = val << 8;
 551
 552	if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
 553		val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
 554		if (val < 0)
 555			return val;
 556		data->temp11[REMOTE_HIGH] |= val;
 557	}
 558
 559	if (data->flags & LM90_HAVE_OFFSET) {
 560		val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
 561				  LM90_REG_R_REMOTE_OFFSL);
 562		if (val < 0)
 563			return val;
 564		data->temp11[REMOTE_OFFSET] = val;
 565	}
 566
 567	if (data->flags & LM90_HAVE_EMERGENCY) {
 568		val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
 569		if (val < 0)
 570			return val;
 571		data->temp8[LOCAL_EMERG] = val;
 572
 573		val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
 574		if (val < 0)
 575			return val;
 576		data->temp8[REMOTE_EMERG] = val;
 577	}
 578
 579	if (data->kind == max6696) {
 580		val = lm90_select_remote_channel(client, data, 1);
 581		if (val < 0)
 582			return val;
 583
 584		val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
 585		if (val < 0)
 586			return val;
 587		data->temp8[REMOTE2_CRIT] = val;
 588
 589		val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
 
 
 
 
 
 
 
 590		if (val < 0)
 591			return val;
 592		data->temp8[REMOTE2_EMERG] = val;
 593
 594		val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
 595		if (val < 0)
 596			return val;
 597		data->temp11[REMOTE2_LOW] = val << 8;
 
 
 
 
 
 
 
 
 598
 599		val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 600		if (val < 0)
 601			return val;
 602		data->temp11[REMOTE2_HIGH] = val << 8;
 603
 604		lm90_select_remote_channel(client, data, 0);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 605	}
 
 
 
 
 
 
 606
 607	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 608}
 609
 610static int lm90_update_device(struct device *dev)
 611{
 612	struct lm90_data *data = dev_get_drvdata(dev);
 613	struct i2c_client *client = data->client;
 614	unsigned long next_update;
 615	int val;
 616
 617	if (!data->valid) {
 618		val = lm90_update_limits(dev);
 619		if (val < 0)
 620			return val;
 621	}
 622
 623	next_update = data->last_updated +
 624		      msecs_to_jiffies(data->update_interval);
 625	if (time_after(jiffies, next_update) || !data->valid) {
 626		dev_dbg(&client->dev, "Updating lm90 data.\n");
 627
 628		data->valid = false;
 629
 630		val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
 631		if (val < 0)
 632			return val;
 633		data->temp8[LOCAL_LOW] = val;
 634
 635		val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
 636		if (val < 0)
 637			return val;
 638		data->temp8[LOCAL_HIGH] = val;
 639
 640		if (data->reg_local_ext) {
 641			val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
 642					  data->reg_local_ext);
 643			if (val < 0)
 644				return val;
 645			data->temp11[LOCAL_TEMP] = val;
 646		} else {
 647			val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
 648			if (val < 0)
 649				return val;
 650			data->temp11[LOCAL_TEMP] = val << 8;
 651		}
 652		val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
 653				  LM90_REG_R_REMOTE_TEMPL);
 654		if (val < 0)
 655			return val;
 656		data->temp11[REMOTE_TEMP] = val;
 657
 658		val = lm90_read_reg(client, LM90_REG_R_STATUS);
 659		if (val < 0)
 660			return val;
 661		data->alarms = val;	/* lower 8 bit of alarms */
 662
 663		if (data->kind == max6696) {
 664			val = lm90_select_remote_channel(client, data, 1);
 665			if (val < 0)
 666				return val;
 667
 668			val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
 669					  LM90_REG_R_REMOTE_TEMPL);
 670			if (val < 0) {
 671				lm90_select_remote_channel(client, data, 0);
 672				return val;
 673			}
 674			data->temp11[REMOTE2_TEMP] = val;
 675
 676			lm90_select_remote_channel(client, data, 0);
 677
 678			val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
 679			if (val < 0)
 680				return val;
 681			data->alarms |= val << 8;
 682		}
 683
 684		/*
 685		 * Re-enable ALERT# output if it was originally enabled and
 686		 * relevant alarms are all clear
 687		 */
 688		if (!(data->config_orig & 0x80) &&
 689		    !(data->alarms & data->alert_alarms)) {
 690			val = lm90_read_reg(client, LM90_REG_R_CONFIG1);
 691			if (val < 0)
 692				return val;
 693
 694			if (val & 0x80) {
 695				dev_dbg(&client->dev, "Re-enabling ALERT#\n");
 696				i2c_smbus_write_byte_data(client,
 697							  LM90_REG_W_CONFIG1,
 698							  val & ~0x80);
 699			}
 700		}
 701
 702		data->last_updated = jiffies;
 703		data->valid = true;
 704	}
 705
 706	return 0;
 707}
 708
 709/*
 710 * Conversions
 711 * For local temperatures and limits, critical limits and the hysteresis
 712 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
 713 * For remote temperatures and limits, it uses signed 11-bit values with
 714 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers.  Some
 715 * Maxim chips use unsigned values.
 716 */
 717
 718static inline int temp_from_s8(s8 val)
 719{
 720	return val * 1000;
 721}
 722
 723static inline int temp_from_u8(u8 val)
 724{
 725	return val * 1000;
 726}
 727
 728static inline int temp_from_s16(s16 val)
 729{
 730	return val / 32 * 125;
 731}
 732
 733static inline int temp_from_u16(u16 val)
 734{
 735	return val / 32 * 125;
 736}
 737
 738static s8 temp_to_s8(long val)
 739{
 740	if (val <= -128000)
 741		return -128;
 742	if (val >= 127000)
 743		return 127;
 744	if (val < 0)
 745		return (val - 500) / 1000;
 746	return (val + 500) / 1000;
 747}
 748
 749static u8 temp_to_u8(long val)
 750{
 751	if (val <= 0)
 752		return 0;
 753	if (val >= 255000)
 754		return 255;
 755	return (val + 500) / 1000;
 756}
 757
 758static s16 temp_to_s16(long val)
 759{
 760	if (val <= -128000)
 761		return 0x8000;
 762	if (val >= 127875)
 763		return 0x7FE0;
 764	if (val < 0)
 765		return (val - 62) / 125 * 32;
 766	return (val + 62) / 125 * 32;
 767}
 768
 769static u8 hyst_to_reg(long val)
 770{
 771	if (val <= 0)
 772		return 0;
 773	if (val >= 30500)
 774		return 31;
 775	return (val + 500) / 1000;
 776}
 777
 778/*
 779 * ADT7461 in compatibility mode is almost identical to LM90 except that
 780 * attempts to write values that are outside the range 0 < temp < 127 are
 781 * treated as the boundary value.
 782 *
 783 * ADT7461 in "extended mode" operation uses unsigned integers offset by
 784 * 64 (e.g., 0 -> -64 degC).  The range is restricted to -64..191 degC.
 785 */
 786static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
 787{
 788	if (data->flags & LM90_FLAG_ADT7461_EXT)
 789		return (val - 64) * 1000;
 790	return temp_from_s8(val);
 791}
 792
 793static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
 794{
 795	if (data->flags & LM90_FLAG_ADT7461_EXT)
 796		return (val - 0x4000) / 64 * 250;
 797	return temp_from_s16(val);
 798}
 799
 800static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
 801{
 802	if (data->flags & LM90_FLAG_ADT7461_EXT) {
 803		if (val <= -64000)
 804			return 0;
 805		if (val >= 191000)
 806			return 0xFF;
 807		return (val + 500 + 64000) / 1000;
 808	}
 809	if (val <= 0)
 810		return 0;
 811	if (val >= 127000)
 812		return 127;
 813	return (val + 500) / 1000;
 814}
 815
 816static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
 817{
 818	if (data->flags & LM90_FLAG_ADT7461_EXT) {
 819		if (val <= -64000)
 820			return 0;
 821		if (val >= 191750)
 822			return 0xFFC0;
 823		return (val + 64000 + 125) / 250 * 64;
 824	}
 825	if (val <= 0)
 826		return 0;
 827	if (val >= 127750)
 828		return 0x7FC0;
 829	return (val + 125) / 250 * 64;
 830}
 831
 832/* pec used for ADM1032 only */
 833static ssize_t show_pec(struct device *dev, struct device_attribute *dummy,
 834			char *buf)
 835{
 836	struct i2c_client *client = to_i2c_client(dev);
 837
 838	return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
 839}
 840
 841static ssize_t set_pec(struct device *dev, struct device_attribute *dummy,
 842		       const char *buf, size_t count)
 843{
 844	struct i2c_client *client = to_i2c_client(dev);
 845	long val;
 846	int err;
 847
 848	err = kstrtol(buf, 10, &val);
 849	if (err < 0)
 850		return err;
 851
 852	switch (val) {
 853	case 0:
 854		client->flags &= ~I2C_CLIENT_PEC;
 855		break;
 856	case 1:
 857		client->flags |= I2C_CLIENT_PEC;
 858		break;
 859	default:
 860		return -EINVAL;
 861	}
 862
 863	return count;
 864}
 865
 866static DEVICE_ATTR(pec, S_IWUSR | S_IRUGO, show_pec, set_pec);
 867
 868static int lm90_get_temp11(struct lm90_data *data, int index)
 869{
 870	s16 temp11 = data->temp11[index];
 871	int temp;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 872
 873	if (data->kind == adt7461 || data->kind == tmp451)
 874		temp = temp_from_u16_adt7461(data, temp11);
 875	else if (data->kind == max6646)
 876		temp = temp_from_u16(temp11);
 
 
 
 
 877	else
 878		temp = temp_from_s16(temp11);
 879
 880	/* +16 degrees offset for temp2 for the LM99 */
 881	if (data->kind == lm99 && index <= 2)
 
 
 
 
 
 
 
 
 882		temp += 16000;
 883
 884	return temp;
 885}
 886
 887static int lm90_set_temp11(struct lm90_data *data, int index, long val)
 888{
 889	static struct reg {
 890		u8 high;
 891		u8 low;
 892	} reg[] = {
 893	[REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
 894	[REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
 895	[REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
 896	[REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
 897	[REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 898	};
 899	struct i2c_client *client = data->client;
 900	struct reg *regp = &reg[index];
 
 901	int err;
 902
 903	/* +16 degrees offset for temp2 for the LM99 */
 904	if (data->kind == lm99 && index <= 2)
 
 
 
 
 
 
 
 
 
 905		val -= 16000;
 
 906
 907	if (data->kind == adt7461 || data->kind == tmp451)
 908		data->temp11[index] = temp_to_u16_adt7461(data, val);
 909	else if (data->kind == max6646)
 910		data->temp11[index] = temp_to_u8(val) << 8;
 911	else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
 912		data->temp11[index] = temp_to_s16(val);
 913	else
 914		data->temp11[index] = temp_to_s8(val) << 8;
 915
 916	lm90_select_remote_channel(client, data, index >= 3);
 917	err = i2c_smbus_write_byte_data(client, regp->high,
 918				  data->temp11[index] >> 8);
 919	if (err < 0)
 920		return err;
 921	if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
 922		err = i2c_smbus_write_byte_data(client, regp->low,
 923						data->temp11[index] & 0xff);
 924
 925	lm90_select_remote_channel(client, data, 0);
 926	return err;
 927}
 928
 929static int lm90_get_temp8(struct lm90_data *data, int index)
 930{
 931	s8 temp8 = data->temp8[index];
 932	int temp;
 933
 934	if (data->kind == adt7461 || data->kind == tmp451)
 935		temp = temp_from_u8_adt7461(data, temp8);
 936	else if (data->kind == max6646)
 937		temp = temp_from_u8(temp8);
 938	else
 939		temp = temp_from_s8(temp8);
 940
 941	/* +16 degrees offset for temp2 for the LM99 */
 942	if (data->kind == lm99 && index == 3)
 943		temp += 16000;
 944
 945	return temp;
 946}
 947
 948static int lm90_set_temp8(struct lm90_data *data, int index, long val)
 949{
 950	static const u8 reg[TEMP8_REG_NUM] = {
 951		LM90_REG_W_LOCAL_LOW,
 952		LM90_REG_W_LOCAL_HIGH,
 953		LM90_REG_W_LOCAL_CRIT,
 954		LM90_REG_W_REMOTE_CRIT,
 955		MAX6659_REG_W_LOCAL_EMERG,
 956		MAX6659_REG_W_REMOTE_EMERG,
 957		LM90_REG_W_REMOTE_CRIT,
 958		MAX6659_REG_W_REMOTE_EMERG,
 959	};
 960	struct i2c_client *client = data->client;
 961	int err;
 962
 963	/* +16 degrees offset for temp2 for the LM99 */
 964	if (data->kind == lm99 && index == 3)
 965		val -= 16000;
 966
 967	if (data->kind == adt7461 || data->kind == tmp451)
 968		data->temp8[index] = temp_to_u8_adt7461(data, val);
 969	else if (data->kind == max6646)
 970		data->temp8[index] = temp_to_u8(val);
 971	else
 972		data->temp8[index] = temp_to_s8(val);
 973
 974	lm90_select_remote_channel(client, data, index >= 6);
 975	err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
 976	lm90_select_remote_channel(client, data, 0);
 977
 978	return err;
 979}
 980
 981static int lm90_get_temphyst(struct lm90_data *data, int index)
 982{
 983	int temp;
 
 
 984
 985	if (data->kind == adt7461 || data->kind == tmp451)
 986		temp = temp_from_u8_adt7461(data, data->temp8[index]);
 987	else if (data->kind == max6646)
 988		temp = temp_from_u8(data->temp8[index]);
 989	else
 990		temp = temp_from_s8(data->temp8[index]);
 991
 992	/* +16 degrees offset for temp2 for the LM99 */
 993	if (data->kind == lm99 && index == 3)
 994		temp += 16000;
 995
 996	return temp - temp_from_s8(data->temp_hyst);
 997}
 998
 999static int lm90_set_temphyst(struct lm90_data *data, long val)
1000{
1001	struct i2c_client *client = data->client;
1002	int temp;
1003	int err;
1004
1005	if (data->kind == adt7461 || data->kind == tmp451)
1006		temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1007	else if (data->kind == max6646)
1008		temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1009	else
1010		temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
1011
1012	data->temp_hyst = hyst_to_reg(temp - val);
1013	err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1014					data->temp_hyst);
1015	return err;
1016}
1017
1018static const u8 lm90_temp_index[3] = {
1019	LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1020};
1021
1022static const u8 lm90_temp_min_index[3] = {
1023	LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1024};
1025
1026static const u8 lm90_temp_max_index[3] = {
1027	LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1028};
1029
1030static const u8 lm90_temp_crit_index[3] = {
1031	LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1032};
1033
1034static const u8 lm90_temp_emerg_index[3] = {
1035	LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1036};
1037
1038static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
1039static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
1040static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1041static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1042static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
 
 
 
 
 
1043
1044static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1045{
1046	struct lm90_data *data = dev_get_drvdata(dev);
1047	int err;
 
1048
1049	mutex_lock(&data->update_lock);
1050	err = lm90_update_device(dev);
1051	mutex_unlock(&data->update_lock);
1052	if (err)
1053		return err;
1054
1055	switch (attr) {
1056	case hwmon_temp_input:
1057		*val = lm90_get_temp11(data, lm90_temp_index[channel]);
1058		break;
1059	case hwmon_temp_min_alarm:
1060		*val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1061		break;
1062	case hwmon_temp_max_alarm:
1063		*val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1064		break;
1065	case hwmon_temp_crit_alarm:
1066		*val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1067		break;
1068	case hwmon_temp_emergency_alarm:
1069		*val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1070		break;
1071	case hwmon_temp_fault:
1072		*val = (data->alarms >> lm90_fault_bits[channel]) & 1;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1073		break;
1074	case hwmon_temp_min:
1075		if (channel == 0)
1076			*val = lm90_get_temp8(data,
1077					      lm90_temp_min_index[channel]);
1078		else
1079			*val = lm90_get_temp11(data,
1080					       lm90_temp_min_index[channel]);
1081		break;
1082	case hwmon_temp_max:
1083		if (channel == 0)
1084			*val = lm90_get_temp8(data,
1085					      lm90_temp_max_index[channel]);
1086		else
1087			*val = lm90_get_temp11(data,
1088					       lm90_temp_max_index[channel]);
1089		break;
1090	case hwmon_temp_crit:
1091		*val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1092		break;
1093	case hwmon_temp_crit_hyst:
1094		*val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1095		break;
1096	case hwmon_temp_emergency:
1097		*val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1098		break;
1099	case hwmon_temp_emergency_hyst:
1100		*val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1101		break;
1102	case hwmon_temp_offset:
1103		*val = lm90_get_temp11(data, REMOTE_OFFSET);
1104		break;
1105	default:
1106		return -EOPNOTSUPP;
1107	}
1108	return 0;
1109}
1110
1111static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1112{
1113	struct lm90_data *data = dev_get_drvdata(dev);
1114	int err;
1115
1116	mutex_lock(&data->update_lock);
1117
1118	err = lm90_update_device(dev);
1119	if (err)
1120		goto error;
1121
1122	switch (attr) {
1123	case hwmon_temp_min:
1124		if (channel == 0)
1125			err = lm90_set_temp8(data,
1126					      lm90_temp_min_index[channel],
1127					      val);
1128		else
1129			err = lm90_set_temp11(data,
1130					      lm90_temp_min_index[channel],
1131					      val);
1132		break;
1133	case hwmon_temp_max:
1134		if (channel == 0)
1135			err = lm90_set_temp8(data,
1136					     lm90_temp_max_index[channel],
1137					     val);
1138		else
1139			err = lm90_set_temp11(data,
1140					      lm90_temp_max_index[channel],
1141					      val);
1142		break;
1143	case hwmon_temp_crit:
1144		err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
 
1145		break;
1146	case hwmon_temp_crit_hyst:
1147		err = lm90_set_temphyst(data, val);
1148		break;
1149	case hwmon_temp_emergency:
1150		err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
 
1151		break;
1152	case hwmon_temp_offset:
1153		err = lm90_set_temp11(data, REMOTE_OFFSET, val);
 
1154		break;
1155	default:
1156		err = -EOPNOTSUPP;
1157		break;
1158	}
1159error:
1160	mutex_unlock(&data->update_lock);
1161
1162	return err;
1163}
1164
1165static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1166{
1167	switch (attr) {
1168	case hwmon_temp_input:
1169	case hwmon_temp_min_alarm:
1170	case hwmon_temp_max_alarm:
1171	case hwmon_temp_crit_alarm:
1172	case hwmon_temp_emergency_alarm:
1173	case hwmon_temp_emergency_hyst:
1174	case hwmon_temp_fault:
1175		return S_IRUGO;
 
1176	case hwmon_temp_min:
1177	case hwmon_temp_max:
1178	case hwmon_temp_crit:
1179	case hwmon_temp_emergency:
1180	case hwmon_temp_offset:
1181		return S_IRUGO | S_IWUSR;
1182	case hwmon_temp_crit_hyst:
1183		if (channel == 0)
1184			return S_IRUGO | S_IWUSR;
1185		return S_IRUGO;
1186	default:
1187		return 0;
1188	}
1189}
1190
1191static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1192{
1193	struct lm90_data *data = dev_get_drvdata(dev);
1194	int err;
1195
1196	mutex_lock(&data->update_lock);
1197	err = lm90_update_device(dev);
1198	mutex_unlock(&data->update_lock);
1199	if (err)
1200		return err;
1201
1202	switch (attr) {
1203	case hwmon_chip_update_interval:
1204		*val = data->update_interval;
1205		break;
1206	case hwmon_chip_alarms:
1207		*val = data->alarms;
1208		break;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1209	default:
1210		return -EOPNOTSUPP;
1211	}
1212
1213	return 0;
1214}
1215
1216static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1217{
1218	struct lm90_data *data = dev_get_drvdata(dev);
1219	struct i2c_client *client = data->client;
1220	int err;
1221
1222	mutex_lock(&data->update_lock);
1223
1224	err = lm90_update_device(dev);
1225	if (err)
1226		goto error;
1227
1228	switch (attr) {
1229	case hwmon_chip_update_interval:
1230		err = lm90_set_convrate(client, data,
1231					clamp_val(val, 0, 100000));
1232		break;
 
 
 
1233	default:
1234		err = -EOPNOTSUPP;
1235		break;
1236	}
1237error:
1238	mutex_unlock(&data->update_lock);
1239
1240	return err;
1241}
1242
1243static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1244{
1245	switch (attr) {
1246	case hwmon_chip_update_interval:
1247		return S_IRUGO | S_IWUSR;
 
1248	case hwmon_chip_alarms:
1249		return S_IRUGO;
1250	default:
1251		return 0;
1252	}
1253}
1254
1255static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1256		     u32 attr, int channel, long *val)
1257{
1258	switch (type) {
1259	case hwmon_chip:
1260		return lm90_chip_read(dev, attr, channel, val);
1261	case hwmon_temp:
1262		return lm90_temp_read(dev, attr, channel, val);
1263	default:
1264		return -EOPNOTSUPP;
1265	}
1266}
1267
 
 
 
 
 
 
 
 
 
 
1268static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1269		      u32 attr, int channel, long val)
1270{
1271	switch (type) {
1272	case hwmon_chip:
1273		return lm90_chip_write(dev, attr, channel, val);
1274	case hwmon_temp:
1275		return lm90_temp_write(dev, attr, channel, val);
1276	default:
1277		return -EOPNOTSUPP;
1278	}
1279}
1280
1281static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1282			       u32 attr, int channel)
1283{
1284	switch (type) {
1285	case hwmon_chip:
1286		return lm90_chip_is_visible(data, attr, channel);
1287	case hwmon_temp:
1288		return lm90_temp_is_visible(data, attr, channel);
1289	default:
1290		return 0;
1291	}
1292}
1293
1294/* Return 0 if detection is successful, -ENODEV otherwise */
1295static int lm90_detect(struct i2c_client *client,
1296		       struct i2c_board_info *info)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1297{
1298	struct i2c_adapter *adapter = client->adapter;
1299	int address = client->addr;
1300	const char *name = NULL;
1301	int man_id, chip_id, config1, config2, convrate;
1302
1303	if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1304		return -ENODEV;
 
 
 
 
 
 
 
 
 
1305
1306	/* detection and identification */
1307	man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1308	chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1309	config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1310	convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1311	if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
1312		return -ENODEV;
 
 
1313
1314	if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
1315		config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1316		if (config2 < 0)
1317			return -ENODEV;
1318	} else
1319		config2 = 0;		/* Make compiler happy */
1320
1321	if ((address == 0x4C || address == 0x4D)
1322	 && man_id == 0x01) { /* National Semiconductor */
1323		if ((config1 & 0x2A) == 0x00
1324		 && (config2 & 0xF8) == 0x00
1325		 && convrate <= 0x09) {
1326			if (address == 0x4C
1327			 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1328				name = "lm90";
1329			} else
1330			if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1331				name = "lm99";
1332				dev_info(&adapter->dev,
1333					 "Assuming LM99 chip at 0x%02x\n",
1334					 address);
1335				dev_info(&adapter->dev,
1336					 "If it is an LM89, instantiate it "
1337					 "with the new_device sysfs "
1338					 "interface\n");
1339			} else
1340			if (address == 0x4C
1341			 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1342				name = "lm86";
1343			}
1344		}
1345	} else
1346	if ((address == 0x4C || address == 0x4D)
1347	 && man_id == 0x41) { /* Analog Devices */
1348		if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
1349		 && (config1 & 0x3F) == 0x00
1350		 && convrate <= 0x0A) {
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1351			name = "adm1032";
1352			/*
1353			 * The ADM1032 supports PEC, but only if combined
1354			 * transactions are not used.
1355			 */
1356			if (i2c_check_functionality(adapter,
1357						    I2C_FUNC_SMBUS_BYTE))
1358				info->flags |= I2C_CLIENT_PEC;
1359		} else
1360		if (chip_id == 0x51 /* ADT7461 */
1361		 && (config1 & 0x1B) == 0x00
1362		 && convrate <= 0x0A) {
1363			name = "adt7461";
1364		} else
1365		if (chip_id == 0x57 /* ADT7461A, NCT1008 */
1366		 && (config1 & 0x1B) == 0x00
1367		 && convrate <= 0x0A) {
 
 
 
 
 
 
 
 
 
 
 
 
 
1368			name = "adt7461a";
 
 
 
 
 
 
 
 
 
 
 
1369		}
1370	} else
1371	if (man_id == 0x4D) { /* Maxim */
1372		int emerg, emerg2, status2;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1373
1374		/*
1375		 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1376		 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1377		 * exists, both readings will reflect the same value. Otherwise,
1378		 * the readings will be different.
1379		 */
1380		emerg = i2c_smbus_read_byte_data(client,
1381						 MAX6659_REG_R_REMOTE_EMERG);
1382		man_id = i2c_smbus_read_byte_data(client,
1383						  LM90_REG_R_MAN_ID);
1384		emerg2 = i2c_smbus_read_byte_data(client,
1385						  MAX6659_REG_R_REMOTE_EMERG);
1386		status2 = i2c_smbus_read_byte_data(client,
1387						   MAX6696_REG_R_STATUS2);
1388		if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
1389			return -ENODEV;
1390
1391		/*
1392		 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1393		 * register. Reading from that address will return the last
1394		 * read value, which in our case is those of the man_id
1395		 * register. Likewise, the config1 register seems to lack a
1396		 * low nibble, so the value will be those of the previous
1397		 * read, so in our case those of the man_id register.
1398		 * MAX6659 has a third set of upper temperature limit registers.
1399		 * Those registers also return values on MAX6657 and MAX6658,
1400		 * thus the only way to detect MAX6659 is by its address.
1401		 * For this reason it will be mis-detected as MAX6657 if its
1402		 * address is 0x4C.
1403		 */
1404		if (chip_id == man_id
1405		 && (address == 0x4C || address == 0x4D || address == 0x4E)
1406		 && (config1 & 0x1F) == (man_id & 0x0F)
1407		 && convrate <= 0x09) {
1408			if (address == 0x4C)
1409				name = "max6657";
1410			else
1411				name = "max6659";
1412		} else
1413		/*
1414		 * Even though MAX6695 and MAX6696 do not have a chip ID
1415		 * register, reading it returns 0x01. Bit 4 of the config1
1416		 * register is unused and should return zero when read. Bit 0 of
1417		 * the status2 register is unused and should return zero when
1418		 * read.
1419		 *
1420		 * MAX6695 and MAX6696 have an additional set of temperature
1421		 * limit registers. We can detect those chips by checking if
1422		 * one of those registers exists.
1423		 */
1424		if (chip_id == 0x01
1425		 && (config1 & 0x10) == 0x00
1426		 && (status2 & 0x01) == 0x00
1427		 && emerg == emerg2
1428		 && convrate <= 0x07) {
1429			name = "max6696";
1430		} else
1431		/*
1432		 * The chip_id register of the MAX6680 and MAX6681 holds the
1433		 * revision of the chip. The lowest bit of the config1 register
1434		 * is unused and should return zero when read, so should the
1435		 * second to last bit of config1 (software reset).
 
 
 
1436		 */
1437		if (chip_id == 0x01
1438		 && (config1 & 0x03) == 0x00
1439		 && convrate <= 0x07) {
1440			name = "max6680";
1441		} else
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1442		/*
1443		 * The chip_id register of the MAX6646/6647/6649 holds the
1444		 * revision of the chip. The lowest 6 bits of the config1
1445		 * register are unused and should return zero when read.
 
 
 
 
 
 
 
 
 
1446		 */
1447		if (chip_id == 0x59
1448		 && (config1 & 0x3f) == 0x00
1449		 && convrate <= 0x07) {
1450			name = "max6646";
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1451		}
1452	} else
1453	if (address == 0x4C
1454	 && man_id == 0x5C) { /* Winbond/Nuvoton */
1455		if ((config1 & 0x2A) == 0x00
1456		 && (config2 & 0xF8) == 0x00) {
1457			if (chip_id == 0x01 /* W83L771W/G */
1458			 && convrate <= 0x09) {
1459				name = "w83l771";
1460			} else
1461			if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
1462			 && convrate <= 0x08) {
1463				name = "w83l771";
1464			}
 
 
 
 
 
 
 
 
 
 
 
 
1465		}
1466	} else
1467	if (address >= 0x48 && address <= 0x4F
1468	 && man_id == 0xA1) { /*  NXP Semiconductor/Philips */
1469		if (chip_id == 0x00
1470		 && (config1 & 0x2A) == 0x00
1471		 && (config2 & 0xFE) == 0x00
1472		 && convrate <= 0x09) {
 
 
 
 
 
 
 
 
 
 
 
1473			name = "sa56004";
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1474		}
1475	} else
1476	if ((address == 0x4C || address == 0x4D)
1477	 && man_id == 0x47) { /* GMT */
1478		if (chip_id == 0x01 /* G781 */
1479		 && (config1 & 0x3F) == 0x00
1480		 && convrate <= 0x08)
1481			name = "g781";
1482	} else
1483	if (address == 0x4C
1484	 && man_id == 0x55) { /* Texas Instruments */
1485		int local_ext;
1486
1487		local_ext = i2c_smbus_read_byte_data(client,
1488						     TMP451_REG_R_LOCAL_TEMPL);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1489
1490		if (chip_id == 0x00 /* TMP451 */
1491		 && (config1 & 0x1B) == 0x00
1492		 && convrate <= 0x09
1493		 && (local_ext & 0x0F) == 0x00)
1494			name = "tmp451";
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1495	}
1496
1497	if (!name) { /* identification failed */
1498		dev_dbg(&adapter->dev,
1499			"Unsupported chip at 0x%02x (man_id=0x%02X, "
1500			"chip_id=0x%02X)\n", address, man_id, chip_id);
1501		return -ENODEV;
1502	}
1503
1504	strlcpy(info->type, name, I2C_NAME_SIZE);
1505
1506	return 0;
1507}
1508
1509static void lm90_restore_conf(void *_data)
1510{
1511	struct lm90_data *data = _data;
1512	struct i2c_client *client = data->client;
1513
 
 
 
1514	/* Restore initial configuration */
1515	i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE,
1516				  data->convrate_orig);
1517	i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1518				  data->config_orig);
1519}
1520
1521static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
1522{
 
1523	int config, convrate;
1524
1525	convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1526	if (convrate < 0)
1527		return convrate;
1528	data->convrate_orig = convrate;
 
 
 
 
 
1529
1530	/*
1531	 * Start the conversions.
1532	 */
1533	lm90_set_convrate(client, data, 500);	/* 500ms; 2Hz conversion rate */
1534	config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1535	if (config < 0)
1536		return config;
1537	data->config_orig = config;
 
1538
1539	/* Check Temperature Range Select */
1540	if (data->kind == adt7461 || data->kind == tmp451) {
1541		if (config & 0x04)
1542			data->flags |= LM90_FLAG_ADT7461_EXT;
 
 
1543	}
1544
1545	/*
1546	 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1547	 * 0.125 degree resolution) and range (0x08, extend range
1548	 * to -64 degree) mode for the remote temperature sensor.
 
 
1549	 */
1550	if (data->kind == max6680)
1551		config |= 0x18;
1552
1553	/*
1554	 * Select external channel 0 for max6695/96
 
 
 
 
 
 
 
 
 
1555	 */
1556	if (data->kind == max6696)
1557		config &= ~0x08;
1558
 
 
 
 
 
 
 
1559	config &= 0xBF;	/* run */
1560	if (config != data->config_orig) /* Only write if changed */
1561		i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
1562
1563	return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
1564}
1565
1566static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1567{
1568	struct lm90_data *data = i2c_get_clientdata(client);
1569	int st, st2 = 0;
1570
1571	st = lm90_read_reg(client, LM90_REG_R_STATUS);
1572	if (st < 0)
1573		return false;
1574
1575	if (data->kind == max6696) {
1576		st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1577		if (st2 < 0)
1578			return false;
1579	}
1580
1581	*status = st | (st2 << 8);
1582
1583	if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
 
1584		return false;
1585
1586	if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1587	    (st2 & MAX6696_STATUS2_LOT2))
1588		dev_warn(&client->dev,
1589			 "temp%d out of range, please check!\n", 1);
1590	if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1591	    (st2 & MAX6696_STATUS2_ROT2))
1592		dev_warn(&client->dev,
1593			 "temp%d out of range, please check!\n", 2);
1594	if (st & LM90_STATUS_ROPEN)
1595		dev_warn(&client->dev,
1596			 "temp%d diode open, please check!\n", 2);
1597	if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1598		   MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1599		dev_warn(&client->dev,
1600			 "temp%d out of range, please check!\n", 3);
1601	if (st2 & MAX6696_STATUS2_R2OPEN)
1602		dev_warn(&client->dev,
1603			 "temp%d diode open, please check!\n", 3);
1604
1605	return true;
1606}
1607
1608static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1609{
1610	struct i2c_client *client = dev_id;
1611	u16 status;
1612
1613	if (lm90_is_tripped(client, &status))
1614		return IRQ_HANDLED;
1615	else
1616		return IRQ_NONE;
1617}
1618
1619static void lm90_remove_pec(void *dev)
1620{
1621	device_remove_file(dev, &dev_attr_pec);
1622}
1623
1624static void lm90_regulator_disable(void *regulator)
 
 
1625{
1626	regulator_disable(regulator);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1627}
1628
1629static const u32 lm90_chip_config[] = {
1630	HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS,
1631	0
1632};
 
 
 
1633
1634static const struct hwmon_channel_info lm90_chip_info = {
1635	.type = hwmon_chip,
1636	.config = lm90_chip_config,
1637};
 
 
 
 
 
 
1638
 
 
1639
1640static const struct hwmon_ops lm90_ops = {
1641	.is_visible = lm90_is_visible,
1642	.read = lm90_read,
 
1643	.write = lm90_write,
1644};
1645
1646static int lm90_probe(struct i2c_client *client,
1647		      const struct i2c_device_id *id)
1648{
1649	struct device *dev = &client->dev;
1650	struct i2c_adapter *adapter = to_i2c_adapter(dev->parent);
1651	struct hwmon_channel_info *info;
1652	struct regulator *regulator;
1653	struct device *hwmon_dev;
1654	struct lm90_data *data;
1655	int err;
1656
1657	regulator = devm_regulator_get(dev, "vcc");
1658	if (IS_ERR(regulator))
1659		return PTR_ERR(regulator);
1660
1661	err = regulator_enable(regulator);
1662	if (err < 0) {
1663		dev_err(dev, "Failed to enable regulator: %d\n", err);
1664		return err;
1665	}
1666
1667	err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1668	if (err)
1669		return err;
1670
1671	data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
1672	if (!data)
1673		return -ENOMEM;
1674
1675	data->client = client;
1676	i2c_set_clientdata(client, data);
1677	mutex_init(&data->update_lock);
 
 
1678
1679	/* Set the device type */
1680	data->kind = id->driver_data;
1681	if (data->kind == adm1032) {
1682		if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
1683			client->flags &= ~I2C_CLIENT_PEC;
1684	}
1685
1686	/*
1687	 * Different devices have different alarm bits triggering the
1688	 * ALERT# output
1689	 */
1690	data->alert_alarms = lm90_params[data->kind].alert_alarms;
 
1691
1692	/* Set chip capabilities */
1693	data->flags = lm90_params[data->kind].flags;
1694
 
 
 
 
 
 
 
 
1695	data->chip.ops = &lm90_ops;
1696	data->chip.info = data->info;
1697
1698	data->info[0] = &lm90_chip_info;
 
 
 
 
 
 
 
 
 
 
 
1699	data->info[1] = &data->temp_info;
1700
1701	info = &data->temp_info;
1702	info->type = hwmon_temp;
1703	info->config = data->channel_config;
1704
1705	data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1706		HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1707		HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1708	data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1709		HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1710		HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
 
 
 
 
 
 
 
 
1711
1712	if (data->flags & LM90_HAVE_OFFSET)
1713		data->channel_config[1] |= HWMON_T_OFFSET;
1714
1715	if (data->flags & LM90_HAVE_EMERGENCY) {
1716		data->channel_config[0] |= HWMON_T_EMERGENCY |
1717			HWMON_T_EMERGENCY_HYST;
1718		data->channel_config[1] |= HWMON_T_EMERGENCY |
1719			HWMON_T_EMERGENCY_HYST;
1720	}
1721
1722	if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1723		data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1724		data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1725	}
1726
1727	if (data->flags & LM90_HAVE_TEMP3) {
1728		data->channel_config[2] = HWMON_T_INPUT |
1729			HWMON_T_MIN | HWMON_T_MAX |
1730			HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1731			HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1732			HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1733			HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1734			HWMON_T_FAULT;
 
 
 
 
 
 
 
1735	}
1736
 
 
1737	data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
 
 
 
1738
1739	/* Set maximum conversion rate */
1740	data->max_convrate = lm90_params[data->kind].max_convrate;
1741
 
 
 
 
 
 
 
1742	/* Initialize the LM90 chip */
1743	err = lm90_init_client(client, data);
1744	if (err < 0) {
1745		dev_err(dev, "Failed to initialize device\n");
1746		return err;
1747	}
1748
1749	/*
1750	 * The 'pec' attribute is attached to the i2c device and thus created
1751	 * separately.
1752	 */
1753	if (client->flags & I2C_CLIENT_PEC) {
1754		err = device_create_file(dev, &dev_attr_pec);
1755		if (err)
1756			return err;
1757		err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1758		if (err)
1759			return err;
1760	}
1761
1762	hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1763							 data, &data->chip,
1764							 NULL);
1765	if (IS_ERR(hwmon_dev))
1766		return PTR_ERR(hwmon_dev);
1767
 
 
1768	if (client->irq) {
1769		dev_dbg(dev, "IRQ: %d\n", client->irq);
1770		err = devm_request_threaded_irq(dev, client->irq,
1771						NULL, lm90_irq_thread,
1772						IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1773						"lm90", client);
1774		if (err < 0) {
1775			dev_err(dev, "cannot request IRQ %d\n", client->irq);
1776			return err;
1777		}
1778	}
1779
1780	return 0;
1781}
1782
1783static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1784		       unsigned int flag)
1785{
1786	u16 alarms;
1787
1788	if (type != I2C_PROTOCOL_SMBUS_ALERT)
1789		return;
1790
1791	if (lm90_is_tripped(client, &alarms)) {
1792		/*
1793		 * Disable ALERT# output, because these chips don't implement
1794		 * SMBus alert correctly; they should only hold the alert line
1795		 * low briefly.
1796		 */
1797		struct lm90_data *data = i2c_get_clientdata(client);
1798
1799		if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1800		    (alarms & data->alert_alarms)) {
1801			int config;
1802
1803			dev_dbg(&client->dev, "Disabling ALERT#\n");
1804			config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1805			if (config >= 0)
1806				i2c_smbus_write_byte_data(client,
1807							  LM90_REG_W_CONFIG1,
1808							  config | 0x80);
1809		}
1810	} else {
1811		dev_info(&client->dev, "Everything OK\n");
1812	}
1813}
1814
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1815static struct i2c_driver lm90_driver = {
1816	.class		= I2C_CLASS_HWMON,
1817	.driver = {
1818		.name	= "lm90",
 
 
1819	},
1820	.probe		= lm90_probe,
1821	.alert		= lm90_alert,
1822	.id_table	= lm90_id,
1823	.detect		= lm90_detect,
1824	.address_list	= normal_i2c,
1825};
1826
1827module_i2c_driver(lm90_driver);
1828
1829MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1830MODULE_DESCRIPTION("LM90/ADM1032 driver");
1831MODULE_LICENSE("GPL");