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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 *
9 * based on other smp stuff by
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
16 */
17
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21#include <linux/workqueue.h>
22#include <linux/memblock.h>
23#include <linux/export.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/err.h>
27#include <linux/spinlock.h>
28#include <linux/kernel_stat.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/irqflags.h>
32#include <linux/irq_work.h>
33#include <linux/cpu.h>
34#include <linux/slab.h>
35#include <linux/sched/hotplug.h>
36#include <linux/sched/task_stack.h>
37#include <linux/crash_dump.h>
38#include <linux/kprobes.h>
39#include <asm/asm-offsets.h>
40#include <asm/ctlreg.h>
41#include <asm/pfault.h>
42#include <asm/diag.h>
43#include <asm/switch_to.h>
44#include <asm/facility.h>
45#include <asm/ipl.h>
46#include <asm/setup.h>
47#include <asm/irq.h>
48#include <asm/tlbflush.h>
49#include <asm/vtimer.h>
50#include <asm/abs_lowcore.h>
51#include <asm/sclp.h>
52#include <asm/debug.h>
53#include <asm/os_info.h>
54#include <asm/sigp.h>
55#include <asm/idle.h>
56#include <asm/nmi.h>
57#include <asm/stacktrace.h>
58#include <asm/topology.h>
59#include <asm/vdso.h>
60#include <asm/maccess.h>
61#include "entry.h"
62
63enum {
64 ec_schedule = 0,
65 ec_call_function_single,
66 ec_stop_cpu,
67 ec_mcck_pending,
68 ec_irq_work,
69};
70
71enum {
72 CPU_STATE_STANDBY,
73 CPU_STATE_CONFIGURED,
74};
75
76static DEFINE_PER_CPU(struct cpu *, cpu_device);
77
78struct pcpu {
79 unsigned long ec_mask; /* bit mask for ec_xxx functions */
80 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
81 signed char state; /* physical cpu state */
82 signed char polarization; /* physical polarization */
83 u16 address; /* physical cpu address */
84};
85
86static u8 boot_core_type;
87static struct pcpu pcpu_devices[NR_CPUS];
88
89unsigned int smp_cpu_mt_shift;
90EXPORT_SYMBOL(smp_cpu_mt_shift);
91
92unsigned int smp_cpu_mtid;
93EXPORT_SYMBOL(smp_cpu_mtid);
94
95#ifdef CONFIG_CRASH_DUMP
96__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
97#endif
98
99static unsigned int smp_max_threads __initdata = -1U;
100cpumask_t cpu_setup_mask;
101
102static int __init early_nosmt(char *s)
103{
104 smp_max_threads = 1;
105 return 0;
106}
107early_param("nosmt", early_nosmt);
108
109static int __init early_smt(char *s)
110{
111 get_option(&s, &smp_max_threads);
112 return 0;
113}
114early_param("smt", early_smt);
115
116/*
117 * The smp_cpu_state_mutex must be held when changing the state or polarization
118 * member of a pcpu data structure within the pcpu_devices array.
119 */
120DEFINE_MUTEX(smp_cpu_state_mutex);
121
122/*
123 * Signal processor helper functions.
124 */
125static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
126{
127 int cc;
128
129 while (1) {
130 cc = __pcpu_sigp(addr, order, parm, NULL);
131 if (cc != SIGP_CC_BUSY)
132 return cc;
133 cpu_relax();
134 }
135}
136
137static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
138{
139 int cc, retry;
140
141 for (retry = 0; ; retry++) {
142 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
143 if (cc != SIGP_CC_BUSY)
144 break;
145 if (retry >= 3)
146 udelay(10);
147 }
148 return cc;
149}
150
151static inline int pcpu_stopped(struct pcpu *pcpu)
152{
153 u32 status;
154
155 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
156 0, &status) != SIGP_CC_STATUS_STORED)
157 return 0;
158 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
159}
160
161static inline int pcpu_running(struct pcpu *pcpu)
162{
163 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
164 0, NULL) != SIGP_CC_STATUS_STORED)
165 return 1;
166 /* Status stored condition code is equivalent to cpu not running. */
167 return 0;
168}
169
170/*
171 * Find struct pcpu by cpu address.
172 */
173static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
174{
175 int cpu;
176
177 for_each_cpu(cpu, mask)
178 if (pcpu_devices[cpu].address == address)
179 return pcpu_devices + cpu;
180 return NULL;
181}
182
183static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
184{
185 int order;
186
187 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
188 return;
189 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
190 pcpu->ec_clk = get_tod_clock_fast();
191 pcpu_sigp_retry(pcpu, order, 0);
192}
193
194static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
195{
196 unsigned long async_stack, nodat_stack, mcck_stack;
197 struct lowcore *lc;
198
199 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
200 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
201 async_stack = stack_alloc();
202 mcck_stack = stack_alloc();
203 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
204 goto out;
205 memcpy(lc, &S390_lowcore, 512);
206 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
207 lc->async_stack = async_stack + STACK_INIT_OFFSET;
208 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
209 lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
210 lc->cpu_nr = cpu;
211 lc->spinlock_lockval = arch_spin_lockval(cpu);
212 lc->spinlock_index = 0;
213 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
214 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
215 lc->preempt_count = PREEMPT_DISABLED;
216 if (nmi_alloc_mcesa(&lc->mcesad))
217 goto out;
218 if (abs_lowcore_map(cpu, lc, true))
219 goto out_mcesa;
220 lowcore_ptr[cpu] = lc;
221 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, __pa(lc));
222 return 0;
223
224out_mcesa:
225 nmi_free_mcesa(&lc->mcesad);
226out:
227 stack_free(mcck_stack);
228 stack_free(async_stack);
229 free_pages(nodat_stack, THREAD_SIZE_ORDER);
230 free_pages((unsigned long) lc, LC_ORDER);
231 return -ENOMEM;
232}
233
234static void pcpu_free_lowcore(struct pcpu *pcpu)
235{
236 unsigned long async_stack, nodat_stack, mcck_stack;
237 struct lowcore *lc;
238 int cpu;
239
240 cpu = pcpu - pcpu_devices;
241 lc = lowcore_ptr[cpu];
242 nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
243 async_stack = lc->async_stack - STACK_INIT_OFFSET;
244 mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
245 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
246 lowcore_ptr[cpu] = NULL;
247 abs_lowcore_unmap(cpu);
248 nmi_free_mcesa(&lc->mcesad);
249 stack_free(async_stack);
250 stack_free(mcck_stack);
251 free_pages(nodat_stack, THREAD_SIZE_ORDER);
252 free_pages((unsigned long) lc, LC_ORDER);
253}
254
255static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
256{
257 struct lowcore *lc, *abs_lc;
258
259 lc = lowcore_ptr[cpu];
260 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
261 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
262 lc->cpu_nr = cpu;
263 lc->restart_flags = RESTART_FLAG_CTLREGS;
264 lc->spinlock_lockval = arch_spin_lockval(cpu);
265 lc->spinlock_index = 0;
266 lc->percpu_offset = __per_cpu_offset[cpu];
267 lc->kernel_asce = S390_lowcore.kernel_asce;
268 lc->user_asce = s390_invalid_asce;
269 lc->machine_flags = S390_lowcore.machine_flags;
270 lc->user_timer = lc->system_timer =
271 lc->steal_timer = lc->avg_steal_timer = 0;
272 abs_lc = get_abs_lowcore();
273 memcpy(lc->cregs_save_area, abs_lc->cregs_save_area, sizeof(lc->cregs_save_area));
274 put_abs_lowcore(abs_lc);
275 lc->cregs_save_area[1] = lc->kernel_asce;
276 lc->cregs_save_area[7] = lc->user_asce;
277 save_access_regs((unsigned int *) lc->access_regs_save_area);
278 arch_spin_lock_setup(cpu);
279}
280
281static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
282{
283 struct lowcore *lc;
284 int cpu;
285
286 cpu = pcpu - pcpu_devices;
287 lc = lowcore_ptr[cpu];
288 lc->kernel_stack = (unsigned long)task_stack_page(tsk) + STACK_INIT_OFFSET;
289 lc->current_task = (unsigned long)tsk;
290 lc->lpp = LPP_MAGIC;
291 lc->current_pid = tsk->pid;
292 lc->user_timer = tsk->thread.user_timer;
293 lc->guest_timer = tsk->thread.guest_timer;
294 lc->system_timer = tsk->thread.system_timer;
295 lc->hardirq_timer = tsk->thread.hardirq_timer;
296 lc->softirq_timer = tsk->thread.softirq_timer;
297 lc->steal_timer = 0;
298}
299
300static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
301{
302 struct lowcore *lc;
303 int cpu;
304
305 cpu = pcpu - pcpu_devices;
306 lc = lowcore_ptr[cpu];
307 lc->restart_stack = lc->kernel_stack;
308 lc->restart_fn = (unsigned long) func;
309 lc->restart_data = (unsigned long) data;
310 lc->restart_source = -1U;
311 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
312}
313
314typedef void (pcpu_delegate_fn)(void *);
315
316/*
317 * Call function via PSW restart on pcpu and stop the current cpu.
318 */
319static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
320{
321 func(data); /* should not return */
322}
323
324static void pcpu_delegate(struct pcpu *pcpu,
325 pcpu_delegate_fn *func,
326 void *data, unsigned long stack)
327{
328 struct lowcore *lc, *abs_lc;
329 unsigned int source_cpu;
330
331 lc = lowcore_ptr[pcpu - pcpu_devices];
332 source_cpu = stap();
333
334 if (pcpu->address == source_cpu) {
335 call_on_stack(2, stack, void, __pcpu_delegate,
336 pcpu_delegate_fn *, func, void *, data);
337 }
338 /* Stop target cpu (if func returns this stops the current cpu). */
339 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
340 pcpu_sigp_retry(pcpu, SIGP_CPU_RESET, 0);
341 /* Restart func on the target cpu and stop the current cpu. */
342 if (lc) {
343 lc->restart_stack = stack;
344 lc->restart_fn = (unsigned long)func;
345 lc->restart_data = (unsigned long)data;
346 lc->restart_source = source_cpu;
347 } else {
348 abs_lc = get_abs_lowcore();
349 abs_lc->restart_stack = stack;
350 abs_lc->restart_fn = (unsigned long)func;
351 abs_lc->restart_data = (unsigned long)data;
352 abs_lc->restart_source = source_cpu;
353 put_abs_lowcore(abs_lc);
354 }
355 asm volatile(
356 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
357 " brc 2,0b # busy, try again\n"
358 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
359 " brc 2,1b # busy, try again\n"
360 : : "d" (pcpu->address), "d" (source_cpu),
361 "K" (SIGP_RESTART), "K" (SIGP_STOP)
362 : "0", "1", "cc");
363 for (;;) ;
364}
365
366/*
367 * Enable additional logical cpus for multi-threading.
368 */
369static int pcpu_set_smt(unsigned int mtid)
370{
371 int cc;
372
373 if (smp_cpu_mtid == mtid)
374 return 0;
375 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
376 if (cc == 0) {
377 smp_cpu_mtid = mtid;
378 smp_cpu_mt_shift = 0;
379 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
380 smp_cpu_mt_shift++;
381 pcpu_devices[0].address = stap();
382 }
383 return cc;
384}
385
386/*
387 * Call function on an online CPU.
388 */
389void smp_call_online_cpu(void (*func)(void *), void *data)
390{
391 struct pcpu *pcpu;
392
393 /* Use the current cpu if it is online. */
394 pcpu = pcpu_find_address(cpu_online_mask, stap());
395 if (!pcpu)
396 /* Use the first online cpu. */
397 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
398 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
399}
400
401/*
402 * Call function on the ipl CPU.
403 */
404void smp_call_ipl_cpu(void (*func)(void *), void *data)
405{
406 struct lowcore *lc = lowcore_ptr[0];
407
408 if (pcpu_devices[0].address == stap())
409 lc = &S390_lowcore;
410
411 pcpu_delegate(&pcpu_devices[0], func, data,
412 lc->nodat_stack);
413}
414
415int smp_find_processor_id(u16 address)
416{
417 int cpu;
418
419 for_each_present_cpu(cpu)
420 if (pcpu_devices[cpu].address == address)
421 return cpu;
422 return -1;
423}
424
425void schedule_mcck_handler(void)
426{
427 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
428}
429
430bool notrace arch_vcpu_is_preempted(int cpu)
431{
432 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
433 return false;
434 if (pcpu_running(pcpu_devices + cpu))
435 return false;
436 return true;
437}
438EXPORT_SYMBOL(arch_vcpu_is_preempted);
439
440void notrace smp_yield_cpu(int cpu)
441{
442 if (!MACHINE_HAS_DIAG9C)
443 return;
444 diag_stat_inc_norecursion(DIAG_STAT_X09C);
445 asm volatile("diag %0,0,0x9c"
446 : : "d" (pcpu_devices[cpu].address));
447}
448EXPORT_SYMBOL_GPL(smp_yield_cpu);
449
450/*
451 * Send cpus emergency shutdown signal. This gives the cpus the
452 * opportunity to complete outstanding interrupts.
453 */
454void notrace smp_emergency_stop(void)
455{
456 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
457 static cpumask_t cpumask;
458 u64 end;
459 int cpu;
460
461 arch_spin_lock(&lock);
462 cpumask_copy(&cpumask, cpu_online_mask);
463 cpumask_clear_cpu(smp_processor_id(), &cpumask);
464
465 end = get_tod_clock() + (1000000UL << 12);
466 for_each_cpu(cpu, &cpumask) {
467 struct pcpu *pcpu = pcpu_devices + cpu;
468 set_bit(ec_stop_cpu, &pcpu->ec_mask);
469 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
470 0, NULL) == SIGP_CC_BUSY &&
471 get_tod_clock() < end)
472 cpu_relax();
473 }
474 while (get_tod_clock() < end) {
475 for_each_cpu(cpu, &cpumask)
476 if (pcpu_stopped(pcpu_devices + cpu))
477 cpumask_clear_cpu(cpu, &cpumask);
478 if (cpumask_empty(&cpumask))
479 break;
480 cpu_relax();
481 }
482 arch_spin_unlock(&lock);
483}
484NOKPROBE_SYMBOL(smp_emergency_stop);
485
486/*
487 * Stop all cpus but the current one.
488 */
489void smp_send_stop(void)
490{
491 int cpu;
492
493 /* Disable all interrupts/machine checks */
494 __load_psw_mask(PSW_KERNEL_BITS);
495 trace_hardirqs_off();
496
497 debug_set_critical();
498
499 if (oops_in_progress)
500 smp_emergency_stop();
501
502 /* stop all processors */
503 for_each_online_cpu(cpu) {
504 if (cpu == smp_processor_id())
505 continue;
506 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
507 while (!pcpu_stopped(pcpu_devices + cpu))
508 cpu_relax();
509 }
510}
511
512/*
513 * This is the main routine where commands issued by other
514 * cpus are handled.
515 */
516static void smp_handle_ext_call(void)
517{
518 unsigned long bits;
519
520 /* handle bit signal external calls */
521 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
522 if (test_bit(ec_stop_cpu, &bits))
523 smp_stop_cpu();
524 if (test_bit(ec_schedule, &bits))
525 scheduler_ipi();
526 if (test_bit(ec_call_function_single, &bits))
527 generic_smp_call_function_single_interrupt();
528 if (test_bit(ec_mcck_pending, &bits))
529 s390_handle_mcck();
530 if (test_bit(ec_irq_work, &bits))
531 irq_work_run();
532}
533
534static void do_ext_call_interrupt(struct ext_code ext_code,
535 unsigned int param32, unsigned long param64)
536{
537 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
538 smp_handle_ext_call();
539}
540
541void arch_send_call_function_ipi_mask(const struct cpumask *mask)
542{
543 int cpu;
544
545 for_each_cpu(cpu, mask)
546 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
547}
548
549void arch_send_call_function_single_ipi(int cpu)
550{
551 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
552}
553
554/*
555 * this function sends a 'reschedule' IPI to another CPU.
556 * it goes straight through and wastes no time serializing
557 * anything. Worst case is that we lose a reschedule ...
558 */
559void arch_smp_send_reschedule(int cpu)
560{
561 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
562}
563
564#ifdef CONFIG_IRQ_WORK
565void arch_irq_work_raise(void)
566{
567 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work);
568}
569#endif
570
571#ifdef CONFIG_CRASH_DUMP
572
573int smp_store_status(int cpu)
574{
575 struct lowcore *lc;
576 struct pcpu *pcpu;
577 unsigned long pa;
578
579 pcpu = pcpu_devices + cpu;
580 lc = lowcore_ptr[cpu];
581 pa = __pa(&lc->floating_pt_save_area);
582 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
583 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
584 return -EIO;
585 if (!cpu_has_vx() && !MACHINE_HAS_GS)
586 return 0;
587 pa = lc->mcesad & MCESA_ORIGIN_MASK;
588 if (MACHINE_HAS_GS)
589 pa |= lc->mcesad & MCESA_LC_MASK;
590 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
591 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
592 return -EIO;
593 return 0;
594}
595
596/*
597 * Collect CPU state of the previous, crashed system.
598 * There are four cases:
599 * 1) standard zfcp/nvme dump
600 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
601 * The state for all CPUs except the boot CPU needs to be collected
602 * with sigp stop-and-store-status. The boot CPU state is located in
603 * the absolute lowcore of the memory stored in the HSA. The zcore code
604 * will copy the boot CPU state from the HSA.
605 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
606 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
607 * The state for all CPUs except the boot CPU needs to be collected
608 * with sigp stop-and-store-status. The firmware or the boot-loader
609 * stored the registers of the boot CPU in the absolute lowcore in the
610 * memory of the old system.
611 * 3) kdump and the old kernel did not store the CPU state,
612 * or stand-alone kdump for DASD
613 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
614 * The state for all CPUs except the boot CPU needs to be collected
615 * with sigp stop-and-store-status. The kexec code or the boot-loader
616 * stored the registers of the boot CPU in the memory of the old system.
617 * 4) kdump and the old kernel stored the CPU state
618 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
619 * This case does not exist for s390 anymore, setup_arch explicitly
620 * deactivates the elfcorehdr= kernel parameter
621 */
622static bool dump_available(void)
623{
624 return oldmem_data.start || is_ipl_type_dump();
625}
626
627void __init smp_save_dump_ipl_cpu(void)
628{
629 struct save_area *sa;
630 void *regs;
631
632 if (!dump_available())
633 return;
634 sa = save_area_alloc(true);
635 regs = memblock_alloc(512, 8);
636 if (!sa || !regs)
637 panic("could not allocate memory for boot CPU save area\n");
638 copy_oldmem_kernel(regs, __LC_FPREGS_SAVE_AREA, 512);
639 save_area_add_regs(sa, regs);
640 memblock_free(regs, 512);
641 if (cpu_has_vx())
642 save_area_add_vxrs(sa, boot_cpu_vector_save_area);
643}
644
645void __init smp_save_dump_secondary_cpus(void)
646{
647 int addr, boot_cpu_addr, max_cpu_addr;
648 struct save_area *sa;
649 void *page;
650
651 if (!dump_available())
652 return;
653 /* Allocate a page as dumping area for the store status sigps */
654 page = memblock_alloc_low(PAGE_SIZE, PAGE_SIZE);
655 if (!page)
656 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
657 PAGE_SIZE, 1UL << 31);
658
659 /* Set multi-threading state to the previous system. */
660 pcpu_set_smt(sclp.mtid_prev);
661 boot_cpu_addr = stap();
662 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
663 for (addr = 0; addr <= max_cpu_addr; addr++) {
664 if (addr == boot_cpu_addr)
665 continue;
666 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
667 SIGP_CC_NOT_OPERATIONAL)
668 continue;
669 sa = save_area_alloc(false);
670 if (!sa)
671 panic("could not allocate memory for save area\n");
672 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, __pa(page));
673 save_area_add_regs(sa, page);
674 if (cpu_has_vx()) {
675 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, __pa(page));
676 save_area_add_vxrs(sa, page);
677 }
678 }
679 memblock_free(page, PAGE_SIZE);
680 diag_amode31_ops.diag308_reset();
681 pcpu_set_smt(0);
682}
683#endif /* CONFIG_CRASH_DUMP */
684
685void smp_cpu_set_polarization(int cpu, int val)
686{
687 pcpu_devices[cpu].polarization = val;
688}
689
690int smp_cpu_get_polarization(int cpu)
691{
692 return pcpu_devices[cpu].polarization;
693}
694
695int smp_cpu_get_cpu_address(int cpu)
696{
697 return pcpu_devices[cpu].address;
698}
699
700static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
701{
702 static int use_sigp_detection;
703 int address;
704
705 if (use_sigp_detection || sclp_get_core_info(info, early)) {
706 use_sigp_detection = 1;
707 for (address = 0;
708 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
709 address += (1U << smp_cpu_mt_shift)) {
710 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
711 SIGP_CC_NOT_OPERATIONAL)
712 continue;
713 info->core[info->configured].core_id =
714 address >> smp_cpu_mt_shift;
715 info->configured++;
716 }
717 info->combined = info->configured;
718 }
719}
720
721static int smp_add_present_cpu(int cpu);
722
723static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
724 bool configured, bool early)
725{
726 struct pcpu *pcpu;
727 int cpu, nr, i;
728 u16 address;
729
730 nr = 0;
731 if (sclp.has_core_type && core->type != boot_core_type)
732 return nr;
733 cpu = cpumask_first(avail);
734 address = core->core_id << smp_cpu_mt_shift;
735 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
736 if (pcpu_find_address(cpu_present_mask, address + i))
737 continue;
738 pcpu = pcpu_devices + cpu;
739 pcpu->address = address + i;
740 if (configured)
741 pcpu->state = CPU_STATE_CONFIGURED;
742 else
743 pcpu->state = CPU_STATE_STANDBY;
744 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
745 set_cpu_present(cpu, true);
746 if (!early && smp_add_present_cpu(cpu) != 0)
747 set_cpu_present(cpu, false);
748 else
749 nr++;
750 cpumask_clear_cpu(cpu, avail);
751 cpu = cpumask_next(cpu, avail);
752 }
753 return nr;
754}
755
756static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
757{
758 struct sclp_core_entry *core;
759 static cpumask_t avail;
760 bool configured;
761 u16 core_id;
762 int nr, i;
763
764 cpus_read_lock();
765 mutex_lock(&smp_cpu_state_mutex);
766 nr = 0;
767 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
768 /*
769 * Add IPL core first (which got logical CPU number 0) to make sure
770 * that all SMT threads get subsequent logical CPU numbers.
771 */
772 if (early) {
773 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
774 for (i = 0; i < info->configured; i++) {
775 core = &info->core[i];
776 if (core->core_id == core_id) {
777 nr += smp_add_core(core, &avail, true, early);
778 break;
779 }
780 }
781 }
782 for (i = 0; i < info->combined; i++) {
783 configured = i < info->configured;
784 nr += smp_add_core(&info->core[i], &avail, configured, early);
785 }
786 mutex_unlock(&smp_cpu_state_mutex);
787 cpus_read_unlock();
788 return nr;
789}
790
791void __init smp_detect_cpus(void)
792{
793 unsigned int cpu, mtid, c_cpus, s_cpus;
794 struct sclp_core_info *info;
795 u16 address;
796
797 /* Get CPU information */
798 info = memblock_alloc(sizeof(*info), 8);
799 if (!info)
800 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
801 __func__, sizeof(*info), 8);
802 smp_get_core_info(info, 1);
803 /* Find boot CPU type */
804 if (sclp.has_core_type) {
805 address = stap();
806 for (cpu = 0; cpu < info->combined; cpu++)
807 if (info->core[cpu].core_id == address) {
808 /* The boot cpu dictates the cpu type. */
809 boot_core_type = info->core[cpu].type;
810 break;
811 }
812 if (cpu >= info->combined)
813 panic("Could not find boot CPU type");
814 }
815
816 /* Set multi-threading state for the current system */
817 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
818 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
819 pcpu_set_smt(mtid);
820
821 /* Print number of CPUs */
822 c_cpus = s_cpus = 0;
823 for (cpu = 0; cpu < info->combined; cpu++) {
824 if (sclp.has_core_type &&
825 info->core[cpu].type != boot_core_type)
826 continue;
827 if (cpu < info->configured)
828 c_cpus += smp_cpu_mtid + 1;
829 else
830 s_cpus += smp_cpu_mtid + 1;
831 }
832 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
833
834 /* Add CPUs present at boot */
835 __smp_rescan_cpus(info, true);
836 memblock_free(info, sizeof(*info));
837}
838
839/*
840 * Activate a secondary processor.
841 */
842static void smp_start_secondary(void *cpuvoid)
843{
844 int cpu = raw_smp_processor_id();
845
846 S390_lowcore.last_update_clock = get_tod_clock();
847 S390_lowcore.restart_stack = (unsigned long)restart_stack;
848 S390_lowcore.restart_fn = (unsigned long)do_restart;
849 S390_lowcore.restart_data = 0;
850 S390_lowcore.restart_source = -1U;
851 S390_lowcore.restart_flags = 0;
852 restore_access_regs(S390_lowcore.access_regs_save_area);
853 cpu_init();
854 rcutree_report_cpu_starting(cpu);
855 init_cpu_timer();
856 vtime_init();
857 vdso_getcpu_init();
858 pfault_init();
859 cpumask_set_cpu(cpu, &cpu_setup_mask);
860 update_cpu_masks();
861 notify_cpu_starting(cpu);
862 if (topology_cpu_dedicated(cpu))
863 set_cpu_flag(CIF_DEDICATED_CPU);
864 else
865 clear_cpu_flag(CIF_DEDICATED_CPU);
866 set_cpu_online(cpu, true);
867 inc_irq_stat(CPU_RST);
868 local_irq_enable();
869 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
870}
871
872/* Upping and downing of CPUs */
873int __cpu_up(unsigned int cpu, struct task_struct *tidle)
874{
875 struct pcpu *pcpu = pcpu_devices + cpu;
876 int rc;
877
878 if (pcpu->state != CPU_STATE_CONFIGURED)
879 return -EIO;
880 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
881 SIGP_CC_ORDER_CODE_ACCEPTED)
882 return -EIO;
883
884 rc = pcpu_alloc_lowcore(pcpu, cpu);
885 if (rc)
886 return rc;
887 /*
888 * Make sure global control register contents do not change
889 * until new CPU has initialized control registers.
890 */
891 system_ctlreg_lock();
892 pcpu_prepare_secondary(pcpu, cpu);
893 pcpu_attach_task(pcpu, tidle);
894 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
895 /* Wait until cpu puts itself in the online & active maps */
896 while (!cpu_online(cpu))
897 cpu_relax();
898 system_ctlreg_unlock();
899 return 0;
900}
901
902static unsigned int setup_possible_cpus __initdata;
903
904static int __init _setup_possible_cpus(char *s)
905{
906 get_option(&s, &setup_possible_cpus);
907 return 0;
908}
909early_param("possible_cpus", _setup_possible_cpus);
910
911int __cpu_disable(void)
912{
913 struct ctlreg cregs[16];
914 int cpu;
915
916 /* Handle possible pending IPIs */
917 smp_handle_ext_call();
918 cpu = smp_processor_id();
919 set_cpu_online(cpu, false);
920 cpumask_clear_cpu(cpu, &cpu_setup_mask);
921 update_cpu_masks();
922 /* Disable pseudo page faults on this cpu. */
923 pfault_fini();
924 /* Disable interrupt sources via control register. */
925 __local_ctl_store(0, 15, cregs);
926 cregs[0].val &= ~0x0000ee70UL; /* disable all external interrupts */
927 cregs[6].val &= ~0xff000000UL; /* disable all I/O interrupts */
928 cregs[14].val &= ~0x1f000000UL; /* disable most machine checks */
929 __local_ctl_load(0, 15, cregs);
930 clear_cpu_flag(CIF_NOHZ_DELAY);
931 return 0;
932}
933
934void __cpu_die(unsigned int cpu)
935{
936 struct pcpu *pcpu;
937
938 /* Wait until target cpu is down */
939 pcpu = pcpu_devices + cpu;
940 while (!pcpu_stopped(pcpu))
941 cpu_relax();
942 pcpu_free_lowcore(pcpu);
943 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
944 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
945}
946
947void __noreturn cpu_die(void)
948{
949 idle_task_exit();
950 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
951 for (;;) ;
952}
953
954void __init smp_fill_possible_mask(void)
955{
956 unsigned int possible, sclp_max, cpu;
957
958 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
959 sclp_max = min(smp_max_threads, sclp_max);
960 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
961 possible = setup_possible_cpus ?: nr_cpu_ids;
962 possible = min(possible, sclp_max);
963 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
964 set_cpu_possible(cpu, true);
965}
966
967void __init smp_prepare_cpus(unsigned int max_cpus)
968{
969 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
970 panic("Couldn't request external interrupt 0x1201");
971 system_ctl_set_bit(0, 14);
972 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
973 panic("Couldn't request external interrupt 0x1202");
974 system_ctl_set_bit(0, 13);
975}
976
977void __init smp_prepare_boot_cpu(void)
978{
979 struct pcpu *pcpu = pcpu_devices;
980
981 WARN_ON(!cpu_present(0) || !cpu_online(0));
982 pcpu->state = CPU_STATE_CONFIGURED;
983 S390_lowcore.percpu_offset = __per_cpu_offset[0];
984 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
985}
986
987void __init smp_setup_processor_id(void)
988{
989 pcpu_devices[0].address = stap();
990 S390_lowcore.cpu_nr = 0;
991 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
992 S390_lowcore.spinlock_index = 0;
993}
994
995/*
996 * the frequency of the profiling timer can be changed
997 * by writing a multiplier value into /proc/profile.
998 *
999 * usually you want to run this on all CPUs ;)
1000 */
1001int setup_profiling_timer(unsigned int multiplier)
1002{
1003 return 0;
1004}
1005
1006static ssize_t cpu_configure_show(struct device *dev,
1007 struct device_attribute *attr, char *buf)
1008{
1009 ssize_t count;
1010
1011 mutex_lock(&smp_cpu_state_mutex);
1012 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1013 mutex_unlock(&smp_cpu_state_mutex);
1014 return count;
1015}
1016
1017static ssize_t cpu_configure_store(struct device *dev,
1018 struct device_attribute *attr,
1019 const char *buf, size_t count)
1020{
1021 struct pcpu *pcpu;
1022 int cpu, val, rc, i;
1023 char delim;
1024
1025 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1026 return -EINVAL;
1027 if (val != 0 && val != 1)
1028 return -EINVAL;
1029 cpus_read_lock();
1030 mutex_lock(&smp_cpu_state_mutex);
1031 rc = -EBUSY;
1032 /* disallow configuration changes of online cpus */
1033 cpu = dev->id;
1034 cpu = smp_get_base_cpu(cpu);
1035 for (i = 0; i <= smp_cpu_mtid; i++)
1036 if (cpu_online(cpu + i))
1037 goto out;
1038 pcpu = pcpu_devices + cpu;
1039 rc = 0;
1040 switch (val) {
1041 case 0:
1042 if (pcpu->state != CPU_STATE_CONFIGURED)
1043 break;
1044 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1045 if (rc)
1046 break;
1047 for (i = 0; i <= smp_cpu_mtid; i++) {
1048 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1049 continue;
1050 pcpu[i].state = CPU_STATE_STANDBY;
1051 smp_cpu_set_polarization(cpu + i,
1052 POLARIZATION_UNKNOWN);
1053 }
1054 topology_expect_change();
1055 break;
1056 case 1:
1057 if (pcpu->state != CPU_STATE_STANDBY)
1058 break;
1059 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1060 if (rc)
1061 break;
1062 for (i = 0; i <= smp_cpu_mtid; i++) {
1063 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1064 continue;
1065 pcpu[i].state = CPU_STATE_CONFIGURED;
1066 smp_cpu_set_polarization(cpu + i,
1067 POLARIZATION_UNKNOWN);
1068 }
1069 topology_expect_change();
1070 break;
1071 default:
1072 break;
1073 }
1074out:
1075 mutex_unlock(&smp_cpu_state_mutex);
1076 cpus_read_unlock();
1077 return rc ? rc : count;
1078}
1079static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1080
1081static ssize_t show_cpu_address(struct device *dev,
1082 struct device_attribute *attr, char *buf)
1083{
1084 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1085}
1086static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1087
1088static struct attribute *cpu_common_attrs[] = {
1089 &dev_attr_configure.attr,
1090 &dev_attr_address.attr,
1091 NULL,
1092};
1093
1094static struct attribute_group cpu_common_attr_group = {
1095 .attrs = cpu_common_attrs,
1096};
1097
1098static struct attribute *cpu_online_attrs[] = {
1099 &dev_attr_idle_count.attr,
1100 &dev_attr_idle_time_us.attr,
1101 NULL,
1102};
1103
1104static struct attribute_group cpu_online_attr_group = {
1105 .attrs = cpu_online_attrs,
1106};
1107
1108static int smp_cpu_online(unsigned int cpu)
1109{
1110 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1111
1112 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1113}
1114
1115static int smp_cpu_pre_down(unsigned int cpu)
1116{
1117 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1118
1119 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1120 return 0;
1121}
1122
1123static int smp_add_present_cpu(int cpu)
1124{
1125 struct device *s;
1126 struct cpu *c;
1127 int rc;
1128
1129 c = kzalloc(sizeof(*c), GFP_KERNEL);
1130 if (!c)
1131 return -ENOMEM;
1132 per_cpu(cpu_device, cpu) = c;
1133 s = &c->dev;
1134 c->hotpluggable = !!cpu;
1135 rc = register_cpu(c, cpu);
1136 if (rc)
1137 goto out;
1138 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1139 if (rc)
1140 goto out_cpu;
1141 rc = topology_cpu_init(c);
1142 if (rc)
1143 goto out_topology;
1144 return 0;
1145
1146out_topology:
1147 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1148out_cpu:
1149 unregister_cpu(c);
1150out:
1151 return rc;
1152}
1153
1154int __ref smp_rescan_cpus(void)
1155{
1156 struct sclp_core_info *info;
1157 int nr;
1158
1159 info = kzalloc(sizeof(*info), GFP_KERNEL);
1160 if (!info)
1161 return -ENOMEM;
1162 smp_get_core_info(info, 0);
1163 nr = __smp_rescan_cpus(info, false);
1164 kfree(info);
1165 if (nr)
1166 topology_schedule_update();
1167 return 0;
1168}
1169
1170static ssize_t __ref rescan_store(struct device *dev,
1171 struct device_attribute *attr,
1172 const char *buf,
1173 size_t count)
1174{
1175 int rc;
1176
1177 rc = lock_device_hotplug_sysfs();
1178 if (rc)
1179 return rc;
1180 rc = smp_rescan_cpus();
1181 unlock_device_hotplug();
1182 return rc ? rc : count;
1183}
1184static DEVICE_ATTR_WO(rescan);
1185
1186static int __init s390_smp_init(void)
1187{
1188 struct device *dev_root;
1189 int cpu, rc = 0;
1190
1191 dev_root = bus_get_dev_root(&cpu_subsys);
1192 if (dev_root) {
1193 rc = device_create_file(dev_root, &dev_attr_rescan);
1194 put_device(dev_root);
1195 if (rc)
1196 return rc;
1197 }
1198
1199 for_each_present_cpu(cpu) {
1200 rc = smp_add_present_cpu(cpu);
1201 if (rc)
1202 goto out;
1203 }
1204
1205 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1206 smp_cpu_online, smp_cpu_pre_down);
1207 rc = rc <= 0 ? rc : 0;
1208out:
1209 return rc;
1210}
1211subsys_initcall(s390_smp_init);
1/*
2 * SMP related functions
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
8 *
9 * based on other smp stuff by
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
16 */
17
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21#include <linux/workqueue.h>
22#include <linux/bootmem.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/err.h>
27#include <linux/spinlock.h>
28#include <linux/kernel_stat.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/irqflags.h>
32#include <linux/cpu.h>
33#include <linux/slab.h>
34#include <linux/crash_dump.h>
35#include <linux/memblock.h>
36#include <asm/asm-offsets.h>
37#include <asm/diag.h>
38#include <asm/switch_to.h>
39#include <asm/facility.h>
40#include <asm/ipl.h>
41#include <asm/setup.h>
42#include <asm/irq.h>
43#include <asm/tlbflush.h>
44#include <asm/vtimer.h>
45#include <asm/lowcore.h>
46#include <asm/sclp.h>
47#include <asm/vdso.h>
48#include <asm/debug.h>
49#include <asm/os_info.h>
50#include <asm/sigp.h>
51#include <asm/idle.h>
52#include "entry.h"
53
54enum {
55 ec_schedule = 0,
56 ec_call_function_single,
57 ec_stop_cpu,
58};
59
60enum {
61 CPU_STATE_STANDBY,
62 CPU_STATE_CONFIGURED,
63};
64
65static DEFINE_PER_CPU(struct cpu *, cpu_device);
66
67struct pcpu {
68 struct lowcore *lowcore; /* lowcore page(s) for the cpu */
69 unsigned long ec_mask; /* bit mask for ec_xxx functions */
70 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
71 signed char state; /* physical cpu state */
72 signed char polarization; /* physical polarization */
73 u16 address; /* physical cpu address */
74};
75
76static u8 boot_core_type;
77static struct pcpu pcpu_devices[NR_CPUS];
78
79unsigned int smp_cpu_mt_shift;
80EXPORT_SYMBOL(smp_cpu_mt_shift);
81
82unsigned int smp_cpu_mtid;
83EXPORT_SYMBOL(smp_cpu_mtid);
84
85#ifdef CONFIG_CRASH_DUMP
86__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
87#endif
88
89static unsigned int smp_max_threads __initdata = -1U;
90
91static int __init early_nosmt(char *s)
92{
93 smp_max_threads = 1;
94 return 0;
95}
96early_param("nosmt", early_nosmt);
97
98static int __init early_smt(char *s)
99{
100 get_option(&s, &smp_max_threads);
101 return 0;
102}
103early_param("smt", early_smt);
104
105/*
106 * The smp_cpu_state_mutex must be held when changing the state or polarization
107 * member of a pcpu data structure within the pcpu_devices arreay.
108 */
109DEFINE_MUTEX(smp_cpu_state_mutex);
110
111/*
112 * Signal processor helper functions.
113 */
114static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
115{
116 int cc;
117
118 while (1) {
119 cc = __pcpu_sigp(addr, order, parm, NULL);
120 if (cc != SIGP_CC_BUSY)
121 return cc;
122 cpu_relax();
123 }
124}
125
126static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
127{
128 int cc, retry;
129
130 for (retry = 0; ; retry++) {
131 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
132 if (cc != SIGP_CC_BUSY)
133 break;
134 if (retry >= 3)
135 udelay(10);
136 }
137 return cc;
138}
139
140static inline int pcpu_stopped(struct pcpu *pcpu)
141{
142 u32 uninitialized_var(status);
143
144 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
145 0, &status) != SIGP_CC_STATUS_STORED)
146 return 0;
147 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
148}
149
150static inline int pcpu_running(struct pcpu *pcpu)
151{
152 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
153 0, NULL) != SIGP_CC_STATUS_STORED)
154 return 1;
155 /* Status stored condition code is equivalent to cpu not running. */
156 return 0;
157}
158
159/*
160 * Find struct pcpu by cpu address.
161 */
162static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
163{
164 int cpu;
165
166 for_each_cpu(cpu, mask)
167 if (pcpu_devices[cpu].address == address)
168 return pcpu_devices + cpu;
169 return NULL;
170}
171
172static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
173{
174 int order;
175
176 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
177 return;
178 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
179 pcpu->ec_clk = get_tod_clock_fast();
180 pcpu_sigp_retry(pcpu, order, 0);
181}
182
183#define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
184#define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
185
186static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
187{
188 unsigned long async_stack, panic_stack;
189 struct lowcore *lc;
190
191 if (pcpu != &pcpu_devices[0]) {
192 pcpu->lowcore = (struct lowcore *)
193 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
194 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
195 panic_stack = __get_free_page(GFP_KERNEL);
196 if (!pcpu->lowcore || !panic_stack || !async_stack)
197 goto out;
198 } else {
199 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
200 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
201 }
202 lc = pcpu->lowcore;
203 memcpy(lc, &S390_lowcore, 512);
204 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
205 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
206 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
207 lc->cpu_nr = cpu;
208 lc->spinlock_lockval = arch_spin_lockval(cpu);
209 if (MACHINE_HAS_VX)
210 lc->vector_save_area_addr =
211 (unsigned long) &lc->vector_save_area;
212 if (vdso_alloc_per_cpu(lc))
213 goto out;
214 lowcore_ptr[cpu] = lc;
215 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
216 return 0;
217out:
218 if (pcpu != &pcpu_devices[0]) {
219 free_page(panic_stack);
220 free_pages(async_stack, ASYNC_ORDER);
221 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
222 }
223 return -ENOMEM;
224}
225
226#ifdef CONFIG_HOTPLUG_CPU
227
228static void pcpu_free_lowcore(struct pcpu *pcpu)
229{
230 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
231 lowcore_ptr[pcpu - pcpu_devices] = NULL;
232 vdso_free_per_cpu(pcpu->lowcore);
233 if (pcpu == &pcpu_devices[0])
234 return;
235 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
236 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
237 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
238}
239
240#endif /* CONFIG_HOTPLUG_CPU */
241
242static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
243{
244 struct lowcore *lc = pcpu->lowcore;
245
246 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
247 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
248 lc->cpu_nr = cpu;
249 lc->spinlock_lockval = arch_spin_lockval(cpu);
250 lc->percpu_offset = __per_cpu_offset[cpu];
251 lc->kernel_asce = S390_lowcore.kernel_asce;
252 lc->machine_flags = S390_lowcore.machine_flags;
253 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
254 __ctl_store(lc->cregs_save_area, 0, 15);
255 save_access_regs((unsigned int *) lc->access_regs_save_area);
256 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
257 MAX_FACILITY_BIT/8);
258}
259
260static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
261{
262 struct lowcore *lc = pcpu->lowcore;
263
264 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
265 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
266 lc->current_task = (unsigned long) tsk;
267 lc->lpp = LPP_MAGIC;
268 lc->current_pid = tsk->pid;
269 lc->user_timer = tsk->thread.user_timer;
270 lc->system_timer = tsk->thread.system_timer;
271 lc->steal_timer = 0;
272}
273
274static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
275{
276 struct lowcore *lc = pcpu->lowcore;
277
278 lc->restart_stack = lc->kernel_stack;
279 lc->restart_fn = (unsigned long) func;
280 lc->restart_data = (unsigned long) data;
281 lc->restart_source = -1UL;
282 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
283}
284
285/*
286 * Call function via PSW restart on pcpu and stop the current cpu.
287 */
288static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
289 void *data, unsigned long stack)
290{
291 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
292 unsigned long source_cpu = stap();
293
294 __load_psw_mask(PSW_KERNEL_BITS);
295 if (pcpu->address == source_cpu)
296 func(data); /* should not return */
297 /* Stop target cpu (if func returns this stops the current cpu). */
298 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
299 /* Restart func on the target cpu and stop the current cpu. */
300 mem_assign_absolute(lc->restart_stack, stack);
301 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
302 mem_assign_absolute(lc->restart_data, (unsigned long) data);
303 mem_assign_absolute(lc->restart_source, source_cpu);
304 asm volatile(
305 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
306 " brc 2,0b # busy, try again\n"
307 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
308 " brc 2,1b # busy, try again\n"
309 : : "d" (pcpu->address), "d" (source_cpu),
310 "K" (SIGP_RESTART), "K" (SIGP_STOP)
311 : "0", "1", "cc");
312 for (;;) ;
313}
314
315/*
316 * Enable additional logical cpus for multi-threading.
317 */
318static int pcpu_set_smt(unsigned int mtid)
319{
320 int cc;
321
322 if (smp_cpu_mtid == mtid)
323 return 0;
324 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
325 if (cc == 0) {
326 smp_cpu_mtid = mtid;
327 smp_cpu_mt_shift = 0;
328 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
329 smp_cpu_mt_shift++;
330 pcpu_devices[0].address = stap();
331 }
332 return cc;
333}
334
335/*
336 * Call function on an online CPU.
337 */
338void smp_call_online_cpu(void (*func)(void *), void *data)
339{
340 struct pcpu *pcpu;
341
342 /* Use the current cpu if it is online. */
343 pcpu = pcpu_find_address(cpu_online_mask, stap());
344 if (!pcpu)
345 /* Use the first online cpu. */
346 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
347 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
348}
349
350/*
351 * Call function on the ipl CPU.
352 */
353void smp_call_ipl_cpu(void (*func)(void *), void *data)
354{
355 pcpu_delegate(&pcpu_devices[0], func, data,
356 pcpu_devices->lowcore->panic_stack -
357 PANIC_FRAME_OFFSET + PAGE_SIZE);
358}
359
360int smp_find_processor_id(u16 address)
361{
362 int cpu;
363
364 for_each_present_cpu(cpu)
365 if (pcpu_devices[cpu].address == address)
366 return cpu;
367 return -1;
368}
369
370bool arch_vcpu_is_preempted(int cpu)
371{
372 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
373 return false;
374 if (pcpu_running(pcpu_devices + cpu))
375 return false;
376 return true;
377}
378EXPORT_SYMBOL(arch_vcpu_is_preempted);
379
380void smp_yield_cpu(int cpu)
381{
382 if (MACHINE_HAS_DIAG9C) {
383 diag_stat_inc_norecursion(DIAG_STAT_X09C);
384 asm volatile("diag %0,0,0x9c"
385 : : "d" (pcpu_devices[cpu].address));
386 } else if (MACHINE_HAS_DIAG44) {
387 diag_stat_inc_norecursion(DIAG_STAT_X044);
388 asm volatile("diag 0,0,0x44");
389 }
390}
391
392/*
393 * Send cpus emergency shutdown signal. This gives the cpus the
394 * opportunity to complete outstanding interrupts.
395 */
396static void smp_emergency_stop(cpumask_t *cpumask)
397{
398 u64 end;
399 int cpu;
400
401 end = get_tod_clock() + (1000000UL << 12);
402 for_each_cpu(cpu, cpumask) {
403 struct pcpu *pcpu = pcpu_devices + cpu;
404 set_bit(ec_stop_cpu, &pcpu->ec_mask);
405 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
406 0, NULL) == SIGP_CC_BUSY &&
407 get_tod_clock() < end)
408 cpu_relax();
409 }
410 while (get_tod_clock() < end) {
411 for_each_cpu(cpu, cpumask)
412 if (pcpu_stopped(pcpu_devices + cpu))
413 cpumask_clear_cpu(cpu, cpumask);
414 if (cpumask_empty(cpumask))
415 break;
416 cpu_relax();
417 }
418}
419
420/*
421 * Stop all cpus but the current one.
422 */
423void smp_send_stop(void)
424{
425 cpumask_t cpumask;
426 int cpu;
427
428 /* Disable all interrupts/machine checks */
429 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
430 trace_hardirqs_off();
431
432 debug_set_critical();
433 cpumask_copy(&cpumask, cpu_online_mask);
434 cpumask_clear_cpu(smp_processor_id(), &cpumask);
435
436 if (oops_in_progress)
437 smp_emergency_stop(&cpumask);
438
439 /* stop all processors */
440 for_each_cpu(cpu, &cpumask) {
441 struct pcpu *pcpu = pcpu_devices + cpu;
442 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
443 while (!pcpu_stopped(pcpu))
444 cpu_relax();
445 }
446}
447
448/*
449 * This is the main routine where commands issued by other
450 * cpus are handled.
451 */
452static void smp_handle_ext_call(void)
453{
454 unsigned long bits;
455
456 /* handle bit signal external calls */
457 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
458 if (test_bit(ec_stop_cpu, &bits))
459 smp_stop_cpu();
460 if (test_bit(ec_schedule, &bits))
461 scheduler_ipi();
462 if (test_bit(ec_call_function_single, &bits))
463 generic_smp_call_function_single_interrupt();
464}
465
466static void do_ext_call_interrupt(struct ext_code ext_code,
467 unsigned int param32, unsigned long param64)
468{
469 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
470 smp_handle_ext_call();
471}
472
473void arch_send_call_function_ipi_mask(const struct cpumask *mask)
474{
475 int cpu;
476
477 for_each_cpu(cpu, mask)
478 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
479}
480
481void arch_send_call_function_single_ipi(int cpu)
482{
483 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
484}
485
486/*
487 * this function sends a 'reschedule' IPI to another CPU.
488 * it goes straight through and wastes no time serializing
489 * anything. Worst case is that we lose a reschedule ...
490 */
491void smp_send_reschedule(int cpu)
492{
493 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
494}
495
496/*
497 * parameter area for the set/clear control bit callbacks
498 */
499struct ec_creg_mask_parms {
500 unsigned long orval;
501 unsigned long andval;
502 int cr;
503};
504
505/*
506 * callback for setting/clearing control bits
507 */
508static void smp_ctl_bit_callback(void *info)
509{
510 struct ec_creg_mask_parms *pp = info;
511 unsigned long cregs[16];
512
513 __ctl_store(cregs, 0, 15);
514 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
515 __ctl_load(cregs, 0, 15);
516}
517
518/*
519 * Set a bit in a control register of all cpus
520 */
521void smp_ctl_set_bit(int cr, int bit)
522{
523 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
524
525 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
526}
527EXPORT_SYMBOL(smp_ctl_set_bit);
528
529/*
530 * Clear a bit in a control register of all cpus
531 */
532void smp_ctl_clear_bit(int cr, int bit)
533{
534 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
535
536 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
537}
538EXPORT_SYMBOL(smp_ctl_clear_bit);
539
540#ifdef CONFIG_CRASH_DUMP
541
542int smp_store_status(int cpu)
543{
544 struct pcpu *pcpu = pcpu_devices + cpu;
545 unsigned long pa;
546
547 pa = __pa(&pcpu->lowcore->floating_pt_save_area);
548 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
549 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
550 return -EIO;
551 if (!MACHINE_HAS_VX)
552 return 0;
553 pa = __pa(pcpu->lowcore->vector_save_area_addr);
554 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
555 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
556 return -EIO;
557 return 0;
558}
559
560/*
561 * Collect CPU state of the previous, crashed system.
562 * There are four cases:
563 * 1) standard zfcp dump
564 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
565 * The state for all CPUs except the boot CPU needs to be collected
566 * with sigp stop-and-store-status. The boot CPU state is located in
567 * the absolute lowcore of the memory stored in the HSA. The zcore code
568 * will copy the boot CPU state from the HSA.
569 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
570 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
571 * The state for all CPUs except the boot CPU needs to be collected
572 * with sigp stop-and-store-status. The firmware or the boot-loader
573 * stored the registers of the boot CPU in the absolute lowcore in the
574 * memory of the old system.
575 * 3) kdump and the old kernel did not store the CPU state,
576 * or stand-alone kdump for DASD
577 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
578 * The state for all CPUs except the boot CPU needs to be collected
579 * with sigp stop-and-store-status. The kexec code or the boot-loader
580 * stored the registers of the boot CPU in the memory of the old system.
581 * 4) kdump and the old kernel stored the CPU state
582 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
583 * This case does not exist for s390 anymore, setup_arch explicitly
584 * deactivates the elfcorehdr= kernel parameter
585 */
586static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
587 bool is_boot_cpu, unsigned long page)
588{
589 __vector128 *vxrs = (__vector128 *) page;
590
591 if (is_boot_cpu)
592 vxrs = boot_cpu_vector_save_area;
593 else
594 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
595 save_area_add_vxrs(sa, vxrs);
596}
597
598static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
599 bool is_boot_cpu, unsigned long page)
600{
601 void *regs = (void *) page;
602
603 if (is_boot_cpu)
604 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
605 else
606 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
607 save_area_add_regs(sa, regs);
608}
609
610void __init smp_save_dump_cpus(void)
611{
612 int addr, boot_cpu_addr, max_cpu_addr;
613 struct save_area *sa;
614 unsigned long page;
615 bool is_boot_cpu;
616
617 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
618 /* No previous system present, normal boot. */
619 return;
620 /* Allocate a page as dumping area for the store status sigps */
621 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
622 /* Set multi-threading state to the previous system. */
623 pcpu_set_smt(sclp.mtid_prev);
624 boot_cpu_addr = stap();
625 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
626 for (addr = 0; addr <= max_cpu_addr; addr++) {
627 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
628 SIGP_CC_NOT_OPERATIONAL)
629 continue;
630 is_boot_cpu = (addr == boot_cpu_addr);
631 /* Allocate save area */
632 sa = save_area_alloc(is_boot_cpu);
633 if (!sa)
634 panic("could not allocate memory for save area\n");
635 if (MACHINE_HAS_VX)
636 /* Get the vector registers */
637 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
638 /*
639 * For a zfcp dump OLDMEM_BASE == NULL and the registers
640 * of the boot CPU are stored in the HSA. To retrieve
641 * these registers an SCLP request is required which is
642 * done by drivers/s390/char/zcore.c:init_cpu_info()
643 */
644 if (!is_boot_cpu || OLDMEM_BASE)
645 /* Get the CPU registers */
646 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
647 }
648 memblock_free(page, PAGE_SIZE);
649 diag308_reset();
650 pcpu_set_smt(0);
651}
652#endif /* CONFIG_CRASH_DUMP */
653
654void smp_cpu_set_polarization(int cpu, int val)
655{
656 pcpu_devices[cpu].polarization = val;
657}
658
659int smp_cpu_get_polarization(int cpu)
660{
661 return pcpu_devices[cpu].polarization;
662}
663
664static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
665{
666 static int use_sigp_detection;
667 int address;
668
669 if (use_sigp_detection || sclp_get_core_info(info, early)) {
670 use_sigp_detection = 1;
671 for (address = 0;
672 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
673 address += (1U << smp_cpu_mt_shift)) {
674 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
675 SIGP_CC_NOT_OPERATIONAL)
676 continue;
677 info->core[info->configured].core_id =
678 address >> smp_cpu_mt_shift;
679 info->configured++;
680 }
681 info->combined = info->configured;
682 }
683}
684
685static int smp_add_present_cpu(int cpu);
686
687static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
688{
689 struct pcpu *pcpu;
690 cpumask_t avail;
691 int cpu, nr, i, j;
692 u16 address;
693
694 nr = 0;
695 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
696 cpu = cpumask_first(&avail);
697 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
698 if (sclp.has_core_type && info->core[i].type != boot_core_type)
699 continue;
700 address = info->core[i].core_id << smp_cpu_mt_shift;
701 for (j = 0; j <= smp_cpu_mtid; j++) {
702 if (pcpu_find_address(cpu_present_mask, address + j))
703 continue;
704 pcpu = pcpu_devices + cpu;
705 pcpu->address = address + j;
706 pcpu->state =
707 (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
708 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
709 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
710 set_cpu_present(cpu, true);
711 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
712 set_cpu_present(cpu, false);
713 else
714 nr++;
715 cpu = cpumask_next(cpu, &avail);
716 if (cpu >= nr_cpu_ids)
717 break;
718 }
719 }
720 return nr;
721}
722
723void __init smp_detect_cpus(void)
724{
725 unsigned int cpu, mtid, c_cpus, s_cpus;
726 struct sclp_core_info *info;
727 u16 address;
728
729 /* Get CPU information */
730 info = memblock_virt_alloc(sizeof(*info), 8);
731 smp_get_core_info(info, 1);
732 /* Find boot CPU type */
733 if (sclp.has_core_type) {
734 address = stap();
735 for (cpu = 0; cpu < info->combined; cpu++)
736 if (info->core[cpu].core_id == address) {
737 /* The boot cpu dictates the cpu type. */
738 boot_core_type = info->core[cpu].type;
739 break;
740 }
741 if (cpu >= info->combined)
742 panic("Could not find boot CPU type");
743 }
744
745 /* Set multi-threading state for the current system */
746 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
747 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
748 pcpu_set_smt(mtid);
749
750 /* Print number of CPUs */
751 c_cpus = s_cpus = 0;
752 for (cpu = 0; cpu < info->combined; cpu++) {
753 if (sclp.has_core_type &&
754 info->core[cpu].type != boot_core_type)
755 continue;
756 if (cpu < info->configured)
757 c_cpus += smp_cpu_mtid + 1;
758 else
759 s_cpus += smp_cpu_mtid + 1;
760 }
761 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
762
763 /* Add CPUs present at boot */
764 get_online_cpus();
765 __smp_rescan_cpus(info, 0);
766 put_online_cpus();
767 memblock_free_early((unsigned long)info, sizeof(*info));
768}
769
770/*
771 * Activate a secondary processor.
772 */
773static void smp_start_secondary(void *cpuvoid)
774{
775 S390_lowcore.last_update_clock = get_tod_clock();
776 S390_lowcore.restart_stack = (unsigned long) restart_stack;
777 S390_lowcore.restart_fn = (unsigned long) do_restart;
778 S390_lowcore.restart_data = 0;
779 S390_lowcore.restart_source = -1UL;
780 restore_access_regs(S390_lowcore.access_regs_save_area);
781 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
782 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
783 cpu_init();
784 preempt_disable();
785 init_cpu_timer();
786 vtime_init();
787 pfault_init();
788 notify_cpu_starting(smp_processor_id());
789 set_cpu_online(smp_processor_id(), true);
790 inc_irq_stat(CPU_RST);
791 local_irq_enable();
792 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
793}
794
795/* Upping and downing of CPUs */
796int __cpu_up(unsigned int cpu, struct task_struct *tidle)
797{
798 struct pcpu *pcpu;
799 int base, i, rc;
800
801 pcpu = pcpu_devices + cpu;
802 if (pcpu->state != CPU_STATE_CONFIGURED)
803 return -EIO;
804 base = smp_get_base_cpu(cpu);
805 for (i = 0; i <= smp_cpu_mtid; i++) {
806 if (base + i < nr_cpu_ids)
807 if (cpu_online(base + i))
808 break;
809 }
810 /*
811 * If this is the first CPU of the core to get online
812 * do an initial CPU reset.
813 */
814 if (i > smp_cpu_mtid &&
815 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
816 SIGP_CC_ORDER_CODE_ACCEPTED)
817 return -EIO;
818
819 rc = pcpu_alloc_lowcore(pcpu, cpu);
820 if (rc)
821 return rc;
822 pcpu_prepare_secondary(pcpu, cpu);
823 pcpu_attach_task(pcpu, tidle);
824 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
825 /* Wait until cpu puts itself in the online & active maps */
826 while (!cpu_online(cpu))
827 cpu_relax();
828 return 0;
829}
830
831static unsigned int setup_possible_cpus __initdata;
832
833static int __init _setup_possible_cpus(char *s)
834{
835 get_option(&s, &setup_possible_cpus);
836 return 0;
837}
838early_param("possible_cpus", _setup_possible_cpus);
839
840#ifdef CONFIG_HOTPLUG_CPU
841
842int __cpu_disable(void)
843{
844 unsigned long cregs[16];
845
846 /* Handle possible pending IPIs */
847 smp_handle_ext_call();
848 set_cpu_online(smp_processor_id(), false);
849 /* Disable pseudo page faults on this cpu. */
850 pfault_fini();
851 /* Disable interrupt sources via control register. */
852 __ctl_store(cregs, 0, 15);
853 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
854 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
855 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
856 __ctl_load(cregs, 0, 15);
857 clear_cpu_flag(CIF_NOHZ_DELAY);
858 return 0;
859}
860
861void __cpu_die(unsigned int cpu)
862{
863 struct pcpu *pcpu;
864
865 /* Wait until target cpu is down */
866 pcpu = pcpu_devices + cpu;
867 while (!pcpu_stopped(pcpu))
868 cpu_relax();
869 pcpu_free_lowcore(pcpu);
870 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
871 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
872}
873
874void __noreturn cpu_die(void)
875{
876 idle_task_exit();
877 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
878 for (;;) ;
879}
880
881#endif /* CONFIG_HOTPLUG_CPU */
882
883void __init smp_fill_possible_mask(void)
884{
885 unsigned int possible, sclp_max, cpu;
886
887 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
888 sclp_max = min(smp_max_threads, sclp_max);
889 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
890 possible = setup_possible_cpus ?: nr_cpu_ids;
891 possible = min(possible, sclp_max);
892 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
893 set_cpu_possible(cpu, true);
894}
895
896void __init smp_prepare_cpus(unsigned int max_cpus)
897{
898 /* request the 0x1201 emergency signal external interrupt */
899 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
900 panic("Couldn't request external interrupt 0x1201");
901 /* request the 0x1202 external call external interrupt */
902 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
903 panic("Couldn't request external interrupt 0x1202");
904}
905
906void __init smp_prepare_boot_cpu(void)
907{
908 struct pcpu *pcpu = pcpu_devices;
909
910 pcpu->state = CPU_STATE_CONFIGURED;
911 pcpu->address = stap();
912 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
913 S390_lowcore.percpu_offset = __per_cpu_offset[0];
914 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
915 set_cpu_present(0, true);
916 set_cpu_online(0, true);
917}
918
919void __init smp_cpus_done(unsigned int max_cpus)
920{
921}
922
923void __init smp_setup_processor_id(void)
924{
925 S390_lowcore.cpu_nr = 0;
926 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
927}
928
929/*
930 * the frequency of the profiling timer can be changed
931 * by writing a multiplier value into /proc/profile.
932 *
933 * usually you want to run this on all CPUs ;)
934 */
935int setup_profiling_timer(unsigned int multiplier)
936{
937 return 0;
938}
939
940#ifdef CONFIG_HOTPLUG_CPU
941static ssize_t cpu_configure_show(struct device *dev,
942 struct device_attribute *attr, char *buf)
943{
944 ssize_t count;
945
946 mutex_lock(&smp_cpu_state_mutex);
947 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
948 mutex_unlock(&smp_cpu_state_mutex);
949 return count;
950}
951
952static ssize_t cpu_configure_store(struct device *dev,
953 struct device_attribute *attr,
954 const char *buf, size_t count)
955{
956 struct pcpu *pcpu;
957 int cpu, val, rc, i;
958 char delim;
959
960 if (sscanf(buf, "%d %c", &val, &delim) != 1)
961 return -EINVAL;
962 if (val != 0 && val != 1)
963 return -EINVAL;
964 get_online_cpus();
965 mutex_lock(&smp_cpu_state_mutex);
966 rc = -EBUSY;
967 /* disallow configuration changes of online cpus and cpu 0 */
968 cpu = dev->id;
969 cpu = smp_get_base_cpu(cpu);
970 if (cpu == 0)
971 goto out;
972 for (i = 0; i <= smp_cpu_mtid; i++)
973 if (cpu_online(cpu + i))
974 goto out;
975 pcpu = pcpu_devices + cpu;
976 rc = 0;
977 switch (val) {
978 case 0:
979 if (pcpu->state != CPU_STATE_CONFIGURED)
980 break;
981 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
982 if (rc)
983 break;
984 for (i = 0; i <= smp_cpu_mtid; i++) {
985 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
986 continue;
987 pcpu[i].state = CPU_STATE_STANDBY;
988 smp_cpu_set_polarization(cpu + i,
989 POLARIZATION_UNKNOWN);
990 }
991 topology_expect_change();
992 break;
993 case 1:
994 if (pcpu->state != CPU_STATE_STANDBY)
995 break;
996 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
997 if (rc)
998 break;
999 for (i = 0; i <= smp_cpu_mtid; i++) {
1000 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1001 continue;
1002 pcpu[i].state = CPU_STATE_CONFIGURED;
1003 smp_cpu_set_polarization(cpu + i,
1004 POLARIZATION_UNKNOWN);
1005 }
1006 topology_expect_change();
1007 break;
1008 default:
1009 break;
1010 }
1011out:
1012 mutex_unlock(&smp_cpu_state_mutex);
1013 put_online_cpus();
1014 return rc ? rc : count;
1015}
1016static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1017#endif /* CONFIG_HOTPLUG_CPU */
1018
1019static ssize_t show_cpu_address(struct device *dev,
1020 struct device_attribute *attr, char *buf)
1021{
1022 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1023}
1024static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1025
1026static struct attribute *cpu_common_attrs[] = {
1027#ifdef CONFIG_HOTPLUG_CPU
1028 &dev_attr_configure.attr,
1029#endif
1030 &dev_attr_address.attr,
1031 NULL,
1032};
1033
1034static struct attribute_group cpu_common_attr_group = {
1035 .attrs = cpu_common_attrs,
1036};
1037
1038static struct attribute *cpu_online_attrs[] = {
1039 &dev_attr_idle_count.attr,
1040 &dev_attr_idle_time_us.attr,
1041 NULL,
1042};
1043
1044static struct attribute_group cpu_online_attr_group = {
1045 .attrs = cpu_online_attrs,
1046};
1047
1048static int smp_cpu_online(unsigned int cpu)
1049{
1050 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1051
1052 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1053}
1054static int smp_cpu_pre_down(unsigned int cpu)
1055{
1056 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1057
1058 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1059 return 0;
1060}
1061
1062static int smp_add_present_cpu(int cpu)
1063{
1064 struct device *s;
1065 struct cpu *c;
1066 int rc;
1067
1068 c = kzalloc(sizeof(*c), GFP_KERNEL);
1069 if (!c)
1070 return -ENOMEM;
1071 per_cpu(cpu_device, cpu) = c;
1072 s = &c->dev;
1073 c->hotpluggable = 1;
1074 rc = register_cpu(c, cpu);
1075 if (rc)
1076 goto out;
1077 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1078 if (rc)
1079 goto out_cpu;
1080 rc = topology_cpu_init(c);
1081 if (rc)
1082 goto out_topology;
1083 return 0;
1084
1085out_topology:
1086 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1087out_cpu:
1088#ifdef CONFIG_HOTPLUG_CPU
1089 unregister_cpu(c);
1090#endif
1091out:
1092 return rc;
1093}
1094
1095#ifdef CONFIG_HOTPLUG_CPU
1096
1097int __ref smp_rescan_cpus(void)
1098{
1099 struct sclp_core_info *info;
1100 int nr;
1101
1102 info = kzalloc(sizeof(*info), GFP_KERNEL);
1103 if (!info)
1104 return -ENOMEM;
1105 smp_get_core_info(info, 0);
1106 get_online_cpus();
1107 mutex_lock(&smp_cpu_state_mutex);
1108 nr = __smp_rescan_cpus(info, 1);
1109 mutex_unlock(&smp_cpu_state_mutex);
1110 put_online_cpus();
1111 kfree(info);
1112 if (nr)
1113 topology_schedule_update();
1114 return 0;
1115}
1116
1117static ssize_t __ref rescan_store(struct device *dev,
1118 struct device_attribute *attr,
1119 const char *buf,
1120 size_t count)
1121{
1122 int rc;
1123
1124 rc = smp_rescan_cpus();
1125 return rc ? rc : count;
1126}
1127static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
1128#endif /* CONFIG_HOTPLUG_CPU */
1129
1130static int __init s390_smp_init(void)
1131{
1132 int cpu, rc = 0;
1133
1134#ifdef CONFIG_HOTPLUG_CPU
1135 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1136 if (rc)
1137 return rc;
1138#endif
1139 for_each_present_cpu(cpu) {
1140 rc = smp_add_present_cpu(cpu);
1141 if (rc)
1142 goto out;
1143 }
1144
1145 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1146 smp_cpu_online, smp_cpu_pre_down);
1147out:
1148 return rc;
1149}
1150subsys_initcall(s390_smp_init);