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1/* SPDX-License-Identifier: GPL-2.0-only */
2/****************************************************************************
3 * Driver for Solarflare network controllers and boards
4 * Copyright 2005-2006 Fen Systems Ltd.
5 * Copyright 2006-2013 Solarflare Communications Inc.
6 */
7
8#ifndef EFX_NIC_H
9#define EFX_NIC_H
10
11#include "nic_common.h"
12#include "efx.h"
13
14enum {
15 PHY_TYPE_NONE = 0,
16 PHY_TYPE_TXC43128 = 1,
17 PHY_TYPE_88E1111 = 2,
18 PHY_TYPE_SFX7101 = 3,
19 PHY_TYPE_QT2022C2 = 4,
20 PHY_TYPE_PM8358 = 6,
21 PHY_TYPE_SFT9001A = 8,
22 PHY_TYPE_QT2025C = 9,
23 PHY_TYPE_SFT9001B = 10,
24};
25
26enum {
27 EF10_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
28 EF10_STAT_port_tx_packets,
29 EF10_STAT_port_tx_pause,
30 EF10_STAT_port_tx_control,
31 EF10_STAT_port_tx_unicast,
32 EF10_STAT_port_tx_multicast,
33 EF10_STAT_port_tx_broadcast,
34 EF10_STAT_port_tx_lt64,
35 EF10_STAT_port_tx_64,
36 EF10_STAT_port_tx_65_to_127,
37 EF10_STAT_port_tx_128_to_255,
38 EF10_STAT_port_tx_256_to_511,
39 EF10_STAT_port_tx_512_to_1023,
40 EF10_STAT_port_tx_1024_to_15xx,
41 EF10_STAT_port_tx_15xx_to_jumbo,
42 EF10_STAT_port_rx_bytes,
43 EF10_STAT_port_rx_bytes_minus_good_bytes,
44 EF10_STAT_port_rx_good_bytes,
45 EF10_STAT_port_rx_bad_bytes,
46 EF10_STAT_port_rx_packets,
47 EF10_STAT_port_rx_good,
48 EF10_STAT_port_rx_bad,
49 EF10_STAT_port_rx_pause,
50 EF10_STAT_port_rx_control,
51 EF10_STAT_port_rx_unicast,
52 EF10_STAT_port_rx_multicast,
53 EF10_STAT_port_rx_broadcast,
54 EF10_STAT_port_rx_lt64,
55 EF10_STAT_port_rx_64,
56 EF10_STAT_port_rx_65_to_127,
57 EF10_STAT_port_rx_128_to_255,
58 EF10_STAT_port_rx_256_to_511,
59 EF10_STAT_port_rx_512_to_1023,
60 EF10_STAT_port_rx_1024_to_15xx,
61 EF10_STAT_port_rx_15xx_to_jumbo,
62 EF10_STAT_port_rx_gtjumbo,
63 EF10_STAT_port_rx_bad_gtjumbo,
64 EF10_STAT_port_rx_overflow,
65 EF10_STAT_port_rx_align_error,
66 EF10_STAT_port_rx_length_error,
67 EF10_STAT_port_rx_nodesc_drops,
68 EF10_STAT_port_rx_pm_trunc_bb_overflow,
69 EF10_STAT_port_rx_pm_discard_bb_overflow,
70 EF10_STAT_port_rx_pm_trunc_vfifo_full,
71 EF10_STAT_port_rx_pm_discard_vfifo_full,
72 EF10_STAT_port_rx_pm_trunc_qbb,
73 EF10_STAT_port_rx_pm_discard_qbb,
74 EF10_STAT_port_rx_pm_discard_mapping,
75 EF10_STAT_port_rx_dp_q_disabled_packets,
76 EF10_STAT_port_rx_dp_di_dropped_packets,
77 EF10_STAT_port_rx_dp_streaming_packets,
78 EF10_STAT_port_rx_dp_hlb_fetch,
79 EF10_STAT_port_rx_dp_hlb_wait,
80 EF10_STAT_rx_unicast,
81 EF10_STAT_rx_unicast_bytes,
82 EF10_STAT_rx_multicast,
83 EF10_STAT_rx_multicast_bytes,
84 EF10_STAT_rx_broadcast,
85 EF10_STAT_rx_broadcast_bytes,
86 EF10_STAT_rx_bad,
87 EF10_STAT_rx_bad_bytes,
88 EF10_STAT_rx_overflow,
89 EF10_STAT_tx_unicast,
90 EF10_STAT_tx_unicast_bytes,
91 EF10_STAT_tx_multicast,
92 EF10_STAT_tx_multicast_bytes,
93 EF10_STAT_tx_broadcast,
94 EF10_STAT_tx_broadcast_bytes,
95 EF10_STAT_tx_bad,
96 EF10_STAT_tx_bad_bytes,
97 EF10_STAT_tx_overflow,
98 EF10_STAT_V1_COUNT,
99 EF10_STAT_fec_uncorrected_errors = EF10_STAT_V1_COUNT,
100 EF10_STAT_fec_corrected_errors,
101 EF10_STAT_fec_corrected_symbols_lane0,
102 EF10_STAT_fec_corrected_symbols_lane1,
103 EF10_STAT_fec_corrected_symbols_lane2,
104 EF10_STAT_fec_corrected_symbols_lane3,
105 EF10_STAT_ctpio_vi_busy_fallback,
106 EF10_STAT_ctpio_long_write_success,
107 EF10_STAT_ctpio_missing_dbell_fail,
108 EF10_STAT_ctpio_overflow_fail,
109 EF10_STAT_ctpio_underflow_fail,
110 EF10_STAT_ctpio_timeout_fail,
111 EF10_STAT_ctpio_noncontig_wr_fail,
112 EF10_STAT_ctpio_frm_clobber_fail,
113 EF10_STAT_ctpio_invalid_wr_fail,
114 EF10_STAT_ctpio_vi_clobber_fallback,
115 EF10_STAT_ctpio_unqualified_fallback,
116 EF10_STAT_ctpio_runt_fallback,
117 EF10_STAT_ctpio_success,
118 EF10_STAT_ctpio_fallback,
119 EF10_STAT_ctpio_poison,
120 EF10_STAT_ctpio_erase,
121 EF10_STAT_COUNT
122};
123
124/* Maximum number of TX PIO buffers we may allocate to a function.
125 * This matches the total number of buffers on each SFC9100-family
126 * controller.
127 */
128#define EF10_TX_PIOBUF_COUNT 16
129
130/**
131 * struct efx_ef10_nic_data - EF10 architecture NIC state
132 * @mcdi_buf: DMA buffer for MCDI
133 * @warm_boot_count: Last seen MC warm boot count
134 * @vi_base: Absolute index of first VI in this function
135 * @n_allocated_vis: Number of VIs allocated to this function
136 * @n_piobufs: Number of PIO buffers allocated to this function
137 * @wc_membase: Base address of write-combining mapping of the memory BAR
138 * @pio_write_base: Base address for writing PIO buffers
139 * @pio_write_vi_base: Relative VI number for @pio_write_base
140 * @piobuf_handle: Handle of each PIO buffer allocated
141 * @piobuf_size: size of a single PIO buffer
142 * @must_restore_piobufs: Flag: PIO buffers have yet to be restored after MC
143 * reboot
144 * @mc_stats: Scratch buffer for converting statistics to the kernel's format
145 * @stats: Hardware statistics
146 * @workaround_35388: Flag: firmware supports workaround for bug 35388
147 * @workaround_26807: Flag: firmware supports workaround for bug 26807
148 * @workaround_61265: Flag: firmware supports workaround for bug 61265
149 * @must_check_datapath_caps: Flag: @datapath_caps needs to be revalidated
150 * after MC reboot
151 * @datapath_caps: Capabilities of datapath firmware (FLAGS1 field of
152 * %MC_CMD_GET_CAPABILITIES response)
153 * @datapath_caps2: Further Capabilities of datapath firmware (FLAGS2 field of
154 * %MC_CMD_GET_CAPABILITIES response)
155 * @rx_dpcpu_fw_id: Firmware ID of the RxDPCPU
156 * @tx_dpcpu_fw_id: Firmware ID of the TxDPCPU
157 * @must_probe_vswitching: Flag: vswitching has yet to be setup after MC reboot
158 * @pf_index: The number for this PF, or the parent PF if this is a VF
159#ifdef CONFIG_SFC_SRIOV
160 * @vf: Pointer to VF data structure
161#endif
162 * @vport_mac: The MAC address on the vport, only for PFs; VFs will be zero
163 * @vlan_list: List of VLANs added over the interface. Serialised by vlan_lock.
164 * @vlan_lock: Lock to serialize access to vlan_list.
165 * @udp_tunnels: UDP tunnel port numbers and types.
166 * @udp_tunnels_dirty: flag indicating a reboot occurred while pushing
167 * @udp_tunnels to hardware and thus the push must be re-done.
168 * @udp_tunnels_lock: Serialises writes to @udp_tunnels and @udp_tunnels_dirty.
169 */
170struct efx_ef10_nic_data {
171 struct efx_buffer mcdi_buf;
172 u16 warm_boot_count;
173 unsigned int vi_base;
174 unsigned int n_allocated_vis;
175 unsigned int n_piobufs;
176 void __iomem *wc_membase, *pio_write_base;
177 unsigned int pio_write_vi_base;
178 unsigned int piobuf_handle[EF10_TX_PIOBUF_COUNT];
179 u16 piobuf_size;
180 bool must_restore_piobufs;
181 __le64 *mc_stats;
182 u64 stats[EF10_STAT_COUNT];
183 bool workaround_35388;
184 bool workaround_26807;
185 bool workaround_61265;
186 bool must_check_datapath_caps;
187 u32 datapath_caps;
188 u32 datapath_caps2;
189 unsigned int rx_dpcpu_fw_id;
190 unsigned int tx_dpcpu_fw_id;
191 bool must_probe_vswitching;
192 unsigned int pf_index;
193 u8 port_id[ETH_ALEN];
194#ifdef CONFIG_SFC_SRIOV
195 unsigned int vf_index;
196 struct ef10_vf *vf;
197#endif
198 u8 vport_mac[ETH_ALEN];
199 struct list_head vlan_list;
200 struct mutex vlan_lock;
201 struct efx_udp_tunnel udp_tunnels[16];
202 bool udp_tunnels_dirty;
203 struct mutex udp_tunnels_lock;
204 u64 licensed_features;
205};
206
207/* TSOv2 */
208int efx_ef10_tx_tso_desc(struct efx_tx_queue *tx_queue, struct sk_buff *skb,
209 bool *data_mapped);
210
211extern const struct efx_nic_type efx_hunt_a0_nic_type;
212extern const struct efx_nic_type efx_hunt_a0_vf_nic_type;
213
214#endif /* EFX_NIC_H */
1/****************************************************************************
2 * Driver for Solarflare Solarstorm network controllers and boards
3 * Copyright 2005-2006 Fen Systems Ltd.
4 * Copyright 2006-2011 Solarflare Communications Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published
8 * by the Free Software Foundation, incorporated herein by reference.
9 */
10
11#ifndef EFX_NIC_H
12#define EFX_NIC_H
13
14#include <linux/i2c-algo-bit.h>
15#include "net_driver.h"
16#include "efx.h"
17#include "mcdi.h"
18#include "spi.h"
19
20/*
21 * Falcon hardware control
22 */
23
24enum {
25 EFX_REV_FALCON_A0 = 0,
26 EFX_REV_FALCON_A1 = 1,
27 EFX_REV_FALCON_B0 = 2,
28 EFX_REV_SIENA_A0 = 3,
29};
30
31static inline int efx_nic_rev(struct efx_nic *efx)
32{
33 return efx->type->revision;
34}
35
36extern u32 efx_nic_fpga_ver(struct efx_nic *efx);
37
38/* NIC has two interlinked PCI functions for the same port. */
39static inline bool efx_nic_is_dual_func(struct efx_nic *efx)
40{
41 return efx_nic_rev(efx) < EFX_REV_FALCON_B0;
42}
43
44enum {
45 PHY_TYPE_NONE = 0,
46 PHY_TYPE_TXC43128 = 1,
47 PHY_TYPE_88E1111 = 2,
48 PHY_TYPE_SFX7101 = 3,
49 PHY_TYPE_QT2022C2 = 4,
50 PHY_TYPE_PM8358 = 6,
51 PHY_TYPE_SFT9001A = 8,
52 PHY_TYPE_QT2025C = 9,
53 PHY_TYPE_SFT9001B = 10,
54};
55
56#define FALCON_XMAC_LOOPBACKS \
57 ((1 << LOOPBACK_XGMII) | \
58 (1 << LOOPBACK_XGXS) | \
59 (1 << LOOPBACK_XAUI))
60
61#define FALCON_GMAC_LOOPBACKS \
62 (1 << LOOPBACK_GMAC)
63
64/* Alignment of PCIe DMA boundaries (4KB) */
65#define EFX_PAGE_SIZE 4096
66/* Size and alignment of buffer table entries (same) */
67#define EFX_BUF_SIZE EFX_PAGE_SIZE
68
69/**
70 * struct falcon_board_type - board operations and type information
71 * @id: Board type id, as found in NVRAM
72 * @init: Allocate resources and initialise peripheral hardware
73 * @init_phy: Do board-specific PHY initialisation
74 * @fini: Shut down hardware and free resources
75 * @set_id_led: Set state of identifying LED or revert to automatic function
76 * @monitor: Board-specific health check function
77 */
78struct falcon_board_type {
79 u8 id;
80 int (*init) (struct efx_nic *nic);
81 void (*init_phy) (struct efx_nic *efx);
82 void (*fini) (struct efx_nic *nic);
83 void (*set_id_led) (struct efx_nic *efx, enum efx_led_mode mode);
84 int (*monitor) (struct efx_nic *nic);
85};
86
87/**
88 * struct falcon_board - board information
89 * @type: Type of board
90 * @major: Major rev. ('A', 'B' ...)
91 * @minor: Minor rev. (0, 1, ...)
92 * @i2c_adap: I2C adapter for on-board peripherals
93 * @i2c_data: Data for bit-banging algorithm
94 * @hwmon_client: I2C client for hardware monitor
95 * @ioexp_client: I2C client for power/port control
96 */
97struct falcon_board {
98 const struct falcon_board_type *type;
99 int major;
100 int minor;
101 struct i2c_adapter i2c_adap;
102 struct i2c_algo_bit_data i2c_data;
103 struct i2c_client *hwmon_client, *ioexp_client;
104};
105
106/**
107 * struct falcon_nic_data - Falcon NIC state
108 * @pci_dev2: Secondary function of Falcon A
109 * @board: Board state and functions
110 * @stats_disable_count: Nest count for disabling statistics fetches
111 * @stats_pending: Is there a pending DMA of MAC statistics.
112 * @stats_timer: A timer for regularly fetching MAC statistics.
113 * @stats_dma_done: Pointer to the flag which indicates DMA completion.
114 * @spi_flash: SPI flash device
115 * @spi_eeprom: SPI EEPROM device
116 * @spi_lock: SPI bus lock
117 * @mdio_lock: MDIO bus lock
118 * @xmac_poll_required: XMAC link state needs polling
119 */
120struct falcon_nic_data {
121 struct pci_dev *pci_dev2;
122 struct falcon_board board;
123 unsigned int stats_disable_count;
124 bool stats_pending;
125 struct timer_list stats_timer;
126 u32 *stats_dma_done;
127 struct efx_spi_device spi_flash;
128 struct efx_spi_device spi_eeprom;
129 struct mutex spi_lock;
130 struct mutex mdio_lock;
131 bool xmac_poll_required;
132};
133
134static inline struct falcon_board *falcon_board(struct efx_nic *efx)
135{
136 struct falcon_nic_data *data = efx->nic_data;
137 return &data->board;
138}
139
140/**
141 * struct siena_nic_data - Siena NIC state
142 * @mcdi: Management-Controller-to-Driver Interface
143 * @wol_filter_id: Wake-on-LAN packet filter id
144 * @hwmon: Hardware monitor state
145 */
146struct siena_nic_data {
147 struct efx_mcdi_iface mcdi;
148 int wol_filter_id;
149#ifdef CONFIG_SFC_MCDI_MON
150 struct efx_mcdi_mon hwmon;
151#endif
152};
153
154#ifdef CONFIG_SFC_MCDI_MON
155static inline struct efx_mcdi_mon *efx_mcdi_mon(struct efx_nic *efx)
156{
157 struct siena_nic_data *nic_data;
158 EFX_BUG_ON_PARANOID(efx_nic_rev(efx) < EFX_REV_SIENA_A0);
159 nic_data = efx->nic_data;
160 return &nic_data->hwmon;
161}
162#endif
163
164/*
165 * On the SFC9000 family each port is associated with 1 PCI physical
166 * function (PF) handled by sfc and a configurable number of virtual
167 * functions (VFs) that may be handled by some other driver, often in
168 * a VM guest. The queue pointer registers are mapped in both PF and
169 * VF BARs such that an 8K region provides access to a single RX, TX
170 * and event queue (collectively a Virtual Interface, VI or VNIC).
171 *
172 * The PF has access to all 1024 VIs while VFs are mapped to VIs
173 * according to VI_BASE and VI_SCALE: VF i has access to VIs numbered
174 * in range [VI_BASE + i << VI_SCALE, VI_BASE + i + 1 << VI_SCALE).
175 * The number of VIs and the VI_SCALE value are configurable but must
176 * be established at boot time by firmware.
177 */
178
179/* Maximum VI_SCALE parameter supported by Siena */
180#define EFX_VI_SCALE_MAX 6
181/* Base VI to use for SR-IOV. Must be aligned to (1 << EFX_VI_SCALE_MAX),
182 * so this is the smallest allowed value. */
183#define EFX_VI_BASE 128U
184/* Maximum number of VFs allowed */
185#define EFX_VF_COUNT_MAX 127
186/* Limit EVQs on VFs to be only 8k to reduce buffer table reservation */
187#define EFX_MAX_VF_EVQ_SIZE 8192UL
188/* The number of buffer table entries reserved for each VI on a VF */
189#define EFX_VF_BUFTBL_PER_VI \
190 ((EFX_MAX_VF_EVQ_SIZE + 2 * EFX_MAX_DMAQ_SIZE) * \
191 sizeof(efx_qword_t) / EFX_BUF_SIZE)
192
193#ifdef CONFIG_SFC_SRIOV
194
195static inline bool efx_sriov_wanted(struct efx_nic *efx)
196{
197 return efx->vf_count != 0;
198}
199static inline bool efx_sriov_enabled(struct efx_nic *efx)
200{
201 return efx->vf_init_count != 0;
202}
203static inline unsigned int efx_vf_size(struct efx_nic *efx)
204{
205 return 1 << efx->vi_scale;
206}
207
208extern int efx_init_sriov(void);
209extern void efx_sriov_probe(struct efx_nic *efx);
210extern int efx_sriov_init(struct efx_nic *efx);
211extern void efx_sriov_mac_address_changed(struct efx_nic *efx);
212extern void efx_sriov_tx_flush_done(struct efx_nic *efx, efx_qword_t *event);
213extern void efx_sriov_rx_flush_done(struct efx_nic *efx, efx_qword_t *event);
214extern void efx_sriov_event(struct efx_channel *channel, efx_qword_t *event);
215extern void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq);
216extern void efx_sriov_flr(struct efx_nic *efx, unsigned flr);
217extern void efx_sriov_reset(struct efx_nic *efx);
218extern void efx_sriov_fini(struct efx_nic *efx);
219extern void efx_fini_sriov(void);
220
221#else
222
223static inline bool efx_sriov_wanted(struct efx_nic *efx) { return false; }
224static inline bool efx_sriov_enabled(struct efx_nic *efx) { return false; }
225static inline unsigned int efx_vf_size(struct efx_nic *efx) { return 0; }
226
227static inline int efx_init_sriov(void) { return 0; }
228static inline void efx_sriov_probe(struct efx_nic *efx) {}
229static inline int efx_sriov_init(struct efx_nic *efx) { return -EOPNOTSUPP; }
230static inline void efx_sriov_mac_address_changed(struct efx_nic *efx) {}
231static inline void efx_sriov_tx_flush_done(struct efx_nic *efx,
232 efx_qword_t *event) {}
233static inline void efx_sriov_rx_flush_done(struct efx_nic *efx,
234 efx_qword_t *event) {}
235static inline void efx_sriov_event(struct efx_channel *channel,
236 efx_qword_t *event) {}
237static inline void efx_sriov_desc_fetch_err(struct efx_nic *efx, unsigned dmaq) {}
238static inline void efx_sriov_flr(struct efx_nic *efx, unsigned flr) {}
239static inline void efx_sriov_reset(struct efx_nic *efx) {}
240static inline void efx_sriov_fini(struct efx_nic *efx) {}
241static inline void efx_fini_sriov(void) {}
242
243#endif
244
245extern int efx_sriov_set_vf_mac(struct net_device *dev, int vf, u8 *mac);
246extern int efx_sriov_set_vf_vlan(struct net_device *dev, int vf,
247 u16 vlan, u8 qos);
248extern int efx_sriov_get_vf_config(struct net_device *dev, int vf,
249 struct ifla_vf_info *ivf);
250extern int efx_sriov_set_vf_spoofchk(struct net_device *net_dev, int vf,
251 bool spoofchk);
252
253extern const struct efx_nic_type falcon_a1_nic_type;
254extern const struct efx_nic_type falcon_b0_nic_type;
255extern const struct efx_nic_type siena_a0_nic_type;
256
257/**************************************************************************
258 *
259 * Externs
260 *
261 **************************************************************************
262 */
263
264extern int falcon_probe_board(struct efx_nic *efx, u16 revision_info);
265
266/* TX data path */
267extern int efx_nic_probe_tx(struct efx_tx_queue *tx_queue);
268extern void efx_nic_init_tx(struct efx_tx_queue *tx_queue);
269extern void efx_nic_fini_tx(struct efx_tx_queue *tx_queue);
270extern void efx_nic_remove_tx(struct efx_tx_queue *tx_queue);
271extern void efx_nic_push_buffers(struct efx_tx_queue *tx_queue);
272
273/* RX data path */
274extern int efx_nic_probe_rx(struct efx_rx_queue *rx_queue);
275extern void efx_nic_init_rx(struct efx_rx_queue *rx_queue);
276extern void efx_nic_fini_rx(struct efx_rx_queue *rx_queue);
277extern void efx_nic_remove_rx(struct efx_rx_queue *rx_queue);
278extern void efx_nic_notify_rx_desc(struct efx_rx_queue *rx_queue);
279extern void efx_nic_generate_fill_event(struct efx_rx_queue *rx_queue);
280
281/* Event data path */
282extern int efx_nic_probe_eventq(struct efx_channel *channel);
283extern void efx_nic_init_eventq(struct efx_channel *channel);
284extern void efx_nic_fini_eventq(struct efx_channel *channel);
285extern void efx_nic_remove_eventq(struct efx_channel *channel);
286extern int efx_nic_process_eventq(struct efx_channel *channel, int rx_quota);
287extern void efx_nic_eventq_read_ack(struct efx_channel *channel);
288extern bool efx_nic_event_present(struct efx_channel *channel);
289
290/* MAC/PHY */
291extern void falcon_drain_tx_fifo(struct efx_nic *efx);
292extern void falcon_reconfigure_mac_wrapper(struct efx_nic *efx);
293extern bool falcon_xmac_check_fault(struct efx_nic *efx);
294extern int falcon_reconfigure_xmac(struct efx_nic *efx);
295extern void falcon_update_stats_xmac(struct efx_nic *efx);
296
297/* Interrupts and test events */
298extern int efx_nic_init_interrupt(struct efx_nic *efx);
299extern void efx_nic_enable_interrupts(struct efx_nic *efx);
300extern void efx_nic_event_test_start(struct efx_channel *channel);
301extern void efx_nic_irq_test_start(struct efx_nic *efx);
302extern void efx_nic_disable_interrupts(struct efx_nic *efx);
303extern void efx_nic_fini_interrupt(struct efx_nic *efx);
304extern irqreturn_t efx_nic_fatal_interrupt(struct efx_nic *efx);
305extern irqreturn_t falcon_legacy_interrupt_a1(int irq, void *dev_id);
306extern void falcon_irq_ack_a1(struct efx_nic *efx);
307
308static inline int efx_nic_event_test_irq_cpu(struct efx_channel *channel)
309{
310 return ACCESS_ONCE(channel->event_test_cpu);
311}
312static inline int efx_nic_irq_test_irq_cpu(struct efx_nic *efx)
313{
314 return ACCESS_ONCE(efx->last_irq_cpu);
315}
316
317/* Global Resources */
318extern int efx_nic_flush_queues(struct efx_nic *efx);
319extern void falcon_start_nic_stats(struct efx_nic *efx);
320extern void falcon_stop_nic_stats(struct efx_nic *efx);
321extern void falcon_setup_xaui(struct efx_nic *efx);
322extern int falcon_reset_xaui(struct efx_nic *efx);
323extern void
324efx_nic_dimension_resources(struct efx_nic *efx, unsigned sram_lim_qw);
325extern void efx_nic_init_common(struct efx_nic *efx);
326extern void efx_nic_push_rx_indir_table(struct efx_nic *efx);
327
328int efx_nic_alloc_buffer(struct efx_nic *efx, struct efx_buffer *buffer,
329 unsigned int len);
330void efx_nic_free_buffer(struct efx_nic *efx, struct efx_buffer *buffer);
331
332/* Tests */
333struct efx_nic_register_test {
334 unsigned address;
335 efx_oword_t mask;
336};
337extern int efx_nic_test_registers(struct efx_nic *efx,
338 const struct efx_nic_register_test *regs,
339 size_t n_regs);
340
341extern size_t efx_nic_get_regs_len(struct efx_nic *efx);
342extern void efx_nic_get_regs(struct efx_nic *efx, void *buf);
343
344/**************************************************************************
345 *
346 * Falcon MAC stats
347 *
348 **************************************************************************
349 */
350
351#define FALCON_STAT_OFFSET(falcon_stat) EFX_VAL(falcon_stat, offset)
352#define FALCON_STAT_WIDTH(falcon_stat) EFX_VAL(falcon_stat, WIDTH)
353
354/* Retrieve statistic from statistics block */
355#define FALCON_STAT(efx, falcon_stat, efx_stat) do { \
356 if (FALCON_STAT_WIDTH(falcon_stat) == 16) \
357 (efx)->mac_stats.efx_stat += le16_to_cpu( \
358 *((__force __le16 *) \
359 (efx->stats_buffer.addr + \
360 FALCON_STAT_OFFSET(falcon_stat)))); \
361 else if (FALCON_STAT_WIDTH(falcon_stat) == 32) \
362 (efx)->mac_stats.efx_stat += le32_to_cpu( \
363 *((__force __le32 *) \
364 (efx->stats_buffer.addr + \
365 FALCON_STAT_OFFSET(falcon_stat)))); \
366 else \
367 (efx)->mac_stats.efx_stat += le64_to_cpu( \
368 *((__force __le64 *) \
369 (efx->stats_buffer.addr + \
370 FALCON_STAT_OFFSET(falcon_stat)))); \
371 } while (0)
372
373#define FALCON_MAC_STATS_SIZE 0x100
374
375#define MAC_DATA_LBN 0
376#define MAC_DATA_WIDTH 32
377
378extern void efx_generate_event(struct efx_nic *efx, unsigned int evq,
379 efx_qword_t *event);
380
381extern void falcon_poll_xmac(struct efx_nic *efx);
382
383#endif /* EFX_NIC_H */