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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Memory Encryption Support Common Code
4 *
5 * Copyright (C) 2016 Advanced Micro Devices, Inc.
6 *
7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
8 */
9
10#include <linux/dma-direct.h>
11#include <linux/dma-mapping.h>
12#include <linux/swiotlb.h>
13#include <linux/cc_platform.h>
14#include <linux/mem_encrypt.h>
15
16/* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
17bool force_dma_unencrypted(struct device *dev)
18{
19 /*
20 * For SEV, all DMA must be to unencrypted addresses.
21 */
22 if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
23 return true;
24
25 /*
26 * For SME, all DMA must be to unencrypted addresses if the
27 * device does not support DMA to addresses that include the
28 * encryption mask.
29 */
30 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
31 u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask));
32 u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask,
33 dev->bus_dma_limit);
34
35 if (dma_dev_mask <= dma_enc_mask)
36 return true;
37 }
38
39 return false;
40}
41
42static void print_mem_encrypt_feature_info(void)
43{
44 pr_info("Memory Encryption Features active:");
45
46 if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) {
47 pr_cont(" Intel TDX\n");
48 return;
49 }
50
51 pr_cont(" AMD");
52
53 /* Secure Memory Encryption */
54 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
55 /*
56 * SME is mutually exclusive with any of the SEV
57 * features below.
58 */
59 pr_cont(" SME\n");
60 return;
61 }
62
63 /* Secure Encrypted Virtualization */
64 if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
65 pr_cont(" SEV");
66
67 /* Encrypted Register State */
68 if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
69 pr_cont(" SEV-ES");
70
71 /* Secure Nested Paging */
72 if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))
73 pr_cont(" SEV-SNP");
74
75 pr_cont("\n");
76}
77
78/* Architecture __weak replacement functions */
79void __init mem_encrypt_init(void)
80{
81 if (!cc_platform_has(CC_ATTR_MEM_ENCRYPT))
82 return;
83
84 /* Call into SWIOTLB to update the SWIOTLB DMA buffers */
85 swiotlb_update_mem_attributes();
86
87 print_mem_encrypt_feature_info();
88}
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Memory Encryption Support Common Code
4 *
5 * Copyright (C) 2016 Advanced Micro Devices, Inc.
6 *
7 * Author: Tom Lendacky <thomas.lendacky@amd.com>
8 */
9
10#include <linux/dma-direct.h>
11#include <linux/dma-mapping.h>
12#include <linux/swiotlb.h>
13#include <linux/cc_platform.h>
14#include <linux/mem_encrypt.h>
15#include <linux/virtio_anchor.h>
16
17/* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */
18bool force_dma_unencrypted(struct device *dev)
19{
20 /*
21 * For SEV, all DMA must be to unencrypted addresses.
22 */
23 if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
24 return true;
25
26 /*
27 * For SME, all DMA must be to unencrypted addresses if the
28 * device does not support DMA to addresses that include the
29 * encryption mask.
30 */
31 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
32 u64 dma_enc_mask = DMA_BIT_MASK(__ffs64(sme_me_mask));
33 u64 dma_dev_mask = min_not_zero(dev->coherent_dma_mask,
34 dev->bus_dma_limit);
35
36 if (dma_dev_mask <= dma_enc_mask)
37 return true;
38 }
39
40 return false;
41}
42
43static void print_mem_encrypt_feature_info(void)
44{
45 pr_info("Memory Encryption Features active:");
46
47 if (cpu_feature_enabled(X86_FEATURE_TDX_GUEST)) {
48 pr_cont(" Intel TDX\n");
49 return;
50 }
51
52 pr_cont(" AMD");
53
54 /* Secure Memory Encryption */
55 if (cc_platform_has(CC_ATTR_HOST_MEM_ENCRYPT)) {
56 /*
57 * SME is mutually exclusive with any of the SEV
58 * features below.
59 */
60 pr_cont(" SME\n");
61 return;
62 }
63
64 /* Secure Encrypted Virtualization */
65 if (cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
66 pr_cont(" SEV");
67
68 /* Encrypted Register State */
69 if (cc_platform_has(CC_ATTR_GUEST_STATE_ENCRYPT))
70 pr_cont(" SEV-ES");
71
72 /* Secure Nested Paging */
73 if (cc_platform_has(CC_ATTR_GUEST_SEV_SNP))
74 pr_cont(" SEV-SNP");
75
76 pr_cont("\n");
77}
78
79/* Architecture __weak replacement functions */
80void __init mem_encrypt_init(void)
81{
82 if (!cc_platform_has(CC_ATTR_MEM_ENCRYPT))
83 return;
84
85 /* Call into SWIOTLB to update the SWIOTLB DMA buffers */
86 swiotlb_update_mem_attributes();
87
88 print_mem_encrypt_feature_info();
89}
90
91void __init mem_encrypt_setup_arch(void)
92{
93 phys_addr_t total_mem = memblock_phys_mem_size();
94 unsigned long size;
95
96 if (!cc_platform_has(CC_ATTR_GUEST_MEM_ENCRYPT))
97 return;
98
99 /*
100 * For SEV and TDX, all DMA has to occur via shared/unencrypted pages.
101 * Kernel uses SWIOTLB to make this happen without changing device
102 * drivers. However, depending on the workload being run, the
103 * default 64MB of SWIOTLB may not be enough and SWIOTLB may
104 * run out of buffers for DMA, resulting in I/O errors and/or
105 * performance degradation especially with high I/O workloads.
106 *
107 * Adjust the default size of SWIOTLB using a percentage of guest
108 * memory for SWIOTLB buffers. Also, as the SWIOTLB bounce buffer
109 * memory is allocated from low memory, ensure that the adjusted size
110 * is within the limits of low available memory.
111 *
112 * The percentage of guest memory used here for SWIOTLB buffers
113 * is more of an approximation of the static adjustment which
114 * 64MB for <1G, and ~128M to 256M for 1G-to-4G, i.e., the 6%
115 */
116 size = total_mem * 6 / 100;
117 size = clamp_val(size, IO_TLB_DEFAULT_SIZE, SZ_1G);
118 swiotlb_adjust_size(size);
119
120 /* Set restricted memory access for virtio. */
121 virtio_set_mem_acc_cb(virtio_require_restricted_mem_acc);
122}