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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * Modifications for ppc64:
6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 */
8
9#include <linux/string.h>
10#include <linux/sched.h>
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/jump_label.h>
15#include <linux/of.h>
16
17#include <asm/cputable.h>
18#include <asm/mce.h>
19#include <asm/mmu.h>
20#include <asm/setup.h>
21#include <asm/cpu_setup.h>
22
23static struct cpu_spec the_cpu_spec __read_mostly;
24
25struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31#include "cpu_specs.h"
32
33void __init set_cur_cpu_spec(struct cpu_spec *s)
34{
35 struct cpu_spec *t = &the_cpu_spec;
36
37 t = PTRRELOC(t);
38 /*
39 * use memcpy() instead of *t = *s so that GCC replaces it
40 * by __memcpy() when KASAN is active
41 */
42 memcpy(t, s, sizeof(*t));
43
44 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
45}
46
47static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
48 struct cpu_spec *s)
49{
50 struct cpu_spec *t = &the_cpu_spec;
51 struct cpu_spec old;
52
53 t = PTRRELOC(t);
54 old = *t;
55
56 /*
57 * Copy everything, then do fixups. Use memcpy() instead of *t = *s
58 * so that GCC replaces it by __memcpy() when KASAN is active
59 */
60 memcpy(t, s, sizeof(*t));
61
62 /*
63 * If we are overriding a previous value derived from the real
64 * PVR with a new value obtained using a logical PVR value,
65 * don't modify the performance monitor fields.
66 */
67 if (old.num_pmcs && !s->num_pmcs) {
68 t->num_pmcs = old.num_pmcs;
69 t->pmc_type = old.pmc_type;
70
71 /*
72 * Let's ensure that the
73 * fix for the PMAO bug is enabled on compatibility mode.
74 */
75 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
76 }
77
78 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
79
80 /*
81 * Set the base platform string once; assumes
82 * we're called with real pvr first.
83 */
84 if (*PTRRELOC(&powerpc_base_platform) == NULL)
85 *PTRRELOC(&powerpc_base_platform) = t->platform;
86
87#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
88 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
89 * that processor. I will consolidate that at a later time, for now,
90 * just use #ifdef. We also don't need to PTRRELOC the function
91 * pointer on ppc64 and booke as we are running at 0 in real mode
92 * on ppc64 and reloc_offset is always 0 on booke.
93 */
94 if (t->cpu_setup) {
95 t->cpu_setup(offset, t);
96 }
97#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
98
99 return t;
100}
101
102struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
103{
104 struct cpu_spec *s = cpu_specs;
105 int i;
106
107 BUILD_BUG_ON(!ARRAY_SIZE(cpu_specs));
108
109 s = PTRRELOC(s);
110
111 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
112 if ((pvr & s->pvr_mask) == s->pvr_value)
113 return setup_cpu_spec(offset, s);
114 }
115
116 BUG();
117
118 return NULL;
119}
120
121/*
122 * Used by cpufeatures to get the name for CPUs with a PVR table.
123 * If they don't hae a PVR table, cpufeatures gets the name from
124 * cpu device-tree node.
125 */
126void __init identify_cpu_name(unsigned int pvr)
127{
128 struct cpu_spec *s = cpu_specs;
129 struct cpu_spec *t = &the_cpu_spec;
130 int i;
131
132 s = PTRRELOC(s);
133 t = PTRRELOC(t);
134
135 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
136 if ((pvr & s->pvr_mask) == s->pvr_value) {
137 t->cpu_name = s->cpu_name;
138 return;
139 }
140 }
141}
142
143
144#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
145struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
146 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
147};
148EXPORT_SYMBOL_GPL(cpu_feature_keys);
149
150void __init cpu_feature_keys_init(void)
151{
152 int i;
153
154 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
155 unsigned long f = 1ul << i;
156
157 if (!(cur_cpu_spec->cpu_features & f))
158 static_branch_disable(&cpu_feature_keys[i]);
159 }
160}
161
162struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
163 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
164};
165EXPORT_SYMBOL(mmu_feature_keys);
166
167void __init mmu_feature_keys_init(void)
168{
169 int i;
170
171 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
172 unsigned long f = 1ul << i;
173
174 if (!(cur_cpu_spec->mmu_features & f))
175 static_branch_disable(&mmu_feature_keys[i]);
176 }
177}
178#endif
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * Modifications for ppc64:
6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 */
8
9#include <linux/string.h>
10#include <linux/sched.h>
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/jump_label.h>
15
16#include <asm/oprofile_impl.h>
17#include <asm/cputable.h>
18#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
19#include <asm/mmu.h>
20#include <asm/setup.h>
21
22static struct cpu_spec the_cpu_spec __read_mostly;
23
24struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
25EXPORT_SYMBOL(cur_cpu_spec);
26
27/* The platform string corresponding to the real PVR */
28const char *powerpc_base_platform;
29
30/* NOTE:
31 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
32 * the responsibility of the appropriate CPU save/restore functions to
33 * eventually copy these settings over. Those save/restore aren't yet
34 * part of the cputable though. That has to be fixed for both ppc32
35 * and ppc64
36 */
37#ifdef CONFIG_PPC32
38extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
49extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
51extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
52extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
53extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
54extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
55extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
56extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
57extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
58extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
59extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
60#endif /* CONFIG_PPC32 */
61#ifdef CONFIG_PPC64
62extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
63extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
64extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
65extern void __restore_cpu_pa6t(void);
66extern void __restore_cpu_ppc970(void);
67extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
68extern void __restore_cpu_power7(void);
69extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
70extern void __restore_cpu_power8(void);
71extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
72extern void __restore_cpu_power9(void);
73extern void __setup_cpu_power10(unsigned long offset, struct cpu_spec* spec);
74extern void __restore_cpu_power10(void);
75#endif /* CONFIG_PPC64 */
76#if defined(CONFIG_E500)
77extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
78extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
79extern void __restore_cpu_e5500(void);
80extern void __restore_cpu_e6500(void);
81#endif /* CONFIG_E500 */
82
83/* This table only contains "desktop" CPUs, it need to be filled with embedded
84 * ones as well...
85 */
86#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
87 PPC_FEATURE_HAS_MMU)
88#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
89#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
90#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
91 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
92#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
93 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
94#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
95 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
96 PPC_FEATURE_TRUE_LE | \
97 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
98#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
99 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
100 PPC_FEATURE_TRUE_LE | \
101 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
102#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
103#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
105 PPC_FEATURE_TRUE_LE | \
106 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
107#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
108 PPC_FEATURE2_HTM_COMP | \
109 PPC_FEATURE2_HTM_NOSC_COMP | \
110 PPC_FEATURE2_DSCR | \
111 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
112 PPC_FEATURE2_VEC_CRYPTO)
113#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
114 PPC_FEATURE_TRUE_LE | \
115 PPC_FEATURE_HAS_ALTIVEC_COMP)
116#define COMMON_USER_POWER9 COMMON_USER_POWER8
117#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
118 PPC_FEATURE2_ARCH_3_00 | \
119 PPC_FEATURE2_HAS_IEEE128 | \
120 PPC_FEATURE2_DARN | \
121 PPC_FEATURE2_SCV)
122#define COMMON_USER_POWER10 COMMON_USER_POWER9
123#define COMMON_USER2_POWER10 (COMMON_USER2_POWER9 | \
124 PPC_FEATURE2_ARCH_3_1 | \
125 PPC_FEATURE2_MMA)
126
127#ifdef CONFIG_PPC_BOOK3E_64
128#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
129#else
130#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
131 PPC_FEATURE_BOOKE)
132#endif
133
134static struct cpu_spec __initdata cpu_specs[] = {
135#ifdef CONFIG_PPC_BOOK3S_64
136 { /* PPC970 */
137 .pvr_mask = 0xffff0000,
138 .pvr_value = 0x00390000,
139 .cpu_name = "PPC970",
140 .cpu_features = CPU_FTRS_PPC970,
141 .cpu_user_features = COMMON_USER_POWER4 |
142 PPC_FEATURE_HAS_ALTIVEC_COMP,
143 .mmu_features = MMU_FTRS_PPC970,
144 .icache_bsize = 128,
145 .dcache_bsize = 128,
146 .num_pmcs = 8,
147 .pmc_type = PPC_PMC_IBM,
148 .cpu_setup = __setup_cpu_ppc970,
149 .cpu_restore = __restore_cpu_ppc970,
150 .oprofile_cpu_type = "ppc64/970",
151 .oprofile_type = PPC_OPROFILE_POWER4,
152 .platform = "ppc970",
153 },
154 { /* PPC970FX */
155 .pvr_mask = 0xffff0000,
156 .pvr_value = 0x003c0000,
157 .cpu_name = "PPC970FX",
158 .cpu_features = CPU_FTRS_PPC970,
159 .cpu_user_features = COMMON_USER_POWER4 |
160 PPC_FEATURE_HAS_ALTIVEC_COMP,
161 .mmu_features = MMU_FTRS_PPC970,
162 .icache_bsize = 128,
163 .dcache_bsize = 128,
164 .num_pmcs = 8,
165 .pmc_type = PPC_PMC_IBM,
166 .cpu_setup = __setup_cpu_ppc970,
167 .cpu_restore = __restore_cpu_ppc970,
168 .oprofile_cpu_type = "ppc64/970",
169 .oprofile_type = PPC_OPROFILE_POWER4,
170 .platform = "ppc970",
171 },
172 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
173 .pvr_mask = 0xffffffff,
174 .pvr_value = 0x00440100,
175 .cpu_name = "PPC970MP",
176 .cpu_features = CPU_FTRS_PPC970,
177 .cpu_user_features = COMMON_USER_POWER4 |
178 PPC_FEATURE_HAS_ALTIVEC_COMP,
179 .mmu_features = MMU_FTRS_PPC970,
180 .icache_bsize = 128,
181 .dcache_bsize = 128,
182 .num_pmcs = 8,
183 .pmc_type = PPC_PMC_IBM,
184 .cpu_setup = __setup_cpu_ppc970,
185 .cpu_restore = __restore_cpu_ppc970,
186 .oprofile_cpu_type = "ppc64/970MP",
187 .oprofile_type = PPC_OPROFILE_POWER4,
188 .platform = "ppc970",
189 },
190 { /* PPC970MP */
191 .pvr_mask = 0xffff0000,
192 .pvr_value = 0x00440000,
193 .cpu_name = "PPC970MP",
194 .cpu_features = CPU_FTRS_PPC970,
195 .cpu_user_features = COMMON_USER_POWER4 |
196 PPC_FEATURE_HAS_ALTIVEC_COMP,
197 .mmu_features = MMU_FTRS_PPC970,
198 .icache_bsize = 128,
199 .dcache_bsize = 128,
200 .num_pmcs = 8,
201 .pmc_type = PPC_PMC_IBM,
202 .cpu_setup = __setup_cpu_ppc970MP,
203 .cpu_restore = __restore_cpu_ppc970,
204 .oprofile_cpu_type = "ppc64/970MP",
205 .oprofile_type = PPC_OPROFILE_POWER4,
206 .platform = "ppc970",
207 },
208 { /* PPC970GX */
209 .pvr_mask = 0xffff0000,
210 .pvr_value = 0x00450000,
211 .cpu_name = "PPC970GX",
212 .cpu_features = CPU_FTRS_PPC970,
213 .cpu_user_features = COMMON_USER_POWER4 |
214 PPC_FEATURE_HAS_ALTIVEC_COMP,
215 .mmu_features = MMU_FTRS_PPC970,
216 .icache_bsize = 128,
217 .dcache_bsize = 128,
218 .num_pmcs = 8,
219 .pmc_type = PPC_PMC_IBM,
220 .cpu_setup = __setup_cpu_ppc970,
221 .oprofile_cpu_type = "ppc64/970",
222 .oprofile_type = PPC_OPROFILE_POWER4,
223 .platform = "ppc970",
224 },
225 { /* Power5 GR */
226 .pvr_mask = 0xffff0000,
227 .pvr_value = 0x003a0000,
228 .cpu_name = "POWER5 (gr)",
229 .cpu_features = CPU_FTRS_POWER5,
230 .cpu_user_features = COMMON_USER_POWER5,
231 .mmu_features = MMU_FTRS_POWER5,
232 .icache_bsize = 128,
233 .dcache_bsize = 128,
234 .num_pmcs = 6,
235 .pmc_type = PPC_PMC_IBM,
236 .oprofile_cpu_type = "ppc64/power5",
237 .oprofile_type = PPC_OPROFILE_POWER4,
238 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
239 * and above but only works on POWER5 and above
240 */
241 .oprofile_mmcra_sihv = MMCRA_SIHV,
242 .oprofile_mmcra_sipr = MMCRA_SIPR,
243 .platform = "power5",
244 },
245 { /* Power5++ */
246 .pvr_mask = 0xffffff00,
247 .pvr_value = 0x003b0300,
248 .cpu_name = "POWER5+ (gs)",
249 .cpu_features = CPU_FTRS_POWER5,
250 .cpu_user_features = COMMON_USER_POWER5_PLUS,
251 .mmu_features = MMU_FTRS_POWER5,
252 .icache_bsize = 128,
253 .dcache_bsize = 128,
254 .num_pmcs = 6,
255 .oprofile_cpu_type = "ppc64/power5++",
256 .oprofile_type = PPC_OPROFILE_POWER4,
257 .oprofile_mmcra_sihv = MMCRA_SIHV,
258 .oprofile_mmcra_sipr = MMCRA_SIPR,
259 .platform = "power5+",
260 },
261 { /* Power5 GS */
262 .pvr_mask = 0xffff0000,
263 .pvr_value = 0x003b0000,
264 .cpu_name = "POWER5+ (gs)",
265 .cpu_features = CPU_FTRS_POWER5,
266 .cpu_user_features = COMMON_USER_POWER5_PLUS,
267 .mmu_features = MMU_FTRS_POWER5,
268 .icache_bsize = 128,
269 .dcache_bsize = 128,
270 .num_pmcs = 6,
271 .pmc_type = PPC_PMC_IBM,
272 .oprofile_cpu_type = "ppc64/power5+",
273 .oprofile_type = PPC_OPROFILE_POWER4,
274 .oprofile_mmcra_sihv = MMCRA_SIHV,
275 .oprofile_mmcra_sipr = MMCRA_SIPR,
276 .platform = "power5+",
277 },
278 { /* POWER6 in P5+ mode; 2.04-compliant processor */
279 .pvr_mask = 0xffffffff,
280 .pvr_value = 0x0f000001,
281 .cpu_name = "POWER5+",
282 .cpu_features = CPU_FTRS_POWER5,
283 .cpu_user_features = COMMON_USER_POWER5_PLUS,
284 .mmu_features = MMU_FTRS_POWER5,
285 .icache_bsize = 128,
286 .dcache_bsize = 128,
287 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
288 .oprofile_type = PPC_OPROFILE_POWER4,
289 .platform = "power5+",
290 },
291 { /* Power6 */
292 .pvr_mask = 0xffff0000,
293 .pvr_value = 0x003e0000,
294 .cpu_name = "POWER6 (raw)",
295 .cpu_features = CPU_FTRS_POWER6,
296 .cpu_user_features = COMMON_USER_POWER6 |
297 PPC_FEATURE_POWER6_EXT,
298 .mmu_features = MMU_FTRS_POWER6,
299 .icache_bsize = 128,
300 .dcache_bsize = 128,
301 .num_pmcs = 6,
302 .pmc_type = PPC_PMC_IBM,
303 .oprofile_cpu_type = "ppc64/power6",
304 .oprofile_type = PPC_OPROFILE_POWER4,
305 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
306 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
307 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
308 POWER6_MMCRA_OTHER,
309 .platform = "power6x",
310 },
311 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
312 .pvr_mask = 0xffffffff,
313 .pvr_value = 0x0f000002,
314 .cpu_name = "POWER6 (architected)",
315 .cpu_features = CPU_FTRS_POWER6,
316 .cpu_user_features = COMMON_USER_POWER6,
317 .mmu_features = MMU_FTRS_POWER6,
318 .icache_bsize = 128,
319 .dcache_bsize = 128,
320 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
321 .oprofile_type = PPC_OPROFILE_POWER4,
322 .platform = "power6",
323 },
324 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
325 .pvr_mask = 0xffffffff,
326 .pvr_value = 0x0f000003,
327 .cpu_name = "POWER7 (architected)",
328 .cpu_features = CPU_FTRS_POWER7,
329 .cpu_user_features = COMMON_USER_POWER7,
330 .cpu_user_features2 = COMMON_USER2_POWER7,
331 .mmu_features = MMU_FTRS_POWER7,
332 .icache_bsize = 128,
333 .dcache_bsize = 128,
334 .oprofile_type = PPC_OPROFILE_POWER4,
335 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
336 .cpu_setup = __setup_cpu_power7,
337 .cpu_restore = __restore_cpu_power7,
338 .machine_check_early = __machine_check_early_realmode_p7,
339 .platform = "power7",
340 },
341 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
342 .pvr_mask = 0xffffffff,
343 .pvr_value = 0x0f000004,
344 .cpu_name = "POWER8 (architected)",
345 .cpu_features = CPU_FTRS_POWER8,
346 .cpu_user_features = COMMON_USER_POWER8,
347 .cpu_user_features2 = COMMON_USER2_POWER8,
348 .mmu_features = MMU_FTRS_POWER8,
349 .icache_bsize = 128,
350 .dcache_bsize = 128,
351 .oprofile_type = PPC_OPROFILE_INVALID,
352 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
353 .cpu_setup = __setup_cpu_power8,
354 .cpu_restore = __restore_cpu_power8,
355 .machine_check_early = __machine_check_early_realmode_p8,
356 .platform = "power8",
357 },
358 { /* 3.00-compliant processor, i.e. Power9 "architected" mode */
359 .pvr_mask = 0xffffffff,
360 .pvr_value = 0x0f000005,
361 .cpu_name = "POWER9 (architected)",
362 .cpu_features = CPU_FTRS_POWER9,
363 .cpu_user_features = COMMON_USER_POWER9,
364 .cpu_user_features2 = COMMON_USER2_POWER9,
365 .mmu_features = MMU_FTRS_POWER9,
366 .icache_bsize = 128,
367 .dcache_bsize = 128,
368 .oprofile_type = PPC_OPROFILE_INVALID,
369 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
370 .cpu_setup = __setup_cpu_power9,
371 .cpu_restore = __restore_cpu_power9,
372 .platform = "power9",
373 },
374 { /* 3.1-compliant processor, i.e. Power10 "architected" mode */
375 .pvr_mask = 0xffffffff,
376 .pvr_value = 0x0f000006,
377 .cpu_name = "POWER10 (architected)",
378 .cpu_features = CPU_FTRS_POWER10,
379 .cpu_user_features = COMMON_USER_POWER10,
380 .cpu_user_features2 = COMMON_USER2_POWER10,
381 .mmu_features = MMU_FTRS_POWER10,
382 .icache_bsize = 128,
383 .dcache_bsize = 128,
384 .oprofile_type = PPC_OPROFILE_INVALID,
385 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
386 .cpu_setup = __setup_cpu_power10,
387 .cpu_restore = __restore_cpu_power10,
388 .platform = "power10",
389 },
390 { /* Power7 */
391 .pvr_mask = 0xffff0000,
392 .pvr_value = 0x003f0000,
393 .cpu_name = "POWER7 (raw)",
394 .cpu_features = CPU_FTRS_POWER7,
395 .cpu_user_features = COMMON_USER_POWER7,
396 .cpu_user_features2 = COMMON_USER2_POWER7,
397 .mmu_features = MMU_FTRS_POWER7,
398 .icache_bsize = 128,
399 .dcache_bsize = 128,
400 .num_pmcs = 6,
401 .pmc_type = PPC_PMC_IBM,
402 .oprofile_cpu_type = "ppc64/power7",
403 .oprofile_type = PPC_OPROFILE_POWER4,
404 .cpu_setup = __setup_cpu_power7,
405 .cpu_restore = __restore_cpu_power7,
406 .machine_check_early = __machine_check_early_realmode_p7,
407 .platform = "power7",
408 },
409 { /* Power7+ */
410 .pvr_mask = 0xffff0000,
411 .pvr_value = 0x004A0000,
412 .cpu_name = "POWER7+ (raw)",
413 .cpu_features = CPU_FTRS_POWER7,
414 .cpu_user_features = COMMON_USER_POWER7,
415 .cpu_user_features2 = COMMON_USER2_POWER7,
416 .mmu_features = MMU_FTRS_POWER7,
417 .icache_bsize = 128,
418 .dcache_bsize = 128,
419 .num_pmcs = 6,
420 .pmc_type = PPC_PMC_IBM,
421 .oprofile_cpu_type = "ppc64/power7",
422 .oprofile_type = PPC_OPROFILE_POWER4,
423 .cpu_setup = __setup_cpu_power7,
424 .cpu_restore = __restore_cpu_power7,
425 .machine_check_early = __machine_check_early_realmode_p7,
426 .platform = "power7+",
427 },
428 { /* Power8E */
429 .pvr_mask = 0xffff0000,
430 .pvr_value = 0x004b0000,
431 .cpu_name = "POWER8E (raw)",
432 .cpu_features = CPU_FTRS_POWER8E,
433 .cpu_user_features = COMMON_USER_POWER8,
434 .cpu_user_features2 = COMMON_USER2_POWER8,
435 .mmu_features = MMU_FTRS_POWER8,
436 .icache_bsize = 128,
437 .dcache_bsize = 128,
438 .num_pmcs = 6,
439 .pmc_type = PPC_PMC_IBM,
440 .oprofile_cpu_type = "ppc64/power8",
441 .oprofile_type = PPC_OPROFILE_INVALID,
442 .cpu_setup = __setup_cpu_power8,
443 .cpu_restore = __restore_cpu_power8,
444 .machine_check_early = __machine_check_early_realmode_p8,
445 .platform = "power8",
446 },
447 { /* Power8NVL */
448 .pvr_mask = 0xffff0000,
449 .pvr_value = 0x004c0000,
450 .cpu_name = "POWER8NVL (raw)",
451 .cpu_features = CPU_FTRS_POWER8,
452 .cpu_user_features = COMMON_USER_POWER8,
453 .cpu_user_features2 = COMMON_USER2_POWER8,
454 .mmu_features = MMU_FTRS_POWER8,
455 .icache_bsize = 128,
456 .dcache_bsize = 128,
457 .num_pmcs = 6,
458 .pmc_type = PPC_PMC_IBM,
459 .oprofile_cpu_type = "ppc64/power8",
460 .oprofile_type = PPC_OPROFILE_INVALID,
461 .cpu_setup = __setup_cpu_power8,
462 .cpu_restore = __restore_cpu_power8,
463 .machine_check_early = __machine_check_early_realmode_p8,
464 .platform = "power8",
465 },
466 { /* Power8 */
467 .pvr_mask = 0xffff0000,
468 .pvr_value = 0x004d0000,
469 .cpu_name = "POWER8 (raw)",
470 .cpu_features = CPU_FTRS_POWER8,
471 .cpu_user_features = COMMON_USER_POWER8,
472 .cpu_user_features2 = COMMON_USER2_POWER8,
473 .mmu_features = MMU_FTRS_POWER8,
474 .icache_bsize = 128,
475 .dcache_bsize = 128,
476 .num_pmcs = 6,
477 .pmc_type = PPC_PMC_IBM,
478 .oprofile_cpu_type = "ppc64/power8",
479 .oprofile_type = PPC_OPROFILE_INVALID,
480 .cpu_setup = __setup_cpu_power8,
481 .cpu_restore = __restore_cpu_power8,
482 .machine_check_early = __machine_check_early_realmode_p8,
483 .platform = "power8",
484 },
485 { /* Power9 DD2.0 */
486 .pvr_mask = 0xffffefff,
487 .pvr_value = 0x004e0200,
488 .cpu_name = "POWER9 (raw)",
489 .cpu_features = CPU_FTRS_POWER9_DD2_0,
490 .cpu_user_features = COMMON_USER_POWER9,
491 .cpu_user_features2 = COMMON_USER2_POWER9,
492 .mmu_features = MMU_FTRS_POWER9,
493 .icache_bsize = 128,
494 .dcache_bsize = 128,
495 .num_pmcs = 6,
496 .pmc_type = PPC_PMC_IBM,
497 .oprofile_cpu_type = "ppc64/power9",
498 .oprofile_type = PPC_OPROFILE_INVALID,
499 .cpu_setup = __setup_cpu_power9,
500 .cpu_restore = __restore_cpu_power9,
501 .machine_check_early = __machine_check_early_realmode_p9,
502 .platform = "power9",
503 },
504 { /* Power9 DD 2.1 */
505 .pvr_mask = 0xffffefff,
506 .pvr_value = 0x004e0201,
507 .cpu_name = "POWER9 (raw)",
508 .cpu_features = CPU_FTRS_POWER9_DD2_1,
509 .cpu_user_features = COMMON_USER_POWER9,
510 .cpu_user_features2 = COMMON_USER2_POWER9,
511 .mmu_features = MMU_FTRS_POWER9,
512 .icache_bsize = 128,
513 .dcache_bsize = 128,
514 .num_pmcs = 6,
515 .pmc_type = PPC_PMC_IBM,
516 .oprofile_cpu_type = "ppc64/power9",
517 .oprofile_type = PPC_OPROFILE_INVALID,
518 .cpu_setup = __setup_cpu_power9,
519 .cpu_restore = __restore_cpu_power9,
520 .machine_check_early = __machine_check_early_realmode_p9,
521 .platform = "power9",
522 },
523 { /* Power9 DD2.2 or later */
524 .pvr_mask = 0xffff0000,
525 .pvr_value = 0x004e0000,
526 .cpu_name = "POWER9 (raw)",
527 .cpu_features = CPU_FTRS_POWER9_DD2_2,
528 .cpu_user_features = COMMON_USER_POWER9,
529 .cpu_user_features2 = COMMON_USER2_POWER9,
530 .mmu_features = MMU_FTRS_POWER9,
531 .icache_bsize = 128,
532 .dcache_bsize = 128,
533 .num_pmcs = 6,
534 .pmc_type = PPC_PMC_IBM,
535 .oprofile_cpu_type = "ppc64/power9",
536 .oprofile_type = PPC_OPROFILE_INVALID,
537 .cpu_setup = __setup_cpu_power9,
538 .cpu_restore = __restore_cpu_power9,
539 .machine_check_early = __machine_check_early_realmode_p9,
540 .platform = "power9",
541 },
542 { /* Power10 */
543 .pvr_mask = 0xffff0000,
544 .pvr_value = 0x00800000,
545 .cpu_name = "POWER10 (raw)",
546 .cpu_features = CPU_FTRS_POWER10,
547 .cpu_user_features = COMMON_USER_POWER10,
548 .cpu_user_features2 = COMMON_USER2_POWER10,
549 .mmu_features = MMU_FTRS_POWER10,
550 .icache_bsize = 128,
551 .dcache_bsize = 128,
552 .num_pmcs = 6,
553 .pmc_type = PPC_PMC_IBM,
554 .oprofile_cpu_type = "ppc64/power10",
555 .oprofile_type = PPC_OPROFILE_INVALID,
556 .cpu_setup = __setup_cpu_power10,
557 .cpu_restore = __restore_cpu_power10,
558 .machine_check_early = __machine_check_early_realmode_p10,
559 .platform = "power10",
560 },
561 { /* Cell Broadband Engine */
562 .pvr_mask = 0xffff0000,
563 .pvr_value = 0x00700000,
564 .cpu_name = "Cell Broadband Engine",
565 .cpu_features = CPU_FTRS_CELL,
566 .cpu_user_features = COMMON_USER_PPC64 |
567 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
568 PPC_FEATURE_SMT,
569 .mmu_features = MMU_FTRS_CELL,
570 .icache_bsize = 128,
571 .dcache_bsize = 128,
572 .num_pmcs = 4,
573 .pmc_type = PPC_PMC_IBM,
574 .oprofile_cpu_type = "ppc64/cell-be",
575 .oprofile_type = PPC_OPROFILE_CELL,
576 .platform = "ppc-cell-be",
577 },
578 { /* PA Semi PA6T */
579 .pvr_mask = 0x7fff0000,
580 .pvr_value = 0x00900000,
581 .cpu_name = "PA6T",
582 .cpu_features = CPU_FTRS_PA6T,
583 .cpu_user_features = COMMON_USER_PA6T,
584 .mmu_features = MMU_FTRS_PA6T,
585 .icache_bsize = 64,
586 .dcache_bsize = 64,
587 .num_pmcs = 6,
588 .pmc_type = PPC_PMC_PA6T,
589 .cpu_setup = __setup_cpu_pa6t,
590 .cpu_restore = __restore_cpu_pa6t,
591 .oprofile_cpu_type = "ppc64/pa6t",
592 .oprofile_type = PPC_OPROFILE_PA6T,
593 .platform = "pa6t",
594 },
595 { /* default match */
596 .pvr_mask = 0x00000000,
597 .pvr_value = 0x00000000,
598 .cpu_name = "POWER5 (compatible)",
599 .cpu_features = CPU_FTRS_COMPATIBLE,
600 .cpu_user_features = COMMON_USER_PPC64,
601 .mmu_features = MMU_FTRS_POWER,
602 .icache_bsize = 128,
603 .dcache_bsize = 128,
604 .num_pmcs = 6,
605 .pmc_type = PPC_PMC_IBM,
606 .platform = "power5",
607 }
608#endif /* CONFIG_PPC_BOOK3S_64 */
609
610#ifdef CONFIG_PPC32
611#ifdef CONFIG_PPC_BOOK3S_601
612 { /* 601 */
613 .pvr_mask = 0xffff0000,
614 .pvr_value = 0x00010000,
615 .cpu_name = "601",
616 .cpu_features = CPU_FTRS_PPC601,
617 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
618 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
619 .mmu_features = MMU_FTR_HPTE_TABLE,
620 .icache_bsize = 32,
621 .dcache_bsize = 32,
622 .machine_check = machine_check_generic,
623 .platform = "ppc601",
624 },
625#endif /* CONFIG_PPC_BOOK3S_601 */
626#ifdef CONFIG_PPC_BOOK3S_6xx
627 { /* 603 */
628 .pvr_mask = 0xffff0000,
629 .pvr_value = 0x00030000,
630 .cpu_name = "603",
631 .cpu_features = CPU_FTRS_603,
632 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
633 .mmu_features = 0,
634 .icache_bsize = 32,
635 .dcache_bsize = 32,
636 .cpu_setup = __setup_cpu_603,
637 .machine_check = machine_check_generic,
638 .platform = "ppc603",
639 },
640 { /* 603e */
641 .pvr_mask = 0xffff0000,
642 .pvr_value = 0x00060000,
643 .cpu_name = "603e",
644 .cpu_features = CPU_FTRS_603,
645 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
646 .mmu_features = 0,
647 .icache_bsize = 32,
648 .dcache_bsize = 32,
649 .cpu_setup = __setup_cpu_603,
650 .machine_check = machine_check_generic,
651 .platform = "ppc603",
652 },
653 { /* 603ev */
654 .pvr_mask = 0xffff0000,
655 .pvr_value = 0x00070000,
656 .cpu_name = "603ev",
657 .cpu_features = CPU_FTRS_603,
658 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
659 .mmu_features = 0,
660 .icache_bsize = 32,
661 .dcache_bsize = 32,
662 .cpu_setup = __setup_cpu_603,
663 .machine_check = machine_check_generic,
664 .platform = "ppc603",
665 },
666 { /* 604 */
667 .pvr_mask = 0xffff0000,
668 .pvr_value = 0x00040000,
669 .cpu_name = "604",
670 .cpu_features = CPU_FTRS_604,
671 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
672 .mmu_features = MMU_FTR_HPTE_TABLE,
673 .icache_bsize = 32,
674 .dcache_bsize = 32,
675 .num_pmcs = 2,
676 .cpu_setup = __setup_cpu_604,
677 .machine_check = machine_check_generic,
678 .platform = "ppc604",
679 },
680 { /* 604e */
681 .pvr_mask = 0xfffff000,
682 .pvr_value = 0x00090000,
683 .cpu_name = "604e",
684 .cpu_features = CPU_FTRS_604,
685 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
686 .mmu_features = MMU_FTR_HPTE_TABLE,
687 .icache_bsize = 32,
688 .dcache_bsize = 32,
689 .num_pmcs = 4,
690 .cpu_setup = __setup_cpu_604,
691 .machine_check = machine_check_generic,
692 .platform = "ppc604",
693 },
694 { /* 604r */
695 .pvr_mask = 0xffff0000,
696 .pvr_value = 0x00090000,
697 .cpu_name = "604r",
698 .cpu_features = CPU_FTRS_604,
699 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
700 .mmu_features = MMU_FTR_HPTE_TABLE,
701 .icache_bsize = 32,
702 .dcache_bsize = 32,
703 .num_pmcs = 4,
704 .cpu_setup = __setup_cpu_604,
705 .machine_check = machine_check_generic,
706 .platform = "ppc604",
707 },
708 { /* 604ev */
709 .pvr_mask = 0xffff0000,
710 .pvr_value = 0x000a0000,
711 .cpu_name = "604ev",
712 .cpu_features = CPU_FTRS_604,
713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
714 .mmu_features = MMU_FTR_HPTE_TABLE,
715 .icache_bsize = 32,
716 .dcache_bsize = 32,
717 .num_pmcs = 4,
718 .cpu_setup = __setup_cpu_604,
719 .machine_check = machine_check_generic,
720 .platform = "ppc604",
721 },
722 { /* 740/750 (0x4202, don't support TAU ?) */
723 .pvr_mask = 0xffffffff,
724 .pvr_value = 0x00084202,
725 .cpu_name = "740/750",
726 .cpu_features = CPU_FTRS_740_NOTAU,
727 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
728 .mmu_features = MMU_FTR_HPTE_TABLE,
729 .icache_bsize = 32,
730 .dcache_bsize = 32,
731 .num_pmcs = 4,
732 .cpu_setup = __setup_cpu_750,
733 .machine_check = machine_check_generic,
734 .platform = "ppc750",
735 },
736 { /* 750CX (80100 and 8010x?) */
737 .pvr_mask = 0xfffffff0,
738 .pvr_value = 0x00080100,
739 .cpu_name = "750CX",
740 .cpu_features = CPU_FTRS_750,
741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
742 .mmu_features = MMU_FTR_HPTE_TABLE,
743 .icache_bsize = 32,
744 .dcache_bsize = 32,
745 .num_pmcs = 4,
746 .cpu_setup = __setup_cpu_750cx,
747 .machine_check = machine_check_generic,
748 .platform = "ppc750",
749 },
750 { /* 750CX (82201 and 82202) */
751 .pvr_mask = 0xfffffff0,
752 .pvr_value = 0x00082200,
753 .cpu_name = "750CX",
754 .cpu_features = CPU_FTRS_750,
755 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
756 .mmu_features = MMU_FTR_HPTE_TABLE,
757 .icache_bsize = 32,
758 .dcache_bsize = 32,
759 .num_pmcs = 4,
760 .pmc_type = PPC_PMC_IBM,
761 .cpu_setup = __setup_cpu_750cx,
762 .machine_check = machine_check_generic,
763 .platform = "ppc750",
764 },
765 { /* 750CXe (82214) */
766 .pvr_mask = 0xfffffff0,
767 .pvr_value = 0x00082210,
768 .cpu_name = "750CXe",
769 .cpu_features = CPU_FTRS_750,
770 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
771 .mmu_features = MMU_FTR_HPTE_TABLE,
772 .icache_bsize = 32,
773 .dcache_bsize = 32,
774 .num_pmcs = 4,
775 .pmc_type = PPC_PMC_IBM,
776 .cpu_setup = __setup_cpu_750cx,
777 .machine_check = machine_check_generic,
778 .platform = "ppc750",
779 },
780 { /* 750CXe "Gekko" (83214) */
781 .pvr_mask = 0xffffffff,
782 .pvr_value = 0x00083214,
783 .cpu_name = "750CXe",
784 .cpu_features = CPU_FTRS_750,
785 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
786 .mmu_features = MMU_FTR_HPTE_TABLE,
787 .icache_bsize = 32,
788 .dcache_bsize = 32,
789 .num_pmcs = 4,
790 .pmc_type = PPC_PMC_IBM,
791 .cpu_setup = __setup_cpu_750cx,
792 .machine_check = machine_check_generic,
793 .platform = "ppc750",
794 },
795 { /* 750CL (and "Broadway") */
796 .pvr_mask = 0xfffff0e0,
797 .pvr_value = 0x00087000,
798 .cpu_name = "750CL",
799 .cpu_features = CPU_FTRS_750CL,
800 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
801 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
802 .icache_bsize = 32,
803 .dcache_bsize = 32,
804 .num_pmcs = 4,
805 .pmc_type = PPC_PMC_IBM,
806 .cpu_setup = __setup_cpu_750,
807 .machine_check = machine_check_generic,
808 .platform = "ppc750",
809 .oprofile_cpu_type = "ppc/750",
810 .oprofile_type = PPC_OPROFILE_G4,
811 },
812 { /* 745/755 */
813 .pvr_mask = 0xfffff000,
814 .pvr_value = 0x00083000,
815 .cpu_name = "745/755",
816 .cpu_features = CPU_FTRS_750,
817 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
818 .mmu_features = MMU_FTR_HPTE_TABLE,
819 .icache_bsize = 32,
820 .dcache_bsize = 32,
821 .num_pmcs = 4,
822 .pmc_type = PPC_PMC_IBM,
823 .cpu_setup = __setup_cpu_750,
824 .machine_check = machine_check_generic,
825 .platform = "ppc750",
826 },
827 { /* 750FX rev 1.x */
828 .pvr_mask = 0xffffff00,
829 .pvr_value = 0x70000100,
830 .cpu_name = "750FX",
831 .cpu_features = CPU_FTRS_750FX1,
832 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
833 .mmu_features = MMU_FTR_HPTE_TABLE,
834 .icache_bsize = 32,
835 .dcache_bsize = 32,
836 .num_pmcs = 4,
837 .pmc_type = PPC_PMC_IBM,
838 .cpu_setup = __setup_cpu_750,
839 .machine_check = machine_check_generic,
840 .platform = "ppc750",
841 .oprofile_cpu_type = "ppc/750",
842 .oprofile_type = PPC_OPROFILE_G4,
843 },
844 { /* 750FX rev 2.0 must disable HID0[DPM] */
845 .pvr_mask = 0xffffffff,
846 .pvr_value = 0x70000200,
847 .cpu_name = "750FX",
848 .cpu_features = CPU_FTRS_750FX2,
849 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
850 .mmu_features = MMU_FTR_HPTE_TABLE,
851 .icache_bsize = 32,
852 .dcache_bsize = 32,
853 .num_pmcs = 4,
854 .pmc_type = PPC_PMC_IBM,
855 .cpu_setup = __setup_cpu_750,
856 .machine_check = machine_check_generic,
857 .platform = "ppc750",
858 .oprofile_cpu_type = "ppc/750",
859 .oprofile_type = PPC_OPROFILE_G4,
860 },
861 { /* 750FX (All revs except 2.0) */
862 .pvr_mask = 0xffff0000,
863 .pvr_value = 0x70000000,
864 .cpu_name = "750FX",
865 .cpu_features = CPU_FTRS_750FX,
866 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
867 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
868 .icache_bsize = 32,
869 .dcache_bsize = 32,
870 .num_pmcs = 4,
871 .pmc_type = PPC_PMC_IBM,
872 .cpu_setup = __setup_cpu_750fx,
873 .machine_check = machine_check_generic,
874 .platform = "ppc750",
875 .oprofile_cpu_type = "ppc/750",
876 .oprofile_type = PPC_OPROFILE_G4,
877 },
878 { /* 750GX */
879 .pvr_mask = 0xffff0000,
880 .pvr_value = 0x70020000,
881 .cpu_name = "750GX",
882 .cpu_features = CPU_FTRS_750GX,
883 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
884 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
885 .icache_bsize = 32,
886 .dcache_bsize = 32,
887 .num_pmcs = 4,
888 .pmc_type = PPC_PMC_IBM,
889 .cpu_setup = __setup_cpu_750fx,
890 .machine_check = machine_check_generic,
891 .platform = "ppc750",
892 .oprofile_cpu_type = "ppc/750",
893 .oprofile_type = PPC_OPROFILE_G4,
894 },
895 { /* 740/750 (L2CR bit need fixup for 740) */
896 .pvr_mask = 0xffff0000,
897 .pvr_value = 0x00080000,
898 .cpu_name = "740/750",
899 .cpu_features = CPU_FTRS_740,
900 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
901 .mmu_features = MMU_FTR_HPTE_TABLE,
902 .icache_bsize = 32,
903 .dcache_bsize = 32,
904 .num_pmcs = 4,
905 .pmc_type = PPC_PMC_IBM,
906 .cpu_setup = __setup_cpu_750,
907 .machine_check = machine_check_generic,
908 .platform = "ppc750",
909 },
910 { /* 7400 rev 1.1 ? (no TAU) */
911 .pvr_mask = 0xffffffff,
912 .pvr_value = 0x000c1101,
913 .cpu_name = "7400 (1.1)",
914 .cpu_features = CPU_FTRS_7400_NOTAU,
915 .cpu_user_features = COMMON_USER |
916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
917 .mmu_features = MMU_FTR_HPTE_TABLE,
918 .icache_bsize = 32,
919 .dcache_bsize = 32,
920 .num_pmcs = 4,
921 .pmc_type = PPC_PMC_G4,
922 .cpu_setup = __setup_cpu_7400,
923 .machine_check = machine_check_generic,
924 .platform = "ppc7400",
925 },
926 { /* 7400 */
927 .pvr_mask = 0xffff0000,
928 .pvr_value = 0x000c0000,
929 .cpu_name = "7400",
930 .cpu_features = CPU_FTRS_7400,
931 .cpu_user_features = COMMON_USER |
932 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
933 .mmu_features = MMU_FTR_HPTE_TABLE,
934 .icache_bsize = 32,
935 .dcache_bsize = 32,
936 .num_pmcs = 4,
937 .pmc_type = PPC_PMC_G4,
938 .cpu_setup = __setup_cpu_7400,
939 .machine_check = machine_check_generic,
940 .platform = "ppc7400",
941 },
942 { /* 7410 */
943 .pvr_mask = 0xffff0000,
944 .pvr_value = 0x800c0000,
945 .cpu_name = "7410",
946 .cpu_features = CPU_FTRS_7400,
947 .cpu_user_features = COMMON_USER |
948 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
949 .mmu_features = MMU_FTR_HPTE_TABLE,
950 .icache_bsize = 32,
951 .dcache_bsize = 32,
952 .num_pmcs = 4,
953 .pmc_type = PPC_PMC_G4,
954 .cpu_setup = __setup_cpu_7410,
955 .machine_check = machine_check_generic,
956 .platform = "ppc7400",
957 },
958 { /* 7450 2.0 - no doze/nap */
959 .pvr_mask = 0xffffffff,
960 .pvr_value = 0x80000200,
961 .cpu_name = "7450",
962 .cpu_features = CPU_FTRS_7450_20,
963 .cpu_user_features = COMMON_USER |
964 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
965 .mmu_features = MMU_FTR_HPTE_TABLE,
966 .icache_bsize = 32,
967 .dcache_bsize = 32,
968 .num_pmcs = 6,
969 .pmc_type = PPC_PMC_G4,
970 .cpu_setup = __setup_cpu_745x,
971 .oprofile_cpu_type = "ppc/7450",
972 .oprofile_type = PPC_OPROFILE_G4,
973 .machine_check = machine_check_generic,
974 .platform = "ppc7450",
975 },
976 { /* 7450 2.1 */
977 .pvr_mask = 0xffffffff,
978 .pvr_value = 0x80000201,
979 .cpu_name = "7450",
980 .cpu_features = CPU_FTRS_7450_21,
981 .cpu_user_features = COMMON_USER |
982 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
983 .mmu_features = MMU_FTR_HPTE_TABLE,
984 .icache_bsize = 32,
985 .dcache_bsize = 32,
986 .num_pmcs = 6,
987 .pmc_type = PPC_PMC_G4,
988 .cpu_setup = __setup_cpu_745x,
989 .oprofile_cpu_type = "ppc/7450",
990 .oprofile_type = PPC_OPROFILE_G4,
991 .machine_check = machine_check_generic,
992 .platform = "ppc7450",
993 },
994 { /* 7450 2.3 and newer */
995 .pvr_mask = 0xffff0000,
996 .pvr_value = 0x80000000,
997 .cpu_name = "7450",
998 .cpu_features = CPU_FTRS_7450_23,
999 .cpu_user_features = COMMON_USER |
1000 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1001 .mmu_features = MMU_FTR_HPTE_TABLE,
1002 .icache_bsize = 32,
1003 .dcache_bsize = 32,
1004 .num_pmcs = 6,
1005 .pmc_type = PPC_PMC_G4,
1006 .cpu_setup = __setup_cpu_745x,
1007 .oprofile_cpu_type = "ppc/7450",
1008 .oprofile_type = PPC_OPROFILE_G4,
1009 .machine_check = machine_check_generic,
1010 .platform = "ppc7450",
1011 },
1012 { /* 7455 rev 1.x */
1013 .pvr_mask = 0xffffff00,
1014 .pvr_value = 0x80010100,
1015 .cpu_name = "7455",
1016 .cpu_features = CPU_FTRS_7455_1,
1017 .cpu_user_features = COMMON_USER |
1018 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1019 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1020 .icache_bsize = 32,
1021 .dcache_bsize = 32,
1022 .num_pmcs = 6,
1023 .pmc_type = PPC_PMC_G4,
1024 .cpu_setup = __setup_cpu_745x,
1025 .oprofile_cpu_type = "ppc/7450",
1026 .oprofile_type = PPC_OPROFILE_G4,
1027 .machine_check = machine_check_generic,
1028 .platform = "ppc7450",
1029 },
1030 { /* 7455 rev 2.0 */
1031 .pvr_mask = 0xffffffff,
1032 .pvr_value = 0x80010200,
1033 .cpu_name = "7455",
1034 .cpu_features = CPU_FTRS_7455_20,
1035 .cpu_user_features = COMMON_USER |
1036 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1037 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1038 .icache_bsize = 32,
1039 .dcache_bsize = 32,
1040 .num_pmcs = 6,
1041 .pmc_type = PPC_PMC_G4,
1042 .cpu_setup = __setup_cpu_745x,
1043 .oprofile_cpu_type = "ppc/7450",
1044 .oprofile_type = PPC_OPROFILE_G4,
1045 .machine_check = machine_check_generic,
1046 .platform = "ppc7450",
1047 },
1048 { /* 7455 others */
1049 .pvr_mask = 0xffff0000,
1050 .pvr_value = 0x80010000,
1051 .cpu_name = "7455",
1052 .cpu_features = CPU_FTRS_7455,
1053 .cpu_user_features = COMMON_USER |
1054 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1055 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1056 .icache_bsize = 32,
1057 .dcache_bsize = 32,
1058 .num_pmcs = 6,
1059 .pmc_type = PPC_PMC_G4,
1060 .cpu_setup = __setup_cpu_745x,
1061 .oprofile_cpu_type = "ppc/7450",
1062 .oprofile_type = PPC_OPROFILE_G4,
1063 .machine_check = machine_check_generic,
1064 .platform = "ppc7450",
1065 },
1066 { /* 7447/7457 Rev 1.0 */
1067 .pvr_mask = 0xffffffff,
1068 .pvr_value = 0x80020100,
1069 .cpu_name = "7447/7457",
1070 .cpu_features = CPU_FTRS_7447_10,
1071 .cpu_user_features = COMMON_USER |
1072 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1073 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1074 .icache_bsize = 32,
1075 .dcache_bsize = 32,
1076 .num_pmcs = 6,
1077 .pmc_type = PPC_PMC_G4,
1078 .cpu_setup = __setup_cpu_745x,
1079 .oprofile_cpu_type = "ppc/7450",
1080 .oprofile_type = PPC_OPROFILE_G4,
1081 .machine_check = machine_check_generic,
1082 .platform = "ppc7450",
1083 },
1084 { /* 7447/7457 Rev 1.1 */
1085 .pvr_mask = 0xffffffff,
1086 .pvr_value = 0x80020101,
1087 .cpu_name = "7447/7457",
1088 .cpu_features = CPU_FTRS_7447_10,
1089 .cpu_user_features = COMMON_USER |
1090 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1091 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1092 .icache_bsize = 32,
1093 .dcache_bsize = 32,
1094 .num_pmcs = 6,
1095 .pmc_type = PPC_PMC_G4,
1096 .cpu_setup = __setup_cpu_745x,
1097 .oprofile_cpu_type = "ppc/7450",
1098 .oprofile_type = PPC_OPROFILE_G4,
1099 .machine_check = machine_check_generic,
1100 .platform = "ppc7450",
1101 },
1102 { /* 7447/7457 Rev 1.2 and later */
1103 .pvr_mask = 0xffff0000,
1104 .pvr_value = 0x80020000,
1105 .cpu_name = "7447/7457",
1106 .cpu_features = CPU_FTRS_7447,
1107 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1108 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1109 .icache_bsize = 32,
1110 .dcache_bsize = 32,
1111 .num_pmcs = 6,
1112 .pmc_type = PPC_PMC_G4,
1113 .cpu_setup = __setup_cpu_745x,
1114 .oprofile_cpu_type = "ppc/7450",
1115 .oprofile_type = PPC_OPROFILE_G4,
1116 .machine_check = machine_check_generic,
1117 .platform = "ppc7450",
1118 },
1119 { /* 7447A */
1120 .pvr_mask = 0xffff0000,
1121 .pvr_value = 0x80030000,
1122 .cpu_name = "7447A",
1123 .cpu_features = CPU_FTRS_7447A,
1124 .cpu_user_features = COMMON_USER |
1125 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1126 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1127 .icache_bsize = 32,
1128 .dcache_bsize = 32,
1129 .num_pmcs = 6,
1130 .pmc_type = PPC_PMC_G4,
1131 .cpu_setup = __setup_cpu_745x,
1132 .oprofile_cpu_type = "ppc/7450",
1133 .oprofile_type = PPC_OPROFILE_G4,
1134 .machine_check = machine_check_generic,
1135 .platform = "ppc7450",
1136 },
1137 { /* 7448 */
1138 .pvr_mask = 0xffff0000,
1139 .pvr_value = 0x80040000,
1140 .cpu_name = "7448",
1141 .cpu_features = CPU_FTRS_7448,
1142 .cpu_user_features = COMMON_USER |
1143 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1144 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1145 .icache_bsize = 32,
1146 .dcache_bsize = 32,
1147 .num_pmcs = 6,
1148 .pmc_type = PPC_PMC_G4,
1149 .cpu_setup = __setup_cpu_745x,
1150 .oprofile_cpu_type = "ppc/7450",
1151 .oprofile_type = PPC_OPROFILE_G4,
1152 .machine_check = machine_check_generic,
1153 .platform = "ppc7450",
1154 },
1155 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1156 .pvr_mask = 0x7fff0000,
1157 .pvr_value = 0x00810000,
1158 .cpu_name = "82xx",
1159 .cpu_features = CPU_FTRS_82XX,
1160 .cpu_user_features = COMMON_USER,
1161 .mmu_features = 0,
1162 .icache_bsize = 32,
1163 .dcache_bsize = 32,
1164 .cpu_setup = __setup_cpu_603,
1165 .machine_check = machine_check_generic,
1166 .platform = "ppc603",
1167 },
1168 { /* All G2_LE (603e core, plus some) have the same pvr */
1169 .pvr_mask = 0x7fff0000,
1170 .pvr_value = 0x00820000,
1171 .cpu_name = "G2_LE",
1172 .cpu_features = CPU_FTRS_G2_LE,
1173 .cpu_user_features = COMMON_USER,
1174 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1175 .icache_bsize = 32,
1176 .dcache_bsize = 32,
1177 .cpu_setup = __setup_cpu_603,
1178 .machine_check = machine_check_generic,
1179 .platform = "ppc603",
1180 },
1181#ifdef CONFIG_PPC_83xx
1182 { /* e300c1 (a 603e core, plus some) on 83xx */
1183 .pvr_mask = 0x7fff0000,
1184 .pvr_value = 0x00830000,
1185 .cpu_name = "e300c1",
1186 .cpu_features = CPU_FTRS_E300,
1187 .cpu_user_features = COMMON_USER,
1188 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1189 .icache_bsize = 32,
1190 .dcache_bsize = 32,
1191 .cpu_setup = __setup_cpu_603,
1192 .machine_check = machine_check_83xx,
1193 .platform = "ppc603",
1194 },
1195 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1196 .pvr_mask = 0x7fff0000,
1197 .pvr_value = 0x00840000,
1198 .cpu_name = "e300c2",
1199 .cpu_features = CPU_FTRS_E300C2,
1200 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1201 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1202 MMU_FTR_NEED_DTLB_SW_LRU,
1203 .icache_bsize = 32,
1204 .dcache_bsize = 32,
1205 .cpu_setup = __setup_cpu_603,
1206 .machine_check = machine_check_83xx,
1207 .platform = "ppc603",
1208 },
1209 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1210 .pvr_mask = 0x7fff0000,
1211 .pvr_value = 0x00850000,
1212 .cpu_name = "e300c3",
1213 .cpu_features = CPU_FTRS_E300,
1214 .cpu_user_features = COMMON_USER,
1215 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1216 MMU_FTR_NEED_DTLB_SW_LRU,
1217 .icache_bsize = 32,
1218 .dcache_bsize = 32,
1219 .cpu_setup = __setup_cpu_603,
1220 .machine_check = machine_check_83xx,
1221 .num_pmcs = 4,
1222 .oprofile_cpu_type = "ppc/e300",
1223 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1224 .platform = "ppc603",
1225 },
1226 { /* e300c4 (e300c1, plus one IU) */
1227 .pvr_mask = 0x7fff0000,
1228 .pvr_value = 0x00860000,
1229 .cpu_name = "e300c4",
1230 .cpu_features = CPU_FTRS_E300,
1231 .cpu_user_features = COMMON_USER,
1232 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1233 MMU_FTR_NEED_DTLB_SW_LRU,
1234 .icache_bsize = 32,
1235 .dcache_bsize = 32,
1236 .cpu_setup = __setup_cpu_603,
1237 .machine_check = machine_check_83xx,
1238 .num_pmcs = 4,
1239 .oprofile_cpu_type = "ppc/e300",
1240 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1241 .platform = "ppc603",
1242 },
1243#endif
1244 { /* default match, we assume split I/D cache & TB (non-601)... */
1245 .pvr_mask = 0x00000000,
1246 .pvr_value = 0x00000000,
1247 .cpu_name = "(generic PPC)",
1248 .cpu_features = CPU_FTRS_CLASSIC32,
1249 .cpu_user_features = COMMON_USER,
1250 .mmu_features = MMU_FTR_HPTE_TABLE,
1251 .icache_bsize = 32,
1252 .dcache_bsize = 32,
1253 .machine_check = machine_check_generic,
1254 .platform = "ppc603",
1255 },
1256#endif /* CONFIG_PPC_BOOK3S_6xx */
1257#ifdef CONFIG_PPC_8xx
1258 { /* 8xx */
1259 .pvr_mask = 0xffff0000,
1260 .pvr_value = PVR_8xx,
1261 .cpu_name = "8xx",
1262 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1263 * if the 8xx code is there.... */
1264 .cpu_features = CPU_FTRS_8XX,
1265 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1266 .mmu_features = MMU_FTR_TYPE_8xx,
1267 .icache_bsize = 16,
1268 .dcache_bsize = 16,
1269 .machine_check = machine_check_8xx,
1270 .platform = "ppc823",
1271 },
1272#endif /* CONFIG_PPC_8xx */
1273#ifdef CONFIG_40x
1274 { /* STB 04xxx */
1275 .pvr_mask = 0xffff0000,
1276 .pvr_value = 0x41810000,
1277 .cpu_name = "STB04xxx",
1278 .cpu_features = CPU_FTRS_40X,
1279 .cpu_user_features = PPC_FEATURE_32 |
1280 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1281 .mmu_features = MMU_FTR_TYPE_40x,
1282 .icache_bsize = 32,
1283 .dcache_bsize = 32,
1284 .machine_check = machine_check_4xx,
1285 .platform = "ppc405",
1286 },
1287 { /* NP405L */
1288 .pvr_mask = 0xffff0000,
1289 .pvr_value = 0x41610000,
1290 .cpu_name = "NP405L",
1291 .cpu_features = CPU_FTRS_40X,
1292 .cpu_user_features = PPC_FEATURE_32 |
1293 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1294 .mmu_features = MMU_FTR_TYPE_40x,
1295 .icache_bsize = 32,
1296 .dcache_bsize = 32,
1297 .machine_check = machine_check_4xx,
1298 .platform = "ppc405",
1299 },
1300 { /* NP4GS3 */
1301 .pvr_mask = 0xffff0000,
1302 .pvr_value = 0x40B10000,
1303 .cpu_name = "NP4GS3",
1304 .cpu_features = CPU_FTRS_40X,
1305 .cpu_user_features = PPC_FEATURE_32 |
1306 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1307 .mmu_features = MMU_FTR_TYPE_40x,
1308 .icache_bsize = 32,
1309 .dcache_bsize = 32,
1310 .machine_check = machine_check_4xx,
1311 .platform = "ppc405",
1312 },
1313 { /* NP405H */
1314 .pvr_mask = 0xffff0000,
1315 .pvr_value = 0x41410000,
1316 .cpu_name = "NP405H",
1317 .cpu_features = CPU_FTRS_40X,
1318 .cpu_user_features = PPC_FEATURE_32 |
1319 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1320 .mmu_features = MMU_FTR_TYPE_40x,
1321 .icache_bsize = 32,
1322 .dcache_bsize = 32,
1323 .machine_check = machine_check_4xx,
1324 .platform = "ppc405",
1325 },
1326 { /* 405GPr */
1327 .pvr_mask = 0xffff0000,
1328 .pvr_value = 0x50910000,
1329 .cpu_name = "405GPr",
1330 .cpu_features = CPU_FTRS_40X,
1331 .cpu_user_features = PPC_FEATURE_32 |
1332 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1333 .mmu_features = MMU_FTR_TYPE_40x,
1334 .icache_bsize = 32,
1335 .dcache_bsize = 32,
1336 .machine_check = machine_check_4xx,
1337 .platform = "ppc405",
1338 },
1339 { /* STBx25xx */
1340 .pvr_mask = 0xffff0000,
1341 .pvr_value = 0x51510000,
1342 .cpu_name = "STBx25xx",
1343 .cpu_features = CPU_FTRS_40X,
1344 .cpu_user_features = PPC_FEATURE_32 |
1345 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1346 .mmu_features = MMU_FTR_TYPE_40x,
1347 .icache_bsize = 32,
1348 .dcache_bsize = 32,
1349 .machine_check = machine_check_4xx,
1350 .platform = "ppc405",
1351 },
1352 { /* 405LP */
1353 .pvr_mask = 0xffff0000,
1354 .pvr_value = 0x41F10000,
1355 .cpu_name = "405LP",
1356 .cpu_features = CPU_FTRS_40X,
1357 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1358 .mmu_features = MMU_FTR_TYPE_40x,
1359 .icache_bsize = 32,
1360 .dcache_bsize = 32,
1361 .machine_check = machine_check_4xx,
1362 .platform = "ppc405",
1363 },
1364 { /* 405EP */
1365 .pvr_mask = 0xffff0000,
1366 .pvr_value = 0x51210000,
1367 .cpu_name = "405EP",
1368 .cpu_features = CPU_FTRS_40X,
1369 .cpu_user_features = PPC_FEATURE_32 |
1370 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1371 .mmu_features = MMU_FTR_TYPE_40x,
1372 .icache_bsize = 32,
1373 .dcache_bsize = 32,
1374 .machine_check = machine_check_4xx,
1375 .platform = "ppc405",
1376 },
1377 { /* 405EX Rev. A/B with Security */
1378 .pvr_mask = 0xffff000f,
1379 .pvr_value = 0x12910007,
1380 .cpu_name = "405EX Rev. A/B",
1381 .cpu_features = CPU_FTRS_40X,
1382 .cpu_user_features = PPC_FEATURE_32 |
1383 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1384 .mmu_features = MMU_FTR_TYPE_40x,
1385 .icache_bsize = 32,
1386 .dcache_bsize = 32,
1387 .machine_check = machine_check_4xx,
1388 .platform = "ppc405",
1389 },
1390 { /* 405EX Rev. C without Security */
1391 .pvr_mask = 0xffff000f,
1392 .pvr_value = 0x1291000d,
1393 .cpu_name = "405EX Rev. C",
1394 .cpu_features = CPU_FTRS_40X,
1395 .cpu_user_features = PPC_FEATURE_32 |
1396 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1397 .mmu_features = MMU_FTR_TYPE_40x,
1398 .icache_bsize = 32,
1399 .dcache_bsize = 32,
1400 .machine_check = machine_check_4xx,
1401 .platform = "ppc405",
1402 },
1403 { /* 405EX Rev. C with Security */
1404 .pvr_mask = 0xffff000f,
1405 .pvr_value = 0x1291000f,
1406 .cpu_name = "405EX Rev. C",
1407 .cpu_features = CPU_FTRS_40X,
1408 .cpu_user_features = PPC_FEATURE_32 |
1409 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1410 .mmu_features = MMU_FTR_TYPE_40x,
1411 .icache_bsize = 32,
1412 .dcache_bsize = 32,
1413 .machine_check = machine_check_4xx,
1414 .platform = "ppc405",
1415 },
1416 { /* 405EX Rev. D without Security */
1417 .pvr_mask = 0xffff000f,
1418 .pvr_value = 0x12910003,
1419 .cpu_name = "405EX Rev. D",
1420 .cpu_features = CPU_FTRS_40X,
1421 .cpu_user_features = PPC_FEATURE_32 |
1422 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1423 .mmu_features = MMU_FTR_TYPE_40x,
1424 .icache_bsize = 32,
1425 .dcache_bsize = 32,
1426 .machine_check = machine_check_4xx,
1427 .platform = "ppc405",
1428 },
1429 { /* 405EX Rev. D with Security */
1430 .pvr_mask = 0xffff000f,
1431 .pvr_value = 0x12910005,
1432 .cpu_name = "405EX Rev. D",
1433 .cpu_features = CPU_FTRS_40X,
1434 .cpu_user_features = PPC_FEATURE_32 |
1435 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1436 .mmu_features = MMU_FTR_TYPE_40x,
1437 .icache_bsize = 32,
1438 .dcache_bsize = 32,
1439 .machine_check = machine_check_4xx,
1440 .platform = "ppc405",
1441 },
1442 { /* 405EXr Rev. A/B without Security */
1443 .pvr_mask = 0xffff000f,
1444 .pvr_value = 0x12910001,
1445 .cpu_name = "405EXr Rev. A/B",
1446 .cpu_features = CPU_FTRS_40X,
1447 .cpu_user_features = PPC_FEATURE_32 |
1448 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1449 .mmu_features = MMU_FTR_TYPE_40x,
1450 .icache_bsize = 32,
1451 .dcache_bsize = 32,
1452 .machine_check = machine_check_4xx,
1453 .platform = "ppc405",
1454 },
1455 { /* 405EXr Rev. C without Security */
1456 .pvr_mask = 0xffff000f,
1457 .pvr_value = 0x12910009,
1458 .cpu_name = "405EXr Rev. C",
1459 .cpu_features = CPU_FTRS_40X,
1460 .cpu_user_features = PPC_FEATURE_32 |
1461 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1462 .mmu_features = MMU_FTR_TYPE_40x,
1463 .icache_bsize = 32,
1464 .dcache_bsize = 32,
1465 .machine_check = machine_check_4xx,
1466 .platform = "ppc405",
1467 },
1468 { /* 405EXr Rev. C with Security */
1469 .pvr_mask = 0xffff000f,
1470 .pvr_value = 0x1291000b,
1471 .cpu_name = "405EXr Rev. C",
1472 .cpu_features = CPU_FTRS_40X,
1473 .cpu_user_features = PPC_FEATURE_32 |
1474 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1475 .mmu_features = MMU_FTR_TYPE_40x,
1476 .icache_bsize = 32,
1477 .dcache_bsize = 32,
1478 .machine_check = machine_check_4xx,
1479 .platform = "ppc405",
1480 },
1481 { /* 405EXr Rev. D without Security */
1482 .pvr_mask = 0xffff000f,
1483 .pvr_value = 0x12910000,
1484 .cpu_name = "405EXr Rev. D",
1485 .cpu_features = CPU_FTRS_40X,
1486 .cpu_user_features = PPC_FEATURE_32 |
1487 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1488 .mmu_features = MMU_FTR_TYPE_40x,
1489 .icache_bsize = 32,
1490 .dcache_bsize = 32,
1491 .machine_check = machine_check_4xx,
1492 .platform = "ppc405",
1493 },
1494 { /* 405EXr Rev. D with Security */
1495 .pvr_mask = 0xffff000f,
1496 .pvr_value = 0x12910002,
1497 .cpu_name = "405EXr Rev. D",
1498 .cpu_features = CPU_FTRS_40X,
1499 .cpu_user_features = PPC_FEATURE_32 |
1500 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1501 .mmu_features = MMU_FTR_TYPE_40x,
1502 .icache_bsize = 32,
1503 .dcache_bsize = 32,
1504 .machine_check = machine_check_4xx,
1505 .platform = "ppc405",
1506 },
1507 {
1508 /* 405EZ */
1509 .pvr_mask = 0xffff0000,
1510 .pvr_value = 0x41510000,
1511 .cpu_name = "405EZ",
1512 .cpu_features = CPU_FTRS_40X,
1513 .cpu_user_features = PPC_FEATURE_32 |
1514 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1515 .mmu_features = MMU_FTR_TYPE_40x,
1516 .icache_bsize = 32,
1517 .dcache_bsize = 32,
1518 .machine_check = machine_check_4xx,
1519 .platform = "ppc405",
1520 },
1521 { /* APM8018X */
1522 .pvr_mask = 0xffff0000,
1523 .pvr_value = 0x7ff11432,
1524 .cpu_name = "APM8018X",
1525 .cpu_features = CPU_FTRS_40X,
1526 .cpu_user_features = PPC_FEATURE_32 |
1527 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1528 .mmu_features = MMU_FTR_TYPE_40x,
1529 .icache_bsize = 32,
1530 .dcache_bsize = 32,
1531 .machine_check = machine_check_4xx,
1532 .platform = "ppc405",
1533 },
1534 { /* default match */
1535 .pvr_mask = 0x00000000,
1536 .pvr_value = 0x00000000,
1537 .cpu_name = "(generic 40x PPC)",
1538 .cpu_features = CPU_FTRS_40X,
1539 .cpu_user_features = PPC_FEATURE_32 |
1540 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1541 .mmu_features = MMU_FTR_TYPE_40x,
1542 .icache_bsize = 32,
1543 .dcache_bsize = 32,
1544 .machine_check = machine_check_4xx,
1545 .platform = "ppc405",
1546 }
1547
1548#endif /* CONFIG_40x */
1549#ifdef CONFIG_44x
1550 {
1551 .pvr_mask = 0xf0000fff,
1552 .pvr_value = 0x40000850,
1553 .cpu_name = "440GR Rev. A",
1554 .cpu_features = CPU_FTRS_44X,
1555 .cpu_user_features = COMMON_USER_BOOKE,
1556 .mmu_features = MMU_FTR_TYPE_44x,
1557 .icache_bsize = 32,
1558 .dcache_bsize = 32,
1559 .machine_check = machine_check_4xx,
1560 .platform = "ppc440",
1561 },
1562 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1563 .pvr_mask = 0xf0000fff,
1564 .pvr_value = 0x40000858,
1565 .cpu_name = "440EP Rev. A",
1566 .cpu_features = CPU_FTRS_44X,
1567 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1568 .mmu_features = MMU_FTR_TYPE_44x,
1569 .icache_bsize = 32,
1570 .dcache_bsize = 32,
1571 .cpu_setup = __setup_cpu_440ep,
1572 .machine_check = machine_check_4xx,
1573 .platform = "ppc440",
1574 },
1575 {
1576 .pvr_mask = 0xf0000fff,
1577 .pvr_value = 0x400008d3,
1578 .cpu_name = "440GR Rev. B",
1579 .cpu_features = CPU_FTRS_44X,
1580 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1581 .mmu_features = MMU_FTR_TYPE_44x,
1582 .icache_bsize = 32,
1583 .dcache_bsize = 32,
1584 .machine_check = machine_check_4xx,
1585 .platform = "ppc440",
1586 },
1587 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1588 .pvr_mask = 0xf0000ff7,
1589 .pvr_value = 0x400008d4,
1590 .cpu_name = "440EP Rev. C",
1591 .cpu_features = CPU_FTRS_44X,
1592 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1593 .mmu_features = MMU_FTR_TYPE_44x,
1594 .icache_bsize = 32,
1595 .dcache_bsize = 32,
1596 .cpu_setup = __setup_cpu_440ep,
1597 .machine_check = machine_check_4xx,
1598 .platform = "ppc440",
1599 },
1600 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1601 .pvr_mask = 0xf0000fff,
1602 .pvr_value = 0x400008db,
1603 .cpu_name = "440EP Rev. B",
1604 .cpu_features = CPU_FTRS_44X,
1605 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1606 .mmu_features = MMU_FTR_TYPE_44x,
1607 .icache_bsize = 32,
1608 .dcache_bsize = 32,
1609 .cpu_setup = __setup_cpu_440ep,
1610 .machine_check = machine_check_4xx,
1611 .platform = "ppc440",
1612 },
1613 { /* 440GRX */
1614 .pvr_mask = 0xf0000ffb,
1615 .pvr_value = 0x200008D0,
1616 .cpu_name = "440GRX",
1617 .cpu_features = CPU_FTRS_44X,
1618 .cpu_user_features = COMMON_USER_BOOKE,
1619 .mmu_features = MMU_FTR_TYPE_44x,
1620 .icache_bsize = 32,
1621 .dcache_bsize = 32,
1622 .cpu_setup = __setup_cpu_440grx,
1623 .machine_check = machine_check_440A,
1624 .platform = "ppc440",
1625 },
1626 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1627 .pvr_mask = 0xf0000ffb,
1628 .pvr_value = 0x200008D8,
1629 .cpu_name = "440EPX",
1630 .cpu_features = CPU_FTRS_44X,
1631 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1632 .mmu_features = MMU_FTR_TYPE_44x,
1633 .icache_bsize = 32,
1634 .dcache_bsize = 32,
1635 .cpu_setup = __setup_cpu_440epx,
1636 .machine_check = machine_check_440A,
1637 .platform = "ppc440",
1638 },
1639 { /* 440GP Rev. B */
1640 .pvr_mask = 0xf0000fff,
1641 .pvr_value = 0x40000440,
1642 .cpu_name = "440GP Rev. B",
1643 .cpu_features = CPU_FTRS_44X,
1644 .cpu_user_features = COMMON_USER_BOOKE,
1645 .mmu_features = MMU_FTR_TYPE_44x,
1646 .icache_bsize = 32,
1647 .dcache_bsize = 32,
1648 .machine_check = machine_check_4xx,
1649 .platform = "ppc440gp",
1650 },
1651 { /* 440GP Rev. C */
1652 .pvr_mask = 0xf0000fff,
1653 .pvr_value = 0x40000481,
1654 .cpu_name = "440GP Rev. C",
1655 .cpu_features = CPU_FTRS_44X,
1656 .cpu_user_features = COMMON_USER_BOOKE,
1657 .mmu_features = MMU_FTR_TYPE_44x,
1658 .icache_bsize = 32,
1659 .dcache_bsize = 32,
1660 .machine_check = machine_check_4xx,
1661 .platform = "ppc440gp",
1662 },
1663 { /* 440GX Rev. A */
1664 .pvr_mask = 0xf0000fff,
1665 .pvr_value = 0x50000850,
1666 .cpu_name = "440GX Rev. A",
1667 .cpu_features = CPU_FTRS_44X,
1668 .cpu_user_features = COMMON_USER_BOOKE,
1669 .mmu_features = MMU_FTR_TYPE_44x,
1670 .icache_bsize = 32,
1671 .dcache_bsize = 32,
1672 .cpu_setup = __setup_cpu_440gx,
1673 .machine_check = machine_check_440A,
1674 .platform = "ppc440",
1675 },
1676 { /* 440GX Rev. B */
1677 .pvr_mask = 0xf0000fff,
1678 .pvr_value = 0x50000851,
1679 .cpu_name = "440GX Rev. B",
1680 .cpu_features = CPU_FTRS_44X,
1681 .cpu_user_features = COMMON_USER_BOOKE,
1682 .mmu_features = MMU_FTR_TYPE_44x,
1683 .icache_bsize = 32,
1684 .dcache_bsize = 32,
1685 .cpu_setup = __setup_cpu_440gx,
1686 .machine_check = machine_check_440A,
1687 .platform = "ppc440",
1688 },
1689 { /* 440GX Rev. C */
1690 .pvr_mask = 0xf0000fff,
1691 .pvr_value = 0x50000892,
1692 .cpu_name = "440GX Rev. C",
1693 .cpu_features = CPU_FTRS_44X,
1694 .cpu_user_features = COMMON_USER_BOOKE,
1695 .mmu_features = MMU_FTR_TYPE_44x,
1696 .icache_bsize = 32,
1697 .dcache_bsize = 32,
1698 .cpu_setup = __setup_cpu_440gx,
1699 .machine_check = machine_check_440A,
1700 .platform = "ppc440",
1701 },
1702 { /* 440GX Rev. F */
1703 .pvr_mask = 0xf0000fff,
1704 .pvr_value = 0x50000894,
1705 .cpu_name = "440GX Rev. F",
1706 .cpu_features = CPU_FTRS_44X,
1707 .cpu_user_features = COMMON_USER_BOOKE,
1708 .mmu_features = MMU_FTR_TYPE_44x,
1709 .icache_bsize = 32,
1710 .dcache_bsize = 32,
1711 .cpu_setup = __setup_cpu_440gx,
1712 .machine_check = machine_check_440A,
1713 .platform = "ppc440",
1714 },
1715 { /* 440SP Rev. A */
1716 .pvr_mask = 0xfff00fff,
1717 .pvr_value = 0x53200891,
1718 .cpu_name = "440SP Rev. A",
1719 .cpu_features = CPU_FTRS_44X,
1720 .cpu_user_features = COMMON_USER_BOOKE,
1721 .mmu_features = MMU_FTR_TYPE_44x,
1722 .icache_bsize = 32,
1723 .dcache_bsize = 32,
1724 .machine_check = machine_check_4xx,
1725 .platform = "ppc440",
1726 },
1727 { /* 440SPe Rev. A */
1728 .pvr_mask = 0xfff00fff,
1729 .pvr_value = 0x53400890,
1730 .cpu_name = "440SPe Rev. A",
1731 .cpu_features = CPU_FTRS_44X,
1732 .cpu_user_features = COMMON_USER_BOOKE,
1733 .mmu_features = MMU_FTR_TYPE_44x,
1734 .icache_bsize = 32,
1735 .dcache_bsize = 32,
1736 .cpu_setup = __setup_cpu_440spe,
1737 .machine_check = machine_check_440A,
1738 .platform = "ppc440",
1739 },
1740 { /* 440SPe Rev. B */
1741 .pvr_mask = 0xfff00fff,
1742 .pvr_value = 0x53400891,
1743 .cpu_name = "440SPe Rev. B",
1744 .cpu_features = CPU_FTRS_44X,
1745 .cpu_user_features = COMMON_USER_BOOKE,
1746 .mmu_features = MMU_FTR_TYPE_44x,
1747 .icache_bsize = 32,
1748 .dcache_bsize = 32,
1749 .cpu_setup = __setup_cpu_440spe,
1750 .machine_check = machine_check_440A,
1751 .platform = "ppc440",
1752 },
1753 { /* 460EX */
1754 .pvr_mask = 0xffff0006,
1755 .pvr_value = 0x13020002,
1756 .cpu_name = "460EX",
1757 .cpu_features = CPU_FTRS_440x6,
1758 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1759 .mmu_features = MMU_FTR_TYPE_44x,
1760 .icache_bsize = 32,
1761 .dcache_bsize = 32,
1762 .cpu_setup = __setup_cpu_460ex,
1763 .machine_check = machine_check_440A,
1764 .platform = "ppc440",
1765 },
1766 { /* 460EX Rev B */
1767 .pvr_mask = 0xffff0007,
1768 .pvr_value = 0x13020004,
1769 .cpu_name = "460EX Rev. B",
1770 .cpu_features = CPU_FTRS_440x6,
1771 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1772 .mmu_features = MMU_FTR_TYPE_44x,
1773 .icache_bsize = 32,
1774 .dcache_bsize = 32,
1775 .cpu_setup = __setup_cpu_460ex,
1776 .machine_check = machine_check_440A,
1777 .platform = "ppc440",
1778 },
1779 { /* 460GT */
1780 .pvr_mask = 0xffff0006,
1781 .pvr_value = 0x13020000,
1782 .cpu_name = "460GT",
1783 .cpu_features = CPU_FTRS_440x6,
1784 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1785 .mmu_features = MMU_FTR_TYPE_44x,
1786 .icache_bsize = 32,
1787 .dcache_bsize = 32,
1788 .cpu_setup = __setup_cpu_460gt,
1789 .machine_check = machine_check_440A,
1790 .platform = "ppc440",
1791 },
1792 { /* 460GT Rev B */
1793 .pvr_mask = 0xffff0007,
1794 .pvr_value = 0x13020005,
1795 .cpu_name = "460GT Rev. B",
1796 .cpu_features = CPU_FTRS_440x6,
1797 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1798 .mmu_features = MMU_FTR_TYPE_44x,
1799 .icache_bsize = 32,
1800 .dcache_bsize = 32,
1801 .cpu_setup = __setup_cpu_460gt,
1802 .machine_check = machine_check_440A,
1803 .platform = "ppc440",
1804 },
1805 { /* 460SX */
1806 .pvr_mask = 0xffffff00,
1807 .pvr_value = 0x13541800,
1808 .cpu_name = "460SX",
1809 .cpu_features = CPU_FTRS_44X,
1810 .cpu_user_features = COMMON_USER_BOOKE,
1811 .mmu_features = MMU_FTR_TYPE_44x,
1812 .icache_bsize = 32,
1813 .dcache_bsize = 32,
1814 .cpu_setup = __setup_cpu_460sx,
1815 .machine_check = machine_check_440A,
1816 .platform = "ppc440",
1817 },
1818 { /* 464 in APM821xx */
1819 .pvr_mask = 0xfffffff0,
1820 .pvr_value = 0x12C41C80,
1821 .cpu_name = "APM821XX",
1822 .cpu_features = CPU_FTRS_44X,
1823 .cpu_user_features = COMMON_USER_BOOKE |
1824 PPC_FEATURE_HAS_FPU,
1825 .mmu_features = MMU_FTR_TYPE_44x,
1826 .icache_bsize = 32,
1827 .dcache_bsize = 32,
1828 .cpu_setup = __setup_cpu_apm821xx,
1829 .machine_check = machine_check_440A,
1830 .platform = "ppc440",
1831 },
1832#ifdef CONFIG_PPC_47x
1833 { /* 476 DD2 core */
1834 .pvr_mask = 0xffffffff,
1835 .pvr_value = 0x11a52080,
1836 .cpu_name = "476",
1837 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1838 .cpu_user_features = COMMON_USER_BOOKE |
1839 PPC_FEATURE_HAS_FPU,
1840 .mmu_features = MMU_FTR_TYPE_47x |
1841 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1842 .icache_bsize = 32,
1843 .dcache_bsize = 128,
1844 .machine_check = machine_check_47x,
1845 .platform = "ppc470",
1846 },
1847 { /* 476fpe */
1848 .pvr_mask = 0xffff0000,
1849 .pvr_value = 0x7ff50000,
1850 .cpu_name = "476fpe",
1851 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1852 .cpu_user_features = COMMON_USER_BOOKE |
1853 PPC_FEATURE_HAS_FPU,
1854 .mmu_features = MMU_FTR_TYPE_47x |
1855 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1856 .icache_bsize = 32,
1857 .dcache_bsize = 128,
1858 .machine_check = machine_check_47x,
1859 .platform = "ppc470",
1860 },
1861 { /* 476 iss */
1862 .pvr_mask = 0xffff0000,
1863 .pvr_value = 0x00050000,
1864 .cpu_name = "476",
1865 .cpu_features = CPU_FTRS_47X,
1866 .cpu_user_features = COMMON_USER_BOOKE |
1867 PPC_FEATURE_HAS_FPU,
1868 .mmu_features = MMU_FTR_TYPE_47x |
1869 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1870 .icache_bsize = 32,
1871 .dcache_bsize = 128,
1872 .machine_check = machine_check_47x,
1873 .platform = "ppc470",
1874 },
1875 { /* 476 others */
1876 .pvr_mask = 0xffff0000,
1877 .pvr_value = 0x11a50000,
1878 .cpu_name = "476",
1879 .cpu_features = CPU_FTRS_47X,
1880 .cpu_user_features = COMMON_USER_BOOKE |
1881 PPC_FEATURE_HAS_FPU,
1882 .mmu_features = MMU_FTR_TYPE_47x |
1883 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1884 .icache_bsize = 32,
1885 .dcache_bsize = 128,
1886 .machine_check = machine_check_47x,
1887 .platform = "ppc470",
1888 },
1889#endif /* CONFIG_PPC_47x */
1890 { /* default match */
1891 .pvr_mask = 0x00000000,
1892 .pvr_value = 0x00000000,
1893 .cpu_name = "(generic 44x PPC)",
1894 .cpu_features = CPU_FTRS_44X,
1895 .cpu_user_features = COMMON_USER_BOOKE,
1896 .mmu_features = MMU_FTR_TYPE_44x,
1897 .icache_bsize = 32,
1898 .dcache_bsize = 32,
1899 .machine_check = machine_check_4xx,
1900 .platform = "ppc440",
1901 }
1902#endif /* CONFIG_44x */
1903#ifdef CONFIG_E200
1904 { /* e200z5 */
1905 .pvr_mask = 0xfff00000,
1906 .pvr_value = 0x81000000,
1907 .cpu_name = "e200z5",
1908 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1909 .cpu_features = CPU_FTRS_E200,
1910 .cpu_user_features = COMMON_USER_BOOKE |
1911 PPC_FEATURE_HAS_EFP_SINGLE |
1912 PPC_FEATURE_UNIFIED_CACHE,
1913 .mmu_features = MMU_FTR_TYPE_FSL_E,
1914 .dcache_bsize = 32,
1915 .machine_check = machine_check_e200,
1916 .platform = "ppc5554",
1917 },
1918 { /* e200z6 */
1919 .pvr_mask = 0xfff00000,
1920 .pvr_value = 0x81100000,
1921 .cpu_name = "e200z6",
1922 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1923 .cpu_features = CPU_FTRS_E200,
1924 .cpu_user_features = COMMON_USER_BOOKE |
1925 PPC_FEATURE_HAS_SPE_COMP |
1926 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1927 PPC_FEATURE_UNIFIED_CACHE,
1928 .mmu_features = MMU_FTR_TYPE_FSL_E,
1929 .dcache_bsize = 32,
1930 .machine_check = machine_check_e200,
1931 .platform = "ppc5554",
1932 },
1933 { /* default match */
1934 .pvr_mask = 0x00000000,
1935 .pvr_value = 0x00000000,
1936 .cpu_name = "(generic E200 PPC)",
1937 .cpu_features = CPU_FTRS_E200,
1938 .cpu_user_features = COMMON_USER_BOOKE |
1939 PPC_FEATURE_HAS_EFP_SINGLE |
1940 PPC_FEATURE_UNIFIED_CACHE,
1941 .mmu_features = MMU_FTR_TYPE_FSL_E,
1942 .dcache_bsize = 32,
1943 .cpu_setup = __setup_cpu_e200,
1944 .machine_check = machine_check_e200,
1945 .platform = "ppc5554",
1946 }
1947#endif /* CONFIG_E200 */
1948#endif /* CONFIG_PPC32 */
1949#ifdef CONFIG_E500
1950#ifdef CONFIG_PPC32
1951#ifndef CONFIG_PPC_E500MC
1952 { /* e500 */
1953 .pvr_mask = 0xffff0000,
1954 .pvr_value = 0x80200000,
1955 .cpu_name = "e500",
1956 .cpu_features = CPU_FTRS_E500,
1957 .cpu_user_features = COMMON_USER_BOOKE |
1958 PPC_FEATURE_HAS_SPE_COMP |
1959 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
1960 .cpu_user_features2 = PPC_FEATURE2_ISEL,
1961 .mmu_features = MMU_FTR_TYPE_FSL_E,
1962 .icache_bsize = 32,
1963 .dcache_bsize = 32,
1964 .num_pmcs = 4,
1965 .oprofile_cpu_type = "ppc/e500",
1966 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1967 .cpu_setup = __setup_cpu_e500v1,
1968 .machine_check = machine_check_e500,
1969 .platform = "ppc8540",
1970 },
1971 { /* e500v2 */
1972 .pvr_mask = 0xffff0000,
1973 .pvr_value = 0x80210000,
1974 .cpu_name = "e500v2",
1975 .cpu_features = CPU_FTRS_E500_2,
1976 .cpu_user_features = COMMON_USER_BOOKE |
1977 PPC_FEATURE_HAS_SPE_COMP |
1978 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
1979 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
1980 .cpu_user_features2 = PPC_FEATURE2_ISEL,
1981 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
1982 .icache_bsize = 32,
1983 .dcache_bsize = 32,
1984 .num_pmcs = 4,
1985 .oprofile_cpu_type = "ppc/e500",
1986 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1987 .cpu_setup = __setup_cpu_e500v2,
1988 .machine_check = machine_check_e500,
1989 .platform = "ppc8548",
1990 .cpu_down_flush = cpu_down_flush_e500v2,
1991 },
1992#else
1993 { /* e500mc */
1994 .pvr_mask = 0xffff0000,
1995 .pvr_value = 0x80230000,
1996 .cpu_name = "e500mc",
1997 .cpu_features = CPU_FTRS_E500MC,
1998 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1999 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2000 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2001 MMU_FTR_USE_TLBILX,
2002 .icache_bsize = 64,
2003 .dcache_bsize = 64,
2004 .num_pmcs = 4,
2005 .oprofile_cpu_type = "ppc/e500mc",
2006 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2007 .cpu_setup = __setup_cpu_e500mc,
2008 .machine_check = machine_check_e500mc,
2009 .platform = "ppce500mc",
2010 .cpu_down_flush = cpu_down_flush_e500mc,
2011 },
2012#endif /* CONFIG_PPC_E500MC */
2013#endif /* CONFIG_PPC32 */
2014#ifdef CONFIG_PPC_E500MC
2015 { /* e5500 */
2016 .pvr_mask = 0xffff0000,
2017 .pvr_value = 0x80240000,
2018 .cpu_name = "e5500",
2019 .cpu_features = CPU_FTRS_E5500,
2020 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2021 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2022 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2023 MMU_FTR_USE_TLBILX,
2024 .icache_bsize = 64,
2025 .dcache_bsize = 64,
2026 .num_pmcs = 4,
2027 .oprofile_cpu_type = "ppc/e500mc",
2028 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2029 .cpu_setup = __setup_cpu_e5500,
2030#ifndef CONFIG_PPC32
2031 .cpu_restore = __restore_cpu_e5500,
2032#endif
2033 .machine_check = machine_check_e500mc,
2034 .platform = "ppce5500",
2035 .cpu_down_flush = cpu_down_flush_e5500,
2036 },
2037 { /* e6500 */
2038 .pvr_mask = 0xffff0000,
2039 .pvr_value = 0x80400000,
2040 .cpu_name = "e6500",
2041 .cpu_features = CPU_FTRS_E6500,
2042 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2043 PPC_FEATURE_HAS_ALTIVEC_COMP,
2044 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2045 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2046 MMU_FTR_USE_TLBILX,
2047 .icache_bsize = 64,
2048 .dcache_bsize = 64,
2049 .num_pmcs = 6,
2050 .oprofile_cpu_type = "ppc/e6500",
2051 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2052 .cpu_setup = __setup_cpu_e6500,
2053#ifndef CONFIG_PPC32
2054 .cpu_restore = __restore_cpu_e6500,
2055#endif
2056 .machine_check = machine_check_e500mc,
2057 .platform = "ppce6500",
2058 .cpu_down_flush = cpu_down_flush_e6500,
2059 },
2060#endif /* CONFIG_PPC_E500MC */
2061#ifdef CONFIG_PPC32
2062 { /* default match */
2063 .pvr_mask = 0x00000000,
2064 .pvr_value = 0x00000000,
2065 .cpu_name = "(generic E500 PPC)",
2066 .cpu_features = CPU_FTRS_E500,
2067 .cpu_user_features = COMMON_USER_BOOKE |
2068 PPC_FEATURE_HAS_SPE_COMP |
2069 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2070 .mmu_features = MMU_FTR_TYPE_FSL_E,
2071 .icache_bsize = 32,
2072 .dcache_bsize = 32,
2073 .machine_check = machine_check_e500,
2074 .platform = "powerpc",
2075 }
2076#endif /* CONFIG_PPC32 */
2077#endif /* CONFIG_E500 */
2078};
2079
2080void __init set_cur_cpu_spec(struct cpu_spec *s)
2081{
2082 struct cpu_spec *t = &the_cpu_spec;
2083
2084 t = PTRRELOC(t);
2085 /*
2086 * use memcpy() instead of *t = *s so that GCC replaces it
2087 * by __memcpy() when KASAN is active
2088 */
2089 memcpy(t, s, sizeof(*t));
2090
2091 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2092}
2093
2094static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2095 struct cpu_spec *s)
2096{
2097 struct cpu_spec *t = &the_cpu_spec;
2098 struct cpu_spec old;
2099
2100 t = PTRRELOC(t);
2101 old = *t;
2102
2103 /*
2104 * Copy everything, then do fixups. Use memcpy() instead of *t = *s
2105 * so that GCC replaces it by __memcpy() when KASAN is active
2106 */
2107 memcpy(t, s, sizeof(*t));
2108
2109 /*
2110 * If we are overriding a previous value derived from the real
2111 * PVR with a new value obtained using a logical PVR value,
2112 * don't modify the performance monitor fields.
2113 */
2114 if (old.num_pmcs && !s->num_pmcs) {
2115 t->num_pmcs = old.num_pmcs;
2116 t->pmc_type = old.pmc_type;
2117 t->oprofile_type = old.oprofile_type;
2118 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2119 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2120 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2121
2122 /*
2123 * If we have passed through this logic once before and
2124 * have pulled the default case because the real PVR was
2125 * not found inside cpu_specs[], then we are possibly
2126 * running in compatibility mode. In that case, let the
2127 * oprofiler know which set of compatibility counters to
2128 * pull from by making sure the oprofile_cpu_type string
2129 * is set to that of compatibility mode. If the
2130 * oprofile_cpu_type already has a value, then we are
2131 * possibly overriding a real PVR with a logical one,
2132 * and, in that case, keep the current value for
2133 * oprofile_cpu_type. Futhermore, let's ensure that the
2134 * fix for the PMAO bug is enabled on compatibility mode.
2135 */
2136 if (old.oprofile_cpu_type != NULL) {
2137 t->oprofile_cpu_type = old.oprofile_cpu_type;
2138 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
2139 }
2140 }
2141
2142 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2143
2144 /*
2145 * Set the base platform string once; assumes
2146 * we're called with real pvr first.
2147 */
2148 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2149 *PTRRELOC(&powerpc_base_platform) = t->platform;
2150
2151#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2152 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2153 * that processor. I will consolidate that at a later time, for now,
2154 * just use #ifdef. We also don't need to PTRRELOC the function
2155 * pointer on ppc64 and booke as we are running at 0 in real mode
2156 * on ppc64 and reloc_offset is always 0 on booke.
2157 */
2158 if (t->cpu_setup) {
2159 t->cpu_setup(offset, t);
2160 }
2161#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2162
2163 return t;
2164}
2165
2166struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2167{
2168 struct cpu_spec *s = cpu_specs;
2169 int i;
2170
2171 s = PTRRELOC(s);
2172
2173 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2174 if ((pvr & s->pvr_mask) == s->pvr_value)
2175 return setup_cpu_spec(offset, s);
2176 }
2177
2178 BUG();
2179
2180 return NULL;
2181}
2182
2183/*
2184 * Used by cpufeatures to get the name for CPUs with a PVR table.
2185 * If they don't hae a PVR table, cpufeatures gets the name from
2186 * cpu device-tree node.
2187 */
2188void __init identify_cpu_name(unsigned int pvr)
2189{
2190 struct cpu_spec *s = cpu_specs;
2191 struct cpu_spec *t = &the_cpu_spec;
2192 int i;
2193
2194 s = PTRRELOC(s);
2195 t = PTRRELOC(t);
2196
2197 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2198 if ((pvr & s->pvr_mask) == s->pvr_value) {
2199 t->cpu_name = s->cpu_name;
2200 return;
2201 }
2202 }
2203}
2204
2205
2206#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2207struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2208 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2209};
2210EXPORT_SYMBOL_GPL(cpu_feature_keys);
2211
2212void __init cpu_feature_keys_init(void)
2213{
2214 int i;
2215
2216 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2217 unsigned long f = 1ul << i;
2218
2219 if (!(cur_cpu_spec->cpu_features & f))
2220 static_branch_disable(&cpu_feature_keys[i]);
2221 }
2222}
2223
2224struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2225 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2226};
2227EXPORT_SYMBOL_GPL(mmu_feature_keys);
2228
2229void __init mmu_feature_keys_init(void)
2230{
2231 int i;
2232
2233 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2234 unsigned long f = 1ul << i;
2235
2236 if (!(cur_cpu_spec->mmu_features & f))
2237 static_branch_disable(&mmu_feature_keys[i]);
2238 }
2239}
2240#endif