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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * Modifications for ppc64:
6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 */
8
9#include <linux/string.h>
10#include <linux/sched.h>
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/jump_label.h>
15#include <linux/of.h>
16
17#include <asm/cputable.h>
18#include <asm/mce.h>
19#include <asm/mmu.h>
20#include <asm/setup.h>
21#include <asm/cpu_setup.h>
22
23static struct cpu_spec the_cpu_spec __read_mostly;
24
25struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31#include "cpu_specs.h"
32
33void __init set_cur_cpu_spec(struct cpu_spec *s)
34{
35 struct cpu_spec *t = &the_cpu_spec;
36
37 t = PTRRELOC(t);
38 /*
39 * use memcpy() instead of *t = *s so that GCC replaces it
40 * by __memcpy() when KASAN is active
41 */
42 memcpy(t, s, sizeof(*t));
43
44 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
45}
46
47static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
48 struct cpu_spec *s)
49{
50 struct cpu_spec *t = &the_cpu_spec;
51 struct cpu_spec old;
52
53 t = PTRRELOC(t);
54 old = *t;
55
56 /*
57 * Copy everything, then do fixups. Use memcpy() instead of *t = *s
58 * so that GCC replaces it by __memcpy() when KASAN is active
59 */
60 memcpy(t, s, sizeof(*t));
61
62 /*
63 * If we are overriding a previous value derived from the real
64 * PVR with a new value obtained using a logical PVR value,
65 * don't modify the performance monitor fields.
66 */
67 if (old.num_pmcs && !s->num_pmcs) {
68 t->num_pmcs = old.num_pmcs;
69 t->pmc_type = old.pmc_type;
70
71 /*
72 * Let's ensure that the
73 * fix for the PMAO bug is enabled on compatibility mode.
74 */
75 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
76 }
77
78 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
79
80 /*
81 * Set the base platform string once; assumes
82 * we're called with real pvr first.
83 */
84 if (*PTRRELOC(&powerpc_base_platform) == NULL)
85 *PTRRELOC(&powerpc_base_platform) = t->platform;
86
87#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
88 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
89 * that processor. I will consolidate that at a later time, for now,
90 * just use #ifdef. We also don't need to PTRRELOC the function
91 * pointer on ppc64 and booke as we are running at 0 in real mode
92 * on ppc64 and reloc_offset is always 0 on booke.
93 */
94 if (t->cpu_setup) {
95 t->cpu_setup(offset, t);
96 }
97#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
98
99 return t;
100}
101
102struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
103{
104 struct cpu_spec *s = cpu_specs;
105 int i;
106
107 BUILD_BUG_ON(!ARRAY_SIZE(cpu_specs));
108
109 s = PTRRELOC(s);
110
111 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
112 if ((pvr & s->pvr_mask) == s->pvr_value)
113 return setup_cpu_spec(offset, s);
114 }
115
116 BUG();
117
118 return NULL;
119}
120
121/*
122 * Used by cpufeatures to get the name for CPUs with a PVR table.
123 * If they don't hae a PVR table, cpufeatures gets the name from
124 * cpu device-tree node.
125 */
126void __init identify_cpu_name(unsigned int pvr)
127{
128 struct cpu_spec *s = cpu_specs;
129 struct cpu_spec *t = &the_cpu_spec;
130 int i;
131
132 s = PTRRELOC(s);
133 t = PTRRELOC(t);
134
135 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
136 if ((pvr & s->pvr_mask) == s->pvr_value) {
137 t->cpu_name = s->cpu_name;
138 return;
139 }
140 }
141}
142
143
144#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
145struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
146 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
147};
148EXPORT_SYMBOL_GPL(cpu_feature_keys);
149
150void __init cpu_feature_keys_init(void)
151{
152 int i;
153
154 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
155 unsigned long f = 1ul << i;
156
157 if (!(cur_cpu_spec->cpu_features & f))
158 static_branch_disable(&cpu_feature_keys[i]);
159 }
160}
161
162struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
163 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
164};
165EXPORT_SYMBOL(mmu_feature_keys);
166
167void __init mmu_feature_keys_init(void)
168{
169 int i;
170
171 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
172 unsigned long f = 1ul << i;
173
174 if (!(cur_cpu_spec->mmu_features & f))
175 static_branch_disable(&mmu_feature_keys[i]);
176 }
177}
178#endif
1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/export.h>
18#include <linux/jump_label.h>
19
20#include <asm/oprofile_impl.h>
21#include <asm/cputable.h>
22#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
23#include <asm/mmu.h>
24#include <asm/setup.h>
25
26struct cpu_spec* cur_cpu_spec = NULL;
27EXPORT_SYMBOL(cur_cpu_spec);
28
29/* The platform string corresponding to the real PVR */
30const char *powerpc_base_platform;
31
32/* NOTE:
33 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
34 * the responsibility of the appropriate CPU save/restore functions to
35 * eventually copy these settings over. Those save/restore aren't yet
36 * part of the cputable though. That has to be fixed for both ppc32
37 * and ppc64
38 */
39#ifdef CONFIG_PPC32
40extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
49extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
51extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
52extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
53extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
54extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
55extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
56extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
57extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
58extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
59extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
60extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
61extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
62#endif /* CONFIG_PPC32 */
63#ifdef CONFIG_PPC64
64extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
65extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
66extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
67extern void __restore_cpu_pa6t(void);
68extern void __restore_cpu_ppc970(void);
69extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70extern void __restore_cpu_power7(void);
71extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72extern void __restore_cpu_power8(void);
73extern void __setup_cpu_power9(unsigned long offset, struct cpu_spec* spec);
74extern void __restore_cpu_power9(void);
75extern void __flush_tlb_power7(unsigned int action);
76extern void __flush_tlb_power8(unsigned int action);
77extern void __flush_tlb_power9(unsigned int action);
78extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
79extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
80#endif /* CONFIG_PPC64 */
81#if defined(CONFIG_E500)
82extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
83extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
84extern void __restore_cpu_e5500(void);
85extern void __restore_cpu_e6500(void);
86#endif /* CONFIG_E500 */
87
88/* This table only contains "desktop" CPUs, it need to be filled with embedded
89 * ones as well...
90 */
91#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
92 PPC_FEATURE_HAS_MMU)
93#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
94#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
95#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
99#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
100 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
101 PPC_FEATURE_TRUE_LE | \
102 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
103#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
104 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
105 PPC_FEATURE_TRUE_LE | \
106 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
107#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
108#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
109 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
110 PPC_FEATURE_TRUE_LE | \
111 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
112#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
113 PPC_FEATURE2_HTM_COMP | \
114 PPC_FEATURE2_HTM_NOSC_COMP | \
115 PPC_FEATURE2_DSCR | \
116 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR | \
117 PPC_FEATURE2_VEC_CRYPTO)
118#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
119 PPC_FEATURE_TRUE_LE | \
120 PPC_FEATURE_HAS_ALTIVEC_COMP)
121#define COMMON_USER_POWER9 COMMON_USER_POWER8
122#define COMMON_USER2_POWER9 (COMMON_USER2_POWER8 | \
123 PPC_FEATURE2_ARCH_3_00 | \
124 PPC_FEATURE2_HAS_IEEE128)
125
126#ifdef CONFIG_PPC_BOOK3E_64
127#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
128#else
129#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
130 PPC_FEATURE_BOOKE)
131#endif
132
133static struct cpu_spec __initdata cpu_specs[] = {
134#ifdef CONFIG_PPC_BOOK3S_64
135 { /* Power4 */
136 .pvr_mask = 0xffff0000,
137 .pvr_value = 0x00350000,
138 .cpu_name = "POWER4 (gp)",
139 .cpu_features = CPU_FTRS_POWER4,
140 .cpu_user_features = COMMON_USER_POWER4,
141 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
142 .icache_bsize = 128,
143 .dcache_bsize = 128,
144 .num_pmcs = 8,
145 .pmc_type = PPC_PMC_IBM,
146 .oprofile_cpu_type = "ppc64/power4",
147 .oprofile_type = PPC_OPROFILE_POWER4,
148 .platform = "power4",
149 },
150 { /* Power4+ */
151 .pvr_mask = 0xffff0000,
152 .pvr_value = 0x00380000,
153 .cpu_name = "POWER4+ (gq)",
154 .cpu_features = CPU_FTRS_POWER4,
155 .cpu_user_features = COMMON_USER_POWER4,
156 .mmu_features = MMU_FTRS_POWER4 | MMU_FTR_TLBIE_CROP_VA,
157 .icache_bsize = 128,
158 .dcache_bsize = 128,
159 .num_pmcs = 8,
160 .pmc_type = PPC_PMC_IBM,
161 .oprofile_cpu_type = "ppc64/power4",
162 .oprofile_type = PPC_OPROFILE_POWER4,
163 .platform = "power4",
164 },
165 { /* PPC970 */
166 .pvr_mask = 0xffff0000,
167 .pvr_value = 0x00390000,
168 .cpu_name = "PPC970",
169 .cpu_features = CPU_FTRS_PPC970,
170 .cpu_user_features = COMMON_USER_POWER4 |
171 PPC_FEATURE_HAS_ALTIVEC_COMP,
172 .mmu_features = MMU_FTRS_PPC970,
173 .icache_bsize = 128,
174 .dcache_bsize = 128,
175 .num_pmcs = 8,
176 .pmc_type = PPC_PMC_IBM,
177 .cpu_setup = __setup_cpu_ppc970,
178 .cpu_restore = __restore_cpu_ppc970,
179 .oprofile_cpu_type = "ppc64/970",
180 .oprofile_type = PPC_OPROFILE_POWER4,
181 .platform = "ppc970",
182 },
183 { /* PPC970FX */
184 .pvr_mask = 0xffff0000,
185 .pvr_value = 0x003c0000,
186 .cpu_name = "PPC970FX",
187 .cpu_features = CPU_FTRS_PPC970,
188 .cpu_user_features = COMMON_USER_POWER4 |
189 PPC_FEATURE_HAS_ALTIVEC_COMP,
190 .mmu_features = MMU_FTRS_PPC970,
191 .icache_bsize = 128,
192 .dcache_bsize = 128,
193 .num_pmcs = 8,
194 .pmc_type = PPC_PMC_IBM,
195 .cpu_setup = __setup_cpu_ppc970,
196 .cpu_restore = __restore_cpu_ppc970,
197 .oprofile_cpu_type = "ppc64/970",
198 .oprofile_type = PPC_OPROFILE_POWER4,
199 .platform = "ppc970",
200 },
201 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
202 .pvr_mask = 0xffffffff,
203 .pvr_value = 0x00440100,
204 .cpu_name = "PPC970MP",
205 .cpu_features = CPU_FTRS_PPC970,
206 .cpu_user_features = COMMON_USER_POWER4 |
207 PPC_FEATURE_HAS_ALTIVEC_COMP,
208 .mmu_features = MMU_FTRS_PPC970,
209 .icache_bsize = 128,
210 .dcache_bsize = 128,
211 .num_pmcs = 8,
212 .pmc_type = PPC_PMC_IBM,
213 .cpu_setup = __setup_cpu_ppc970,
214 .cpu_restore = __restore_cpu_ppc970,
215 .oprofile_cpu_type = "ppc64/970MP",
216 .oprofile_type = PPC_OPROFILE_POWER4,
217 .platform = "ppc970",
218 },
219 { /* PPC970MP */
220 .pvr_mask = 0xffff0000,
221 .pvr_value = 0x00440000,
222 .cpu_name = "PPC970MP",
223 .cpu_features = CPU_FTRS_PPC970,
224 .cpu_user_features = COMMON_USER_POWER4 |
225 PPC_FEATURE_HAS_ALTIVEC_COMP,
226 .mmu_features = MMU_FTRS_PPC970,
227 .icache_bsize = 128,
228 .dcache_bsize = 128,
229 .num_pmcs = 8,
230 .pmc_type = PPC_PMC_IBM,
231 .cpu_setup = __setup_cpu_ppc970MP,
232 .cpu_restore = __restore_cpu_ppc970,
233 .oprofile_cpu_type = "ppc64/970MP",
234 .oprofile_type = PPC_OPROFILE_POWER4,
235 .platform = "ppc970",
236 },
237 { /* PPC970GX */
238 .pvr_mask = 0xffff0000,
239 .pvr_value = 0x00450000,
240 .cpu_name = "PPC970GX",
241 .cpu_features = CPU_FTRS_PPC970,
242 .cpu_user_features = COMMON_USER_POWER4 |
243 PPC_FEATURE_HAS_ALTIVEC_COMP,
244 .mmu_features = MMU_FTRS_PPC970,
245 .icache_bsize = 128,
246 .dcache_bsize = 128,
247 .num_pmcs = 8,
248 .pmc_type = PPC_PMC_IBM,
249 .cpu_setup = __setup_cpu_ppc970,
250 .oprofile_cpu_type = "ppc64/970",
251 .oprofile_type = PPC_OPROFILE_POWER4,
252 .platform = "ppc970",
253 },
254 { /* Power5 GR */
255 .pvr_mask = 0xffff0000,
256 .pvr_value = 0x003a0000,
257 .cpu_name = "POWER5 (gr)",
258 .cpu_features = CPU_FTRS_POWER5,
259 .cpu_user_features = COMMON_USER_POWER5,
260 .mmu_features = MMU_FTRS_POWER5,
261 .icache_bsize = 128,
262 .dcache_bsize = 128,
263 .num_pmcs = 6,
264 .pmc_type = PPC_PMC_IBM,
265 .oprofile_cpu_type = "ppc64/power5",
266 .oprofile_type = PPC_OPROFILE_POWER4,
267 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
268 * and above but only works on POWER5 and above
269 */
270 .oprofile_mmcra_sihv = MMCRA_SIHV,
271 .oprofile_mmcra_sipr = MMCRA_SIPR,
272 .platform = "power5",
273 },
274 { /* Power5++ */
275 .pvr_mask = 0xffffff00,
276 .pvr_value = 0x003b0300,
277 .cpu_name = "POWER5+ (gs)",
278 .cpu_features = CPU_FTRS_POWER5,
279 .cpu_user_features = COMMON_USER_POWER5_PLUS,
280 .mmu_features = MMU_FTRS_POWER5,
281 .icache_bsize = 128,
282 .dcache_bsize = 128,
283 .num_pmcs = 6,
284 .oprofile_cpu_type = "ppc64/power5++",
285 .oprofile_type = PPC_OPROFILE_POWER4,
286 .oprofile_mmcra_sihv = MMCRA_SIHV,
287 .oprofile_mmcra_sipr = MMCRA_SIPR,
288 .platform = "power5+",
289 },
290 { /* Power5 GS */
291 .pvr_mask = 0xffff0000,
292 .pvr_value = 0x003b0000,
293 .cpu_name = "POWER5+ (gs)",
294 .cpu_features = CPU_FTRS_POWER5,
295 .cpu_user_features = COMMON_USER_POWER5_PLUS,
296 .mmu_features = MMU_FTRS_POWER5,
297 .icache_bsize = 128,
298 .dcache_bsize = 128,
299 .num_pmcs = 6,
300 .pmc_type = PPC_PMC_IBM,
301 .oprofile_cpu_type = "ppc64/power5+",
302 .oprofile_type = PPC_OPROFILE_POWER4,
303 .oprofile_mmcra_sihv = MMCRA_SIHV,
304 .oprofile_mmcra_sipr = MMCRA_SIPR,
305 .platform = "power5+",
306 },
307 { /* POWER6 in P5+ mode; 2.04-compliant processor */
308 .pvr_mask = 0xffffffff,
309 .pvr_value = 0x0f000001,
310 .cpu_name = "POWER5+",
311 .cpu_features = CPU_FTRS_POWER5,
312 .cpu_user_features = COMMON_USER_POWER5_PLUS,
313 .mmu_features = MMU_FTRS_POWER5,
314 .icache_bsize = 128,
315 .dcache_bsize = 128,
316 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
317 .oprofile_type = PPC_OPROFILE_POWER4,
318 .platform = "power5+",
319 },
320 { /* Power6 */
321 .pvr_mask = 0xffff0000,
322 .pvr_value = 0x003e0000,
323 .cpu_name = "POWER6 (raw)",
324 .cpu_features = CPU_FTRS_POWER6,
325 .cpu_user_features = COMMON_USER_POWER6 |
326 PPC_FEATURE_POWER6_EXT,
327 .mmu_features = MMU_FTRS_POWER6,
328 .icache_bsize = 128,
329 .dcache_bsize = 128,
330 .num_pmcs = 6,
331 .pmc_type = PPC_PMC_IBM,
332 .oprofile_cpu_type = "ppc64/power6",
333 .oprofile_type = PPC_OPROFILE_POWER4,
334 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
335 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
336 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
337 POWER6_MMCRA_OTHER,
338 .platform = "power6x",
339 },
340 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
341 .pvr_mask = 0xffffffff,
342 .pvr_value = 0x0f000002,
343 .cpu_name = "POWER6 (architected)",
344 .cpu_features = CPU_FTRS_POWER6,
345 .cpu_user_features = COMMON_USER_POWER6,
346 .mmu_features = MMU_FTRS_POWER6,
347 .icache_bsize = 128,
348 .dcache_bsize = 128,
349 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
350 .oprofile_type = PPC_OPROFILE_POWER4,
351 .platform = "power6",
352 },
353 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
354 .pvr_mask = 0xffffffff,
355 .pvr_value = 0x0f000003,
356 .cpu_name = "POWER7 (architected)",
357 .cpu_features = CPU_FTRS_POWER7,
358 .cpu_user_features = COMMON_USER_POWER7,
359 .cpu_user_features2 = COMMON_USER2_POWER7,
360 .mmu_features = MMU_FTRS_POWER7,
361 .icache_bsize = 128,
362 .dcache_bsize = 128,
363 .oprofile_type = PPC_OPROFILE_POWER4,
364 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
365 .cpu_setup = __setup_cpu_power7,
366 .cpu_restore = __restore_cpu_power7,
367 .flush_tlb = __flush_tlb_power7,
368 .machine_check_early = __machine_check_early_realmode_p7,
369 .platform = "power7",
370 },
371 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
372 .pvr_mask = 0xffffffff,
373 .pvr_value = 0x0f000004,
374 .cpu_name = "POWER8 (architected)",
375 .cpu_features = CPU_FTRS_POWER8,
376 .cpu_user_features = COMMON_USER_POWER8,
377 .cpu_user_features2 = COMMON_USER2_POWER8,
378 .mmu_features = MMU_FTRS_POWER8,
379 .icache_bsize = 128,
380 .dcache_bsize = 128,
381 .oprofile_type = PPC_OPROFILE_INVALID,
382 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
383 .cpu_setup = __setup_cpu_power8,
384 .cpu_restore = __restore_cpu_power8,
385 .flush_tlb = __flush_tlb_power8,
386 .machine_check_early = __machine_check_early_realmode_p8,
387 .platform = "power8",
388 },
389 { /* Power7 */
390 .pvr_mask = 0xffff0000,
391 .pvr_value = 0x003f0000,
392 .cpu_name = "POWER7 (raw)",
393 .cpu_features = CPU_FTRS_POWER7,
394 .cpu_user_features = COMMON_USER_POWER7,
395 .cpu_user_features2 = COMMON_USER2_POWER7,
396 .mmu_features = MMU_FTRS_POWER7,
397 .icache_bsize = 128,
398 .dcache_bsize = 128,
399 .num_pmcs = 6,
400 .pmc_type = PPC_PMC_IBM,
401 .oprofile_cpu_type = "ppc64/power7",
402 .oprofile_type = PPC_OPROFILE_POWER4,
403 .cpu_setup = __setup_cpu_power7,
404 .cpu_restore = __restore_cpu_power7,
405 .flush_tlb = __flush_tlb_power7,
406 .machine_check_early = __machine_check_early_realmode_p7,
407 .platform = "power7",
408 },
409 { /* Power7+ */
410 .pvr_mask = 0xffff0000,
411 .pvr_value = 0x004A0000,
412 .cpu_name = "POWER7+ (raw)",
413 .cpu_features = CPU_FTRS_POWER7,
414 .cpu_user_features = COMMON_USER_POWER7,
415 .cpu_user_features2 = COMMON_USER2_POWER7,
416 .mmu_features = MMU_FTRS_POWER7,
417 .icache_bsize = 128,
418 .dcache_bsize = 128,
419 .num_pmcs = 6,
420 .pmc_type = PPC_PMC_IBM,
421 .oprofile_cpu_type = "ppc64/power7",
422 .oprofile_type = PPC_OPROFILE_POWER4,
423 .cpu_setup = __setup_cpu_power7,
424 .cpu_restore = __restore_cpu_power7,
425 .flush_tlb = __flush_tlb_power7,
426 .machine_check_early = __machine_check_early_realmode_p7,
427 .platform = "power7+",
428 },
429 { /* Power8E */
430 .pvr_mask = 0xffff0000,
431 .pvr_value = 0x004b0000,
432 .cpu_name = "POWER8E (raw)",
433 .cpu_features = CPU_FTRS_POWER8E,
434 .cpu_user_features = COMMON_USER_POWER8,
435 .cpu_user_features2 = COMMON_USER2_POWER8,
436 .mmu_features = MMU_FTRS_POWER8,
437 .icache_bsize = 128,
438 .dcache_bsize = 128,
439 .num_pmcs = 6,
440 .pmc_type = PPC_PMC_IBM,
441 .oprofile_cpu_type = "ppc64/power8",
442 .oprofile_type = PPC_OPROFILE_INVALID,
443 .cpu_setup = __setup_cpu_power8,
444 .cpu_restore = __restore_cpu_power8,
445 .flush_tlb = __flush_tlb_power8,
446 .machine_check_early = __machine_check_early_realmode_p8,
447 .platform = "power8",
448 },
449 { /* Power8NVL */
450 .pvr_mask = 0xffff0000,
451 .pvr_value = 0x004c0000,
452 .cpu_name = "POWER8NVL (raw)",
453 .cpu_features = CPU_FTRS_POWER8,
454 .cpu_user_features = COMMON_USER_POWER8,
455 .cpu_user_features2 = COMMON_USER2_POWER8,
456 .mmu_features = MMU_FTRS_POWER8,
457 .icache_bsize = 128,
458 .dcache_bsize = 128,
459 .num_pmcs = 6,
460 .pmc_type = PPC_PMC_IBM,
461 .oprofile_cpu_type = "ppc64/power8",
462 .oprofile_type = PPC_OPROFILE_INVALID,
463 .cpu_setup = __setup_cpu_power8,
464 .cpu_restore = __restore_cpu_power8,
465 .flush_tlb = __flush_tlb_power8,
466 .machine_check_early = __machine_check_early_realmode_p8,
467 .platform = "power8",
468 },
469 { /* Power8 DD1: Does not support doorbell IPIs */
470 .pvr_mask = 0xffffff00,
471 .pvr_value = 0x004d0100,
472 .cpu_name = "POWER8 (raw)",
473 .cpu_features = CPU_FTRS_POWER8_DD1,
474 .cpu_user_features = COMMON_USER_POWER8,
475 .cpu_user_features2 = COMMON_USER2_POWER8,
476 .mmu_features = MMU_FTRS_POWER8,
477 .icache_bsize = 128,
478 .dcache_bsize = 128,
479 .num_pmcs = 6,
480 .pmc_type = PPC_PMC_IBM,
481 .oprofile_cpu_type = "ppc64/power8",
482 .oprofile_type = PPC_OPROFILE_INVALID,
483 .cpu_setup = __setup_cpu_power8,
484 .cpu_restore = __restore_cpu_power8,
485 .flush_tlb = __flush_tlb_power8,
486 .machine_check_early = __machine_check_early_realmode_p8,
487 .platform = "power8",
488 },
489 { /* Power8 */
490 .pvr_mask = 0xffff0000,
491 .pvr_value = 0x004d0000,
492 .cpu_name = "POWER8 (raw)",
493 .cpu_features = CPU_FTRS_POWER8,
494 .cpu_user_features = COMMON_USER_POWER8,
495 .cpu_user_features2 = COMMON_USER2_POWER8,
496 .mmu_features = MMU_FTRS_POWER8,
497 .icache_bsize = 128,
498 .dcache_bsize = 128,
499 .num_pmcs = 6,
500 .pmc_type = PPC_PMC_IBM,
501 .oprofile_cpu_type = "ppc64/power8",
502 .oprofile_type = PPC_OPROFILE_INVALID,
503 .cpu_setup = __setup_cpu_power8,
504 .cpu_restore = __restore_cpu_power8,
505 .flush_tlb = __flush_tlb_power8,
506 .machine_check_early = __machine_check_early_realmode_p8,
507 .platform = "power8",
508 },
509 { /* Power9 DD1*/
510 .pvr_mask = 0xffffff00,
511 .pvr_value = 0x004e0100,
512 .cpu_name = "POWER9 (raw)",
513 .cpu_features = CPU_FTRS_POWER9_DD1,
514 .cpu_user_features = COMMON_USER_POWER9,
515 .cpu_user_features2 = COMMON_USER2_POWER9,
516 .mmu_features = MMU_FTRS_POWER9,
517 .icache_bsize = 128,
518 .dcache_bsize = 128,
519 .num_pmcs = 6,
520 .pmc_type = PPC_PMC_IBM,
521 .oprofile_cpu_type = "ppc64/power9",
522 .oprofile_type = PPC_OPROFILE_INVALID,
523 .cpu_setup = __setup_cpu_power9,
524 .cpu_restore = __restore_cpu_power9,
525 .flush_tlb = __flush_tlb_power9,
526 .platform = "power9",
527 },
528 { /* Power9 */
529 .pvr_mask = 0xffff0000,
530 .pvr_value = 0x004e0000,
531 .cpu_name = "POWER9 (raw)",
532 .cpu_features = CPU_FTRS_POWER9,
533 .cpu_user_features = COMMON_USER_POWER9,
534 .cpu_user_features2 = COMMON_USER2_POWER9,
535 .mmu_features = MMU_FTRS_POWER9,
536 .icache_bsize = 128,
537 .dcache_bsize = 128,
538 .num_pmcs = 6,
539 .pmc_type = PPC_PMC_IBM,
540 .oprofile_cpu_type = "ppc64/power9",
541 .oprofile_type = PPC_OPROFILE_INVALID,
542 .cpu_setup = __setup_cpu_power9,
543 .cpu_restore = __restore_cpu_power9,
544 .flush_tlb = __flush_tlb_power9,
545 .platform = "power9",
546 },
547 { /* Cell Broadband Engine */
548 .pvr_mask = 0xffff0000,
549 .pvr_value = 0x00700000,
550 .cpu_name = "Cell Broadband Engine",
551 .cpu_features = CPU_FTRS_CELL,
552 .cpu_user_features = COMMON_USER_PPC64 |
553 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
554 PPC_FEATURE_SMT,
555 .mmu_features = MMU_FTRS_CELL,
556 .icache_bsize = 128,
557 .dcache_bsize = 128,
558 .num_pmcs = 4,
559 .pmc_type = PPC_PMC_IBM,
560 .oprofile_cpu_type = "ppc64/cell-be",
561 .oprofile_type = PPC_OPROFILE_CELL,
562 .platform = "ppc-cell-be",
563 },
564 { /* PA Semi PA6T */
565 .pvr_mask = 0x7fff0000,
566 .pvr_value = 0x00900000,
567 .cpu_name = "PA6T",
568 .cpu_features = CPU_FTRS_PA6T,
569 .cpu_user_features = COMMON_USER_PA6T,
570 .mmu_features = MMU_FTRS_PA6T,
571 .icache_bsize = 64,
572 .dcache_bsize = 64,
573 .num_pmcs = 6,
574 .pmc_type = PPC_PMC_PA6T,
575 .cpu_setup = __setup_cpu_pa6t,
576 .cpu_restore = __restore_cpu_pa6t,
577 .oprofile_cpu_type = "ppc64/pa6t",
578 .oprofile_type = PPC_OPROFILE_PA6T,
579 .platform = "pa6t",
580 },
581 { /* default match */
582 .pvr_mask = 0x00000000,
583 .pvr_value = 0x00000000,
584 .cpu_name = "POWER4 (compatible)",
585 .cpu_features = CPU_FTRS_COMPATIBLE,
586 .cpu_user_features = COMMON_USER_PPC64,
587 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
588 .icache_bsize = 128,
589 .dcache_bsize = 128,
590 .num_pmcs = 6,
591 .pmc_type = PPC_PMC_IBM,
592 .platform = "power4",
593 }
594#endif /* CONFIG_PPC_BOOK3S_64 */
595
596#ifdef CONFIG_PPC32
597#ifdef CONFIG_PPC_BOOK3S_32
598 { /* 601 */
599 .pvr_mask = 0xffff0000,
600 .pvr_value = 0x00010000,
601 .cpu_name = "601",
602 .cpu_features = CPU_FTRS_PPC601,
603 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
604 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
605 .mmu_features = MMU_FTR_HPTE_TABLE,
606 .icache_bsize = 32,
607 .dcache_bsize = 32,
608 .machine_check = machine_check_generic,
609 .platform = "ppc601",
610 },
611 { /* 603 */
612 .pvr_mask = 0xffff0000,
613 .pvr_value = 0x00030000,
614 .cpu_name = "603",
615 .cpu_features = CPU_FTRS_603,
616 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
617 .mmu_features = 0,
618 .icache_bsize = 32,
619 .dcache_bsize = 32,
620 .cpu_setup = __setup_cpu_603,
621 .machine_check = machine_check_generic,
622 .platform = "ppc603",
623 },
624 { /* 603e */
625 .pvr_mask = 0xffff0000,
626 .pvr_value = 0x00060000,
627 .cpu_name = "603e",
628 .cpu_features = CPU_FTRS_603,
629 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
630 .mmu_features = 0,
631 .icache_bsize = 32,
632 .dcache_bsize = 32,
633 .cpu_setup = __setup_cpu_603,
634 .machine_check = machine_check_generic,
635 .platform = "ppc603",
636 },
637 { /* 603ev */
638 .pvr_mask = 0xffff0000,
639 .pvr_value = 0x00070000,
640 .cpu_name = "603ev",
641 .cpu_features = CPU_FTRS_603,
642 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
643 .mmu_features = 0,
644 .icache_bsize = 32,
645 .dcache_bsize = 32,
646 .cpu_setup = __setup_cpu_603,
647 .machine_check = machine_check_generic,
648 .platform = "ppc603",
649 },
650 { /* 604 */
651 .pvr_mask = 0xffff0000,
652 .pvr_value = 0x00040000,
653 .cpu_name = "604",
654 .cpu_features = CPU_FTRS_604,
655 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
656 .mmu_features = MMU_FTR_HPTE_TABLE,
657 .icache_bsize = 32,
658 .dcache_bsize = 32,
659 .num_pmcs = 2,
660 .cpu_setup = __setup_cpu_604,
661 .machine_check = machine_check_generic,
662 .platform = "ppc604",
663 },
664 { /* 604e */
665 .pvr_mask = 0xfffff000,
666 .pvr_value = 0x00090000,
667 .cpu_name = "604e",
668 .cpu_features = CPU_FTRS_604,
669 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
670 .mmu_features = MMU_FTR_HPTE_TABLE,
671 .icache_bsize = 32,
672 .dcache_bsize = 32,
673 .num_pmcs = 4,
674 .cpu_setup = __setup_cpu_604,
675 .machine_check = machine_check_generic,
676 .platform = "ppc604",
677 },
678 { /* 604r */
679 .pvr_mask = 0xffff0000,
680 .pvr_value = 0x00090000,
681 .cpu_name = "604r",
682 .cpu_features = CPU_FTRS_604,
683 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
684 .mmu_features = MMU_FTR_HPTE_TABLE,
685 .icache_bsize = 32,
686 .dcache_bsize = 32,
687 .num_pmcs = 4,
688 .cpu_setup = __setup_cpu_604,
689 .machine_check = machine_check_generic,
690 .platform = "ppc604",
691 },
692 { /* 604ev */
693 .pvr_mask = 0xffff0000,
694 .pvr_value = 0x000a0000,
695 .cpu_name = "604ev",
696 .cpu_features = CPU_FTRS_604,
697 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
698 .mmu_features = MMU_FTR_HPTE_TABLE,
699 .icache_bsize = 32,
700 .dcache_bsize = 32,
701 .num_pmcs = 4,
702 .cpu_setup = __setup_cpu_604,
703 .machine_check = machine_check_generic,
704 .platform = "ppc604",
705 },
706 { /* 740/750 (0x4202, don't support TAU ?) */
707 .pvr_mask = 0xffffffff,
708 .pvr_value = 0x00084202,
709 .cpu_name = "740/750",
710 .cpu_features = CPU_FTRS_740_NOTAU,
711 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
712 .mmu_features = MMU_FTR_HPTE_TABLE,
713 .icache_bsize = 32,
714 .dcache_bsize = 32,
715 .num_pmcs = 4,
716 .cpu_setup = __setup_cpu_750,
717 .machine_check = machine_check_generic,
718 .platform = "ppc750",
719 },
720 { /* 750CX (80100 and 8010x?) */
721 .pvr_mask = 0xfffffff0,
722 .pvr_value = 0x00080100,
723 .cpu_name = "750CX",
724 .cpu_features = CPU_FTRS_750,
725 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
726 .mmu_features = MMU_FTR_HPTE_TABLE,
727 .icache_bsize = 32,
728 .dcache_bsize = 32,
729 .num_pmcs = 4,
730 .cpu_setup = __setup_cpu_750cx,
731 .machine_check = machine_check_generic,
732 .platform = "ppc750",
733 },
734 { /* 750CX (82201 and 82202) */
735 .pvr_mask = 0xfffffff0,
736 .pvr_value = 0x00082200,
737 .cpu_name = "750CX",
738 .cpu_features = CPU_FTRS_750,
739 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
740 .mmu_features = MMU_FTR_HPTE_TABLE,
741 .icache_bsize = 32,
742 .dcache_bsize = 32,
743 .num_pmcs = 4,
744 .pmc_type = PPC_PMC_IBM,
745 .cpu_setup = __setup_cpu_750cx,
746 .machine_check = machine_check_generic,
747 .platform = "ppc750",
748 },
749 { /* 750CXe (82214) */
750 .pvr_mask = 0xfffffff0,
751 .pvr_value = 0x00082210,
752 .cpu_name = "750CXe",
753 .cpu_features = CPU_FTRS_750,
754 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
755 .mmu_features = MMU_FTR_HPTE_TABLE,
756 .icache_bsize = 32,
757 .dcache_bsize = 32,
758 .num_pmcs = 4,
759 .pmc_type = PPC_PMC_IBM,
760 .cpu_setup = __setup_cpu_750cx,
761 .machine_check = machine_check_generic,
762 .platform = "ppc750",
763 },
764 { /* 750CXe "Gekko" (83214) */
765 .pvr_mask = 0xffffffff,
766 .pvr_value = 0x00083214,
767 .cpu_name = "750CXe",
768 .cpu_features = CPU_FTRS_750,
769 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
770 .mmu_features = MMU_FTR_HPTE_TABLE,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 .num_pmcs = 4,
774 .pmc_type = PPC_PMC_IBM,
775 .cpu_setup = __setup_cpu_750cx,
776 .machine_check = machine_check_generic,
777 .platform = "ppc750",
778 },
779 { /* 750CL (and "Broadway") */
780 .pvr_mask = 0xfffff0e0,
781 .pvr_value = 0x00087000,
782 .cpu_name = "750CL",
783 .cpu_features = CPU_FTRS_750CL,
784 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
785 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
786 .icache_bsize = 32,
787 .dcache_bsize = 32,
788 .num_pmcs = 4,
789 .pmc_type = PPC_PMC_IBM,
790 .cpu_setup = __setup_cpu_750,
791 .machine_check = machine_check_generic,
792 .platform = "ppc750",
793 .oprofile_cpu_type = "ppc/750",
794 .oprofile_type = PPC_OPROFILE_G4,
795 },
796 { /* 745/755 */
797 .pvr_mask = 0xfffff000,
798 .pvr_value = 0x00083000,
799 .cpu_name = "745/755",
800 .cpu_features = CPU_FTRS_750,
801 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
802 .mmu_features = MMU_FTR_HPTE_TABLE,
803 .icache_bsize = 32,
804 .dcache_bsize = 32,
805 .num_pmcs = 4,
806 .pmc_type = PPC_PMC_IBM,
807 .cpu_setup = __setup_cpu_750,
808 .machine_check = machine_check_generic,
809 .platform = "ppc750",
810 },
811 { /* 750FX rev 1.x */
812 .pvr_mask = 0xffffff00,
813 .pvr_value = 0x70000100,
814 .cpu_name = "750FX",
815 .cpu_features = CPU_FTRS_750FX1,
816 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
817 .mmu_features = MMU_FTR_HPTE_TABLE,
818 .icache_bsize = 32,
819 .dcache_bsize = 32,
820 .num_pmcs = 4,
821 .pmc_type = PPC_PMC_IBM,
822 .cpu_setup = __setup_cpu_750,
823 .machine_check = machine_check_generic,
824 .platform = "ppc750",
825 .oprofile_cpu_type = "ppc/750",
826 .oprofile_type = PPC_OPROFILE_G4,
827 },
828 { /* 750FX rev 2.0 must disable HID0[DPM] */
829 .pvr_mask = 0xffffffff,
830 .pvr_value = 0x70000200,
831 .cpu_name = "750FX",
832 .cpu_features = CPU_FTRS_750FX2,
833 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
834 .mmu_features = MMU_FTR_HPTE_TABLE,
835 .icache_bsize = 32,
836 .dcache_bsize = 32,
837 .num_pmcs = 4,
838 .pmc_type = PPC_PMC_IBM,
839 .cpu_setup = __setup_cpu_750,
840 .machine_check = machine_check_generic,
841 .platform = "ppc750",
842 .oprofile_cpu_type = "ppc/750",
843 .oprofile_type = PPC_OPROFILE_G4,
844 },
845 { /* 750FX (All revs except 2.0) */
846 .pvr_mask = 0xffff0000,
847 .pvr_value = 0x70000000,
848 .cpu_name = "750FX",
849 .cpu_features = CPU_FTRS_750FX,
850 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
851 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
852 .icache_bsize = 32,
853 .dcache_bsize = 32,
854 .num_pmcs = 4,
855 .pmc_type = PPC_PMC_IBM,
856 .cpu_setup = __setup_cpu_750fx,
857 .machine_check = machine_check_generic,
858 .platform = "ppc750",
859 .oprofile_cpu_type = "ppc/750",
860 .oprofile_type = PPC_OPROFILE_G4,
861 },
862 { /* 750GX */
863 .pvr_mask = 0xffff0000,
864 .pvr_value = 0x70020000,
865 .cpu_name = "750GX",
866 .cpu_features = CPU_FTRS_750GX,
867 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
868 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 .num_pmcs = 4,
872 .pmc_type = PPC_PMC_IBM,
873 .cpu_setup = __setup_cpu_750fx,
874 .machine_check = machine_check_generic,
875 .platform = "ppc750",
876 .oprofile_cpu_type = "ppc/750",
877 .oprofile_type = PPC_OPROFILE_G4,
878 },
879 { /* 740/750 (L2CR bit need fixup for 740) */
880 .pvr_mask = 0xffff0000,
881 .pvr_value = 0x00080000,
882 .cpu_name = "740/750",
883 .cpu_features = CPU_FTRS_740,
884 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
885 .mmu_features = MMU_FTR_HPTE_TABLE,
886 .icache_bsize = 32,
887 .dcache_bsize = 32,
888 .num_pmcs = 4,
889 .pmc_type = PPC_PMC_IBM,
890 .cpu_setup = __setup_cpu_750,
891 .machine_check = machine_check_generic,
892 .platform = "ppc750",
893 },
894 { /* 7400 rev 1.1 ? (no TAU) */
895 .pvr_mask = 0xffffffff,
896 .pvr_value = 0x000c1101,
897 .cpu_name = "7400 (1.1)",
898 .cpu_features = CPU_FTRS_7400_NOTAU,
899 .cpu_user_features = COMMON_USER |
900 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
901 .mmu_features = MMU_FTR_HPTE_TABLE,
902 .icache_bsize = 32,
903 .dcache_bsize = 32,
904 .num_pmcs = 4,
905 .pmc_type = PPC_PMC_G4,
906 .cpu_setup = __setup_cpu_7400,
907 .machine_check = machine_check_generic,
908 .platform = "ppc7400",
909 },
910 { /* 7400 */
911 .pvr_mask = 0xffff0000,
912 .pvr_value = 0x000c0000,
913 .cpu_name = "7400",
914 .cpu_features = CPU_FTRS_7400,
915 .cpu_user_features = COMMON_USER |
916 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
917 .mmu_features = MMU_FTR_HPTE_TABLE,
918 .icache_bsize = 32,
919 .dcache_bsize = 32,
920 .num_pmcs = 4,
921 .pmc_type = PPC_PMC_G4,
922 .cpu_setup = __setup_cpu_7400,
923 .machine_check = machine_check_generic,
924 .platform = "ppc7400",
925 },
926 { /* 7410 */
927 .pvr_mask = 0xffff0000,
928 .pvr_value = 0x800c0000,
929 .cpu_name = "7410",
930 .cpu_features = CPU_FTRS_7400,
931 .cpu_user_features = COMMON_USER |
932 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
933 .mmu_features = MMU_FTR_HPTE_TABLE,
934 .icache_bsize = 32,
935 .dcache_bsize = 32,
936 .num_pmcs = 4,
937 .pmc_type = PPC_PMC_G4,
938 .cpu_setup = __setup_cpu_7410,
939 .machine_check = machine_check_generic,
940 .platform = "ppc7400",
941 },
942 { /* 7450 2.0 - no doze/nap */
943 .pvr_mask = 0xffffffff,
944 .pvr_value = 0x80000200,
945 .cpu_name = "7450",
946 .cpu_features = CPU_FTRS_7450_20,
947 .cpu_user_features = COMMON_USER |
948 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
949 .mmu_features = MMU_FTR_HPTE_TABLE,
950 .icache_bsize = 32,
951 .dcache_bsize = 32,
952 .num_pmcs = 6,
953 .pmc_type = PPC_PMC_G4,
954 .cpu_setup = __setup_cpu_745x,
955 .oprofile_cpu_type = "ppc/7450",
956 .oprofile_type = PPC_OPROFILE_G4,
957 .machine_check = machine_check_generic,
958 .platform = "ppc7450",
959 },
960 { /* 7450 2.1 */
961 .pvr_mask = 0xffffffff,
962 .pvr_value = 0x80000201,
963 .cpu_name = "7450",
964 .cpu_features = CPU_FTRS_7450_21,
965 .cpu_user_features = COMMON_USER |
966 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
967 .mmu_features = MMU_FTR_HPTE_TABLE,
968 .icache_bsize = 32,
969 .dcache_bsize = 32,
970 .num_pmcs = 6,
971 .pmc_type = PPC_PMC_G4,
972 .cpu_setup = __setup_cpu_745x,
973 .oprofile_cpu_type = "ppc/7450",
974 .oprofile_type = PPC_OPROFILE_G4,
975 .machine_check = machine_check_generic,
976 .platform = "ppc7450",
977 },
978 { /* 7450 2.3 and newer */
979 .pvr_mask = 0xffff0000,
980 .pvr_value = 0x80000000,
981 .cpu_name = "7450",
982 .cpu_features = CPU_FTRS_7450_23,
983 .cpu_user_features = COMMON_USER |
984 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
985 .mmu_features = MMU_FTR_HPTE_TABLE,
986 .icache_bsize = 32,
987 .dcache_bsize = 32,
988 .num_pmcs = 6,
989 .pmc_type = PPC_PMC_G4,
990 .cpu_setup = __setup_cpu_745x,
991 .oprofile_cpu_type = "ppc/7450",
992 .oprofile_type = PPC_OPROFILE_G4,
993 .machine_check = machine_check_generic,
994 .platform = "ppc7450",
995 },
996 { /* 7455 rev 1.x */
997 .pvr_mask = 0xffffff00,
998 .pvr_value = 0x80010100,
999 .cpu_name = "7455",
1000 .cpu_features = CPU_FTRS_7455_1,
1001 .cpu_user_features = COMMON_USER |
1002 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1003 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1004 .icache_bsize = 32,
1005 .dcache_bsize = 32,
1006 .num_pmcs = 6,
1007 .pmc_type = PPC_PMC_G4,
1008 .cpu_setup = __setup_cpu_745x,
1009 .oprofile_cpu_type = "ppc/7450",
1010 .oprofile_type = PPC_OPROFILE_G4,
1011 .machine_check = machine_check_generic,
1012 .platform = "ppc7450",
1013 },
1014 { /* 7455 rev 2.0 */
1015 .pvr_mask = 0xffffffff,
1016 .pvr_value = 0x80010200,
1017 .cpu_name = "7455",
1018 .cpu_features = CPU_FTRS_7455_20,
1019 .cpu_user_features = COMMON_USER |
1020 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1021 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1022 .icache_bsize = 32,
1023 .dcache_bsize = 32,
1024 .num_pmcs = 6,
1025 .pmc_type = PPC_PMC_G4,
1026 .cpu_setup = __setup_cpu_745x,
1027 .oprofile_cpu_type = "ppc/7450",
1028 .oprofile_type = PPC_OPROFILE_G4,
1029 .machine_check = machine_check_generic,
1030 .platform = "ppc7450",
1031 },
1032 { /* 7455 others */
1033 .pvr_mask = 0xffff0000,
1034 .pvr_value = 0x80010000,
1035 .cpu_name = "7455",
1036 .cpu_features = CPU_FTRS_7455,
1037 .cpu_user_features = COMMON_USER |
1038 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1039 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1040 .icache_bsize = 32,
1041 .dcache_bsize = 32,
1042 .num_pmcs = 6,
1043 .pmc_type = PPC_PMC_G4,
1044 .cpu_setup = __setup_cpu_745x,
1045 .oprofile_cpu_type = "ppc/7450",
1046 .oprofile_type = PPC_OPROFILE_G4,
1047 .machine_check = machine_check_generic,
1048 .platform = "ppc7450",
1049 },
1050 { /* 7447/7457 Rev 1.0 */
1051 .pvr_mask = 0xffffffff,
1052 .pvr_value = 0x80020100,
1053 .cpu_name = "7447/7457",
1054 .cpu_features = CPU_FTRS_7447_10,
1055 .cpu_user_features = COMMON_USER |
1056 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1057 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1058 .icache_bsize = 32,
1059 .dcache_bsize = 32,
1060 .num_pmcs = 6,
1061 .pmc_type = PPC_PMC_G4,
1062 .cpu_setup = __setup_cpu_745x,
1063 .oprofile_cpu_type = "ppc/7450",
1064 .oprofile_type = PPC_OPROFILE_G4,
1065 .machine_check = machine_check_generic,
1066 .platform = "ppc7450",
1067 },
1068 { /* 7447/7457 Rev 1.1 */
1069 .pvr_mask = 0xffffffff,
1070 .pvr_value = 0x80020101,
1071 .cpu_name = "7447/7457",
1072 .cpu_features = CPU_FTRS_7447_10,
1073 .cpu_user_features = COMMON_USER |
1074 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1075 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1076 .icache_bsize = 32,
1077 .dcache_bsize = 32,
1078 .num_pmcs = 6,
1079 .pmc_type = PPC_PMC_G4,
1080 .cpu_setup = __setup_cpu_745x,
1081 .oprofile_cpu_type = "ppc/7450",
1082 .oprofile_type = PPC_OPROFILE_G4,
1083 .machine_check = machine_check_generic,
1084 .platform = "ppc7450",
1085 },
1086 { /* 7447/7457 Rev 1.2 and later */
1087 .pvr_mask = 0xffff0000,
1088 .pvr_value = 0x80020000,
1089 .cpu_name = "7447/7457",
1090 .cpu_features = CPU_FTRS_7447,
1091 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1092 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1093 .icache_bsize = 32,
1094 .dcache_bsize = 32,
1095 .num_pmcs = 6,
1096 .pmc_type = PPC_PMC_G4,
1097 .cpu_setup = __setup_cpu_745x,
1098 .oprofile_cpu_type = "ppc/7450",
1099 .oprofile_type = PPC_OPROFILE_G4,
1100 .machine_check = machine_check_generic,
1101 .platform = "ppc7450",
1102 },
1103 { /* 7447A */
1104 .pvr_mask = 0xffff0000,
1105 .pvr_value = 0x80030000,
1106 .cpu_name = "7447A",
1107 .cpu_features = CPU_FTRS_7447A,
1108 .cpu_user_features = COMMON_USER |
1109 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1110 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1111 .icache_bsize = 32,
1112 .dcache_bsize = 32,
1113 .num_pmcs = 6,
1114 .pmc_type = PPC_PMC_G4,
1115 .cpu_setup = __setup_cpu_745x,
1116 .oprofile_cpu_type = "ppc/7450",
1117 .oprofile_type = PPC_OPROFILE_G4,
1118 .machine_check = machine_check_generic,
1119 .platform = "ppc7450",
1120 },
1121 { /* 7448 */
1122 .pvr_mask = 0xffff0000,
1123 .pvr_value = 0x80040000,
1124 .cpu_name = "7448",
1125 .cpu_features = CPU_FTRS_7448,
1126 .cpu_user_features = COMMON_USER |
1127 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1128 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1129 .icache_bsize = 32,
1130 .dcache_bsize = 32,
1131 .num_pmcs = 6,
1132 .pmc_type = PPC_PMC_G4,
1133 .cpu_setup = __setup_cpu_745x,
1134 .oprofile_cpu_type = "ppc/7450",
1135 .oprofile_type = PPC_OPROFILE_G4,
1136 .machine_check = machine_check_generic,
1137 .platform = "ppc7450",
1138 },
1139 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1140 .pvr_mask = 0x7fff0000,
1141 .pvr_value = 0x00810000,
1142 .cpu_name = "82xx",
1143 .cpu_features = CPU_FTRS_82XX,
1144 .cpu_user_features = COMMON_USER,
1145 .mmu_features = 0,
1146 .icache_bsize = 32,
1147 .dcache_bsize = 32,
1148 .cpu_setup = __setup_cpu_603,
1149 .machine_check = machine_check_generic,
1150 .platform = "ppc603",
1151 },
1152 { /* All G2_LE (603e core, plus some) have the same pvr */
1153 .pvr_mask = 0x7fff0000,
1154 .pvr_value = 0x00820000,
1155 .cpu_name = "G2_LE",
1156 .cpu_features = CPU_FTRS_G2_LE,
1157 .cpu_user_features = COMMON_USER,
1158 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1159 .icache_bsize = 32,
1160 .dcache_bsize = 32,
1161 .cpu_setup = __setup_cpu_603,
1162 .machine_check = machine_check_generic,
1163 .platform = "ppc603",
1164 },
1165 { /* e300c1 (a 603e core, plus some) on 83xx */
1166 .pvr_mask = 0x7fff0000,
1167 .pvr_value = 0x00830000,
1168 .cpu_name = "e300c1",
1169 .cpu_features = CPU_FTRS_E300,
1170 .cpu_user_features = COMMON_USER,
1171 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1172 .icache_bsize = 32,
1173 .dcache_bsize = 32,
1174 .cpu_setup = __setup_cpu_603,
1175 .machine_check = machine_check_generic,
1176 .platform = "ppc603",
1177 },
1178 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1179 .pvr_mask = 0x7fff0000,
1180 .pvr_value = 0x00840000,
1181 .cpu_name = "e300c2",
1182 .cpu_features = CPU_FTRS_E300C2,
1183 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1184 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1185 MMU_FTR_NEED_DTLB_SW_LRU,
1186 .icache_bsize = 32,
1187 .dcache_bsize = 32,
1188 .cpu_setup = __setup_cpu_603,
1189 .machine_check = machine_check_generic,
1190 .platform = "ppc603",
1191 },
1192 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1193 .pvr_mask = 0x7fff0000,
1194 .pvr_value = 0x00850000,
1195 .cpu_name = "e300c3",
1196 .cpu_features = CPU_FTRS_E300,
1197 .cpu_user_features = COMMON_USER,
1198 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1199 MMU_FTR_NEED_DTLB_SW_LRU,
1200 .icache_bsize = 32,
1201 .dcache_bsize = 32,
1202 .cpu_setup = __setup_cpu_603,
1203 .machine_check = machine_check_generic,
1204 .num_pmcs = 4,
1205 .oprofile_cpu_type = "ppc/e300",
1206 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1207 .platform = "ppc603",
1208 },
1209 { /* e300c4 (e300c1, plus one IU) */
1210 .pvr_mask = 0x7fff0000,
1211 .pvr_value = 0x00860000,
1212 .cpu_name = "e300c4",
1213 .cpu_features = CPU_FTRS_E300,
1214 .cpu_user_features = COMMON_USER,
1215 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1216 MMU_FTR_NEED_DTLB_SW_LRU,
1217 .icache_bsize = 32,
1218 .dcache_bsize = 32,
1219 .cpu_setup = __setup_cpu_603,
1220 .machine_check = machine_check_generic,
1221 .num_pmcs = 4,
1222 .oprofile_cpu_type = "ppc/e300",
1223 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1224 .platform = "ppc603",
1225 },
1226 { /* default match, we assume split I/D cache & TB (non-601)... */
1227 .pvr_mask = 0x00000000,
1228 .pvr_value = 0x00000000,
1229 .cpu_name = "(generic PPC)",
1230 .cpu_features = CPU_FTRS_CLASSIC32,
1231 .cpu_user_features = COMMON_USER,
1232 .mmu_features = MMU_FTR_HPTE_TABLE,
1233 .icache_bsize = 32,
1234 .dcache_bsize = 32,
1235 .machine_check = machine_check_generic,
1236 .platform = "ppc603",
1237 },
1238#endif /* CONFIG_PPC_BOOK3S_32 */
1239#ifdef CONFIG_8xx
1240 { /* 8xx */
1241 .pvr_mask = 0xffff0000,
1242 .pvr_value = 0x00500000,
1243 .cpu_name = "8xx",
1244 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1245 * if the 8xx code is there.... */
1246 .cpu_features = CPU_FTRS_8XX,
1247 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1248 .mmu_features = MMU_FTR_TYPE_8xx,
1249 .icache_bsize = 16,
1250 .dcache_bsize = 16,
1251 .machine_check = machine_check_8xx,
1252 .platform = "ppc823",
1253 },
1254#endif /* CONFIG_8xx */
1255#ifdef CONFIG_40x
1256 { /* 403GC */
1257 .pvr_mask = 0xffffff00,
1258 .pvr_value = 0x00200200,
1259 .cpu_name = "403GC",
1260 .cpu_features = CPU_FTRS_40X,
1261 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1262 .mmu_features = MMU_FTR_TYPE_40x,
1263 .icache_bsize = 16,
1264 .dcache_bsize = 16,
1265 .machine_check = machine_check_4xx,
1266 .platform = "ppc403",
1267 },
1268 { /* 403GCX */
1269 .pvr_mask = 0xffffff00,
1270 .pvr_value = 0x00201400,
1271 .cpu_name = "403GCX",
1272 .cpu_features = CPU_FTRS_40X,
1273 .cpu_user_features = PPC_FEATURE_32 |
1274 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1275 .mmu_features = MMU_FTR_TYPE_40x,
1276 .icache_bsize = 16,
1277 .dcache_bsize = 16,
1278 .machine_check = machine_check_4xx,
1279 .platform = "ppc403",
1280 },
1281 { /* 403G ?? */
1282 .pvr_mask = 0xffff0000,
1283 .pvr_value = 0x00200000,
1284 .cpu_name = "403G ??",
1285 .cpu_features = CPU_FTRS_40X,
1286 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1287 .mmu_features = MMU_FTR_TYPE_40x,
1288 .icache_bsize = 16,
1289 .dcache_bsize = 16,
1290 .machine_check = machine_check_4xx,
1291 .platform = "ppc403",
1292 },
1293 { /* 405GP */
1294 .pvr_mask = 0xffff0000,
1295 .pvr_value = 0x40110000,
1296 .cpu_name = "405GP",
1297 .cpu_features = CPU_FTRS_40X,
1298 .cpu_user_features = PPC_FEATURE_32 |
1299 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1300 .mmu_features = MMU_FTR_TYPE_40x,
1301 .icache_bsize = 32,
1302 .dcache_bsize = 32,
1303 .machine_check = machine_check_4xx,
1304 .platform = "ppc405",
1305 },
1306 { /* STB 03xxx */
1307 .pvr_mask = 0xffff0000,
1308 .pvr_value = 0x40130000,
1309 .cpu_name = "STB03xxx",
1310 .cpu_features = CPU_FTRS_40X,
1311 .cpu_user_features = PPC_FEATURE_32 |
1312 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1313 .mmu_features = MMU_FTR_TYPE_40x,
1314 .icache_bsize = 32,
1315 .dcache_bsize = 32,
1316 .machine_check = machine_check_4xx,
1317 .platform = "ppc405",
1318 },
1319 { /* STB 04xxx */
1320 .pvr_mask = 0xffff0000,
1321 .pvr_value = 0x41810000,
1322 .cpu_name = "STB04xxx",
1323 .cpu_features = CPU_FTRS_40X,
1324 .cpu_user_features = PPC_FEATURE_32 |
1325 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1326 .mmu_features = MMU_FTR_TYPE_40x,
1327 .icache_bsize = 32,
1328 .dcache_bsize = 32,
1329 .machine_check = machine_check_4xx,
1330 .platform = "ppc405",
1331 },
1332 { /* NP405L */
1333 .pvr_mask = 0xffff0000,
1334 .pvr_value = 0x41610000,
1335 .cpu_name = "NP405L",
1336 .cpu_features = CPU_FTRS_40X,
1337 .cpu_user_features = PPC_FEATURE_32 |
1338 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1339 .mmu_features = MMU_FTR_TYPE_40x,
1340 .icache_bsize = 32,
1341 .dcache_bsize = 32,
1342 .machine_check = machine_check_4xx,
1343 .platform = "ppc405",
1344 },
1345 { /* NP4GS3 */
1346 .pvr_mask = 0xffff0000,
1347 .pvr_value = 0x40B10000,
1348 .cpu_name = "NP4GS3",
1349 .cpu_features = CPU_FTRS_40X,
1350 .cpu_user_features = PPC_FEATURE_32 |
1351 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1352 .mmu_features = MMU_FTR_TYPE_40x,
1353 .icache_bsize = 32,
1354 .dcache_bsize = 32,
1355 .machine_check = machine_check_4xx,
1356 .platform = "ppc405",
1357 },
1358 { /* NP405H */
1359 .pvr_mask = 0xffff0000,
1360 .pvr_value = 0x41410000,
1361 .cpu_name = "NP405H",
1362 .cpu_features = CPU_FTRS_40X,
1363 .cpu_user_features = PPC_FEATURE_32 |
1364 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1365 .mmu_features = MMU_FTR_TYPE_40x,
1366 .icache_bsize = 32,
1367 .dcache_bsize = 32,
1368 .machine_check = machine_check_4xx,
1369 .platform = "ppc405",
1370 },
1371 { /* 405GPr */
1372 .pvr_mask = 0xffff0000,
1373 .pvr_value = 0x50910000,
1374 .cpu_name = "405GPr",
1375 .cpu_features = CPU_FTRS_40X,
1376 .cpu_user_features = PPC_FEATURE_32 |
1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1378 .mmu_features = MMU_FTR_TYPE_40x,
1379 .icache_bsize = 32,
1380 .dcache_bsize = 32,
1381 .machine_check = machine_check_4xx,
1382 .platform = "ppc405",
1383 },
1384 { /* STBx25xx */
1385 .pvr_mask = 0xffff0000,
1386 .pvr_value = 0x51510000,
1387 .cpu_name = "STBx25xx",
1388 .cpu_features = CPU_FTRS_40X,
1389 .cpu_user_features = PPC_FEATURE_32 |
1390 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1391 .mmu_features = MMU_FTR_TYPE_40x,
1392 .icache_bsize = 32,
1393 .dcache_bsize = 32,
1394 .machine_check = machine_check_4xx,
1395 .platform = "ppc405",
1396 },
1397 { /* 405LP */
1398 .pvr_mask = 0xffff0000,
1399 .pvr_value = 0x41F10000,
1400 .cpu_name = "405LP",
1401 .cpu_features = CPU_FTRS_40X,
1402 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1403 .mmu_features = MMU_FTR_TYPE_40x,
1404 .icache_bsize = 32,
1405 .dcache_bsize = 32,
1406 .machine_check = machine_check_4xx,
1407 .platform = "ppc405",
1408 },
1409 { /* Xilinx Virtex-II Pro */
1410 .pvr_mask = 0xfffff000,
1411 .pvr_value = 0x20010000,
1412 .cpu_name = "Virtex-II Pro",
1413 .cpu_features = CPU_FTRS_40X,
1414 .cpu_user_features = PPC_FEATURE_32 |
1415 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1416 .mmu_features = MMU_FTR_TYPE_40x,
1417 .icache_bsize = 32,
1418 .dcache_bsize = 32,
1419 .machine_check = machine_check_4xx,
1420 .platform = "ppc405",
1421 },
1422 { /* Xilinx Virtex-4 FX */
1423 .pvr_mask = 0xfffff000,
1424 .pvr_value = 0x20011000,
1425 .cpu_name = "Virtex-4 FX",
1426 .cpu_features = CPU_FTRS_40X,
1427 .cpu_user_features = PPC_FEATURE_32 |
1428 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1429 .mmu_features = MMU_FTR_TYPE_40x,
1430 .icache_bsize = 32,
1431 .dcache_bsize = 32,
1432 .machine_check = machine_check_4xx,
1433 .platform = "ppc405",
1434 },
1435 { /* 405EP */
1436 .pvr_mask = 0xffff0000,
1437 .pvr_value = 0x51210000,
1438 .cpu_name = "405EP",
1439 .cpu_features = CPU_FTRS_40X,
1440 .cpu_user_features = PPC_FEATURE_32 |
1441 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1442 .mmu_features = MMU_FTR_TYPE_40x,
1443 .icache_bsize = 32,
1444 .dcache_bsize = 32,
1445 .machine_check = machine_check_4xx,
1446 .platform = "ppc405",
1447 },
1448 { /* 405EX Rev. A/B with Security */
1449 .pvr_mask = 0xffff000f,
1450 .pvr_value = 0x12910007,
1451 .cpu_name = "405EX Rev. A/B",
1452 .cpu_features = CPU_FTRS_40X,
1453 .cpu_user_features = PPC_FEATURE_32 |
1454 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1455 .mmu_features = MMU_FTR_TYPE_40x,
1456 .icache_bsize = 32,
1457 .dcache_bsize = 32,
1458 .machine_check = machine_check_4xx,
1459 .platform = "ppc405",
1460 },
1461 { /* 405EX Rev. C without Security */
1462 .pvr_mask = 0xffff000f,
1463 .pvr_value = 0x1291000d,
1464 .cpu_name = "405EX Rev. C",
1465 .cpu_features = CPU_FTRS_40X,
1466 .cpu_user_features = PPC_FEATURE_32 |
1467 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1468 .mmu_features = MMU_FTR_TYPE_40x,
1469 .icache_bsize = 32,
1470 .dcache_bsize = 32,
1471 .machine_check = machine_check_4xx,
1472 .platform = "ppc405",
1473 },
1474 { /* 405EX Rev. C with Security */
1475 .pvr_mask = 0xffff000f,
1476 .pvr_value = 0x1291000f,
1477 .cpu_name = "405EX Rev. C",
1478 .cpu_features = CPU_FTRS_40X,
1479 .cpu_user_features = PPC_FEATURE_32 |
1480 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1481 .mmu_features = MMU_FTR_TYPE_40x,
1482 .icache_bsize = 32,
1483 .dcache_bsize = 32,
1484 .machine_check = machine_check_4xx,
1485 .platform = "ppc405",
1486 },
1487 { /* 405EX Rev. D without Security */
1488 .pvr_mask = 0xffff000f,
1489 .pvr_value = 0x12910003,
1490 .cpu_name = "405EX Rev. D",
1491 .cpu_features = CPU_FTRS_40X,
1492 .cpu_user_features = PPC_FEATURE_32 |
1493 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1494 .mmu_features = MMU_FTR_TYPE_40x,
1495 .icache_bsize = 32,
1496 .dcache_bsize = 32,
1497 .machine_check = machine_check_4xx,
1498 .platform = "ppc405",
1499 },
1500 { /* 405EX Rev. D with Security */
1501 .pvr_mask = 0xffff000f,
1502 .pvr_value = 0x12910005,
1503 .cpu_name = "405EX Rev. D",
1504 .cpu_features = CPU_FTRS_40X,
1505 .cpu_user_features = PPC_FEATURE_32 |
1506 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1507 .mmu_features = MMU_FTR_TYPE_40x,
1508 .icache_bsize = 32,
1509 .dcache_bsize = 32,
1510 .machine_check = machine_check_4xx,
1511 .platform = "ppc405",
1512 },
1513 { /* 405EXr Rev. A/B without Security */
1514 .pvr_mask = 0xffff000f,
1515 .pvr_value = 0x12910001,
1516 .cpu_name = "405EXr Rev. A/B",
1517 .cpu_features = CPU_FTRS_40X,
1518 .cpu_user_features = PPC_FEATURE_32 |
1519 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1520 .mmu_features = MMU_FTR_TYPE_40x,
1521 .icache_bsize = 32,
1522 .dcache_bsize = 32,
1523 .machine_check = machine_check_4xx,
1524 .platform = "ppc405",
1525 },
1526 { /* 405EXr Rev. C without Security */
1527 .pvr_mask = 0xffff000f,
1528 .pvr_value = 0x12910009,
1529 .cpu_name = "405EXr Rev. C",
1530 .cpu_features = CPU_FTRS_40X,
1531 .cpu_user_features = PPC_FEATURE_32 |
1532 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1533 .mmu_features = MMU_FTR_TYPE_40x,
1534 .icache_bsize = 32,
1535 .dcache_bsize = 32,
1536 .machine_check = machine_check_4xx,
1537 .platform = "ppc405",
1538 },
1539 { /* 405EXr Rev. C with Security */
1540 .pvr_mask = 0xffff000f,
1541 .pvr_value = 0x1291000b,
1542 .cpu_name = "405EXr Rev. C",
1543 .cpu_features = CPU_FTRS_40X,
1544 .cpu_user_features = PPC_FEATURE_32 |
1545 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1546 .mmu_features = MMU_FTR_TYPE_40x,
1547 .icache_bsize = 32,
1548 .dcache_bsize = 32,
1549 .machine_check = machine_check_4xx,
1550 .platform = "ppc405",
1551 },
1552 { /* 405EXr Rev. D without Security */
1553 .pvr_mask = 0xffff000f,
1554 .pvr_value = 0x12910000,
1555 .cpu_name = "405EXr Rev. D",
1556 .cpu_features = CPU_FTRS_40X,
1557 .cpu_user_features = PPC_FEATURE_32 |
1558 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1559 .mmu_features = MMU_FTR_TYPE_40x,
1560 .icache_bsize = 32,
1561 .dcache_bsize = 32,
1562 .machine_check = machine_check_4xx,
1563 .platform = "ppc405",
1564 },
1565 { /* 405EXr Rev. D with Security */
1566 .pvr_mask = 0xffff000f,
1567 .pvr_value = 0x12910002,
1568 .cpu_name = "405EXr Rev. D",
1569 .cpu_features = CPU_FTRS_40X,
1570 .cpu_user_features = PPC_FEATURE_32 |
1571 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1572 .mmu_features = MMU_FTR_TYPE_40x,
1573 .icache_bsize = 32,
1574 .dcache_bsize = 32,
1575 .machine_check = machine_check_4xx,
1576 .platform = "ppc405",
1577 },
1578 {
1579 /* 405EZ */
1580 .pvr_mask = 0xffff0000,
1581 .pvr_value = 0x41510000,
1582 .cpu_name = "405EZ",
1583 .cpu_features = CPU_FTRS_40X,
1584 .cpu_user_features = PPC_FEATURE_32 |
1585 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1586 .mmu_features = MMU_FTR_TYPE_40x,
1587 .icache_bsize = 32,
1588 .dcache_bsize = 32,
1589 .machine_check = machine_check_4xx,
1590 .platform = "ppc405",
1591 },
1592 { /* APM8018X */
1593 .pvr_mask = 0xffff0000,
1594 .pvr_value = 0x7ff11432,
1595 .cpu_name = "APM8018X",
1596 .cpu_features = CPU_FTRS_40X,
1597 .cpu_user_features = PPC_FEATURE_32 |
1598 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1599 .mmu_features = MMU_FTR_TYPE_40x,
1600 .icache_bsize = 32,
1601 .dcache_bsize = 32,
1602 .machine_check = machine_check_4xx,
1603 .platform = "ppc405",
1604 },
1605 { /* default match */
1606 .pvr_mask = 0x00000000,
1607 .pvr_value = 0x00000000,
1608 .cpu_name = "(generic 40x PPC)",
1609 .cpu_features = CPU_FTRS_40X,
1610 .cpu_user_features = PPC_FEATURE_32 |
1611 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1612 .mmu_features = MMU_FTR_TYPE_40x,
1613 .icache_bsize = 32,
1614 .dcache_bsize = 32,
1615 .machine_check = machine_check_4xx,
1616 .platform = "ppc405",
1617 }
1618
1619#endif /* CONFIG_40x */
1620#ifdef CONFIG_44x
1621 {
1622 .pvr_mask = 0xf0000fff,
1623 .pvr_value = 0x40000850,
1624 .cpu_name = "440GR Rev. A",
1625 .cpu_features = CPU_FTRS_44X,
1626 .cpu_user_features = COMMON_USER_BOOKE,
1627 .mmu_features = MMU_FTR_TYPE_44x,
1628 .icache_bsize = 32,
1629 .dcache_bsize = 32,
1630 .machine_check = machine_check_4xx,
1631 .platform = "ppc440",
1632 },
1633 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1634 .pvr_mask = 0xf0000fff,
1635 .pvr_value = 0x40000858,
1636 .cpu_name = "440EP Rev. A",
1637 .cpu_features = CPU_FTRS_44X,
1638 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1639 .mmu_features = MMU_FTR_TYPE_44x,
1640 .icache_bsize = 32,
1641 .dcache_bsize = 32,
1642 .cpu_setup = __setup_cpu_440ep,
1643 .machine_check = machine_check_4xx,
1644 .platform = "ppc440",
1645 },
1646 {
1647 .pvr_mask = 0xf0000fff,
1648 .pvr_value = 0x400008d3,
1649 .cpu_name = "440GR Rev. B",
1650 .cpu_features = CPU_FTRS_44X,
1651 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1652 .mmu_features = MMU_FTR_TYPE_44x,
1653 .icache_bsize = 32,
1654 .dcache_bsize = 32,
1655 .machine_check = machine_check_4xx,
1656 .platform = "ppc440",
1657 },
1658 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1659 .pvr_mask = 0xf0000ff7,
1660 .pvr_value = 0x400008d4,
1661 .cpu_name = "440EP Rev. C",
1662 .cpu_features = CPU_FTRS_44X,
1663 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1664 .mmu_features = MMU_FTR_TYPE_44x,
1665 .icache_bsize = 32,
1666 .dcache_bsize = 32,
1667 .cpu_setup = __setup_cpu_440ep,
1668 .machine_check = machine_check_4xx,
1669 .platform = "ppc440",
1670 },
1671 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1672 .pvr_mask = 0xf0000fff,
1673 .pvr_value = 0x400008db,
1674 .cpu_name = "440EP Rev. B",
1675 .cpu_features = CPU_FTRS_44X,
1676 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1677 .mmu_features = MMU_FTR_TYPE_44x,
1678 .icache_bsize = 32,
1679 .dcache_bsize = 32,
1680 .cpu_setup = __setup_cpu_440ep,
1681 .machine_check = machine_check_4xx,
1682 .platform = "ppc440",
1683 },
1684 { /* 440GRX */
1685 .pvr_mask = 0xf0000ffb,
1686 .pvr_value = 0x200008D0,
1687 .cpu_name = "440GRX",
1688 .cpu_features = CPU_FTRS_44X,
1689 .cpu_user_features = COMMON_USER_BOOKE,
1690 .mmu_features = MMU_FTR_TYPE_44x,
1691 .icache_bsize = 32,
1692 .dcache_bsize = 32,
1693 .cpu_setup = __setup_cpu_440grx,
1694 .machine_check = machine_check_440A,
1695 .platform = "ppc440",
1696 },
1697 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1698 .pvr_mask = 0xf0000ffb,
1699 .pvr_value = 0x200008D8,
1700 .cpu_name = "440EPX",
1701 .cpu_features = CPU_FTRS_44X,
1702 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1703 .mmu_features = MMU_FTR_TYPE_44x,
1704 .icache_bsize = 32,
1705 .dcache_bsize = 32,
1706 .cpu_setup = __setup_cpu_440epx,
1707 .machine_check = machine_check_440A,
1708 .platform = "ppc440",
1709 },
1710 { /* 440GP Rev. B */
1711 .pvr_mask = 0xf0000fff,
1712 .pvr_value = 0x40000440,
1713 .cpu_name = "440GP Rev. B",
1714 .cpu_features = CPU_FTRS_44X,
1715 .cpu_user_features = COMMON_USER_BOOKE,
1716 .mmu_features = MMU_FTR_TYPE_44x,
1717 .icache_bsize = 32,
1718 .dcache_bsize = 32,
1719 .machine_check = machine_check_4xx,
1720 .platform = "ppc440gp",
1721 },
1722 { /* 440GP Rev. C */
1723 .pvr_mask = 0xf0000fff,
1724 .pvr_value = 0x40000481,
1725 .cpu_name = "440GP Rev. C",
1726 .cpu_features = CPU_FTRS_44X,
1727 .cpu_user_features = COMMON_USER_BOOKE,
1728 .mmu_features = MMU_FTR_TYPE_44x,
1729 .icache_bsize = 32,
1730 .dcache_bsize = 32,
1731 .machine_check = machine_check_4xx,
1732 .platform = "ppc440gp",
1733 },
1734 { /* 440GX Rev. A */
1735 .pvr_mask = 0xf0000fff,
1736 .pvr_value = 0x50000850,
1737 .cpu_name = "440GX Rev. A",
1738 .cpu_features = CPU_FTRS_44X,
1739 .cpu_user_features = COMMON_USER_BOOKE,
1740 .mmu_features = MMU_FTR_TYPE_44x,
1741 .icache_bsize = 32,
1742 .dcache_bsize = 32,
1743 .cpu_setup = __setup_cpu_440gx,
1744 .machine_check = machine_check_440A,
1745 .platform = "ppc440",
1746 },
1747 { /* 440GX Rev. B */
1748 .pvr_mask = 0xf0000fff,
1749 .pvr_value = 0x50000851,
1750 .cpu_name = "440GX Rev. B",
1751 .cpu_features = CPU_FTRS_44X,
1752 .cpu_user_features = COMMON_USER_BOOKE,
1753 .mmu_features = MMU_FTR_TYPE_44x,
1754 .icache_bsize = 32,
1755 .dcache_bsize = 32,
1756 .cpu_setup = __setup_cpu_440gx,
1757 .machine_check = machine_check_440A,
1758 .platform = "ppc440",
1759 },
1760 { /* 440GX Rev. C */
1761 .pvr_mask = 0xf0000fff,
1762 .pvr_value = 0x50000892,
1763 .cpu_name = "440GX Rev. C",
1764 .cpu_features = CPU_FTRS_44X,
1765 .cpu_user_features = COMMON_USER_BOOKE,
1766 .mmu_features = MMU_FTR_TYPE_44x,
1767 .icache_bsize = 32,
1768 .dcache_bsize = 32,
1769 .cpu_setup = __setup_cpu_440gx,
1770 .machine_check = machine_check_440A,
1771 .platform = "ppc440",
1772 },
1773 { /* 440GX Rev. F */
1774 .pvr_mask = 0xf0000fff,
1775 .pvr_value = 0x50000894,
1776 .cpu_name = "440GX Rev. F",
1777 .cpu_features = CPU_FTRS_44X,
1778 .cpu_user_features = COMMON_USER_BOOKE,
1779 .mmu_features = MMU_FTR_TYPE_44x,
1780 .icache_bsize = 32,
1781 .dcache_bsize = 32,
1782 .cpu_setup = __setup_cpu_440gx,
1783 .machine_check = machine_check_440A,
1784 .platform = "ppc440",
1785 },
1786 { /* 440SP Rev. A */
1787 .pvr_mask = 0xfff00fff,
1788 .pvr_value = 0x53200891,
1789 .cpu_name = "440SP Rev. A",
1790 .cpu_features = CPU_FTRS_44X,
1791 .cpu_user_features = COMMON_USER_BOOKE,
1792 .mmu_features = MMU_FTR_TYPE_44x,
1793 .icache_bsize = 32,
1794 .dcache_bsize = 32,
1795 .machine_check = machine_check_4xx,
1796 .platform = "ppc440",
1797 },
1798 { /* 440SPe Rev. A */
1799 .pvr_mask = 0xfff00fff,
1800 .pvr_value = 0x53400890,
1801 .cpu_name = "440SPe Rev. A",
1802 .cpu_features = CPU_FTRS_44X,
1803 .cpu_user_features = COMMON_USER_BOOKE,
1804 .mmu_features = MMU_FTR_TYPE_44x,
1805 .icache_bsize = 32,
1806 .dcache_bsize = 32,
1807 .cpu_setup = __setup_cpu_440spe,
1808 .machine_check = machine_check_440A,
1809 .platform = "ppc440",
1810 },
1811 { /* 440SPe Rev. B */
1812 .pvr_mask = 0xfff00fff,
1813 .pvr_value = 0x53400891,
1814 .cpu_name = "440SPe Rev. B",
1815 .cpu_features = CPU_FTRS_44X,
1816 .cpu_user_features = COMMON_USER_BOOKE,
1817 .mmu_features = MMU_FTR_TYPE_44x,
1818 .icache_bsize = 32,
1819 .dcache_bsize = 32,
1820 .cpu_setup = __setup_cpu_440spe,
1821 .machine_check = machine_check_440A,
1822 .platform = "ppc440",
1823 },
1824 { /* 440 in Xilinx Virtex-5 FXT */
1825 .pvr_mask = 0xfffffff0,
1826 .pvr_value = 0x7ff21910,
1827 .cpu_name = "440 in Virtex-5 FXT",
1828 .cpu_features = CPU_FTRS_44X,
1829 .cpu_user_features = COMMON_USER_BOOKE,
1830 .mmu_features = MMU_FTR_TYPE_44x,
1831 .icache_bsize = 32,
1832 .dcache_bsize = 32,
1833 .cpu_setup = __setup_cpu_440x5,
1834 .machine_check = machine_check_440A,
1835 .platform = "ppc440",
1836 },
1837 { /* 460EX */
1838 .pvr_mask = 0xffff0006,
1839 .pvr_value = 0x13020002,
1840 .cpu_name = "460EX",
1841 .cpu_features = CPU_FTRS_440x6,
1842 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1843 .mmu_features = MMU_FTR_TYPE_44x,
1844 .icache_bsize = 32,
1845 .dcache_bsize = 32,
1846 .cpu_setup = __setup_cpu_460ex,
1847 .machine_check = machine_check_440A,
1848 .platform = "ppc440",
1849 },
1850 { /* 460EX Rev B */
1851 .pvr_mask = 0xffff0007,
1852 .pvr_value = 0x13020004,
1853 .cpu_name = "460EX Rev. B",
1854 .cpu_features = CPU_FTRS_440x6,
1855 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1856 .mmu_features = MMU_FTR_TYPE_44x,
1857 .icache_bsize = 32,
1858 .dcache_bsize = 32,
1859 .cpu_setup = __setup_cpu_460ex,
1860 .machine_check = machine_check_440A,
1861 .platform = "ppc440",
1862 },
1863 { /* 460GT */
1864 .pvr_mask = 0xffff0006,
1865 .pvr_value = 0x13020000,
1866 .cpu_name = "460GT",
1867 .cpu_features = CPU_FTRS_440x6,
1868 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1869 .mmu_features = MMU_FTR_TYPE_44x,
1870 .icache_bsize = 32,
1871 .dcache_bsize = 32,
1872 .cpu_setup = __setup_cpu_460gt,
1873 .machine_check = machine_check_440A,
1874 .platform = "ppc440",
1875 },
1876 { /* 460GT Rev B */
1877 .pvr_mask = 0xffff0007,
1878 .pvr_value = 0x13020005,
1879 .cpu_name = "460GT Rev. B",
1880 .cpu_features = CPU_FTRS_440x6,
1881 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1882 .mmu_features = MMU_FTR_TYPE_44x,
1883 .icache_bsize = 32,
1884 .dcache_bsize = 32,
1885 .cpu_setup = __setup_cpu_460gt,
1886 .machine_check = machine_check_440A,
1887 .platform = "ppc440",
1888 },
1889 { /* 460SX */
1890 .pvr_mask = 0xffffff00,
1891 .pvr_value = 0x13541800,
1892 .cpu_name = "460SX",
1893 .cpu_features = CPU_FTRS_44X,
1894 .cpu_user_features = COMMON_USER_BOOKE,
1895 .mmu_features = MMU_FTR_TYPE_44x,
1896 .icache_bsize = 32,
1897 .dcache_bsize = 32,
1898 .cpu_setup = __setup_cpu_460sx,
1899 .machine_check = machine_check_440A,
1900 .platform = "ppc440",
1901 },
1902 { /* 464 in APM821xx */
1903 .pvr_mask = 0xfffffff0,
1904 .pvr_value = 0x12C41C80,
1905 .cpu_name = "APM821XX",
1906 .cpu_features = CPU_FTRS_44X,
1907 .cpu_user_features = COMMON_USER_BOOKE |
1908 PPC_FEATURE_HAS_FPU,
1909 .mmu_features = MMU_FTR_TYPE_44x,
1910 .icache_bsize = 32,
1911 .dcache_bsize = 32,
1912 .cpu_setup = __setup_cpu_apm821xx,
1913 .machine_check = machine_check_440A,
1914 .platform = "ppc440",
1915 },
1916 { /* 476 DD2 core */
1917 .pvr_mask = 0xffffffff,
1918 .pvr_value = 0x11a52080,
1919 .cpu_name = "476",
1920 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1921 .cpu_user_features = COMMON_USER_BOOKE |
1922 PPC_FEATURE_HAS_FPU,
1923 .mmu_features = MMU_FTR_TYPE_47x |
1924 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1925 .icache_bsize = 32,
1926 .dcache_bsize = 128,
1927 .machine_check = machine_check_47x,
1928 .platform = "ppc470",
1929 },
1930 { /* 476fpe */
1931 .pvr_mask = 0xffff0000,
1932 .pvr_value = 0x7ff50000,
1933 .cpu_name = "476fpe",
1934 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1935 .cpu_user_features = COMMON_USER_BOOKE |
1936 PPC_FEATURE_HAS_FPU,
1937 .mmu_features = MMU_FTR_TYPE_47x |
1938 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1939 .icache_bsize = 32,
1940 .dcache_bsize = 128,
1941 .machine_check = machine_check_47x,
1942 .platform = "ppc470",
1943 },
1944 { /* 476 iss */
1945 .pvr_mask = 0xffff0000,
1946 .pvr_value = 0x00050000,
1947 .cpu_name = "476",
1948 .cpu_features = CPU_FTRS_47X,
1949 .cpu_user_features = COMMON_USER_BOOKE |
1950 PPC_FEATURE_HAS_FPU,
1951 .mmu_features = MMU_FTR_TYPE_47x |
1952 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1953 .icache_bsize = 32,
1954 .dcache_bsize = 128,
1955 .machine_check = machine_check_47x,
1956 .platform = "ppc470",
1957 },
1958 { /* 476 others */
1959 .pvr_mask = 0xffff0000,
1960 .pvr_value = 0x11a50000,
1961 .cpu_name = "476",
1962 .cpu_features = CPU_FTRS_47X,
1963 .cpu_user_features = COMMON_USER_BOOKE |
1964 PPC_FEATURE_HAS_FPU,
1965 .mmu_features = MMU_FTR_TYPE_47x |
1966 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1967 .icache_bsize = 32,
1968 .dcache_bsize = 128,
1969 .machine_check = machine_check_47x,
1970 .platform = "ppc470",
1971 },
1972 { /* default match */
1973 .pvr_mask = 0x00000000,
1974 .pvr_value = 0x00000000,
1975 .cpu_name = "(generic 44x PPC)",
1976 .cpu_features = CPU_FTRS_44X,
1977 .cpu_user_features = COMMON_USER_BOOKE,
1978 .mmu_features = MMU_FTR_TYPE_44x,
1979 .icache_bsize = 32,
1980 .dcache_bsize = 32,
1981 .machine_check = machine_check_4xx,
1982 .platform = "ppc440",
1983 }
1984#endif /* CONFIG_44x */
1985#ifdef CONFIG_E200
1986 { /* e200z5 */
1987 .pvr_mask = 0xfff00000,
1988 .pvr_value = 0x81000000,
1989 .cpu_name = "e200z5",
1990 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1991 .cpu_features = CPU_FTRS_E200,
1992 .cpu_user_features = COMMON_USER_BOOKE |
1993 PPC_FEATURE_HAS_EFP_SINGLE |
1994 PPC_FEATURE_UNIFIED_CACHE,
1995 .mmu_features = MMU_FTR_TYPE_FSL_E,
1996 .dcache_bsize = 32,
1997 .machine_check = machine_check_e200,
1998 .platform = "ppc5554",
1999 },
2000 { /* e200z6 */
2001 .pvr_mask = 0xfff00000,
2002 .pvr_value = 0x81100000,
2003 .cpu_name = "e200z6",
2004 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2005 .cpu_features = CPU_FTRS_E200,
2006 .cpu_user_features = COMMON_USER_BOOKE |
2007 PPC_FEATURE_HAS_SPE_COMP |
2008 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2009 PPC_FEATURE_UNIFIED_CACHE,
2010 .mmu_features = MMU_FTR_TYPE_FSL_E,
2011 .dcache_bsize = 32,
2012 .machine_check = machine_check_e200,
2013 .platform = "ppc5554",
2014 },
2015 { /* default match */
2016 .pvr_mask = 0x00000000,
2017 .pvr_value = 0x00000000,
2018 .cpu_name = "(generic E200 PPC)",
2019 .cpu_features = CPU_FTRS_E200,
2020 .cpu_user_features = COMMON_USER_BOOKE |
2021 PPC_FEATURE_HAS_EFP_SINGLE |
2022 PPC_FEATURE_UNIFIED_CACHE,
2023 .mmu_features = MMU_FTR_TYPE_FSL_E,
2024 .dcache_bsize = 32,
2025 .cpu_setup = __setup_cpu_e200,
2026 .machine_check = machine_check_e200,
2027 .platform = "ppc5554",
2028 }
2029#endif /* CONFIG_E200 */
2030#endif /* CONFIG_PPC32 */
2031#ifdef CONFIG_E500
2032#ifdef CONFIG_PPC32
2033#ifndef CONFIG_PPC_E500MC
2034 { /* e500 */
2035 .pvr_mask = 0xffff0000,
2036 .pvr_value = 0x80200000,
2037 .cpu_name = "e500",
2038 .cpu_features = CPU_FTRS_E500,
2039 .cpu_user_features = COMMON_USER_BOOKE |
2040 PPC_FEATURE_HAS_SPE_COMP |
2041 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2042 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2043 .mmu_features = MMU_FTR_TYPE_FSL_E,
2044 .icache_bsize = 32,
2045 .dcache_bsize = 32,
2046 .num_pmcs = 4,
2047 .oprofile_cpu_type = "ppc/e500",
2048 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2049 .cpu_setup = __setup_cpu_e500v1,
2050 .machine_check = machine_check_e500,
2051 .platform = "ppc8540",
2052 },
2053 { /* e500v2 */
2054 .pvr_mask = 0xffff0000,
2055 .pvr_value = 0x80210000,
2056 .cpu_name = "e500v2",
2057 .cpu_features = CPU_FTRS_E500_2,
2058 .cpu_user_features = COMMON_USER_BOOKE |
2059 PPC_FEATURE_HAS_SPE_COMP |
2060 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2061 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2062 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2063 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2064 .icache_bsize = 32,
2065 .dcache_bsize = 32,
2066 .num_pmcs = 4,
2067 .oprofile_cpu_type = "ppc/e500",
2068 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2069 .cpu_setup = __setup_cpu_e500v2,
2070 .machine_check = machine_check_e500,
2071 .platform = "ppc8548",
2072 .cpu_down_flush = cpu_down_flush_e500v2,
2073 },
2074#else
2075 { /* e500mc */
2076 .pvr_mask = 0xffff0000,
2077 .pvr_value = 0x80230000,
2078 .cpu_name = "e500mc",
2079 .cpu_features = CPU_FTRS_E500MC,
2080 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2081 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2082 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2083 MMU_FTR_USE_TLBILX,
2084 .icache_bsize = 64,
2085 .dcache_bsize = 64,
2086 .num_pmcs = 4,
2087 .oprofile_cpu_type = "ppc/e500mc",
2088 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2089 .cpu_setup = __setup_cpu_e500mc,
2090 .machine_check = machine_check_e500mc,
2091 .platform = "ppce500mc",
2092 .cpu_down_flush = cpu_down_flush_e500mc,
2093 },
2094#endif /* CONFIG_PPC_E500MC */
2095#endif /* CONFIG_PPC32 */
2096#ifdef CONFIG_PPC_E500MC
2097 { /* e5500 */
2098 .pvr_mask = 0xffff0000,
2099 .pvr_value = 0x80240000,
2100 .cpu_name = "e5500",
2101 .cpu_features = CPU_FTRS_E5500,
2102 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2103 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2104 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2105 MMU_FTR_USE_TLBILX,
2106 .icache_bsize = 64,
2107 .dcache_bsize = 64,
2108 .num_pmcs = 4,
2109 .oprofile_cpu_type = "ppc/e500mc",
2110 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2111 .cpu_setup = __setup_cpu_e5500,
2112#ifndef CONFIG_PPC32
2113 .cpu_restore = __restore_cpu_e5500,
2114#endif
2115 .machine_check = machine_check_e500mc,
2116 .platform = "ppce5500",
2117 .cpu_down_flush = cpu_down_flush_e5500,
2118 },
2119 { /* e6500 */
2120 .pvr_mask = 0xffff0000,
2121 .pvr_value = 0x80400000,
2122 .cpu_name = "e6500",
2123 .cpu_features = CPU_FTRS_E6500,
2124 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2125 PPC_FEATURE_HAS_ALTIVEC_COMP,
2126 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2127 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2128 MMU_FTR_USE_TLBILX,
2129 .icache_bsize = 64,
2130 .dcache_bsize = 64,
2131 .num_pmcs = 6,
2132 .oprofile_cpu_type = "ppc/e6500",
2133 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2134 .cpu_setup = __setup_cpu_e6500,
2135#ifndef CONFIG_PPC32
2136 .cpu_restore = __restore_cpu_e6500,
2137#endif
2138 .machine_check = machine_check_e500mc,
2139 .platform = "ppce6500",
2140 .cpu_down_flush = cpu_down_flush_e6500,
2141 },
2142#endif /* CONFIG_PPC_E500MC */
2143#ifdef CONFIG_PPC32
2144 { /* default match */
2145 .pvr_mask = 0x00000000,
2146 .pvr_value = 0x00000000,
2147 .cpu_name = "(generic E500 PPC)",
2148 .cpu_features = CPU_FTRS_E500,
2149 .cpu_user_features = COMMON_USER_BOOKE |
2150 PPC_FEATURE_HAS_SPE_COMP |
2151 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2152 .mmu_features = MMU_FTR_TYPE_FSL_E,
2153 .icache_bsize = 32,
2154 .dcache_bsize = 32,
2155 .machine_check = machine_check_e500,
2156 .platform = "powerpc",
2157 }
2158#endif /* CONFIG_PPC32 */
2159#endif /* CONFIG_E500 */
2160};
2161
2162static struct cpu_spec the_cpu_spec;
2163
2164static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2165 struct cpu_spec *s)
2166{
2167 struct cpu_spec *t = &the_cpu_spec;
2168 struct cpu_spec old;
2169
2170 t = PTRRELOC(t);
2171 old = *t;
2172
2173 /* Copy everything, then do fixups */
2174 *t = *s;
2175
2176 /*
2177 * If we are overriding a previous value derived from the real
2178 * PVR with a new value obtained using a logical PVR value,
2179 * don't modify the performance monitor fields.
2180 */
2181 if (old.num_pmcs && !s->num_pmcs) {
2182 t->num_pmcs = old.num_pmcs;
2183 t->pmc_type = old.pmc_type;
2184 t->oprofile_type = old.oprofile_type;
2185 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2186 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2187 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2188
2189 /*
2190 * If we have passed through this logic once before and
2191 * have pulled the default case because the real PVR was
2192 * not found inside cpu_specs[], then we are possibly
2193 * running in compatibility mode. In that case, let the
2194 * oprofiler know which set of compatibility counters to
2195 * pull from by making sure the oprofile_cpu_type string
2196 * is set to that of compatibility mode. If the
2197 * oprofile_cpu_type already has a value, then we are
2198 * possibly overriding a real PVR with a logical one,
2199 * and, in that case, keep the current value for
2200 * oprofile_cpu_type.
2201 */
2202 if (old.oprofile_cpu_type != NULL) {
2203 t->oprofile_cpu_type = old.oprofile_cpu_type;
2204 t->oprofile_type = old.oprofile_type;
2205 }
2206 }
2207
2208 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2209
2210 /*
2211 * Set the base platform string once; assumes
2212 * we're called with real pvr first.
2213 */
2214 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2215 *PTRRELOC(&powerpc_base_platform) = t->platform;
2216
2217#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2218 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2219 * that processor. I will consolidate that at a later time, for now,
2220 * just use #ifdef. We also don't need to PTRRELOC the function
2221 * pointer on ppc64 and booke as we are running at 0 in real mode
2222 * on ppc64 and reloc_offset is always 0 on booke.
2223 */
2224 if (t->cpu_setup) {
2225 t->cpu_setup(offset, t);
2226 }
2227#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2228
2229 return t;
2230}
2231
2232struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2233{
2234 struct cpu_spec *s = cpu_specs;
2235 int i;
2236
2237 s = PTRRELOC(s);
2238
2239 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2240 if ((pvr & s->pvr_mask) == s->pvr_value)
2241 return setup_cpu_spec(offset, s);
2242 }
2243
2244 BUG();
2245
2246 return NULL;
2247}
2248
2249#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
2250struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
2251 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2252};
2253EXPORT_SYMBOL_GPL(cpu_feature_keys);
2254
2255void __init cpu_feature_keys_init(void)
2256{
2257 int i;
2258
2259 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
2260 unsigned long f = 1ul << i;
2261
2262 if (!(cur_cpu_spec->cpu_features & f))
2263 static_branch_disable(&cpu_feature_keys[i]);
2264 }
2265}
2266
2267struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
2268 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
2269};
2270EXPORT_SYMBOL_GPL(mmu_feature_keys);
2271
2272void __init mmu_feature_keys_init(void)
2273{
2274 int i;
2275
2276 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
2277 unsigned long f = 1ul << i;
2278
2279 if (!(cur_cpu_spec->mmu_features & f))
2280 static_branch_disable(&mmu_feature_keys[i]);
2281 }
2282}
2283#endif