Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
4 *
5 * Modifications for ppc64:
6 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
7 */
8
9#include <linux/string.h>
10#include <linux/sched.h>
11#include <linux/threads.h>
12#include <linux/init.h>
13#include <linux/export.h>
14#include <linux/jump_label.h>
15#include <linux/of.h>
16
17#include <asm/cputable.h>
18#include <asm/mce.h>
19#include <asm/mmu.h>
20#include <asm/setup.h>
21#include <asm/cpu_setup.h>
22
23static struct cpu_spec the_cpu_spec __read_mostly;
24
25struct cpu_spec* cur_cpu_spec __read_mostly = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31#include "cpu_specs.h"
32
33void __init set_cur_cpu_spec(struct cpu_spec *s)
34{
35 struct cpu_spec *t = &the_cpu_spec;
36
37 t = PTRRELOC(t);
38 /*
39 * use memcpy() instead of *t = *s so that GCC replaces it
40 * by __memcpy() when KASAN is active
41 */
42 memcpy(t, s, sizeof(*t));
43
44 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
45}
46
47static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
48 struct cpu_spec *s)
49{
50 struct cpu_spec *t = &the_cpu_spec;
51 struct cpu_spec old;
52
53 t = PTRRELOC(t);
54 old = *t;
55
56 /*
57 * Copy everything, then do fixups. Use memcpy() instead of *t = *s
58 * so that GCC replaces it by __memcpy() when KASAN is active
59 */
60 memcpy(t, s, sizeof(*t));
61
62 /*
63 * If we are overriding a previous value derived from the real
64 * PVR with a new value obtained using a logical PVR value,
65 * don't modify the performance monitor fields.
66 */
67 if (old.num_pmcs && !s->num_pmcs) {
68 t->num_pmcs = old.num_pmcs;
69 t->pmc_type = old.pmc_type;
70
71 /*
72 * Let's ensure that the
73 * fix for the PMAO bug is enabled on compatibility mode.
74 */
75 t->cpu_features |= old.cpu_features & CPU_FTR_PMAO_BUG;
76 }
77
78 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
79
80 /*
81 * Set the base platform string once; assumes
82 * we're called with real pvr first.
83 */
84 if (*PTRRELOC(&powerpc_base_platform) == NULL)
85 *PTRRELOC(&powerpc_base_platform) = t->platform;
86
87#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
88 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
89 * that processor. I will consolidate that at a later time, for now,
90 * just use #ifdef. We also don't need to PTRRELOC the function
91 * pointer on ppc64 and booke as we are running at 0 in real mode
92 * on ppc64 and reloc_offset is always 0 on booke.
93 */
94 if (t->cpu_setup) {
95 t->cpu_setup(offset, t);
96 }
97#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
98
99 return t;
100}
101
102struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
103{
104 struct cpu_spec *s = cpu_specs;
105 int i;
106
107 BUILD_BUG_ON(!ARRAY_SIZE(cpu_specs));
108
109 s = PTRRELOC(s);
110
111 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
112 if ((pvr & s->pvr_mask) == s->pvr_value)
113 return setup_cpu_spec(offset, s);
114 }
115
116 BUG();
117
118 return NULL;
119}
120
121/*
122 * Used by cpufeatures to get the name for CPUs with a PVR table.
123 * If they don't hae a PVR table, cpufeatures gets the name from
124 * cpu device-tree node.
125 */
126void __init identify_cpu_name(unsigned int pvr)
127{
128 struct cpu_spec *s = cpu_specs;
129 struct cpu_spec *t = &the_cpu_spec;
130 int i;
131
132 s = PTRRELOC(s);
133 t = PTRRELOC(t);
134
135 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
136 if ((pvr & s->pvr_mask) == s->pvr_value) {
137 t->cpu_name = s->cpu_name;
138 return;
139 }
140 }
141}
142
143
144#ifdef CONFIG_JUMP_LABEL_FEATURE_CHECKS
145struct static_key_true cpu_feature_keys[NUM_CPU_FTR_KEYS] = {
146 [0 ... NUM_CPU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
147};
148EXPORT_SYMBOL_GPL(cpu_feature_keys);
149
150void __init cpu_feature_keys_init(void)
151{
152 int i;
153
154 for (i = 0; i < NUM_CPU_FTR_KEYS; i++) {
155 unsigned long f = 1ul << i;
156
157 if (!(cur_cpu_spec->cpu_features & f))
158 static_branch_disable(&cpu_feature_keys[i]);
159 }
160}
161
162struct static_key_true mmu_feature_keys[NUM_MMU_FTR_KEYS] = {
163 [0 ... NUM_MMU_FTR_KEYS - 1] = STATIC_KEY_TRUE_INIT
164};
165EXPORT_SYMBOL(mmu_feature_keys);
166
167void __init mmu_feature_keys_init(void)
168{
169 int i;
170
171 for (i = 0; i < NUM_MMU_FTR_KEYS; i++) {
172 unsigned long f = 1ul << i;
173
174 if (!(cur_cpu_spec->mmu_features & f))
175 static_branch_disable(&mmu_feature_keys[i]);
176 }
177}
178#endif
1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <linux/export.h>
18
19#include <asm/oprofile_impl.h>
20#include <asm/cputable.h>
21#include <asm/prom.h> /* for PTRRELOC on ARCH=ppc */
22#include <asm/mmu.h>
23#include <asm/setup.h>
24
25struct cpu_spec* cur_cpu_spec = NULL;
26EXPORT_SYMBOL(cur_cpu_spec);
27
28/* The platform string corresponding to the real PVR */
29const char *powerpc_base_platform;
30
31/* NOTE:
32 * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
33 * the responsibility of the appropriate CPU save/restore functions to
34 * eventually copy these settings over. Those save/restore aren't yet
35 * part of the cputable though. That has to be fixed for both ppc32
36 * and ppc64
37 */
38#ifdef CONFIG_PPC32
39extern void __setup_cpu_e200(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_e500v1(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_e500v2(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_e500mc(unsigned long offset, struct cpu_spec* spec);
43extern void __setup_cpu_440ep(unsigned long offset, struct cpu_spec* spec);
44extern void __setup_cpu_440epx(unsigned long offset, struct cpu_spec* spec);
45extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
46extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
47extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
48extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
49extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
50extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
51extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
52extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
53extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
54extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
55extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
56extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
57extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
58extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
59extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
60extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
61#endif /* CONFIG_PPC32 */
62#ifdef CONFIG_PPC64
63extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
64extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
65extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
66extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
67extern void __restore_cpu_pa6t(void);
68extern void __restore_cpu_ppc970(void);
69extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
70extern void __restore_cpu_power7(void);
71extern void __setup_cpu_power8(unsigned long offset, struct cpu_spec* spec);
72extern void __restore_cpu_power8(void);
73extern void __restore_cpu_a2(void);
74extern void __flush_tlb_power7(unsigned long inval_selector);
75extern void __flush_tlb_power8(unsigned long inval_selector);
76extern long __machine_check_early_realmode_p7(struct pt_regs *regs);
77extern long __machine_check_early_realmode_p8(struct pt_regs *regs);
78#endif /* CONFIG_PPC64 */
79#if defined(CONFIG_E500)
80extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
81extern void __setup_cpu_e6500(unsigned long offset, struct cpu_spec* spec);
82extern void __restore_cpu_e5500(void);
83extern void __restore_cpu_e6500(void);
84#endif /* CONFIG_E500 */
85
86/* This table only contains "desktop" CPUs, it need to be filled with embedded
87 * ones as well...
88 */
89#define COMMON_USER (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
90 PPC_FEATURE_HAS_MMU)
91#define COMMON_USER_PPC64 (COMMON_USER | PPC_FEATURE_64)
92#define COMMON_USER_POWER4 (COMMON_USER_PPC64 | PPC_FEATURE_POWER4)
93#define COMMON_USER_POWER5 (COMMON_USER_PPC64 | PPC_FEATURE_POWER5 |\
94 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
95#define COMMON_USER_POWER5_PLUS (COMMON_USER_PPC64 | PPC_FEATURE_POWER5_PLUS|\
96 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
97#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
98 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
99 PPC_FEATURE_TRUE_LE | \
100 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
101#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
102 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
103 PPC_FEATURE_TRUE_LE | \
104 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
105#define COMMON_USER2_POWER7 (PPC_FEATURE2_DSCR)
106#define COMMON_USER_POWER8 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
107 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
108 PPC_FEATURE_TRUE_LE | \
109 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
110#define COMMON_USER2_POWER8 (PPC_FEATURE2_ARCH_2_07 | \
111 PPC_FEATURE2_HTM_COMP | PPC_FEATURE2_DSCR | \
112 PPC_FEATURE2_ISEL | PPC_FEATURE2_TAR)
113#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
114 PPC_FEATURE_TRUE_LE | \
115 PPC_FEATURE_HAS_ALTIVEC_COMP)
116#ifdef CONFIG_PPC_BOOK3E_64
117#define COMMON_USER_BOOKE (COMMON_USER_PPC64 | PPC_FEATURE_BOOKE)
118#else
119#define COMMON_USER_BOOKE (PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU | \
120 PPC_FEATURE_BOOKE)
121#endif
122
123static struct cpu_spec __initdata cpu_specs[] = {
124#ifdef CONFIG_PPC_BOOK3S_64
125 { /* Power3 */
126 .pvr_mask = 0xffff0000,
127 .pvr_value = 0x00400000,
128 .cpu_name = "POWER3 (630)",
129 .cpu_features = CPU_FTRS_POWER3,
130 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
131 .mmu_features = MMU_FTR_HPTE_TABLE,
132 .icache_bsize = 128,
133 .dcache_bsize = 128,
134 .num_pmcs = 8,
135 .pmc_type = PPC_PMC_IBM,
136 .oprofile_cpu_type = "ppc64/power3",
137 .oprofile_type = PPC_OPROFILE_RS64,
138 .platform = "power3",
139 },
140 { /* Power3+ */
141 .pvr_mask = 0xffff0000,
142 .pvr_value = 0x00410000,
143 .cpu_name = "POWER3 (630+)",
144 .cpu_features = CPU_FTRS_POWER3,
145 .cpu_user_features = COMMON_USER_PPC64|PPC_FEATURE_PPC_LE,
146 .mmu_features = MMU_FTR_HPTE_TABLE,
147 .icache_bsize = 128,
148 .dcache_bsize = 128,
149 .num_pmcs = 8,
150 .pmc_type = PPC_PMC_IBM,
151 .oprofile_cpu_type = "ppc64/power3",
152 .oprofile_type = PPC_OPROFILE_RS64,
153 .platform = "power3",
154 },
155 { /* Northstar */
156 .pvr_mask = 0xffff0000,
157 .pvr_value = 0x00330000,
158 .cpu_name = "RS64-II (northstar)",
159 .cpu_features = CPU_FTRS_RS64,
160 .cpu_user_features = COMMON_USER_PPC64,
161 .mmu_features = MMU_FTR_HPTE_TABLE,
162 .icache_bsize = 128,
163 .dcache_bsize = 128,
164 .num_pmcs = 8,
165 .pmc_type = PPC_PMC_IBM,
166 .oprofile_cpu_type = "ppc64/rs64",
167 .oprofile_type = PPC_OPROFILE_RS64,
168 .platform = "rs64",
169 },
170 { /* Pulsar */
171 .pvr_mask = 0xffff0000,
172 .pvr_value = 0x00340000,
173 .cpu_name = "RS64-III (pulsar)",
174 .cpu_features = CPU_FTRS_RS64,
175 .cpu_user_features = COMMON_USER_PPC64,
176 .mmu_features = MMU_FTR_HPTE_TABLE,
177 .icache_bsize = 128,
178 .dcache_bsize = 128,
179 .num_pmcs = 8,
180 .pmc_type = PPC_PMC_IBM,
181 .oprofile_cpu_type = "ppc64/rs64",
182 .oprofile_type = PPC_OPROFILE_RS64,
183 .platform = "rs64",
184 },
185 { /* I-star */
186 .pvr_mask = 0xffff0000,
187 .pvr_value = 0x00360000,
188 .cpu_name = "RS64-III (icestar)",
189 .cpu_features = CPU_FTRS_RS64,
190 .cpu_user_features = COMMON_USER_PPC64,
191 .mmu_features = MMU_FTR_HPTE_TABLE,
192 .icache_bsize = 128,
193 .dcache_bsize = 128,
194 .num_pmcs = 8,
195 .pmc_type = PPC_PMC_IBM,
196 .oprofile_cpu_type = "ppc64/rs64",
197 .oprofile_type = PPC_OPROFILE_RS64,
198 .platform = "rs64",
199 },
200 { /* S-star */
201 .pvr_mask = 0xffff0000,
202 .pvr_value = 0x00370000,
203 .cpu_name = "RS64-IV (sstar)",
204 .cpu_features = CPU_FTRS_RS64,
205 .cpu_user_features = COMMON_USER_PPC64,
206 .mmu_features = MMU_FTR_HPTE_TABLE,
207 .icache_bsize = 128,
208 .dcache_bsize = 128,
209 .num_pmcs = 8,
210 .pmc_type = PPC_PMC_IBM,
211 .oprofile_cpu_type = "ppc64/rs64",
212 .oprofile_type = PPC_OPROFILE_RS64,
213 .platform = "rs64",
214 },
215 { /* Power4 */
216 .pvr_mask = 0xffff0000,
217 .pvr_value = 0x00350000,
218 .cpu_name = "POWER4 (gp)",
219 .cpu_features = CPU_FTRS_POWER4,
220 .cpu_user_features = COMMON_USER_POWER4,
221 .mmu_features = MMU_FTRS_POWER4,
222 .icache_bsize = 128,
223 .dcache_bsize = 128,
224 .num_pmcs = 8,
225 .pmc_type = PPC_PMC_IBM,
226 .oprofile_cpu_type = "ppc64/power4",
227 .oprofile_type = PPC_OPROFILE_POWER4,
228 .platform = "power4",
229 },
230 { /* Power4+ */
231 .pvr_mask = 0xffff0000,
232 .pvr_value = 0x00380000,
233 .cpu_name = "POWER4+ (gq)",
234 .cpu_features = CPU_FTRS_POWER4,
235 .cpu_user_features = COMMON_USER_POWER4,
236 .mmu_features = MMU_FTRS_POWER4,
237 .icache_bsize = 128,
238 .dcache_bsize = 128,
239 .num_pmcs = 8,
240 .pmc_type = PPC_PMC_IBM,
241 .oprofile_cpu_type = "ppc64/power4",
242 .oprofile_type = PPC_OPROFILE_POWER4,
243 .platform = "power4",
244 },
245 { /* PPC970 */
246 .pvr_mask = 0xffff0000,
247 .pvr_value = 0x00390000,
248 .cpu_name = "PPC970",
249 .cpu_features = CPU_FTRS_PPC970,
250 .cpu_user_features = COMMON_USER_POWER4 |
251 PPC_FEATURE_HAS_ALTIVEC_COMP,
252 .mmu_features = MMU_FTRS_PPC970,
253 .icache_bsize = 128,
254 .dcache_bsize = 128,
255 .num_pmcs = 8,
256 .pmc_type = PPC_PMC_IBM,
257 .cpu_setup = __setup_cpu_ppc970,
258 .cpu_restore = __restore_cpu_ppc970,
259 .oprofile_cpu_type = "ppc64/970",
260 .oprofile_type = PPC_OPROFILE_POWER4,
261 .platform = "ppc970",
262 },
263 { /* PPC970FX */
264 .pvr_mask = 0xffff0000,
265 .pvr_value = 0x003c0000,
266 .cpu_name = "PPC970FX",
267 .cpu_features = CPU_FTRS_PPC970,
268 .cpu_user_features = COMMON_USER_POWER4 |
269 PPC_FEATURE_HAS_ALTIVEC_COMP,
270 .mmu_features = MMU_FTRS_PPC970,
271 .icache_bsize = 128,
272 .dcache_bsize = 128,
273 .num_pmcs = 8,
274 .pmc_type = PPC_PMC_IBM,
275 .cpu_setup = __setup_cpu_ppc970,
276 .cpu_restore = __restore_cpu_ppc970,
277 .oprofile_cpu_type = "ppc64/970",
278 .oprofile_type = PPC_OPROFILE_POWER4,
279 .platform = "ppc970",
280 },
281 { /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
282 .pvr_mask = 0xffffffff,
283 .pvr_value = 0x00440100,
284 .cpu_name = "PPC970MP",
285 .cpu_features = CPU_FTRS_PPC970,
286 .cpu_user_features = COMMON_USER_POWER4 |
287 PPC_FEATURE_HAS_ALTIVEC_COMP,
288 .mmu_features = MMU_FTRS_PPC970,
289 .icache_bsize = 128,
290 .dcache_bsize = 128,
291 .num_pmcs = 8,
292 .pmc_type = PPC_PMC_IBM,
293 .cpu_setup = __setup_cpu_ppc970,
294 .cpu_restore = __restore_cpu_ppc970,
295 .oprofile_cpu_type = "ppc64/970MP",
296 .oprofile_type = PPC_OPROFILE_POWER4,
297 .platform = "ppc970",
298 },
299 { /* PPC970MP */
300 .pvr_mask = 0xffff0000,
301 .pvr_value = 0x00440000,
302 .cpu_name = "PPC970MP",
303 .cpu_features = CPU_FTRS_PPC970,
304 .cpu_user_features = COMMON_USER_POWER4 |
305 PPC_FEATURE_HAS_ALTIVEC_COMP,
306 .mmu_features = MMU_FTRS_PPC970,
307 .icache_bsize = 128,
308 .dcache_bsize = 128,
309 .num_pmcs = 8,
310 .pmc_type = PPC_PMC_IBM,
311 .cpu_setup = __setup_cpu_ppc970MP,
312 .cpu_restore = __restore_cpu_ppc970,
313 .oprofile_cpu_type = "ppc64/970MP",
314 .oprofile_type = PPC_OPROFILE_POWER4,
315 .platform = "ppc970",
316 },
317 { /* PPC970GX */
318 .pvr_mask = 0xffff0000,
319 .pvr_value = 0x00450000,
320 .cpu_name = "PPC970GX",
321 .cpu_features = CPU_FTRS_PPC970,
322 .cpu_user_features = COMMON_USER_POWER4 |
323 PPC_FEATURE_HAS_ALTIVEC_COMP,
324 .mmu_features = MMU_FTRS_PPC970,
325 .icache_bsize = 128,
326 .dcache_bsize = 128,
327 .num_pmcs = 8,
328 .pmc_type = PPC_PMC_IBM,
329 .cpu_setup = __setup_cpu_ppc970,
330 .oprofile_cpu_type = "ppc64/970",
331 .oprofile_type = PPC_OPROFILE_POWER4,
332 .platform = "ppc970",
333 },
334 { /* Power5 GR */
335 .pvr_mask = 0xffff0000,
336 .pvr_value = 0x003a0000,
337 .cpu_name = "POWER5 (gr)",
338 .cpu_features = CPU_FTRS_POWER5,
339 .cpu_user_features = COMMON_USER_POWER5,
340 .mmu_features = MMU_FTRS_POWER5,
341 .icache_bsize = 128,
342 .dcache_bsize = 128,
343 .num_pmcs = 6,
344 .pmc_type = PPC_PMC_IBM,
345 .oprofile_cpu_type = "ppc64/power5",
346 .oprofile_type = PPC_OPROFILE_POWER4,
347 /* SIHV / SIPR bits are implemented on POWER4+ (GQ)
348 * and above but only works on POWER5 and above
349 */
350 .oprofile_mmcra_sihv = MMCRA_SIHV,
351 .oprofile_mmcra_sipr = MMCRA_SIPR,
352 .platform = "power5",
353 },
354 { /* Power5++ */
355 .pvr_mask = 0xffffff00,
356 .pvr_value = 0x003b0300,
357 .cpu_name = "POWER5+ (gs)",
358 .cpu_features = CPU_FTRS_POWER5,
359 .cpu_user_features = COMMON_USER_POWER5_PLUS,
360 .mmu_features = MMU_FTRS_POWER5,
361 .icache_bsize = 128,
362 .dcache_bsize = 128,
363 .num_pmcs = 6,
364 .oprofile_cpu_type = "ppc64/power5++",
365 .oprofile_type = PPC_OPROFILE_POWER4,
366 .oprofile_mmcra_sihv = MMCRA_SIHV,
367 .oprofile_mmcra_sipr = MMCRA_SIPR,
368 .platform = "power5+",
369 },
370 { /* Power5 GS */
371 .pvr_mask = 0xffff0000,
372 .pvr_value = 0x003b0000,
373 .cpu_name = "POWER5+ (gs)",
374 .cpu_features = CPU_FTRS_POWER5,
375 .cpu_user_features = COMMON_USER_POWER5_PLUS,
376 .mmu_features = MMU_FTRS_POWER5,
377 .icache_bsize = 128,
378 .dcache_bsize = 128,
379 .num_pmcs = 6,
380 .pmc_type = PPC_PMC_IBM,
381 .oprofile_cpu_type = "ppc64/power5+",
382 .oprofile_type = PPC_OPROFILE_POWER4,
383 .oprofile_mmcra_sihv = MMCRA_SIHV,
384 .oprofile_mmcra_sipr = MMCRA_SIPR,
385 .platform = "power5+",
386 },
387 { /* POWER6 in P5+ mode; 2.04-compliant processor */
388 .pvr_mask = 0xffffffff,
389 .pvr_value = 0x0f000001,
390 .cpu_name = "POWER5+",
391 .cpu_features = CPU_FTRS_POWER5,
392 .cpu_user_features = COMMON_USER_POWER5_PLUS,
393 .mmu_features = MMU_FTRS_POWER5,
394 .icache_bsize = 128,
395 .dcache_bsize = 128,
396 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
397 .oprofile_type = PPC_OPROFILE_POWER4,
398 .platform = "power5+",
399 },
400 { /* Power6 */
401 .pvr_mask = 0xffff0000,
402 .pvr_value = 0x003e0000,
403 .cpu_name = "POWER6 (raw)",
404 .cpu_features = CPU_FTRS_POWER6,
405 .cpu_user_features = COMMON_USER_POWER6 |
406 PPC_FEATURE_POWER6_EXT,
407 .mmu_features = MMU_FTRS_POWER6,
408 .icache_bsize = 128,
409 .dcache_bsize = 128,
410 .num_pmcs = 6,
411 .pmc_type = PPC_PMC_IBM,
412 .oprofile_cpu_type = "ppc64/power6",
413 .oprofile_type = PPC_OPROFILE_POWER4,
414 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
415 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
416 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
417 POWER6_MMCRA_OTHER,
418 .platform = "power6x",
419 },
420 { /* 2.05-compliant processor, i.e. Power6 "architected" mode */
421 .pvr_mask = 0xffffffff,
422 .pvr_value = 0x0f000002,
423 .cpu_name = "POWER6 (architected)",
424 .cpu_features = CPU_FTRS_POWER6,
425 .cpu_user_features = COMMON_USER_POWER6,
426 .mmu_features = MMU_FTRS_POWER6,
427 .icache_bsize = 128,
428 .dcache_bsize = 128,
429 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
430 .oprofile_type = PPC_OPROFILE_POWER4,
431 .platform = "power6",
432 },
433 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
434 .pvr_mask = 0xffffffff,
435 .pvr_value = 0x0f000003,
436 .cpu_name = "POWER7 (architected)",
437 .cpu_features = CPU_FTRS_POWER7,
438 .cpu_user_features = COMMON_USER_POWER7,
439 .cpu_user_features2 = COMMON_USER2_POWER7,
440 .mmu_features = MMU_FTRS_POWER7,
441 .icache_bsize = 128,
442 .dcache_bsize = 128,
443 .oprofile_type = PPC_OPROFILE_POWER4,
444 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
445 .cpu_setup = __setup_cpu_power7,
446 .cpu_restore = __restore_cpu_power7,
447 .flush_tlb = __flush_tlb_power7,
448 .machine_check_early = __machine_check_early_realmode_p7,
449 .platform = "power7",
450 },
451 { /* 2.07-compliant processor, i.e. Power8 "architected" mode */
452 .pvr_mask = 0xffffffff,
453 .pvr_value = 0x0f000004,
454 .cpu_name = "POWER8 (architected)",
455 .cpu_features = CPU_FTRS_POWER8,
456 .cpu_user_features = COMMON_USER_POWER8,
457 .cpu_user_features2 = COMMON_USER2_POWER8,
458 .mmu_features = MMU_FTRS_POWER8,
459 .icache_bsize = 128,
460 .dcache_bsize = 128,
461 .oprofile_type = PPC_OPROFILE_INVALID,
462 .oprofile_cpu_type = "ppc64/ibm-compat-v1",
463 .cpu_setup = __setup_cpu_power8,
464 .cpu_restore = __restore_cpu_power8,
465 .flush_tlb = __flush_tlb_power8,
466 .machine_check_early = __machine_check_early_realmode_p8,
467 .platform = "power8",
468 },
469 { /* Power7 */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x003f0000,
472 .cpu_name = "POWER7 (raw)",
473 .cpu_features = CPU_FTRS_POWER7,
474 .cpu_user_features = COMMON_USER_POWER7,
475 .cpu_user_features2 = COMMON_USER2_POWER7,
476 .mmu_features = MMU_FTRS_POWER7,
477 .icache_bsize = 128,
478 .dcache_bsize = 128,
479 .num_pmcs = 6,
480 .pmc_type = PPC_PMC_IBM,
481 .oprofile_cpu_type = "ppc64/power7",
482 .oprofile_type = PPC_OPROFILE_POWER4,
483 .cpu_setup = __setup_cpu_power7,
484 .cpu_restore = __restore_cpu_power7,
485 .flush_tlb = __flush_tlb_power7,
486 .machine_check_early = __machine_check_early_realmode_p7,
487 .platform = "power7",
488 },
489 { /* Power7+ */
490 .pvr_mask = 0xffff0000,
491 .pvr_value = 0x004A0000,
492 .cpu_name = "POWER7+ (raw)",
493 .cpu_features = CPU_FTRS_POWER7,
494 .cpu_user_features = COMMON_USER_POWER7,
495 .cpu_user_features2 = COMMON_USER2_POWER7,
496 .mmu_features = MMU_FTRS_POWER7,
497 .icache_bsize = 128,
498 .dcache_bsize = 128,
499 .num_pmcs = 6,
500 .pmc_type = PPC_PMC_IBM,
501 .oprofile_cpu_type = "ppc64/power7",
502 .oprofile_type = PPC_OPROFILE_POWER4,
503 .cpu_setup = __setup_cpu_power7,
504 .cpu_restore = __restore_cpu_power7,
505 .flush_tlb = __flush_tlb_power7,
506 .machine_check_early = __machine_check_early_realmode_p7,
507 .platform = "power7+",
508 },
509 { /* Power8E */
510 .pvr_mask = 0xffff0000,
511 .pvr_value = 0x004b0000,
512 .cpu_name = "POWER8E (raw)",
513 .cpu_features = CPU_FTRS_POWER8E,
514 .cpu_user_features = COMMON_USER_POWER8,
515 .cpu_user_features2 = COMMON_USER2_POWER8,
516 .mmu_features = MMU_FTRS_POWER8,
517 .icache_bsize = 128,
518 .dcache_bsize = 128,
519 .num_pmcs = 6,
520 .pmc_type = PPC_PMC_IBM,
521 .oprofile_cpu_type = "ppc64/power8",
522 .oprofile_type = PPC_OPROFILE_INVALID,
523 .cpu_setup = __setup_cpu_power8,
524 .cpu_restore = __restore_cpu_power8,
525 .flush_tlb = __flush_tlb_power8,
526 .machine_check_early = __machine_check_early_realmode_p8,
527 .platform = "power8",
528 },
529 { /* Power8 */
530 .pvr_mask = 0xffff0000,
531 .pvr_value = 0x004d0000,
532 .cpu_name = "POWER8 (raw)",
533 .cpu_features = CPU_FTRS_POWER8,
534 .cpu_user_features = COMMON_USER_POWER8,
535 .cpu_user_features2 = COMMON_USER2_POWER8,
536 .mmu_features = MMU_FTRS_POWER8,
537 .icache_bsize = 128,
538 .dcache_bsize = 128,
539 .num_pmcs = 6,
540 .pmc_type = PPC_PMC_IBM,
541 .oprofile_cpu_type = "ppc64/power8",
542 .oprofile_type = PPC_OPROFILE_INVALID,
543 .cpu_setup = __setup_cpu_power8,
544 .cpu_restore = __restore_cpu_power8,
545 .flush_tlb = __flush_tlb_power8,
546 .machine_check_early = __machine_check_early_realmode_p8,
547 .platform = "power8",
548 },
549 { /* Cell Broadband Engine */
550 .pvr_mask = 0xffff0000,
551 .pvr_value = 0x00700000,
552 .cpu_name = "Cell Broadband Engine",
553 .cpu_features = CPU_FTRS_CELL,
554 .cpu_user_features = COMMON_USER_PPC64 |
555 PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
556 PPC_FEATURE_SMT,
557 .mmu_features = MMU_FTRS_CELL,
558 .icache_bsize = 128,
559 .dcache_bsize = 128,
560 .num_pmcs = 4,
561 .pmc_type = PPC_PMC_IBM,
562 .oprofile_cpu_type = "ppc64/cell-be",
563 .oprofile_type = PPC_OPROFILE_CELL,
564 .platform = "ppc-cell-be",
565 },
566 { /* PA Semi PA6T */
567 .pvr_mask = 0x7fff0000,
568 .pvr_value = 0x00900000,
569 .cpu_name = "PA6T",
570 .cpu_features = CPU_FTRS_PA6T,
571 .cpu_user_features = COMMON_USER_PA6T,
572 .mmu_features = MMU_FTRS_PA6T,
573 .icache_bsize = 64,
574 .dcache_bsize = 64,
575 .num_pmcs = 6,
576 .pmc_type = PPC_PMC_PA6T,
577 .cpu_setup = __setup_cpu_pa6t,
578 .cpu_restore = __restore_cpu_pa6t,
579 .oprofile_cpu_type = "ppc64/pa6t",
580 .oprofile_type = PPC_OPROFILE_PA6T,
581 .platform = "pa6t",
582 },
583 { /* default match */
584 .pvr_mask = 0x00000000,
585 .pvr_value = 0x00000000,
586 .cpu_name = "POWER4 (compatible)",
587 .cpu_features = CPU_FTRS_COMPATIBLE,
588 .cpu_user_features = COMMON_USER_PPC64,
589 .mmu_features = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
590 .icache_bsize = 128,
591 .dcache_bsize = 128,
592 .num_pmcs = 6,
593 .pmc_type = PPC_PMC_IBM,
594 .platform = "power4",
595 }
596#endif /* CONFIG_PPC_BOOK3S_64 */
597
598#ifdef CONFIG_PPC32
599#if CLASSIC_PPC
600 { /* 601 */
601 .pvr_mask = 0xffff0000,
602 .pvr_value = 0x00010000,
603 .cpu_name = "601",
604 .cpu_features = CPU_FTRS_PPC601,
605 .cpu_user_features = COMMON_USER | PPC_FEATURE_601_INSTR |
606 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
607 .mmu_features = MMU_FTR_HPTE_TABLE,
608 .icache_bsize = 32,
609 .dcache_bsize = 32,
610 .machine_check = machine_check_generic,
611 .platform = "ppc601",
612 },
613 { /* 603 */
614 .pvr_mask = 0xffff0000,
615 .pvr_value = 0x00030000,
616 .cpu_name = "603",
617 .cpu_features = CPU_FTRS_603,
618 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
619 .mmu_features = 0,
620 .icache_bsize = 32,
621 .dcache_bsize = 32,
622 .cpu_setup = __setup_cpu_603,
623 .machine_check = machine_check_generic,
624 .platform = "ppc603",
625 },
626 { /* 603e */
627 .pvr_mask = 0xffff0000,
628 .pvr_value = 0x00060000,
629 .cpu_name = "603e",
630 .cpu_features = CPU_FTRS_603,
631 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
632 .mmu_features = 0,
633 .icache_bsize = 32,
634 .dcache_bsize = 32,
635 .cpu_setup = __setup_cpu_603,
636 .machine_check = machine_check_generic,
637 .platform = "ppc603",
638 },
639 { /* 603ev */
640 .pvr_mask = 0xffff0000,
641 .pvr_value = 0x00070000,
642 .cpu_name = "603ev",
643 .cpu_features = CPU_FTRS_603,
644 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
645 .mmu_features = 0,
646 .icache_bsize = 32,
647 .dcache_bsize = 32,
648 .cpu_setup = __setup_cpu_603,
649 .machine_check = machine_check_generic,
650 .platform = "ppc603",
651 },
652 { /* 604 */
653 .pvr_mask = 0xffff0000,
654 .pvr_value = 0x00040000,
655 .cpu_name = "604",
656 .cpu_features = CPU_FTRS_604,
657 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
658 .mmu_features = MMU_FTR_HPTE_TABLE,
659 .icache_bsize = 32,
660 .dcache_bsize = 32,
661 .num_pmcs = 2,
662 .cpu_setup = __setup_cpu_604,
663 .machine_check = machine_check_generic,
664 .platform = "ppc604",
665 },
666 { /* 604e */
667 .pvr_mask = 0xfffff000,
668 .pvr_value = 0x00090000,
669 .cpu_name = "604e",
670 .cpu_features = CPU_FTRS_604,
671 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
672 .mmu_features = MMU_FTR_HPTE_TABLE,
673 .icache_bsize = 32,
674 .dcache_bsize = 32,
675 .num_pmcs = 4,
676 .cpu_setup = __setup_cpu_604,
677 .machine_check = machine_check_generic,
678 .platform = "ppc604",
679 },
680 { /* 604r */
681 .pvr_mask = 0xffff0000,
682 .pvr_value = 0x00090000,
683 .cpu_name = "604r",
684 .cpu_features = CPU_FTRS_604,
685 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
686 .mmu_features = MMU_FTR_HPTE_TABLE,
687 .icache_bsize = 32,
688 .dcache_bsize = 32,
689 .num_pmcs = 4,
690 .cpu_setup = __setup_cpu_604,
691 .machine_check = machine_check_generic,
692 .platform = "ppc604",
693 },
694 { /* 604ev */
695 .pvr_mask = 0xffff0000,
696 .pvr_value = 0x000a0000,
697 .cpu_name = "604ev",
698 .cpu_features = CPU_FTRS_604,
699 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
700 .mmu_features = MMU_FTR_HPTE_TABLE,
701 .icache_bsize = 32,
702 .dcache_bsize = 32,
703 .num_pmcs = 4,
704 .cpu_setup = __setup_cpu_604,
705 .machine_check = machine_check_generic,
706 .platform = "ppc604",
707 },
708 { /* 740/750 (0x4202, don't support TAU ?) */
709 .pvr_mask = 0xffffffff,
710 .pvr_value = 0x00084202,
711 .cpu_name = "740/750",
712 .cpu_features = CPU_FTRS_740_NOTAU,
713 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
714 .mmu_features = MMU_FTR_HPTE_TABLE,
715 .icache_bsize = 32,
716 .dcache_bsize = 32,
717 .num_pmcs = 4,
718 .cpu_setup = __setup_cpu_750,
719 .machine_check = machine_check_generic,
720 .platform = "ppc750",
721 },
722 { /* 750CX (80100 and 8010x?) */
723 .pvr_mask = 0xfffffff0,
724 .pvr_value = 0x00080100,
725 .cpu_name = "750CX",
726 .cpu_features = CPU_FTRS_750,
727 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
728 .mmu_features = MMU_FTR_HPTE_TABLE,
729 .icache_bsize = 32,
730 .dcache_bsize = 32,
731 .num_pmcs = 4,
732 .cpu_setup = __setup_cpu_750cx,
733 .machine_check = machine_check_generic,
734 .platform = "ppc750",
735 },
736 { /* 750CX (82201 and 82202) */
737 .pvr_mask = 0xfffffff0,
738 .pvr_value = 0x00082200,
739 .cpu_name = "750CX",
740 .cpu_features = CPU_FTRS_750,
741 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
742 .mmu_features = MMU_FTR_HPTE_TABLE,
743 .icache_bsize = 32,
744 .dcache_bsize = 32,
745 .num_pmcs = 4,
746 .pmc_type = PPC_PMC_IBM,
747 .cpu_setup = __setup_cpu_750cx,
748 .machine_check = machine_check_generic,
749 .platform = "ppc750",
750 },
751 { /* 750CXe (82214) */
752 .pvr_mask = 0xfffffff0,
753 .pvr_value = 0x00082210,
754 .cpu_name = "750CXe",
755 .cpu_features = CPU_FTRS_750,
756 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
757 .mmu_features = MMU_FTR_HPTE_TABLE,
758 .icache_bsize = 32,
759 .dcache_bsize = 32,
760 .num_pmcs = 4,
761 .pmc_type = PPC_PMC_IBM,
762 .cpu_setup = __setup_cpu_750cx,
763 .machine_check = machine_check_generic,
764 .platform = "ppc750",
765 },
766 { /* 750CXe "Gekko" (83214) */
767 .pvr_mask = 0xffffffff,
768 .pvr_value = 0x00083214,
769 .cpu_name = "750CXe",
770 .cpu_features = CPU_FTRS_750,
771 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
772 .mmu_features = MMU_FTR_HPTE_TABLE,
773 .icache_bsize = 32,
774 .dcache_bsize = 32,
775 .num_pmcs = 4,
776 .pmc_type = PPC_PMC_IBM,
777 .cpu_setup = __setup_cpu_750cx,
778 .machine_check = machine_check_generic,
779 .platform = "ppc750",
780 },
781 { /* 750CL (and "Broadway") */
782 .pvr_mask = 0xfffff0e0,
783 .pvr_value = 0x00087000,
784 .cpu_name = "750CL",
785 .cpu_features = CPU_FTRS_750CL,
786 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
787 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
788 .icache_bsize = 32,
789 .dcache_bsize = 32,
790 .num_pmcs = 4,
791 .pmc_type = PPC_PMC_IBM,
792 .cpu_setup = __setup_cpu_750,
793 .machine_check = machine_check_generic,
794 .platform = "ppc750",
795 .oprofile_cpu_type = "ppc/750",
796 .oprofile_type = PPC_OPROFILE_G4,
797 },
798 { /* 745/755 */
799 .pvr_mask = 0xfffff000,
800 .pvr_value = 0x00083000,
801 .cpu_name = "745/755",
802 .cpu_features = CPU_FTRS_750,
803 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
804 .mmu_features = MMU_FTR_HPTE_TABLE,
805 .icache_bsize = 32,
806 .dcache_bsize = 32,
807 .num_pmcs = 4,
808 .pmc_type = PPC_PMC_IBM,
809 .cpu_setup = __setup_cpu_750,
810 .machine_check = machine_check_generic,
811 .platform = "ppc750",
812 },
813 { /* 750FX rev 1.x */
814 .pvr_mask = 0xffffff00,
815 .pvr_value = 0x70000100,
816 .cpu_name = "750FX",
817 .cpu_features = CPU_FTRS_750FX1,
818 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
819 .mmu_features = MMU_FTR_HPTE_TABLE,
820 .icache_bsize = 32,
821 .dcache_bsize = 32,
822 .num_pmcs = 4,
823 .pmc_type = PPC_PMC_IBM,
824 .cpu_setup = __setup_cpu_750,
825 .machine_check = machine_check_generic,
826 .platform = "ppc750",
827 .oprofile_cpu_type = "ppc/750",
828 .oprofile_type = PPC_OPROFILE_G4,
829 },
830 { /* 750FX rev 2.0 must disable HID0[DPM] */
831 .pvr_mask = 0xffffffff,
832 .pvr_value = 0x70000200,
833 .cpu_name = "750FX",
834 .cpu_features = CPU_FTRS_750FX2,
835 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
836 .mmu_features = MMU_FTR_HPTE_TABLE,
837 .icache_bsize = 32,
838 .dcache_bsize = 32,
839 .num_pmcs = 4,
840 .pmc_type = PPC_PMC_IBM,
841 .cpu_setup = __setup_cpu_750,
842 .machine_check = machine_check_generic,
843 .platform = "ppc750",
844 .oprofile_cpu_type = "ppc/750",
845 .oprofile_type = PPC_OPROFILE_G4,
846 },
847 { /* 750FX (All revs except 2.0) */
848 .pvr_mask = 0xffff0000,
849 .pvr_value = 0x70000000,
850 .cpu_name = "750FX",
851 .cpu_features = CPU_FTRS_750FX,
852 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
853 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
854 .icache_bsize = 32,
855 .dcache_bsize = 32,
856 .num_pmcs = 4,
857 .pmc_type = PPC_PMC_IBM,
858 .cpu_setup = __setup_cpu_750fx,
859 .machine_check = machine_check_generic,
860 .platform = "ppc750",
861 .oprofile_cpu_type = "ppc/750",
862 .oprofile_type = PPC_OPROFILE_G4,
863 },
864 { /* 750GX */
865 .pvr_mask = 0xffff0000,
866 .pvr_value = 0x70020000,
867 .cpu_name = "750GX",
868 .cpu_features = CPU_FTRS_750GX,
869 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
870 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
871 .icache_bsize = 32,
872 .dcache_bsize = 32,
873 .num_pmcs = 4,
874 .pmc_type = PPC_PMC_IBM,
875 .cpu_setup = __setup_cpu_750fx,
876 .machine_check = machine_check_generic,
877 .platform = "ppc750",
878 .oprofile_cpu_type = "ppc/750",
879 .oprofile_type = PPC_OPROFILE_G4,
880 },
881 { /* 740/750 (L2CR bit need fixup for 740) */
882 .pvr_mask = 0xffff0000,
883 .pvr_value = 0x00080000,
884 .cpu_name = "740/750",
885 .cpu_features = CPU_FTRS_740,
886 .cpu_user_features = COMMON_USER | PPC_FEATURE_PPC_LE,
887 .mmu_features = MMU_FTR_HPTE_TABLE,
888 .icache_bsize = 32,
889 .dcache_bsize = 32,
890 .num_pmcs = 4,
891 .pmc_type = PPC_PMC_IBM,
892 .cpu_setup = __setup_cpu_750,
893 .machine_check = machine_check_generic,
894 .platform = "ppc750",
895 },
896 { /* 7400 rev 1.1 ? (no TAU) */
897 .pvr_mask = 0xffffffff,
898 .pvr_value = 0x000c1101,
899 .cpu_name = "7400 (1.1)",
900 .cpu_features = CPU_FTRS_7400_NOTAU,
901 .cpu_user_features = COMMON_USER |
902 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
903 .mmu_features = MMU_FTR_HPTE_TABLE,
904 .icache_bsize = 32,
905 .dcache_bsize = 32,
906 .num_pmcs = 4,
907 .pmc_type = PPC_PMC_G4,
908 .cpu_setup = __setup_cpu_7400,
909 .machine_check = machine_check_generic,
910 .platform = "ppc7400",
911 },
912 { /* 7400 */
913 .pvr_mask = 0xffff0000,
914 .pvr_value = 0x000c0000,
915 .cpu_name = "7400",
916 .cpu_features = CPU_FTRS_7400,
917 .cpu_user_features = COMMON_USER |
918 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
919 .mmu_features = MMU_FTR_HPTE_TABLE,
920 .icache_bsize = 32,
921 .dcache_bsize = 32,
922 .num_pmcs = 4,
923 .pmc_type = PPC_PMC_G4,
924 .cpu_setup = __setup_cpu_7400,
925 .machine_check = machine_check_generic,
926 .platform = "ppc7400",
927 },
928 { /* 7410 */
929 .pvr_mask = 0xffff0000,
930 .pvr_value = 0x800c0000,
931 .cpu_name = "7410",
932 .cpu_features = CPU_FTRS_7400,
933 .cpu_user_features = COMMON_USER |
934 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
935 .mmu_features = MMU_FTR_HPTE_TABLE,
936 .icache_bsize = 32,
937 .dcache_bsize = 32,
938 .num_pmcs = 4,
939 .pmc_type = PPC_PMC_G4,
940 .cpu_setup = __setup_cpu_7410,
941 .machine_check = machine_check_generic,
942 .platform = "ppc7400",
943 },
944 { /* 7450 2.0 - no doze/nap */
945 .pvr_mask = 0xffffffff,
946 .pvr_value = 0x80000200,
947 .cpu_name = "7450",
948 .cpu_features = CPU_FTRS_7450_20,
949 .cpu_user_features = COMMON_USER |
950 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
951 .mmu_features = MMU_FTR_HPTE_TABLE,
952 .icache_bsize = 32,
953 .dcache_bsize = 32,
954 .num_pmcs = 6,
955 .pmc_type = PPC_PMC_G4,
956 .cpu_setup = __setup_cpu_745x,
957 .oprofile_cpu_type = "ppc/7450",
958 .oprofile_type = PPC_OPROFILE_G4,
959 .machine_check = machine_check_generic,
960 .platform = "ppc7450",
961 },
962 { /* 7450 2.1 */
963 .pvr_mask = 0xffffffff,
964 .pvr_value = 0x80000201,
965 .cpu_name = "7450",
966 .cpu_features = CPU_FTRS_7450_21,
967 .cpu_user_features = COMMON_USER |
968 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
969 .mmu_features = MMU_FTR_HPTE_TABLE,
970 .icache_bsize = 32,
971 .dcache_bsize = 32,
972 .num_pmcs = 6,
973 .pmc_type = PPC_PMC_G4,
974 .cpu_setup = __setup_cpu_745x,
975 .oprofile_cpu_type = "ppc/7450",
976 .oprofile_type = PPC_OPROFILE_G4,
977 .machine_check = machine_check_generic,
978 .platform = "ppc7450",
979 },
980 { /* 7450 2.3 and newer */
981 .pvr_mask = 0xffff0000,
982 .pvr_value = 0x80000000,
983 .cpu_name = "7450",
984 .cpu_features = CPU_FTRS_7450_23,
985 .cpu_user_features = COMMON_USER |
986 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
987 .mmu_features = MMU_FTR_HPTE_TABLE,
988 .icache_bsize = 32,
989 .dcache_bsize = 32,
990 .num_pmcs = 6,
991 .pmc_type = PPC_PMC_G4,
992 .cpu_setup = __setup_cpu_745x,
993 .oprofile_cpu_type = "ppc/7450",
994 .oprofile_type = PPC_OPROFILE_G4,
995 .machine_check = machine_check_generic,
996 .platform = "ppc7450",
997 },
998 { /* 7455 rev 1.x */
999 .pvr_mask = 0xffffff00,
1000 .pvr_value = 0x80010100,
1001 .cpu_name = "7455",
1002 .cpu_features = CPU_FTRS_7455_1,
1003 .cpu_user_features = COMMON_USER |
1004 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1005 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1006 .icache_bsize = 32,
1007 .dcache_bsize = 32,
1008 .num_pmcs = 6,
1009 .pmc_type = PPC_PMC_G4,
1010 .cpu_setup = __setup_cpu_745x,
1011 .oprofile_cpu_type = "ppc/7450",
1012 .oprofile_type = PPC_OPROFILE_G4,
1013 .machine_check = machine_check_generic,
1014 .platform = "ppc7450",
1015 },
1016 { /* 7455 rev 2.0 */
1017 .pvr_mask = 0xffffffff,
1018 .pvr_value = 0x80010200,
1019 .cpu_name = "7455",
1020 .cpu_features = CPU_FTRS_7455_20,
1021 .cpu_user_features = COMMON_USER |
1022 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1023 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1024 .icache_bsize = 32,
1025 .dcache_bsize = 32,
1026 .num_pmcs = 6,
1027 .pmc_type = PPC_PMC_G4,
1028 .cpu_setup = __setup_cpu_745x,
1029 .oprofile_cpu_type = "ppc/7450",
1030 .oprofile_type = PPC_OPROFILE_G4,
1031 .machine_check = machine_check_generic,
1032 .platform = "ppc7450",
1033 },
1034 { /* 7455 others */
1035 .pvr_mask = 0xffff0000,
1036 .pvr_value = 0x80010000,
1037 .cpu_name = "7455",
1038 .cpu_features = CPU_FTRS_7455,
1039 .cpu_user_features = COMMON_USER |
1040 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1041 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1042 .icache_bsize = 32,
1043 .dcache_bsize = 32,
1044 .num_pmcs = 6,
1045 .pmc_type = PPC_PMC_G4,
1046 .cpu_setup = __setup_cpu_745x,
1047 .oprofile_cpu_type = "ppc/7450",
1048 .oprofile_type = PPC_OPROFILE_G4,
1049 .machine_check = machine_check_generic,
1050 .platform = "ppc7450",
1051 },
1052 { /* 7447/7457 Rev 1.0 */
1053 .pvr_mask = 0xffffffff,
1054 .pvr_value = 0x80020100,
1055 .cpu_name = "7447/7457",
1056 .cpu_features = CPU_FTRS_7447_10,
1057 .cpu_user_features = COMMON_USER |
1058 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1059 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1060 .icache_bsize = 32,
1061 .dcache_bsize = 32,
1062 .num_pmcs = 6,
1063 .pmc_type = PPC_PMC_G4,
1064 .cpu_setup = __setup_cpu_745x,
1065 .oprofile_cpu_type = "ppc/7450",
1066 .oprofile_type = PPC_OPROFILE_G4,
1067 .machine_check = machine_check_generic,
1068 .platform = "ppc7450",
1069 },
1070 { /* 7447/7457 Rev 1.1 */
1071 .pvr_mask = 0xffffffff,
1072 .pvr_value = 0x80020101,
1073 .cpu_name = "7447/7457",
1074 .cpu_features = CPU_FTRS_7447_10,
1075 .cpu_user_features = COMMON_USER |
1076 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1077 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1078 .icache_bsize = 32,
1079 .dcache_bsize = 32,
1080 .num_pmcs = 6,
1081 .pmc_type = PPC_PMC_G4,
1082 .cpu_setup = __setup_cpu_745x,
1083 .oprofile_cpu_type = "ppc/7450",
1084 .oprofile_type = PPC_OPROFILE_G4,
1085 .machine_check = machine_check_generic,
1086 .platform = "ppc7450",
1087 },
1088 { /* 7447/7457 Rev 1.2 and later */
1089 .pvr_mask = 0xffff0000,
1090 .pvr_value = 0x80020000,
1091 .cpu_name = "7447/7457",
1092 .cpu_features = CPU_FTRS_7447,
1093 .cpu_user_features = COMMON_USER | PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1094 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1095 .icache_bsize = 32,
1096 .dcache_bsize = 32,
1097 .num_pmcs = 6,
1098 .pmc_type = PPC_PMC_G4,
1099 .cpu_setup = __setup_cpu_745x,
1100 .oprofile_cpu_type = "ppc/7450",
1101 .oprofile_type = PPC_OPROFILE_G4,
1102 .machine_check = machine_check_generic,
1103 .platform = "ppc7450",
1104 },
1105 { /* 7447A */
1106 .pvr_mask = 0xffff0000,
1107 .pvr_value = 0x80030000,
1108 .cpu_name = "7447A",
1109 .cpu_features = CPU_FTRS_7447A,
1110 .cpu_user_features = COMMON_USER |
1111 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1112 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1113 .icache_bsize = 32,
1114 .dcache_bsize = 32,
1115 .num_pmcs = 6,
1116 .pmc_type = PPC_PMC_G4,
1117 .cpu_setup = __setup_cpu_745x,
1118 .oprofile_cpu_type = "ppc/7450",
1119 .oprofile_type = PPC_OPROFILE_G4,
1120 .machine_check = machine_check_generic,
1121 .platform = "ppc7450",
1122 },
1123 { /* 7448 */
1124 .pvr_mask = 0xffff0000,
1125 .pvr_value = 0x80040000,
1126 .cpu_name = "7448",
1127 .cpu_features = CPU_FTRS_7448,
1128 .cpu_user_features = COMMON_USER |
1129 PPC_FEATURE_HAS_ALTIVEC_COMP | PPC_FEATURE_PPC_LE,
1130 .mmu_features = MMU_FTR_HPTE_TABLE | MMU_FTR_USE_HIGH_BATS,
1131 .icache_bsize = 32,
1132 .dcache_bsize = 32,
1133 .num_pmcs = 6,
1134 .pmc_type = PPC_PMC_G4,
1135 .cpu_setup = __setup_cpu_745x,
1136 .oprofile_cpu_type = "ppc/7450",
1137 .oprofile_type = PPC_OPROFILE_G4,
1138 .machine_check = machine_check_generic,
1139 .platform = "ppc7450",
1140 },
1141 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
1142 .pvr_mask = 0x7fff0000,
1143 .pvr_value = 0x00810000,
1144 .cpu_name = "82xx",
1145 .cpu_features = CPU_FTRS_82XX,
1146 .cpu_user_features = COMMON_USER,
1147 .mmu_features = 0,
1148 .icache_bsize = 32,
1149 .dcache_bsize = 32,
1150 .cpu_setup = __setup_cpu_603,
1151 .machine_check = machine_check_generic,
1152 .platform = "ppc603",
1153 },
1154 { /* All G2_LE (603e core, plus some) have the same pvr */
1155 .pvr_mask = 0x7fff0000,
1156 .pvr_value = 0x00820000,
1157 .cpu_name = "G2_LE",
1158 .cpu_features = CPU_FTRS_G2_LE,
1159 .cpu_user_features = COMMON_USER,
1160 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1161 .icache_bsize = 32,
1162 .dcache_bsize = 32,
1163 .cpu_setup = __setup_cpu_603,
1164 .machine_check = machine_check_generic,
1165 .platform = "ppc603",
1166 },
1167 { /* e300c1 (a 603e core, plus some) on 83xx */
1168 .pvr_mask = 0x7fff0000,
1169 .pvr_value = 0x00830000,
1170 .cpu_name = "e300c1",
1171 .cpu_features = CPU_FTRS_E300,
1172 .cpu_user_features = COMMON_USER,
1173 .mmu_features = MMU_FTR_USE_HIGH_BATS,
1174 .icache_bsize = 32,
1175 .dcache_bsize = 32,
1176 .cpu_setup = __setup_cpu_603,
1177 .machine_check = machine_check_generic,
1178 .platform = "ppc603",
1179 },
1180 { /* e300c2 (an e300c1 core, plus some, minus FPU) on 83xx */
1181 .pvr_mask = 0x7fff0000,
1182 .pvr_value = 0x00840000,
1183 .cpu_name = "e300c2",
1184 .cpu_features = CPU_FTRS_E300C2,
1185 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1186 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1187 MMU_FTR_NEED_DTLB_SW_LRU,
1188 .icache_bsize = 32,
1189 .dcache_bsize = 32,
1190 .cpu_setup = __setup_cpu_603,
1191 .machine_check = machine_check_generic,
1192 .platform = "ppc603",
1193 },
1194 { /* e300c3 (e300c1, plus one IU, half cache size) on 83xx */
1195 .pvr_mask = 0x7fff0000,
1196 .pvr_value = 0x00850000,
1197 .cpu_name = "e300c3",
1198 .cpu_features = CPU_FTRS_E300,
1199 .cpu_user_features = COMMON_USER,
1200 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1201 MMU_FTR_NEED_DTLB_SW_LRU,
1202 .icache_bsize = 32,
1203 .dcache_bsize = 32,
1204 .cpu_setup = __setup_cpu_603,
1205 .num_pmcs = 4,
1206 .oprofile_cpu_type = "ppc/e300",
1207 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1208 .platform = "ppc603",
1209 },
1210 { /* e300c4 (e300c1, plus one IU) */
1211 .pvr_mask = 0x7fff0000,
1212 .pvr_value = 0x00860000,
1213 .cpu_name = "e300c4",
1214 .cpu_features = CPU_FTRS_E300,
1215 .cpu_user_features = COMMON_USER,
1216 .mmu_features = MMU_FTR_USE_HIGH_BATS |
1217 MMU_FTR_NEED_DTLB_SW_LRU,
1218 .icache_bsize = 32,
1219 .dcache_bsize = 32,
1220 .cpu_setup = __setup_cpu_603,
1221 .machine_check = machine_check_generic,
1222 .num_pmcs = 4,
1223 .oprofile_cpu_type = "ppc/e300",
1224 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1225 .platform = "ppc603",
1226 },
1227 { /* default match, we assume split I/D cache & TB (non-601)... */
1228 .pvr_mask = 0x00000000,
1229 .pvr_value = 0x00000000,
1230 .cpu_name = "(generic PPC)",
1231 .cpu_features = CPU_FTRS_CLASSIC32,
1232 .cpu_user_features = COMMON_USER,
1233 .mmu_features = MMU_FTR_HPTE_TABLE,
1234 .icache_bsize = 32,
1235 .dcache_bsize = 32,
1236 .machine_check = machine_check_generic,
1237 .platform = "ppc603",
1238 },
1239#endif /* CLASSIC_PPC */
1240#ifdef CONFIG_8xx
1241 { /* 8xx */
1242 .pvr_mask = 0xffff0000,
1243 .pvr_value = 0x00500000,
1244 .cpu_name = "8xx",
1245 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
1246 * if the 8xx code is there.... */
1247 .cpu_features = CPU_FTRS_8XX,
1248 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1249 .mmu_features = MMU_FTR_TYPE_8xx,
1250 .icache_bsize = 16,
1251 .dcache_bsize = 16,
1252 .platform = "ppc823",
1253 },
1254#endif /* CONFIG_8xx */
1255#ifdef CONFIG_40x
1256 { /* 403GC */
1257 .pvr_mask = 0xffffff00,
1258 .pvr_value = 0x00200200,
1259 .cpu_name = "403GC",
1260 .cpu_features = CPU_FTRS_40X,
1261 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1262 .mmu_features = MMU_FTR_TYPE_40x,
1263 .icache_bsize = 16,
1264 .dcache_bsize = 16,
1265 .machine_check = machine_check_4xx,
1266 .platform = "ppc403",
1267 },
1268 { /* 403GCX */
1269 .pvr_mask = 0xffffff00,
1270 .pvr_value = 0x00201400,
1271 .cpu_name = "403GCX",
1272 .cpu_features = CPU_FTRS_40X,
1273 .cpu_user_features = PPC_FEATURE_32 |
1274 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
1275 .mmu_features = MMU_FTR_TYPE_40x,
1276 .icache_bsize = 16,
1277 .dcache_bsize = 16,
1278 .machine_check = machine_check_4xx,
1279 .platform = "ppc403",
1280 },
1281 { /* 403G ?? */
1282 .pvr_mask = 0xffff0000,
1283 .pvr_value = 0x00200000,
1284 .cpu_name = "403G ??",
1285 .cpu_features = CPU_FTRS_40X,
1286 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1287 .mmu_features = MMU_FTR_TYPE_40x,
1288 .icache_bsize = 16,
1289 .dcache_bsize = 16,
1290 .machine_check = machine_check_4xx,
1291 .platform = "ppc403",
1292 },
1293 { /* 405GP */
1294 .pvr_mask = 0xffff0000,
1295 .pvr_value = 0x40110000,
1296 .cpu_name = "405GP",
1297 .cpu_features = CPU_FTRS_40X,
1298 .cpu_user_features = PPC_FEATURE_32 |
1299 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1300 .mmu_features = MMU_FTR_TYPE_40x,
1301 .icache_bsize = 32,
1302 .dcache_bsize = 32,
1303 .machine_check = machine_check_4xx,
1304 .platform = "ppc405",
1305 },
1306 { /* STB 03xxx */
1307 .pvr_mask = 0xffff0000,
1308 .pvr_value = 0x40130000,
1309 .cpu_name = "STB03xxx",
1310 .cpu_features = CPU_FTRS_40X,
1311 .cpu_user_features = PPC_FEATURE_32 |
1312 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1313 .mmu_features = MMU_FTR_TYPE_40x,
1314 .icache_bsize = 32,
1315 .dcache_bsize = 32,
1316 .machine_check = machine_check_4xx,
1317 .platform = "ppc405",
1318 },
1319 { /* STB 04xxx */
1320 .pvr_mask = 0xffff0000,
1321 .pvr_value = 0x41810000,
1322 .cpu_name = "STB04xxx",
1323 .cpu_features = CPU_FTRS_40X,
1324 .cpu_user_features = PPC_FEATURE_32 |
1325 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1326 .mmu_features = MMU_FTR_TYPE_40x,
1327 .icache_bsize = 32,
1328 .dcache_bsize = 32,
1329 .machine_check = machine_check_4xx,
1330 .platform = "ppc405",
1331 },
1332 { /* NP405L */
1333 .pvr_mask = 0xffff0000,
1334 .pvr_value = 0x41610000,
1335 .cpu_name = "NP405L",
1336 .cpu_features = CPU_FTRS_40X,
1337 .cpu_user_features = PPC_FEATURE_32 |
1338 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1339 .mmu_features = MMU_FTR_TYPE_40x,
1340 .icache_bsize = 32,
1341 .dcache_bsize = 32,
1342 .machine_check = machine_check_4xx,
1343 .platform = "ppc405",
1344 },
1345 { /* NP4GS3 */
1346 .pvr_mask = 0xffff0000,
1347 .pvr_value = 0x40B10000,
1348 .cpu_name = "NP4GS3",
1349 .cpu_features = CPU_FTRS_40X,
1350 .cpu_user_features = PPC_FEATURE_32 |
1351 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1352 .mmu_features = MMU_FTR_TYPE_40x,
1353 .icache_bsize = 32,
1354 .dcache_bsize = 32,
1355 .machine_check = machine_check_4xx,
1356 .platform = "ppc405",
1357 },
1358 { /* NP405H */
1359 .pvr_mask = 0xffff0000,
1360 .pvr_value = 0x41410000,
1361 .cpu_name = "NP405H",
1362 .cpu_features = CPU_FTRS_40X,
1363 .cpu_user_features = PPC_FEATURE_32 |
1364 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1365 .mmu_features = MMU_FTR_TYPE_40x,
1366 .icache_bsize = 32,
1367 .dcache_bsize = 32,
1368 .machine_check = machine_check_4xx,
1369 .platform = "ppc405",
1370 },
1371 { /* 405GPr */
1372 .pvr_mask = 0xffff0000,
1373 .pvr_value = 0x50910000,
1374 .cpu_name = "405GPr",
1375 .cpu_features = CPU_FTRS_40X,
1376 .cpu_user_features = PPC_FEATURE_32 |
1377 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1378 .mmu_features = MMU_FTR_TYPE_40x,
1379 .icache_bsize = 32,
1380 .dcache_bsize = 32,
1381 .machine_check = machine_check_4xx,
1382 .platform = "ppc405",
1383 },
1384 { /* STBx25xx */
1385 .pvr_mask = 0xffff0000,
1386 .pvr_value = 0x51510000,
1387 .cpu_name = "STBx25xx",
1388 .cpu_features = CPU_FTRS_40X,
1389 .cpu_user_features = PPC_FEATURE_32 |
1390 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1391 .mmu_features = MMU_FTR_TYPE_40x,
1392 .icache_bsize = 32,
1393 .dcache_bsize = 32,
1394 .machine_check = machine_check_4xx,
1395 .platform = "ppc405",
1396 },
1397 { /* 405LP */
1398 .pvr_mask = 0xffff0000,
1399 .pvr_value = 0x41F10000,
1400 .cpu_name = "405LP",
1401 .cpu_features = CPU_FTRS_40X,
1402 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
1403 .mmu_features = MMU_FTR_TYPE_40x,
1404 .icache_bsize = 32,
1405 .dcache_bsize = 32,
1406 .machine_check = machine_check_4xx,
1407 .platform = "ppc405",
1408 },
1409 { /* Xilinx Virtex-II Pro */
1410 .pvr_mask = 0xfffff000,
1411 .pvr_value = 0x20010000,
1412 .cpu_name = "Virtex-II Pro",
1413 .cpu_features = CPU_FTRS_40X,
1414 .cpu_user_features = PPC_FEATURE_32 |
1415 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1416 .mmu_features = MMU_FTR_TYPE_40x,
1417 .icache_bsize = 32,
1418 .dcache_bsize = 32,
1419 .machine_check = machine_check_4xx,
1420 .platform = "ppc405",
1421 },
1422 { /* Xilinx Virtex-4 FX */
1423 .pvr_mask = 0xfffff000,
1424 .pvr_value = 0x20011000,
1425 .cpu_name = "Virtex-4 FX",
1426 .cpu_features = CPU_FTRS_40X,
1427 .cpu_user_features = PPC_FEATURE_32 |
1428 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1429 .mmu_features = MMU_FTR_TYPE_40x,
1430 .icache_bsize = 32,
1431 .dcache_bsize = 32,
1432 .machine_check = machine_check_4xx,
1433 .platform = "ppc405",
1434 },
1435 { /* 405EP */
1436 .pvr_mask = 0xffff0000,
1437 .pvr_value = 0x51210000,
1438 .cpu_name = "405EP",
1439 .cpu_features = CPU_FTRS_40X,
1440 .cpu_user_features = PPC_FEATURE_32 |
1441 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1442 .mmu_features = MMU_FTR_TYPE_40x,
1443 .icache_bsize = 32,
1444 .dcache_bsize = 32,
1445 .machine_check = machine_check_4xx,
1446 .platform = "ppc405",
1447 },
1448 { /* 405EX Rev. A/B with Security */
1449 .pvr_mask = 0xffff000f,
1450 .pvr_value = 0x12910007,
1451 .cpu_name = "405EX Rev. A/B",
1452 .cpu_features = CPU_FTRS_40X,
1453 .cpu_user_features = PPC_FEATURE_32 |
1454 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1455 .mmu_features = MMU_FTR_TYPE_40x,
1456 .icache_bsize = 32,
1457 .dcache_bsize = 32,
1458 .machine_check = machine_check_4xx,
1459 .platform = "ppc405",
1460 },
1461 { /* 405EX Rev. C without Security */
1462 .pvr_mask = 0xffff000f,
1463 .pvr_value = 0x1291000d,
1464 .cpu_name = "405EX Rev. C",
1465 .cpu_features = CPU_FTRS_40X,
1466 .cpu_user_features = PPC_FEATURE_32 |
1467 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1468 .mmu_features = MMU_FTR_TYPE_40x,
1469 .icache_bsize = 32,
1470 .dcache_bsize = 32,
1471 .machine_check = machine_check_4xx,
1472 .platform = "ppc405",
1473 },
1474 { /* 405EX Rev. C with Security */
1475 .pvr_mask = 0xffff000f,
1476 .pvr_value = 0x1291000f,
1477 .cpu_name = "405EX Rev. C",
1478 .cpu_features = CPU_FTRS_40X,
1479 .cpu_user_features = PPC_FEATURE_32 |
1480 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1481 .mmu_features = MMU_FTR_TYPE_40x,
1482 .icache_bsize = 32,
1483 .dcache_bsize = 32,
1484 .machine_check = machine_check_4xx,
1485 .platform = "ppc405",
1486 },
1487 { /* 405EX Rev. D without Security */
1488 .pvr_mask = 0xffff000f,
1489 .pvr_value = 0x12910003,
1490 .cpu_name = "405EX Rev. D",
1491 .cpu_features = CPU_FTRS_40X,
1492 .cpu_user_features = PPC_FEATURE_32 |
1493 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1494 .mmu_features = MMU_FTR_TYPE_40x,
1495 .icache_bsize = 32,
1496 .dcache_bsize = 32,
1497 .machine_check = machine_check_4xx,
1498 .platform = "ppc405",
1499 },
1500 { /* 405EX Rev. D with Security */
1501 .pvr_mask = 0xffff000f,
1502 .pvr_value = 0x12910005,
1503 .cpu_name = "405EX Rev. D",
1504 .cpu_features = CPU_FTRS_40X,
1505 .cpu_user_features = PPC_FEATURE_32 |
1506 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1507 .mmu_features = MMU_FTR_TYPE_40x,
1508 .icache_bsize = 32,
1509 .dcache_bsize = 32,
1510 .machine_check = machine_check_4xx,
1511 .platform = "ppc405",
1512 },
1513 { /* 405EXr Rev. A/B without Security */
1514 .pvr_mask = 0xffff000f,
1515 .pvr_value = 0x12910001,
1516 .cpu_name = "405EXr Rev. A/B",
1517 .cpu_features = CPU_FTRS_40X,
1518 .cpu_user_features = PPC_FEATURE_32 |
1519 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1520 .mmu_features = MMU_FTR_TYPE_40x,
1521 .icache_bsize = 32,
1522 .dcache_bsize = 32,
1523 .machine_check = machine_check_4xx,
1524 .platform = "ppc405",
1525 },
1526 { /* 405EXr Rev. C without Security */
1527 .pvr_mask = 0xffff000f,
1528 .pvr_value = 0x12910009,
1529 .cpu_name = "405EXr Rev. C",
1530 .cpu_features = CPU_FTRS_40X,
1531 .cpu_user_features = PPC_FEATURE_32 |
1532 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1533 .mmu_features = MMU_FTR_TYPE_40x,
1534 .icache_bsize = 32,
1535 .dcache_bsize = 32,
1536 .machine_check = machine_check_4xx,
1537 .platform = "ppc405",
1538 },
1539 { /* 405EXr Rev. C with Security */
1540 .pvr_mask = 0xffff000f,
1541 .pvr_value = 0x1291000b,
1542 .cpu_name = "405EXr Rev. C",
1543 .cpu_features = CPU_FTRS_40X,
1544 .cpu_user_features = PPC_FEATURE_32 |
1545 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1546 .mmu_features = MMU_FTR_TYPE_40x,
1547 .icache_bsize = 32,
1548 .dcache_bsize = 32,
1549 .machine_check = machine_check_4xx,
1550 .platform = "ppc405",
1551 },
1552 { /* 405EXr Rev. D without Security */
1553 .pvr_mask = 0xffff000f,
1554 .pvr_value = 0x12910000,
1555 .cpu_name = "405EXr Rev. D",
1556 .cpu_features = CPU_FTRS_40X,
1557 .cpu_user_features = PPC_FEATURE_32 |
1558 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1559 .mmu_features = MMU_FTR_TYPE_40x,
1560 .icache_bsize = 32,
1561 .dcache_bsize = 32,
1562 .machine_check = machine_check_4xx,
1563 .platform = "ppc405",
1564 },
1565 { /* 405EXr Rev. D with Security */
1566 .pvr_mask = 0xffff000f,
1567 .pvr_value = 0x12910002,
1568 .cpu_name = "405EXr Rev. D",
1569 .cpu_features = CPU_FTRS_40X,
1570 .cpu_user_features = PPC_FEATURE_32 |
1571 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1572 .mmu_features = MMU_FTR_TYPE_40x,
1573 .icache_bsize = 32,
1574 .dcache_bsize = 32,
1575 .machine_check = machine_check_4xx,
1576 .platform = "ppc405",
1577 },
1578 {
1579 /* 405EZ */
1580 .pvr_mask = 0xffff0000,
1581 .pvr_value = 0x41510000,
1582 .cpu_name = "405EZ",
1583 .cpu_features = CPU_FTRS_40X,
1584 .cpu_user_features = PPC_FEATURE_32 |
1585 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1586 .mmu_features = MMU_FTR_TYPE_40x,
1587 .icache_bsize = 32,
1588 .dcache_bsize = 32,
1589 .machine_check = machine_check_4xx,
1590 .platform = "ppc405",
1591 },
1592 { /* APM8018X */
1593 .pvr_mask = 0xffff0000,
1594 .pvr_value = 0x7ff11432,
1595 .cpu_name = "APM8018X",
1596 .cpu_features = CPU_FTRS_40X,
1597 .cpu_user_features = PPC_FEATURE_32 |
1598 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1599 .mmu_features = MMU_FTR_TYPE_40x,
1600 .icache_bsize = 32,
1601 .dcache_bsize = 32,
1602 .machine_check = machine_check_4xx,
1603 .platform = "ppc405",
1604 },
1605 { /* default match */
1606 .pvr_mask = 0x00000000,
1607 .pvr_value = 0x00000000,
1608 .cpu_name = "(generic 40x PPC)",
1609 .cpu_features = CPU_FTRS_40X,
1610 .cpu_user_features = PPC_FEATURE_32 |
1611 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
1612 .mmu_features = MMU_FTR_TYPE_40x,
1613 .icache_bsize = 32,
1614 .dcache_bsize = 32,
1615 .machine_check = machine_check_4xx,
1616 .platform = "ppc405",
1617 }
1618
1619#endif /* CONFIG_40x */
1620#ifdef CONFIG_44x
1621 {
1622 .pvr_mask = 0xf0000fff,
1623 .pvr_value = 0x40000850,
1624 .cpu_name = "440GR Rev. A",
1625 .cpu_features = CPU_FTRS_44X,
1626 .cpu_user_features = COMMON_USER_BOOKE,
1627 .mmu_features = MMU_FTR_TYPE_44x,
1628 .icache_bsize = 32,
1629 .dcache_bsize = 32,
1630 .machine_check = machine_check_4xx,
1631 .platform = "ppc440",
1632 },
1633 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1634 .pvr_mask = 0xf0000fff,
1635 .pvr_value = 0x40000858,
1636 .cpu_name = "440EP Rev. A",
1637 .cpu_features = CPU_FTRS_44X,
1638 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1639 .mmu_features = MMU_FTR_TYPE_44x,
1640 .icache_bsize = 32,
1641 .dcache_bsize = 32,
1642 .cpu_setup = __setup_cpu_440ep,
1643 .machine_check = machine_check_4xx,
1644 .platform = "ppc440",
1645 },
1646 {
1647 .pvr_mask = 0xf0000fff,
1648 .pvr_value = 0x400008d3,
1649 .cpu_name = "440GR Rev. B",
1650 .cpu_features = CPU_FTRS_44X,
1651 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1652 .mmu_features = MMU_FTR_TYPE_44x,
1653 .icache_bsize = 32,
1654 .dcache_bsize = 32,
1655 .machine_check = machine_check_4xx,
1656 .platform = "ppc440",
1657 },
1658 { /* Matches both physical and logical PVR for 440EP (logical pvr = pvr | 0x8) */
1659 .pvr_mask = 0xf0000ff7,
1660 .pvr_value = 0x400008d4,
1661 .cpu_name = "440EP Rev. C",
1662 .cpu_features = CPU_FTRS_44X,
1663 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1664 .mmu_features = MMU_FTR_TYPE_44x,
1665 .icache_bsize = 32,
1666 .dcache_bsize = 32,
1667 .cpu_setup = __setup_cpu_440ep,
1668 .machine_check = machine_check_4xx,
1669 .platform = "ppc440",
1670 },
1671 { /* Use logical PVR for 440EP (logical pvr = pvr | 0x8) */
1672 .pvr_mask = 0xf0000fff,
1673 .pvr_value = 0x400008db,
1674 .cpu_name = "440EP Rev. B",
1675 .cpu_features = CPU_FTRS_44X,
1676 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1677 .mmu_features = MMU_FTR_TYPE_44x,
1678 .icache_bsize = 32,
1679 .dcache_bsize = 32,
1680 .cpu_setup = __setup_cpu_440ep,
1681 .machine_check = machine_check_4xx,
1682 .platform = "ppc440",
1683 },
1684 { /* 440GRX */
1685 .pvr_mask = 0xf0000ffb,
1686 .pvr_value = 0x200008D0,
1687 .cpu_name = "440GRX",
1688 .cpu_features = CPU_FTRS_44X,
1689 .cpu_user_features = COMMON_USER_BOOKE,
1690 .mmu_features = MMU_FTR_TYPE_44x,
1691 .icache_bsize = 32,
1692 .dcache_bsize = 32,
1693 .cpu_setup = __setup_cpu_440grx,
1694 .machine_check = machine_check_440A,
1695 .platform = "ppc440",
1696 },
1697 { /* Use logical PVR for 440EPx (logical pvr = pvr | 0x8) */
1698 .pvr_mask = 0xf0000ffb,
1699 .pvr_value = 0x200008D8,
1700 .cpu_name = "440EPX",
1701 .cpu_features = CPU_FTRS_44X,
1702 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1703 .mmu_features = MMU_FTR_TYPE_44x,
1704 .icache_bsize = 32,
1705 .dcache_bsize = 32,
1706 .cpu_setup = __setup_cpu_440epx,
1707 .machine_check = machine_check_440A,
1708 .platform = "ppc440",
1709 },
1710 { /* 440GP Rev. B */
1711 .pvr_mask = 0xf0000fff,
1712 .pvr_value = 0x40000440,
1713 .cpu_name = "440GP Rev. B",
1714 .cpu_features = CPU_FTRS_44X,
1715 .cpu_user_features = COMMON_USER_BOOKE,
1716 .mmu_features = MMU_FTR_TYPE_44x,
1717 .icache_bsize = 32,
1718 .dcache_bsize = 32,
1719 .machine_check = machine_check_4xx,
1720 .platform = "ppc440gp",
1721 },
1722 { /* 440GP Rev. C */
1723 .pvr_mask = 0xf0000fff,
1724 .pvr_value = 0x40000481,
1725 .cpu_name = "440GP Rev. C",
1726 .cpu_features = CPU_FTRS_44X,
1727 .cpu_user_features = COMMON_USER_BOOKE,
1728 .mmu_features = MMU_FTR_TYPE_44x,
1729 .icache_bsize = 32,
1730 .dcache_bsize = 32,
1731 .machine_check = machine_check_4xx,
1732 .platform = "ppc440gp",
1733 },
1734 { /* 440GX Rev. A */
1735 .pvr_mask = 0xf0000fff,
1736 .pvr_value = 0x50000850,
1737 .cpu_name = "440GX Rev. A",
1738 .cpu_features = CPU_FTRS_44X,
1739 .cpu_user_features = COMMON_USER_BOOKE,
1740 .mmu_features = MMU_FTR_TYPE_44x,
1741 .icache_bsize = 32,
1742 .dcache_bsize = 32,
1743 .cpu_setup = __setup_cpu_440gx,
1744 .machine_check = machine_check_440A,
1745 .platform = "ppc440",
1746 },
1747 { /* 440GX Rev. B */
1748 .pvr_mask = 0xf0000fff,
1749 .pvr_value = 0x50000851,
1750 .cpu_name = "440GX Rev. B",
1751 .cpu_features = CPU_FTRS_44X,
1752 .cpu_user_features = COMMON_USER_BOOKE,
1753 .mmu_features = MMU_FTR_TYPE_44x,
1754 .icache_bsize = 32,
1755 .dcache_bsize = 32,
1756 .cpu_setup = __setup_cpu_440gx,
1757 .machine_check = machine_check_440A,
1758 .platform = "ppc440",
1759 },
1760 { /* 440GX Rev. C */
1761 .pvr_mask = 0xf0000fff,
1762 .pvr_value = 0x50000892,
1763 .cpu_name = "440GX Rev. C",
1764 .cpu_features = CPU_FTRS_44X,
1765 .cpu_user_features = COMMON_USER_BOOKE,
1766 .mmu_features = MMU_FTR_TYPE_44x,
1767 .icache_bsize = 32,
1768 .dcache_bsize = 32,
1769 .cpu_setup = __setup_cpu_440gx,
1770 .machine_check = machine_check_440A,
1771 .platform = "ppc440",
1772 },
1773 { /* 440GX Rev. F */
1774 .pvr_mask = 0xf0000fff,
1775 .pvr_value = 0x50000894,
1776 .cpu_name = "440GX Rev. F",
1777 .cpu_features = CPU_FTRS_44X,
1778 .cpu_user_features = COMMON_USER_BOOKE,
1779 .mmu_features = MMU_FTR_TYPE_44x,
1780 .icache_bsize = 32,
1781 .dcache_bsize = 32,
1782 .cpu_setup = __setup_cpu_440gx,
1783 .machine_check = machine_check_440A,
1784 .platform = "ppc440",
1785 },
1786 { /* 440SP Rev. A */
1787 .pvr_mask = 0xfff00fff,
1788 .pvr_value = 0x53200891,
1789 .cpu_name = "440SP Rev. A",
1790 .cpu_features = CPU_FTRS_44X,
1791 .cpu_user_features = COMMON_USER_BOOKE,
1792 .mmu_features = MMU_FTR_TYPE_44x,
1793 .icache_bsize = 32,
1794 .dcache_bsize = 32,
1795 .machine_check = machine_check_4xx,
1796 .platform = "ppc440",
1797 },
1798 { /* 440SPe Rev. A */
1799 .pvr_mask = 0xfff00fff,
1800 .pvr_value = 0x53400890,
1801 .cpu_name = "440SPe Rev. A",
1802 .cpu_features = CPU_FTRS_44X,
1803 .cpu_user_features = COMMON_USER_BOOKE,
1804 .mmu_features = MMU_FTR_TYPE_44x,
1805 .icache_bsize = 32,
1806 .dcache_bsize = 32,
1807 .cpu_setup = __setup_cpu_440spe,
1808 .machine_check = machine_check_440A,
1809 .platform = "ppc440",
1810 },
1811 { /* 440SPe Rev. B */
1812 .pvr_mask = 0xfff00fff,
1813 .pvr_value = 0x53400891,
1814 .cpu_name = "440SPe Rev. B",
1815 .cpu_features = CPU_FTRS_44X,
1816 .cpu_user_features = COMMON_USER_BOOKE,
1817 .mmu_features = MMU_FTR_TYPE_44x,
1818 .icache_bsize = 32,
1819 .dcache_bsize = 32,
1820 .cpu_setup = __setup_cpu_440spe,
1821 .machine_check = machine_check_440A,
1822 .platform = "ppc440",
1823 },
1824 { /* 440 in Xilinx Virtex-5 FXT */
1825 .pvr_mask = 0xfffffff0,
1826 .pvr_value = 0x7ff21910,
1827 .cpu_name = "440 in Virtex-5 FXT",
1828 .cpu_features = CPU_FTRS_44X,
1829 .cpu_user_features = COMMON_USER_BOOKE,
1830 .mmu_features = MMU_FTR_TYPE_44x,
1831 .icache_bsize = 32,
1832 .dcache_bsize = 32,
1833 .cpu_setup = __setup_cpu_440x5,
1834 .machine_check = machine_check_440A,
1835 .platform = "ppc440",
1836 },
1837 { /* 460EX */
1838 .pvr_mask = 0xffff0006,
1839 .pvr_value = 0x13020002,
1840 .cpu_name = "460EX",
1841 .cpu_features = CPU_FTRS_440x6,
1842 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1843 .mmu_features = MMU_FTR_TYPE_44x,
1844 .icache_bsize = 32,
1845 .dcache_bsize = 32,
1846 .cpu_setup = __setup_cpu_460ex,
1847 .machine_check = machine_check_440A,
1848 .platform = "ppc440",
1849 },
1850 { /* 460EX Rev B */
1851 .pvr_mask = 0xffff0007,
1852 .pvr_value = 0x13020004,
1853 .cpu_name = "460EX Rev. B",
1854 .cpu_features = CPU_FTRS_440x6,
1855 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1856 .mmu_features = MMU_FTR_TYPE_44x,
1857 .icache_bsize = 32,
1858 .dcache_bsize = 32,
1859 .cpu_setup = __setup_cpu_460ex,
1860 .machine_check = machine_check_440A,
1861 .platform = "ppc440",
1862 },
1863 { /* 460GT */
1864 .pvr_mask = 0xffff0006,
1865 .pvr_value = 0x13020000,
1866 .cpu_name = "460GT",
1867 .cpu_features = CPU_FTRS_440x6,
1868 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1869 .mmu_features = MMU_FTR_TYPE_44x,
1870 .icache_bsize = 32,
1871 .dcache_bsize = 32,
1872 .cpu_setup = __setup_cpu_460gt,
1873 .machine_check = machine_check_440A,
1874 .platform = "ppc440",
1875 },
1876 { /* 460GT Rev B */
1877 .pvr_mask = 0xffff0007,
1878 .pvr_value = 0x13020005,
1879 .cpu_name = "460GT Rev. B",
1880 .cpu_features = CPU_FTRS_440x6,
1881 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1882 .mmu_features = MMU_FTR_TYPE_44x,
1883 .icache_bsize = 32,
1884 .dcache_bsize = 32,
1885 .cpu_setup = __setup_cpu_460gt,
1886 .machine_check = machine_check_440A,
1887 .platform = "ppc440",
1888 },
1889 { /* 460SX */
1890 .pvr_mask = 0xffffff00,
1891 .pvr_value = 0x13541800,
1892 .cpu_name = "460SX",
1893 .cpu_features = CPU_FTRS_44X,
1894 .cpu_user_features = COMMON_USER_BOOKE,
1895 .mmu_features = MMU_FTR_TYPE_44x,
1896 .icache_bsize = 32,
1897 .dcache_bsize = 32,
1898 .cpu_setup = __setup_cpu_460sx,
1899 .machine_check = machine_check_440A,
1900 .platform = "ppc440",
1901 },
1902 { /* 464 in APM821xx */
1903 .pvr_mask = 0xfffffff0,
1904 .pvr_value = 0x12C41C80,
1905 .cpu_name = "APM821XX",
1906 .cpu_features = CPU_FTRS_44X,
1907 .cpu_user_features = COMMON_USER_BOOKE |
1908 PPC_FEATURE_HAS_FPU,
1909 .mmu_features = MMU_FTR_TYPE_44x,
1910 .icache_bsize = 32,
1911 .dcache_bsize = 32,
1912 .cpu_setup = __setup_cpu_apm821xx,
1913 .machine_check = machine_check_440A,
1914 .platform = "ppc440",
1915 },
1916 { /* 476 DD2 core */
1917 .pvr_mask = 0xffffffff,
1918 .pvr_value = 0x11a52080,
1919 .cpu_name = "476",
1920 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1921 .cpu_user_features = COMMON_USER_BOOKE |
1922 PPC_FEATURE_HAS_FPU,
1923 .mmu_features = MMU_FTR_TYPE_47x |
1924 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1925 .icache_bsize = 32,
1926 .dcache_bsize = 128,
1927 .machine_check = machine_check_47x,
1928 .platform = "ppc470",
1929 },
1930 { /* 476fpe */
1931 .pvr_mask = 0xffff0000,
1932 .pvr_value = 0x7ff50000,
1933 .cpu_name = "476fpe",
1934 .cpu_features = CPU_FTRS_47X | CPU_FTR_476_DD2,
1935 .cpu_user_features = COMMON_USER_BOOKE |
1936 PPC_FEATURE_HAS_FPU,
1937 .mmu_features = MMU_FTR_TYPE_47x |
1938 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1939 .icache_bsize = 32,
1940 .dcache_bsize = 128,
1941 .machine_check = machine_check_47x,
1942 .platform = "ppc470",
1943 },
1944 { /* 476 iss */
1945 .pvr_mask = 0xffff0000,
1946 .pvr_value = 0x00050000,
1947 .cpu_name = "476",
1948 .cpu_features = CPU_FTRS_47X,
1949 .cpu_user_features = COMMON_USER_BOOKE |
1950 PPC_FEATURE_HAS_FPU,
1951 .mmu_features = MMU_FTR_TYPE_47x |
1952 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1953 .icache_bsize = 32,
1954 .dcache_bsize = 128,
1955 .machine_check = machine_check_47x,
1956 .platform = "ppc470",
1957 },
1958 { /* 476 others */
1959 .pvr_mask = 0xffff0000,
1960 .pvr_value = 0x11a50000,
1961 .cpu_name = "476",
1962 .cpu_features = CPU_FTRS_47X,
1963 .cpu_user_features = COMMON_USER_BOOKE |
1964 PPC_FEATURE_HAS_FPU,
1965 .mmu_features = MMU_FTR_TYPE_47x |
1966 MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
1967 .icache_bsize = 32,
1968 .dcache_bsize = 128,
1969 .machine_check = machine_check_47x,
1970 .platform = "ppc470",
1971 },
1972 { /* default match */
1973 .pvr_mask = 0x00000000,
1974 .pvr_value = 0x00000000,
1975 .cpu_name = "(generic 44x PPC)",
1976 .cpu_features = CPU_FTRS_44X,
1977 .cpu_user_features = COMMON_USER_BOOKE,
1978 .mmu_features = MMU_FTR_TYPE_44x,
1979 .icache_bsize = 32,
1980 .dcache_bsize = 32,
1981 .machine_check = machine_check_4xx,
1982 .platform = "ppc440",
1983 }
1984#endif /* CONFIG_44x */
1985#ifdef CONFIG_E200
1986 { /* e200z5 */
1987 .pvr_mask = 0xfff00000,
1988 .pvr_value = 0x81000000,
1989 .cpu_name = "e200z5",
1990 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1991 .cpu_features = CPU_FTRS_E200,
1992 .cpu_user_features = COMMON_USER_BOOKE |
1993 PPC_FEATURE_HAS_EFP_SINGLE |
1994 PPC_FEATURE_UNIFIED_CACHE,
1995 .mmu_features = MMU_FTR_TYPE_FSL_E,
1996 .dcache_bsize = 32,
1997 .machine_check = machine_check_e200,
1998 .platform = "ppc5554",
1999 },
2000 { /* e200z6 */
2001 .pvr_mask = 0xfff00000,
2002 .pvr_value = 0x81100000,
2003 .cpu_name = "e200z6",
2004 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
2005 .cpu_features = CPU_FTRS_E200,
2006 .cpu_user_features = COMMON_USER_BOOKE |
2007 PPC_FEATURE_HAS_SPE_COMP |
2008 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2009 PPC_FEATURE_UNIFIED_CACHE,
2010 .mmu_features = MMU_FTR_TYPE_FSL_E,
2011 .dcache_bsize = 32,
2012 .machine_check = machine_check_e200,
2013 .platform = "ppc5554",
2014 },
2015 { /* default match */
2016 .pvr_mask = 0x00000000,
2017 .pvr_value = 0x00000000,
2018 .cpu_name = "(generic E200 PPC)",
2019 .cpu_features = CPU_FTRS_E200,
2020 .cpu_user_features = COMMON_USER_BOOKE |
2021 PPC_FEATURE_HAS_EFP_SINGLE |
2022 PPC_FEATURE_UNIFIED_CACHE,
2023 .mmu_features = MMU_FTR_TYPE_FSL_E,
2024 .dcache_bsize = 32,
2025 .cpu_setup = __setup_cpu_e200,
2026 .machine_check = machine_check_e200,
2027 .platform = "ppc5554",
2028 }
2029#endif /* CONFIG_E200 */
2030#endif /* CONFIG_PPC32 */
2031#ifdef CONFIG_E500
2032#ifdef CONFIG_PPC32
2033 { /* e500 */
2034 .pvr_mask = 0xffff0000,
2035 .pvr_value = 0x80200000,
2036 .cpu_name = "e500",
2037 .cpu_features = CPU_FTRS_E500,
2038 .cpu_user_features = COMMON_USER_BOOKE |
2039 PPC_FEATURE_HAS_SPE_COMP |
2040 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2041 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2042 .mmu_features = MMU_FTR_TYPE_FSL_E,
2043 .icache_bsize = 32,
2044 .dcache_bsize = 32,
2045 .num_pmcs = 4,
2046 .oprofile_cpu_type = "ppc/e500",
2047 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2048 .cpu_setup = __setup_cpu_e500v1,
2049 .machine_check = machine_check_e500,
2050 .platform = "ppc8540",
2051 },
2052 { /* e500v2 */
2053 .pvr_mask = 0xffff0000,
2054 .pvr_value = 0x80210000,
2055 .cpu_name = "e500v2",
2056 .cpu_features = CPU_FTRS_E500_2,
2057 .cpu_user_features = COMMON_USER_BOOKE |
2058 PPC_FEATURE_HAS_SPE_COMP |
2059 PPC_FEATURE_HAS_EFP_SINGLE_COMP |
2060 PPC_FEATURE_HAS_EFP_DOUBLE_COMP,
2061 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2062 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS,
2063 .icache_bsize = 32,
2064 .dcache_bsize = 32,
2065 .num_pmcs = 4,
2066 .oprofile_cpu_type = "ppc/e500",
2067 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2068 .cpu_setup = __setup_cpu_e500v2,
2069 .machine_check = machine_check_e500,
2070 .platform = "ppc8548",
2071 },
2072 { /* e500mc */
2073 .pvr_mask = 0xffff0000,
2074 .pvr_value = 0x80230000,
2075 .cpu_name = "e500mc",
2076 .cpu_features = CPU_FTRS_E500MC,
2077 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2078 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2079 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2080 MMU_FTR_USE_TLBILX,
2081 .icache_bsize = 64,
2082 .dcache_bsize = 64,
2083 .num_pmcs = 4,
2084 .oprofile_cpu_type = "ppc/e500mc",
2085 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2086 .cpu_setup = __setup_cpu_e500mc,
2087 .machine_check = machine_check_e500mc,
2088 .platform = "ppce500mc",
2089 },
2090#endif /* CONFIG_PPC32 */
2091 { /* e5500 */
2092 .pvr_mask = 0xffff0000,
2093 .pvr_value = 0x80240000,
2094 .cpu_name = "e5500",
2095 .cpu_features = CPU_FTRS_E5500,
2096 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
2097 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2098 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2099 MMU_FTR_USE_TLBILX,
2100 .icache_bsize = 64,
2101 .dcache_bsize = 64,
2102 .num_pmcs = 4,
2103 .oprofile_cpu_type = "ppc/e500mc",
2104 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2105 .cpu_setup = __setup_cpu_e5500,
2106#ifndef CONFIG_PPC32
2107 .cpu_restore = __restore_cpu_e5500,
2108#endif
2109 .machine_check = machine_check_e500mc,
2110 .platform = "ppce5500",
2111 },
2112 { /* e6500 */
2113 .pvr_mask = 0xffff0000,
2114 .pvr_value = 0x80400000,
2115 .cpu_name = "e6500",
2116 .cpu_features = CPU_FTRS_E6500,
2117 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU |
2118 PPC_FEATURE_HAS_ALTIVEC_COMP,
2119 .cpu_user_features2 = PPC_FEATURE2_ISEL,
2120 .mmu_features = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
2121 MMU_FTR_USE_TLBILX,
2122 .icache_bsize = 64,
2123 .dcache_bsize = 64,
2124 .num_pmcs = 6,
2125 .oprofile_cpu_type = "ppc/e6500",
2126 .oprofile_type = PPC_OPROFILE_FSL_EMB,
2127 .cpu_setup = __setup_cpu_e6500,
2128#ifndef CONFIG_PPC32
2129 .cpu_restore = __restore_cpu_e6500,
2130#endif
2131 .machine_check = machine_check_e500mc,
2132 .platform = "ppce6500",
2133 },
2134#ifdef CONFIG_PPC32
2135 { /* default match */
2136 .pvr_mask = 0x00000000,
2137 .pvr_value = 0x00000000,
2138 .cpu_name = "(generic E500 PPC)",
2139 .cpu_features = CPU_FTRS_E500,
2140 .cpu_user_features = COMMON_USER_BOOKE |
2141 PPC_FEATURE_HAS_SPE_COMP |
2142 PPC_FEATURE_HAS_EFP_SINGLE_COMP,
2143 .mmu_features = MMU_FTR_TYPE_FSL_E,
2144 .icache_bsize = 32,
2145 .dcache_bsize = 32,
2146 .machine_check = machine_check_e500,
2147 .platform = "powerpc",
2148 }
2149#endif /* CONFIG_PPC32 */
2150#endif /* CONFIG_E500 */
2151
2152#ifdef CONFIG_PPC_A2
2153 { /* Standard A2 (>= DD2) + FPU core */
2154 .pvr_mask = 0xffff0000,
2155 .pvr_value = 0x00480000,
2156 .cpu_name = "A2 (>= DD2)",
2157 .cpu_features = CPU_FTRS_A2,
2158 .cpu_user_features = COMMON_USER_PPC64,
2159 .mmu_features = MMU_FTRS_A2,
2160 .icache_bsize = 64,
2161 .dcache_bsize = 64,
2162 .num_pmcs = 0,
2163 .cpu_setup = __setup_cpu_a2,
2164 .cpu_restore = __restore_cpu_a2,
2165 .machine_check = machine_check_generic,
2166 .platform = "ppca2",
2167 },
2168 { /* This is a default entry to get going, to be replaced by
2169 * a real one at some stage
2170 */
2171#define CPU_FTRS_BASE_BOOK3E (CPU_FTR_USE_TB | \
2172 CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_SMT | \
2173 CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
2174 .pvr_mask = 0x00000000,
2175 .pvr_value = 0x00000000,
2176 .cpu_name = "Book3E",
2177 .cpu_features = CPU_FTRS_BASE_BOOK3E,
2178 .cpu_user_features = COMMON_USER_PPC64,
2179 .mmu_features = MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX |
2180 MMU_FTR_USE_TLBIVAX_BCAST |
2181 MMU_FTR_LOCK_BCAST_INVAL,
2182 .icache_bsize = 64,
2183 .dcache_bsize = 64,
2184 .num_pmcs = 0,
2185 .machine_check = machine_check_generic,
2186 .platform = "power6",
2187 },
2188#endif /* CONFIG_PPC_A2 */
2189};
2190
2191static struct cpu_spec the_cpu_spec;
2192
2193static struct cpu_spec * __init setup_cpu_spec(unsigned long offset,
2194 struct cpu_spec *s)
2195{
2196 struct cpu_spec *t = &the_cpu_spec;
2197 struct cpu_spec old;
2198
2199 t = PTRRELOC(t);
2200 old = *t;
2201
2202 /* Copy everything, then do fixups */
2203 *t = *s;
2204
2205 /*
2206 * If we are overriding a previous value derived from the real
2207 * PVR with a new value obtained using a logical PVR value,
2208 * don't modify the performance monitor fields.
2209 */
2210 if (old.num_pmcs && !s->num_pmcs) {
2211 t->num_pmcs = old.num_pmcs;
2212 t->pmc_type = old.pmc_type;
2213 t->oprofile_type = old.oprofile_type;
2214 t->oprofile_mmcra_sihv = old.oprofile_mmcra_sihv;
2215 t->oprofile_mmcra_sipr = old.oprofile_mmcra_sipr;
2216 t->oprofile_mmcra_clear = old.oprofile_mmcra_clear;
2217
2218 /*
2219 * If we have passed through this logic once before and
2220 * have pulled the default case because the real PVR was
2221 * not found inside cpu_specs[], then we are possibly
2222 * running in compatibility mode. In that case, let the
2223 * oprofiler know which set of compatibility counters to
2224 * pull from by making sure the oprofile_cpu_type string
2225 * is set to that of compatibility mode. If the
2226 * oprofile_cpu_type already has a value, then we are
2227 * possibly overriding a real PVR with a logical one,
2228 * and, in that case, keep the current value for
2229 * oprofile_cpu_type.
2230 */
2231 if (old.oprofile_cpu_type != NULL) {
2232 t->oprofile_cpu_type = old.oprofile_cpu_type;
2233 t->oprofile_type = old.oprofile_type;
2234 }
2235 }
2236
2237 *PTRRELOC(&cur_cpu_spec) = &the_cpu_spec;
2238
2239 /*
2240 * Set the base platform string once; assumes
2241 * we're called with real pvr first.
2242 */
2243 if (*PTRRELOC(&powerpc_base_platform) == NULL)
2244 *PTRRELOC(&powerpc_base_platform) = t->platform;
2245
2246#if defined(CONFIG_PPC64) || defined(CONFIG_BOOKE)
2247 /* ppc64 and booke expect identify_cpu to also call setup_cpu for
2248 * that processor. I will consolidate that at a later time, for now,
2249 * just use #ifdef. We also don't need to PTRRELOC the function
2250 * pointer on ppc64 and booke as we are running at 0 in real mode
2251 * on ppc64 and reloc_offset is always 0 on booke.
2252 */
2253 if (t->cpu_setup) {
2254 t->cpu_setup(offset, t);
2255 }
2256#endif /* CONFIG_PPC64 || CONFIG_BOOKE */
2257
2258 return t;
2259}
2260
2261struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
2262{
2263 struct cpu_spec *s = cpu_specs;
2264 int i;
2265
2266 s = PTRRELOC(s);
2267
2268 for (i = 0; i < ARRAY_SIZE(cpu_specs); i++,s++) {
2269 if ((pvr & s->pvr_mask) == s->pvr_value)
2270 return setup_cpu_spec(offset, s);
2271 }
2272
2273 BUG();
2274
2275 return NULL;
2276}