Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 *
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
7 */
8
9/*
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
16 *
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
22 *
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/spinlock.h>
35#include <linux/platform_device.h>
36#include <linux/log2.h>
37#include <linux/pm.h>
38#include <linux/of.h>
39#include <linux/of_platform.h>
40#ifdef CONFIG_X86
41#include <asm/i8259.h>
42#include <asm/processor.h>
43#include <linux/dmi.h>
44#endif
45
46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47#include <linux/mc146818rtc.h>
48
49#ifdef CONFIG_ACPI
50/*
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 *
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
54 *
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 */
57
58static bool use_acpi_alarm;
59module_param(use_acpi_alarm, bool, 0444);
60
61static inline int cmos_use_acpi_alarm(void)
62{
63 return use_acpi_alarm;
64}
65#else /* !CONFIG_ACPI */
66
67static inline int cmos_use_acpi_alarm(void)
68{
69 return 0;
70}
71#endif
72
73struct cmos_rtc {
74 struct rtc_device *rtc;
75 struct device *dev;
76 int irq;
77 struct resource *iomem;
78 time64_t alarm_expires;
79
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
82
83 u8 enabled_wake;
84 u8 suspend_ctrl;
85
86 /* newer hardware extends the original register set */
87 u8 day_alrm;
88 u8 mon_alrm;
89 u8 century;
90
91 struct rtc_wkalrm saved_wkalrm;
92};
93
94/* both platform and pnp busses use negative numbers for invalid irqs */
95#define is_valid_irq(n) ((n) > 0)
96
97static const char driver_name[] = "rtc_cmos";
98
99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 */
103#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104
105static inline int is_intr(u8 rtc_intr)
106{
107 if (!(rtc_intr & RTC_IRQF))
108 return 0;
109 return rtc_intr & RTC_IRQMASK;
110}
111
112/*----------------------------------------------------------------*/
113
114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
119 *
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
123 */
124#ifdef CONFIG_HPET_EMULATE_RTC
125#include <asm/hpet.h>
126#else
127
128static inline int is_hpet_enabled(void)
129{
130 return 0;
131}
132
133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134{
135 return 0;
136}
137
138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139{
140 return 0;
141}
142
143static inline int
144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145{
146 return 0;
147}
148
149static inline int hpet_set_periodic_freq(unsigned long freq)
150{
151 return 0;
152}
153
154static inline int hpet_rtc_dropped_irq(void)
155{
156 return 0;
157}
158
159static inline int hpet_rtc_timer_init(void)
160{
161 return 0;
162}
163
164extern irq_handler_t hpet_rtc_interrupt;
165
166static inline int hpet_register_irq_handler(irq_handler_t handler)
167{
168 return 0;
169}
170
171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172{
173 return 0;
174}
175
176#endif
177
178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179static inline int use_hpet_alarm(void)
180{
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
182}
183
184/*----------------------------------------------------------------*/
185
186#ifdef RTC_PORT
187
188/* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
191 */
192#define can_bank2 true
193
194static inline unsigned char cmos_read_bank2(unsigned char addr)
195{
196 outb(addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
198}
199
200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201{
202 outb(addr, RTC_PORT(2));
203 outb(val, RTC_PORT(3));
204}
205
206#else
207
208#define can_bank2 false
209
210static inline unsigned char cmos_read_bank2(unsigned char addr)
211{
212 return 0;
213}
214
215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216{
217}
218
219#endif
220
221/*----------------------------------------------------------------*/
222
223static int cmos_read_time(struct device *dev, struct rtc_time *t)
224{
225 int ret;
226
227 /*
228 * If pm_trace abused the RTC for storage, set the timespec to 0,
229 * which tells the caller that this RTC value is unusable.
230 */
231 if (!pm_trace_rtc_valid())
232 return -EIO;
233
234 ret = mc146818_get_time(t);
235 if (ret < 0) {
236 dev_err_ratelimited(dev, "unable to read current time\n");
237 return ret;
238 }
239
240 return 0;
241}
242
243static int cmos_set_time(struct device *dev, struct rtc_time *t)
244{
245 /* NOTE: this ignores the issue whereby updating the seconds
246 * takes effect exactly 500ms after we write the register.
247 * (Also queueing and other delays before we get this far.)
248 */
249 return mc146818_set_time(t);
250}
251
252struct cmos_read_alarm_callback_param {
253 struct cmos_rtc *cmos;
254 struct rtc_time *time;
255 unsigned char rtc_control;
256};
257
258static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
259 void *param_in)
260{
261 struct cmos_read_alarm_callback_param *p =
262 (struct cmos_read_alarm_callback_param *)param_in;
263 struct rtc_time *time = p->time;
264
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
268
269 if (p->cmos->day_alrm) {
270 /* ignore upper bits on readback per ACPI spec */
271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
272 if (!time->tm_mday)
273 time->tm_mday = -1;
274
275 if (p->cmos->mon_alrm) {
276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
277 if (!time->tm_mon)
278 time->tm_mon = -1;
279 }
280 }
281
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
283}
284
285static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286{
287 struct cmos_rtc *cmos = dev_get_drvdata(dev);
288 struct cmos_read_alarm_callback_param p = {
289 .cmos = cmos,
290 .time = &t->time,
291 };
292
293 /* This not only a rtc_op, but also called directly */
294 if (!is_valid_irq(cmos->irq))
295 return -EIO;
296
297 /* Basic alarms only support hour, minute, and seconds fields.
298 * Some also support day and month, for alarms up to a year in
299 * the future.
300 */
301
302 /* Some Intel chipsets disconnect the alarm registers when the clock
303 * update is in progress - during this time reads return bogus values
304 * and writes may fail silently. See for example "7th Generation Intel®
305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
306 * 27.7.1
307 *
308 * Use the mc146818_avoid_UIP() function to avoid this.
309 */
310 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, &p))
311 return -EIO;
312
313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314 if (((unsigned)t->time.tm_sec) < 0x60)
315 t->time.tm_sec = bcd2bin(t->time.tm_sec);
316 else
317 t->time.tm_sec = -1;
318 if (((unsigned)t->time.tm_min) < 0x60)
319 t->time.tm_min = bcd2bin(t->time.tm_min);
320 else
321 t->time.tm_min = -1;
322 if (((unsigned)t->time.tm_hour) < 0x24)
323 t->time.tm_hour = bcd2bin(t->time.tm_hour);
324 else
325 t->time.tm_hour = -1;
326
327 if (cmos->day_alrm) {
328 if (((unsigned)t->time.tm_mday) <= 0x31)
329 t->time.tm_mday = bcd2bin(t->time.tm_mday);
330 else
331 t->time.tm_mday = -1;
332
333 if (cmos->mon_alrm) {
334 if (((unsigned)t->time.tm_mon) <= 0x12)
335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
336 else
337 t->time.tm_mon = -1;
338 }
339 }
340 }
341
342 t->enabled = !!(p.rtc_control & RTC_AIE);
343 t->pending = 0;
344
345 return 0;
346}
347
348static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
349{
350 unsigned char rtc_intr;
351
352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353 * allegedly some older rtcs need that to handle irqs properly
354 */
355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
356
357 if (use_hpet_alarm())
358 return;
359
360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361 if (is_intr(rtc_intr))
362 rtc_update_irq(cmos->rtc, 1, rtc_intr);
363}
364
365static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
366{
367 unsigned char rtc_control;
368
369 /* flush any pending IRQ status, notably for update irqs,
370 * before we enable new IRQs
371 */
372 rtc_control = CMOS_READ(RTC_CONTROL);
373 cmos_checkintr(cmos, rtc_control);
374
375 rtc_control |= mask;
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
377 if (use_hpet_alarm())
378 hpet_set_rtc_irq_bit(mask);
379
380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
381 if (cmos->wake_on)
382 cmos->wake_on(cmos->dev);
383 }
384
385 cmos_checkintr(cmos, rtc_control);
386}
387
388static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
389{
390 unsigned char rtc_control;
391
392 rtc_control = CMOS_READ(RTC_CONTROL);
393 rtc_control &= ~mask;
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
395 if (use_hpet_alarm())
396 hpet_mask_rtc_irq_bit(mask);
397
398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
399 if (cmos->wake_off)
400 cmos->wake_off(cmos->dev);
401 }
402
403 cmos_checkintr(cmos, rtc_control);
404}
405
406static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
407{
408 struct cmos_rtc *cmos = dev_get_drvdata(dev);
409 struct rtc_time now;
410
411 cmos_read_time(dev, &now);
412
413 if (!cmos->day_alrm) {
414 time64_t t_max_date;
415 time64_t t_alrm;
416
417 t_max_date = rtc_tm_to_time64(&now);
418 t_max_date += 24 * 60 * 60 - 1;
419 t_alrm = rtc_tm_to_time64(&t->time);
420 if (t_alrm > t_max_date) {
421 dev_err(dev,
422 "Alarms can be up to one day in the future\n");
423 return -EINVAL;
424 }
425 } else if (!cmos->mon_alrm) {
426 struct rtc_time max_date = now;
427 time64_t t_max_date;
428 time64_t t_alrm;
429 int max_mday;
430
431 if (max_date.tm_mon == 11) {
432 max_date.tm_mon = 0;
433 max_date.tm_year += 1;
434 } else {
435 max_date.tm_mon += 1;
436 }
437 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
438 if (max_date.tm_mday > max_mday)
439 max_date.tm_mday = max_mday;
440
441 t_max_date = rtc_tm_to_time64(&max_date);
442 t_max_date -= 1;
443 t_alrm = rtc_tm_to_time64(&t->time);
444 if (t_alrm > t_max_date) {
445 dev_err(dev,
446 "Alarms can be up to one month in the future\n");
447 return -EINVAL;
448 }
449 } else {
450 struct rtc_time max_date = now;
451 time64_t t_max_date;
452 time64_t t_alrm;
453 int max_mday;
454
455 max_date.tm_year += 1;
456 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
457 if (max_date.tm_mday > max_mday)
458 max_date.tm_mday = max_mday;
459
460 t_max_date = rtc_tm_to_time64(&max_date);
461 t_max_date -= 1;
462 t_alrm = rtc_tm_to_time64(&t->time);
463 if (t_alrm > t_max_date) {
464 dev_err(dev,
465 "Alarms can be up to one year in the future\n");
466 return -EINVAL;
467 }
468 }
469
470 return 0;
471}
472
473struct cmos_set_alarm_callback_param {
474 struct cmos_rtc *cmos;
475 unsigned char mon, mday, hrs, min, sec;
476 struct rtc_wkalrm *t;
477};
478
479/* Note: this function may be executed by mc146818_avoid_UIP() more then
480 * once
481 */
482static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
483 void *param_in)
484{
485 struct cmos_set_alarm_callback_param *p =
486 (struct cmos_set_alarm_callback_param *)param_in;
487
488 /* next rtc irq must not be from previous alarm setting */
489 cmos_irq_disable(p->cmos, RTC_AIE);
490
491 /* update alarm */
492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
495
496 /* the system may support an "enhanced" alarm */
497 if (p->cmos->day_alrm) {
498 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499 if (p->cmos->mon_alrm)
500 CMOS_WRITE(p->mon, p->cmos->mon_alrm);
501 }
502
503 if (use_hpet_alarm()) {
504 /*
505 * FIXME the HPET alarm glue currently ignores day_alrm
506 * and mon_alrm ...
507 */
508 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
509 p->t->time.tm_sec);
510 }
511
512 if (p->t->enabled)
513 cmos_irq_enable(p->cmos, RTC_AIE);
514}
515
516static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
517{
518 struct cmos_rtc *cmos = dev_get_drvdata(dev);
519 struct cmos_set_alarm_callback_param p = {
520 .cmos = cmos,
521 .t = t
522 };
523 unsigned char rtc_control;
524 int ret;
525
526 /* This not only a rtc_op, but also called directly */
527 if (!is_valid_irq(cmos->irq))
528 return -EIO;
529
530 ret = cmos_validate_alarm(dev, t);
531 if (ret < 0)
532 return ret;
533
534 p.mon = t->time.tm_mon + 1;
535 p.mday = t->time.tm_mday;
536 p.hrs = t->time.tm_hour;
537 p.min = t->time.tm_min;
538 p.sec = t->time.tm_sec;
539
540 spin_lock_irq(&rtc_lock);
541 rtc_control = CMOS_READ(RTC_CONTROL);
542 spin_unlock_irq(&rtc_lock);
543
544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545 /* Writing 0xff means "don't care" or "match all". */
546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
551 }
552
553 /*
554 * Some Intel chipsets disconnect the alarm registers when the clock
555 * update is in progress - during this time writes fail silently.
556 *
557 * Use mc146818_avoid_UIP() to avoid this.
558 */
559 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, &p))
560 return -EIO;
561
562 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
563
564 return 0;
565}
566
567static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
568{
569 struct cmos_rtc *cmos = dev_get_drvdata(dev);
570 unsigned long flags;
571
572 spin_lock_irqsave(&rtc_lock, flags);
573
574 if (enabled)
575 cmos_irq_enable(cmos, RTC_AIE);
576 else
577 cmos_irq_disable(cmos, RTC_AIE);
578
579 spin_unlock_irqrestore(&rtc_lock, flags);
580 return 0;
581}
582
583#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
584
585static int cmos_procfs(struct device *dev, struct seq_file *seq)
586{
587 struct cmos_rtc *cmos = dev_get_drvdata(dev);
588 unsigned char rtc_control, valid;
589
590 spin_lock_irq(&rtc_lock);
591 rtc_control = CMOS_READ(RTC_CONTROL);
592 valid = CMOS_READ(RTC_VALID);
593 spin_unlock_irq(&rtc_lock);
594
595 /* NOTE: at least ICH6 reports battery status using a different
596 * (non-RTC) bit; and SQWE is ignored on many current systems.
597 */
598 seq_printf(seq,
599 "periodic_IRQ\t: %s\n"
600 "update_IRQ\t: %s\n"
601 "HPET_emulated\t: %s\n"
602 // "square_wave\t: %s\n"
603 "BCD\t\t: %s\n"
604 "DST_enable\t: %s\n"
605 "periodic_freq\t: %d\n"
606 "batt_status\t: %s\n",
607 (rtc_control & RTC_PIE) ? "yes" : "no",
608 (rtc_control & RTC_UIE) ? "yes" : "no",
609 use_hpet_alarm() ? "yes" : "no",
610 // (rtc_control & RTC_SQWE) ? "yes" : "no",
611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612 (rtc_control & RTC_DST_EN) ? "yes" : "no",
613 cmos->rtc->irq_freq,
614 (valid & RTC_VRT) ? "okay" : "dead");
615
616 return 0;
617}
618
619#else
620#define cmos_procfs NULL
621#endif
622
623static const struct rtc_class_ops cmos_rtc_ops = {
624 .read_time = cmos_read_time,
625 .set_time = cmos_set_time,
626 .read_alarm = cmos_read_alarm,
627 .set_alarm = cmos_set_alarm,
628 .proc = cmos_procfs,
629 .alarm_irq_enable = cmos_alarm_irq_enable,
630};
631
632/*----------------------------------------------------------------*/
633
634/*
635 * All these chips have at least 64 bytes of address space, shared by
636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
637 * by boot firmware. Modern chips have 128 or 256 bytes.
638 */
639
640#define NVRAM_OFFSET (RTC_REG_D + 1)
641
642static int cmos_nvram_read(void *priv, unsigned int off, void *val,
643 size_t count)
644{
645 unsigned char *buf = val;
646 int retval;
647
648 off += NVRAM_OFFSET;
649 spin_lock_irq(&rtc_lock);
650 for (retval = 0; count; count--, off++, retval++) {
651 if (off < 128)
652 *buf++ = CMOS_READ(off);
653 else if (can_bank2)
654 *buf++ = cmos_read_bank2(off);
655 else
656 break;
657 }
658 spin_unlock_irq(&rtc_lock);
659
660 return retval;
661}
662
663static int cmos_nvram_write(void *priv, unsigned int off, void *val,
664 size_t count)
665{
666 struct cmos_rtc *cmos = priv;
667 unsigned char *buf = val;
668 int retval;
669
670 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
671 * checksum on part of the NVRAM data. That's currently ignored
672 * here. If userspace is smart enough to know what fields of
673 * NVRAM to update, updating checksums is also part of its job.
674 */
675 off += NVRAM_OFFSET;
676 spin_lock_irq(&rtc_lock);
677 for (retval = 0; count; count--, off++, retval++) {
678 /* don't trash RTC registers */
679 if (off == cmos->day_alrm
680 || off == cmos->mon_alrm
681 || off == cmos->century)
682 buf++;
683 else if (off < 128)
684 CMOS_WRITE(*buf++, off);
685 else if (can_bank2)
686 cmos_write_bank2(*buf++, off);
687 else
688 break;
689 }
690 spin_unlock_irq(&rtc_lock);
691
692 return retval;
693}
694
695/*----------------------------------------------------------------*/
696
697static struct cmos_rtc cmos_rtc;
698
699static irqreturn_t cmos_interrupt(int irq, void *p)
700{
701 u8 irqstat;
702 u8 rtc_control;
703
704 spin_lock(&rtc_lock);
705
706 /* When the HPET interrupt handler calls us, the interrupt
707 * status is passed as arg1 instead of the irq number. But
708 * always clear irq status, even when HPET is in the way.
709 *
710 * Note that HPET and RTC are almost certainly out of phase,
711 * giving different IRQ status ...
712 */
713 irqstat = CMOS_READ(RTC_INTR_FLAGS);
714 rtc_control = CMOS_READ(RTC_CONTROL);
715 if (use_hpet_alarm())
716 irqstat = (unsigned long)irq & 0xF0;
717
718 /* If we were suspended, RTC_CONTROL may not be accurate since the
719 * bios may have cleared it.
720 */
721 if (!cmos_rtc.suspend_ctrl)
722 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
723 else
724 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
725
726 /* All Linux RTC alarms should be treated as if they were oneshot.
727 * Similar code may be needed in system wakeup paths, in case the
728 * alarm woke the system.
729 */
730 if (irqstat & RTC_AIE) {
731 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
732 rtc_control &= ~RTC_AIE;
733 CMOS_WRITE(rtc_control, RTC_CONTROL);
734 if (use_hpet_alarm())
735 hpet_mask_rtc_irq_bit(RTC_AIE);
736 CMOS_READ(RTC_INTR_FLAGS);
737 }
738 spin_unlock(&rtc_lock);
739
740 if (is_intr(irqstat)) {
741 rtc_update_irq(p, 1, irqstat);
742 return IRQ_HANDLED;
743 } else
744 return IRQ_NONE;
745}
746
747#ifdef CONFIG_ACPI
748
749#include <linux/acpi.h>
750
751static u32 rtc_handler(void *context)
752{
753 struct device *dev = context;
754 struct cmos_rtc *cmos = dev_get_drvdata(dev);
755 unsigned char rtc_control = 0;
756 unsigned char rtc_intr;
757 unsigned long flags;
758
759
760 /*
761 * Always update rtc irq when ACPI is used as RTC Alarm.
762 * Or else, ACPI SCI is enabled during suspend/resume only,
763 * update rtc irq in that case.
764 */
765 if (cmos_use_acpi_alarm())
766 cmos_interrupt(0, (void *)cmos->rtc);
767 else {
768 /* Fix me: can we use cmos_interrupt() here as well? */
769 spin_lock_irqsave(&rtc_lock, flags);
770 if (cmos_rtc.suspend_ctrl)
771 rtc_control = CMOS_READ(RTC_CONTROL);
772 if (rtc_control & RTC_AIE) {
773 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
774 CMOS_WRITE(rtc_control, RTC_CONTROL);
775 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
776 rtc_update_irq(cmos->rtc, 1, rtc_intr);
777 }
778 spin_unlock_irqrestore(&rtc_lock, flags);
779 }
780
781 pm_wakeup_hard_event(dev);
782 acpi_clear_event(ACPI_EVENT_RTC);
783 acpi_disable_event(ACPI_EVENT_RTC, 0);
784 return ACPI_INTERRUPT_HANDLED;
785}
786
787static void acpi_rtc_event_setup(struct device *dev)
788{
789 if (acpi_disabled)
790 return;
791
792 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
793 /*
794 * After the RTC handler is installed, the Fixed_RTC event should
795 * be disabled. Only when the RTC alarm is set will it be enabled.
796 */
797 acpi_clear_event(ACPI_EVENT_RTC);
798 acpi_disable_event(ACPI_EVENT_RTC, 0);
799}
800
801static void acpi_rtc_event_cleanup(void)
802{
803 if (acpi_disabled)
804 return;
805
806 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
807}
808
809static void rtc_wake_on(struct device *dev)
810{
811 acpi_clear_event(ACPI_EVENT_RTC);
812 acpi_enable_event(ACPI_EVENT_RTC, 0);
813}
814
815static void rtc_wake_off(struct device *dev)
816{
817 acpi_disable_event(ACPI_EVENT_RTC, 0);
818}
819
820#ifdef CONFIG_X86
821/* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
822static void use_acpi_alarm_quirks(void)
823{
824 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
825 return;
826
827 if (!is_hpet_enabled())
828 return;
829
830 if (dmi_get_bios_year() < 2015)
831 return;
832
833 use_acpi_alarm = true;
834}
835#else
836static inline void use_acpi_alarm_quirks(void) { }
837#endif
838
839static void acpi_cmos_wake_setup(struct device *dev)
840{
841 if (acpi_disabled)
842 return;
843
844 use_acpi_alarm_quirks();
845
846 cmos_rtc.wake_on = rtc_wake_on;
847 cmos_rtc.wake_off = rtc_wake_off;
848
849 /* ACPI tables bug workaround. */
850 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
851 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
852 acpi_gbl_FADT.month_alarm);
853 acpi_gbl_FADT.month_alarm = 0;
854 }
855
856 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
857 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
858 cmos_rtc.century = acpi_gbl_FADT.century;
859
860 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
861 dev_info(dev, "RTC can wake from S4\n");
862
863 /* RTC always wakes from S1/S2/S3, and often S4/STD */
864 device_init_wakeup(dev, 1);
865}
866
867static void cmos_check_acpi_rtc_status(struct device *dev,
868 unsigned char *rtc_control)
869{
870 struct cmos_rtc *cmos = dev_get_drvdata(dev);
871 acpi_event_status rtc_status;
872 acpi_status status;
873
874 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
875 return;
876
877 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
878 if (ACPI_FAILURE(status)) {
879 dev_err(dev, "Could not get RTC status\n");
880 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
881 unsigned char mask;
882 *rtc_control &= ~RTC_AIE;
883 CMOS_WRITE(*rtc_control, RTC_CONTROL);
884 mask = CMOS_READ(RTC_INTR_FLAGS);
885 rtc_update_irq(cmos->rtc, 1, mask);
886 }
887}
888
889#else /* !CONFIG_ACPI */
890
891static inline void acpi_rtc_event_setup(struct device *dev)
892{
893}
894
895static inline void acpi_rtc_event_cleanup(void)
896{
897}
898
899static inline void acpi_cmos_wake_setup(struct device *dev)
900{
901}
902
903static inline void cmos_check_acpi_rtc_status(struct device *dev,
904 unsigned char *rtc_control)
905{
906}
907#endif /* CONFIG_ACPI */
908
909#ifdef CONFIG_PNP
910#define INITSECTION
911
912#else
913#define INITSECTION __init
914#endif
915
916static int INITSECTION
917cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
918{
919 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
920 int retval = 0;
921 unsigned char rtc_control;
922 unsigned address_space;
923 u32 flags = 0;
924 struct nvmem_config nvmem_cfg = {
925 .name = "cmos_nvram",
926 .word_size = 1,
927 .stride = 1,
928 .reg_read = cmos_nvram_read,
929 .reg_write = cmos_nvram_write,
930 .priv = &cmos_rtc,
931 };
932
933 /* there can be only one ... */
934 if (cmos_rtc.dev)
935 return -EBUSY;
936
937 if (!ports)
938 return -ENODEV;
939
940 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
941 *
942 * REVISIT non-x86 systems may instead use memory space resources
943 * (needing ioremap etc), not i/o space resources like this ...
944 */
945 if (RTC_IOMAPPED)
946 ports = request_region(ports->start, resource_size(ports),
947 driver_name);
948 else
949 ports = request_mem_region(ports->start, resource_size(ports),
950 driver_name);
951 if (!ports) {
952 dev_dbg(dev, "i/o registers already in use\n");
953 return -EBUSY;
954 }
955
956 cmos_rtc.irq = rtc_irq;
957 cmos_rtc.iomem = ports;
958
959 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
960 * driver did, but don't reject unknown configs. Old hardware
961 * won't address 128 bytes. Newer chips have multiple banks,
962 * though they may not be listed in one I/O resource.
963 */
964#if defined(CONFIG_ATARI)
965 address_space = 64;
966#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
967 || defined(__sparc__) || defined(__mips__) \
968 || defined(__powerpc__)
969 address_space = 128;
970#else
971#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
972 address_space = 128;
973#endif
974 if (can_bank2 && ports->end > (ports->start + 1))
975 address_space = 256;
976
977 /* For ACPI systems extension info comes from the FADT. On others,
978 * board specific setup provides it as appropriate. Systems where
979 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
980 * some almost-clones) can provide hooks to make that behave.
981 *
982 * Note that ACPI doesn't preclude putting these registers into
983 * "extended" areas of the chip, including some that we won't yet
984 * expect CMOS_READ and friends to handle.
985 */
986 if (info) {
987 if (info->flags)
988 flags = info->flags;
989 if (info->address_space)
990 address_space = info->address_space;
991
992 cmos_rtc.day_alrm = info->rtc_day_alarm;
993 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
994 cmos_rtc.century = info->rtc_century;
995
996 if (info->wake_on && info->wake_off) {
997 cmos_rtc.wake_on = info->wake_on;
998 cmos_rtc.wake_off = info->wake_off;
999 }
1000 } else {
1001 acpi_cmos_wake_setup(dev);
1002 }
1003
1004 if (cmos_rtc.day_alrm >= 128)
1005 cmos_rtc.day_alrm = 0;
1006
1007 if (cmos_rtc.mon_alrm >= 128)
1008 cmos_rtc.mon_alrm = 0;
1009
1010 if (cmos_rtc.century >= 128)
1011 cmos_rtc.century = 0;
1012
1013 cmos_rtc.dev = dev;
1014 dev_set_drvdata(dev, &cmos_rtc);
1015
1016 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1017 if (IS_ERR(cmos_rtc.rtc)) {
1018 retval = PTR_ERR(cmos_rtc.rtc);
1019 goto cleanup0;
1020 }
1021
1022 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1023
1024 if (!mc146818_does_rtc_work()) {
1025 dev_warn(dev, "broken or not accessible\n");
1026 retval = -ENXIO;
1027 goto cleanup1;
1028 }
1029
1030 spin_lock_irq(&rtc_lock);
1031
1032 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1033 /* force periodic irq to CMOS reset default of 1024Hz;
1034 *
1035 * REVISIT it's been reported that at least one x86_64 ALI
1036 * mobo doesn't use 32KHz here ... for portability we might
1037 * need to do something about other clock frequencies.
1038 */
1039 cmos_rtc.rtc->irq_freq = 1024;
1040 if (use_hpet_alarm())
1041 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1042 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1043 }
1044
1045 /* disable irqs */
1046 if (is_valid_irq(rtc_irq))
1047 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1048
1049 rtc_control = CMOS_READ(RTC_CONTROL);
1050
1051 spin_unlock_irq(&rtc_lock);
1052
1053 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1054 dev_warn(dev, "only 24-hr supported\n");
1055 retval = -ENXIO;
1056 goto cleanup1;
1057 }
1058
1059 if (use_hpet_alarm())
1060 hpet_rtc_timer_init();
1061
1062 if (is_valid_irq(rtc_irq)) {
1063 irq_handler_t rtc_cmos_int_handler;
1064
1065 if (use_hpet_alarm()) {
1066 rtc_cmos_int_handler = hpet_rtc_interrupt;
1067 retval = hpet_register_irq_handler(cmos_interrupt);
1068 if (retval) {
1069 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1070 dev_warn(dev, "hpet_register_irq_handler "
1071 " failed in rtc_init().");
1072 goto cleanup1;
1073 }
1074 } else
1075 rtc_cmos_int_handler = cmos_interrupt;
1076
1077 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1078 0, dev_name(&cmos_rtc.rtc->dev),
1079 cmos_rtc.rtc);
1080 if (retval < 0) {
1081 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1082 goto cleanup1;
1083 }
1084 } else {
1085 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1086 }
1087
1088 cmos_rtc.rtc->ops = &cmos_rtc_ops;
1089
1090 retval = devm_rtc_register_device(cmos_rtc.rtc);
1091 if (retval)
1092 goto cleanup2;
1093
1094 /* Set the sync offset for the periodic 11min update correct */
1095 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1096
1097 /* export at least the first block of NVRAM */
1098 nvmem_cfg.size = address_space - NVRAM_OFFSET;
1099 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1100
1101 /*
1102 * Everything has gone well so far, so by default register a handler for
1103 * the ACPI RTC fixed event.
1104 */
1105 if (!info)
1106 acpi_rtc_event_setup(dev);
1107
1108 dev_info(dev, "%s%s, %d bytes nvram%s\n",
1109 !is_valid_irq(rtc_irq) ? "no alarms" :
1110 cmos_rtc.mon_alrm ? "alarms up to one year" :
1111 cmos_rtc.day_alrm ? "alarms up to one month" :
1112 "alarms up to one day",
1113 cmos_rtc.century ? ", y3k" : "",
1114 nvmem_cfg.size,
1115 use_hpet_alarm() ? ", hpet irqs" : "");
1116
1117 return 0;
1118
1119cleanup2:
1120 if (is_valid_irq(rtc_irq))
1121 free_irq(rtc_irq, cmos_rtc.rtc);
1122cleanup1:
1123 cmos_rtc.dev = NULL;
1124cleanup0:
1125 if (RTC_IOMAPPED)
1126 release_region(ports->start, resource_size(ports));
1127 else
1128 release_mem_region(ports->start, resource_size(ports));
1129 return retval;
1130}
1131
1132static void cmos_do_shutdown(int rtc_irq)
1133{
1134 spin_lock_irq(&rtc_lock);
1135 if (is_valid_irq(rtc_irq))
1136 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1137 spin_unlock_irq(&rtc_lock);
1138}
1139
1140static void cmos_do_remove(struct device *dev)
1141{
1142 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1143 struct resource *ports;
1144
1145 cmos_do_shutdown(cmos->irq);
1146
1147 if (is_valid_irq(cmos->irq)) {
1148 free_irq(cmos->irq, cmos->rtc);
1149 if (use_hpet_alarm())
1150 hpet_unregister_irq_handler(cmos_interrupt);
1151 }
1152
1153 if (!dev_get_platdata(dev))
1154 acpi_rtc_event_cleanup();
1155
1156 cmos->rtc = NULL;
1157
1158 ports = cmos->iomem;
1159 if (RTC_IOMAPPED)
1160 release_region(ports->start, resource_size(ports));
1161 else
1162 release_mem_region(ports->start, resource_size(ports));
1163 cmos->iomem = NULL;
1164
1165 cmos->dev = NULL;
1166}
1167
1168static int cmos_aie_poweroff(struct device *dev)
1169{
1170 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1171 struct rtc_time now;
1172 time64_t t_now;
1173 int retval = 0;
1174 unsigned char rtc_control;
1175
1176 if (!cmos->alarm_expires)
1177 return -EINVAL;
1178
1179 spin_lock_irq(&rtc_lock);
1180 rtc_control = CMOS_READ(RTC_CONTROL);
1181 spin_unlock_irq(&rtc_lock);
1182
1183 /* We only care about the situation where AIE is disabled. */
1184 if (rtc_control & RTC_AIE)
1185 return -EBUSY;
1186
1187 cmos_read_time(dev, &now);
1188 t_now = rtc_tm_to_time64(&now);
1189
1190 /*
1191 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1192 * automatically right after shutdown on some buggy boxes.
1193 * This automatic rebooting issue won't happen when the alarm
1194 * time is larger than now+1 seconds.
1195 *
1196 * If the alarm time is equal to now+1 seconds, the issue can be
1197 * prevented by cancelling the alarm.
1198 */
1199 if (cmos->alarm_expires == t_now + 1) {
1200 struct rtc_wkalrm alarm;
1201
1202 /* Cancel the AIE timer by configuring the past time. */
1203 rtc_time64_to_tm(t_now - 1, &alarm.time);
1204 alarm.enabled = 0;
1205 retval = cmos_set_alarm(dev, &alarm);
1206 } else if (cmos->alarm_expires > t_now + 1) {
1207 retval = -EBUSY;
1208 }
1209
1210 return retval;
1211}
1212
1213static int cmos_suspend(struct device *dev)
1214{
1215 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1216 unsigned char tmp;
1217
1218 /* only the alarm might be a wakeup event source */
1219 spin_lock_irq(&rtc_lock);
1220 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1221 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1222 unsigned char mask;
1223
1224 if (device_may_wakeup(dev))
1225 mask = RTC_IRQMASK & ~RTC_AIE;
1226 else
1227 mask = RTC_IRQMASK;
1228 tmp &= ~mask;
1229 CMOS_WRITE(tmp, RTC_CONTROL);
1230 if (use_hpet_alarm())
1231 hpet_mask_rtc_irq_bit(mask);
1232 cmos_checkintr(cmos, tmp);
1233 }
1234 spin_unlock_irq(&rtc_lock);
1235
1236 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1237 cmos->enabled_wake = 1;
1238 if (cmos->wake_on)
1239 cmos->wake_on(dev);
1240 else
1241 enable_irq_wake(cmos->irq);
1242 }
1243
1244 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1245 cmos_read_alarm(dev, &cmos->saved_wkalrm);
1246
1247 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1248 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1249 tmp);
1250
1251 return 0;
1252}
1253
1254/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1255 * after a detour through G3 "mechanical off", although the ACPI spec
1256 * says wakeup should only work from G1/S4 "hibernate". To most users,
1257 * distinctions between S4 and S5 are pointless. So when the hardware
1258 * allows, don't draw that distinction.
1259 */
1260static inline int cmos_poweroff(struct device *dev)
1261{
1262 if (!IS_ENABLED(CONFIG_PM))
1263 return -ENOSYS;
1264
1265 return cmos_suspend(dev);
1266}
1267
1268static void cmos_check_wkalrm(struct device *dev)
1269{
1270 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1271 struct rtc_wkalrm current_alarm;
1272 time64_t t_now;
1273 time64_t t_current_expires;
1274 time64_t t_saved_expires;
1275 struct rtc_time now;
1276
1277 /* Check if we have RTC Alarm armed */
1278 if (!(cmos->suspend_ctrl & RTC_AIE))
1279 return;
1280
1281 cmos_read_time(dev, &now);
1282 t_now = rtc_tm_to_time64(&now);
1283
1284 /*
1285 * ACPI RTC wake event is cleared after resume from STR,
1286 * ACK the rtc irq here
1287 */
1288 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1289 local_irq_disable();
1290 cmos_interrupt(0, (void *)cmos->rtc);
1291 local_irq_enable();
1292 return;
1293 }
1294
1295 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
1296 cmos_read_alarm(dev, ¤t_alarm);
1297 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
1298 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1299 if (t_current_expires != t_saved_expires ||
1300 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1301 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1302 }
1303}
1304
1305static int __maybe_unused cmos_resume(struct device *dev)
1306{
1307 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1308 unsigned char tmp;
1309
1310 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1311 if (cmos->wake_off)
1312 cmos->wake_off(dev);
1313 else
1314 disable_irq_wake(cmos->irq);
1315 cmos->enabled_wake = 0;
1316 }
1317
1318 /* The BIOS might have changed the alarm, restore it */
1319 cmos_check_wkalrm(dev);
1320
1321 spin_lock_irq(&rtc_lock);
1322 tmp = cmos->suspend_ctrl;
1323 cmos->suspend_ctrl = 0;
1324 /* re-enable any irqs previously active */
1325 if (tmp & RTC_IRQMASK) {
1326 unsigned char mask;
1327
1328 if (device_may_wakeup(dev) && use_hpet_alarm())
1329 hpet_rtc_timer_init();
1330
1331 do {
1332 CMOS_WRITE(tmp, RTC_CONTROL);
1333 if (use_hpet_alarm())
1334 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1335
1336 mask = CMOS_READ(RTC_INTR_FLAGS);
1337 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1338 if (!use_hpet_alarm() || !is_intr(mask))
1339 break;
1340
1341 /* force one-shot behavior if HPET blocked
1342 * the wake alarm's irq
1343 */
1344 rtc_update_irq(cmos->rtc, 1, mask);
1345 tmp &= ~RTC_AIE;
1346 hpet_mask_rtc_irq_bit(RTC_AIE);
1347 } while (mask & RTC_AIE);
1348
1349 if (tmp & RTC_AIE)
1350 cmos_check_acpi_rtc_status(dev, &tmp);
1351 }
1352 spin_unlock_irq(&rtc_lock);
1353
1354 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1355
1356 return 0;
1357}
1358
1359static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1360
1361/*----------------------------------------------------------------*/
1362
1363/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1364 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1365 * probably list them in similar PNPBIOS tables; so PNP is more common.
1366 *
1367 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1368 * predate even PNPBIOS should set up platform_bus devices.
1369 */
1370
1371#ifdef CONFIG_PNP
1372
1373#include <linux/pnp.h>
1374
1375static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1376{
1377 int irq;
1378
1379 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1380 irq = 0;
1381#ifdef CONFIG_X86
1382 /* Some machines contain a PNP entry for the RTC, but
1383 * don't define the IRQ. It should always be safe to
1384 * hardcode it on systems with a legacy PIC.
1385 */
1386 if (nr_legacy_irqs())
1387 irq = RTC_IRQ;
1388#endif
1389 } else {
1390 irq = pnp_irq(pnp, 0);
1391 }
1392
1393 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1394}
1395
1396static void cmos_pnp_remove(struct pnp_dev *pnp)
1397{
1398 cmos_do_remove(&pnp->dev);
1399}
1400
1401static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1402{
1403 struct device *dev = &pnp->dev;
1404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1405
1406 if (system_state == SYSTEM_POWER_OFF) {
1407 int retval = cmos_poweroff(dev);
1408
1409 if (cmos_aie_poweroff(dev) < 0 && !retval)
1410 return;
1411 }
1412
1413 cmos_do_shutdown(cmos->irq);
1414}
1415
1416static const struct pnp_device_id rtc_ids[] = {
1417 { .id = "PNP0b00", },
1418 { .id = "PNP0b01", },
1419 { .id = "PNP0b02", },
1420 { },
1421};
1422MODULE_DEVICE_TABLE(pnp, rtc_ids);
1423
1424static struct pnp_driver cmos_pnp_driver = {
1425 .name = driver_name,
1426 .id_table = rtc_ids,
1427 .probe = cmos_pnp_probe,
1428 .remove = cmos_pnp_remove,
1429 .shutdown = cmos_pnp_shutdown,
1430
1431 /* flag ensures resume() gets called, and stops syslog spam */
1432 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1433 .driver = {
1434 .pm = &cmos_pm_ops,
1435 },
1436};
1437
1438#endif /* CONFIG_PNP */
1439
1440#ifdef CONFIG_OF
1441static const struct of_device_id of_cmos_match[] = {
1442 {
1443 .compatible = "motorola,mc146818",
1444 },
1445 { },
1446};
1447MODULE_DEVICE_TABLE(of, of_cmos_match);
1448
1449static __init void cmos_of_init(struct platform_device *pdev)
1450{
1451 struct device_node *node = pdev->dev.of_node;
1452 const __be32 *val;
1453
1454 if (!node)
1455 return;
1456
1457 val = of_get_property(node, "ctrl-reg", NULL);
1458 if (val)
1459 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1460
1461 val = of_get_property(node, "freq-reg", NULL);
1462 if (val)
1463 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1464}
1465#else
1466static inline void cmos_of_init(struct platform_device *pdev) {}
1467#endif
1468/*----------------------------------------------------------------*/
1469
1470/* Platform setup should have set up an RTC device, when PNP is
1471 * unavailable ... this could happen even on (older) PCs.
1472 */
1473
1474static int __init cmos_platform_probe(struct platform_device *pdev)
1475{
1476 struct resource *resource;
1477 int irq;
1478
1479 cmos_of_init(pdev);
1480
1481 if (RTC_IOMAPPED)
1482 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1483 else
1484 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1485 irq = platform_get_irq(pdev, 0);
1486 if (irq < 0)
1487 irq = -1;
1488
1489 return cmos_do_probe(&pdev->dev, resource, irq);
1490}
1491
1492static int cmos_platform_remove(struct platform_device *pdev)
1493{
1494 cmos_do_remove(&pdev->dev);
1495 return 0;
1496}
1497
1498static void cmos_platform_shutdown(struct platform_device *pdev)
1499{
1500 struct device *dev = &pdev->dev;
1501 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1502
1503 if (system_state == SYSTEM_POWER_OFF) {
1504 int retval = cmos_poweroff(dev);
1505
1506 if (cmos_aie_poweroff(dev) < 0 && !retval)
1507 return;
1508 }
1509
1510 cmos_do_shutdown(cmos->irq);
1511}
1512
1513/* work with hotplug and coldplug */
1514MODULE_ALIAS("platform:rtc_cmos");
1515
1516static struct platform_driver cmos_platform_driver = {
1517 .remove = cmos_platform_remove,
1518 .shutdown = cmos_platform_shutdown,
1519 .driver = {
1520 .name = driver_name,
1521 .pm = &cmos_pm_ops,
1522 .of_match_table = of_match_ptr(of_cmos_match),
1523 }
1524};
1525
1526#ifdef CONFIG_PNP
1527static bool pnp_driver_registered;
1528#endif
1529static bool platform_driver_registered;
1530
1531static int __init cmos_init(void)
1532{
1533 int retval = 0;
1534
1535#ifdef CONFIG_PNP
1536 retval = pnp_register_driver(&cmos_pnp_driver);
1537 if (retval == 0)
1538 pnp_driver_registered = true;
1539#endif
1540
1541 if (!cmos_rtc.dev) {
1542 retval = platform_driver_probe(&cmos_platform_driver,
1543 cmos_platform_probe);
1544 if (retval == 0)
1545 platform_driver_registered = true;
1546 }
1547
1548 if (retval == 0)
1549 return 0;
1550
1551#ifdef CONFIG_PNP
1552 if (pnp_driver_registered)
1553 pnp_unregister_driver(&cmos_pnp_driver);
1554#endif
1555 return retval;
1556}
1557module_init(cmos_init);
1558
1559static void __exit cmos_exit(void)
1560{
1561#ifdef CONFIG_PNP
1562 if (pnp_driver_registered)
1563 pnp_unregister_driver(&cmos_pnp_driver);
1564#endif
1565 if (platform_driver_registered)
1566 platform_driver_unregister(&cmos_platform_driver);
1567}
1568module_exit(cmos_exit);
1569
1570
1571MODULE_AUTHOR("David Brownell");
1572MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1573MODULE_LICENSE("GPL");
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <linux/spinlock.h>
39#include <linux/platform_device.h>
40#include <linux/log2.h>
41#include <linux/pm.h>
42#include <linux/of.h>
43#include <linux/of_platform.h>
44
45/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
46#include <linux/mc146818rtc.h>
47
48struct cmos_rtc {
49 struct rtc_device *rtc;
50 struct device *dev;
51 int irq;
52 struct resource *iomem;
53 time64_t alarm_expires;
54
55 void (*wake_on)(struct device *);
56 void (*wake_off)(struct device *);
57
58 u8 enabled_wake;
59 u8 suspend_ctrl;
60
61 /* newer hardware extends the original register set */
62 u8 day_alrm;
63 u8 mon_alrm;
64 u8 century;
65
66 struct rtc_wkalrm saved_wkalrm;
67};
68
69/* both platform and pnp busses use negative numbers for invalid irqs */
70#define is_valid_irq(n) ((n) > 0)
71
72static const char driver_name[] = "rtc_cmos";
73
74/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
75 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
76 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
77 */
78#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
79
80static inline int is_intr(u8 rtc_intr)
81{
82 if (!(rtc_intr & RTC_IRQF))
83 return 0;
84 return rtc_intr & RTC_IRQMASK;
85}
86
87/*----------------------------------------------------------------*/
88
89/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
90 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
91 * used in a broken "legacy replacement" mode. The breakage includes
92 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
93 * other (better) use.
94 *
95 * When that broken mode is in use, platform glue provides a partial
96 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
97 * want to use HPET for anything except those IRQs though...
98 */
99#ifdef CONFIG_HPET_EMULATE_RTC
100#include <asm/hpet.h>
101#else
102
103static inline int is_hpet_enabled(void)
104{
105 return 0;
106}
107
108static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
109{
110 return 0;
111}
112
113static inline int hpet_set_rtc_irq_bit(unsigned long mask)
114{
115 return 0;
116}
117
118static inline int
119hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
120{
121 return 0;
122}
123
124static inline int hpet_set_periodic_freq(unsigned long freq)
125{
126 return 0;
127}
128
129static inline int hpet_rtc_dropped_irq(void)
130{
131 return 0;
132}
133
134static inline int hpet_rtc_timer_init(void)
135{
136 return 0;
137}
138
139extern irq_handler_t hpet_rtc_interrupt;
140
141static inline int hpet_register_irq_handler(irq_handler_t handler)
142{
143 return 0;
144}
145
146static inline int hpet_unregister_irq_handler(irq_handler_t handler)
147{
148 return 0;
149}
150
151#endif
152
153/*----------------------------------------------------------------*/
154
155#ifdef RTC_PORT
156
157/* Most newer x86 systems have two register banks, the first used
158 * for RTC and NVRAM and the second only for NVRAM. Caller must
159 * own rtc_lock ... and we won't worry about access during NMI.
160 */
161#define can_bank2 true
162
163static inline unsigned char cmos_read_bank2(unsigned char addr)
164{
165 outb(addr, RTC_PORT(2));
166 return inb(RTC_PORT(3));
167}
168
169static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
170{
171 outb(addr, RTC_PORT(2));
172 outb(val, RTC_PORT(3));
173}
174
175#else
176
177#define can_bank2 false
178
179static inline unsigned char cmos_read_bank2(unsigned char addr)
180{
181 return 0;
182}
183
184static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
185{
186}
187
188#endif
189
190/*----------------------------------------------------------------*/
191
192static int cmos_read_time(struct device *dev, struct rtc_time *t)
193{
194 /*
195 * If pm_trace abused the RTC for storage, set the timespec to 0,
196 * which tells the caller that this RTC value is unusable.
197 */
198 if (!pm_trace_rtc_valid())
199 return -EIO;
200
201 /* REVISIT: if the clock has a "century" register, use
202 * that instead of the heuristic in mc146818_get_time().
203 * That'll make Y3K compatility (year > 2070) easy!
204 */
205 mc146818_get_time(t);
206 return 0;
207}
208
209static int cmos_set_time(struct device *dev, struct rtc_time *t)
210{
211 /* REVISIT: set the "century" register if available
212 *
213 * NOTE: this ignores the issue whereby updating the seconds
214 * takes effect exactly 500ms after we write the register.
215 * (Also queueing and other delays before we get this far.)
216 */
217 return mc146818_set_time(t);
218}
219
220static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
221{
222 struct cmos_rtc *cmos = dev_get_drvdata(dev);
223 unsigned char rtc_control;
224
225 if (!is_valid_irq(cmos->irq))
226 return -EIO;
227
228 /* Basic alarms only support hour, minute, and seconds fields.
229 * Some also support day and month, for alarms up to a year in
230 * the future.
231 */
232
233 spin_lock_irq(&rtc_lock);
234 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
235 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
236 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
237
238 if (cmos->day_alrm) {
239 /* ignore upper bits on readback per ACPI spec */
240 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
241 if (!t->time.tm_mday)
242 t->time.tm_mday = -1;
243
244 if (cmos->mon_alrm) {
245 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
246 if (!t->time.tm_mon)
247 t->time.tm_mon = -1;
248 }
249 }
250
251 rtc_control = CMOS_READ(RTC_CONTROL);
252 spin_unlock_irq(&rtc_lock);
253
254 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
255 if (((unsigned)t->time.tm_sec) < 0x60)
256 t->time.tm_sec = bcd2bin(t->time.tm_sec);
257 else
258 t->time.tm_sec = -1;
259 if (((unsigned)t->time.tm_min) < 0x60)
260 t->time.tm_min = bcd2bin(t->time.tm_min);
261 else
262 t->time.tm_min = -1;
263 if (((unsigned)t->time.tm_hour) < 0x24)
264 t->time.tm_hour = bcd2bin(t->time.tm_hour);
265 else
266 t->time.tm_hour = -1;
267
268 if (cmos->day_alrm) {
269 if (((unsigned)t->time.tm_mday) <= 0x31)
270 t->time.tm_mday = bcd2bin(t->time.tm_mday);
271 else
272 t->time.tm_mday = -1;
273
274 if (cmos->mon_alrm) {
275 if (((unsigned)t->time.tm_mon) <= 0x12)
276 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
277 else
278 t->time.tm_mon = -1;
279 }
280 }
281 }
282
283 t->enabled = !!(rtc_control & RTC_AIE);
284 t->pending = 0;
285
286 return 0;
287}
288
289static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
290{
291 unsigned char rtc_intr;
292
293 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
294 * allegedly some older rtcs need that to handle irqs properly
295 */
296 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
297
298 if (is_hpet_enabled())
299 return;
300
301 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
302 if (is_intr(rtc_intr))
303 rtc_update_irq(cmos->rtc, 1, rtc_intr);
304}
305
306static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
307{
308 unsigned char rtc_control;
309
310 /* flush any pending IRQ status, notably for update irqs,
311 * before we enable new IRQs
312 */
313 rtc_control = CMOS_READ(RTC_CONTROL);
314 cmos_checkintr(cmos, rtc_control);
315
316 rtc_control |= mask;
317 CMOS_WRITE(rtc_control, RTC_CONTROL);
318 hpet_set_rtc_irq_bit(mask);
319
320 cmos_checkintr(cmos, rtc_control);
321}
322
323static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
324{
325 unsigned char rtc_control;
326
327 rtc_control = CMOS_READ(RTC_CONTROL);
328 rtc_control &= ~mask;
329 CMOS_WRITE(rtc_control, RTC_CONTROL);
330 hpet_mask_rtc_irq_bit(mask);
331
332 cmos_checkintr(cmos, rtc_control);
333}
334
335static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
336{
337 struct cmos_rtc *cmos = dev_get_drvdata(dev);
338 struct rtc_time now;
339
340 cmos_read_time(dev, &now);
341
342 if (!cmos->day_alrm) {
343 time64_t t_max_date;
344 time64_t t_alrm;
345
346 t_max_date = rtc_tm_to_time64(&now);
347 t_max_date += 24 * 60 * 60 - 1;
348 t_alrm = rtc_tm_to_time64(&t->time);
349 if (t_alrm > t_max_date) {
350 dev_err(dev,
351 "Alarms can be up to one day in the future\n");
352 return -EINVAL;
353 }
354 } else if (!cmos->mon_alrm) {
355 struct rtc_time max_date = now;
356 time64_t t_max_date;
357 time64_t t_alrm;
358 int max_mday;
359
360 if (max_date.tm_mon == 11) {
361 max_date.tm_mon = 0;
362 max_date.tm_year += 1;
363 } else {
364 max_date.tm_mon += 1;
365 }
366 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
367 if (max_date.tm_mday > max_mday)
368 max_date.tm_mday = max_mday;
369
370 t_max_date = rtc_tm_to_time64(&max_date);
371 t_max_date -= 1;
372 t_alrm = rtc_tm_to_time64(&t->time);
373 if (t_alrm > t_max_date) {
374 dev_err(dev,
375 "Alarms can be up to one month in the future\n");
376 return -EINVAL;
377 }
378 } else {
379 struct rtc_time max_date = now;
380 time64_t t_max_date;
381 time64_t t_alrm;
382 int max_mday;
383
384 max_date.tm_year += 1;
385 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
386 if (max_date.tm_mday > max_mday)
387 max_date.tm_mday = max_mday;
388
389 t_max_date = rtc_tm_to_time64(&max_date);
390 t_max_date -= 1;
391 t_alrm = rtc_tm_to_time64(&t->time);
392 if (t_alrm > t_max_date) {
393 dev_err(dev,
394 "Alarms can be up to one year in the future\n");
395 return -EINVAL;
396 }
397 }
398
399 return 0;
400}
401
402static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
403{
404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
405 unsigned char mon, mday, hrs, min, sec, rtc_control;
406 int ret;
407
408 if (!is_valid_irq(cmos->irq))
409 return -EIO;
410
411 ret = cmos_validate_alarm(dev, t);
412 if (ret < 0)
413 return ret;
414
415 mon = t->time.tm_mon + 1;
416 mday = t->time.tm_mday;
417 hrs = t->time.tm_hour;
418 min = t->time.tm_min;
419 sec = t->time.tm_sec;
420
421 rtc_control = CMOS_READ(RTC_CONTROL);
422 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
423 /* Writing 0xff means "don't care" or "match all". */
424 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
425 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
426 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
427 min = (min < 60) ? bin2bcd(min) : 0xff;
428 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
429 }
430
431 spin_lock_irq(&rtc_lock);
432
433 /* next rtc irq must not be from previous alarm setting */
434 cmos_irq_disable(cmos, RTC_AIE);
435
436 /* update alarm */
437 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
438 CMOS_WRITE(min, RTC_MINUTES_ALARM);
439 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
440
441 /* the system may support an "enhanced" alarm */
442 if (cmos->day_alrm) {
443 CMOS_WRITE(mday, cmos->day_alrm);
444 if (cmos->mon_alrm)
445 CMOS_WRITE(mon, cmos->mon_alrm);
446 }
447
448 /* FIXME the HPET alarm glue currently ignores day_alrm
449 * and mon_alrm ...
450 */
451 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
452
453 if (t->enabled)
454 cmos_irq_enable(cmos, RTC_AIE);
455
456 spin_unlock_irq(&rtc_lock);
457
458 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
459
460 return 0;
461}
462
463static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
464{
465 struct cmos_rtc *cmos = dev_get_drvdata(dev);
466 unsigned long flags;
467
468 if (!is_valid_irq(cmos->irq))
469 return -EINVAL;
470
471 spin_lock_irqsave(&rtc_lock, flags);
472
473 if (enabled)
474 cmos_irq_enable(cmos, RTC_AIE);
475 else
476 cmos_irq_disable(cmos, RTC_AIE);
477
478 spin_unlock_irqrestore(&rtc_lock, flags);
479 return 0;
480}
481
482#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
483
484static int cmos_procfs(struct device *dev, struct seq_file *seq)
485{
486 struct cmos_rtc *cmos = dev_get_drvdata(dev);
487 unsigned char rtc_control, valid;
488
489 spin_lock_irq(&rtc_lock);
490 rtc_control = CMOS_READ(RTC_CONTROL);
491 valid = CMOS_READ(RTC_VALID);
492 spin_unlock_irq(&rtc_lock);
493
494 /* NOTE: at least ICH6 reports battery status using a different
495 * (non-RTC) bit; and SQWE is ignored on many current systems.
496 */
497 seq_printf(seq,
498 "periodic_IRQ\t: %s\n"
499 "update_IRQ\t: %s\n"
500 "HPET_emulated\t: %s\n"
501 // "square_wave\t: %s\n"
502 "BCD\t\t: %s\n"
503 "DST_enable\t: %s\n"
504 "periodic_freq\t: %d\n"
505 "batt_status\t: %s\n",
506 (rtc_control & RTC_PIE) ? "yes" : "no",
507 (rtc_control & RTC_UIE) ? "yes" : "no",
508 is_hpet_enabled() ? "yes" : "no",
509 // (rtc_control & RTC_SQWE) ? "yes" : "no",
510 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
511 (rtc_control & RTC_DST_EN) ? "yes" : "no",
512 cmos->rtc->irq_freq,
513 (valid & RTC_VRT) ? "okay" : "dead");
514
515 return 0;
516}
517
518#else
519#define cmos_procfs NULL
520#endif
521
522static const struct rtc_class_ops cmos_rtc_ops = {
523 .read_time = cmos_read_time,
524 .set_time = cmos_set_time,
525 .read_alarm = cmos_read_alarm,
526 .set_alarm = cmos_set_alarm,
527 .proc = cmos_procfs,
528 .alarm_irq_enable = cmos_alarm_irq_enable,
529};
530
531/*----------------------------------------------------------------*/
532
533/*
534 * All these chips have at least 64 bytes of address space, shared by
535 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
536 * by boot firmware. Modern chips have 128 or 256 bytes.
537 */
538
539#define NVRAM_OFFSET (RTC_REG_D + 1)
540
541static ssize_t
542cmos_nvram_read(struct file *filp, struct kobject *kobj,
543 struct bin_attribute *attr,
544 char *buf, loff_t off, size_t count)
545{
546 int retval;
547
548 off += NVRAM_OFFSET;
549 spin_lock_irq(&rtc_lock);
550 for (retval = 0; count; count--, off++, retval++) {
551 if (off < 128)
552 *buf++ = CMOS_READ(off);
553 else if (can_bank2)
554 *buf++ = cmos_read_bank2(off);
555 else
556 break;
557 }
558 spin_unlock_irq(&rtc_lock);
559
560 return retval;
561}
562
563static ssize_t
564cmos_nvram_write(struct file *filp, struct kobject *kobj,
565 struct bin_attribute *attr,
566 char *buf, loff_t off, size_t count)
567{
568 struct cmos_rtc *cmos;
569 int retval;
570
571 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
572
573 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
574 * checksum on part of the NVRAM data. That's currently ignored
575 * here. If userspace is smart enough to know what fields of
576 * NVRAM to update, updating checksums is also part of its job.
577 */
578 off += NVRAM_OFFSET;
579 spin_lock_irq(&rtc_lock);
580 for (retval = 0; count; count--, off++, retval++) {
581 /* don't trash RTC registers */
582 if (off == cmos->day_alrm
583 || off == cmos->mon_alrm
584 || off == cmos->century)
585 buf++;
586 else if (off < 128)
587 CMOS_WRITE(*buf++, off);
588 else if (can_bank2)
589 cmos_write_bank2(*buf++, off);
590 else
591 break;
592 }
593 spin_unlock_irq(&rtc_lock);
594
595 return retval;
596}
597
598static struct bin_attribute nvram = {
599 .attr = {
600 .name = "nvram",
601 .mode = S_IRUGO | S_IWUSR,
602 },
603
604 .read = cmos_nvram_read,
605 .write = cmos_nvram_write,
606 /* size gets set up later */
607};
608
609/*----------------------------------------------------------------*/
610
611static struct cmos_rtc cmos_rtc;
612
613static irqreturn_t cmos_interrupt(int irq, void *p)
614{
615 u8 irqstat;
616 u8 rtc_control;
617
618 spin_lock(&rtc_lock);
619
620 /* When the HPET interrupt handler calls us, the interrupt
621 * status is passed as arg1 instead of the irq number. But
622 * always clear irq status, even when HPET is in the way.
623 *
624 * Note that HPET and RTC are almost certainly out of phase,
625 * giving different IRQ status ...
626 */
627 irqstat = CMOS_READ(RTC_INTR_FLAGS);
628 rtc_control = CMOS_READ(RTC_CONTROL);
629 if (is_hpet_enabled())
630 irqstat = (unsigned long)irq & 0xF0;
631
632 /* If we were suspended, RTC_CONTROL may not be accurate since the
633 * bios may have cleared it.
634 */
635 if (!cmos_rtc.suspend_ctrl)
636 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
637 else
638 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
639
640 /* All Linux RTC alarms should be treated as if they were oneshot.
641 * Similar code may be needed in system wakeup paths, in case the
642 * alarm woke the system.
643 */
644 if (irqstat & RTC_AIE) {
645 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
646 rtc_control &= ~RTC_AIE;
647 CMOS_WRITE(rtc_control, RTC_CONTROL);
648 hpet_mask_rtc_irq_bit(RTC_AIE);
649 CMOS_READ(RTC_INTR_FLAGS);
650 }
651 spin_unlock(&rtc_lock);
652
653 if (is_intr(irqstat)) {
654 rtc_update_irq(p, 1, irqstat);
655 return IRQ_HANDLED;
656 } else
657 return IRQ_NONE;
658}
659
660#ifdef CONFIG_PNP
661#define INITSECTION
662
663#else
664#define INITSECTION __init
665#endif
666
667static int INITSECTION
668cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
669{
670 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
671 int retval = 0;
672 unsigned char rtc_control;
673 unsigned address_space;
674 u32 flags = 0;
675
676 /* there can be only one ... */
677 if (cmos_rtc.dev)
678 return -EBUSY;
679
680 if (!ports)
681 return -ENODEV;
682
683 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
684 *
685 * REVISIT non-x86 systems may instead use memory space resources
686 * (needing ioremap etc), not i/o space resources like this ...
687 */
688 if (RTC_IOMAPPED)
689 ports = request_region(ports->start, resource_size(ports),
690 driver_name);
691 else
692 ports = request_mem_region(ports->start, resource_size(ports),
693 driver_name);
694 if (!ports) {
695 dev_dbg(dev, "i/o registers already in use\n");
696 return -EBUSY;
697 }
698
699 cmos_rtc.irq = rtc_irq;
700 cmos_rtc.iomem = ports;
701
702 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
703 * driver did, but don't reject unknown configs. Old hardware
704 * won't address 128 bytes. Newer chips have multiple banks,
705 * though they may not be listed in one I/O resource.
706 */
707#if defined(CONFIG_ATARI)
708 address_space = 64;
709#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
710 || defined(__sparc__) || defined(__mips__) \
711 || defined(__powerpc__) || defined(CONFIG_MN10300)
712 address_space = 128;
713#else
714#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
715 address_space = 128;
716#endif
717 if (can_bank2 && ports->end > (ports->start + 1))
718 address_space = 256;
719
720 /* For ACPI systems extension info comes from the FADT. On others,
721 * board specific setup provides it as appropriate. Systems where
722 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
723 * some almost-clones) can provide hooks to make that behave.
724 *
725 * Note that ACPI doesn't preclude putting these registers into
726 * "extended" areas of the chip, including some that we won't yet
727 * expect CMOS_READ and friends to handle.
728 */
729 if (info) {
730 if (info->flags)
731 flags = info->flags;
732 if (info->address_space)
733 address_space = info->address_space;
734
735 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
736 cmos_rtc.day_alrm = info->rtc_day_alarm;
737 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
738 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
739 if (info->rtc_century && info->rtc_century < 128)
740 cmos_rtc.century = info->rtc_century;
741
742 if (info->wake_on && info->wake_off) {
743 cmos_rtc.wake_on = info->wake_on;
744 cmos_rtc.wake_off = info->wake_off;
745 }
746 }
747
748 cmos_rtc.dev = dev;
749 dev_set_drvdata(dev, &cmos_rtc);
750
751 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
752 &cmos_rtc_ops, THIS_MODULE);
753 if (IS_ERR(cmos_rtc.rtc)) {
754 retval = PTR_ERR(cmos_rtc.rtc);
755 goto cleanup0;
756 }
757
758 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
759
760 spin_lock_irq(&rtc_lock);
761
762 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
763 /* force periodic irq to CMOS reset default of 1024Hz;
764 *
765 * REVISIT it's been reported that at least one x86_64 ALI
766 * mobo doesn't use 32KHz here ... for portability we might
767 * need to do something about other clock frequencies.
768 */
769 cmos_rtc.rtc->irq_freq = 1024;
770 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
771 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
772 }
773
774 /* disable irqs */
775 if (is_valid_irq(rtc_irq))
776 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
777
778 rtc_control = CMOS_READ(RTC_CONTROL);
779
780 spin_unlock_irq(&rtc_lock);
781
782 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
783 dev_warn(dev, "only 24-hr supported\n");
784 retval = -ENXIO;
785 goto cleanup1;
786 }
787
788 hpet_rtc_timer_init();
789
790 if (is_valid_irq(rtc_irq)) {
791 irq_handler_t rtc_cmos_int_handler;
792
793 if (is_hpet_enabled()) {
794 rtc_cmos_int_handler = hpet_rtc_interrupt;
795 retval = hpet_register_irq_handler(cmos_interrupt);
796 if (retval) {
797 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
798 dev_warn(dev, "hpet_register_irq_handler "
799 " failed in rtc_init().");
800 goto cleanup1;
801 }
802 } else
803 rtc_cmos_int_handler = cmos_interrupt;
804
805 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
806 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
807 cmos_rtc.rtc);
808 if (retval < 0) {
809 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
810 goto cleanup1;
811 }
812 }
813
814 /* export at least the first block of NVRAM */
815 nvram.size = address_space - NVRAM_OFFSET;
816 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
817 if (retval < 0) {
818 dev_dbg(dev, "can't create nvram file? %d\n", retval);
819 goto cleanup2;
820 }
821
822 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
823 !is_valid_irq(rtc_irq) ? "no alarms" :
824 cmos_rtc.mon_alrm ? "alarms up to one year" :
825 cmos_rtc.day_alrm ? "alarms up to one month" :
826 "alarms up to one day",
827 cmos_rtc.century ? ", y3k" : "",
828 nvram.size,
829 is_hpet_enabled() ? ", hpet irqs" : "");
830
831 return 0;
832
833cleanup2:
834 if (is_valid_irq(rtc_irq))
835 free_irq(rtc_irq, cmos_rtc.rtc);
836cleanup1:
837 cmos_rtc.dev = NULL;
838 rtc_device_unregister(cmos_rtc.rtc);
839cleanup0:
840 if (RTC_IOMAPPED)
841 release_region(ports->start, resource_size(ports));
842 else
843 release_mem_region(ports->start, resource_size(ports));
844 return retval;
845}
846
847static void cmos_do_shutdown(int rtc_irq)
848{
849 spin_lock_irq(&rtc_lock);
850 if (is_valid_irq(rtc_irq))
851 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
852 spin_unlock_irq(&rtc_lock);
853}
854
855static void cmos_do_remove(struct device *dev)
856{
857 struct cmos_rtc *cmos = dev_get_drvdata(dev);
858 struct resource *ports;
859
860 cmos_do_shutdown(cmos->irq);
861
862 sysfs_remove_bin_file(&dev->kobj, &nvram);
863
864 if (is_valid_irq(cmos->irq)) {
865 free_irq(cmos->irq, cmos->rtc);
866 hpet_unregister_irq_handler(cmos_interrupt);
867 }
868
869 rtc_device_unregister(cmos->rtc);
870 cmos->rtc = NULL;
871
872 ports = cmos->iomem;
873 if (RTC_IOMAPPED)
874 release_region(ports->start, resource_size(ports));
875 else
876 release_mem_region(ports->start, resource_size(ports));
877 cmos->iomem = NULL;
878
879 cmos->dev = NULL;
880}
881
882static int cmos_aie_poweroff(struct device *dev)
883{
884 struct cmos_rtc *cmos = dev_get_drvdata(dev);
885 struct rtc_time now;
886 time64_t t_now;
887 int retval = 0;
888 unsigned char rtc_control;
889
890 if (!cmos->alarm_expires)
891 return -EINVAL;
892
893 spin_lock_irq(&rtc_lock);
894 rtc_control = CMOS_READ(RTC_CONTROL);
895 spin_unlock_irq(&rtc_lock);
896
897 /* We only care about the situation where AIE is disabled. */
898 if (rtc_control & RTC_AIE)
899 return -EBUSY;
900
901 cmos_read_time(dev, &now);
902 t_now = rtc_tm_to_time64(&now);
903
904 /*
905 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
906 * automatically right after shutdown on some buggy boxes.
907 * This automatic rebooting issue won't happen when the alarm
908 * time is larger than now+1 seconds.
909 *
910 * If the alarm time is equal to now+1 seconds, the issue can be
911 * prevented by cancelling the alarm.
912 */
913 if (cmos->alarm_expires == t_now + 1) {
914 struct rtc_wkalrm alarm;
915
916 /* Cancel the AIE timer by configuring the past time. */
917 rtc_time64_to_tm(t_now - 1, &alarm.time);
918 alarm.enabled = 0;
919 retval = cmos_set_alarm(dev, &alarm);
920 } else if (cmos->alarm_expires > t_now + 1) {
921 retval = -EBUSY;
922 }
923
924 return retval;
925}
926
927static int cmos_suspend(struct device *dev)
928{
929 struct cmos_rtc *cmos = dev_get_drvdata(dev);
930 unsigned char tmp;
931
932 /* only the alarm might be a wakeup event source */
933 spin_lock_irq(&rtc_lock);
934 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
935 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
936 unsigned char mask;
937
938 if (device_may_wakeup(dev))
939 mask = RTC_IRQMASK & ~RTC_AIE;
940 else
941 mask = RTC_IRQMASK;
942 tmp &= ~mask;
943 CMOS_WRITE(tmp, RTC_CONTROL);
944 hpet_mask_rtc_irq_bit(mask);
945
946 cmos_checkintr(cmos, tmp);
947 }
948 spin_unlock_irq(&rtc_lock);
949
950 if (tmp & RTC_AIE) {
951 cmos->enabled_wake = 1;
952 if (cmos->wake_on)
953 cmos->wake_on(dev);
954 else
955 enable_irq_wake(cmos->irq);
956 }
957
958 cmos_read_alarm(dev, &cmos->saved_wkalrm);
959
960 dev_dbg(dev, "suspend%s, ctrl %02x\n",
961 (tmp & RTC_AIE) ? ", alarm may wake" : "",
962 tmp);
963
964 return 0;
965}
966
967/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
968 * after a detour through G3 "mechanical off", although the ACPI spec
969 * says wakeup should only work from G1/S4 "hibernate". To most users,
970 * distinctions between S4 and S5 are pointless. So when the hardware
971 * allows, don't draw that distinction.
972 */
973static inline int cmos_poweroff(struct device *dev)
974{
975 if (!IS_ENABLED(CONFIG_PM))
976 return -ENOSYS;
977
978 return cmos_suspend(dev);
979}
980
981static void cmos_check_wkalrm(struct device *dev)
982{
983 struct cmos_rtc *cmos = dev_get_drvdata(dev);
984 struct rtc_wkalrm current_alarm;
985 time64_t t_current_expires;
986 time64_t t_saved_expires;
987
988 cmos_read_alarm(dev, ¤t_alarm);
989 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
990 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
991 if (t_current_expires != t_saved_expires ||
992 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
993 cmos_set_alarm(dev, &cmos->saved_wkalrm);
994 }
995}
996
997static void cmos_check_acpi_rtc_status(struct device *dev,
998 unsigned char *rtc_control);
999
1000static int __maybe_unused cmos_resume(struct device *dev)
1001{
1002 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1003 unsigned char tmp;
1004
1005 if (cmos->enabled_wake) {
1006 if (cmos->wake_off)
1007 cmos->wake_off(dev);
1008 else
1009 disable_irq_wake(cmos->irq);
1010 cmos->enabled_wake = 0;
1011 }
1012
1013 /* The BIOS might have changed the alarm, restore it */
1014 cmos_check_wkalrm(dev);
1015
1016 spin_lock_irq(&rtc_lock);
1017 tmp = cmos->suspend_ctrl;
1018 cmos->suspend_ctrl = 0;
1019 /* re-enable any irqs previously active */
1020 if (tmp & RTC_IRQMASK) {
1021 unsigned char mask;
1022
1023 if (device_may_wakeup(dev))
1024 hpet_rtc_timer_init();
1025
1026 do {
1027 CMOS_WRITE(tmp, RTC_CONTROL);
1028 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1029
1030 mask = CMOS_READ(RTC_INTR_FLAGS);
1031 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1032 if (!is_hpet_enabled() || !is_intr(mask))
1033 break;
1034
1035 /* force one-shot behavior if HPET blocked
1036 * the wake alarm's irq
1037 */
1038 rtc_update_irq(cmos->rtc, 1, mask);
1039 tmp &= ~RTC_AIE;
1040 hpet_mask_rtc_irq_bit(RTC_AIE);
1041 } while (mask & RTC_AIE);
1042
1043 if (tmp & RTC_AIE)
1044 cmos_check_acpi_rtc_status(dev, &tmp);
1045 }
1046 spin_unlock_irq(&rtc_lock);
1047
1048 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1049
1050 return 0;
1051}
1052
1053static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1054
1055/*----------------------------------------------------------------*/
1056
1057/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1058 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1059 * probably list them in similar PNPBIOS tables; so PNP is more common.
1060 *
1061 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1062 * predate even PNPBIOS should set up platform_bus devices.
1063 */
1064
1065#ifdef CONFIG_ACPI
1066
1067#include <linux/acpi.h>
1068
1069static u32 rtc_handler(void *context)
1070{
1071 struct device *dev = context;
1072 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1073 unsigned char rtc_control = 0;
1074 unsigned char rtc_intr;
1075 unsigned long flags;
1076
1077 spin_lock_irqsave(&rtc_lock, flags);
1078 if (cmos_rtc.suspend_ctrl)
1079 rtc_control = CMOS_READ(RTC_CONTROL);
1080 if (rtc_control & RTC_AIE) {
1081 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1082 CMOS_WRITE(rtc_control, RTC_CONTROL);
1083 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1084 rtc_update_irq(cmos->rtc, 1, rtc_intr);
1085 }
1086 spin_unlock_irqrestore(&rtc_lock, flags);
1087
1088 pm_wakeup_event(dev, 0);
1089 acpi_clear_event(ACPI_EVENT_RTC);
1090 acpi_disable_event(ACPI_EVENT_RTC, 0);
1091 return ACPI_INTERRUPT_HANDLED;
1092}
1093
1094static inline void rtc_wake_setup(struct device *dev)
1095{
1096 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1097 /*
1098 * After the RTC handler is installed, the Fixed_RTC event should
1099 * be disabled. Only when the RTC alarm is set will it be enabled.
1100 */
1101 acpi_clear_event(ACPI_EVENT_RTC);
1102 acpi_disable_event(ACPI_EVENT_RTC, 0);
1103}
1104
1105static void rtc_wake_on(struct device *dev)
1106{
1107 acpi_clear_event(ACPI_EVENT_RTC);
1108 acpi_enable_event(ACPI_EVENT_RTC, 0);
1109}
1110
1111static void rtc_wake_off(struct device *dev)
1112{
1113 acpi_disable_event(ACPI_EVENT_RTC, 0);
1114}
1115
1116/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1117 * its device node and pass extra config data. This helps its driver use
1118 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1119 * that this board's RTC is wakeup-capable (per ACPI spec).
1120 */
1121static struct cmos_rtc_board_info acpi_rtc_info;
1122
1123static void cmos_wake_setup(struct device *dev)
1124{
1125 if (acpi_disabled)
1126 return;
1127
1128 rtc_wake_setup(dev);
1129 acpi_rtc_info.wake_on = rtc_wake_on;
1130 acpi_rtc_info.wake_off = rtc_wake_off;
1131
1132 /* workaround bug in some ACPI tables */
1133 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1134 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1135 acpi_gbl_FADT.month_alarm);
1136 acpi_gbl_FADT.month_alarm = 0;
1137 }
1138
1139 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1140 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1141 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1142
1143 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1144 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1145 dev_info(dev, "RTC can wake from S4\n");
1146
1147 dev->platform_data = &acpi_rtc_info;
1148
1149 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1150 device_init_wakeup(dev, 1);
1151}
1152
1153static void cmos_check_acpi_rtc_status(struct device *dev,
1154 unsigned char *rtc_control)
1155{
1156 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1157 acpi_event_status rtc_status;
1158 acpi_status status;
1159
1160 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1161 return;
1162
1163 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1164 if (ACPI_FAILURE(status)) {
1165 dev_err(dev, "Could not get RTC status\n");
1166 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1167 unsigned char mask;
1168 *rtc_control &= ~RTC_AIE;
1169 CMOS_WRITE(*rtc_control, RTC_CONTROL);
1170 mask = CMOS_READ(RTC_INTR_FLAGS);
1171 rtc_update_irq(cmos->rtc, 1, mask);
1172 }
1173}
1174
1175#else
1176
1177static void cmos_wake_setup(struct device *dev)
1178{
1179}
1180
1181static void cmos_check_acpi_rtc_status(struct device *dev,
1182 unsigned char *rtc_control)
1183{
1184}
1185
1186#endif
1187
1188#ifdef CONFIG_PNP
1189
1190#include <linux/pnp.h>
1191
1192static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1193{
1194 cmos_wake_setup(&pnp->dev);
1195
1196 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1197 /* Some machines contain a PNP entry for the RTC, but
1198 * don't define the IRQ. It should always be safe to
1199 * hardcode it in these cases
1200 */
1201 return cmos_do_probe(&pnp->dev,
1202 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1203 else
1204 return cmos_do_probe(&pnp->dev,
1205 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1206 pnp_irq(pnp, 0));
1207}
1208
1209static void cmos_pnp_remove(struct pnp_dev *pnp)
1210{
1211 cmos_do_remove(&pnp->dev);
1212}
1213
1214static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1215{
1216 struct device *dev = &pnp->dev;
1217 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1218
1219 if (system_state == SYSTEM_POWER_OFF) {
1220 int retval = cmos_poweroff(dev);
1221
1222 if (cmos_aie_poweroff(dev) < 0 && !retval)
1223 return;
1224 }
1225
1226 cmos_do_shutdown(cmos->irq);
1227}
1228
1229static const struct pnp_device_id rtc_ids[] = {
1230 { .id = "PNP0b00", },
1231 { .id = "PNP0b01", },
1232 { .id = "PNP0b02", },
1233 { },
1234};
1235MODULE_DEVICE_TABLE(pnp, rtc_ids);
1236
1237static struct pnp_driver cmos_pnp_driver = {
1238 .name = (char *) driver_name,
1239 .id_table = rtc_ids,
1240 .probe = cmos_pnp_probe,
1241 .remove = cmos_pnp_remove,
1242 .shutdown = cmos_pnp_shutdown,
1243
1244 /* flag ensures resume() gets called, and stops syslog spam */
1245 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1246 .driver = {
1247 .pm = &cmos_pm_ops,
1248 },
1249};
1250
1251#endif /* CONFIG_PNP */
1252
1253#ifdef CONFIG_OF
1254static const struct of_device_id of_cmos_match[] = {
1255 {
1256 .compatible = "motorola,mc146818",
1257 },
1258 { },
1259};
1260MODULE_DEVICE_TABLE(of, of_cmos_match);
1261
1262static __init void cmos_of_init(struct platform_device *pdev)
1263{
1264 struct device_node *node = pdev->dev.of_node;
1265 struct rtc_time time;
1266 int ret;
1267 const __be32 *val;
1268
1269 if (!node)
1270 return;
1271
1272 val = of_get_property(node, "ctrl-reg", NULL);
1273 if (val)
1274 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1275
1276 val = of_get_property(node, "freq-reg", NULL);
1277 if (val)
1278 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1279
1280 cmos_read_time(&pdev->dev, &time);
1281 ret = rtc_valid_tm(&time);
1282 if (ret) {
1283 struct rtc_time def_time = {
1284 .tm_year = 1,
1285 .tm_mday = 1,
1286 };
1287 cmos_set_time(&pdev->dev, &def_time);
1288 }
1289}
1290#else
1291static inline void cmos_of_init(struct platform_device *pdev) {}
1292#endif
1293/*----------------------------------------------------------------*/
1294
1295/* Platform setup should have set up an RTC device, when PNP is
1296 * unavailable ... this could happen even on (older) PCs.
1297 */
1298
1299static int __init cmos_platform_probe(struct platform_device *pdev)
1300{
1301 struct resource *resource;
1302 int irq;
1303
1304 cmos_of_init(pdev);
1305 cmos_wake_setup(&pdev->dev);
1306
1307 if (RTC_IOMAPPED)
1308 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1309 else
1310 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1311 irq = platform_get_irq(pdev, 0);
1312 if (irq < 0)
1313 irq = -1;
1314
1315 return cmos_do_probe(&pdev->dev, resource, irq);
1316}
1317
1318static int cmos_platform_remove(struct platform_device *pdev)
1319{
1320 cmos_do_remove(&pdev->dev);
1321 return 0;
1322}
1323
1324static void cmos_platform_shutdown(struct platform_device *pdev)
1325{
1326 struct device *dev = &pdev->dev;
1327 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1328
1329 if (system_state == SYSTEM_POWER_OFF) {
1330 int retval = cmos_poweroff(dev);
1331
1332 if (cmos_aie_poweroff(dev) < 0 && !retval)
1333 return;
1334 }
1335
1336 cmos_do_shutdown(cmos->irq);
1337}
1338
1339/* work with hotplug and coldplug */
1340MODULE_ALIAS("platform:rtc_cmos");
1341
1342static struct platform_driver cmos_platform_driver = {
1343 .remove = cmos_platform_remove,
1344 .shutdown = cmos_platform_shutdown,
1345 .driver = {
1346 .name = driver_name,
1347 .pm = &cmos_pm_ops,
1348 .of_match_table = of_match_ptr(of_cmos_match),
1349 }
1350};
1351
1352#ifdef CONFIG_PNP
1353static bool pnp_driver_registered;
1354#endif
1355static bool platform_driver_registered;
1356
1357static int __init cmos_init(void)
1358{
1359 int retval = 0;
1360
1361#ifdef CONFIG_PNP
1362 retval = pnp_register_driver(&cmos_pnp_driver);
1363 if (retval == 0)
1364 pnp_driver_registered = true;
1365#endif
1366
1367 if (!cmos_rtc.dev) {
1368 retval = platform_driver_probe(&cmos_platform_driver,
1369 cmos_platform_probe);
1370 if (retval == 0)
1371 platform_driver_registered = true;
1372 }
1373
1374 if (retval == 0)
1375 return 0;
1376
1377#ifdef CONFIG_PNP
1378 if (pnp_driver_registered)
1379 pnp_unregister_driver(&cmos_pnp_driver);
1380#endif
1381 return retval;
1382}
1383module_init(cmos_init);
1384
1385static void __exit cmos_exit(void)
1386{
1387#ifdef CONFIG_PNP
1388 if (pnp_driver_registered)
1389 pnp_unregister_driver(&cmos_pnp_driver);
1390#endif
1391 if (platform_driver_registered)
1392 platform_driver_unregister(&cmos_platform_driver);
1393}
1394module_exit(cmos_exit);
1395
1396
1397MODULE_AUTHOR("David Brownell");
1398MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1399MODULE_LICENSE("GPL");