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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 *
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
7 */
8
9/*
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
16 *
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
22 *
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/spinlock.h>
35#include <linux/platform_device.h>
36#include <linux/log2.h>
37#include <linux/pm.h>
38#include <linux/of.h>
39#include <linux/of_platform.h>
40#ifdef CONFIG_X86
41#include <asm/i8259.h>
42#include <asm/processor.h>
43#include <linux/dmi.h>
44#endif
45
46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47#include <linux/mc146818rtc.h>
48
49#ifdef CONFIG_ACPI
50/*
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 *
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
54 *
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 */
57
58static bool use_acpi_alarm;
59module_param(use_acpi_alarm, bool, 0444);
60
61static inline int cmos_use_acpi_alarm(void)
62{
63 return use_acpi_alarm;
64}
65#else /* !CONFIG_ACPI */
66
67static inline int cmos_use_acpi_alarm(void)
68{
69 return 0;
70}
71#endif
72
73struct cmos_rtc {
74 struct rtc_device *rtc;
75 struct device *dev;
76 int irq;
77 struct resource *iomem;
78 time64_t alarm_expires;
79
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
82
83 u8 enabled_wake;
84 u8 suspend_ctrl;
85
86 /* newer hardware extends the original register set */
87 u8 day_alrm;
88 u8 mon_alrm;
89 u8 century;
90
91 struct rtc_wkalrm saved_wkalrm;
92};
93
94/* both platform and pnp busses use negative numbers for invalid irqs */
95#define is_valid_irq(n) ((n) > 0)
96
97static const char driver_name[] = "rtc_cmos";
98
99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 */
103#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104
105static inline int is_intr(u8 rtc_intr)
106{
107 if (!(rtc_intr & RTC_IRQF))
108 return 0;
109 return rtc_intr & RTC_IRQMASK;
110}
111
112/*----------------------------------------------------------------*/
113
114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
119 *
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
123 */
124#ifdef CONFIG_HPET_EMULATE_RTC
125#include <asm/hpet.h>
126#else
127
128static inline int is_hpet_enabled(void)
129{
130 return 0;
131}
132
133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134{
135 return 0;
136}
137
138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139{
140 return 0;
141}
142
143static inline int
144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145{
146 return 0;
147}
148
149static inline int hpet_set_periodic_freq(unsigned long freq)
150{
151 return 0;
152}
153
154static inline int hpet_rtc_dropped_irq(void)
155{
156 return 0;
157}
158
159static inline int hpet_rtc_timer_init(void)
160{
161 return 0;
162}
163
164extern irq_handler_t hpet_rtc_interrupt;
165
166static inline int hpet_register_irq_handler(irq_handler_t handler)
167{
168 return 0;
169}
170
171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172{
173 return 0;
174}
175
176#endif
177
178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179static inline int use_hpet_alarm(void)
180{
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
182}
183
184/*----------------------------------------------------------------*/
185
186#ifdef RTC_PORT
187
188/* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
191 */
192#define can_bank2 true
193
194static inline unsigned char cmos_read_bank2(unsigned char addr)
195{
196 outb(addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
198}
199
200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201{
202 outb(addr, RTC_PORT(2));
203 outb(val, RTC_PORT(3));
204}
205
206#else
207
208#define can_bank2 false
209
210static inline unsigned char cmos_read_bank2(unsigned char addr)
211{
212 return 0;
213}
214
215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216{
217}
218
219#endif
220
221/*----------------------------------------------------------------*/
222
223static int cmos_read_time(struct device *dev, struct rtc_time *t)
224{
225 int ret;
226
227 /*
228 * If pm_trace abused the RTC for storage, set the timespec to 0,
229 * which tells the caller that this RTC value is unusable.
230 */
231 if (!pm_trace_rtc_valid())
232 return -EIO;
233
234 ret = mc146818_get_time(t);
235 if (ret < 0) {
236 dev_err_ratelimited(dev, "unable to read current time\n");
237 return ret;
238 }
239
240 return 0;
241}
242
243static int cmos_set_time(struct device *dev, struct rtc_time *t)
244{
245 /* NOTE: this ignores the issue whereby updating the seconds
246 * takes effect exactly 500ms after we write the register.
247 * (Also queueing and other delays before we get this far.)
248 */
249 return mc146818_set_time(t);
250}
251
252struct cmos_read_alarm_callback_param {
253 struct cmos_rtc *cmos;
254 struct rtc_time *time;
255 unsigned char rtc_control;
256};
257
258static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
259 void *param_in)
260{
261 struct cmos_read_alarm_callback_param *p =
262 (struct cmos_read_alarm_callback_param *)param_in;
263 struct rtc_time *time = p->time;
264
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
268
269 if (p->cmos->day_alrm) {
270 /* ignore upper bits on readback per ACPI spec */
271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
272 if (!time->tm_mday)
273 time->tm_mday = -1;
274
275 if (p->cmos->mon_alrm) {
276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
277 if (!time->tm_mon)
278 time->tm_mon = -1;
279 }
280 }
281
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
283}
284
285static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286{
287 struct cmos_rtc *cmos = dev_get_drvdata(dev);
288 struct cmos_read_alarm_callback_param p = {
289 .cmos = cmos,
290 .time = &t->time,
291 };
292
293 /* This not only a rtc_op, but also called directly */
294 if (!is_valid_irq(cmos->irq))
295 return -EIO;
296
297 /* Basic alarms only support hour, minute, and seconds fields.
298 * Some also support day and month, for alarms up to a year in
299 * the future.
300 */
301
302 /* Some Intel chipsets disconnect the alarm registers when the clock
303 * update is in progress - during this time reads return bogus values
304 * and writes may fail silently. See for example "7th Generation Intel®
305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
306 * 27.7.1
307 *
308 * Use the mc146818_avoid_UIP() function to avoid this.
309 */
310 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, &p))
311 return -EIO;
312
313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314 if (((unsigned)t->time.tm_sec) < 0x60)
315 t->time.tm_sec = bcd2bin(t->time.tm_sec);
316 else
317 t->time.tm_sec = -1;
318 if (((unsigned)t->time.tm_min) < 0x60)
319 t->time.tm_min = bcd2bin(t->time.tm_min);
320 else
321 t->time.tm_min = -1;
322 if (((unsigned)t->time.tm_hour) < 0x24)
323 t->time.tm_hour = bcd2bin(t->time.tm_hour);
324 else
325 t->time.tm_hour = -1;
326
327 if (cmos->day_alrm) {
328 if (((unsigned)t->time.tm_mday) <= 0x31)
329 t->time.tm_mday = bcd2bin(t->time.tm_mday);
330 else
331 t->time.tm_mday = -1;
332
333 if (cmos->mon_alrm) {
334 if (((unsigned)t->time.tm_mon) <= 0x12)
335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
336 else
337 t->time.tm_mon = -1;
338 }
339 }
340 }
341
342 t->enabled = !!(p.rtc_control & RTC_AIE);
343 t->pending = 0;
344
345 return 0;
346}
347
348static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
349{
350 unsigned char rtc_intr;
351
352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353 * allegedly some older rtcs need that to handle irqs properly
354 */
355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
356
357 if (use_hpet_alarm())
358 return;
359
360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361 if (is_intr(rtc_intr))
362 rtc_update_irq(cmos->rtc, 1, rtc_intr);
363}
364
365static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
366{
367 unsigned char rtc_control;
368
369 /* flush any pending IRQ status, notably for update irqs,
370 * before we enable new IRQs
371 */
372 rtc_control = CMOS_READ(RTC_CONTROL);
373 cmos_checkintr(cmos, rtc_control);
374
375 rtc_control |= mask;
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
377 if (use_hpet_alarm())
378 hpet_set_rtc_irq_bit(mask);
379
380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
381 if (cmos->wake_on)
382 cmos->wake_on(cmos->dev);
383 }
384
385 cmos_checkintr(cmos, rtc_control);
386}
387
388static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
389{
390 unsigned char rtc_control;
391
392 rtc_control = CMOS_READ(RTC_CONTROL);
393 rtc_control &= ~mask;
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
395 if (use_hpet_alarm())
396 hpet_mask_rtc_irq_bit(mask);
397
398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
399 if (cmos->wake_off)
400 cmos->wake_off(cmos->dev);
401 }
402
403 cmos_checkintr(cmos, rtc_control);
404}
405
406static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
407{
408 struct cmos_rtc *cmos = dev_get_drvdata(dev);
409 struct rtc_time now;
410
411 cmos_read_time(dev, &now);
412
413 if (!cmos->day_alrm) {
414 time64_t t_max_date;
415 time64_t t_alrm;
416
417 t_max_date = rtc_tm_to_time64(&now);
418 t_max_date += 24 * 60 * 60 - 1;
419 t_alrm = rtc_tm_to_time64(&t->time);
420 if (t_alrm > t_max_date) {
421 dev_err(dev,
422 "Alarms can be up to one day in the future\n");
423 return -EINVAL;
424 }
425 } else if (!cmos->mon_alrm) {
426 struct rtc_time max_date = now;
427 time64_t t_max_date;
428 time64_t t_alrm;
429 int max_mday;
430
431 if (max_date.tm_mon == 11) {
432 max_date.tm_mon = 0;
433 max_date.tm_year += 1;
434 } else {
435 max_date.tm_mon += 1;
436 }
437 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
438 if (max_date.tm_mday > max_mday)
439 max_date.tm_mday = max_mday;
440
441 t_max_date = rtc_tm_to_time64(&max_date);
442 t_max_date -= 1;
443 t_alrm = rtc_tm_to_time64(&t->time);
444 if (t_alrm > t_max_date) {
445 dev_err(dev,
446 "Alarms can be up to one month in the future\n");
447 return -EINVAL;
448 }
449 } else {
450 struct rtc_time max_date = now;
451 time64_t t_max_date;
452 time64_t t_alrm;
453 int max_mday;
454
455 max_date.tm_year += 1;
456 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
457 if (max_date.tm_mday > max_mday)
458 max_date.tm_mday = max_mday;
459
460 t_max_date = rtc_tm_to_time64(&max_date);
461 t_max_date -= 1;
462 t_alrm = rtc_tm_to_time64(&t->time);
463 if (t_alrm > t_max_date) {
464 dev_err(dev,
465 "Alarms can be up to one year in the future\n");
466 return -EINVAL;
467 }
468 }
469
470 return 0;
471}
472
473struct cmos_set_alarm_callback_param {
474 struct cmos_rtc *cmos;
475 unsigned char mon, mday, hrs, min, sec;
476 struct rtc_wkalrm *t;
477};
478
479/* Note: this function may be executed by mc146818_avoid_UIP() more then
480 * once
481 */
482static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
483 void *param_in)
484{
485 struct cmos_set_alarm_callback_param *p =
486 (struct cmos_set_alarm_callback_param *)param_in;
487
488 /* next rtc irq must not be from previous alarm setting */
489 cmos_irq_disable(p->cmos, RTC_AIE);
490
491 /* update alarm */
492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
495
496 /* the system may support an "enhanced" alarm */
497 if (p->cmos->day_alrm) {
498 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499 if (p->cmos->mon_alrm)
500 CMOS_WRITE(p->mon, p->cmos->mon_alrm);
501 }
502
503 if (use_hpet_alarm()) {
504 /*
505 * FIXME the HPET alarm glue currently ignores day_alrm
506 * and mon_alrm ...
507 */
508 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
509 p->t->time.tm_sec);
510 }
511
512 if (p->t->enabled)
513 cmos_irq_enable(p->cmos, RTC_AIE);
514}
515
516static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
517{
518 struct cmos_rtc *cmos = dev_get_drvdata(dev);
519 struct cmos_set_alarm_callback_param p = {
520 .cmos = cmos,
521 .t = t
522 };
523 unsigned char rtc_control;
524 int ret;
525
526 /* This not only a rtc_op, but also called directly */
527 if (!is_valid_irq(cmos->irq))
528 return -EIO;
529
530 ret = cmos_validate_alarm(dev, t);
531 if (ret < 0)
532 return ret;
533
534 p.mon = t->time.tm_mon + 1;
535 p.mday = t->time.tm_mday;
536 p.hrs = t->time.tm_hour;
537 p.min = t->time.tm_min;
538 p.sec = t->time.tm_sec;
539
540 spin_lock_irq(&rtc_lock);
541 rtc_control = CMOS_READ(RTC_CONTROL);
542 spin_unlock_irq(&rtc_lock);
543
544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545 /* Writing 0xff means "don't care" or "match all". */
546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
551 }
552
553 /*
554 * Some Intel chipsets disconnect the alarm registers when the clock
555 * update is in progress - during this time writes fail silently.
556 *
557 * Use mc146818_avoid_UIP() to avoid this.
558 */
559 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, &p))
560 return -EIO;
561
562 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
563
564 return 0;
565}
566
567static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
568{
569 struct cmos_rtc *cmos = dev_get_drvdata(dev);
570 unsigned long flags;
571
572 spin_lock_irqsave(&rtc_lock, flags);
573
574 if (enabled)
575 cmos_irq_enable(cmos, RTC_AIE);
576 else
577 cmos_irq_disable(cmos, RTC_AIE);
578
579 spin_unlock_irqrestore(&rtc_lock, flags);
580 return 0;
581}
582
583#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
584
585static int cmos_procfs(struct device *dev, struct seq_file *seq)
586{
587 struct cmos_rtc *cmos = dev_get_drvdata(dev);
588 unsigned char rtc_control, valid;
589
590 spin_lock_irq(&rtc_lock);
591 rtc_control = CMOS_READ(RTC_CONTROL);
592 valid = CMOS_READ(RTC_VALID);
593 spin_unlock_irq(&rtc_lock);
594
595 /* NOTE: at least ICH6 reports battery status using a different
596 * (non-RTC) bit; and SQWE is ignored on many current systems.
597 */
598 seq_printf(seq,
599 "periodic_IRQ\t: %s\n"
600 "update_IRQ\t: %s\n"
601 "HPET_emulated\t: %s\n"
602 // "square_wave\t: %s\n"
603 "BCD\t\t: %s\n"
604 "DST_enable\t: %s\n"
605 "periodic_freq\t: %d\n"
606 "batt_status\t: %s\n",
607 (rtc_control & RTC_PIE) ? "yes" : "no",
608 (rtc_control & RTC_UIE) ? "yes" : "no",
609 use_hpet_alarm() ? "yes" : "no",
610 // (rtc_control & RTC_SQWE) ? "yes" : "no",
611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612 (rtc_control & RTC_DST_EN) ? "yes" : "no",
613 cmos->rtc->irq_freq,
614 (valid & RTC_VRT) ? "okay" : "dead");
615
616 return 0;
617}
618
619#else
620#define cmos_procfs NULL
621#endif
622
623static const struct rtc_class_ops cmos_rtc_ops = {
624 .read_time = cmos_read_time,
625 .set_time = cmos_set_time,
626 .read_alarm = cmos_read_alarm,
627 .set_alarm = cmos_set_alarm,
628 .proc = cmos_procfs,
629 .alarm_irq_enable = cmos_alarm_irq_enable,
630};
631
632/*----------------------------------------------------------------*/
633
634/*
635 * All these chips have at least 64 bytes of address space, shared by
636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
637 * by boot firmware. Modern chips have 128 or 256 bytes.
638 */
639
640#define NVRAM_OFFSET (RTC_REG_D + 1)
641
642static int cmos_nvram_read(void *priv, unsigned int off, void *val,
643 size_t count)
644{
645 unsigned char *buf = val;
646 int retval;
647
648 off += NVRAM_OFFSET;
649 spin_lock_irq(&rtc_lock);
650 for (retval = 0; count; count--, off++, retval++) {
651 if (off < 128)
652 *buf++ = CMOS_READ(off);
653 else if (can_bank2)
654 *buf++ = cmos_read_bank2(off);
655 else
656 break;
657 }
658 spin_unlock_irq(&rtc_lock);
659
660 return retval;
661}
662
663static int cmos_nvram_write(void *priv, unsigned int off, void *val,
664 size_t count)
665{
666 struct cmos_rtc *cmos = priv;
667 unsigned char *buf = val;
668 int retval;
669
670 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
671 * checksum on part of the NVRAM data. That's currently ignored
672 * here. If userspace is smart enough to know what fields of
673 * NVRAM to update, updating checksums is also part of its job.
674 */
675 off += NVRAM_OFFSET;
676 spin_lock_irq(&rtc_lock);
677 for (retval = 0; count; count--, off++, retval++) {
678 /* don't trash RTC registers */
679 if (off == cmos->day_alrm
680 || off == cmos->mon_alrm
681 || off == cmos->century)
682 buf++;
683 else if (off < 128)
684 CMOS_WRITE(*buf++, off);
685 else if (can_bank2)
686 cmos_write_bank2(*buf++, off);
687 else
688 break;
689 }
690 spin_unlock_irq(&rtc_lock);
691
692 return retval;
693}
694
695/*----------------------------------------------------------------*/
696
697static struct cmos_rtc cmos_rtc;
698
699static irqreturn_t cmos_interrupt(int irq, void *p)
700{
701 u8 irqstat;
702 u8 rtc_control;
703
704 spin_lock(&rtc_lock);
705
706 /* When the HPET interrupt handler calls us, the interrupt
707 * status is passed as arg1 instead of the irq number. But
708 * always clear irq status, even when HPET is in the way.
709 *
710 * Note that HPET and RTC are almost certainly out of phase,
711 * giving different IRQ status ...
712 */
713 irqstat = CMOS_READ(RTC_INTR_FLAGS);
714 rtc_control = CMOS_READ(RTC_CONTROL);
715 if (use_hpet_alarm())
716 irqstat = (unsigned long)irq & 0xF0;
717
718 /* If we were suspended, RTC_CONTROL may not be accurate since the
719 * bios may have cleared it.
720 */
721 if (!cmos_rtc.suspend_ctrl)
722 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
723 else
724 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
725
726 /* All Linux RTC alarms should be treated as if they were oneshot.
727 * Similar code may be needed in system wakeup paths, in case the
728 * alarm woke the system.
729 */
730 if (irqstat & RTC_AIE) {
731 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
732 rtc_control &= ~RTC_AIE;
733 CMOS_WRITE(rtc_control, RTC_CONTROL);
734 if (use_hpet_alarm())
735 hpet_mask_rtc_irq_bit(RTC_AIE);
736 CMOS_READ(RTC_INTR_FLAGS);
737 }
738 spin_unlock(&rtc_lock);
739
740 if (is_intr(irqstat)) {
741 rtc_update_irq(p, 1, irqstat);
742 return IRQ_HANDLED;
743 } else
744 return IRQ_NONE;
745}
746
747#ifdef CONFIG_ACPI
748
749#include <linux/acpi.h>
750
751static u32 rtc_handler(void *context)
752{
753 struct device *dev = context;
754 struct cmos_rtc *cmos = dev_get_drvdata(dev);
755 unsigned char rtc_control = 0;
756 unsigned char rtc_intr;
757 unsigned long flags;
758
759
760 /*
761 * Always update rtc irq when ACPI is used as RTC Alarm.
762 * Or else, ACPI SCI is enabled during suspend/resume only,
763 * update rtc irq in that case.
764 */
765 if (cmos_use_acpi_alarm())
766 cmos_interrupt(0, (void *)cmos->rtc);
767 else {
768 /* Fix me: can we use cmos_interrupt() here as well? */
769 spin_lock_irqsave(&rtc_lock, flags);
770 if (cmos_rtc.suspend_ctrl)
771 rtc_control = CMOS_READ(RTC_CONTROL);
772 if (rtc_control & RTC_AIE) {
773 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
774 CMOS_WRITE(rtc_control, RTC_CONTROL);
775 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
776 rtc_update_irq(cmos->rtc, 1, rtc_intr);
777 }
778 spin_unlock_irqrestore(&rtc_lock, flags);
779 }
780
781 pm_wakeup_hard_event(dev);
782 acpi_clear_event(ACPI_EVENT_RTC);
783 acpi_disable_event(ACPI_EVENT_RTC, 0);
784 return ACPI_INTERRUPT_HANDLED;
785}
786
787static void acpi_rtc_event_setup(struct device *dev)
788{
789 if (acpi_disabled)
790 return;
791
792 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
793 /*
794 * After the RTC handler is installed, the Fixed_RTC event should
795 * be disabled. Only when the RTC alarm is set will it be enabled.
796 */
797 acpi_clear_event(ACPI_EVENT_RTC);
798 acpi_disable_event(ACPI_EVENT_RTC, 0);
799}
800
801static void acpi_rtc_event_cleanup(void)
802{
803 if (acpi_disabled)
804 return;
805
806 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
807}
808
809static void rtc_wake_on(struct device *dev)
810{
811 acpi_clear_event(ACPI_EVENT_RTC);
812 acpi_enable_event(ACPI_EVENT_RTC, 0);
813}
814
815static void rtc_wake_off(struct device *dev)
816{
817 acpi_disable_event(ACPI_EVENT_RTC, 0);
818}
819
820#ifdef CONFIG_X86
821/* Enable use_acpi_alarm mode for Intel platforms no earlier than 2015 */
822static void use_acpi_alarm_quirks(void)
823{
824 if (boot_cpu_data.x86_vendor != X86_VENDOR_INTEL)
825 return;
826
827 if (!is_hpet_enabled())
828 return;
829
830 if (dmi_get_bios_year() < 2015)
831 return;
832
833 use_acpi_alarm = true;
834}
835#else
836static inline void use_acpi_alarm_quirks(void) { }
837#endif
838
839static void acpi_cmos_wake_setup(struct device *dev)
840{
841 if (acpi_disabled)
842 return;
843
844 use_acpi_alarm_quirks();
845
846 cmos_rtc.wake_on = rtc_wake_on;
847 cmos_rtc.wake_off = rtc_wake_off;
848
849 /* ACPI tables bug workaround. */
850 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
851 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
852 acpi_gbl_FADT.month_alarm);
853 acpi_gbl_FADT.month_alarm = 0;
854 }
855
856 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
857 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
858 cmos_rtc.century = acpi_gbl_FADT.century;
859
860 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
861 dev_info(dev, "RTC can wake from S4\n");
862
863 /* RTC always wakes from S1/S2/S3, and often S4/STD */
864 device_init_wakeup(dev, 1);
865}
866
867static void cmos_check_acpi_rtc_status(struct device *dev,
868 unsigned char *rtc_control)
869{
870 struct cmos_rtc *cmos = dev_get_drvdata(dev);
871 acpi_event_status rtc_status;
872 acpi_status status;
873
874 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
875 return;
876
877 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
878 if (ACPI_FAILURE(status)) {
879 dev_err(dev, "Could not get RTC status\n");
880 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
881 unsigned char mask;
882 *rtc_control &= ~RTC_AIE;
883 CMOS_WRITE(*rtc_control, RTC_CONTROL);
884 mask = CMOS_READ(RTC_INTR_FLAGS);
885 rtc_update_irq(cmos->rtc, 1, mask);
886 }
887}
888
889#else /* !CONFIG_ACPI */
890
891static inline void acpi_rtc_event_setup(struct device *dev)
892{
893}
894
895static inline void acpi_rtc_event_cleanup(void)
896{
897}
898
899static inline void acpi_cmos_wake_setup(struct device *dev)
900{
901}
902
903static inline void cmos_check_acpi_rtc_status(struct device *dev,
904 unsigned char *rtc_control)
905{
906}
907#endif /* CONFIG_ACPI */
908
909#ifdef CONFIG_PNP
910#define INITSECTION
911
912#else
913#define INITSECTION __init
914#endif
915
916static int INITSECTION
917cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
918{
919 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
920 int retval = 0;
921 unsigned char rtc_control;
922 unsigned address_space;
923 u32 flags = 0;
924 struct nvmem_config nvmem_cfg = {
925 .name = "cmos_nvram",
926 .word_size = 1,
927 .stride = 1,
928 .reg_read = cmos_nvram_read,
929 .reg_write = cmos_nvram_write,
930 .priv = &cmos_rtc,
931 };
932
933 /* there can be only one ... */
934 if (cmos_rtc.dev)
935 return -EBUSY;
936
937 if (!ports)
938 return -ENODEV;
939
940 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
941 *
942 * REVISIT non-x86 systems may instead use memory space resources
943 * (needing ioremap etc), not i/o space resources like this ...
944 */
945 if (RTC_IOMAPPED)
946 ports = request_region(ports->start, resource_size(ports),
947 driver_name);
948 else
949 ports = request_mem_region(ports->start, resource_size(ports),
950 driver_name);
951 if (!ports) {
952 dev_dbg(dev, "i/o registers already in use\n");
953 return -EBUSY;
954 }
955
956 cmos_rtc.irq = rtc_irq;
957 cmos_rtc.iomem = ports;
958
959 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
960 * driver did, but don't reject unknown configs. Old hardware
961 * won't address 128 bytes. Newer chips have multiple banks,
962 * though they may not be listed in one I/O resource.
963 */
964#if defined(CONFIG_ATARI)
965 address_space = 64;
966#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
967 || defined(__sparc__) || defined(__mips__) \
968 || defined(__powerpc__)
969 address_space = 128;
970#else
971#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
972 address_space = 128;
973#endif
974 if (can_bank2 && ports->end > (ports->start + 1))
975 address_space = 256;
976
977 /* For ACPI systems extension info comes from the FADT. On others,
978 * board specific setup provides it as appropriate. Systems where
979 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
980 * some almost-clones) can provide hooks to make that behave.
981 *
982 * Note that ACPI doesn't preclude putting these registers into
983 * "extended" areas of the chip, including some that we won't yet
984 * expect CMOS_READ and friends to handle.
985 */
986 if (info) {
987 if (info->flags)
988 flags = info->flags;
989 if (info->address_space)
990 address_space = info->address_space;
991
992 cmos_rtc.day_alrm = info->rtc_day_alarm;
993 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
994 cmos_rtc.century = info->rtc_century;
995
996 if (info->wake_on && info->wake_off) {
997 cmos_rtc.wake_on = info->wake_on;
998 cmos_rtc.wake_off = info->wake_off;
999 }
1000 } else {
1001 acpi_cmos_wake_setup(dev);
1002 }
1003
1004 if (cmos_rtc.day_alrm >= 128)
1005 cmos_rtc.day_alrm = 0;
1006
1007 if (cmos_rtc.mon_alrm >= 128)
1008 cmos_rtc.mon_alrm = 0;
1009
1010 if (cmos_rtc.century >= 128)
1011 cmos_rtc.century = 0;
1012
1013 cmos_rtc.dev = dev;
1014 dev_set_drvdata(dev, &cmos_rtc);
1015
1016 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1017 if (IS_ERR(cmos_rtc.rtc)) {
1018 retval = PTR_ERR(cmos_rtc.rtc);
1019 goto cleanup0;
1020 }
1021
1022 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1023
1024 if (!mc146818_does_rtc_work()) {
1025 dev_warn(dev, "broken or not accessible\n");
1026 retval = -ENXIO;
1027 goto cleanup1;
1028 }
1029
1030 spin_lock_irq(&rtc_lock);
1031
1032 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1033 /* force periodic irq to CMOS reset default of 1024Hz;
1034 *
1035 * REVISIT it's been reported that at least one x86_64 ALI
1036 * mobo doesn't use 32KHz here ... for portability we might
1037 * need to do something about other clock frequencies.
1038 */
1039 cmos_rtc.rtc->irq_freq = 1024;
1040 if (use_hpet_alarm())
1041 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1042 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1043 }
1044
1045 /* disable irqs */
1046 if (is_valid_irq(rtc_irq))
1047 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1048
1049 rtc_control = CMOS_READ(RTC_CONTROL);
1050
1051 spin_unlock_irq(&rtc_lock);
1052
1053 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1054 dev_warn(dev, "only 24-hr supported\n");
1055 retval = -ENXIO;
1056 goto cleanup1;
1057 }
1058
1059 if (use_hpet_alarm())
1060 hpet_rtc_timer_init();
1061
1062 if (is_valid_irq(rtc_irq)) {
1063 irq_handler_t rtc_cmos_int_handler;
1064
1065 if (use_hpet_alarm()) {
1066 rtc_cmos_int_handler = hpet_rtc_interrupt;
1067 retval = hpet_register_irq_handler(cmos_interrupt);
1068 if (retval) {
1069 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1070 dev_warn(dev, "hpet_register_irq_handler "
1071 " failed in rtc_init().");
1072 goto cleanup1;
1073 }
1074 } else
1075 rtc_cmos_int_handler = cmos_interrupt;
1076
1077 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1078 0, dev_name(&cmos_rtc.rtc->dev),
1079 cmos_rtc.rtc);
1080 if (retval < 0) {
1081 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1082 goto cleanup1;
1083 }
1084 } else {
1085 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1086 }
1087
1088 cmos_rtc.rtc->ops = &cmos_rtc_ops;
1089
1090 retval = devm_rtc_register_device(cmos_rtc.rtc);
1091 if (retval)
1092 goto cleanup2;
1093
1094 /* Set the sync offset for the periodic 11min update correct */
1095 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1096
1097 /* export at least the first block of NVRAM */
1098 nvmem_cfg.size = address_space - NVRAM_OFFSET;
1099 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1100
1101 /*
1102 * Everything has gone well so far, so by default register a handler for
1103 * the ACPI RTC fixed event.
1104 */
1105 if (!info)
1106 acpi_rtc_event_setup(dev);
1107
1108 dev_info(dev, "%s%s, %d bytes nvram%s\n",
1109 !is_valid_irq(rtc_irq) ? "no alarms" :
1110 cmos_rtc.mon_alrm ? "alarms up to one year" :
1111 cmos_rtc.day_alrm ? "alarms up to one month" :
1112 "alarms up to one day",
1113 cmos_rtc.century ? ", y3k" : "",
1114 nvmem_cfg.size,
1115 use_hpet_alarm() ? ", hpet irqs" : "");
1116
1117 return 0;
1118
1119cleanup2:
1120 if (is_valid_irq(rtc_irq))
1121 free_irq(rtc_irq, cmos_rtc.rtc);
1122cleanup1:
1123 cmos_rtc.dev = NULL;
1124cleanup0:
1125 if (RTC_IOMAPPED)
1126 release_region(ports->start, resource_size(ports));
1127 else
1128 release_mem_region(ports->start, resource_size(ports));
1129 return retval;
1130}
1131
1132static void cmos_do_shutdown(int rtc_irq)
1133{
1134 spin_lock_irq(&rtc_lock);
1135 if (is_valid_irq(rtc_irq))
1136 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1137 spin_unlock_irq(&rtc_lock);
1138}
1139
1140static void cmos_do_remove(struct device *dev)
1141{
1142 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1143 struct resource *ports;
1144
1145 cmos_do_shutdown(cmos->irq);
1146
1147 if (is_valid_irq(cmos->irq)) {
1148 free_irq(cmos->irq, cmos->rtc);
1149 if (use_hpet_alarm())
1150 hpet_unregister_irq_handler(cmos_interrupt);
1151 }
1152
1153 if (!dev_get_platdata(dev))
1154 acpi_rtc_event_cleanup();
1155
1156 cmos->rtc = NULL;
1157
1158 ports = cmos->iomem;
1159 if (RTC_IOMAPPED)
1160 release_region(ports->start, resource_size(ports));
1161 else
1162 release_mem_region(ports->start, resource_size(ports));
1163 cmos->iomem = NULL;
1164
1165 cmos->dev = NULL;
1166}
1167
1168static int cmos_aie_poweroff(struct device *dev)
1169{
1170 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1171 struct rtc_time now;
1172 time64_t t_now;
1173 int retval = 0;
1174 unsigned char rtc_control;
1175
1176 if (!cmos->alarm_expires)
1177 return -EINVAL;
1178
1179 spin_lock_irq(&rtc_lock);
1180 rtc_control = CMOS_READ(RTC_CONTROL);
1181 spin_unlock_irq(&rtc_lock);
1182
1183 /* We only care about the situation where AIE is disabled. */
1184 if (rtc_control & RTC_AIE)
1185 return -EBUSY;
1186
1187 cmos_read_time(dev, &now);
1188 t_now = rtc_tm_to_time64(&now);
1189
1190 /*
1191 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1192 * automatically right after shutdown on some buggy boxes.
1193 * This automatic rebooting issue won't happen when the alarm
1194 * time is larger than now+1 seconds.
1195 *
1196 * If the alarm time is equal to now+1 seconds, the issue can be
1197 * prevented by cancelling the alarm.
1198 */
1199 if (cmos->alarm_expires == t_now + 1) {
1200 struct rtc_wkalrm alarm;
1201
1202 /* Cancel the AIE timer by configuring the past time. */
1203 rtc_time64_to_tm(t_now - 1, &alarm.time);
1204 alarm.enabled = 0;
1205 retval = cmos_set_alarm(dev, &alarm);
1206 } else if (cmos->alarm_expires > t_now + 1) {
1207 retval = -EBUSY;
1208 }
1209
1210 return retval;
1211}
1212
1213static int cmos_suspend(struct device *dev)
1214{
1215 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1216 unsigned char tmp;
1217
1218 /* only the alarm might be a wakeup event source */
1219 spin_lock_irq(&rtc_lock);
1220 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1221 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1222 unsigned char mask;
1223
1224 if (device_may_wakeup(dev))
1225 mask = RTC_IRQMASK & ~RTC_AIE;
1226 else
1227 mask = RTC_IRQMASK;
1228 tmp &= ~mask;
1229 CMOS_WRITE(tmp, RTC_CONTROL);
1230 if (use_hpet_alarm())
1231 hpet_mask_rtc_irq_bit(mask);
1232 cmos_checkintr(cmos, tmp);
1233 }
1234 spin_unlock_irq(&rtc_lock);
1235
1236 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1237 cmos->enabled_wake = 1;
1238 if (cmos->wake_on)
1239 cmos->wake_on(dev);
1240 else
1241 enable_irq_wake(cmos->irq);
1242 }
1243
1244 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1245 cmos_read_alarm(dev, &cmos->saved_wkalrm);
1246
1247 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1248 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1249 tmp);
1250
1251 return 0;
1252}
1253
1254/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1255 * after a detour through G3 "mechanical off", although the ACPI spec
1256 * says wakeup should only work from G1/S4 "hibernate". To most users,
1257 * distinctions between S4 and S5 are pointless. So when the hardware
1258 * allows, don't draw that distinction.
1259 */
1260static inline int cmos_poweroff(struct device *dev)
1261{
1262 if (!IS_ENABLED(CONFIG_PM))
1263 return -ENOSYS;
1264
1265 return cmos_suspend(dev);
1266}
1267
1268static void cmos_check_wkalrm(struct device *dev)
1269{
1270 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1271 struct rtc_wkalrm current_alarm;
1272 time64_t t_now;
1273 time64_t t_current_expires;
1274 time64_t t_saved_expires;
1275 struct rtc_time now;
1276
1277 /* Check if we have RTC Alarm armed */
1278 if (!(cmos->suspend_ctrl & RTC_AIE))
1279 return;
1280
1281 cmos_read_time(dev, &now);
1282 t_now = rtc_tm_to_time64(&now);
1283
1284 /*
1285 * ACPI RTC wake event is cleared after resume from STR,
1286 * ACK the rtc irq here
1287 */
1288 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1289 local_irq_disable();
1290 cmos_interrupt(0, (void *)cmos->rtc);
1291 local_irq_enable();
1292 return;
1293 }
1294
1295 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
1296 cmos_read_alarm(dev, ¤t_alarm);
1297 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
1298 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1299 if (t_current_expires != t_saved_expires ||
1300 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1301 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1302 }
1303}
1304
1305static int __maybe_unused cmos_resume(struct device *dev)
1306{
1307 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1308 unsigned char tmp;
1309
1310 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1311 if (cmos->wake_off)
1312 cmos->wake_off(dev);
1313 else
1314 disable_irq_wake(cmos->irq);
1315 cmos->enabled_wake = 0;
1316 }
1317
1318 /* The BIOS might have changed the alarm, restore it */
1319 cmos_check_wkalrm(dev);
1320
1321 spin_lock_irq(&rtc_lock);
1322 tmp = cmos->suspend_ctrl;
1323 cmos->suspend_ctrl = 0;
1324 /* re-enable any irqs previously active */
1325 if (tmp & RTC_IRQMASK) {
1326 unsigned char mask;
1327
1328 if (device_may_wakeup(dev) && use_hpet_alarm())
1329 hpet_rtc_timer_init();
1330
1331 do {
1332 CMOS_WRITE(tmp, RTC_CONTROL);
1333 if (use_hpet_alarm())
1334 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1335
1336 mask = CMOS_READ(RTC_INTR_FLAGS);
1337 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1338 if (!use_hpet_alarm() || !is_intr(mask))
1339 break;
1340
1341 /* force one-shot behavior if HPET blocked
1342 * the wake alarm's irq
1343 */
1344 rtc_update_irq(cmos->rtc, 1, mask);
1345 tmp &= ~RTC_AIE;
1346 hpet_mask_rtc_irq_bit(RTC_AIE);
1347 } while (mask & RTC_AIE);
1348
1349 if (tmp & RTC_AIE)
1350 cmos_check_acpi_rtc_status(dev, &tmp);
1351 }
1352 spin_unlock_irq(&rtc_lock);
1353
1354 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1355
1356 return 0;
1357}
1358
1359static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1360
1361/*----------------------------------------------------------------*/
1362
1363/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1364 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1365 * probably list them in similar PNPBIOS tables; so PNP is more common.
1366 *
1367 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1368 * predate even PNPBIOS should set up platform_bus devices.
1369 */
1370
1371#ifdef CONFIG_PNP
1372
1373#include <linux/pnp.h>
1374
1375static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1376{
1377 int irq;
1378
1379 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1380 irq = 0;
1381#ifdef CONFIG_X86
1382 /* Some machines contain a PNP entry for the RTC, but
1383 * don't define the IRQ. It should always be safe to
1384 * hardcode it on systems with a legacy PIC.
1385 */
1386 if (nr_legacy_irqs())
1387 irq = RTC_IRQ;
1388#endif
1389 } else {
1390 irq = pnp_irq(pnp, 0);
1391 }
1392
1393 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1394}
1395
1396static void cmos_pnp_remove(struct pnp_dev *pnp)
1397{
1398 cmos_do_remove(&pnp->dev);
1399}
1400
1401static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1402{
1403 struct device *dev = &pnp->dev;
1404 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1405
1406 if (system_state == SYSTEM_POWER_OFF) {
1407 int retval = cmos_poweroff(dev);
1408
1409 if (cmos_aie_poweroff(dev) < 0 && !retval)
1410 return;
1411 }
1412
1413 cmos_do_shutdown(cmos->irq);
1414}
1415
1416static const struct pnp_device_id rtc_ids[] = {
1417 { .id = "PNP0b00", },
1418 { .id = "PNP0b01", },
1419 { .id = "PNP0b02", },
1420 { },
1421};
1422MODULE_DEVICE_TABLE(pnp, rtc_ids);
1423
1424static struct pnp_driver cmos_pnp_driver = {
1425 .name = driver_name,
1426 .id_table = rtc_ids,
1427 .probe = cmos_pnp_probe,
1428 .remove = cmos_pnp_remove,
1429 .shutdown = cmos_pnp_shutdown,
1430
1431 /* flag ensures resume() gets called, and stops syslog spam */
1432 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1433 .driver = {
1434 .pm = &cmos_pm_ops,
1435 },
1436};
1437
1438#endif /* CONFIG_PNP */
1439
1440#ifdef CONFIG_OF
1441static const struct of_device_id of_cmos_match[] = {
1442 {
1443 .compatible = "motorola,mc146818",
1444 },
1445 { },
1446};
1447MODULE_DEVICE_TABLE(of, of_cmos_match);
1448
1449static __init void cmos_of_init(struct platform_device *pdev)
1450{
1451 struct device_node *node = pdev->dev.of_node;
1452 const __be32 *val;
1453
1454 if (!node)
1455 return;
1456
1457 val = of_get_property(node, "ctrl-reg", NULL);
1458 if (val)
1459 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1460
1461 val = of_get_property(node, "freq-reg", NULL);
1462 if (val)
1463 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1464}
1465#else
1466static inline void cmos_of_init(struct platform_device *pdev) {}
1467#endif
1468/*----------------------------------------------------------------*/
1469
1470/* Platform setup should have set up an RTC device, when PNP is
1471 * unavailable ... this could happen even on (older) PCs.
1472 */
1473
1474static int __init cmos_platform_probe(struct platform_device *pdev)
1475{
1476 struct resource *resource;
1477 int irq;
1478
1479 cmos_of_init(pdev);
1480
1481 if (RTC_IOMAPPED)
1482 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1483 else
1484 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1485 irq = platform_get_irq(pdev, 0);
1486 if (irq < 0)
1487 irq = -1;
1488
1489 return cmos_do_probe(&pdev->dev, resource, irq);
1490}
1491
1492static int cmos_platform_remove(struct platform_device *pdev)
1493{
1494 cmos_do_remove(&pdev->dev);
1495 return 0;
1496}
1497
1498static void cmos_platform_shutdown(struct platform_device *pdev)
1499{
1500 struct device *dev = &pdev->dev;
1501 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1502
1503 if (system_state == SYSTEM_POWER_OFF) {
1504 int retval = cmos_poweroff(dev);
1505
1506 if (cmos_aie_poweroff(dev) < 0 && !retval)
1507 return;
1508 }
1509
1510 cmos_do_shutdown(cmos->irq);
1511}
1512
1513/* work with hotplug and coldplug */
1514MODULE_ALIAS("platform:rtc_cmos");
1515
1516static struct platform_driver cmos_platform_driver = {
1517 .remove = cmos_platform_remove,
1518 .shutdown = cmos_platform_shutdown,
1519 .driver = {
1520 .name = driver_name,
1521 .pm = &cmos_pm_ops,
1522 .of_match_table = of_match_ptr(of_cmos_match),
1523 }
1524};
1525
1526#ifdef CONFIG_PNP
1527static bool pnp_driver_registered;
1528#endif
1529static bool platform_driver_registered;
1530
1531static int __init cmos_init(void)
1532{
1533 int retval = 0;
1534
1535#ifdef CONFIG_PNP
1536 retval = pnp_register_driver(&cmos_pnp_driver);
1537 if (retval == 0)
1538 pnp_driver_registered = true;
1539#endif
1540
1541 if (!cmos_rtc.dev) {
1542 retval = platform_driver_probe(&cmos_platform_driver,
1543 cmos_platform_probe);
1544 if (retval == 0)
1545 platform_driver_registered = true;
1546 }
1547
1548 if (retval == 0)
1549 return 0;
1550
1551#ifdef CONFIG_PNP
1552 if (pnp_driver_registered)
1553 pnp_unregister_driver(&cmos_pnp_driver);
1554#endif
1555 return retval;
1556}
1557module_init(cmos_init);
1558
1559static void __exit cmos_exit(void)
1560{
1561#ifdef CONFIG_PNP
1562 if (pnp_driver_registered)
1563 pnp_unregister_driver(&cmos_pnp_driver);
1564#endif
1565 if (platform_driver_registered)
1566 platform_driver_unregister(&cmos_platform_driver);
1567}
1568module_exit(cmos_exit);
1569
1570
1571MODULE_AUTHOR("David Brownell");
1572MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1573MODULE_LICENSE("GPL");
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/init.h>
34#include <linux/interrupt.h>
35#include <linux/spinlock.h>
36#include <linux/platform_device.h>
37#include <linux/log2.h>
38#include <linux/pm.h>
39#include <linux/of.h>
40#include <linux/of_platform.h>
41#include <linux/dmi.h>
42
43/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
44#include <asm-generic/rtc.h>
45
46struct cmos_rtc {
47 struct rtc_device *rtc;
48 struct device *dev;
49 int irq;
50 struct resource *iomem;
51
52 void (*wake_on)(struct device *);
53 void (*wake_off)(struct device *);
54
55 u8 enabled_wake;
56 u8 suspend_ctrl;
57
58 /* newer hardware extends the original register set */
59 u8 day_alrm;
60 u8 mon_alrm;
61 u8 century;
62};
63
64/* both platform and pnp busses use negative numbers for invalid irqs */
65#define is_valid_irq(n) ((n) > 0)
66
67static const char driver_name[] = "rtc_cmos";
68
69/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
70 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
71 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
72 */
73#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
74
75static inline int is_intr(u8 rtc_intr)
76{
77 if (!(rtc_intr & RTC_IRQF))
78 return 0;
79 return rtc_intr & RTC_IRQMASK;
80}
81
82/*----------------------------------------------------------------*/
83
84/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
85 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
86 * used in a broken "legacy replacement" mode. The breakage includes
87 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
88 * other (better) use.
89 *
90 * When that broken mode is in use, platform glue provides a partial
91 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
92 * want to use HPET for anything except those IRQs though...
93 */
94#ifdef CONFIG_HPET_EMULATE_RTC
95#include <asm/hpet.h>
96#else
97
98static inline int is_hpet_enabled(void)
99{
100 return 0;
101}
102
103static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
104{
105 return 0;
106}
107
108static inline int hpet_set_rtc_irq_bit(unsigned long mask)
109{
110 return 0;
111}
112
113static inline int
114hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
115{
116 return 0;
117}
118
119static inline int hpet_set_periodic_freq(unsigned long freq)
120{
121 return 0;
122}
123
124static inline int hpet_rtc_dropped_irq(void)
125{
126 return 0;
127}
128
129static inline int hpet_rtc_timer_init(void)
130{
131 return 0;
132}
133
134extern irq_handler_t hpet_rtc_interrupt;
135
136static inline int hpet_register_irq_handler(irq_handler_t handler)
137{
138 return 0;
139}
140
141static inline int hpet_unregister_irq_handler(irq_handler_t handler)
142{
143 return 0;
144}
145
146#endif
147
148/*----------------------------------------------------------------*/
149
150#ifdef RTC_PORT
151
152/* Most newer x86 systems have two register banks, the first used
153 * for RTC and NVRAM and the second only for NVRAM. Caller must
154 * own rtc_lock ... and we won't worry about access during NMI.
155 */
156#define can_bank2 true
157
158static inline unsigned char cmos_read_bank2(unsigned char addr)
159{
160 outb(addr, RTC_PORT(2));
161 return inb(RTC_PORT(3));
162}
163
164static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
165{
166 outb(addr, RTC_PORT(2));
167 outb(val, RTC_PORT(3));
168}
169
170#else
171
172#define can_bank2 false
173
174static inline unsigned char cmos_read_bank2(unsigned char addr)
175{
176 return 0;
177}
178
179static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
180{
181}
182
183#endif
184
185/*----------------------------------------------------------------*/
186
187static int cmos_read_time(struct device *dev, struct rtc_time *t)
188{
189 /* REVISIT: if the clock has a "century" register, use
190 * that instead of the heuristic in get_rtc_time().
191 * That'll make Y3K compatility (year > 2070) easy!
192 */
193 get_rtc_time(t);
194 return 0;
195}
196
197static int cmos_set_time(struct device *dev, struct rtc_time *t)
198{
199 /* REVISIT: set the "century" register if available
200 *
201 * NOTE: this ignores the issue whereby updating the seconds
202 * takes effect exactly 500ms after we write the register.
203 * (Also queueing and other delays before we get this far.)
204 */
205 return set_rtc_time(t);
206}
207
208static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
209{
210 struct cmos_rtc *cmos = dev_get_drvdata(dev);
211 unsigned char rtc_control;
212
213 if (!is_valid_irq(cmos->irq))
214 return -EIO;
215
216 /* Basic alarms only support hour, minute, and seconds fields.
217 * Some also support day and month, for alarms up to a year in
218 * the future.
219 */
220 t->time.tm_mday = -1;
221 t->time.tm_mon = -1;
222
223 spin_lock_irq(&rtc_lock);
224 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
225 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
226 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
227
228 if (cmos->day_alrm) {
229 /* ignore upper bits on readback per ACPI spec */
230 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
231 if (!t->time.tm_mday)
232 t->time.tm_mday = -1;
233
234 if (cmos->mon_alrm) {
235 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
236 if (!t->time.tm_mon)
237 t->time.tm_mon = -1;
238 }
239 }
240
241 rtc_control = CMOS_READ(RTC_CONTROL);
242 spin_unlock_irq(&rtc_lock);
243
244 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
245 if (((unsigned)t->time.tm_sec) < 0x60)
246 t->time.tm_sec = bcd2bin(t->time.tm_sec);
247 else
248 t->time.tm_sec = -1;
249 if (((unsigned)t->time.tm_min) < 0x60)
250 t->time.tm_min = bcd2bin(t->time.tm_min);
251 else
252 t->time.tm_min = -1;
253 if (((unsigned)t->time.tm_hour) < 0x24)
254 t->time.tm_hour = bcd2bin(t->time.tm_hour);
255 else
256 t->time.tm_hour = -1;
257
258 if (cmos->day_alrm) {
259 if (((unsigned)t->time.tm_mday) <= 0x31)
260 t->time.tm_mday = bcd2bin(t->time.tm_mday);
261 else
262 t->time.tm_mday = -1;
263
264 if (cmos->mon_alrm) {
265 if (((unsigned)t->time.tm_mon) <= 0x12)
266 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
267 else
268 t->time.tm_mon = -1;
269 }
270 }
271 }
272 t->time.tm_year = -1;
273
274 t->enabled = !!(rtc_control & RTC_AIE);
275 t->pending = 0;
276
277 return 0;
278}
279
280static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
281{
282 unsigned char rtc_intr;
283
284 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
285 * allegedly some older rtcs need that to handle irqs properly
286 */
287 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
288
289 if (is_hpet_enabled())
290 return;
291
292 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
293 if (is_intr(rtc_intr))
294 rtc_update_irq(cmos->rtc, 1, rtc_intr);
295}
296
297static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
298{
299 unsigned char rtc_control;
300
301 /* flush any pending IRQ status, notably for update irqs,
302 * before we enable new IRQs
303 */
304 rtc_control = CMOS_READ(RTC_CONTROL);
305 cmos_checkintr(cmos, rtc_control);
306
307 rtc_control |= mask;
308 CMOS_WRITE(rtc_control, RTC_CONTROL);
309 hpet_set_rtc_irq_bit(mask);
310
311 cmos_checkintr(cmos, rtc_control);
312}
313
314static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
315{
316 unsigned char rtc_control;
317
318 rtc_control = CMOS_READ(RTC_CONTROL);
319 rtc_control &= ~mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_mask_rtc_irq_bit(mask);
322
323 cmos_checkintr(cmos, rtc_control);
324}
325
326static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
327{
328 struct cmos_rtc *cmos = dev_get_drvdata(dev);
329 unsigned char mon, mday, hrs, min, sec, rtc_control;
330
331 if (!is_valid_irq(cmos->irq))
332 return -EIO;
333
334 mon = t->time.tm_mon + 1;
335 mday = t->time.tm_mday;
336 hrs = t->time.tm_hour;
337 min = t->time.tm_min;
338 sec = t->time.tm_sec;
339
340 rtc_control = CMOS_READ(RTC_CONTROL);
341 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
342 /* Writing 0xff means "don't care" or "match all". */
343 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
344 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
345 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
346 min = (min < 60) ? bin2bcd(min) : 0xff;
347 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
348 }
349
350 spin_lock_irq(&rtc_lock);
351
352 /* next rtc irq must not be from previous alarm setting */
353 cmos_irq_disable(cmos, RTC_AIE);
354
355 /* update alarm */
356 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
357 CMOS_WRITE(min, RTC_MINUTES_ALARM);
358 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
359
360 /* the system may support an "enhanced" alarm */
361 if (cmos->day_alrm) {
362 CMOS_WRITE(mday, cmos->day_alrm);
363 if (cmos->mon_alrm)
364 CMOS_WRITE(mon, cmos->mon_alrm);
365 }
366
367 /* FIXME the HPET alarm glue currently ignores day_alrm
368 * and mon_alrm ...
369 */
370 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
371
372 if (t->enabled)
373 cmos_irq_enable(cmos, RTC_AIE);
374
375 spin_unlock_irq(&rtc_lock);
376
377 return 0;
378}
379
380/*
381 * Do not disable RTC alarm on shutdown - workaround for b0rked BIOSes.
382 */
383static bool alarm_disable_quirk;
384
385static int __init set_alarm_disable_quirk(const struct dmi_system_id *id)
386{
387 alarm_disable_quirk = true;
388 pr_info("rtc-cmos: BIOS has alarm-disable quirk. ");
389 pr_info("RTC alarms disabled\n");
390 return 0;
391}
392
393static const struct dmi_system_id rtc_quirks[] __initconst = {
394 /* https://bugzilla.novell.com/show_bug.cgi?id=805740 */
395 {
396 .callback = set_alarm_disable_quirk,
397 .ident = "IBM Truman",
398 .matches = {
399 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
400 DMI_MATCH(DMI_PRODUCT_NAME, "4852570"),
401 },
402 },
403 /* https://bugzilla.novell.com/show_bug.cgi?id=812592 */
404 {
405 .callback = set_alarm_disable_quirk,
406 .ident = "Gigabyte GA-990XA-UD3",
407 .matches = {
408 DMI_MATCH(DMI_SYS_VENDOR,
409 "Gigabyte Technology Co., Ltd."),
410 DMI_MATCH(DMI_PRODUCT_NAME, "GA-990XA-UD3"),
411 },
412 },
413 /* http://permalink.gmane.org/gmane.linux.kernel/1604474 */
414 {
415 .callback = set_alarm_disable_quirk,
416 .ident = "Toshiba Satellite L300",
417 .matches = {
418 DMI_MATCH(DMI_SYS_VENDOR, "TOSHIBA"),
419 DMI_MATCH(DMI_PRODUCT_NAME, "Satellite L300"),
420 },
421 },
422 {}
423};
424
425static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
426{
427 struct cmos_rtc *cmos = dev_get_drvdata(dev);
428 unsigned long flags;
429
430 if (!is_valid_irq(cmos->irq))
431 return -EINVAL;
432
433 if (alarm_disable_quirk)
434 return 0;
435
436 spin_lock_irqsave(&rtc_lock, flags);
437
438 if (enabled)
439 cmos_irq_enable(cmos, RTC_AIE);
440 else
441 cmos_irq_disable(cmos, RTC_AIE);
442
443 spin_unlock_irqrestore(&rtc_lock, flags);
444 return 0;
445}
446
447#if defined(CONFIG_RTC_INTF_PROC) || defined(CONFIG_RTC_INTF_PROC_MODULE)
448
449static int cmos_procfs(struct device *dev, struct seq_file *seq)
450{
451 struct cmos_rtc *cmos = dev_get_drvdata(dev);
452 unsigned char rtc_control, valid;
453
454 spin_lock_irq(&rtc_lock);
455 rtc_control = CMOS_READ(RTC_CONTROL);
456 valid = CMOS_READ(RTC_VALID);
457 spin_unlock_irq(&rtc_lock);
458
459 /* NOTE: at least ICH6 reports battery status using a different
460 * (non-RTC) bit; and SQWE is ignored on many current systems.
461 */
462 return seq_printf(seq,
463 "periodic_IRQ\t: %s\n"
464 "update_IRQ\t: %s\n"
465 "HPET_emulated\t: %s\n"
466 // "square_wave\t: %s\n"
467 "BCD\t\t: %s\n"
468 "DST_enable\t: %s\n"
469 "periodic_freq\t: %d\n"
470 "batt_status\t: %s\n",
471 (rtc_control & RTC_PIE) ? "yes" : "no",
472 (rtc_control & RTC_UIE) ? "yes" : "no",
473 is_hpet_enabled() ? "yes" : "no",
474 // (rtc_control & RTC_SQWE) ? "yes" : "no",
475 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
476 (rtc_control & RTC_DST_EN) ? "yes" : "no",
477 cmos->rtc->irq_freq,
478 (valid & RTC_VRT) ? "okay" : "dead");
479}
480
481#else
482#define cmos_procfs NULL
483#endif
484
485static const struct rtc_class_ops cmos_rtc_ops = {
486 .read_time = cmos_read_time,
487 .set_time = cmos_set_time,
488 .read_alarm = cmos_read_alarm,
489 .set_alarm = cmos_set_alarm,
490 .proc = cmos_procfs,
491 .alarm_irq_enable = cmos_alarm_irq_enable,
492};
493
494/*----------------------------------------------------------------*/
495
496/*
497 * All these chips have at least 64 bytes of address space, shared by
498 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
499 * by boot firmware. Modern chips have 128 or 256 bytes.
500 */
501
502#define NVRAM_OFFSET (RTC_REG_D + 1)
503
504static ssize_t
505cmos_nvram_read(struct file *filp, struct kobject *kobj,
506 struct bin_attribute *attr,
507 char *buf, loff_t off, size_t count)
508{
509 int retval;
510
511 if (unlikely(off >= attr->size))
512 return 0;
513 if (unlikely(off < 0))
514 return -EINVAL;
515 if ((off + count) > attr->size)
516 count = attr->size - off;
517
518 off += NVRAM_OFFSET;
519 spin_lock_irq(&rtc_lock);
520 for (retval = 0; count; count--, off++, retval++) {
521 if (off < 128)
522 *buf++ = CMOS_READ(off);
523 else if (can_bank2)
524 *buf++ = cmos_read_bank2(off);
525 else
526 break;
527 }
528 spin_unlock_irq(&rtc_lock);
529
530 return retval;
531}
532
533static ssize_t
534cmos_nvram_write(struct file *filp, struct kobject *kobj,
535 struct bin_attribute *attr,
536 char *buf, loff_t off, size_t count)
537{
538 struct cmos_rtc *cmos;
539 int retval;
540
541 cmos = dev_get_drvdata(container_of(kobj, struct device, kobj));
542 if (unlikely(off >= attr->size))
543 return -EFBIG;
544 if (unlikely(off < 0))
545 return -EINVAL;
546 if ((off + count) > attr->size)
547 count = attr->size - off;
548
549 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
550 * checksum on part of the NVRAM data. That's currently ignored
551 * here. If userspace is smart enough to know what fields of
552 * NVRAM to update, updating checksums is also part of its job.
553 */
554 off += NVRAM_OFFSET;
555 spin_lock_irq(&rtc_lock);
556 for (retval = 0; count; count--, off++, retval++) {
557 /* don't trash RTC registers */
558 if (off == cmos->day_alrm
559 || off == cmos->mon_alrm
560 || off == cmos->century)
561 buf++;
562 else if (off < 128)
563 CMOS_WRITE(*buf++, off);
564 else if (can_bank2)
565 cmos_write_bank2(*buf++, off);
566 else
567 break;
568 }
569 spin_unlock_irq(&rtc_lock);
570
571 return retval;
572}
573
574static struct bin_attribute nvram = {
575 .attr = {
576 .name = "nvram",
577 .mode = S_IRUGO | S_IWUSR,
578 },
579
580 .read = cmos_nvram_read,
581 .write = cmos_nvram_write,
582 /* size gets set up later */
583};
584
585/*----------------------------------------------------------------*/
586
587static struct cmos_rtc cmos_rtc;
588
589static irqreturn_t cmos_interrupt(int irq, void *p)
590{
591 u8 irqstat;
592 u8 rtc_control;
593
594 spin_lock(&rtc_lock);
595
596 /* When the HPET interrupt handler calls us, the interrupt
597 * status is passed as arg1 instead of the irq number. But
598 * always clear irq status, even when HPET is in the way.
599 *
600 * Note that HPET and RTC are almost certainly out of phase,
601 * giving different IRQ status ...
602 */
603 irqstat = CMOS_READ(RTC_INTR_FLAGS);
604 rtc_control = CMOS_READ(RTC_CONTROL);
605 if (is_hpet_enabled())
606 irqstat = (unsigned long)irq & 0xF0;
607
608 /* If we were suspended, RTC_CONTROL may not be accurate since the
609 * bios may have cleared it.
610 */
611 if (!cmos_rtc.suspend_ctrl)
612 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
613 else
614 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
615
616 /* All Linux RTC alarms should be treated as if they were oneshot.
617 * Similar code may be needed in system wakeup paths, in case the
618 * alarm woke the system.
619 */
620 if (irqstat & RTC_AIE) {
621 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
622 rtc_control &= ~RTC_AIE;
623 CMOS_WRITE(rtc_control, RTC_CONTROL);
624 hpet_mask_rtc_irq_bit(RTC_AIE);
625 CMOS_READ(RTC_INTR_FLAGS);
626 }
627 spin_unlock(&rtc_lock);
628
629 if (is_intr(irqstat)) {
630 rtc_update_irq(p, 1, irqstat);
631 return IRQ_HANDLED;
632 } else
633 return IRQ_NONE;
634}
635
636#ifdef CONFIG_PNP
637#define INITSECTION
638
639#else
640#define INITSECTION __init
641#endif
642
643static int INITSECTION
644cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
645{
646 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
647 int retval = 0;
648 unsigned char rtc_control;
649 unsigned address_space;
650
651 /* there can be only one ... */
652 if (cmos_rtc.dev)
653 return -EBUSY;
654
655 if (!ports)
656 return -ENODEV;
657
658 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
659 *
660 * REVISIT non-x86 systems may instead use memory space resources
661 * (needing ioremap etc), not i/o space resources like this ...
662 */
663 ports = request_region(ports->start,
664 resource_size(ports),
665 driver_name);
666 if (!ports) {
667 dev_dbg(dev, "i/o registers already in use\n");
668 return -EBUSY;
669 }
670
671 cmos_rtc.irq = rtc_irq;
672 cmos_rtc.iomem = ports;
673
674 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
675 * driver did, but don't reject unknown configs. Old hardware
676 * won't address 128 bytes. Newer chips have multiple banks,
677 * though they may not be listed in one I/O resource.
678 */
679#if defined(CONFIG_ATARI)
680 address_space = 64;
681#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
682 || defined(__sparc__) || defined(__mips__) \
683 || defined(__powerpc__)
684 address_space = 128;
685#else
686#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
687 address_space = 128;
688#endif
689 if (can_bank2 && ports->end > (ports->start + 1))
690 address_space = 256;
691
692 /* For ACPI systems extension info comes from the FADT. On others,
693 * board specific setup provides it as appropriate. Systems where
694 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
695 * some almost-clones) can provide hooks to make that behave.
696 *
697 * Note that ACPI doesn't preclude putting these registers into
698 * "extended" areas of the chip, including some that we won't yet
699 * expect CMOS_READ and friends to handle.
700 */
701 if (info) {
702 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
703 cmos_rtc.day_alrm = info->rtc_day_alarm;
704 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
705 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
706 if (info->rtc_century && info->rtc_century < 128)
707 cmos_rtc.century = info->rtc_century;
708
709 if (info->wake_on && info->wake_off) {
710 cmos_rtc.wake_on = info->wake_on;
711 cmos_rtc.wake_off = info->wake_off;
712 }
713 }
714
715 cmos_rtc.dev = dev;
716 dev_set_drvdata(dev, &cmos_rtc);
717
718 cmos_rtc.rtc = rtc_device_register(driver_name, dev,
719 &cmos_rtc_ops, THIS_MODULE);
720 if (IS_ERR(cmos_rtc.rtc)) {
721 retval = PTR_ERR(cmos_rtc.rtc);
722 goto cleanup0;
723 }
724
725 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
726
727 spin_lock_irq(&rtc_lock);
728
729 /* force periodic irq to CMOS reset default of 1024Hz;
730 *
731 * REVISIT it's been reported that at least one x86_64 ALI mobo
732 * doesn't use 32KHz here ... for portability we might need to
733 * do something about other clock frequencies.
734 */
735 cmos_rtc.rtc->irq_freq = 1024;
736 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
737 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
738
739 /* disable irqs */
740 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
741
742 rtc_control = CMOS_READ(RTC_CONTROL);
743
744 spin_unlock_irq(&rtc_lock);
745
746 /* FIXME:
747 * <asm-generic/rtc.h> doesn't know 12-hour mode either.
748 */
749 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
750 dev_warn(dev, "only 24-hr supported\n");
751 retval = -ENXIO;
752 goto cleanup1;
753 }
754
755 if (is_valid_irq(rtc_irq)) {
756 irq_handler_t rtc_cmos_int_handler;
757
758 if (is_hpet_enabled()) {
759 rtc_cmos_int_handler = hpet_rtc_interrupt;
760 retval = hpet_register_irq_handler(cmos_interrupt);
761 if (retval) {
762 dev_warn(dev, "hpet_register_irq_handler "
763 " failed in rtc_init().");
764 goto cleanup1;
765 }
766 } else
767 rtc_cmos_int_handler = cmos_interrupt;
768
769 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
770 0, dev_name(&cmos_rtc.rtc->dev),
771 cmos_rtc.rtc);
772 if (retval < 0) {
773 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
774 goto cleanup1;
775 }
776 }
777 hpet_rtc_timer_init();
778
779 /* export at least the first block of NVRAM */
780 nvram.size = address_space - NVRAM_OFFSET;
781 retval = sysfs_create_bin_file(&dev->kobj, &nvram);
782 if (retval < 0) {
783 dev_dbg(dev, "can't create nvram file? %d\n", retval);
784 goto cleanup2;
785 }
786
787 dev_info(dev, "%s%s, %zd bytes nvram%s\n",
788 !is_valid_irq(rtc_irq) ? "no alarms" :
789 cmos_rtc.mon_alrm ? "alarms up to one year" :
790 cmos_rtc.day_alrm ? "alarms up to one month" :
791 "alarms up to one day",
792 cmos_rtc.century ? ", y3k" : "",
793 nvram.size,
794 is_hpet_enabled() ? ", hpet irqs" : "");
795
796 return 0;
797
798cleanup2:
799 if (is_valid_irq(rtc_irq))
800 free_irq(rtc_irq, cmos_rtc.rtc);
801cleanup1:
802 cmos_rtc.dev = NULL;
803 rtc_device_unregister(cmos_rtc.rtc);
804cleanup0:
805 release_region(ports->start, resource_size(ports));
806 return retval;
807}
808
809static void cmos_do_shutdown(void)
810{
811 spin_lock_irq(&rtc_lock);
812 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
813 spin_unlock_irq(&rtc_lock);
814}
815
816static void __exit cmos_do_remove(struct device *dev)
817{
818 struct cmos_rtc *cmos = dev_get_drvdata(dev);
819 struct resource *ports;
820
821 cmos_do_shutdown();
822
823 sysfs_remove_bin_file(&dev->kobj, &nvram);
824
825 if (is_valid_irq(cmos->irq)) {
826 free_irq(cmos->irq, cmos->rtc);
827 hpet_unregister_irq_handler(cmos_interrupt);
828 }
829
830 rtc_device_unregister(cmos->rtc);
831 cmos->rtc = NULL;
832
833 ports = cmos->iomem;
834 release_region(ports->start, resource_size(ports));
835 cmos->iomem = NULL;
836
837 cmos->dev = NULL;
838}
839
840#ifdef CONFIG_PM_SLEEP
841
842static int cmos_suspend(struct device *dev)
843{
844 struct cmos_rtc *cmos = dev_get_drvdata(dev);
845 unsigned char tmp;
846
847 /* only the alarm might be a wakeup event source */
848 spin_lock_irq(&rtc_lock);
849 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
850 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
851 unsigned char mask;
852
853 if (device_may_wakeup(dev))
854 mask = RTC_IRQMASK & ~RTC_AIE;
855 else
856 mask = RTC_IRQMASK;
857 tmp &= ~mask;
858 CMOS_WRITE(tmp, RTC_CONTROL);
859 hpet_mask_rtc_irq_bit(mask);
860
861 cmos_checkintr(cmos, tmp);
862 }
863 spin_unlock_irq(&rtc_lock);
864
865 if (tmp & RTC_AIE) {
866 cmos->enabled_wake = 1;
867 if (cmos->wake_on)
868 cmos->wake_on(dev);
869 else
870 enable_irq_wake(cmos->irq);
871 }
872
873 dev_dbg(dev, "suspend%s, ctrl %02x\n",
874 (tmp & RTC_AIE) ? ", alarm may wake" : "",
875 tmp);
876
877 return 0;
878}
879
880/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
881 * after a detour through G3 "mechanical off", although the ACPI spec
882 * says wakeup should only work from G1/S4 "hibernate". To most users,
883 * distinctions between S4 and S5 are pointless. So when the hardware
884 * allows, don't draw that distinction.
885 */
886static inline int cmos_poweroff(struct device *dev)
887{
888 return cmos_suspend(dev);
889}
890
891static int cmos_resume(struct device *dev)
892{
893 struct cmos_rtc *cmos = dev_get_drvdata(dev);
894 unsigned char tmp;
895
896 if (cmos->enabled_wake) {
897 if (cmos->wake_off)
898 cmos->wake_off(dev);
899 else
900 disable_irq_wake(cmos->irq);
901 cmos->enabled_wake = 0;
902 }
903
904 spin_lock_irq(&rtc_lock);
905 tmp = cmos->suspend_ctrl;
906 cmos->suspend_ctrl = 0;
907 /* re-enable any irqs previously active */
908 if (tmp & RTC_IRQMASK) {
909 unsigned char mask;
910
911 if (device_may_wakeup(dev))
912 hpet_rtc_timer_init();
913
914 do {
915 CMOS_WRITE(tmp, RTC_CONTROL);
916 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
917
918 mask = CMOS_READ(RTC_INTR_FLAGS);
919 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
920 if (!is_hpet_enabled() || !is_intr(mask))
921 break;
922
923 /* force one-shot behavior if HPET blocked
924 * the wake alarm's irq
925 */
926 rtc_update_irq(cmos->rtc, 1, mask);
927 tmp &= ~RTC_AIE;
928 hpet_mask_rtc_irq_bit(RTC_AIE);
929 } while (mask & RTC_AIE);
930 }
931 spin_unlock_irq(&rtc_lock);
932
933 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
934
935 return 0;
936}
937
938#else
939
940static inline int cmos_poweroff(struct device *dev)
941{
942 return -ENOSYS;
943}
944
945#endif
946
947static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
948
949/*----------------------------------------------------------------*/
950
951/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
952 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
953 * probably list them in similar PNPBIOS tables; so PNP is more common.
954 *
955 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
956 * predate even PNPBIOS should set up platform_bus devices.
957 */
958
959#ifdef CONFIG_ACPI
960
961#include <linux/acpi.h>
962
963static u32 rtc_handler(void *context)
964{
965 struct device *dev = context;
966
967 pm_wakeup_event(dev, 0);
968 acpi_clear_event(ACPI_EVENT_RTC);
969 acpi_disable_event(ACPI_EVENT_RTC, 0);
970 return ACPI_INTERRUPT_HANDLED;
971}
972
973static inline void rtc_wake_setup(struct device *dev)
974{
975 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
976 /*
977 * After the RTC handler is installed, the Fixed_RTC event should
978 * be disabled. Only when the RTC alarm is set will it be enabled.
979 */
980 acpi_clear_event(ACPI_EVENT_RTC);
981 acpi_disable_event(ACPI_EVENT_RTC, 0);
982}
983
984static void rtc_wake_on(struct device *dev)
985{
986 acpi_clear_event(ACPI_EVENT_RTC);
987 acpi_enable_event(ACPI_EVENT_RTC, 0);
988}
989
990static void rtc_wake_off(struct device *dev)
991{
992 acpi_disable_event(ACPI_EVENT_RTC, 0);
993}
994
995/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
996 * its device node and pass extra config data. This helps its driver use
997 * capabilities that the now-obsolete mc146818 didn't have, and informs it
998 * that this board's RTC is wakeup-capable (per ACPI spec).
999 */
1000static struct cmos_rtc_board_info acpi_rtc_info;
1001
1002static void cmos_wake_setup(struct device *dev)
1003{
1004 if (acpi_disabled)
1005 return;
1006
1007 rtc_wake_setup(dev);
1008 acpi_rtc_info.wake_on = rtc_wake_on;
1009 acpi_rtc_info.wake_off = rtc_wake_off;
1010
1011 /* workaround bug in some ACPI tables */
1012 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1013 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1014 acpi_gbl_FADT.month_alarm);
1015 acpi_gbl_FADT.month_alarm = 0;
1016 }
1017
1018 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1019 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1020 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1021
1022 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1023 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1024 dev_info(dev, "RTC can wake from S4\n");
1025
1026 dev->platform_data = &acpi_rtc_info;
1027
1028 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1029 device_init_wakeup(dev, 1);
1030}
1031
1032#else
1033
1034static void cmos_wake_setup(struct device *dev)
1035{
1036}
1037
1038#endif
1039
1040#ifdef CONFIG_PNP
1041
1042#include <linux/pnp.h>
1043
1044static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1045{
1046 cmos_wake_setup(&pnp->dev);
1047
1048 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0))
1049 /* Some machines contain a PNP entry for the RTC, but
1050 * don't define the IRQ. It should always be safe to
1051 * hardcode it in these cases
1052 */
1053 return cmos_do_probe(&pnp->dev,
1054 pnp_get_resource(pnp, IORESOURCE_IO, 0), 8);
1055 else
1056 return cmos_do_probe(&pnp->dev,
1057 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1058 pnp_irq(pnp, 0));
1059}
1060
1061static void __exit cmos_pnp_remove(struct pnp_dev *pnp)
1062{
1063 cmos_do_remove(&pnp->dev);
1064}
1065
1066static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1067{
1068 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pnp->dev))
1069 return;
1070
1071 cmos_do_shutdown();
1072}
1073
1074static const struct pnp_device_id rtc_ids[] = {
1075 { .id = "PNP0b00", },
1076 { .id = "PNP0b01", },
1077 { .id = "PNP0b02", },
1078 { },
1079};
1080MODULE_DEVICE_TABLE(pnp, rtc_ids);
1081
1082static struct pnp_driver cmos_pnp_driver = {
1083 .name = (char *) driver_name,
1084 .id_table = rtc_ids,
1085 .probe = cmos_pnp_probe,
1086 .remove = __exit_p(cmos_pnp_remove),
1087 .shutdown = cmos_pnp_shutdown,
1088
1089 /* flag ensures resume() gets called, and stops syslog spam */
1090 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1091 .driver = {
1092 .pm = &cmos_pm_ops,
1093 },
1094};
1095
1096#endif /* CONFIG_PNP */
1097
1098#ifdef CONFIG_OF
1099static const struct of_device_id of_cmos_match[] = {
1100 {
1101 .compatible = "motorola,mc146818",
1102 },
1103 { },
1104};
1105MODULE_DEVICE_TABLE(of, of_cmos_match);
1106
1107static __init void cmos_of_init(struct platform_device *pdev)
1108{
1109 struct device_node *node = pdev->dev.of_node;
1110 struct rtc_time time;
1111 int ret;
1112 const __be32 *val;
1113
1114 if (!node)
1115 return;
1116
1117 val = of_get_property(node, "ctrl-reg", NULL);
1118 if (val)
1119 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1120
1121 val = of_get_property(node, "freq-reg", NULL);
1122 if (val)
1123 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1124
1125 get_rtc_time(&time);
1126 ret = rtc_valid_tm(&time);
1127 if (ret) {
1128 struct rtc_time def_time = {
1129 .tm_year = 1,
1130 .tm_mday = 1,
1131 };
1132 set_rtc_time(&def_time);
1133 }
1134}
1135#else
1136static inline void cmos_of_init(struct platform_device *pdev) {}
1137#endif
1138/*----------------------------------------------------------------*/
1139
1140/* Platform setup should have set up an RTC device, when PNP is
1141 * unavailable ... this could happen even on (older) PCs.
1142 */
1143
1144static int __init cmos_platform_probe(struct platform_device *pdev)
1145{
1146 cmos_of_init(pdev);
1147 cmos_wake_setup(&pdev->dev);
1148 return cmos_do_probe(&pdev->dev,
1149 platform_get_resource(pdev, IORESOURCE_IO, 0),
1150 platform_get_irq(pdev, 0));
1151}
1152
1153static int __exit cmos_platform_remove(struct platform_device *pdev)
1154{
1155 cmos_do_remove(&pdev->dev);
1156 return 0;
1157}
1158
1159static void cmos_platform_shutdown(struct platform_device *pdev)
1160{
1161 if (system_state == SYSTEM_POWER_OFF && !cmos_poweroff(&pdev->dev))
1162 return;
1163
1164 cmos_do_shutdown();
1165}
1166
1167/* work with hotplug and coldplug */
1168MODULE_ALIAS("platform:rtc_cmos");
1169
1170static struct platform_driver cmos_platform_driver = {
1171 .remove = __exit_p(cmos_platform_remove),
1172 .shutdown = cmos_platform_shutdown,
1173 .driver = {
1174 .name = driver_name,
1175#ifdef CONFIG_PM
1176 .pm = &cmos_pm_ops,
1177#endif
1178 .of_match_table = of_match_ptr(of_cmos_match),
1179 }
1180};
1181
1182#ifdef CONFIG_PNP
1183static bool pnp_driver_registered;
1184#endif
1185static bool platform_driver_registered;
1186
1187static int __init cmos_init(void)
1188{
1189 int retval = 0;
1190
1191#ifdef CONFIG_PNP
1192 retval = pnp_register_driver(&cmos_pnp_driver);
1193 if (retval == 0)
1194 pnp_driver_registered = true;
1195#endif
1196
1197 if (!cmos_rtc.dev) {
1198 retval = platform_driver_probe(&cmos_platform_driver,
1199 cmos_platform_probe);
1200 if (retval == 0)
1201 platform_driver_registered = true;
1202 }
1203
1204 dmi_check_system(rtc_quirks);
1205
1206 if (retval == 0)
1207 return 0;
1208
1209#ifdef CONFIG_PNP
1210 if (pnp_driver_registered)
1211 pnp_unregister_driver(&cmos_pnp_driver);
1212#endif
1213 return retval;
1214}
1215module_init(cmos_init);
1216
1217static void __exit cmos_exit(void)
1218{
1219#ifdef CONFIG_PNP
1220 if (pnp_driver_registered)
1221 pnp_unregister_driver(&cmos_pnp_driver);
1222#endif
1223 if (platform_driver_registered)
1224 platform_driver_unregister(&cmos_platform_driver);
1225}
1226module_exit(cmos_exit);
1227
1228
1229MODULE_AUTHOR("David Brownell");
1230MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1231MODULE_LICENSE("GPL");