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  1#ifndef _ASM_GENERIC_PGTABLE_H
  2#define _ASM_GENERIC_PGTABLE_H
  3
  4#ifndef __ASSEMBLY__
  5#ifdef CONFIG_MMU
  6
  7#include <linux/mm_types.h>
  8#include <linux/bug.h>
  9
 10/*
 11 * On almost all architectures and configurations, 0 can be used as the
 12 * upper ceiling to free_pgtables(): on many architectures it has the same
 13 * effect as using TASK_SIZE.  However, there is one configuration which
 14 * must impose a more careful limit, to avoid freeing kernel pgtables.
 15 */
 16#ifndef USER_PGTABLES_CEILING
 17#define USER_PGTABLES_CEILING	0UL
 18#endif
 19
 20#ifndef __HAVE_ARCH_PTEP_SET_ACCESS_FLAGS
 21extern int ptep_set_access_flags(struct vm_area_struct *vma,
 22				 unsigned long address, pte_t *ptep,
 23				 pte_t entry, int dirty);
 24#endif
 25
 26#ifndef __HAVE_ARCH_PMDP_SET_ACCESS_FLAGS
 27extern int pmdp_set_access_flags(struct vm_area_struct *vma,
 28				 unsigned long address, pmd_t *pmdp,
 29				 pmd_t entry, int dirty);
 30#endif
 31
 32#ifndef __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
 33static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
 34					    unsigned long address,
 35					    pte_t *ptep)
 36{
 37	pte_t pte = *ptep;
 38	int r = 1;
 39	if (!pte_young(pte))
 40		r = 0;
 41	else
 42		set_pte_at(vma->vm_mm, address, ptep, pte_mkold(pte));
 43	return r;
 44}
 45#endif
 46
 47#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
 48#ifdef CONFIG_TRANSPARENT_HUGEPAGE
 49static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 50					    unsigned long address,
 51					    pmd_t *pmdp)
 52{
 53	pmd_t pmd = *pmdp;
 54	int r = 1;
 55	if (!pmd_young(pmd))
 56		r = 0;
 57	else
 58		set_pmd_at(vma->vm_mm, address, pmdp, pmd_mkold(pmd));
 59	return r;
 60}
 61#else /* CONFIG_TRANSPARENT_HUGEPAGE */
 62static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
 63					    unsigned long address,
 64					    pmd_t *pmdp)
 65{
 66	BUG();
 67	return 0;
 68}
 69#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
 70#endif
 71
 72#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
 73int ptep_clear_flush_young(struct vm_area_struct *vma,
 74			   unsigned long address, pte_t *ptep);
 75#endif
 76
 77#ifndef __HAVE_ARCH_PMDP_CLEAR_YOUNG_FLUSH
 78int pmdp_clear_flush_young(struct vm_area_struct *vma,
 79			   unsigned long address, pmd_t *pmdp);
 80#endif
 81
 82#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
 83static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
 84				       unsigned long address,
 85				       pte_t *ptep)
 86{
 87	pte_t pte = *ptep;
 88	pte_clear(mm, address, ptep);
 89	return pte;
 90}
 91#endif
 92
 93#ifndef __HAVE_ARCH_PMDP_GET_AND_CLEAR
 94#ifdef CONFIG_TRANSPARENT_HUGEPAGE
 95static inline pmd_t pmdp_get_and_clear(struct mm_struct *mm,
 96				       unsigned long address,
 97				       pmd_t *pmdp)
 98{
 99	pmd_t pmd = *pmdp;
100	pmd_clear(pmdp);
101	return pmd;
102}
103#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
104#endif
105
106#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR_FULL
107static inline pte_t ptep_get_and_clear_full(struct mm_struct *mm,
108					    unsigned long address, pte_t *ptep,
109					    int full)
110{
111	pte_t pte;
112	pte = ptep_get_and_clear(mm, address, ptep);
113	return pte;
114}
115#endif
116
117/*
118 * Some architectures may be able to avoid expensive synchronization
119 * primitives when modifications are made to PTE's which are already
120 * not present, or in the process of an address space destruction.
121 */
122#ifndef __HAVE_ARCH_PTE_CLEAR_NOT_PRESENT_FULL
123static inline void pte_clear_not_present_full(struct mm_struct *mm,
124					      unsigned long address,
125					      pte_t *ptep,
126					      int full)
127{
128	pte_clear(mm, address, ptep);
129}
130#endif
131
132#ifndef __HAVE_ARCH_PTEP_CLEAR_FLUSH
133extern pte_t ptep_clear_flush(struct vm_area_struct *vma,
134			      unsigned long address,
135			      pte_t *ptep);
136#endif
137
138#ifndef __HAVE_ARCH_PMDP_CLEAR_FLUSH
139extern pmd_t pmdp_clear_flush(struct vm_area_struct *vma,
140			      unsigned long address,
141			      pmd_t *pmdp);
142#endif
143
144#ifndef __HAVE_ARCH_PTEP_SET_WRPROTECT
145struct mm_struct;
146static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long address, pte_t *ptep)
147{
148	pte_t old_pte = *ptep;
149	set_pte_at(mm, address, ptep, pte_wrprotect(old_pte));
150}
151#endif
152
153#ifndef __HAVE_ARCH_PMDP_SET_WRPROTECT
154#ifdef CONFIG_TRANSPARENT_HUGEPAGE
155static inline void pmdp_set_wrprotect(struct mm_struct *mm,
156				      unsigned long address, pmd_t *pmdp)
157{
158	pmd_t old_pmd = *pmdp;
159	set_pmd_at(mm, address, pmdp, pmd_wrprotect(old_pmd));
160}
161#else /* CONFIG_TRANSPARENT_HUGEPAGE */
162static inline void pmdp_set_wrprotect(struct mm_struct *mm,
163				      unsigned long address, pmd_t *pmdp)
164{
165	BUG();
166}
167#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
168#endif
169
170#ifndef __HAVE_ARCH_PMDP_SPLITTING_FLUSH
171extern void pmdp_splitting_flush(struct vm_area_struct *vma,
172				 unsigned long address, pmd_t *pmdp);
173#endif
174
175#ifndef __HAVE_ARCH_PGTABLE_DEPOSIT
176extern void pgtable_trans_huge_deposit(struct mm_struct *mm, pmd_t *pmdp,
177				       pgtable_t pgtable);
178#endif
179
180#ifndef __HAVE_ARCH_PGTABLE_WITHDRAW
181extern pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm, pmd_t *pmdp);
182#endif
183
184#ifndef __HAVE_ARCH_PMDP_INVALIDATE
185extern void pmdp_invalidate(struct vm_area_struct *vma, unsigned long address,
186			    pmd_t *pmdp);
187#endif
188
189#ifndef __HAVE_ARCH_PTE_SAME
190static inline int pte_same(pte_t pte_a, pte_t pte_b)
191{
192	return pte_val(pte_a) == pte_val(pte_b);
193}
194#endif
195
196#ifndef __HAVE_ARCH_PTE_UNUSED
197/*
198 * Some architectures provide facilities to virtualization guests
199 * so that they can flag allocated pages as unused. This allows the
200 * host to transparently reclaim unused pages. This function returns
201 * whether the pte's page is unused.
202 */
203static inline int pte_unused(pte_t pte)
204{
205	return 0;
206}
207#endif
208
209#ifndef __HAVE_ARCH_PMD_SAME
210#ifdef CONFIG_TRANSPARENT_HUGEPAGE
211static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
212{
213	return pmd_val(pmd_a) == pmd_val(pmd_b);
214}
215#else /* CONFIG_TRANSPARENT_HUGEPAGE */
216static inline int pmd_same(pmd_t pmd_a, pmd_t pmd_b)
217{
218	BUG();
219	return 0;
220}
221#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
222#endif
223
224#ifndef __HAVE_ARCH_PGD_OFFSET_GATE
225#define pgd_offset_gate(mm, addr)	pgd_offset(mm, addr)
226#endif
227
228#ifndef __HAVE_ARCH_MOVE_PTE
229#define move_pte(pte, prot, old_addr, new_addr)	(pte)
230#endif
231
232#ifndef pte_accessible
233# define pte_accessible(mm, pte)	((void)(pte), 1)
234#endif
235
236#ifndef flush_tlb_fix_spurious_fault
237#define flush_tlb_fix_spurious_fault(vma, address) flush_tlb_page(vma, address)
238#endif
239
240#ifndef pgprot_noncached
241#define pgprot_noncached(prot)	(prot)
242#endif
243
244#ifndef pgprot_writecombine
245#define pgprot_writecombine pgprot_noncached
246#endif
247
248/*
249 * When walking page tables, get the address of the next boundary,
250 * or the end address of the range if that comes earlier.  Although no
251 * vma end wraps to 0, rounded up __boundary may wrap to 0 throughout.
252 */
253
254#define pgd_addr_end(addr, end)						\
255({	unsigned long __boundary = ((addr) + PGDIR_SIZE) & PGDIR_MASK;	\
256	(__boundary - 1 < (end) - 1)? __boundary: (end);		\
257})
258
259#ifndef pud_addr_end
260#define pud_addr_end(addr, end)						\
261({	unsigned long __boundary = ((addr) + PUD_SIZE) & PUD_MASK;	\
262	(__boundary - 1 < (end) - 1)? __boundary: (end);		\
263})
264#endif
265
266#ifndef pmd_addr_end
267#define pmd_addr_end(addr, end)						\
268({	unsigned long __boundary = ((addr) + PMD_SIZE) & PMD_MASK;	\
269	(__boundary - 1 < (end) - 1)? __boundary: (end);		\
270})
271#endif
272
273/*
274 * When walking page tables, we usually want to skip any p?d_none entries;
275 * and any p?d_bad entries - reporting the error before resetting to none.
276 * Do the tests inline, but report and clear the bad entry in mm/memory.c.
277 */
278void pgd_clear_bad(pgd_t *);
279void pud_clear_bad(pud_t *);
280void pmd_clear_bad(pmd_t *);
281
282static inline int pgd_none_or_clear_bad(pgd_t *pgd)
283{
284	if (pgd_none(*pgd))
285		return 1;
286	if (unlikely(pgd_bad(*pgd))) {
287		pgd_clear_bad(pgd);
288		return 1;
289	}
290	return 0;
291}
292
293static inline int pud_none_or_clear_bad(pud_t *pud)
294{
295	if (pud_none(*pud))
296		return 1;
297	if (unlikely(pud_bad(*pud))) {
298		pud_clear_bad(pud);
299		return 1;
300	}
301	return 0;
302}
303
304static inline int pmd_none_or_clear_bad(pmd_t *pmd)
305{
306	if (pmd_none(*pmd))
307		return 1;
308	if (unlikely(pmd_bad(*pmd))) {
309		pmd_clear_bad(pmd);
310		return 1;
311	}
312	return 0;
313}
314
315static inline pte_t __ptep_modify_prot_start(struct mm_struct *mm,
316					     unsigned long addr,
317					     pte_t *ptep)
318{
319	/*
320	 * Get the current pte state, but zero it out to make it
321	 * non-present, preventing the hardware from asynchronously
322	 * updating it.
323	 */
324	return ptep_get_and_clear(mm, addr, ptep);
325}
326
327static inline void __ptep_modify_prot_commit(struct mm_struct *mm,
328					     unsigned long addr,
329					     pte_t *ptep, pte_t pte)
330{
331	/*
332	 * The pte is non-present, so there's no hardware state to
333	 * preserve.
334	 */
335	set_pte_at(mm, addr, ptep, pte);
336}
337
338#ifndef __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION
339/*
340 * Start a pte protection read-modify-write transaction, which
341 * protects against asynchronous hardware modifications to the pte.
342 * The intention is not to prevent the hardware from making pte
343 * updates, but to prevent any updates it may make from being lost.
344 *
345 * This does not protect against other software modifications of the
346 * pte; the appropriate pte lock must be held over the transation.
347 *
348 * Note that this interface is intended to be batchable, meaning that
349 * ptep_modify_prot_commit may not actually update the pte, but merely
350 * queue the update to be done at some later time.  The update must be
351 * actually committed before the pte lock is released, however.
352 */
353static inline pte_t ptep_modify_prot_start(struct mm_struct *mm,
354					   unsigned long addr,
355					   pte_t *ptep)
356{
357	return __ptep_modify_prot_start(mm, addr, ptep);
358}
359
360/*
361 * Commit an update to a pte, leaving any hardware-controlled bits in
362 * the PTE unmodified.
363 */
364static inline void ptep_modify_prot_commit(struct mm_struct *mm,
365					   unsigned long addr,
366					   pte_t *ptep, pte_t pte)
367{
368	__ptep_modify_prot_commit(mm, addr, ptep, pte);
369}
370#endif /* __HAVE_ARCH_PTEP_MODIFY_PROT_TRANSACTION */
371#endif /* CONFIG_MMU */
372
373/*
374 * A facility to provide lazy MMU batching.  This allows PTE updates and
375 * page invalidations to be delayed until a call to leave lazy MMU mode
376 * is issued.  Some architectures may benefit from doing this, and it is
377 * beneficial for both shadow and direct mode hypervisors, which may batch
378 * the PTE updates which happen during this window.  Note that using this
379 * interface requires that read hazards be removed from the code.  A read
380 * hazard could result in the direct mode hypervisor case, since the actual
381 * write to the page tables may not yet have taken place, so reads though
382 * a raw PTE pointer after it has been modified are not guaranteed to be
383 * up to date.  This mode can only be entered and left under the protection of
384 * the page table locks for all page tables which may be modified.  In the UP
385 * case, this is required so that preemption is disabled, and in the SMP case,
386 * it must synchronize the delayed page table writes properly on other CPUs.
387 */
388#ifndef __HAVE_ARCH_ENTER_LAZY_MMU_MODE
389#define arch_enter_lazy_mmu_mode()	do {} while (0)
390#define arch_leave_lazy_mmu_mode()	do {} while (0)
391#define arch_flush_lazy_mmu_mode()	do {} while (0)
392#endif
393
394/*
395 * A facility to provide batching of the reload of page tables and
396 * other process state with the actual context switch code for
397 * paravirtualized guests.  By convention, only one of the batched
398 * update (lazy) modes (CPU, MMU) should be active at any given time,
399 * entry should never be nested, and entry and exits should always be
400 * paired.  This is for sanity of maintaining and reasoning about the
401 * kernel code.  In this case, the exit (end of the context switch) is
402 * in architecture-specific code, and so doesn't need a generic
403 * definition.
404 */
405#ifndef __HAVE_ARCH_START_CONTEXT_SWITCH
406#define arch_start_context_switch(prev)	do {} while (0)
407#endif
408
409#ifndef CONFIG_HAVE_ARCH_SOFT_DIRTY
410static inline int pte_soft_dirty(pte_t pte)
411{
412	return 0;
413}
414
415static inline int pmd_soft_dirty(pmd_t pmd)
416{
417	return 0;
418}
419
420static inline pte_t pte_mksoft_dirty(pte_t pte)
421{
422	return pte;
423}
424
425static inline pmd_t pmd_mksoft_dirty(pmd_t pmd)
426{
427	return pmd;
428}
429
430static inline pte_t pte_swp_mksoft_dirty(pte_t pte)
431{
432	return pte;
433}
434
435static inline int pte_swp_soft_dirty(pte_t pte)
436{
437	return 0;
438}
439
440static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
441{
442	return pte;
443}
444
445static inline pte_t pte_file_clear_soft_dirty(pte_t pte)
446{
447       return pte;
448}
449
450static inline pte_t pte_file_mksoft_dirty(pte_t pte)
451{
452       return pte;
453}
454
455static inline int pte_file_soft_dirty(pte_t pte)
456{
457       return 0;
458}
459#endif
460
461#ifndef __HAVE_PFNMAP_TRACKING
462/*
463 * Interfaces that can be used by architecture code to keep track of
464 * memory type of pfn mappings specified by the remap_pfn_range,
465 * vm_insert_pfn.
466 */
467
468/*
469 * track_pfn_remap is called when a _new_ pfn mapping is being established
470 * by remap_pfn_range() for physical range indicated by pfn and size.
471 */
472static inline int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
473				  unsigned long pfn, unsigned long addr,
474				  unsigned long size)
475{
476	return 0;
477}
478
479/*
480 * track_pfn_insert is called when a _new_ single pfn is established
481 * by vm_insert_pfn().
482 */
483static inline int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
484				   unsigned long pfn)
485{
486	return 0;
487}
488
489/*
490 * track_pfn_copy is called when vma that is covering the pfnmap gets
491 * copied through copy_page_range().
492 */
493static inline int track_pfn_copy(struct vm_area_struct *vma)
494{
495	return 0;
496}
497
498/*
499 * untrack_pfn_vma is called while unmapping a pfnmap for a region.
500 * untrack can be called for a specific region indicated by pfn and size or
501 * can be for the entire vma (in which case pfn, size are zero).
502 */
503static inline void untrack_pfn(struct vm_area_struct *vma,
504			       unsigned long pfn, unsigned long size)
505{
506}
507#else
508extern int track_pfn_remap(struct vm_area_struct *vma, pgprot_t *prot,
509			   unsigned long pfn, unsigned long addr,
510			   unsigned long size);
511extern int track_pfn_insert(struct vm_area_struct *vma, pgprot_t *prot,
512			    unsigned long pfn);
513extern int track_pfn_copy(struct vm_area_struct *vma);
514extern void untrack_pfn(struct vm_area_struct *vma, unsigned long pfn,
515			unsigned long size);
516#endif
517
518#ifdef __HAVE_COLOR_ZERO_PAGE
519static inline int is_zero_pfn(unsigned long pfn)
520{
521	extern unsigned long zero_pfn;
522	unsigned long offset_from_zero_pfn = pfn - zero_pfn;
523	return offset_from_zero_pfn <= (zero_page_mask >> PAGE_SHIFT);
524}
525
526#define my_zero_pfn(addr)	page_to_pfn(ZERO_PAGE(addr))
527
528#else
529static inline int is_zero_pfn(unsigned long pfn)
530{
531	extern unsigned long zero_pfn;
532	return pfn == zero_pfn;
533}
534
535static inline unsigned long my_zero_pfn(unsigned long addr)
536{
537	extern unsigned long zero_pfn;
538	return zero_pfn;
539}
540#endif
541
542#ifdef CONFIG_MMU
543
544#ifndef CONFIG_TRANSPARENT_HUGEPAGE
545static inline int pmd_trans_huge(pmd_t pmd)
546{
547	return 0;
548}
549static inline int pmd_trans_splitting(pmd_t pmd)
550{
551	return 0;
552}
553#ifndef __HAVE_ARCH_PMD_WRITE
554static inline int pmd_write(pmd_t pmd)
555{
556	BUG();
557	return 0;
558}
559#endif /* __HAVE_ARCH_PMD_WRITE */
560#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
561
562#ifndef pmd_read_atomic
563static inline pmd_t pmd_read_atomic(pmd_t *pmdp)
564{
565	/*
566	 * Depend on compiler for an atomic pmd read. NOTE: this is
567	 * only going to work, if the pmdval_t isn't larger than
568	 * an unsigned long.
569	 */
570	return *pmdp;
571}
572#endif
573
574#ifndef pmd_move_must_withdraw
575static inline int pmd_move_must_withdraw(spinlock_t *new_pmd_ptl,
576					 spinlock_t *old_pmd_ptl)
577{
578	/*
579	 * With split pmd lock we also need to move preallocated
580	 * PTE page table if new_pmd is on different PMD page table.
581	 */
582	return new_pmd_ptl != old_pmd_ptl;
583}
584#endif
585
586/*
587 * This function is meant to be used by sites walking pagetables with
588 * the mmap_sem hold in read mode to protect against MADV_DONTNEED and
589 * transhuge page faults. MADV_DONTNEED can convert a transhuge pmd
590 * into a null pmd and the transhuge page fault can convert a null pmd
591 * into an hugepmd or into a regular pmd (if the hugepage allocation
592 * fails). While holding the mmap_sem in read mode the pmd becomes
593 * stable and stops changing under us only if it's not null and not a
594 * transhuge pmd. When those races occurs and this function makes a
595 * difference vs the standard pmd_none_or_clear_bad, the result is
596 * undefined so behaving like if the pmd was none is safe (because it
597 * can return none anyway). The compiler level barrier() is critically
598 * important to compute the two checks atomically on the same pmdval.
599 *
600 * For 32bit kernels with a 64bit large pmd_t this automatically takes
601 * care of reading the pmd atomically to avoid SMP race conditions
602 * against pmd_populate() when the mmap_sem is hold for reading by the
603 * caller (a special atomic read not done by "gcc" as in the generic
604 * version above, is also needed when THP is disabled because the page
605 * fault can populate the pmd from under us).
606 */
607static inline int pmd_none_or_trans_huge_or_clear_bad(pmd_t *pmd)
608{
609	pmd_t pmdval = pmd_read_atomic(pmd);
610	/*
611	 * The barrier will stabilize the pmdval in a register or on
612	 * the stack so that it will stop changing under the code.
613	 *
614	 * When CONFIG_TRANSPARENT_HUGEPAGE=y on x86 32bit PAE,
615	 * pmd_read_atomic is allowed to return a not atomic pmdval
616	 * (for example pointing to an hugepage that has never been
617	 * mapped in the pmd). The below checks will only care about
618	 * the low part of the pmd with 32bit PAE x86 anyway, with the
619	 * exception of pmd_none(). So the important thing is that if
620	 * the low part of the pmd is found null, the high part will
621	 * be also null or the pmd_none() check below would be
622	 * confused.
623	 */
624#ifdef CONFIG_TRANSPARENT_HUGEPAGE
625	barrier();
626#endif
627	if (pmd_none(pmdval) || pmd_trans_huge(pmdval))
628		return 1;
629	if (unlikely(pmd_bad(pmdval))) {
630		pmd_clear_bad(pmd);
631		return 1;
632	}
633	return 0;
634}
635
636/*
637 * This is a noop if Transparent Hugepage Support is not built into
638 * the kernel. Otherwise it is equivalent to
639 * pmd_none_or_trans_huge_or_clear_bad(), and shall only be called in
640 * places that already verified the pmd is not none and they want to
641 * walk ptes while holding the mmap sem in read mode (write mode don't
642 * need this). If THP is not enabled, the pmd can't go away under the
643 * code even if MADV_DONTNEED runs, but if THP is enabled we need to
644 * run a pmd_trans_unstable before walking the ptes after
645 * split_huge_page_pmd returns (because it may have run when the pmd
646 * become null, but then a page fault can map in a THP and not a
647 * regular page).
648 */
649static inline int pmd_trans_unstable(pmd_t *pmd)
650{
651#ifdef CONFIG_TRANSPARENT_HUGEPAGE
652	return pmd_none_or_trans_huge_or_clear_bad(pmd);
653#else
654	return 0;
655#endif
656}
657
658#ifdef CONFIG_NUMA_BALANCING
659#ifdef CONFIG_ARCH_USES_NUMA_PROT_NONE
660/*
661 * _PAGE_NUMA works identical to _PAGE_PROTNONE (it's actually the
662 * same bit too). It's set only when _PAGE_PRESET is not set and it's
663 * never set if _PAGE_PRESENT is set.
664 *
665 * pte/pmd_present() returns true if pte/pmd_numa returns true. Page
666 * fault triggers on those regions if pte/pmd_numa returns true
667 * (because _PAGE_PRESENT is not set).
668 */
669#ifndef pte_numa
670static inline int pte_numa(pte_t pte)
671{
672	return (pte_flags(pte) &
673		(_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
674}
675#endif
676
677#ifndef pmd_numa
678static inline int pmd_numa(pmd_t pmd)
679{
680	return (pmd_flags(pmd) &
681		(_PAGE_NUMA|_PAGE_PRESENT)) == _PAGE_NUMA;
682}
683#endif
684
685/*
686 * pte/pmd_mknuma sets the _PAGE_ACCESSED bitflag automatically
687 * because they're called by the NUMA hinting minor page fault. If we
688 * wouldn't set the _PAGE_ACCESSED bitflag here, the TLB miss handler
689 * would be forced to set it later while filling the TLB after we
690 * return to userland. That would trigger a second write to memory
691 * that we optimize away by setting _PAGE_ACCESSED here.
692 */
693#ifndef pte_mknonnuma
694static inline pte_t pte_mknonnuma(pte_t pte)
695{
696	pteval_t val = pte_val(pte);
697
698	val &= ~_PAGE_NUMA;
699	val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
700	return __pte(val);
701}
702#endif
703
704#ifndef pmd_mknonnuma
705static inline pmd_t pmd_mknonnuma(pmd_t pmd)
706{
707	pmdval_t val = pmd_val(pmd);
708
709	val &= ~_PAGE_NUMA;
710	val |= (_PAGE_PRESENT|_PAGE_ACCESSED);
711
712	return __pmd(val);
713}
714#endif
715
716#ifndef pte_mknuma
717static inline pte_t pte_mknuma(pte_t pte)
718{
719	pteval_t val = pte_val(pte);
720
721	val &= ~_PAGE_PRESENT;
722	val |= _PAGE_NUMA;
723
724	return __pte(val);
725}
726#endif
727
728#ifndef ptep_set_numa
729static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
730				 pte_t *ptep)
731{
732	pte_t ptent = *ptep;
733
734	ptent = pte_mknuma(ptent);
735	set_pte_at(mm, addr, ptep, ptent);
736	return;
737}
738#endif
739
740#ifndef pmd_mknuma
741static inline pmd_t pmd_mknuma(pmd_t pmd)
742{
743	pmdval_t val = pmd_val(pmd);
744
745	val &= ~_PAGE_PRESENT;
746	val |= _PAGE_NUMA;
747
748	return __pmd(val);
749}
750#endif
751
752#ifndef pmdp_set_numa
753static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
754				 pmd_t *pmdp)
755{
756	pmd_t pmd = *pmdp;
757
758	pmd = pmd_mknuma(pmd);
759	set_pmd_at(mm, addr, pmdp, pmd);
760	return;
761}
762#endif
763#else
764extern int pte_numa(pte_t pte);
765extern int pmd_numa(pmd_t pmd);
766extern pte_t pte_mknonnuma(pte_t pte);
767extern pmd_t pmd_mknonnuma(pmd_t pmd);
768extern pte_t pte_mknuma(pte_t pte);
769extern pmd_t pmd_mknuma(pmd_t pmd);
770extern void ptep_set_numa(struct mm_struct *mm, unsigned long addr, pte_t *ptep);
771extern void pmdp_set_numa(struct mm_struct *mm, unsigned long addr, pmd_t *pmdp);
772#endif /* CONFIG_ARCH_USES_NUMA_PROT_NONE */
773#else
774static inline int pmd_numa(pmd_t pmd)
775{
776	return 0;
777}
778
779static inline int pte_numa(pte_t pte)
780{
781	return 0;
782}
783
784static inline pte_t pte_mknonnuma(pte_t pte)
785{
786	return pte;
787}
788
789static inline pmd_t pmd_mknonnuma(pmd_t pmd)
790{
791	return pmd;
792}
793
794static inline pte_t pte_mknuma(pte_t pte)
795{
796	return pte;
797}
798
799static inline void ptep_set_numa(struct mm_struct *mm, unsigned long addr,
800				 pte_t *ptep)
801{
802	return;
803}
804
805
806static inline pmd_t pmd_mknuma(pmd_t pmd)
807{
808	return pmd;
809}
810
811static inline void pmdp_set_numa(struct mm_struct *mm, unsigned long addr,
812				 pmd_t *pmdp)
813{
814	return ;
815}
816#endif /* CONFIG_NUMA_BALANCING */
817
818#endif /* CONFIG_MMU */
819
820#endif /* !__ASSEMBLY__ */
821
822#ifndef io_remap_pfn_range
823#define io_remap_pfn_range remap_pfn_range
824#endif
825
826#endif /* _ASM_GENERIC_PGTABLE_H */