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1/*
2 * SMP related functions
3 *
4 * Copyright IBM Corp. 1999, 2012
5 * Author(s): Denis Joseph Barrow,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Heiko Carstens <heiko.carstens@de.ibm.com>,
8 *
9 * based on other smp stuff by
10 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
11 * (c) 1998 Ingo Molnar
12 *
13 * The code outside of smp.c uses logical cpu numbers, only smp.c does
14 * the translation of logical to physical cpu ids. All new code that
15 * operates on physical cpu numbers needs to go into smp.c.
16 */
17
18#define KMSG_COMPONENT "cpu"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
21#include <linux/workqueue.h>
22#include <linux/bootmem.h>
23#include <linux/module.h>
24#include <linux/init.h>
25#include <linux/mm.h>
26#include <linux/err.h>
27#include <linux/spinlock.h>
28#include <linux/kernel_stat.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/irqflags.h>
32#include <linux/cpu.h>
33#include <linux/slab.h>
34#include <linux/crash_dump.h>
35#include <linux/memblock.h>
36#include <asm/asm-offsets.h>
37#include <asm/diag.h>
38#include <asm/switch_to.h>
39#include <asm/facility.h>
40#include <asm/ipl.h>
41#include <asm/setup.h>
42#include <asm/irq.h>
43#include <asm/tlbflush.h>
44#include <asm/vtimer.h>
45#include <asm/lowcore.h>
46#include <asm/sclp.h>
47#include <asm/vdso.h>
48#include <asm/debug.h>
49#include <asm/os_info.h>
50#include <asm/sigp.h>
51#include <asm/idle.h>
52#include "entry.h"
53
54enum {
55 ec_schedule = 0,
56 ec_call_function_single,
57 ec_stop_cpu,
58};
59
60enum {
61 CPU_STATE_STANDBY,
62 CPU_STATE_CONFIGURED,
63};
64
65static DEFINE_PER_CPU(struct cpu *, cpu_device);
66
67struct pcpu {
68 struct lowcore *lowcore; /* lowcore page(s) for the cpu */
69 unsigned long ec_mask; /* bit mask for ec_xxx functions */
70 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
71 signed char state; /* physical cpu state */
72 signed char polarization; /* physical polarization */
73 u16 address; /* physical cpu address */
74};
75
76static u8 boot_core_type;
77static struct pcpu pcpu_devices[NR_CPUS];
78
79unsigned int smp_cpu_mt_shift;
80EXPORT_SYMBOL(smp_cpu_mt_shift);
81
82unsigned int smp_cpu_mtid;
83EXPORT_SYMBOL(smp_cpu_mtid);
84
85#ifdef CONFIG_CRASH_DUMP
86__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
87#endif
88
89static unsigned int smp_max_threads __initdata = -1U;
90
91static int __init early_nosmt(char *s)
92{
93 smp_max_threads = 1;
94 return 0;
95}
96early_param("nosmt", early_nosmt);
97
98static int __init early_smt(char *s)
99{
100 get_option(&s, &smp_max_threads);
101 return 0;
102}
103early_param("smt", early_smt);
104
105/*
106 * The smp_cpu_state_mutex must be held when changing the state or polarization
107 * member of a pcpu data structure within the pcpu_devices arreay.
108 */
109DEFINE_MUTEX(smp_cpu_state_mutex);
110
111/*
112 * Signal processor helper functions.
113 */
114static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
115{
116 int cc;
117
118 while (1) {
119 cc = __pcpu_sigp(addr, order, parm, NULL);
120 if (cc != SIGP_CC_BUSY)
121 return cc;
122 cpu_relax();
123 }
124}
125
126static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
127{
128 int cc, retry;
129
130 for (retry = 0; ; retry++) {
131 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
132 if (cc != SIGP_CC_BUSY)
133 break;
134 if (retry >= 3)
135 udelay(10);
136 }
137 return cc;
138}
139
140static inline int pcpu_stopped(struct pcpu *pcpu)
141{
142 u32 uninitialized_var(status);
143
144 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
145 0, &status) != SIGP_CC_STATUS_STORED)
146 return 0;
147 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
148}
149
150static inline int pcpu_running(struct pcpu *pcpu)
151{
152 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
153 0, NULL) != SIGP_CC_STATUS_STORED)
154 return 1;
155 /* Status stored condition code is equivalent to cpu not running. */
156 return 0;
157}
158
159/*
160 * Find struct pcpu by cpu address.
161 */
162static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
163{
164 int cpu;
165
166 for_each_cpu(cpu, mask)
167 if (pcpu_devices[cpu].address == address)
168 return pcpu_devices + cpu;
169 return NULL;
170}
171
172static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
173{
174 int order;
175
176 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
177 return;
178 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
179 pcpu->ec_clk = get_tod_clock_fast();
180 pcpu_sigp_retry(pcpu, order, 0);
181}
182
183#define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
184#define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
185
186static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
187{
188 unsigned long async_stack, panic_stack;
189 struct lowcore *lc;
190
191 if (pcpu != &pcpu_devices[0]) {
192 pcpu->lowcore = (struct lowcore *)
193 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
194 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
195 panic_stack = __get_free_page(GFP_KERNEL);
196 if (!pcpu->lowcore || !panic_stack || !async_stack)
197 goto out;
198 } else {
199 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
200 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
201 }
202 lc = pcpu->lowcore;
203 memcpy(lc, &S390_lowcore, 512);
204 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
205 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
206 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
207 lc->cpu_nr = cpu;
208 lc->spinlock_lockval = arch_spin_lockval(cpu);
209 if (MACHINE_HAS_VX)
210 lc->vector_save_area_addr =
211 (unsigned long) &lc->vector_save_area;
212 if (vdso_alloc_per_cpu(lc))
213 goto out;
214 lowcore_ptr[cpu] = lc;
215 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
216 return 0;
217out:
218 if (pcpu != &pcpu_devices[0]) {
219 free_page(panic_stack);
220 free_pages(async_stack, ASYNC_ORDER);
221 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
222 }
223 return -ENOMEM;
224}
225
226#ifdef CONFIG_HOTPLUG_CPU
227
228static void pcpu_free_lowcore(struct pcpu *pcpu)
229{
230 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
231 lowcore_ptr[pcpu - pcpu_devices] = NULL;
232 vdso_free_per_cpu(pcpu->lowcore);
233 if (pcpu == &pcpu_devices[0])
234 return;
235 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
236 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
237 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
238}
239
240#endif /* CONFIG_HOTPLUG_CPU */
241
242static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
243{
244 struct lowcore *lc = pcpu->lowcore;
245
246 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
247 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
248 lc->cpu_nr = cpu;
249 lc->spinlock_lockval = arch_spin_lockval(cpu);
250 lc->percpu_offset = __per_cpu_offset[cpu];
251 lc->kernel_asce = S390_lowcore.kernel_asce;
252 lc->machine_flags = S390_lowcore.machine_flags;
253 lc->user_timer = lc->system_timer = lc->steal_timer = 0;
254 __ctl_store(lc->cregs_save_area, 0, 15);
255 save_access_regs((unsigned int *) lc->access_regs_save_area);
256 memcpy(lc->stfle_fac_list, S390_lowcore.stfle_fac_list,
257 MAX_FACILITY_BIT/8);
258}
259
260static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
261{
262 struct lowcore *lc = pcpu->lowcore;
263
264 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
265 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
266 lc->current_task = (unsigned long) tsk;
267 lc->lpp = LPP_MAGIC;
268 lc->current_pid = tsk->pid;
269 lc->user_timer = tsk->thread.user_timer;
270 lc->system_timer = tsk->thread.system_timer;
271 lc->steal_timer = 0;
272}
273
274static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
275{
276 struct lowcore *lc = pcpu->lowcore;
277
278 lc->restart_stack = lc->kernel_stack;
279 lc->restart_fn = (unsigned long) func;
280 lc->restart_data = (unsigned long) data;
281 lc->restart_source = -1UL;
282 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
283}
284
285/*
286 * Call function via PSW restart on pcpu and stop the current cpu.
287 */
288static void pcpu_delegate(struct pcpu *pcpu, void (*func)(void *),
289 void *data, unsigned long stack)
290{
291 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
292 unsigned long source_cpu = stap();
293
294 __load_psw_mask(PSW_KERNEL_BITS);
295 if (pcpu->address == source_cpu)
296 func(data); /* should not return */
297 /* Stop target cpu (if func returns this stops the current cpu). */
298 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
299 /* Restart func on the target cpu and stop the current cpu. */
300 mem_assign_absolute(lc->restart_stack, stack);
301 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
302 mem_assign_absolute(lc->restart_data, (unsigned long) data);
303 mem_assign_absolute(lc->restart_source, source_cpu);
304 asm volatile(
305 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
306 " brc 2,0b # busy, try again\n"
307 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
308 " brc 2,1b # busy, try again\n"
309 : : "d" (pcpu->address), "d" (source_cpu),
310 "K" (SIGP_RESTART), "K" (SIGP_STOP)
311 : "0", "1", "cc");
312 for (;;) ;
313}
314
315/*
316 * Enable additional logical cpus for multi-threading.
317 */
318static int pcpu_set_smt(unsigned int mtid)
319{
320 int cc;
321
322 if (smp_cpu_mtid == mtid)
323 return 0;
324 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
325 if (cc == 0) {
326 smp_cpu_mtid = mtid;
327 smp_cpu_mt_shift = 0;
328 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
329 smp_cpu_mt_shift++;
330 pcpu_devices[0].address = stap();
331 }
332 return cc;
333}
334
335/*
336 * Call function on an online CPU.
337 */
338void smp_call_online_cpu(void (*func)(void *), void *data)
339{
340 struct pcpu *pcpu;
341
342 /* Use the current cpu if it is online. */
343 pcpu = pcpu_find_address(cpu_online_mask, stap());
344 if (!pcpu)
345 /* Use the first online cpu. */
346 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
347 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
348}
349
350/*
351 * Call function on the ipl CPU.
352 */
353void smp_call_ipl_cpu(void (*func)(void *), void *data)
354{
355 pcpu_delegate(&pcpu_devices[0], func, data,
356 pcpu_devices->lowcore->panic_stack -
357 PANIC_FRAME_OFFSET + PAGE_SIZE);
358}
359
360int smp_find_processor_id(u16 address)
361{
362 int cpu;
363
364 for_each_present_cpu(cpu)
365 if (pcpu_devices[cpu].address == address)
366 return cpu;
367 return -1;
368}
369
370bool arch_vcpu_is_preempted(int cpu)
371{
372 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
373 return false;
374 if (pcpu_running(pcpu_devices + cpu))
375 return false;
376 return true;
377}
378EXPORT_SYMBOL(arch_vcpu_is_preempted);
379
380void smp_yield_cpu(int cpu)
381{
382 if (MACHINE_HAS_DIAG9C) {
383 diag_stat_inc_norecursion(DIAG_STAT_X09C);
384 asm volatile("diag %0,0,0x9c"
385 : : "d" (pcpu_devices[cpu].address));
386 } else if (MACHINE_HAS_DIAG44) {
387 diag_stat_inc_norecursion(DIAG_STAT_X044);
388 asm volatile("diag 0,0,0x44");
389 }
390}
391
392/*
393 * Send cpus emergency shutdown signal. This gives the cpus the
394 * opportunity to complete outstanding interrupts.
395 */
396static void smp_emergency_stop(cpumask_t *cpumask)
397{
398 u64 end;
399 int cpu;
400
401 end = get_tod_clock() + (1000000UL << 12);
402 for_each_cpu(cpu, cpumask) {
403 struct pcpu *pcpu = pcpu_devices + cpu;
404 set_bit(ec_stop_cpu, &pcpu->ec_mask);
405 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
406 0, NULL) == SIGP_CC_BUSY &&
407 get_tod_clock() < end)
408 cpu_relax();
409 }
410 while (get_tod_clock() < end) {
411 for_each_cpu(cpu, cpumask)
412 if (pcpu_stopped(pcpu_devices + cpu))
413 cpumask_clear_cpu(cpu, cpumask);
414 if (cpumask_empty(cpumask))
415 break;
416 cpu_relax();
417 }
418}
419
420/*
421 * Stop all cpus but the current one.
422 */
423void smp_send_stop(void)
424{
425 cpumask_t cpumask;
426 int cpu;
427
428 /* Disable all interrupts/machine checks */
429 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
430 trace_hardirqs_off();
431
432 debug_set_critical();
433 cpumask_copy(&cpumask, cpu_online_mask);
434 cpumask_clear_cpu(smp_processor_id(), &cpumask);
435
436 if (oops_in_progress)
437 smp_emergency_stop(&cpumask);
438
439 /* stop all processors */
440 for_each_cpu(cpu, &cpumask) {
441 struct pcpu *pcpu = pcpu_devices + cpu;
442 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
443 while (!pcpu_stopped(pcpu))
444 cpu_relax();
445 }
446}
447
448/*
449 * This is the main routine where commands issued by other
450 * cpus are handled.
451 */
452static void smp_handle_ext_call(void)
453{
454 unsigned long bits;
455
456 /* handle bit signal external calls */
457 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
458 if (test_bit(ec_stop_cpu, &bits))
459 smp_stop_cpu();
460 if (test_bit(ec_schedule, &bits))
461 scheduler_ipi();
462 if (test_bit(ec_call_function_single, &bits))
463 generic_smp_call_function_single_interrupt();
464}
465
466static void do_ext_call_interrupt(struct ext_code ext_code,
467 unsigned int param32, unsigned long param64)
468{
469 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
470 smp_handle_ext_call();
471}
472
473void arch_send_call_function_ipi_mask(const struct cpumask *mask)
474{
475 int cpu;
476
477 for_each_cpu(cpu, mask)
478 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
479}
480
481void arch_send_call_function_single_ipi(int cpu)
482{
483 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
484}
485
486/*
487 * this function sends a 'reschedule' IPI to another CPU.
488 * it goes straight through and wastes no time serializing
489 * anything. Worst case is that we lose a reschedule ...
490 */
491void smp_send_reschedule(int cpu)
492{
493 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
494}
495
496/*
497 * parameter area for the set/clear control bit callbacks
498 */
499struct ec_creg_mask_parms {
500 unsigned long orval;
501 unsigned long andval;
502 int cr;
503};
504
505/*
506 * callback for setting/clearing control bits
507 */
508static void smp_ctl_bit_callback(void *info)
509{
510 struct ec_creg_mask_parms *pp = info;
511 unsigned long cregs[16];
512
513 __ctl_store(cregs, 0, 15);
514 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
515 __ctl_load(cregs, 0, 15);
516}
517
518/*
519 * Set a bit in a control register of all cpus
520 */
521void smp_ctl_set_bit(int cr, int bit)
522{
523 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
524
525 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
526}
527EXPORT_SYMBOL(smp_ctl_set_bit);
528
529/*
530 * Clear a bit in a control register of all cpus
531 */
532void smp_ctl_clear_bit(int cr, int bit)
533{
534 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
535
536 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
537}
538EXPORT_SYMBOL(smp_ctl_clear_bit);
539
540#ifdef CONFIG_CRASH_DUMP
541
542int smp_store_status(int cpu)
543{
544 struct pcpu *pcpu = pcpu_devices + cpu;
545 unsigned long pa;
546
547 pa = __pa(&pcpu->lowcore->floating_pt_save_area);
548 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
549 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
550 return -EIO;
551 if (!MACHINE_HAS_VX)
552 return 0;
553 pa = __pa(pcpu->lowcore->vector_save_area_addr);
554 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
555 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
556 return -EIO;
557 return 0;
558}
559
560/*
561 * Collect CPU state of the previous, crashed system.
562 * There are four cases:
563 * 1) standard zfcp dump
564 * condition: OLDMEM_BASE == NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
565 * The state for all CPUs except the boot CPU needs to be collected
566 * with sigp stop-and-store-status. The boot CPU state is located in
567 * the absolute lowcore of the memory stored in the HSA. The zcore code
568 * will copy the boot CPU state from the HSA.
569 * 2) stand-alone kdump for SCSI (zfcp dump with swapped memory)
570 * condition: OLDMEM_BASE != NULL && ipl_info.type == IPL_TYPE_FCP_DUMP
571 * The state for all CPUs except the boot CPU needs to be collected
572 * with sigp stop-and-store-status. The firmware or the boot-loader
573 * stored the registers of the boot CPU in the absolute lowcore in the
574 * memory of the old system.
575 * 3) kdump and the old kernel did not store the CPU state,
576 * or stand-alone kdump for DASD
577 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
578 * The state for all CPUs except the boot CPU needs to be collected
579 * with sigp stop-and-store-status. The kexec code or the boot-loader
580 * stored the registers of the boot CPU in the memory of the old system.
581 * 4) kdump and the old kernel stored the CPU state
582 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
583 * This case does not exist for s390 anymore, setup_arch explicitly
584 * deactivates the elfcorehdr= kernel parameter
585 */
586static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
587 bool is_boot_cpu, unsigned long page)
588{
589 __vector128 *vxrs = (__vector128 *) page;
590
591 if (is_boot_cpu)
592 vxrs = boot_cpu_vector_save_area;
593 else
594 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
595 save_area_add_vxrs(sa, vxrs);
596}
597
598static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
599 bool is_boot_cpu, unsigned long page)
600{
601 void *regs = (void *) page;
602
603 if (is_boot_cpu)
604 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
605 else
606 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
607 save_area_add_regs(sa, regs);
608}
609
610void __init smp_save_dump_cpus(void)
611{
612 int addr, boot_cpu_addr, max_cpu_addr;
613 struct save_area *sa;
614 unsigned long page;
615 bool is_boot_cpu;
616
617 if (!(OLDMEM_BASE || ipl_info.type == IPL_TYPE_FCP_DUMP))
618 /* No previous system present, normal boot. */
619 return;
620 /* Allocate a page as dumping area for the store status sigps */
621 page = memblock_alloc_base(PAGE_SIZE, PAGE_SIZE, 1UL << 31);
622 /* Set multi-threading state to the previous system. */
623 pcpu_set_smt(sclp.mtid_prev);
624 boot_cpu_addr = stap();
625 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
626 for (addr = 0; addr <= max_cpu_addr; addr++) {
627 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
628 SIGP_CC_NOT_OPERATIONAL)
629 continue;
630 is_boot_cpu = (addr == boot_cpu_addr);
631 /* Allocate save area */
632 sa = save_area_alloc(is_boot_cpu);
633 if (!sa)
634 panic("could not allocate memory for save area\n");
635 if (MACHINE_HAS_VX)
636 /* Get the vector registers */
637 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
638 /*
639 * For a zfcp dump OLDMEM_BASE == NULL and the registers
640 * of the boot CPU are stored in the HSA. To retrieve
641 * these registers an SCLP request is required which is
642 * done by drivers/s390/char/zcore.c:init_cpu_info()
643 */
644 if (!is_boot_cpu || OLDMEM_BASE)
645 /* Get the CPU registers */
646 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
647 }
648 memblock_free(page, PAGE_SIZE);
649 diag308_reset();
650 pcpu_set_smt(0);
651}
652#endif /* CONFIG_CRASH_DUMP */
653
654void smp_cpu_set_polarization(int cpu, int val)
655{
656 pcpu_devices[cpu].polarization = val;
657}
658
659int smp_cpu_get_polarization(int cpu)
660{
661 return pcpu_devices[cpu].polarization;
662}
663
664static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
665{
666 static int use_sigp_detection;
667 int address;
668
669 if (use_sigp_detection || sclp_get_core_info(info, early)) {
670 use_sigp_detection = 1;
671 for (address = 0;
672 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
673 address += (1U << smp_cpu_mt_shift)) {
674 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
675 SIGP_CC_NOT_OPERATIONAL)
676 continue;
677 info->core[info->configured].core_id =
678 address >> smp_cpu_mt_shift;
679 info->configured++;
680 }
681 info->combined = info->configured;
682 }
683}
684
685static int smp_add_present_cpu(int cpu);
686
687static int __smp_rescan_cpus(struct sclp_core_info *info, int sysfs_add)
688{
689 struct pcpu *pcpu;
690 cpumask_t avail;
691 int cpu, nr, i, j;
692 u16 address;
693
694 nr = 0;
695 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
696 cpu = cpumask_first(&avail);
697 for (i = 0; (i < info->combined) && (cpu < nr_cpu_ids); i++) {
698 if (sclp.has_core_type && info->core[i].type != boot_core_type)
699 continue;
700 address = info->core[i].core_id << smp_cpu_mt_shift;
701 for (j = 0; j <= smp_cpu_mtid; j++) {
702 if (pcpu_find_address(cpu_present_mask, address + j))
703 continue;
704 pcpu = pcpu_devices + cpu;
705 pcpu->address = address + j;
706 pcpu->state =
707 (cpu >= info->configured*(smp_cpu_mtid + 1)) ?
708 CPU_STATE_STANDBY : CPU_STATE_CONFIGURED;
709 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
710 set_cpu_present(cpu, true);
711 if (sysfs_add && smp_add_present_cpu(cpu) != 0)
712 set_cpu_present(cpu, false);
713 else
714 nr++;
715 cpu = cpumask_next(cpu, &avail);
716 if (cpu >= nr_cpu_ids)
717 break;
718 }
719 }
720 return nr;
721}
722
723void __init smp_detect_cpus(void)
724{
725 unsigned int cpu, mtid, c_cpus, s_cpus;
726 struct sclp_core_info *info;
727 u16 address;
728
729 /* Get CPU information */
730 info = memblock_virt_alloc(sizeof(*info), 8);
731 smp_get_core_info(info, 1);
732 /* Find boot CPU type */
733 if (sclp.has_core_type) {
734 address = stap();
735 for (cpu = 0; cpu < info->combined; cpu++)
736 if (info->core[cpu].core_id == address) {
737 /* The boot cpu dictates the cpu type. */
738 boot_core_type = info->core[cpu].type;
739 break;
740 }
741 if (cpu >= info->combined)
742 panic("Could not find boot CPU type");
743 }
744
745 /* Set multi-threading state for the current system */
746 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
747 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
748 pcpu_set_smt(mtid);
749
750 /* Print number of CPUs */
751 c_cpus = s_cpus = 0;
752 for (cpu = 0; cpu < info->combined; cpu++) {
753 if (sclp.has_core_type &&
754 info->core[cpu].type != boot_core_type)
755 continue;
756 if (cpu < info->configured)
757 c_cpus += smp_cpu_mtid + 1;
758 else
759 s_cpus += smp_cpu_mtid + 1;
760 }
761 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
762
763 /* Add CPUs present at boot */
764 get_online_cpus();
765 __smp_rescan_cpus(info, 0);
766 put_online_cpus();
767 memblock_free_early((unsigned long)info, sizeof(*info));
768}
769
770/*
771 * Activate a secondary processor.
772 */
773static void smp_start_secondary(void *cpuvoid)
774{
775 S390_lowcore.last_update_clock = get_tod_clock();
776 S390_lowcore.restart_stack = (unsigned long) restart_stack;
777 S390_lowcore.restart_fn = (unsigned long) do_restart;
778 S390_lowcore.restart_data = 0;
779 S390_lowcore.restart_source = -1UL;
780 restore_access_regs(S390_lowcore.access_regs_save_area);
781 __ctl_load(S390_lowcore.cregs_save_area, 0, 15);
782 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
783 cpu_init();
784 preempt_disable();
785 init_cpu_timer();
786 vtime_init();
787 pfault_init();
788 notify_cpu_starting(smp_processor_id());
789 set_cpu_online(smp_processor_id(), true);
790 inc_irq_stat(CPU_RST);
791 local_irq_enable();
792 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
793}
794
795/* Upping and downing of CPUs */
796int __cpu_up(unsigned int cpu, struct task_struct *tidle)
797{
798 struct pcpu *pcpu;
799 int base, i, rc;
800
801 pcpu = pcpu_devices + cpu;
802 if (pcpu->state != CPU_STATE_CONFIGURED)
803 return -EIO;
804 base = smp_get_base_cpu(cpu);
805 for (i = 0; i <= smp_cpu_mtid; i++) {
806 if (base + i < nr_cpu_ids)
807 if (cpu_online(base + i))
808 break;
809 }
810 /*
811 * If this is the first CPU of the core to get online
812 * do an initial CPU reset.
813 */
814 if (i > smp_cpu_mtid &&
815 pcpu_sigp_retry(pcpu_devices + base, SIGP_INITIAL_CPU_RESET, 0) !=
816 SIGP_CC_ORDER_CODE_ACCEPTED)
817 return -EIO;
818
819 rc = pcpu_alloc_lowcore(pcpu, cpu);
820 if (rc)
821 return rc;
822 pcpu_prepare_secondary(pcpu, cpu);
823 pcpu_attach_task(pcpu, tidle);
824 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
825 /* Wait until cpu puts itself in the online & active maps */
826 while (!cpu_online(cpu))
827 cpu_relax();
828 return 0;
829}
830
831static unsigned int setup_possible_cpus __initdata;
832
833static int __init _setup_possible_cpus(char *s)
834{
835 get_option(&s, &setup_possible_cpus);
836 return 0;
837}
838early_param("possible_cpus", _setup_possible_cpus);
839
840#ifdef CONFIG_HOTPLUG_CPU
841
842int __cpu_disable(void)
843{
844 unsigned long cregs[16];
845
846 /* Handle possible pending IPIs */
847 smp_handle_ext_call();
848 set_cpu_online(smp_processor_id(), false);
849 /* Disable pseudo page faults on this cpu. */
850 pfault_fini();
851 /* Disable interrupt sources via control register. */
852 __ctl_store(cregs, 0, 15);
853 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
854 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
855 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
856 __ctl_load(cregs, 0, 15);
857 clear_cpu_flag(CIF_NOHZ_DELAY);
858 return 0;
859}
860
861void __cpu_die(unsigned int cpu)
862{
863 struct pcpu *pcpu;
864
865 /* Wait until target cpu is down */
866 pcpu = pcpu_devices + cpu;
867 while (!pcpu_stopped(pcpu))
868 cpu_relax();
869 pcpu_free_lowcore(pcpu);
870 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
871 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
872}
873
874void __noreturn cpu_die(void)
875{
876 idle_task_exit();
877 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
878 for (;;) ;
879}
880
881#endif /* CONFIG_HOTPLUG_CPU */
882
883void __init smp_fill_possible_mask(void)
884{
885 unsigned int possible, sclp_max, cpu;
886
887 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
888 sclp_max = min(smp_max_threads, sclp_max);
889 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
890 possible = setup_possible_cpus ?: nr_cpu_ids;
891 possible = min(possible, sclp_max);
892 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
893 set_cpu_possible(cpu, true);
894}
895
896void __init smp_prepare_cpus(unsigned int max_cpus)
897{
898 /* request the 0x1201 emergency signal external interrupt */
899 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
900 panic("Couldn't request external interrupt 0x1201");
901 /* request the 0x1202 external call external interrupt */
902 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
903 panic("Couldn't request external interrupt 0x1202");
904}
905
906void __init smp_prepare_boot_cpu(void)
907{
908 struct pcpu *pcpu = pcpu_devices;
909
910 pcpu->state = CPU_STATE_CONFIGURED;
911 pcpu->address = stap();
912 pcpu->lowcore = (struct lowcore *)(unsigned long) store_prefix();
913 S390_lowcore.percpu_offset = __per_cpu_offset[0];
914 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
915 set_cpu_present(0, true);
916 set_cpu_online(0, true);
917}
918
919void __init smp_cpus_done(unsigned int max_cpus)
920{
921}
922
923void __init smp_setup_processor_id(void)
924{
925 S390_lowcore.cpu_nr = 0;
926 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
927}
928
929/*
930 * the frequency of the profiling timer can be changed
931 * by writing a multiplier value into /proc/profile.
932 *
933 * usually you want to run this on all CPUs ;)
934 */
935int setup_profiling_timer(unsigned int multiplier)
936{
937 return 0;
938}
939
940#ifdef CONFIG_HOTPLUG_CPU
941static ssize_t cpu_configure_show(struct device *dev,
942 struct device_attribute *attr, char *buf)
943{
944 ssize_t count;
945
946 mutex_lock(&smp_cpu_state_mutex);
947 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
948 mutex_unlock(&smp_cpu_state_mutex);
949 return count;
950}
951
952static ssize_t cpu_configure_store(struct device *dev,
953 struct device_attribute *attr,
954 const char *buf, size_t count)
955{
956 struct pcpu *pcpu;
957 int cpu, val, rc, i;
958 char delim;
959
960 if (sscanf(buf, "%d %c", &val, &delim) != 1)
961 return -EINVAL;
962 if (val != 0 && val != 1)
963 return -EINVAL;
964 get_online_cpus();
965 mutex_lock(&smp_cpu_state_mutex);
966 rc = -EBUSY;
967 /* disallow configuration changes of online cpus and cpu 0 */
968 cpu = dev->id;
969 cpu = smp_get_base_cpu(cpu);
970 if (cpu == 0)
971 goto out;
972 for (i = 0; i <= smp_cpu_mtid; i++)
973 if (cpu_online(cpu + i))
974 goto out;
975 pcpu = pcpu_devices + cpu;
976 rc = 0;
977 switch (val) {
978 case 0:
979 if (pcpu->state != CPU_STATE_CONFIGURED)
980 break;
981 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
982 if (rc)
983 break;
984 for (i = 0; i <= smp_cpu_mtid; i++) {
985 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
986 continue;
987 pcpu[i].state = CPU_STATE_STANDBY;
988 smp_cpu_set_polarization(cpu + i,
989 POLARIZATION_UNKNOWN);
990 }
991 topology_expect_change();
992 break;
993 case 1:
994 if (pcpu->state != CPU_STATE_STANDBY)
995 break;
996 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
997 if (rc)
998 break;
999 for (i = 0; i <= smp_cpu_mtid; i++) {
1000 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1001 continue;
1002 pcpu[i].state = CPU_STATE_CONFIGURED;
1003 smp_cpu_set_polarization(cpu + i,
1004 POLARIZATION_UNKNOWN);
1005 }
1006 topology_expect_change();
1007 break;
1008 default:
1009 break;
1010 }
1011out:
1012 mutex_unlock(&smp_cpu_state_mutex);
1013 put_online_cpus();
1014 return rc ? rc : count;
1015}
1016static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1017#endif /* CONFIG_HOTPLUG_CPU */
1018
1019static ssize_t show_cpu_address(struct device *dev,
1020 struct device_attribute *attr, char *buf)
1021{
1022 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1023}
1024static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1025
1026static struct attribute *cpu_common_attrs[] = {
1027#ifdef CONFIG_HOTPLUG_CPU
1028 &dev_attr_configure.attr,
1029#endif
1030 &dev_attr_address.attr,
1031 NULL,
1032};
1033
1034static struct attribute_group cpu_common_attr_group = {
1035 .attrs = cpu_common_attrs,
1036};
1037
1038static struct attribute *cpu_online_attrs[] = {
1039 &dev_attr_idle_count.attr,
1040 &dev_attr_idle_time_us.attr,
1041 NULL,
1042};
1043
1044static struct attribute_group cpu_online_attr_group = {
1045 .attrs = cpu_online_attrs,
1046};
1047
1048static int smp_cpu_online(unsigned int cpu)
1049{
1050 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1051
1052 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1053}
1054static int smp_cpu_pre_down(unsigned int cpu)
1055{
1056 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1057
1058 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1059 return 0;
1060}
1061
1062static int smp_add_present_cpu(int cpu)
1063{
1064 struct device *s;
1065 struct cpu *c;
1066 int rc;
1067
1068 c = kzalloc(sizeof(*c), GFP_KERNEL);
1069 if (!c)
1070 return -ENOMEM;
1071 per_cpu(cpu_device, cpu) = c;
1072 s = &c->dev;
1073 c->hotpluggable = 1;
1074 rc = register_cpu(c, cpu);
1075 if (rc)
1076 goto out;
1077 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1078 if (rc)
1079 goto out_cpu;
1080 rc = topology_cpu_init(c);
1081 if (rc)
1082 goto out_topology;
1083 return 0;
1084
1085out_topology:
1086 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1087out_cpu:
1088#ifdef CONFIG_HOTPLUG_CPU
1089 unregister_cpu(c);
1090#endif
1091out:
1092 return rc;
1093}
1094
1095#ifdef CONFIG_HOTPLUG_CPU
1096
1097int __ref smp_rescan_cpus(void)
1098{
1099 struct sclp_core_info *info;
1100 int nr;
1101
1102 info = kzalloc(sizeof(*info), GFP_KERNEL);
1103 if (!info)
1104 return -ENOMEM;
1105 smp_get_core_info(info, 0);
1106 get_online_cpus();
1107 mutex_lock(&smp_cpu_state_mutex);
1108 nr = __smp_rescan_cpus(info, 1);
1109 mutex_unlock(&smp_cpu_state_mutex);
1110 put_online_cpus();
1111 kfree(info);
1112 if (nr)
1113 topology_schedule_update();
1114 return 0;
1115}
1116
1117static ssize_t __ref rescan_store(struct device *dev,
1118 struct device_attribute *attr,
1119 const char *buf,
1120 size_t count)
1121{
1122 int rc;
1123
1124 rc = smp_rescan_cpus();
1125 return rc ? rc : count;
1126}
1127static DEVICE_ATTR(rescan, 0200, NULL, rescan_store);
1128#endif /* CONFIG_HOTPLUG_CPU */
1129
1130static int __init s390_smp_init(void)
1131{
1132 int cpu, rc = 0;
1133
1134#ifdef CONFIG_HOTPLUG_CPU
1135 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1136 if (rc)
1137 return rc;
1138#endif
1139 for_each_present_cpu(cpu) {
1140 rc = smp_add_present_cpu(cpu);
1141 if (rc)
1142 goto out;
1143 }
1144
1145 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1146 smp_cpu_online, smp_cpu_pre_down);
1147out:
1148 return rc;
1149}
1150subsys_initcall(s390_smp_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * SMP related functions
4 *
5 * Copyright IBM Corp. 1999, 2012
6 * Author(s): Denis Joseph Barrow,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 *
10 * based on other smp stuff by
11 * (c) 1995 Alan Cox, CymruNET Ltd <alan@cymru.net>
12 * (c) 1998 Ingo Molnar
13 *
14 * The code outside of smp.c uses logical cpu numbers, only smp.c does
15 * the translation of logical to physical cpu ids. All new code that
16 * operates on physical cpu numbers needs to go into smp.c.
17 */
18
19#define KMSG_COMPONENT "cpu"
20#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
21
22#include <linux/workqueue.h>
23#include <linux/memblock.h>
24#include <linux/export.h>
25#include <linux/init.h>
26#include <linux/mm.h>
27#include <linux/err.h>
28#include <linux/spinlock.h>
29#include <linux/kernel_stat.h>
30#include <linux/delay.h>
31#include <linux/interrupt.h>
32#include <linux/irqflags.h>
33#include <linux/irq_work.h>
34#include <linux/cpu.h>
35#include <linux/slab.h>
36#include <linux/sched/hotplug.h>
37#include <linux/sched/task_stack.h>
38#include <linux/crash_dump.h>
39#include <linux/kprobes.h>
40#include <asm/asm-offsets.h>
41#include <asm/diag.h>
42#include <asm/switch_to.h>
43#include <asm/facility.h>
44#include <asm/ipl.h>
45#include <asm/setup.h>
46#include <asm/irq.h>
47#include <asm/tlbflush.h>
48#include <asm/vtimer.h>
49#include <asm/lowcore.h>
50#include <asm/sclp.h>
51#include <asm/debug.h>
52#include <asm/os_info.h>
53#include <asm/sigp.h>
54#include <asm/idle.h>
55#include <asm/nmi.h>
56#include <asm/stacktrace.h>
57#include <asm/topology.h>
58#include <asm/vdso.h>
59#include "entry.h"
60
61enum {
62 ec_schedule = 0,
63 ec_call_function_single,
64 ec_stop_cpu,
65 ec_mcck_pending,
66 ec_irq_work,
67};
68
69enum {
70 CPU_STATE_STANDBY,
71 CPU_STATE_CONFIGURED,
72};
73
74static DEFINE_PER_CPU(struct cpu *, cpu_device);
75
76struct pcpu {
77 unsigned long ec_mask; /* bit mask for ec_xxx functions */
78 unsigned long ec_clk; /* sigp timestamp for ec_xxx */
79 signed char state; /* physical cpu state */
80 signed char polarization; /* physical polarization */
81 u16 address; /* physical cpu address */
82};
83
84static u8 boot_core_type;
85static struct pcpu pcpu_devices[NR_CPUS];
86
87unsigned int smp_cpu_mt_shift;
88EXPORT_SYMBOL(smp_cpu_mt_shift);
89
90unsigned int smp_cpu_mtid;
91EXPORT_SYMBOL(smp_cpu_mtid);
92
93#ifdef CONFIG_CRASH_DUMP
94__vector128 __initdata boot_cpu_vector_save_area[__NUM_VXRS];
95#endif
96
97static unsigned int smp_max_threads __initdata = -1U;
98cpumask_t cpu_setup_mask;
99
100static int __init early_nosmt(char *s)
101{
102 smp_max_threads = 1;
103 return 0;
104}
105early_param("nosmt", early_nosmt);
106
107static int __init early_smt(char *s)
108{
109 get_option(&s, &smp_max_threads);
110 return 0;
111}
112early_param("smt", early_smt);
113
114/*
115 * The smp_cpu_state_mutex must be held when changing the state or polarization
116 * member of a pcpu data structure within the pcpu_devices arreay.
117 */
118DEFINE_MUTEX(smp_cpu_state_mutex);
119
120/*
121 * Signal processor helper functions.
122 */
123static inline int __pcpu_sigp_relax(u16 addr, u8 order, unsigned long parm)
124{
125 int cc;
126
127 while (1) {
128 cc = __pcpu_sigp(addr, order, parm, NULL);
129 if (cc != SIGP_CC_BUSY)
130 return cc;
131 cpu_relax();
132 }
133}
134
135static int pcpu_sigp_retry(struct pcpu *pcpu, u8 order, u32 parm)
136{
137 int cc, retry;
138
139 for (retry = 0; ; retry++) {
140 cc = __pcpu_sigp(pcpu->address, order, parm, NULL);
141 if (cc != SIGP_CC_BUSY)
142 break;
143 if (retry >= 3)
144 udelay(10);
145 }
146 return cc;
147}
148
149static inline int pcpu_stopped(struct pcpu *pcpu)
150{
151 u32 status;
152
153 if (__pcpu_sigp(pcpu->address, SIGP_SENSE,
154 0, &status) != SIGP_CC_STATUS_STORED)
155 return 0;
156 return !!(status & (SIGP_STATUS_CHECK_STOP|SIGP_STATUS_STOPPED));
157}
158
159static inline int pcpu_running(struct pcpu *pcpu)
160{
161 if (__pcpu_sigp(pcpu->address, SIGP_SENSE_RUNNING,
162 0, NULL) != SIGP_CC_STATUS_STORED)
163 return 1;
164 /* Status stored condition code is equivalent to cpu not running. */
165 return 0;
166}
167
168/*
169 * Find struct pcpu by cpu address.
170 */
171static struct pcpu *pcpu_find_address(const struct cpumask *mask, u16 address)
172{
173 int cpu;
174
175 for_each_cpu(cpu, mask)
176 if (pcpu_devices[cpu].address == address)
177 return pcpu_devices + cpu;
178 return NULL;
179}
180
181static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
182{
183 int order;
184
185 if (test_and_set_bit(ec_bit, &pcpu->ec_mask))
186 return;
187 order = pcpu_running(pcpu) ? SIGP_EXTERNAL_CALL : SIGP_EMERGENCY_SIGNAL;
188 pcpu->ec_clk = get_tod_clock_fast();
189 pcpu_sigp_retry(pcpu, order, 0);
190}
191
192static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
193{
194 unsigned long async_stack, nodat_stack, mcck_stack;
195 struct lowcore *lc;
196
197 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
198 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
199 async_stack = stack_alloc();
200 mcck_stack = stack_alloc();
201 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
202 goto out;
203 memcpy(lc, &S390_lowcore, 512);
204 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
205 lc->async_stack = async_stack + STACK_INIT_OFFSET;
206 lc->nodat_stack = nodat_stack + STACK_INIT_OFFSET;
207 lc->mcck_stack = mcck_stack + STACK_INIT_OFFSET;
208 lc->cpu_nr = cpu;
209 lc->spinlock_lockval = arch_spin_lockval(cpu);
210 lc->spinlock_index = 0;
211 lc->br_r1_trampoline = 0x07f1; /* br %r1 */
212 lc->return_lpswe = gen_lpswe(__LC_RETURN_PSW);
213 lc->return_mcck_lpswe = gen_lpswe(__LC_RETURN_MCCK_PSW);
214 lc->preempt_count = PREEMPT_DISABLED;
215 if (nmi_alloc_per_cpu(lc))
216 goto out;
217 lowcore_ptr[cpu] = lc;
218 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, (u32)(unsigned long) lc);
219 return 0;
220
221out:
222 stack_free(mcck_stack);
223 stack_free(async_stack);
224 free_pages(nodat_stack, THREAD_SIZE_ORDER);
225 free_pages((unsigned long) lc, LC_ORDER);
226 return -ENOMEM;
227}
228
229static void pcpu_free_lowcore(struct pcpu *pcpu)
230{
231 unsigned long async_stack, nodat_stack, mcck_stack;
232 struct lowcore *lc;
233 int cpu;
234
235 cpu = pcpu - pcpu_devices;
236 lc = lowcore_ptr[cpu];
237 nodat_stack = lc->nodat_stack - STACK_INIT_OFFSET;
238 async_stack = lc->async_stack - STACK_INIT_OFFSET;
239 mcck_stack = lc->mcck_stack - STACK_INIT_OFFSET;
240 pcpu_sigp_retry(pcpu, SIGP_SET_PREFIX, 0);
241 lowcore_ptr[cpu] = NULL;
242 nmi_free_per_cpu(lc);
243 stack_free(async_stack);
244 stack_free(mcck_stack);
245 free_pages(nodat_stack, THREAD_SIZE_ORDER);
246 free_pages((unsigned long) lc, LC_ORDER);
247}
248
249static void pcpu_prepare_secondary(struct pcpu *pcpu, int cpu)
250{
251 struct lowcore *lc = lowcore_ptr[cpu];
252
253 cpumask_set_cpu(cpu, &init_mm.context.cpu_attach_mask);
254 cpumask_set_cpu(cpu, mm_cpumask(&init_mm));
255 lc->cpu_nr = cpu;
256 lc->restart_flags = RESTART_FLAG_CTLREGS;
257 lc->spinlock_lockval = arch_spin_lockval(cpu);
258 lc->spinlock_index = 0;
259 lc->percpu_offset = __per_cpu_offset[cpu];
260 lc->kernel_asce = S390_lowcore.kernel_asce;
261 lc->user_asce = s390_invalid_asce;
262 lc->machine_flags = S390_lowcore.machine_flags;
263 lc->user_timer = lc->system_timer =
264 lc->steal_timer = lc->avg_steal_timer = 0;
265 __ctl_store(lc->cregs_save_area, 0, 15);
266 lc->cregs_save_area[1] = lc->kernel_asce;
267 lc->cregs_save_area[7] = lc->user_asce;
268 save_access_regs((unsigned int *) lc->access_regs_save_area);
269 arch_spin_lock_setup(cpu);
270}
271
272static void pcpu_attach_task(struct pcpu *pcpu, struct task_struct *tsk)
273{
274 struct lowcore *lc;
275 int cpu;
276
277 cpu = pcpu - pcpu_devices;
278 lc = lowcore_ptr[cpu];
279 lc->kernel_stack = (unsigned long) task_stack_page(tsk)
280 + THREAD_SIZE - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
281 lc->current_task = (unsigned long) tsk;
282 lc->lpp = LPP_MAGIC;
283 lc->current_pid = tsk->pid;
284 lc->user_timer = tsk->thread.user_timer;
285 lc->guest_timer = tsk->thread.guest_timer;
286 lc->system_timer = tsk->thread.system_timer;
287 lc->hardirq_timer = tsk->thread.hardirq_timer;
288 lc->softirq_timer = tsk->thread.softirq_timer;
289 lc->steal_timer = 0;
290}
291
292static void pcpu_start_fn(struct pcpu *pcpu, void (*func)(void *), void *data)
293{
294 struct lowcore *lc;
295 int cpu;
296
297 cpu = pcpu - pcpu_devices;
298 lc = lowcore_ptr[cpu];
299 lc->restart_stack = lc->nodat_stack;
300 lc->restart_fn = (unsigned long) func;
301 lc->restart_data = (unsigned long) data;
302 lc->restart_source = -1U;
303 pcpu_sigp_retry(pcpu, SIGP_RESTART, 0);
304}
305
306typedef void (pcpu_delegate_fn)(void *);
307
308/*
309 * Call function via PSW restart on pcpu and stop the current cpu.
310 */
311static void __pcpu_delegate(pcpu_delegate_fn *func, void *data)
312{
313 func(data); /* should not return */
314}
315
316static void pcpu_delegate(struct pcpu *pcpu,
317 pcpu_delegate_fn *func,
318 void *data, unsigned long stack)
319{
320 struct lowcore *lc = lowcore_ptr[pcpu - pcpu_devices];
321 unsigned int source_cpu = stap();
322
323 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
324 if (pcpu->address == source_cpu) {
325 call_on_stack(2, stack, void, __pcpu_delegate,
326 pcpu_delegate_fn *, func, void *, data);
327 }
328 /* Stop target cpu (if func returns this stops the current cpu). */
329 pcpu_sigp_retry(pcpu, SIGP_STOP, 0);
330 /* Restart func on the target cpu and stop the current cpu. */
331 mem_assign_absolute(lc->restart_stack, stack);
332 mem_assign_absolute(lc->restart_fn, (unsigned long) func);
333 mem_assign_absolute(lc->restart_data, (unsigned long) data);
334 mem_assign_absolute(lc->restart_source, source_cpu);
335 __bpon();
336 asm volatile(
337 "0: sigp 0,%0,%2 # sigp restart to target cpu\n"
338 " brc 2,0b # busy, try again\n"
339 "1: sigp 0,%1,%3 # sigp stop to current cpu\n"
340 " brc 2,1b # busy, try again\n"
341 : : "d" (pcpu->address), "d" (source_cpu),
342 "K" (SIGP_RESTART), "K" (SIGP_STOP)
343 : "0", "1", "cc");
344 for (;;) ;
345}
346
347/*
348 * Enable additional logical cpus for multi-threading.
349 */
350static int pcpu_set_smt(unsigned int mtid)
351{
352 int cc;
353
354 if (smp_cpu_mtid == mtid)
355 return 0;
356 cc = __pcpu_sigp(0, SIGP_SET_MULTI_THREADING, mtid, NULL);
357 if (cc == 0) {
358 smp_cpu_mtid = mtid;
359 smp_cpu_mt_shift = 0;
360 while (smp_cpu_mtid >= (1U << smp_cpu_mt_shift))
361 smp_cpu_mt_shift++;
362 pcpu_devices[0].address = stap();
363 }
364 return cc;
365}
366
367/*
368 * Call function on an online CPU.
369 */
370void smp_call_online_cpu(void (*func)(void *), void *data)
371{
372 struct pcpu *pcpu;
373
374 /* Use the current cpu if it is online. */
375 pcpu = pcpu_find_address(cpu_online_mask, stap());
376 if (!pcpu)
377 /* Use the first online cpu. */
378 pcpu = pcpu_devices + cpumask_first(cpu_online_mask);
379 pcpu_delegate(pcpu, func, data, (unsigned long) restart_stack);
380}
381
382/*
383 * Call function on the ipl CPU.
384 */
385void smp_call_ipl_cpu(void (*func)(void *), void *data)
386{
387 struct lowcore *lc = lowcore_ptr[0];
388
389 if (pcpu_devices[0].address == stap())
390 lc = &S390_lowcore;
391
392 pcpu_delegate(&pcpu_devices[0], func, data,
393 lc->nodat_stack);
394}
395
396int smp_find_processor_id(u16 address)
397{
398 int cpu;
399
400 for_each_present_cpu(cpu)
401 if (pcpu_devices[cpu].address == address)
402 return cpu;
403 return -1;
404}
405
406void schedule_mcck_handler(void)
407{
408 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_mcck_pending);
409}
410
411bool notrace arch_vcpu_is_preempted(int cpu)
412{
413 if (test_cpu_flag_of(CIF_ENABLED_WAIT, cpu))
414 return false;
415 if (pcpu_running(pcpu_devices + cpu))
416 return false;
417 return true;
418}
419EXPORT_SYMBOL(arch_vcpu_is_preempted);
420
421void notrace smp_yield_cpu(int cpu)
422{
423 if (!MACHINE_HAS_DIAG9C)
424 return;
425 diag_stat_inc_norecursion(DIAG_STAT_X09C);
426 asm volatile("diag %0,0,0x9c"
427 : : "d" (pcpu_devices[cpu].address));
428}
429EXPORT_SYMBOL_GPL(smp_yield_cpu);
430
431/*
432 * Send cpus emergency shutdown signal. This gives the cpus the
433 * opportunity to complete outstanding interrupts.
434 */
435void notrace smp_emergency_stop(void)
436{
437 static arch_spinlock_t lock = __ARCH_SPIN_LOCK_UNLOCKED;
438 static cpumask_t cpumask;
439 u64 end;
440 int cpu;
441
442 arch_spin_lock(&lock);
443 cpumask_copy(&cpumask, cpu_online_mask);
444 cpumask_clear_cpu(smp_processor_id(), &cpumask);
445
446 end = get_tod_clock() + (1000000UL << 12);
447 for_each_cpu(cpu, &cpumask) {
448 struct pcpu *pcpu = pcpu_devices + cpu;
449 set_bit(ec_stop_cpu, &pcpu->ec_mask);
450 while (__pcpu_sigp(pcpu->address, SIGP_EMERGENCY_SIGNAL,
451 0, NULL) == SIGP_CC_BUSY &&
452 get_tod_clock() < end)
453 cpu_relax();
454 }
455 while (get_tod_clock() < end) {
456 for_each_cpu(cpu, &cpumask)
457 if (pcpu_stopped(pcpu_devices + cpu))
458 cpumask_clear_cpu(cpu, &cpumask);
459 if (cpumask_empty(&cpumask))
460 break;
461 cpu_relax();
462 }
463 arch_spin_unlock(&lock);
464}
465NOKPROBE_SYMBOL(smp_emergency_stop);
466
467/*
468 * Stop all cpus but the current one.
469 */
470void smp_send_stop(void)
471{
472 int cpu;
473
474 /* Disable all interrupts/machine checks */
475 __load_psw_mask(PSW_KERNEL_BITS | PSW_MASK_DAT);
476 trace_hardirqs_off();
477
478 debug_set_critical();
479
480 if (oops_in_progress)
481 smp_emergency_stop();
482
483 /* stop all processors */
484 for_each_online_cpu(cpu) {
485 if (cpu == smp_processor_id())
486 continue;
487 pcpu_sigp_retry(pcpu_devices + cpu, SIGP_STOP, 0);
488 while (!pcpu_stopped(pcpu_devices + cpu))
489 cpu_relax();
490 }
491}
492
493/*
494 * This is the main routine where commands issued by other
495 * cpus are handled.
496 */
497static void smp_handle_ext_call(void)
498{
499 unsigned long bits;
500
501 /* handle bit signal external calls */
502 bits = xchg(&pcpu_devices[smp_processor_id()].ec_mask, 0);
503 if (test_bit(ec_stop_cpu, &bits))
504 smp_stop_cpu();
505 if (test_bit(ec_schedule, &bits))
506 scheduler_ipi();
507 if (test_bit(ec_call_function_single, &bits))
508 generic_smp_call_function_single_interrupt();
509 if (test_bit(ec_mcck_pending, &bits))
510 __s390_handle_mcck();
511 if (test_bit(ec_irq_work, &bits))
512 irq_work_run();
513}
514
515static void do_ext_call_interrupt(struct ext_code ext_code,
516 unsigned int param32, unsigned long param64)
517{
518 inc_irq_stat(ext_code.code == 0x1202 ? IRQEXT_EXC : IRQEXT_EMS);
519 smp_handle_ext_call();
520}
521
522void arch_send_call_function_ipi_mask(const struct cpumask *mask)
523{
524 int cpu;
525
526 for_each_cpu(cpu, mask)
527 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
528}
529
530void arch_send_call_function_single_ipi(int cpu)
531{
532 pcpu_ec_call(pcpu_devices + cpu, ec_call_function_single);
533}
534
535/*
536 * this function sends a 'reschedule' IPI to another CPU.
537 * it goes straight through and wastes no time serializing
538 * anything. Worst case is that we lose a reschedule ...
539 */
540void smp_send_reschedule(int cpu)
541{
542 pcpu_ec_call(pcpu_devices + cpu, ec_schedule);
543}
544
545#ifdef CONFIG_IRQ_WORK
546void arch_irq_work_raise(void)
547{
548 pcpu_ec_call(pcpu_devices + smp_processor_id(), ec_irq_work);
549}
550#endif
551
552/*
553 * parameter area for the set/clear control bit callbacks
554 */
555struct ec_creg_mask_parms {
556 unsigned long orval;
557 unsigned long andval;
558 int cr;
559};
560
561/*
562 * callback for setting/clearing control bits
563 */
564static void smp_ctl_bit_callback(void *info)
565{
566 struct ec_creg_mask_parms *pp = info;
567 unsigned long cregs[16];
568
569 __ctl_store(cregs, 0, 15);
570 cregs[pp->cr] = (cregs[pp->cr] & pp->andval) | pp->orval;
571 __ctl_load(cregs, 0, 15);
572}
573
574static DEFINE_SPINLOCK(ctl_lock);
575static unsigned long ctlreg;
576
577/*
578 * Set a bit in a control register of all cpus
579 */
580void smp_ctl_set_bit(int cr, int bit)
581{
582 struct ec_creg_mask_parms parms = { 1UL << bit, -1UL, cr };
583
584 spin_lock(&ctl_lock);
585 memcpy_absolute(&ctlreg, &S390_lowcore.cregs_save_area[cr], sizeof(ctlreg));
586 __set_bit(bit, &ctlreg);
587 memcpy_absolute(&S390_lowcore.cregs_save_area[cr], &ctlreg, sizeof(ctlreg));
588 spin_unlock(&ctl_lock);
589 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
590}
591EXPORT_SYMBOL(smp_ctl_set_bit);
592
593/*
594 * Clear a bit in a control register of all cpus
595 */
596void smp_ctl_clear_bit(int cr, int bit)
597{
598 struct ec_creg_mask_parms parms = { 0, ~(1UL << bit), cr };
599
600 spin_lock(&ctl_lock);
601 memcpy_absolute(&ctlreg, &S390_lowcore.cregs_save_area[cr], sizeof(ctlreg));
602 __clear_bit(bit, &ctlreg);
603 memcpy_absolute(&S390_lowcore.cregs_save_area[cr], &ctlreg, sizeof(ctlreg));
604 spin_unlock(&ctl_lock);
605 on_each_cpu(smp_ctl_bit_callback, &parms, 1);
606}
607EXPORT_SYMBOL(smp_ctl_clear_bit);
608
609#ifdef CONFIG_CRASH_DUMP
610
611int smp_store_status(int cpu)
612{
613 struct lowcore *lc;
614 struct pcpu *pcpu;
615 unsigned long pa;
616
617 pcpu = pcpu_devices + cpu;
618 lc = lowcore_ptr[cpu];
619 pa = __pa(&lc->floating_pt_save_area);
620 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_STATUS_AT_ADDRESS,
621 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
622 return -EIO;
623 if (!MACHINE_HAS_VX && !MACHINE_HAS_GS)
624 return 0;
625 pa = __pa(lc->mcesad & MCESA_ORIGIN_MASK);
626 if (MACHINE_HAS_GS)
627 pa |= lc->mcesad & MCESA_LC_MASK;
628 if (__pcpu_sigp_relax(pcpu->address, SIGP_STORE_ADDITIONAL_STATUS,
629 pa) != SIGP_CC_ORDER_CODE_ACCEPTED)
630 return -EIO;
631 return 0;
632}
633
634/*
635 * Collect CPU state of the previous, crashed system.
636 * There are four cases:
637 * 1) standard zfcp/nvme dump
638 * condition: OLDMEM_BASE == NULL && is_ipl_type_dump() == true
639 * The state for all CPUs except the boot CPU needs to be collected
640 * with sigp stop-and-store-status. The boot CPU state is located in
641 * the absolute lowcore of the memory stored in the HSA. The zcore code
642 * will copy the boot CPU state from the HSA.
643 * 2) stand-alone kdump for SCSI/NVMe (zfcp/nvme dump with swapped memory)
644 * condition: OLDMEM_BASE != NULL && is_ipl_type_dump() == true
645 * The state for all CPUs except the boot CPU needs to be collected
646 * with sigp stop-and-store-status. The firmware or the boot-loader
647 * stored the registers of the boot CPU in the absolute lowcore in the
648 * memory of the old system.
649 * 3) kdump and the old kernel did not store the CPU state,
650 * or stand-alone kdump for DASD
651 * condition: OLDMEM_BASE != NULL && !is_kdump_kernel()
652 * The state for all CPUs except the boot CPU needs to be collected
653 * with sigp stop-and-store-status. The kexec code or the boot-loader
654 * stored the registers of the boot CPU in the memory of the old system.
655 * 4) kdump and the old kernel stored the CPU state
656 * condition: OLDMEM_BASE != NULL && is_kdump_kernel()
657 * This case does not exist for s390 anymore, setup_arch explicitly
658 * deactivates the elfcorehdr= kernel parameter
659 */
660static __init void smp_save_cpu_vxrs(struct save_area *sa, u16 addr,
661 bool is_boot_cpu, unsigned long page)
662{
663 __vector128 *vxrs = (__vector128 *) page;
664
665 if (is_boot_cpu)
666 vxrs = boot_cpu_vector_save_area;
667 else
668 __pcpu_sigp_relax(addr, SIGP_STORE_ADDITIONAL_STATUS, page);
669 save_area_add_vxrs(sa, vxrs);
670}
671
672static __init void smp_save_cpu_regs(struct save_area *sa, u16 addr,
673 bool is_boot_cpu, unsigned long page)
674{
675 void *regs = (void *) page;
676
677 if (is_boot_cpu)
678 copy_oldmem_kernel(regs, (void *) __LC_FPREGS_SAVE_AREA, 512);
679 else
680 __pcpu_sigp_relax(addr, SIGP_STORE_STATUS_AT_ADDRESS, page);
681 save_area_add_regs(sa, regs);
682}
683
684void __init smp_save_dump_cpus(void)
685{
686 int addr, boot_cpu_addr, max_cpu_addr;
687 struct save_area *sa;
688 unsigned long page;
689 bool is_boot_cpu;
690
691 if (!(OLDMEM_BASE || is_ipl_type_dump()))
692 /* No previous system present, normal boot. */
693 return;
694 /* Allocate a page as dumping area for the store status sigps */
695 page = memblock_phys_alloc_range(PAGE_SIZE, PAGE_SIZE, 0, 1UL << 31);
696 if (!page)
697 panic("ERROR: Failed to allocate %lx bytes below %lx\n",
698 PAGE_SIZE, 1UL << 31);
699
700 /* Set multi-threading state to the previous system. */
701 pcpu_set_smt(sclp.mtid_prev);
702 boot_cpu_addr = stap();
703 max_cpu_addr = SCLP_MAX_CORES << sclp.mtid_prev;
704 for (addr = 0; addr <= max_cpu_addr; addr++) {
705 if (__pcpu_sigp_relax(addr, SIGP_SENSE, 0) ==
706 SIGP_CC_NOT_OPERATIONAL)
707 continue;
708 is_boot_cpu = (addr == boot_cpu_addr);
709 /* Allocate save area */
710 sa = save_area_alloc(is_boot_cpu);
711 if (!sa)
712 panic("could not allocate memory for save area\n");
713 if (MACHINE_HAS_VX)
714 /* Get the vector registers */
715 smp_save_cpu_vxrs(sa, addr, is_boot_cpu, page);
716 /*
717 * For a zfcp/nvme dump OLDMEM_BASE == NULL and the registers
718 * of the boot CPU are stored in the HSA. To retrieve
719 * these registers an SCLP request is required which is
720 * done by drivers/s390/char/zcore.c:init_cpu_info()
721 */
722 if (!is_boot_cpu || OLDMEM_BASE)
723 /* Get the CPU registers */
724 smp_save_cpu_regs(sa, addr, is_boot_cpu, page);
725 }
726 memblock_free(page, PAGE_SIZE);
727 diag_dma_ops.diag308_reset();
728 pcpu_set_smt(0);
729}
730#endif /* CONFIG_CRASH_DUMP */
731
732void smp_cpu_set_polarization(int cpu, int val)
733{
734 pcpu_devices[cpu].polarization = val;
735}
736
737int smp_cpu_get_polarization(int cpu)
738{
739 return pcpu_devices[cpu].polarization;
740}
741
742int smp_cpu_get_cpu_address(int cpu)
743{
744 return pcpu_devices[cpu].address;
745}
746
747static void __ref smp_get_core_info(struct sclp_core_info *info, int early)
748{
749 static int use_sigp_detection;
750 int address;
751
752 if (use_sigp_detection || sclp_get_core_info(info, early)) {
753 use_sigp_detection = 1;
754 for (address = 0;
755 address < (SCLP_MAX_CORES << smp_cpu_mt_shift);
756 address += (1U << smp_cpu_mt_shift)) {
757 if (__pcpu_sigp_relax(address, SIGP_SENSE, 0) ==
758 SIGP_CC_NOT_OPERATIONAL)
759 continue;
760 info->core[info->configured].core_id =
761 address >> smp_cpu_mt_shift;
762 info->configured++;
763 }
764 info->combined = info->configured;
765 }
766}
767
768static int smp_add_present_cpu(int cpu);
769
770static int smp_add_core(struct sclp_core_entry *core, cpumask_t *avail,
771 bool configured, bool early)
772{
773 struct pcpu *pcpu;
774 int cpu, nr, i;
775 u16 address;
776
777 nr = 0;
778 if (sclp.has_core_type && core->type != boot_core_type)
779 return nr;
780 cpu = cpumask_first(avail);
781 address = core->core_id << smp_cpu_mt_shift;
782 for (i = 0; (i <= smp_cpu_mtid) && (cpu < nr_cpu_ids); i++) {
783 if (pcpu_find_address(cpu_present_mask, address + i))
784 continue;
785 pcpu = pcpu_devices + cpu;
786 pcpu->address = address + i;
787 if (configured)
788 pcpu->state = CPU_STATE_CONFIGURED;
789 else
790 pcpu->state = CPU_STATE_STANDBY;
791 smp_cpu_set_polarization(cpu, POLARIZATION_UNKNOWN);
792 set_cpu_present(cpu, true);
793 if (!early && smp_add_present_cpu(cpu) != 0)
794 set_cpu_present(cpu, false);
795 else
796 nr++;
797 cpumask_clear_cpu(cpu, avail);
798 cpu = cpumask_next(cpu, avail);
799 }
800 return nr;
801}
802
803static int __smp_rescan_cpus(struct sclp_core_info *info, bool early)
804{
805 struct sclp_core_entry *core;
806 static cpumask_t avail;
807 bool configured;
808 u16 core_id;
809 int nr, i;
810
811 get_online_cpus();
812 mutex_lock(&smp_cpu_state_mutex);
813 nr = 0;
814 cpumask_xor(&avail, cpu_possible_mask, cpu_present_mask);
815 /*
816 * Add IPL core first (which got logical CPU number 0) to make sure
817 * that all SMT threads get subsequent logical CPU numbers.
818 */
819 if (early) {
820 core_id = pcpu_devices[0].address >> smp_cpu_mt_shift;
821 for (i = 0; i < info->configured; i++) {
822 core = &info->core[i];
823 if (core->core_id == core_id) {
824 nr += smp_add_core(core, &avail, true, early);
825 break;
826 }
827 }
828 }
829 for (i = 0; i < info->combined; i++) {
830 configured = i < info->configured;
831 nr += smp_add_core(&info->core[i], &avail, configured, early);
832 }
833 mutex_unlock(&smp_cpu_state_mutex);
834 put_online_cpus();
835 return nr;
836}
837
838void __init smp_detect_cpus(void)
839{
840 unsigned int cpu, mtid, c_cpus, s_cpus;
841 struct sclp_core_info *info;
842 u16 address;
843
844 /* Get CPU information */
845 info = memblock_alloc(sizeof(*info), 8);
846 if (!info)
847 panic("%s: Failed to allocate %zu bytes align=0x%x\n",
848 __func__, sizeof(*info), 8);
849 smp_get_core_info(info, 1);
850 /* Find boot CPU type */
851 if (sclp.has_core_type) {
852 address = stap();
853 for (cpu = 0; cpu < info->combined; cpu++)
854 if (info->core[cpu].core_id == address) {
855 /* The boot cpu dictates the cpu type. */
856 boot_core_type = info->core[cpu].type;
857 break;
858 }
859 if (cpu >= info->combined)
860 panic("Could not find boot CPU type");
861 }
862
863 /* Set multi-threading state for the current system */
864 mtid = boot_core_type ? sclp.mtid : sclp.mtid_cp;
865 mtid = (mtid < smp_max_threads) ? mtid : smp_max_threads - 1;
866 pcpu_set_smt(mtid);
867
868 /* Print number of CPUs */
869 c_cpus = s_cpus = 0;
870 for (cpu = 0; cpu < info->combined; cpu++) {
871 if (sclp.has_core_type &&
872 info->core[cpu].type != boot_core_type)
873 continue;
874 if (cpu < info->configured)
875 c_cpus += smp_cpu_mtid + 1;
876 else
877 s_cpus += smp_cpu_mtid + 1;
878 }
879 pr_info("%d configured CPUs, %d standby CPUs\n", c_cpus, s_cpus);
880
881 /* Add CPUs present at boot */
882 __smp_rescan_cpus(info, true);
883 memblock_free_early((unsigned long)info, sizeof(*info));
884}
885
886static void smp_init_secondary(void)
887{
888 int cpu = raw_smp_processor_id();
889
890 S390_lowcore.last_update_clock = get_tod_clock();
891 restore_access_regs(S390_lowcore.access_regs_save_area);
892 cpu_init();
893 rcu_cpu_starting(cpu);
894 init_cpu_timer();
895 vtime_init();
896 vdso_getcpu_init();
897 pfault_init();
898 cpumask_set_cpu(cpu, &cpu_setup_mask);
899 update_cpu_masks();
900 notify_cpu_starting(cpu);
901 if (topology_cpu_dedicated(cpu))
902 set_cpu_flag(CIF_DEDICATED_CPU);
903 else
904 clear_cpu_flag(CIF_DEDICATED_CPU);
905 set_cpu_online(cpu, true);
906 inc_irq_stat(CPU_RST);
907 local_irq_enable();
908 cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
909}
910
911/*
912 * Activate a secondary processor.
913 */
914static void smp_start_secondary(void *cpuvoid)
915{
916 S390_lowcore.restart_stack = (unsigned long) restart_stack;
917 S390_lowcore.restart_fn = (unsigned long) do_restart;
918 S390_lowcore.restart_data = 0;
919 S390_lowcore.restart_source = -1U;
920 S390_lowcore.restart_flags = 0;
921 call_on_stack_noreturn(smp_init_secondary, S390_lowcore.kernel_stack);
922}
923
924/* Upping and downing of CPUs */
925int __cpu_up(unsigned int cpu, struct task_struct *tidle)
926{
927 struct pcpu *pcpu = pcpu_devices + cpu;
928 int rc;
929
930 if (pcpu->state != CPU_STATE_CONFIGURED)
931 return -EIO;
932 if (pcpu_sigp_retry(pcpu, SIGP_INITIAL_CPU_RESET, 0) !=
933 SIGP_CC_ORDER_CODE_ACCEPTED)
934 return -EIO;
935
936 rc = pcpu_alloc_lowcore(pcpu, cpu);
937 if (rc)
938 return rc;
939 pcpu_prepare_secondary(pcpu, cpu);
940 pcpu_attach_task(pcpu, tidle);
941 pcpu_start_fn(pcpu, smp_start_secondary, NULL);
942 /* Wait until cpu puts itself in the online & active maps */
943 while (!cpu_online(cpu))
944 cpu_relax();
945 return 0;
946}
947
948static unsigned int setup_possible_cpus __initdata;
949
950static int __init _setup_possible_cpus(char *s)
951{
952 get_option(&s, &setup_possible_cpus);
953 return 0;
954}
955early_param("possible_cpus", _setup_possible_cpus);
956
957int __cpu_disable(void)
958{
959 unsigned long cregs[16];
960 int cpu;
961
962 /* Handle possible pending IPIs */
963 smp_handle_ext_call();
964 cpu = smp_processor_id();
965 set_cpu_online(cpu, false);
966 cpumask_clear_cpu(cpu, &cpu_setup_mask);
967 update_cpu_masks();
968 /* Disable pseudo page faults on this cpu. */
969 pfault_fini();
970 /* Disable interrupt sources via control register. */
971 __ctl_store(cregs, 0, 15);
972 cregs[0] &= ~0x0000ee70UL; /* disable all external interrupts */
973 cregs[6] &= ~0xff000000UL; /* disable all I/O interrupts */
974 cregs[14] &= ~0x1f000000UL; /* disable most machine checks */
975 __ctl_load(cregs, 0, 15);
976 clear_cpu_flag(CIF_NOHZ_DELAY);
977 return 0;
978}
979
980void __cpu_die(unsigned int cpu)
981{
982 struct pcpu *pcpu;
983
984 /* Wait until target cpu is down */
985 pcpu = pcpu_devices + cpu;
986 while (!pcpu_stopped(pcpu))
987 cpu_relax();
988 pcpu_free_lowcore(pcpu);
989 cpumask_clear_cpu(cpu, mm_cpumask(&init_mm));
990 cpumask_clear_cpu(cpu, &init_mm.context.cpu_attach_mask);
991}
992
993void __noreturn cpu_die(void)
994{
995 idle_task_exit();
996 __bpon();
997 pcpu_sigp_retry(pcpu_devices + smp_processor_id(), SIGP_STOP, 0);
998 for (;;) ;
999}
1000
1001void __init smp_fill_possible_mask(void)
1002{
1003 unsigned int possible, sclp_max, cpu;
1004
1005 sclp_max = max(sclp.mtid, sclp.mtid_cp) + 1;
1006 sclp_max = min(smp_max_threads, sclp_max);
1007 sclp_max = (sclp.max_cores * sclp_max) ?: nr_cpu_ids;
1008 possible = setup_possible_cpus ?: nr_cpu_ids;
1009 possible = min(possible, sclp_max);
1010 for (cpu = 0; cpu < possible && cpu < nr_cpu_ids; cpu++)
1011 set_cpu_possible(cpu, true);
1012}
1013
1014void __init smp_prepare_cpus(unsigned int max_cpus)
1015{
1016 /* request the 0x1201 emergency signal external interrupt */
1017 if (register_external_irq(EXT_IRQ_EMERGENCY_SIG, do_ext_call_interrupt))
1018 panic("Couldn't request external interrupt 0x1201");
1019 /* request the 0x1202 external call external interrupt */
1020 if (register_external_irq(EXT_IRQ_EXTERNAL_CALL, do_ext_call_interrupt))
1021 panic("Couldn't request external interrupt 0x1202");
1022}
1023
1024void __init smp_prepare_boot_cpu(void)
1025{
1026 struct pcpu *pcpu = pcpu_devices;
1027
1028 WARN_ON(!cpu_present(0) || !cpu_online(0));
1029 pcpu->state = CPU_STATE_CONFIGURED;
1030 S390_lowcore.percpu_offset = __per_cpu_offset[0];
1031 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
1032}
1033
1034void __init smp_setup_processor_id(void)
1035{
1036 pcpu_devices[0].address = stap();
1037 S390_lowcore.cpu_nr = 0;
1038 S390_lowcore.spinlock_lockval = arch_spin_lockval(0);
1039 S390_lowcore.spinlock_index = 0;
1040}
1041
1042/*
1043 * the frequency of the profiling timer can be changed
1044 * by writing a multiplier value into /proc/profile.
1045 *
1046 * usually you want to run this on all CPUs ;)
1047 */
1048int setup_profiling_timer(unsigned int multiplier)
1049{
1050 return 0;
1051}
1052
1053static ssize_t cpu_configure_show(struct device *dev,
1054 struct device_attribute *attr, char *buf)
1055{
1056 ssize_t count;
1057
1058 mutex_lock(&smp_cpu_state_mutex);
1059 count = sprintf(buf, "%d\n", pcpu_devices[dev->id].state);
1060 mutex_unlock(&smp_cpu_state_mutex);
1061 return count;
1062}
1063
1064static ssize_t cpu_configure_store(struct device *dev,
1065 struct device_attribute *attr,
1066 const char *buf, size_t count)
1067{
1068 struct pcpu *pcpu;
1069 int cpu, val, rc, i;
1070 char delim;
1071
1072 if (sscanf(buf, "%d %c", &val, &delim) != 1)
1073 return -EINVAL;
1074 if (val != 0 && val != 1)
1075 return -EINVAL;
1076 get_online_cpus();
1077 mutex_lock(&smp_cpu_state_mutex);
1078 rc = -EBUSY;
1079 /* disallow configuration changes of online cpus and cpu 0 */
1080 cpu = dev->id;
1081 cpu = smp_get_base_cpu(cpu);
1082 if (cpu == 0)
1083 goto out;
1084 for (i = 0; i <= smp_cpu_mtid; i++)
1085 if (cpu_online(cpu + i))
1086 goto out;
1087 pcpu = pcpu_devices + cpu;
1088 rc = 0;
1089 switch (val) {
1090 case 0:
1091 if (pcpu->state != CPU_STATE_CONFIGURED)
1092 break;
1093 rc = sclp_core_deconfigure(pcpu->address >> smp_cpu_mt_shift);
1094 if (rc)
1095 break;
1096 for (i = 0; i <= smp_cpu_mtid; i++) {
1097 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1098 continue;
1099 pcpu[i].state = CPU_STATE_STANDBY;
1100 smp_cpu_set_polarization(cpu + i,
1101 POLARIZATION_UNKNOWN);
1102 }
1103 topology_expect_change();
1104 break;
1105 case 1:
1106 if (pcpu->state != CPU_STATE_STANDBY)
1107 break;
1108 rc = sclp_core_configure(pcpu->address >> smp_cpu_mt_shift);
1109 if (rc)
1110 break;
1111 for (i = 0; i <= smp_cpu_mtid; i++) {
1112 if (cpu + i >= nr_cpu_ids || !cpu_present(cpu + i))
1113 continue;
1114 pcpu[i].state = CPU_STATE_CONFIGURED;
1115 smp_cpu_set_polarization(cpu + i,
1116 POLARIZATION_UNKNOWN);
1117 }
1118 topology_expect_change();
1119 break;
1120 default:
1121 break;
1122 }
1123out:
1124 mutex_unlock(&smp_cpu_state_mutex);
1125 put_online_cpus();
1126 return rc ? rc : count;
1127}
1128static DEVICE_ATTR(configure, 0644, cpu_configure_show, cpu_configure_store);
1129
1130static ssize_t show_cpu_address(struct device *dev,
1131 struct device_attribute *attr, char *buf)
1132{
1133 return sprintf(buf, "%d\n", pcpu_devices[dev->id].address);
1134}
1135static DEVICE_ATTR(address, 0444, show_cpu_address, NULL);
1136
1137static struct attribute *cpu_common_attrs[] = {
1138 &dev_attr_configure.attr,
1139 &dev_attr_address.attr,
1140 NULL,
1141};
1142
1143static struct attribute_group cpu_common_attr_group = {
1144 .attrs = cpu_common_attrs,
1145};
1146
1147static struct attribute *cpu_online_attrs[] = {
1148 &dev_attr_idle_count.attr,
1149 &dev_attr_idle_time_us.attr,
1150 NULL,
1151};
1152
1153static struct attribute_group cpu_online_attr_group = {
1154 .attrs = cpu_online_attrs,
1155};
1156
1157static int smp_cpu_online(unsigned int cpu)
1158{
1159 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1160
1161 return sysfs_create_group(&s->kobj, &cpu_online_attr_group);
1162}
1163
1164static int smp_cpu_pre_down(unsigned int cpu)
1165{
1166 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1167
1168 sysfs_remove_group(&s->kobj, &cpu_online_attr_group);
1169 return 0;
1170}
1171
1172static int smp_add_present_cpu(int cpu)
1173{
1174 struct device *s;
1175 struct cpu *c;
1176 int rc;
1177
1178 c = kzalloc(sizeof(*c), GFP_KERNEL);
1179 if (!c)
1180 return -ENOMEM;
1181 per_cpu(cpu_device, cpu) = c;
1182 s = &c->dev;
1183 c->hotpluggable = 1;
1184 rc = register_cpu(c, cpu);
1185 if (rc)
1186 goto out;
1187 rc = sysfs_create_group(&s->kobj, &cpu_common_attr_group);
1188 if (rc)
1189 goto out_cpu;
1190 rc = topology_cpu_init(c);
1191 if (rc)
1192 goto out_topology;
1193 return 0;
1194
1195out_topology:
1196 sysfs_remove_group(&s->kobj, &cpu_common_attr_group);
1197out_cpu:
1198 unregister_cpu(c);
1199out:
1200 return rc;
1201}
1202
1203int __ref smp_rescan_cpus(void)
1204{
1205 struct sclp_core_info *info;
1206 int nr;
1207
1208 info = kzalloc(sizeof(*info), GFP_KERNEL);
1209 if (!info)
1210 return -ENOMEM;
1211 smp_get_core_info(info, 0);
1212 nr = __smp_rescan_cpus(info, false);
1213 kfree(info);
1214 if (nr)
1215 topology_schedule_update();
1216 return 0;
1217}
1218
1219static ssize_t __ref rescan_store(struct device *dev,
1220 struct device_attribute *attr,
1221 const char *buf,
1222 size_t count)
1223{
1224 int rc;
1225
1226 rc = lock_device_hotplug_sysfs();
1227 if (rc)
1228 return rc;
1229 rc = smp_rescan_cpus();
1230 unlock_device_hotplug();
1231 return rc ? rc : count;
1232}
1233static DEVICE_ATTR_WO(rescan);
1234
1235static int __init s390_smp_init(void)
1236{
1237 int cpu, rc = 0;
1238
1239 rc = device_create_file(cpu_subsys.dev_root, &dev_attr_rescan);
1240 if (rc)
1241 return rc;
1242 for_each_present_cpu(cpu) {
1243 rc = smp_add_present_cpu(cpu);
1244 if (rc)
1245 goto out;
1246 }
1247
1248 rc = cpuhp_setup_state(CPUHP_AP_ONLINE_DYN, "s390/smp:online",
1249 smp_cpu_online, smp_cpu_pre_down);
1250 rc = rc <= 0 ? rc : 0;
1251out:
1252 return rc;
1253}
1254subsys_initcall(s390_smp_init);
1255
1256static __always_inline void set_new_lowcore(struct lowcore *lc)
1257{
1258 union register_pair dst, src;
1259 u32 pfx;
1260
1261 src.even = (unsigned long) &S390_lowcore;
1262 src.odd = sizeof(S390_lowcore);
1263 dst.even = (unsigned long) lc;
1264 dst.odd = sizeof(*lc);
1265 pfx = (unsigned long) lc;
1266
1267 asm volatile(
1268 " mvcl %[dst],%[src]\n"
1269 " spx %[pfx]\n"
1270 : [dst] "+&d" (dst.pair), [src] "+&d" (src.pair)
1271 : [pfx] "Q" (pfx)
1272 : "memory", "cc");
1273}
1274
1275static int __init smp_reinit_ipl_cpu(void)
1276{
1277 unsigned long async_stack, nodat_stack, mcck_stack;
1278 struct lowcore *lc, *lc_ipl;
1279 unsigned long flags;
1280
1281 lc_ipl = lowcore_ptr[0];
1282 lc = (struct lowcore *) __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
1283 nodat_stack = __get_free_pages(GFP_KERNEL, THREAD_SIZE_ORDER);
1284 async_stack = stack_alloc();
1285 mcck_stack = stack_alloc();
1286 if (!lc || !nodat_stack || !async_stack || !mcck_stack)
1287 panic("Couldn't allocate memory");
1288
1289 local_irq_save(flags);
1290 local_mcck_disable();
1291 set_new_lowcore(lc);
1292 S390_lowcore.nodat_stack = nodat_stack + STACK_INIT_OFFSET;
1293 S390_lowcore.async_stack = async_stack + STACK_INIT_OFFSET;
1294 S390_lowcore.mcck_stack = mcck_stack + STACK_INIT_OFFSET;
1295 lowcore_ptr[0] = lc;
1296 local_mcck_enable();
1297 local_irq_restore(flags);
1298
1299 free_pages(lc_ipl->async_stack - STACK_INIT_OFFSET, THREAD_SIZE_ORDER);
1300 memblock_free_late(lc_ipl->mcck_stack - STACK_INIT_OFFSET, THREAD_SIZE);
1301 memblock_free_late((unsigned long) lc_ipl, sizeof(*lc_ipl));
1302
1303 return 0;
1304}
1305early_initcall(smp_reinit_ipl_cpu);