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v3.15
 
   1#include <linux/module.h>
   2#include <linux/kernel.h>
   3#include <linux/init.h>
   4#include <linux/platform_device.h>
 
 
   5#include <linux/dma-mapping.h>
 
   6#include <linux/spi/pxa2xx_spi.h>
   7#include <linux/i2c/pxa-i2c.h>
   8
   9#include <mach/udc.h>
  10#include <linux/platform_data/usb-pxa3xx-ulpi.h>
  11#include <linux/platform_data/video-pxafb.h>
  12#include <linux/platform_data/mmc-pxamci.h>
  13#include <linux/platform_data/irda-pxaficp.h>
  14#include <mach/irqs.h>
  15#include <linux/platform_data/usb-ohci-pxa27x.h>
  16#include <linux/platform_data/keypad-pxa27x.h>
  17#include <linux/platform_data/camera-pxa.h>
  18#include <mach/audio.h>
  19#include <mach/hardware.h>
 
  20#include <linux/platform_data/mtd-nand-pxa3xx.h>
  21
  22#include "devices.h"
  23#include "generic.h"
  24
  25void __init pxa_register_device(struct platform_device *dev, void *data)
  26{
  27	int ret;
  28
  29	dev->dev.platform_data = data;
  30
  31	ret = platform_device_register(dev);
  32	if (ret)
  33		dev_err(&dev->dev, "unable to register device: %d\n", ret);
  34}
  35
  36static struct resource pxa_resource_pmu = {
  37	.start	= IRQ_PMU,
  38	.end	= IRQ_PMU,
  39	.flags	= IORESOURCE_IRQ,
  40};
  41
  42struct platform_device pxa_device_pmu = {
  43	.name		= "arm-pmu",
  44	.id		= -1,
  45	.resource	= &pxa_resource_pmu,
  46	.num_resources	= 1,
  47};
  48
  49static struct resource pxamci_resources[] = {
  50	[0] = {
  51		.start	= 0x41100000,
  52		.end	= 0x41100fff,
  53		.flags	= IORESOURCE_MEM,
  54	},
  55	[1] = {
  56		.start	= IRQ_MMC,
  57		.end	= IRQ_MMC,
  58		.flags	= IORESOURCE_IRQ,
  59	},
  60	[2] = {
  61		.start	= 21,
  62		.end	= 21,
  63		.flags	= IORESOURCE_DMA,
  64	},
  65	[3] = {
  66		.start	= 22,
  67		.end	= 22,
  68		.flags	= IORESOURCE_DMA,
  69	},
  70};
  71
  72static u64 pxamci_dmamask = 0xffffffffUL;
  73
  74struct platform_device pxa_device_mci = {
  75	.name		= "pxa2xx-mci",
  76	.id		= 0,
  77	.dev		= {
  78		.dma_mask = &pxamci_dmamask,
  79		.coherent_dma_mask = 0xffffffff,
  80	},
  81	.num_resources	= ARRAY_SIZE(pxamci_resources),
  82	.resource	= pxamci_resources,
  83};
  84
  85void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  86{
  87	pxa_register_device(&pxa_device_mci, info);
  88}
  89
  90
  91static struct pxa2xx_udc_mach_info pxa_udc_info = {
  92	.gpio_pullup = -1,
  93};
  94
  95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  96{
  97	memcpy(&pxa_udc_info, info, sizeof *info);
  98}
  99
 100static struct resource pxa2xx_udc_resources[] = {
 101	[0] = {
 102		.start	= 0x40600000,
 103		.end	= 0x4060ffff,
 104		.flags	= IORESOURCE_MEM,
 105	},
 106	[1] = {
 107		.start	= IRQ_USB,
 108		.end	= IRQ_USB,
 109		.flags	= IORESOURCE_IRQ,
 110	},
 111};
 112
 113static u64 udc_dma_mask = ~(u32)0;
 114
 115struct platform_device pxa25x_device_udc = {
 116	.name		= "pxa25x-udc",
 117	.id		= -1,
 118	.resource	= pxa2xx_udc_resources,
 119	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 120	.dev		=  {
 121		.platform_data	= &pxa_udc_info,
 122		.dma_mask	= &udc_dma_mask,
 123	}
 124};
 125
 126struct platform_device pxa27x_device_udc = {
 127	.name		= "pxa27x-udc",
 128	.id		= -1,
 129	.resource	= pxa2xx_udc_resources,
 130	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 131	.dev		=  {
 132		.platform_data	= &pxa_udc_info,
 133		.dma_mask	= &udc_dma_mask,
 134	}
 135};
 136
 137#ifdef CONFIG_PXA3xx
 138static struct resource pxa3xx_u2d_resources[] = {
 139	[0] = {
 140		.start	= 0x54100000,
 141		.end	= 0x54100fff,
 142		.flags	= IORESOURCE_MEM,
 143	},
 144	[1] = {
 145		.start	= IRQ_USB2,
 146		.end	= IRQ_USB2,
 147		.flags	= IORESOURCE_IRQ,
 148	},
 149};
 150
 151struct platform_device pxa3xx_device_u2d = {
 152	.name		= "pxa3xx-u2d",
 153	.id		= -1,
 154	.resource	= pxa3xx_u2d_resources,
 155	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
 156};
 157
 158void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
 159{
 160	pxa_register_device(&pxa3xx_device_u2d, info);
 161}
 162#endif /* CONFIG_PXA3xx */
 163
 164static struct resource pxafb_resources[] = {
 165	[0] = {
 166		.start	= 0x44000000,
 167		.end	= 0x4400ffff,
 168		.flags	= IORESOURCE_MEM,
 169	},
 170	[1] = {
 171		.start	= IRQ_LCD,
 172		.end	= IRQ_LCD,
 173		.flags	= IORESOURCE_IRQ,
 174	},
 175};
 176
 177static u64 fb_dma_mask = ~(u64)0;
 178
 179struct platform_device pxa_device_fb = {
 180	.name		= "pxa2xx-fb",
 181	.id		= -1,
 182	.dev		= {
 183		.dma_mask	= &fb_dma_mask,
 184		.coherent_dma_mask = 0xffffffff,
 185	},
 186	.num_resources	= ARRAY_SIZE(pxafb_resources),
 187	.resource	= pxafb_resources,
 188};
 189
 190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
 191{
 192	pxa_device_fb.dev.parent = parent;
 193	pxa_register_device(&pxa_device_fb, info);
 194}
 195
 196static struct resource pxa_resource_ffuart[] = {
 197	{
 198		.start	= 0x40100000,
 199		.end	= 0x40100023,
 200		.flags	= IORESOURCE_MEM,
 201	}, {
 202		.start	= IRQ_FFUART,
 203		.end	= IRQ_FFUART,
 204		.flags	= IORESOURCE_IRQ,
 205	}
 206};
 207
 208struct platform_device pxa_device_ffuart = {
 209	.name		= "pxa2xx-uart",
 210	.id		= 0,
 211	.resource	= pxa_resource_ffuart,
 212	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
 213};
 214
 215void __init pxa_set_ffuart_info(void *info)
 216{
 217	pxa_register_device(&pxa_device_ffuart, info);
 218}
 219
 220static struct resource pxa_resource_btuart[] = {
 221	{
 222		.start	= 0x40200000,
 223		.end	= 0x40200023,
 224		.flags	= IORESOURCE_MEM,
 225	}, {
 226		.start	= IRQ_BTUART,
 227		.end	= IRQ_BTUART,
 228		.flags	= IORESOURCE_IRQ,
 229	}
 230};
 231
 232struct platform_device pxa_device_btuart = {
 233	.name		= "pxa2xx-uart",
 234	.id		= 1,
 235	.resource	= pxa_resource_btuart,
 236	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
 237};
 238
 239void __init pxa_set_btuart_info(void *info)
 240{
 241	pxa_register_device(&pxa_device_btuart, info);
 242}
 243
 244static struct resource pxa_resource_stuart[] = {
 245	{
 246		.start	= 0x40700000,
 247		.end	= 0x40700023,
 248		.flags	= IORESOURCE_MEM,
 249	}, {
 250		.start	= IRQ_STUART,
 251		.end	= IRQ_STUART,
 252		.flags	= IORESOURCE_IRQ,
 253	}
 254};
 255
 256struct platform_device pxa_device_stuart = {
 257	.name		= "pxa2xx-uart",
 258	.id		= 2,
 259	.resource	= pxa_resource_stuart,
 260	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
 261};
 262
 263void __init pxa_set_stuart_info(void *info)
 264{
 265	pxa_register_device(&pxa_device_stuart, info);
 266}
 267
 268static struct resource pxa_resource_hwuart[] = {
 269	{
 270		.start	= 0x41600000,
 271		.end	= 0x4160002F,
 272		.flags	= IORESOURCE_MEM,
 273	}, {
 274		.start	= IRQ_HWUART,
 275		.end	= IRQ_HWUART,
 276		.flags	= IORESOURCE_IRQ,
 277	}
 278};
 279
 280struct platform_device pxa_device_hwuart = {
 281	.name		= "pxa2xx-uart",
 282	.id		= 3,
 283	.resource	= pxa_resource_hwuart,
 284	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
 285};
 286
 287void __init pxa_set_hwuart_info(void *info)
 288{
 289	if (cpu_is_pxa255())
 290		pxa_register_device(&pxa_device_hwuart, info);
 291	else
 292		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
 293}
 294
 295static struct resource pxai2c_resources[] = {
 296	{
 297		.start	= 0x40301680,
 298		.end	= 0x403016a3,
 299		.flags	= IORESOURCE_MEM,
 300	}, {
 301		.start	= IRQ_I2C,
 302		.end	= IRQ_I2C,
 303		.flags	= IORESOURCE_IRQ,
 304	},
 305};
 306
 307struct platform_device pxa_device_i2c = {
 308	.name		= "pxa2xx-i2c",
 309	.id		= 0,
 310	.resource	= pxai2c_resources,
 311	.num_resources	= ARRAY_SIZE(pxai2c_resources),
 312};
 313
 314void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 315{
 316	pxa_register_device(&pxa_device_i2c, info);
 317}
 318
 319#ifdef CONFIG_PXA27x
 320static struct resource pxa27x_resources_i2c_power[] = {
 321	{
 322		.start	= 0x40f00180,
 323		.end	= 0x40f001a3,
 324		.flags	= IORESOURCE_MEM,
 325	}, {
 326		.start	= IRQ_PWRI2C,
 327		.end	= IRQ_PWRI2C,
 328		.flags	= IORESOURCE_IRQ,
 329	},
 330};
 331
 332struct platform_device pxa27x_device_i2c_power = {
 333	.name		= "pxa2xx-i2c",
 334	.id		= 1,
 335	.resource	= pxa27x_resources_i2c_power,
 336	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
 337};
 338#endif
 339
 340static struct resource pxai2s_resources[] = {
 341	{
 342		.start	= 0x40400000,
 343		.end	= 0x40400083,
 344		.flags	= IORESOURCE_MEM,
 345	}, {
 346		.start	= IRQ_I2S,
 347		.end	= IRQ_I2S,
 348		.flags	= IORESOURCE_IRQ,
 349	},
 350};
 351
 352struct platform_device pxa_device_i2s = {
 353	.name		= "pxa2xx-i2s",
 354	.id		= -1,
 355	.resource	= pxai2s_resources,
 356	.num_resources	= ARRAY_SIZE(pxai2s_resources),
 357};
 358
 359struct platform_device pxa_device_asoc_ssp1 = {
 360	.name		= "pxa-ssp-dai",
 361	.id		= 0,
 362};
 363
 364struct platform_device pxa_device_asoc_ssp2= {
 365	.name		= "pxa-ssp-dai",
 366	.id		= 1,
 367};
 368
 369struct platform_device pxa_device_asoc_ssp3 = {
 370	.name		= "pxa-ssp-dai",
 371	.id		= 2,
 372};
 373
 374struct platform_device pxa_device_asoc_ssp4 = {
 375	.name		= "pxa-ssp-dai",
 376	.id		= 3,
 377};
 378
 379struct platform_device pxa_device_asoc_platform = {
 380	.name		= "pxa-pcm-audio",
 381	.id		= -1,
 382};
 383
 384static u64 pxaficp_dmamask = ~(u32)0;
 385
 386static struct resource pxa_ir_resources[] = {
 387	[0] = {
 388		.start  = IRQ_STUART,
 389		.end    = IRQ_STUART,
 390		.flags  = IORESOURCE_IRQ,
 391	},
 392	[1] = {
 393		.start  = IRQ_ICP,
 394		.end    = IRQ_ICP,
 395		.flags  = IORESOURCE_IRQ,
 396	},
 
 
 
 
 
 
 
 
 
 
 397};
 398
 399struct platform_device pxa_device_ficp = {
 400	.name		= "pxa2xx-ir",
 401	.id		= -1,
 402	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
 403	.resource	= pxa_ir_resources,
 404	.dev		= {
 405		.dma_mask = &pxaficp_dmamask,
 406		.coherent_dma_mask = 0xffffffff,
 407	},
 408};
 409
 410void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
 411{
 412	pxa_register_device(&pxa_device_ficp, info);
 413}
 414
 415static struct resource pxa_rtc_resources[] = {
 416	[0] = {
 417		.start  = 0x40900000,
 418		.end	= 0x40900000 + 0x3b,
 419		.flags  = IORESOURCE_MEM,
 420	},
 421	[1] = {
 422		.start  = IRQ_RTC1Hz,
 423		.end    = IRQ_RTC1Hz,
 424		.name	= "rtc 1Hz",
 425		.flags  = IORESOURCE_IRQ,
 426	},
 427	[2] = {
 428		.start  = IRQ_RTCAlrm,
 429		.end    = IRQ_RTCAlrm,
 430		.name	= "rtc alarm",
 431		.flags  = IORESOURCE_IRQ,
 432	},
 433};
 434
 435struct platform_device pxa_device_rtc = {
 436	.name		= "pxa-rtc",
 437	.id		= -1,
 438	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
 439	.resource       = pxa_rtc_resources,
 440};
 441
 442static struct resource sa1100_rtc_resources[] = {
 443	{
 444		.start  = IRQ_RTC1Hz,
 445		.end    = IRQ_RTC1Hz,
 446		.name	= "rtc 1Hz",
 447		.flags  = IORESOURCE_IRQ,
 448	}, {
 449		.start  = IRQ_RTCAlrm,
 450		.end    = IRQ_RTCAlrm,
 451		.name	= "rtc alarm",
 452		.flags  = IORESOURCE_IRQ,
 453	},
 454};
 455
 456struct platform_device sa1100_device_rtc = {
 457	.name		= "sa1100-rtc",
 458	.id		= -1,
 459	.num_resources	= ARRAY_SIZE(sa1100_rtc_resources),
 460	.resource	= sa1100_rtc_resources,
 461};
 462
 463static struct resource pxa_ac97_resources[] = {
 464	[0] = {
 465		.start  = 0x40500000,
 466		.end	= 0x40500000 + 0xfff,
 467		.flags  = IORESOURCE_MEM,
 468	},
 469	[1] = {
 470		.start  = IRQ_AC97,
 471		.end    = IRQ_AC97,
 472		.flags  = IORESOURCE_IRQ,
 473	},
 474};
 475
 476static u64 pxa_ac97_dmamask = 0xffffffffUL;
 477
 478struct platform_device pxa_device_ac97 = {
 479	.name           = "pxa2xx-ac97",
 480	.id             = -1,
 481	.dev            = {
 482		.dma_mask = &pxa_ac97_dmamask,
 483		.coherent_dma_mask = 0xffffffff,
 484	},
 485	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
 486	.resource       = pxa_ac97_resources,
 487};
 488
 489void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
 490{
 
 
 
 
 
 
 
 
 
 
 
 
 491	pxa_register_device(&pxa_device_ac97, ops);
 492}
 493
 494#ifdef CONFIG_PXA25x
 495
 496static struct resource pxa25x_resource_pwm0[] = {
 497	[0] = {
 498		.start	= 0x40b00000,
 499		.end	= 0x40b0000f,
 500		.flags	= IORESOURCE_MEM,
 501	},
 502};
 503
 504struct platform_device pxa25x_device_pwm0 = {
 505	.name		= "pxa25x-pwm",
 506	.id		= 0,
 507	.resource	= pxa25x_resource_pwm0,
 508	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
 509};
 510
 511static struct resource pxa25x_resource_pwm1[] = {
 512	[0] = {
 513		.start	= 0x40c00000,
 514		.end	= 0x40c0000f,
 515		.flags	= IORESOURCE_MEM,
 516	},
 517};
 518
 519struct platform_device pxa25x_device_pwm1 = {
 520	.name		= "pxa25x-pwm",
 521	.id		= 1,
 522	.resource	= pxa25x_resource_pwm1,
 523	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
 524};
 525
 526static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
 527
 528static struct resource pxa25x_resource_ssp[] = {
 529	[0] = {
 530		.start	= 0x41000000,
 531		.end	= 0x4100001f,
 532		.flags	= IORESOURCE_MEM,
 533	},
 534	[1] = {
 535		.start	= IRQ_SSP,
 536		.end	= IRQ_SSP,
 537		.flags	= IORESOURCE_IRQ,
 538	},
 539	[2] = {
 540		/* DRCMR for RX */
 541		.start	= 13,
 542		.end	= 13,
 543		.flags	= IORESOURCE_DMA,
 544	},
 545	[3] = {
 546		/* DRCMR for TX */
 547		.start	= 14,
 548		.end	= 14,
 549		.flags	= IORESOURCE_DMA,
 550	},
 551};
 552
 553struct platform_device pxa25x_device_ssp = {
 554	.name		= "pxa25x-ssp",
 555	.id		= 0,
 556	.dev		= {
 557		.dma_mask = &pxa25x_ssp_dma_mask,
 558		.coherent_dma_mask = DMA_BIT_MASK(32),
 559	},
 560	.resource	= pxa25x_resource_ssp,
 561	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
 562};
 563
 564static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
 565
 566static struct resource pxa25x_resource_nssp[] = {
 567	[0] = {
 568		.start	= 0x41400000,
 569		.end	= 0x4140002f,
 570		.flags	= IORESOURCE_MEM,
 571	},
 572	[1] = {
 573		.start	= IRQ_NSSP,
 574		.end	= IRQ_NSSP,
 575		.flags	= IORESOURCE_IRQ,
 576	},
 577	[2] = {
 578		/* DRCMR for RX */
 579		.start	= 15,
 580		.end	= 15,
 581		.flags	= IORESOURCE_DMA,
 582	},
 583	[3] = {
 584		/* DRCMR for TX */
 585		.start	= 16,
 586		.end	= 16,
 587		.flags	= IORESOURCE_DMA,
 588	},
 589};
 590
 591struct platform_device pxa25x_device_nssp = {
 592	.name		= "pxa25x-nssp",
 593	.id		= 1,
 594	.dev		= {
 595		.dma_mask = &pxa25x_nssp_dma_mask,
 596		.coherent_dma_mask = DMA_BIT_MASK(32),
 597	},
 598	.resource	= pxa25x_resource_nssp,
 599	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
 600};
 601
 602static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
 603
 604static struct resource pxa25x_resource_assp[] = {
 605	[0] = {
 606		.start	= 0x41500000,
 607		.end	= 0x4150002f,
 608		.flags	= IORESOURCE_MEM,
 609	},
 610	[1] = {
 611		.start	= IRQ_ASSP,
 612		.end	= IRQ_ASSP,
 613		.flags	= IORESOURCE_IRQ,
 614	},
 615	[2] = {
 616		/* DRCMR for RX */
 617		.start	= 23,
 618		.end	= 23,
 619		.flags	= IORESOURCE_DMA,
 620	},
 621	[3] = {
 622		/* DRCMR for TX */
 623		.start	= 24,
 624		.end	= 24,
 625		.flags	= IORESOURCE_DMA,
 626	},
 627};
 628
 629struct platform_device pxa25x_device_assp = {
 630	/* ASSP is basically equivalent to NSSP */
 631	.name		= "pxa25x-nssp",
 632	.id		= 2,
 633	.dev		= {
 634		.dma_mask = &pxa25x_assp_dma_mask,
 635		.coherent_dma_mask = DMA_BIT_MASK(32),
 636	},
 637	.resource	= pxa25x_resource_assp,
 638	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
 639};
 640#endif /* CONFIG_PXA25x */
 641
 642#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 643static struct resource pxa27x_resource_camera[] = {
 644	[0] = {
 645		.start	= 0x50000000,
 646		.end	= 0x50000fff,
 647		.flags	= IORESOURCE_MEM,
 648	},
 649	[1] = {
 650		.start	= IRQ_CAMERA,
 651		.end	= IRQ_CAMERA,
 652		.flags	= IORESOURCE_IRQ,
 653	},
 654};
 655
 656static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
 657
 658static struct platform_device pxa27x_device_camera = {
 659	.name		= "pxa27x-camera",
 660	.id		= 0, /* This is used to put cameras on this interface */
 661	.dev		= {
 662		.dma_mask      		= &pxa27x_dma_mask_camera,
 663		.coherent_dma_mask	= 0xffffffff,
 664	},
 665	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
 666	.resource	= pxa27x_resource_camera,
 667};
 668
 669void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
 670{
 
 
 
 
 
 
 
 671	pxa_register_device(&pxa27x_device_camera, info);
 672}
 673
 674static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
 675
 676static struct resource pxa27x_resource_ohci[] = {
 677	[0] = {
 678		.start  = 0x4C000000,
 679		.end    = 0x4C00ff6f,
 680		.flags  = IORESOURCE_MEM,
 681	},
 682	[1] = {
 683		.start  = IRQ_USBH1,
 684		.end    = IRQ_USBH1,
 685		.flags  = IORESOURCE_IRQ,
 686	},
 687};
 688
 689struct platform_device pxa27x_device_ohci = {
 690	.name		= "pxa27x-ohci",
 691	.id		= -1,
 692	.dev		= {
 693		.dma_mask = &pxa27x_ohci_dma_mask,
 694		.coherent_dma_mask = DMA_BIT_MASK(32),
 695	},
 696	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
 697	.resource       = pxa27x_resource_ohci,
 698};
 699
 700void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 701{
 702	pxa_register_device(&pxa27x_device_ohci, info);
 703}
 704#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 705
 706#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 707static struct resource pxa27x_resource_keypad[] = {
 708	[0] = {
 709		.start	= 0x41500000,
 710		.end	= 0x4150004c,
 711		.flags	= IORESOURCE_MEM,
 712	},
 713	[1] = {
 714		.start	= IRQ_KEYPAD,
 715		.end	= IRQ_KEYPAD,
 716		.flags	= IORESOURCE_IRQ,
 717	},
 718};
 719
 720struct platform_device pxa27x_device_keypad = {
 721	.name		= "pxa27x-keypad",
 722	.id		= -1,
 723	.resource	= pxa27x_resource_keypad,
 724	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
 725};
 726
 727void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
 728{
 729	pxa_register_device(&pxa27x_device_keypad, info);
 730}
 731
 732static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
 733
 734static struct resource pxa27x_resource_ssp1[] = {
 735	[0] = {
 736		.start	= 0x41000000,
 737		.end	= 0x4100003f,
 738		.flags	= IORESOURCE_MEM,
 739	},
 740	[1] = {
 741		.start	= IRQ_SSP,
 742		.end	= IRQ_SSP,
 743		.flags	= IORESOURCE_IRQ,
 744	},
 745	[2] = {
 746		/* DRCMR for RX */
 747		.start	= 13,
 748		.end	= 13,
 749		.flags	= IORESOURCE_DMA,
 750	},
 751	[3] = {
 752		/* DRCMR for TX */
 753		.start	= 14,
 754		.end	= 14,
 755		.flags	= IORESOURCE_DMA,
 756	},
 757};
 758
 759struct platform_device pxa27x_device_ssp1 = {
 760	.name		= "pxa27x-ssp",
 761	.id		= 0,
 762	.dev		= {
 763		.dma_mask = &pxa27x_ssp1_dma_mask,
 764		.coherent_dma_mask = DMA_BIT_MASK(32),
 765	},
 766	.resource	= pxa27x_resource_ssp1,
 767	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
 768};
 769
 770static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
 771
 772static struct resource pxa27x_resource_ssp2[] = {
 773	[0] = {
 774		.start	= 0x41700000,
 775		.end	= 0x4170003f,
 776		.flags	= IORESOURCE_MEM,
 777	},
 778	[1] = {
 779		.start	= IRQ_SSP2,
 780		.end	= IRQ_SSP2,
 781		.flags	= IORESOURCE_IRQ,
 782	},
 783	[2] = {
 784		/* DRCMR for RX */
 785		.start	= 15,
 786		.end	= 15,
 787		.flags	= IORESOURCE_DMA,
 788	},
 789	[3] = {
 790		/* DRCMR for TX */
 791		.start	= 16,
 792		.end	= 16,
 793		.flags	= IORESOURCE_DMA,
 794	},
 795};
 796
 797struct platform_device pxa27x_device_ssp2 = {
 798	.name		= "pxa27x-ssp",
 799	.id		= 1,
 800	.dev		= {
 801		.dma_mask = &pxa27x_ssp2_dma_mask,
 802		.coherent_dma_mask = DMA_BIT_MASK(32),
 803	},
 804	.resource	= pxa27x_resource_ssp2,
 805	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
 806};
 807
 808static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
 809
 810static struct resource pxa27x_resource_ssp3[] = {
 811	[0] = {
 812		.start	= 0x41900000,
 813		.end	= 0x4190003f,
 814		.flags	= IORESOURCE_MEM,
 815	},
 816	[1] = {
 817		.start	= IRQ_SSP3,
 818		.end	= IRQ_SSP3,
 819		.flags	= IORESOURCE_IRQ,
 820	},
 821	[2] = {
 822		/* DRCMR for RX */
 823		.start	= 66,
 824		.end	= 66,
 825		.flags	= IORESOURCE_DMA,
 826	},
 827	[3] = {
 828		/* DRCMR for TX */
 829		.start	= 67,
 830		.end	= 67,
 831		.flags	= IORESOURCE_DMA,
 832	},
 833};
 834
 835struct platform_device pxa27x_device_ssp3 = {
 836	.name		= "pxa27x-ssp",
 837	.id		= 2,
 838	.dev		= {
 839		.dma_mask = &pxa27x_ssp3_dma_mask,
 840		.coherent_dma_mask = DMA_BIT_MASK(32),
 841	},
 842	.resource	= pxa27x_resource_ssp3,
 843	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
 844};
 845
 846static struct resource pxa27x_resource_pwm0[] = {
 847	[0] = {
 848		.start	= 0x40b00000,
 849		.end	= 0x40b0001f,
 850		.flags	= IORESOURCE_MEM,
 851	},
 852};
 853
 854struct platform_device pxa27x_device_pwm0 = {
 855	.name		= "pxa27x-pwm",
 856	.id		= 0,
 857	.resource	= pxa27x_resource_pwm0,
 858	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
 859};
 860
 861static struct resource pxa27x_resource_pwm1[] = {
 862	[0] = {
 863		.start	= 0x40c00000,
 864		.end	= 0x40c0001f,
 865		.flags	= IORESOURCE_MEM,
 866	},
 867};
 868
 869struct platform_device pxa27x_device_pwm1 = {
 870	.name		= "pxa27x-pwm",
 871	.id		= 1,
 872	.resource	= pxa27x_resource_pwm1,
 873	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
 874};
 875#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 876
 877#ifdef CONFIG_PXA3xx
 878static struct resource pxa3xx_resources_mci2[] = {
 879	[0] = {
 880		.start	= 0x42000000,
 881		.end	= 0x42000fff,
 882		.flags	= IORESOURCE_MEM,
 883	},
 884	[1] = {
 885		.start	= IRQ_MMC2,
 886		.end	= IRQ_MMC2,
 887		.flags	= IORESOURCE_IRQ,
 888	},
 889	[2] = {
 890		.start	= 93,
 891		.end	= 93,
 892		.flags	= IORESOURCE_DMA,
 893	},
 894	[3] = {
 895		.start	= 94,
 896		.end	= 94,
 897		.flags	= IORESOURCE_DMA,
 898	},
 899};
 900
 901struct platform_device pxa3xx_device_mci2 = {
 902	.name		= "pxa2xx-mci",
 903	.id		= 1,
 904	.dev		= {
 905		.dma_mask = &pxamci_dmamask,
 906		.coherent_dma_mask =	0xffffffff,
 907	},
 908	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
 909	.resource	= pxa3xx_resources_mci2,
 910};
 911
 912void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
 913{
 914	pxa_register_device(&pxa3xx_device_mci2, info);
 915}
 916
 917static struct resource pxa3xx_resources_mci3[] = {
 918	[0] = {
 919		.start	= 0x42500000,
 920		.end	= 0x42500fff,
 921		.flags	= IORESOURCE_MEM,
 922	},
 923	[1] = {
 924		.start	= IRQ_MMC3,
 925		.end	= IRQ_MMC3,
 926		.flags	= IORESOURCE_IRQ,
 927	},
 928	[2] = {
 929		.start	= 100,
 930		.end	= 100,
 931		.flags	= IORESOURCE_DMA,
 932	},
 933	[3] = {
 934		.start	= 101,
 935		.end	= 101,
 936		.flags	= IORESOURCE_DMA,
 937	},
 938};
 939
 940struct platform_device pxa3xx_device_mci3 = {
 941	.name		= "pxa2xx-mci",
 942	.id		= 2,
 943	.dev		= {
 944		.dma_mask = &pxamci_dmamask,
 945		.coherent_dma_mask = 0xffffffff,
 946	},
 947	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
 948	.resource	= pxa3xx_resources_mci3,
 949};
 950
 951void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
 952{
 953	pxa_register_device(&pxa3xx_device_mci3, info);
 954}
 955
 956static struct resource pxa3xx_resources_gcu[] = {
 957	{
 958		.start	= 0x54000000,
 959		.end	= 0x54000fff,
 960		.flags	= IORESOURCE_MEM,
 961	},
 962	{
 963		.start	= IRQ_GCU,
 964		.end	= IRQ_GCU,
 965		.flags	= IORESOURCE_IRQ,
 966	},
 967};
 968
 969static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
 970
 971struct platform_device pxa3xx_device_gcu = {
 972	.name		= "pxa3xx-gcu",
 973	.id		= -1,
 974	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
 975	.resource	= pxa3xx_resources_gcu,
 976	.dev		= {
 977		.dma_mask = &pxa3xx_gcu_dmamask,
 978		.coherent_dma_mask = 0xffffffff,
 979	},
 980};
 981
 982#endif /* CONFIG_PXA3xx */
 983
 984#if defined(CONFIG_PXA3xx)
 985static struct resource pxa3xx_resources_i2c_power[] = {
 986	{
 987		.start  = 0x40f500c0,
 988		.end    = 0x40f500d3,
 989		.flags	= IORESOURCE_MEM,
 990	}, {
 991		.start	= IRQ_PWRI2C,
 992		.end	= IRQ_PWRI2C,
 993		.flags	= IORESOURCE_IRQ,
 994	},
 995};
 996
 997struct platform_device pxa3xx_device_i2c_power = {
 998	.name		= "pxa3xx-pwri2c",
 999	.id		= 1,
1000	.resource	= pxa3xx_resources_i2c_power,
1001	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
1002};
1003
1004static struct resource pxa3xx_resources_nand[] = {
1005	[0] = {
1006		.start	= 0x43100000,
1007		.end	= 0x43100053,
1008		.flags	= IORESOURCE_MEM,
1009	},
1010	[1] = {
1011		.start	= IRQ_NAND,
1012		.end	= IRQ_NAND,
1013		.flags	= IORESOURCE_IRQ,
1014	},
1015	[2] = {
1016		/* DRCMR for Data DMA */
1017		.start	= 97,
1018		.end	= 97,
1019		.flags	= IORESOURCE_DMA,
1020	},
1021	[3] = {
1022		/* DRCMR for Command DMA */
1023		.start	= 99,
1024		.end	= 99,
1025		.flags	= IORESOURCE_DMA,
1026	},
1027};
1028
1029static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1030
1031struct platform_device pxa3xx_device_nand = {
1032	.name		= "pxa3xx-nand",
1033	.id		= -1,
1034	.dev		= {
1035		.dma_mask = &pxa3xx_nand_dma_mask,
1036		.coherent_dma_mask = DMA_BIT_MASK(32),
1037	},
1038	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
1039	.resource	= pxa3xx_resources_nand,
1040};
1041
1042void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1043{
1044	pxa_register_device(&pxa3xx_device_nand, info);
1045}
1046
1047static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1048
1049static struct resource pxa3xx_resource_ssp4[] = {
1050	[0] = {
1051		.start	= 0x41a00000,
1052		.end	= 0x41a0003f,
1053		.flags	= IORESOURCE_MEM,
1054	},
1055	[1] = {
1056		.start	= IRQ_SSP4,
1057		.end	= IRQ_SSP4,
1058		.flags	= IORESOURCE_IRQ,
1059	},
1060	[2] = {
1061		/* DRCMR for RX */
1062		.start	= 2,
1063		.end	= 2,
1064		.flags	= IORESOURCE_DMA,
 
 
 
 
 
 
 
 
 
1065	},
1066	[3] = {
1067		/* DRCMR for TX */
1068		.start	= 3,
1069		.end	= 3,
1070		.flags	= IORESOURCE_DMA,
 
 
 
 
 
1071	},
 
 
 
 
 
 
 
 
 
 
 
 
 
1072};
1073
1074struct platform_device pxa3xx_device_ssp4 = {
1075	/* PXA3xx SSP is basically equivalent to PXA27x */
1076	.name		= "pxa27x-ssp",
1077	.id		= 3,
1078	.dev		= {
1079		.dma_mask = &pxa3xx_ssp4_dma_mask,
1080		.coherent_dma_mask = DMA_BIT_MASK(32),
1081	},
1082	.resource	= pxa3xx_resource_ssp4,
1083	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1084};
1085#endif /* CONFIG_PXA3xx */
1086
1087struct resource pxa_resource_gpio[] = {
1088	{
1089		.start	= 0x40e00000,
1090		.end	= 0x40e0ffff,
1091		.flags	= IORESOURCE_MEM,
1092	}, {
1093		.start	= IRQ_GPIO0,
1094		.end	= IRQ_GPIO0,
1095		.name	= "gpio0",
1096		.flags	= IORESOURCE_IRQ,
1097	}, {
1098		.start	= IRQ_GPIO1,
1099		.end	= IRQ_GPIO1,
1100		.name	= "gpio1",
1101		.flags	= IORESOURCE_IRQ,
1102	}, {
1103		.start	= IRQ_GPIO_2_x,
1104		.end	= IRQ_GPIO_2_x,
1105		.name	= "gpio_mux",
1106		.flags	= IORESOURCE_IRQ,
1107	},
1108};
1109
1110struct platform_device pxa25x_device_gpio = {
1111#ifdef CONFIG_CPU_PXA26x
1112	.name		= "pxa26x-gpio",
1113#else
1114	.name		= "pxa25x-gpio",
1115#endif
1116	.id		= -1,
1117	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1118	.resource	= pxa_resource_gpio,
1119};
1120
1121struct platform_device pxa27x_device_gpio = {
1122	.name		= "pxa27x-gpio",
1123	.id		= -1,
1124	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1125	.resource	= pxa_resource_gpio,
1126};
1127
1128struct platform_device pxa3xx_device_gpio = {
1129	.name		= "pxa3xx-gpio",
1130	.id		= -1,
1131	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1132	.resource	= pxa_resource_gpio,
1133};
1134
1135struct platform_device pxa93x_device_gpio = {
1136	.name		= "pxa93x-gpio",
1137	.id		= -1,
1138	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1139	.resource	= pxa_resource_gpio,
1140};
1141
1142/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1143 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1144void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1145{
1146	struct platform_device *pd;
1147
1148	pd = platform_device_alloc("pxa2xx-spi", id);
1149	if (pd == NULL) {
1150		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1151		       id);
1152		return;
1153	}
1154
1155	pd->dev.platform_data = info;
1156	platform_device_add(pd);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1157}
v5.14.15
   1// SPDX-License-Identifier: GPL-2.0
   2#include <linux/module.h>
   3#include <linux/kernel.h>
   4#include <linux/init.h>
   5#include <linux/platform_device.h>
   6#include <linux/clkdev.h>
   7#include <linux/clk-provider.h>
   8#include <linux/dma-mapping.h>
   9#include <linux/dmaengine.h>
  10#include <linux/spi/pxa2xx_spi.h>
  11#include <linux/platform_data/i2c-pxa.h>
  12
  13#include "udc.h"
  14#include <linux/platform_data/usb-pxa3xx-ulpi.h>
  15#include <linux/platform_data/video-pxafb.h>
  16#include <linux/platform_data/mmc-pxamci.h>
  17#include <linux/platform_data/irda-pxaficp.h>
  18#include <mach/irqs.h>
  19#include <linux/platform_data/usb-ohci-pxa27x.h>
  20#include <linux/platform_data/keypad-pxa27x.h>
  21#include <linux/platform_data/media/camera-pxa.h>
  22#include <mach/audio.h>
  23#include <mach/hardware.h>
  24#include <linux/platform_data/mmp_dma.h>
  25#include <linux/platform_data/mtd-nand-pxa3xx.h>
  26
  27#include "devices.h"
  28#include "generic.h"
  29
  30void __init pxa_register_device(struct platform_device *dev, void *data)
  31{
  32	int ret;
  33
  34	dev->dev.platform_data = data;
  35
  36	ret = platform_device_register(dev);
  37	if (ret)
  38		dev_err(&dev->dev, "unable to register device: %d\n", ret);
  39}
  40
  41static struct resource pxa_resource_pmu = {
  42	.start	= IRQ_PMU,
  43	.end	= IRQ_PMU,
  44	.flags	= IORESOURCE_IRQ,
  45};
  46
  47struct platform_device pxa_device_pmu = {
  48	.name		= "xscale-pmu",
  49	.id		= -1,
  50	.resource	= &pxa_resource_pmu,
  51	.num_resources	= 1,
  52};
  53
  54static struct resource pxamci_resources[] = {
  55	[0] = {
  56		.start	= 0x41100000,
  57		.end	= 0x41100fff,
  58		.flags	= IORESOURCE_MEM,
  59	},
  60	[1] = {
  61		.start	= IRQ_MMC,
  62		.end	= IRQ_MMC,
  63		.flags	= IORESOURCE_IRQ,
  64	},
 
 
 
 
 
 
 
 
 
 
  65};
  66
  67static u64 pxamci_dmamask = 0xffffffffUL;
  68
  69struct platform_device pxa_device_mci = {
  70	.name		= "pxa2xx-mci",
  71	.id		= 0,
  72	.dev		= {
  73		.dma_mask = &pxamci_dmamask,
  74		.coherent_dma_mask = 0xffffffff,
  75	},
  76	.num_resources	= ARRAY_SIZE(pxamci_resources),
  77	.resource	= pxamci_resources,
  78};
  79
  80void __init pxa_set_mci_info(struct pxamci_platform_data *info)
  81{
  82	pxa_register_device(&pxa_device_mci, info);
  83}
  84
  85
  86static struct pxa2xx_udc_mach_info pxa_udc_info = {
  87	.gpio_pullup = -1,
  88};
  89
  90void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
  91{
  92	memcpy(&pxa_udc_info, info, sizeof *info);
  93}
  94
  95static struct resource pxa2xx_udc_resources[] = {
  96	[0] = {
  97		.start	= 0x40600000,
  98		.end	= 0x4060ffff,
  99		.flags	= IORESOURCE_MEM,
 100	},
 101	[1] = {
 102		.start	= IRQ_USB,
 103		.end	= IRQ_USB,
 104		.flags	= IORESOURCE_IRQ,
 105	},
 106};
 107
 108static u64 udc_dma_mask = ~(u32)0;
 109
 110struct platform_device pxa25x_device_udc = {
 111	.name		= "pxa25x-udc",
 112	.id		= -1,
 113	.resource	= pxa2xx_udc_resources,
 114	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 115	.dev		=  {
 116		.platform_data	= &pxa_udc_info,
 117		.dma_mask	= &udc_dma_mask,
 118	}
 119};
 120
 121struct platform_device pxa27x_device_udc = {
 122	.name		= "pxa27x-udc",
 123	.id		= -1,
 124	.resource	= pxa2xx_udc_resources,
 125	.num_resources	= ARRAY_SIZE(pxa2xx_udc_resources),
 126	.dev		=  {
 127		.platform_data	= &pxa_udc_info,
 128		.dma_mask	= &udc_dma_mask,
 129	}
 130};
 131
 132#ifdef CONFIG_PXA3xx
 133static struct resource pxa3xx_u2d_resources[] = {
 134	[0] = {
 135		.start	= 0x54100000,
 136		.end	= 0x54100fff,
 137		.flags	= IORESOURCE_MEM,
 138	},
 139	[1] = {
 140		.start	= IRQ_USB2,
 141		.end	= IRQ_USB2,
 142		.flags	= IORESOURCE_IRQ,
 143	},
 144};
 145
 146struct platform_device pxa3xx_device_u2d = {
 147	.name		= "pxa3xx-u2d",
 148	.id		= -1,
 149	.resource	= pxa3xx_u2d_resources,
 150	.num_resources	= ARRAY_SIZE(pxa3xx_u2d_resources),
 151};
 152
 153void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
 154{
 155	pxa_register_device(&pxa3xx_device_u2d, info);
 156}
 157#endif /* CONFIG_PXA3xx */
 158
 159static struct resource pxafb_resources[] = {
 160	[0] = {
 161		.start	= 0x44000000,
 162		.end	= 0x4400ffff,
 163		.flags	= IORESOURCE_MEM,
 164	},
 165	[1] = {
 166		.start	= IRQ_LCD,
 167		.end	= IRQ_LCD,
 168		.flags	= IORESOURCE_IRQ,
 169	},
 170};
 171
 172static u64 fb_dma_mask = ~(u64)0;
 173
 174struct platform_device pxa_device_fb = {
 175	.name		= "pxa2xx-fb",
 176	.id		= -1,
 177	.dev		= {
 178		.dma_mask	= &fb_dma_mask,
 179		.coherent_dma_mask = 0xffffffff,
 180	},
 181	.num_resources	= ARRAY_SIZE(pxafb_resources),
 182	.resource	= pxafb_resources,
 183};
 184
 185void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
 186{
 187	pxa_device_fb.dev.parent = parent;
 188	pxa_register_device(&pxa_device_fb, info);
 189}
 190
 191static struct resource pxa_resource_ffuart[] = {
 192	{
 193		.start	= 0x40100000,
 194		.end	= 0x40100023,
 195		.flags	= IORESOURCE_MEM,
 196	}, {
 197		.start	= IRQ_FFUART,
 198		.end	= IRQ_FFUART,
 199		.flags	= IORESOURCE_IRQ,
 200	}
 201};
 202
 203struct platform_device pxa_device_ffuart = {
 204	.name		= "pxa2xx-uart",
 205	.id		= 0,
 206	.resource	= pxa_resource_ffuart,
 207	.num_resources	= ARRAY_SIZE(pxa_resource_ffuart),
 208};
 209
 210void __init pxa_set_ffuart_info(void *info)
 211{
 212	pxa_register_device(&pxa_device_ffuart, info);
 213}
 214
 215static struct resource pxa_resource_btuart[] = {
 216	{
 217		.start	= 0x40200000,
 218		.end	= 0x40200023,
 219		.flags	= IORESOURCE_MEM,
 220	}, {
 221		.start	= IRQ_BTUART,
 222		.end	= IRQ_BTUART,
 223		.flags	= IORESOURCE_IRQ,
 224	}
 225};
 226
 227struct platform_device pxa_device_btuart = {
 228	.name		= "pxa2xx-uart",
 229	.id		= 1,
 230	.resource	= pxa_resource_btuart,
 231	.num_resources	= ARRAY_SIZE(pxa_resource_btuart),
 232};
 233
 234void __init pxa_set_btuart_info(void *info)
 235{
 236	pxa_register_device(&pxa_device_btuart, info);
 237}
 238
 239static struct resource pxa_resource_stuart[] = {
 240	{
 241		.start	= 0x40700000,
 242		.end	= 0x40700023,
 243		.flags	= IORESOURCE_MEM,
 244	}, {
 245		.start	= IRQ_STUART,
 246		.end	= IRQ_STUART,
 247		.flags	= IORESOURCE_IRQ,
 248	}
 249};
 250
 251struct platform_device pxa_device_stuart = {
 252	.name		= "pxa2xx-uart",
 253	.id		= 2,
 254	.resource	= pxa_resource_stuart,
 255	.num_resources	= ARRAY_SIZE(pxa_resource_stuart),
 256};
 257
 258void __init pxa_set_stuart_info(void *info)
 259{
 260	pxa_register_device(&pxa_device_stuart, info);
 261}
 262
 263static struct resource pxa_resource_hwuart[] = {
 264	{
 265		.start	= 0x41600000,
 266		.end	= 0x4160002F,
 267		.flags	= IORESOURCE_MEM,
 268	}, {
 269		.start	= IRQ_HWUART,
 270		.end	= IRQ_HWUART,
 271		.flags	= IORESOURCE_IRQ,
 272	}
 273};
 274
 275struct platform_device pxa_device_hwuart = {
 276	.name		= "pxa2xx-uart",
 277	.id		= 3,
 278	.resource	= pxa_resource_hwuart,
 279	.num_resources	= ARRAY_SIZE(pxa_resource_hwuart),
 280};
 281
 282void __init pxa_set_hwuart_info(void *info)
 283{
 284	if (cpu_is_pxa255())
 285		pxa_register_device(&pxa_device_hwuart, info);
 286	else
 287		pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
 288}
 289
 290static struct resource pxai2c_resources[] = {
 291	{
 292		.start	= 0x40301680,
 293		.end	= 0x403016a3,
 294		.flags	= IORESOURCE_MEM,
 295	}, {
 296		.start	= IRQ_I2C,
 297		.end	= IRQ_I2C,
 298		.flags	= IORESOURCE_IRQ,
 299	},
 300};
 301
 302struct platform_device pxa_device_i2c = {
 303	.name		= "pxa2xx-i2c",
 304	.id		= 0,
 305	.resource	= pxai2c_resources,
 306	.num_resources	= ARRAY_SIZE(pxai2c_resources),
 307};
 308
 309void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
 310{
 311	pxa_register_device(&pxa_device_i2c, info);
 312}
 313
 314#ifdef CONFIG_PXA27x
 315static struct resource pxa27x_resources_i2c_power[] = {
 316	{
 317		.start	= 0x40f00180,
 318		.end	= 0x40f001a3,
 319		.flags	= IORESOURCE_MEM,
 320	}, {
 321		.start	= IRQ_PWRI2C,
 322		.end	= IRQ_PWRI2C,
 323		.flags	= IORESOURCE_IRQ,
 324	},
 325};
 326
 327struct platform_device pxa27x_device_i2c_power = {
 328	.name		= "pxa2xx-i2c",
 329	.id		= 1,
 330	.resource	= pxa27x_resources_i2c_power,
 331	.num_resources	= ARRAY_SIZE(pxa27x_resources_i2c_power),
 332};
 333#endif
 334
 335static struct resource pxai2s_resources[] = {
 336	{
 337		.start	= 0x40400000,
 338		.end	= 0x40400083,
 339		.flags	= IORESOURCE_MEM,
 340	}, {
 341		.start	= IRQ_I2S,
 342		.end	= IRQ_I2S,
 343		.flags	= IORESOURCE_IRQ,
 344	},
 345};
 346
 347struct platform_device pxa_device_i2s = {
 348	.name		= "pxa2xx-i2s",
 349	.id		= -1,
 350	.resource	= pxai2s_resources,
 351	.num_resources	= ARRAY_SIZE(pxai2s_resources),
 352};
 353
 354struct platform_device pxa_device_asoc_ssp1 = {
 355	.name		= "pxa-ssp-dai",
 356	.id		= 0,
 357};
 358
 359struct platform_device pxa_device_asoc_ssp2= {
 360	.name		= "pxa-ssp-dai",
 361	.id		= 1,
 362};
 363
 364struct platform_device pxa_device_asoc_ssp3 = {
 365	.name		= "pxa-ssp-dai",
 366	.id		= 2,
 367};
 368
 369struct platform_device pxa_device_asoc_ssp4 = {
 370	.name		= "pxa-ssp-dai",
 371	.id		= 3,
 372};
 373
 374struct platform_device pxa_device_asoc_platform = {
 375	.name		= "pxa-pcm-audio",
 376	.id		= -1,
 377};
 378
 379static u64 pxaficp_dmamask = ~(u32)0;
 380
 381static struct resource pxa_ir_resources[] = {
 382	[0] = {
 383		.start  = IRQ_STUART,
 384		.end    = IRQ_STUART,
 385		.flags  = IORESOURCE_IRQ,
 386	},
 387	[1] = {
 388		.start  = IRQ_ICP,
 389		.end    = IRQ_ICP,
 390		.flags  = IORESOURCE_IRQ,
 391	},
 392	[3] = {
 393		.start  = 0x40800000,
 394		.end	= 0x4080001b,
 395		.flags  = IORESOURCE_MEM,
 396	},
 397	[4] = {
 398		.start  = 0x40700000,
 399		.end	= 0x40700023,
 400		.flags  = IORESOURCE_MEM,
 401	},
 402};
 403
 404struct platform_device pxa_device_ficp = {
 405	.name		= "pxa2xx-ir",
 406	.id		= -1,
 407	.num_resources	= ARRAY_SIZE(pxa_ir_resources),
 408	.resource	= pxa_ir_resources,
 409	.dev		= {
 410		.dma_mask = &pxaficp_dmamask,
 411		.coherent_dma_mask = 0xffffffff,
 412	},
 413};
 414
 415void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
 416{
 417	pxa_register_device(&pxa_device_ficp, info);
 418}
 419
 420static struct resource pxa_rtc_resources[] = {
 421	[0] = {
 422		.start  = 0x40900000,
 423		.end	= 0x40900000 + 0x3b,
 424		.flags  = IORESOURCE_MEM,
 425	},
 426	[1] = {
 427		.start  = IRQ_RTC1Hz,
 428		.end    = IRQ_RTC1Hz,
 429		.name	= "rtc 1Hz",
 430		.flags  = IORESOURCE_IRQ,
 431	},
 432	[2] = {
 433		.start  = IRQ_RTCAlrm,
 434		.end    = IRQ_RTCAlrm,
 435		.name	= "rtc alarm",
 436		.flags  = IORESOURCE_IRQ,
 437	},
 438};
 439
 440struct platform_device pxa_device_rtc = {
 441	.name		= "pxa-rtc",
 442	.id		= -1,
 443	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
 444	.resource       = pxa_rtc_resources,
 445};
 446
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 447struct platform_device sa1100_device_rtc = {
 448	.name		= "sa1100-rtc",
 449	.id		= -1,
 450	.num_resources  = ARRAY_SIZE(pxa_rtc_resources),
 451	.resource       = pxa_rtc_resources,
 452};
 453
 454static struct resource pxa_ac97_resources[] = {
 455	[0] = {
 456		.start  = 0x40500000,
 457		.end	= 0x40500000 + 0xfff,
 458		.flags  = IORESOURCE_MEM,
 459	},
 460	[1] = {
 461		.start  = IRQ_AC97,
 462		.end    = IRQ_AC97,
 463		.flags  = IORESOURCE_IRQ,
 464	},
 465};
 466
 467static u64 pxa_ac97_dmamask = 0xffffffffUL;
 468
 469struct platform_device pxa_device_ac97 = {
 470	.name           = "pxa2xx-ac97",
 471	.id             = -1,
 472	.dev            = {
 473		.dma_mask = &pxa_ac97_dmamask,
 474		.coherent_dma_mask = 0xffffffff,
 475	},
 476	.num_resources  = ARRAY_SIZE(pxa_ac97_resources),
 477	.resource       = pxa_ac97_resources,
 478};
 479
 480void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
 481{
 482	int ret;
 483
 484	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:0", "AC97CLK",
 485			   &pxa_device_ac97.dev);
 486	if (ret)
 487		pr_err("PXA AC97 clock1 alias error: %d\n", ret);
 488
 489	ret = clk_add_alias("ac97_clk", "pxa2xx-ac97:1", "AC97CLK",
 490			    &pxa_device_ac97.dev);
 491	if (ret)
 492		pr_err("PXA AC97 clock2 alias error: %d\n", ret);
 493
 494	pxa_register_device(&pxa_device_ac97, ops);
 495}
 496
 497#ifdef CONFIG_PXA25x
 498
 499static struct resource pxa25x_resource_pwm0[] = {
 500	[0] = {
 501		.start	= 0x40b00000,
 502		.end	= 0x40b0000f,
 503		.flags	= IORESOURCE_MEM,
 504	},
 505};
 506
 507struct platform_device pxa25x_device_pwm0 = {
 508	.name		= "pxa25x-pwm",
 509	.id		= 0,
 510	.resource	= pxa25x_resource_pwm0,
 511	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm0),
 512};
 513
 514static struct resource pxa25x_resource_pwm1[] = {
 515	[0] = {
 516		.start	= 0x40c00000,
 517		.end	= 0x40c0000f,
 518		.flags	= IORESOURCE_MEM,
 519	},
 520};
 521
 522struct platform_device pxa25x_device_pwm1 = {
 523	.name		= "pxa25x-pwm",
 524	.id		= 1,
 525	.resource	= pxa25x_resource_pwm1,
 526	.num_resources	= ARRAY_SIZE(pxa25x_resource_pwm1),
 527};
 528
 529static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
 530
 531static struct resource pxa25x_resource_ssp[] = {
 532	[0] = {
 533		.start	= 0x41000000,
 534		.end	= 0x4100001f,
 535		.flags	= IORESOURCE_MEM,
 536	},
 537	[1] = {
 538		.start	= IRQ_SSP,
 539		.end	= IRQ_SSP,
 540		.flags	= IORESOURCE_IRQ,
 541	},
 
 
 
 
 
 
 
 
 
 
 
 
 542};
 543
 544struct platform_device pxa25x_device_ssp = {
 545	.name		= "pxa25x-ssp",
 546	.id		= 0,
 547	.dev		= {
 548		.dma_mask = &pxa25x_ssp_dma_mask,
 549		.coherent_dma_mask = DMA_BIT_MASK(32),
 550	},
 551	.resource	= pxa25x_resource_ssp,
 552	.num_resources	= ARRAY_SIZE(pxa25x_resource_ssp),
 553};
 554
 555static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
 556
 557static struct resource pxa25x_resource_nssp[] = {
 558	[0] = {
 559		.start	= 0x41400000,
 560		.end	= 0x4140002f,
 561		.flags	= IORESOURCE_MEM,
 562	},
 563	[1] = {
 564		.start	= IRQ_NSSP,
 565		.end	= IRQ_NSSP,
 566		.flags	= IORESOURCE_IRQ,
 567	},
 
 
 
 
 
 
 
 
 
 
 
 
 568};
 569
 570struct platform_device pxa25x_device_nssp = {
 571	.name		= "pxa25x-nssp",
 572	.id		= 1,
 573	.dev		= {
 574		.dma_mask = &pxa25x_nssp_dma_mask,
 575		.coherent_dma_mask = DMA_BIT_MASK(32),
 576	},
 577	.resource	= pxa25x_resource_nssp,
 578	.num_resources	= ARRAY_SIZE(pxa25x_resource_nssp),
 579};
 580
 581static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
 582
 583static struct resource pxa25x_resource_assp[] = {
 584	[0] = {
 585		.start	= 0x41500000,
 586		.end	= 0x4150002f,
 587		.flags	= IORESOURCE_MEM,
 588	},
 589	[1] = {
 590		.start	= IRQ_ASSP,
 591		.end	= IRQ_ASSP,
 592		.flags	= IORESOURCE_IRQ,
 593	},
 
 
 
 
 
 
 
 
 
 
 
 
 594};
 595
 596struct platform_device pxa25x_device_assp = {
 597	/* ASSP is basically equivalent to NSSP */
 598	.name		= "pxa25x-nssp",
 599	.id		= 2,
 600	.dev		= {
 601		.dma_mask = &pxa25x_assp_dma_mask,
 602		.coherent_dma_mask = DMA_BIT_MASK(32),
 603	},
 604	.resource	= pxa25x_resource_assp,
 605	.num_resources	= ARRAY_SIZE(pxa25x_resource_assp),
 606};
 607#endif /* CONFIG_PXA25x */
 608
 609#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 610static struct resource pxa27x_resource_camera[] = {
 611	[0] = {
 612		.start	= 0x50000000,
 613		.end	= 0x50000fff,
 614		.flags	= IORESOURCE_MEM,
 615	},
 616	[1] = {
 617		.start	= IRQ_CAMERA,
 618		.end	= IRQ_CAMERA,
 619		.flags	= IORESOURCE_IRQ,
 620	},
 621};
 622
 623static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
 624
 625static struct platform_device pxa27x_device_camera = {
 626	.name		= "pxa27x-camera",
 627	.id		= 0, /* This is used to put cameras on this interface */
 628	.dev		= {
 629		.dma_mask      		= &pxa27x_dma_mask_camera,
 630		.coherent_dma_mask	= 0xffffffff,
 631	},
 632	.num_resources	= ARRAY_SIZE(pxa27x_resource_camera),
 633	.resource	= pxa27x_resource_camera,
 634};
 635
 636void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
 637{
 638	struct clk *mclk;
 639
 640	/* Register a fixed-rate clock for camera sensors. */
 641	mclk = clk_register_fixed_rate(NULL, "pxa_camera_clk", NULL, 0,
 642					     info->mclk_10khz * 10000);
 643	if (!IS_ERR(mclk))
 644		clkdev_create(mclk, "mclk", NULL);
 645	pxa_register_device(&pxa27x_device_camera, info);
 646}
 647
 648static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
 649
 650static struct resource pxa27x_resource_ohci[] = {
 651	[0] = {
 652		.start  = 0x4C000000,
 653		.end    = 0x4C00ff6f,
 654		.flags  = IORESOURCE_MEM,
 655	},
 656	[1] = {
 657		.start  = IRQ_USBH1,
 658		.end    = IRQ_USBH1,
 659		.flags  = IORESOURCE_IRQ,
 660	},
 661};
 662
 663struct platform_device pxa27x_device_ohci = {
 664	.name		= "pxa27x-ohci",
 665	.id		= -1,
 666	.dev		= {
 667		.dma_mask = &pxa27x_ohci_dma_mask,
 668		.coherent_dma_mask = DMA_BIT_MASK(32),
 669	},
 670	.num_resources  = ARRAY_SIZE(pxa27x_resource_ohci),
 671	.resource       = pxa27x_resource_ohci,
 672};
 673
 674void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
 675{
 676	pxa_register_device(&pxa27x_device_ohci, info);
 677}
 678#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 679
 680#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
 681static struct resource pxa27x_resource_keypad[] = {
 682	[0] = {
 683		.start	= 0x41500000,
 684		.end	= 0x4150004c,
 685		.flags	= IORESOURCE_MEM,
 686	},
 687	[1] = {
 688		.start	= IRQ_KEYPAD,
 689		.end	= IRQ_KEYPAD,
 690		.flags	= IORESOURCE_IRQ,
 691	},
 692};
 693
 694struct platform_device pxa27x_device_keypad = {
 695	.name		= "pxa27x-keypad",
 696	.id		= -1,
 697	.resource	= pxa27x_resource_keypad,
 698	.num_resources	= ARRAY_SIZE(pxa27x_resource_keypad),
 699};
 700
 701void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
 702{
 703	pxa_register_device(&pxa27x_device_keypad, info);
 704}
 705
 706static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
 707
 708static struct resource pxa27x_resource_ssp1[] = {
 709	[0] = {
 710		.start	= 0x41000000,
 711		.end	= 0x4100003f,
 712		.flags	= IORESOURCE_MEM,
 713	},
 714	[1] = {
 715		.start	= IRQ_SSP,
 716		.end	= IRQ_SSP,
 717		.flags	= IORESOURCE_IRQ,
 718	},
 
 
 
 
 
 
 
 
 
 
 
 
 719};
 720
 721struct platform_device pxa27x_device_ssp1 = {
 722	.name		= "pxa27x-ssp",
 723	.id		= 0,
 724	.dev		= {
 725		.dma_mask = &pxa27x_ssp1_dma_mask,
 726		.coherent_dma_mask = DMA_BIT_MASK(32),
 727	},
 728	.resource	= pxa27x_resource_ssp1,
 729	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
 730};
 731
 732static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
 733
 734static struct resource pxa27x_resource_ssp2[] = {
 735	[0] = {
 736		.start	= 0x41700000,
 737		.end	= 0x4170003f,
 738		.flags	= IORESOURCE_MEM,
 739	},
 740	[1] = {
 741		.start	= IRQ_SSP2,
 742		.end	= IRQ_SSP2,
 743		.flags	= IORESOURCE_IRQ,
 744	},
 
 
 
 
 
 
 
 
 
 
 
 
 745};
 746
 747struct platform_device pxa27x_device_ssp2 = {
 748	.name		= "pxa27x-ssp",
 749	.id		= 1,
 750	.dev		= {
 751		.dma_mask = &pxa27x_ssp2_dma_mask,
 752		.coherent_dma_mask = DMA_BIT_MASK(32),
 753	},
 754	.resource	= pxa27x_resource_ssp2,
 755	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
 756};
 757
 758static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
 759
 760static struct resource pxa27x_resource_ssp3[] = {
 761	[0] = {
 762		.start	= 0x41900000,
 763		.end	= 0x4190003f,
 764		.flags	= IORESOURCE_MEM,
 765	},
 766	[1] = {
 767		.start	= IRQ_SSP3,
 768		.end	= IRQ_SSP3,
 769		.flags	= IORESOURCE_IRQ,
 770	},
 
 
 
 
 
 
 
 
 
 
 
 
 771};
 772
 773struct platform_device pxa27x_device_ssp3 = {
 774	.name		= "pxa27x-ssp",
 775	.id		= 2,
 776	.dev		= {
 777		.dma_mask = &pxa27x_ssp3_dma_mask,
 778		.coherent_dma_mask = DMA_BIT_MASK(32),
 779	},
 780	.resource	= pxa27x_resource_ssp3,
 781	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
 782};
 783
 784static struct resource pxa27x_resource_pwm0[] = {
 785	[0] = {
 786		.start	= 0x40b00000,
 787		.end	= 0x40b0001f,
 788		.flags	= IORESOURCE_MEM,
 789	},
 790};
 791
 792struct platform_device pxa27x_device_pwm0 = {
 793	.name		= "pxa27x-pwm",
 794	.id		= 0,
 795	.resource	= pxa27x_resource_pwm0,
 796	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm0),
 797};
 798
 799static struct resource pxa27x_resource_pwm1[] = {
 800	[0] = {
 801		.start	= 0x40c00000,
 802		.end	= 0x40c0001f,
 803		.flags	= IORESOURCE_MEM,
 804	},
 805};
 806
 807struct platform_device pxa27x_device_pwm1 = {
 808	.name		= "pxa27x-pwm",
 809	.id		= 1,
 810	.resource	= pxa27x_resource_pwm1,
 811	.num_resources	= ARRAY_SIZE(pxa27x_resource_pwm1),
 812};
 813#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
 814
 815#ifdef CONFIG_PXA3xx
 816static struct resource pxa3xx_resources_mci2[] = {
 817	[0] = {
 818		.start	= 0x42000000,
 819		.end	= 0x42000fff,
 820		.flags	= IORESOURCE_MEM,
 821	},
 822	[1] = {
 823		.start	= IRQ_MMC2,
 824		.end	= IRQ_MMC2,
 825		.flags	= IORESOURCE_IRQ,
 826	},
 
 
 
 
 
 
 
 
 
 
 827};
 828
 829struct platform_device pxa3xx_device_mci2 = {
 830	.name		= "pxa2xx-mci",
 831	.id		= 1,
 832	.dev		= {
 833		.dma_mask = &pxamci_dmamask,
 834		.coherent_dma_mask =	0xffffffff,
 835	},
 836	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci2),
 837	.resource	= pxa3xx_resources_mci2,
 838};
 839
 840void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
 841{
 842	pxa_register_device(&pxa3xx_device_mci2, info);
 843}
 844
 845static struct resource pxa3xx_resources_mci3[] = {
 846	[0] = {
 847		.start	= 0x42500000,
 848		.end	= 0x42500fff,
 849		.flags	= IORESOURCE_MEM,
 850	},
 851	[1] = {
 852		.start	= IRQ_MMC3,
 853		.end	= IRQ_MMC3,
 854		.flags	= IORESOURCE_IRQ,
 855	},
 
 
 
 
 
 
 
 
 
 
 856};
 857
 858struct platform_device pxa3xx_device_mci3 = {
 859	.name		= "pxa2xx-mci",
 860	.id		= 2,
 861	.dev		= {
 862		.dma_mask = &pxamci_dmamask,
 863		.coherent_dma_mask = 0xffffffff,
 864	},
 865	.num_resources	= ARRAY_SIZE(pxa3xx_resources_mci3),
 866	.resource	= pxa3xx_resources_mci3,
 867};
 868
 869void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
 870{
 871	pxa_register_device(&pxa3xx_device_mci3, info);
 872}
 873
 874static struct resource pxa3xx_resources_gcu[] = {
 875	{
 876		.start	= 0x54000000,
 877		.end	= 0x54000fff,
 878		.flags	= IORESOURCE_MEM,
 879	},
 880	{
 881		.start	= IRQ_GCU,
 882		.end	= IRQ_GCU,
 883		.flags	= IORESOURCE_IRQ,
 884	},
 885};
 886
 887static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
 888
 889struct platform_device pxa3xx_device_gcu = {
 890	.name		= "pxa3xx-gcu",
 891	.id		= -1,
 892	.num_resources	= ARRAY_SIZE(pxa3xx_resources_gcu),
 893	.resource	= pxa3xx_resources_gcu,
 894	.dev		= {
 895		.dma_mask = &pxa3xx_gcu_dmamask,
 896		.coherent_dma_mask = 0xffffffff,
 897	},
 898};
 899
 900#endif /* CONFIG_PXA3xx */
 901
 902#if defined(CONFIG_PXA3xx)
 903static struct resource pxa3xx_resources_i2c_power[] = {
 904	{
 905		.start  = 0x40f500c0,
 906		.end    = 0x40f500d3,
 907		.flags	= IORESOURCE_MEM,
 908	}, {
 909		.start	= IRQ_PWRI2C,
 910		.end	= IRQ_PWRI2C,
 911		.flags	= IORESOURCE_IRQ,
 912	},
 913};
 914
 915struct platform_device pxa3xx_device_i2c_power = {
 916	.name		= "pxa3xx-pwri2c",
 917	.id		= 1,
 918	.resource	= pxa3xx_resources_i2c_power,
 919	.num_resources	= ARRAY_SIZE(pxa3xx_resources_i2c_power),
 920};
 921
 922static struct resource pxa3xx_resources_nand[] = {
 923	[0] = {
 924		.start	= 0x43100000,
 925		.end	= 0x43100053,
 926		.flags	= IORESOURCE_MEM,
 927	},
 928	[1] = {
 929		.start	= IRQ_NAND,
 930		.end	= IRQ_NAND,
 931		.flags	= IORESOURCE_IRQ,
 932	},
 
 
 
 
 
 
 
 
 
 
 
 
 933};
 934
 935static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
 936
 937struct platform_device pxa3xx_device_nand = {
 938	.name		= "pxa3xx-nand",
 939	.id		= -1,
 940	.dev		= {
 941		.dma_mask = &pxa3xx_nand_dma_mask,
 942		.coherent_dma_mask = DMA_BIT_MASK(32),
 943	},
 944	.num_resources	= ARRAY_SIZE(pxa3xx_resources_nand),
 945	.resource	= pxa3xx_resources_nand,
 946};
 947
 948void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
 949{
 950	pxa_register_device(&pxa3xx_device_nand, info);
 951}
 952
 953static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
 954
 955static struct resource pxa3xx_resource_ssp4[] = {
 956	[0] = {
 957		.start	= 0x41a00000,
 958		.end	= 0x41a0003f,
 959		.flags	= IORESOURCE_MEM,
 960	},
 961	[1] = {
 962		.start	= IRQ_SSP4,
 963		.end	= IRQ_SSP4,
 964		.flags	= IORESOURCE_IRQ,
 965	},
 966};
 967
 968/*
 969 * PXA3xx SSP is basically equivalent to PXA27x.
 970 * However, we need to register the device by the correct name in order to
 971 * make the driver set the correct internal type, hence we provide specific
 972 * platform_devices for each of them.
 973 */
 974struct platform_device pxa3xx_device_ssp1 = {
 975	.name		= "pxa3xx-ssp",
 976	.id		= 0,
 977	.dev		= {
 978		.dma_mask = &pxa27x_ssp1_dma_mask,
 979		.coherent_dma_mask = DMA_BIT_MASK(32),
 980	},
 981	.resource	= pxa27x_resource_ssp1,
 982	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp1),
 983};
 984
 985struct platform_device pxa3xx_device_ssp2 = {
 986	.name		= "pxa3xx-ssp",
 987	.id		= 1,
 988	.dev		= {
 989		.dma_mask = &pxa27x_ssp2_dma_mask,
 990		.coherent_dma_mask = DMA_BIT_MASK(32),
 991	},
 992	.resource	= pxa27x_resource_ssp2,
 993	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp2),
 994};
 995
 996struct platform_device pxa3xx_device_ssp3 = {
 997	.name		= "pxa3xx-ssp",
 998	.id		= 2,
 999	.dev		= {
1000		.dma_mask = &pxa27x_ssp3_dma_mask,
1001		.coherent_dma_mask = DMA_BIT_MASK(32),
1002	},
1003	.resource	= pxa27x_resource_ssp3,
1004	.num_resources	= ARRAY_SIZE(pxa27x_resource_ssp3),
1005};
1006
1007struct platform_device pxa3xx_device_ssp4 = {
1008	.name		= "pxa3xx-ssp",
 
1009	.id		= 3,
1010	.dev		= {
1011		.dma_mask = &pxa3xx_ssp4_dma_mask,
1012		.coherent_dma_mask = DMA_BIT_MASK(32),
1013	},
1014	.resource	= pxa3xx_resource_ssp4,
1015	.num_resources	= ARRAY_SIZE(pxa3xx_resource_ssp4),
1016};
1017#endif /* CONFIG_PXA3xx */
1018
1019struct resource pxa_resource_gpio[] = {
1020	{
1021		.start	= 0x40e00000,
1022		.end	= 0x40e0ffff,
1023		.flags	= IORESOURCE_MEM,
1024	}, {
1025		.start	= IRQ_GPIO0,
1026		.end	= IRQ_GPIO0,
1027		.name	= "gpio0",
1028		.flags	= IORESOURCE_IRQ,
1029	}, {
1030		.start	= IRQ_GPIO1,
1031		.end	= IRQ_GPIO1,
1032		.name	= "gpio1",
1033		.flags	= IORESOURCE_IRQ,
1034	}, {
1035		.start	= IRQ_GPIO_2_x,
1036		.end	= IRQ_GPIO_2_x,
1037		.name	= "gpio_mux",
1038		.flags	= IORESOURCE_IRQ,
1039	},
1040};
1041
1042struct platform_device pxa25x_device_gpio = {
1043#ifdef CONFIG_CPU_PXA26x
1044	.name		= "pxa26x-gpio",
1045#else
1046	.name		= "pxa25x-gpio",
1047#endif
1048	.id		= -1,
1049	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1050	.resource	= pxa_resource_gpio,
1051};
1052
1053struct platform_device pxa27x_device_gpio = {
1054	.name		= "pxa27x-gpio",
1055	.id		= -1,
1056	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1057	.resource	= pxa_resource_gpio,
1058};
1059
1060struct platform_device pxa3xx_device_gpio = {
1061	.name		= "pxa3xx-gpio",
1062	.id		= -1,
1063	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1064	.resource	= pxa_resource_gpio,
1065};
1066
1067struct platform_device pxa93x_device_gpio = {
1068	.name		= "pxa93x-gpio",
1069	.id		= -1,
1070	.num_resources	= ARRAY_SIZE(pxa_resource_gpio),
1071	.resource	= pxa_resource_gpio,
1072};
1073
1074/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1075 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1076void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_controller *info)
1077{
1078	struct platform_device *pd;
1079
1080	pd = platform_device_alloc("pxa2xx-spi", id);
1081	if (pd == NULL) {
1082		printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1083		       id);
1084		return;
1085	}
1086
1087	pd->dev.platform_data = info;
1088	platform_device_add(pd);
1089}
1090
1091static struct resource pxa_dma_resource[] = {
1092	[0] = {
1093		.start	= 0x40000000,
1094		.end	= 0x4000ffff,
1095		.flags	= IORESOURCE_MEM,
1096	},
1097	[1] = {
1098		.start	= IRQ_DMA,
1099		.end	= IRQ_DMA,
1100		.flags	= IORESOURCE_IRQ,
1101	},
1102};
1103
1104static u64 pxadma_dmamask = 0xffffffffUL;
1105
1106static struct platform_device pxa2xx_pxa_dma = {
1107	.name		= "pxa-dma",
1108	.id		= 0,
1109	.dev		= {
1110		.dma_mask = &pxadma_dmamask,
1111		.coherent_dma_mask = 0xffffffff,
1112	},
1113	.num_resources	= ARRAY_SIZE(pxa_dma_resource),
1114	.resource	= pxa_dma_resource,
1115};
1116
1117void __init pxa2xx_set_dmac_info(struct mmp_dma_platdata *dma_pdata)
1118{
1119	pxa_register_device(&pxa2xx_pxa_dma, dma_pdata);
1120}