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1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6#include <linux/spi/pxa2xx_spi.h>
7#include <linux/i2c/pxa-i2c.h>
8
9#include <mach/udc.h>
10#include <linux/platform_data/usb-pxa3xx-ulpi.h>
11#include <linux/platform_data/video-pxafb.h>
12#include <linux/platform_data/mmc-pxamci.h>
13#include <linux/platform_data/irda-pxaficp.h>
14#include <mach/irqs.h>
15#include <linux/platform_data/usb-ohci-pxa27x.h>
16#include <linux/platform_data/keypad-pxa27x.h>
17#include <linux/platform_data/camera-pxa.h>
18#include <mach/audio.h>
19#include <mach/hardware.h>
20#include <linux/platform_data/mtd-nand-pxa3xx.h>
21
22#include "devices.h"
23#include "generic.h"
24
25void __init pxa_register_device(struct platform_device *dev, void *data)
26{
27 int ret;
28
29 dev->dev.platform_data = data;
30
31 ret = platform_device_register(dev);
32 if (ret)
33 dev_err(&dev->dev, "unable to register device: %d\n", ret);
34}
35
36static struct resource pxa_resource_pmu = {
37 .start = IRQ_PMU,
38 .end = IRQ_PMU,
39 .flags = IORESOURCE_IRQ,
40};
41
42struct platform_device pxa_device_pmu = {
43 .name = "arm-pmu",
44 .id = -1,
45 .resource = &pxa_resource_pmu,
46 .num_resources = 1,
47};
48
49static struct resource pxamci_resources[] = {
50 [0] = {
51 .start = 0x41100000,
52 .end = 0x41100fff,
53 .flags = IORESOURCE_MEM,
54 },
55 [1] = {
56 .start = IRQ_MMC,
57 .end = IRQ_MMC,
58 .flags = IORESOURCE_IRQ,
59 },
60 [2] = {
61 .start = 21,
62 .end = 21,
63 .flags = IORESOURCE_DMA,
64 },
65 [3] = {
66 .start = 22,
67 .end = 22,
68 .flags = IORESOURCE_DMA,
69 },
70};
71
72static u64 pxamci_dmamask = 0xffffffffUL;
73
74struct platform_device pxa_device_mci = {
75 .name = "pxa2xx-mci",
76 .id = 0,
77 .dev = {
78 .dma_mask = &pxamci_dmamask,
79 .coherent_dma_mask = 0xffffffff,
80 },
81 .num_resources = ARRAY_SIZE(pxamci_resources),
82 .resource = pxamci_resources,
83};
84
85void __init pxa_set_mci_info(struct pxamci_platform_data *info)
86{
87 pxa_register_device(&pxa_device_mci, info);
88}
89
90
91static struct pxa2xx_udc_mach_info pxa_udc_info = {
92 .gpio_pullup = -1,
93};
94
95void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
96{
97 memcpy(&pxa_udc_info, info, sizeof *info);
98}
99
100static struct resource pxa2xx_udc_resources[] = {
101 [0] = {
102 .start = 0x40600000,
103 .end = 0x4060ffff,
104 .flags = IORESOURCE_MEM,
105 },
106 [1] = {
107 .start = IRQ_USB,
108 .end = IRQ_USB,
109 .flags = IORESOURCE_IRQ,
110 },
111};
112
113static u64 udc_dma_mask = ~(u32)0;
114
115struct platform_device pxa25x_device_udc = {
116 .name = "pxa25x-udc",
117 .id = -1,
118 .resource = pxa2xx_udc_resources,
119 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
120 .dev = {
121 .platform_data = &pxa_udc_info,
122 .dma_mask = &udc_dma_mask,
123 }
124};
125
126struct platform_device pxa27x_device_udc = {
127 .name = "pxa27x-udc",
128 .id = -1,
129 .resource = pxa2xx_udc_resources,
130 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
131 .dev = {
132 .platform_data = &pxa_udc_info,
133 .dma_mask = &udc_dma_mask,
134 }
135};
136
137#ifdef CONFIG_PXA3xx
138static struct resource pxa3xx_u2d_resources[] = {
139 [0] = {
140 .start = 0x54100000,
141 .end = 0x54100fff,
142 .flags = IORESOURCE_MEM,
143 },
144 [1] = {
145 .start = IRQ_USB2,
146 .end = IRQ_USB2,
147 .flags = IORESOURCE_IRQ,
148 },
149};
150
151struct platform_device pxa3xx_device_u2d = {
152 .name = "pxa3xx-u2d",
153 .id = -1,
154 .resource = pxa3xx_u2d_resources,
155 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
156};
157
158void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
159{
160 pxa_register_device(&pxa3xx_device_u2d, info);
161}
162#endif /* CONFIG_PXA3xx */
163
164static struct resource pxafb_resources[] = {
165 [0] = {
166 .start = 0x44000000,
167 .end = 0x4400ffff,
168 .flags = IORESOURCE_MEM,
169 },
170 [1] = {
171 .start = IRQ_LCD,
172 .end = IRQ_LCD,
173 .flags = IORESOURCE_IRQ,
174 },
175};
176
177static u64 fb_dma_mask = ~(u64)0;
178
179struct platform_device pxa_device_fb = {
180 .name = "pxa2xx-fb",
181 .id = -1,
182 .dev = {
183 .dma_mask = &fb_dma_mask,
184 .coherent_dma_mask = 0xffffffff,
185 },
186 .num_resources = ARRAY_SIZE(pxafb_resources),
187 .resource = pxafb_resources,
188};
189
190void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
191{
192 pxa_device_fb.dev.parent = parent;
193 pxa_register_device(&pxa_device_fb, info);
194}
195
196static struct resource pxa_resource_ffuart[] = {
197 {
198 .start = 0x40100000,
199 .end = 0x40100023,
200 .flags = IORESOURCE_MEM,
201 }, {
202 .start = IRQ_FFUART,
203 .end = IRQ_FFUART,
204 .flags = IORESOURCE_IRQ,
205 }
206};
207
208struct platform_device pxa_device_ffuart = {
209 .name = "pxa2xx-uart",
210 .id = 0,
211 .resource = pxa_resource_ffuart,
212 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
213};
214
215void __init pxa_set_ffuart_info(void *info)
216{
217 pxa_register_device(&pxa_device_ffuart, info);
218}
219
220static struct resource pxa_resource_btuart[] = {
221 {
222 .start = 0x40200000,
223 .end = 0x40200023,
224 .flags = IORESOURCE_MEM,
225 }, {
226 .start = IRQ_BTUART,
227 .end = IRQ_BTUART,
228 .flags = IORESOURCE_IRQ,
229 }
230};
231
232struct platform_device pxa_device_btuart = {
233 .name = "pxa2xx-uart",
234 .id = 1,
235 .resource = pxa_resource_btuart,
236 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
237};
238
239void __init pxa_set_btuart_info(void *info)
240{
241 pxa_register_device(&pxa_device_btuart, info);
242}
243
244static struct resource pxa_resource_stuart[] = {
245 {
246 .start = 0x40700000,
247 .end = 0x40700023,
248 .flags = IORESOURCE_MEM,
249 }, {
250 .start = IRQ_STUART,
251 .end = IRQ_STUART,
252 .flags = IORESOURCE_IRQ,
253 }
254};
255
256struct platform_device pxa_device_stuart = {
257 .name = "pxa2xx-uart",
258 .id = 2,
259 .resource = pxa_resource_stuart,
260 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
261};
262
263void __init pxa_set_stuart_info(void *info)
264{
265 pxa_register_device(&pxa_device_stuart, info);
266}
267
268static struct resource pxa_resource_hwuart[] = {
269 {
270 .start = 0x41600000,
271 .end = 0x4160002F,
272 .flags = IORESOURCE_MEM,
273 }, {
274 .start = IRQ_HWUART,
275 .end = IRQ_HWUART,
276 .flags = IORESOURCE_IRQ,
277 }
278};
279
280struct platform_device pxa_device_hwuart = {
281 .name = "pxa2xx-uart",
282 .id = 3,
283 .resource = pxa_resource_hwuart,
284 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
285};
286
287void __init pxa_set_hwuart_info(void *info)
288{
289 if (cpu_is_pxa255())
290 pxa_register_device(&pxa_device_hwuart, info);
291 else
292 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
293}
294
295static struct resource pxai2c_resources[] = {
296 {
297 .start = 0x40301680,
298 .end = 0x403016a3,
299 .flags = IORESOURCE_MEM,
300 }, {
301 .start = IRQ_I2C,
302 .end = IRQ_I2C,
303 .flags = IORESOURCE_IRQ,
304 },
305};
306
307struct platform_device pxa_device_i2c = {
308 .name = "pxa2xx-i2c",
309 .id = 0,
310 .resource = pxai2c_resources,
311 .num_resources = ARRAY_SIZE(pxai2c_resources),
312};
313
314void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
315{
316 pxa_register_device(&pxa_device_i2c, info);
317}
318
319#ifdef CONFIG_PXA27x
320static struct resource pxa27x_resources_i2c_power[] = {
321 {
322 .start = 0x40f00180,
323 .end = 0x40f001a3,
324 .flags = IORESOURCE_MEM,
325 }, {
326 .start = IRQ_PWRI2C,
327 .end = IRQ_PWRI2C,
328 .flags = IORESOURCE_IRQ,
329 },
330};
331
332struct platform_device pxa27x_device_i2c_power = {
333 .name = "pxa2xx-i2c",
334 .id = 1,
335 .resource = pxa27x_resources_i2c_power,
336 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
337};
338#endif
339
340static struct resource pxai2s_resources[] = {
341 {
342 .start = 0x40400000,
343 .end = 0x40400083,
344 .flags = IORESOURCE_MEM,
345 }, {
346 .start = IRQ_I2S,
347 .end = IRQ_I2S,
348 .flags = IORESOURCE_IRQ,
349 },
350};
351
352struct platform_device pxa_device_i2s = {
353 .name = "pxa2xx-i2s",
354 .id = -1,
355 .resource = pxai2s_resources,
356 .num_resources = ARRAY_SIZE(pxai2s_resources),
357};
358
359struct platform_device pxa_device_asoc_ssp1 = {
360 .name = "pxa-ssp-dai",
361 .id = 0,
362};
363
364struct platform_device pxa_device_asoc_ssp2= {
365 .name = "pxa-ssp-dai",
366 .id = 1,
367};
368
369struct platform_device pxa_device_asoc_ssp3 = {
370 .name = "pxa-ssp-dai",
371 .id = 2,
372};
373
374struct platform_device pxa_device_asoc_ssp4 = {
375 .name = "pxa-ssp-dai",
376 .id = 3,
377};
378
379struct platform_device pxa_device_asoc_platform = {
380 .name = "pxa-pcm-audio",
381 .id = -1,
382};
383
384static u64 pxaficp_dmamask = ~(u32)0;
385
386static struct resource pxa_ir_resources[] = {
387 [0] = {
388 .start = IRQ_STUART,
389 .end = IRQ_STUART,
390 .flags = IORESOURCE_IRQ,
391 },
392 [1] = {
393 .start = IRQ_ICP,
394 .end = IRQ_ICP,
395 .flags = IORESOURCE_IRQ,
396 },
397};
398
399struct platform_device pxa_device_ficp = {
400 .name = "pxa2xx-ir",
401 .id = -1,
402 .num_resources = ARRAY_SIZE(pxa_ir_resources),
403 .resource = pxa_ir_resources,
404 .dev = {
405 .dma_mask = &pxaficp_dmamask,
406 .coherent_dma_mask = 0xffffffff,
407 },
408};
409
410void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
411{
412 pxa_register_device(&pxa_device_ficp, info);
413}
414
415static struct resource pxa_rtc_resources[] = {
416 [0] = {
417 .start = 0x40900000,
418 .end = 0x40900000 + 0x3b,
419 .flags = IORESOURCE_MEM,
420 },
421 [1] = {
422 .start = IRQ_RTC1Hz,
423 .end = IRQ_RTC1Hz,
424 .name = "rtc 1Hz",
425 .flags = IORESOURCE_IRQ,
426 },
427 [2] = {
428 .start = IRQ_RTCAlrm,
429 .end = IRQ_RTCAlrm,
430 .name = "rtc alarm",
431 .flags = IORESOURCE_IRQ,
432 },
433};
434
435struct platform_device pxa_device_rtc = {
436 .name = "pxa-rtc",
437 .id = -1,
438 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
439 .resource = pxa_rtc_resources,
440};
441
442static struct resource sa1100_rtc_resources[] = {
443 {
444 .start = IRQ_RTC1Hz,
445 .end = IRQ_RTC1Hz,
446 .name = "rtc 1Hz",
447 .flags = IORESOURCE_IRQ,
448 }, {
449 .start = IRQ_RTCAlrm,
450 .end = IRQ_RTCAlrm,
451 .name = "rtc alarm",
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
456struct platform_device sa1100_device_rtc = {
457 .name = "sa1100-rtc",
458 .id = -1,
459 .num_resources = ARRAY_SIZE(sa1100_rtc_resources),
460 .resource = sa1100_rtc_resources,
461};
462
463static struct resource pxa_ac97_resources[] = {
464 [0] = {
465 .start = 0x40500000,
466 .end = 0x40500000 + 0xfff,
467 .flags = IORESOURCE_MEM,
468 },
469 [1] = {
470 .start = IRQ_AC97,
471 .end = IRQ_AC97,
472 .flags = IORESOURCE_IRQ,
473 },
474};
475
476static u64 pxa_ac97_dmamask = 0xffffffffUL;
477
478struct platform_device pxa_device_ac97 = {
479 .name = "pxa2xx-ac97",
480 .id = -1,
481 .dev = {
482 .dma_mask = &pxa_ac97_dmamask,
483 .coherent_dma_mask = 0xffffffff,
484 },
485 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
486 .resource = pxa_ac97_resources,
487};
488
489void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
490{
491 pxa_register_device(&pxa_device_ac97, ops);
492}
493
494#ifdef CONFIG_PXA25x
495
496static struct resource pxa25x_resource_pwm0[] = {
497 [0] = {
498 .start = 0x40b00000,
499 .end = 0x40b0000f,
500 .flags = IORESOURCE_MEM,
501 },
502};
503
504struct platform_device pxa25x_device_pwm0 = {
505 .name = "pxa25x-pwm",
506 .id = 0,
507 .resource = pxa25x_resource_pwm0,
508 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
509};
510
511static struct resource pxa25x_resource_pwm1[] = {
512 [0] = {
513 .start = 0x40c00000,
514 .end = 0x40c0000f,
515 .flags = IORESOURCE_MEM,
516 },
517};
518
519struct platform_device pxa25x_device_pwm1 = {
520 .name = "pxa25x-pwm",
521 .id = 1,
522 .resource = pxa25x_resource_pwm1,
523 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
524};
525
526static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
527
528static struct resource pxa25x_resource_ssp[] = {
529 [0] = {
530 .start = 0x41000000,
531 .end = 0x4100001f,
532 .flags = IORESOURCE_MEM,
533 },
534 [1] = {
535 .start = IRQ_SSP,
536 .end = IRQ_SSP,
537 .flags = IORESOURCE_IRQ,
538 },
539 [2] = {
540 /* DRCMR for RX */
541 .start = 13,
542 .end = 13,
543 .flags = IORESOURCE_DMA,
544 },
545 [3] = {
546 /* DRCMR for TX */
547 .start = 14,
548 .end = 14,
549 .flags = IORESOURCE_DMA,
550 },
551};
552
553struct platform_device pxa25x_device_ssp = {
554 .name = "pxa25x-ssp",
555 .id = 0,
556 .dev = {
557 .dma_mask = &pxa25x_ssp_dma_mask,
558 .coherent_dma_mask = DMA_BIT_MASK(32),
559 },
560 .resource = pxa25x_resource_ssp,
561 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
562};
563
564static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
565
566static struct resource pxa25x_resource_nssp[] = {
567 [0] = {
568 .start = 0x41400000,
569 .end = 0x4140002f,
570 .flags = IORESOURCE_MEM,
571 },
572 [1] = {
573 .start = IRQ_NSSP,
574 .end = IRQ_NSSP,
575 .flags = IORESOURCE_IRQ,
576 },
577 [2] = {
578 /* DRCMR for RX */
579 .start = 15,
580 .end = 15,
581 .flags = IORESOURCE_DMA,
582 },
583 [3] = {
584 /* DRCMR for TX */
585 .start = 16,
586 .end = 16,
587 .flags = IORESOURCE_DMA,
588 },
589};
590
591struct platform_device pxa25x_device_nssp = {
592 .name = "pxa25x-nssp",
593 .id = 1,
594 .dev = {
595 .dma_mask = &pxa25x_nssp_dma_mask,
596 .coherent_dma_mask = DMA_BIT_MASK(32),
597 },
598 .resource = pxa25x_resource_nssp,
599 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
600};
601
602static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
603
604static struct resource pxa25x_resource_assp[] = {
605 [0] = {
606 .start = 0x41500000,
607 .end = 0x4150002f,
608 .flags = IORESOURCE_MEM,
609 },
610 [1] = {
611 .start = IRQ_ASSP,
612 .end = IRQ_ASSP,
613 .flags = IORESOURCE_IRQ,
614 },
615 [2] = {
616 /* DRCMR for RX */
617 .start = 23,
618 .end = 23,
619 .flags = IORESOURCE_DMA,
620 },
621 [3] = {
622 /* DRCMR for TX */
623 .start = 24,
624 .end = 24,
625 .flags = IORESOURCE_DMA,
626 },
627};
628
629struct platform_device pxa25x_device_assp = {
630 /* ASSP is basically equivalent to NSSP */
631 .name = "pxa25x-nssp",
632 .id = 2,
633 .dev = {
634 .dma_mask = &pxa25x_assp_dma_mask,
635 .coherent_dma_mask = DMA_BIT_MASK(32),
636 },
637 .resource = pxa25x_resource_assp,
638 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
639};
640#endif /* CONFIG_PXA25x */
641
642#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
643static struct resource pxa27x_resource_camera[] = {
644 [0] = {
645 .start = 0x50000000,
646 .end = 0x50000fff,
647 .flags = IORESOURCE_MEM,
648 },
649 [1] = {
650 .start = IRQ_CAMERA,
651 .end = IRQ_CAMERA,
652 .flags = IORESOURCE_IRQ,
653 },
654};
655
656static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
657
658static struct platform_device pxa27x_device_camera = {
659 .name = "pxa27x-camera",
660 .id = 0, /* This is used to put cameras on this interface */
661 .dev = {
662 .dma_mask = &pxa27x_dma_mask_camera,
663 .coherent_dma_mask = 0xffffffff,
664 },
665 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
666 .resource = pxa27x_resource_camera,
667};
668
669void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
670{
671 pxa_register_device(&pxa27x_device_camera, info);
672}
673
674static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
675
676static struct resource pxa27x_resource_ohci[] = {
677 [0] = {
678 .start = 0x4C000000,
679 .end = 0x4C00ff6f,
680 .flags = IORESOURCE_MEM,
681 },
682 [1] = {
683 .start = IRQ_USBH1,
684 .end = IRQ_USBH1,
685 .flags = IORESOURCE_IRQ,
686 },
687};
688
689struct platform_device pxa27x_device_ohci = {
690 .name = "pxa27x-ohci",
691 .id = -1,
692 .dev = {
693 .dma_mask = &pxa27x_ohci_dma_mask,
694 .coherent_dma_mask = DMA_BIT_MASK(32),
695 },
696 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
697 .resource = pxa27x_resource_ohci,
698};
699
700void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
701{
702 pxa_register_device(&pxa27x_device_ohci, info);
703}
704#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
705
706#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
707static struct resource pxa27x_resource_keypad[] = {
708 [0] = {
709 .start = 0x41500000,
710 .end = 0x4150004c,
711 .flags = IORESOURCE_MEM,
712 },
713 [1] = {
714 .start = IRQ_KEYPAD,
715 .end = IRQ_KEYPAD,
716 .flags = IORESOURCE_IRQ,
717 },
718};
719
720struct platform_device pxa27x_device_keypad = {
721 .name = "pxa27x-keypad",
722 .id = -1,
723 .resource = pxa27x_resource_keypad,
724 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
725};
726
727void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
728{
729 pxa_register_device(&pxa27x_device_keypad, info);
730}
731
732static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
733
734static struct resource pxa27x_resource_ssp1[] = {
735 [0] = {
736 .start = 0x41000000,
737 .end = 0x4100003f,
738 .flags = IORESOURCE_MEM,
739 },
740 [1] = {
741 .start = IRQ_SSP,
742 .end = IRQ_SSP,
743 .flags = IORESOURCE_IRQ,
744 },
745 [2] = {
746 /* DRCMR for RX */
747 .start = 13,
748 .end = 13,
749 .flags = IORESOURCE_DMA,
750 },
751 [3] = {
752 /* DRCMR for TX */
753 .start = 14,
754 .end = 14,
755 .flags = IORESOURCE_DMA,
756 },
757};
758
759struct platform_device pxa27x_device_ssp1 = {
760 .name = "pxa27x-ssp",
761 .id = 0,
762 .dev = {
763 .dma_mask = &pxa27x_ssp1_dma_mask,
764 .coherent_dma_mask = DMA_BIT_MASK(32),
765 },
766 .resource = pxa27x_resource_ssp1,
767 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
768};
769
770static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
771
772static struct resource pxa27x_resource_ssp2[] = {
773 [0] = {
774 .start = 0x41700000,
775 .end = 0x4170003f,
776 .flags = IORESOURCE_MEM,
777 },
778 [1] = {
779 .start = IRQ_SSP2,
780 .end = IRQ_SSP2,
781 .flags = IORESOURCE_IRQ,
782 },
783 [2] = {
784 /* DRCMR for RX */
785 .start = 15,
786 .end = 15,
787 .flags = IORESOURCE_DMA,
788 },
789 [3] = {
790 /* DRCMR for TX */
791 .start = 16,
792 .end = 16,
793 .flags = IORESOURCE_DMA,
794 },
795};
796
797struct platform_device pxa27x_device_ssp2 = {
798 .name = "pxa27x-ssp",
799 .id = 1,
800 .dev = {
801 .dma_mask = &pxa27x_ssp2_dma_mask,
802 .coherent_dma_mask = DMA_BIT_MASK(32),
803 },
804 .resource = pxa27x_resource_ssp2,
805 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
806};
807
808static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
809
810static struct resource pxa27x_resource_ssp3[] = {
811 [0] = {
812 .start = 0x41900000,
813 .end = 0x4190003f,
814 .flags = IORESOURCE_MEM,
815 },
816 [1] = {
817 .start = IRQ_SSP3,
818 .end = IRQ_SSP3,
819 .flags = IORESOURCE_IRQ,
820 },
821 [2] = {
822 /* DRCMR for RX */
823 .start = 66,
824 .end = 66,
825 .flags = IORESOURCE_DMA,
826 },
827 [3] = {
828 /* DRCMR for TX */
829 .start = 67,
830 .end = 67,
831 .flags = IORESOURCE_DMA,
832 },
833};
834
835struct platform_device pxa27x_device_ssp3 = {
836 .name = "pxa27x-ssp",
837 .id = 2,
838 .dev = {
839 .dma_mask = &pxa27x_ssp3_dma_mask,
840 .coherent_dma_mask = DMA_BIT_MASK(32),
841 },
842 .resource = pxa27x_resource_ssp3,
843 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
844};
845
846static struct resource pxa27x_resource_pwm0[] = {
847 [0] = {
848 .start = 0x40b00000,
849 .end = 0x40b0001f,
850 .flags = IORESOURCE_MEM,
851 },
852};
853
854struct platform_device pxa27x_device_pwm0 = {
855 .name = "pxa27x-pwm",
856 .id = 0,
857 .resource = pxa27x_resource_pwm0,
858 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
859};
860
861static struct resource pxa27x_resource_pwm1[] = {
862 [0] = {
863 .start = 0x40c00000,
864 .end = 0x40c0001f,
865 .flags = IORESOURCE_MEM,
866 },
867};
868
869struct platform_device pxa27x_device_pwm1 = {
870 .name = "pxa27x-pwm",
871 .id = 1,
872 .resource = pxa27x_resource_pwm1,
873 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
874};
875#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
876
877#ifdef CONFIG_PXA3xx
878static struct resource pxa3xx_resources_mci2[] = {
879 [0] = {
880 .start = 0x42000000,
881 .end = 0x42000fff,
882 .flags = IORESOURCE_MEM,
883 },
884 [1] = {
885 .start = IRQ_MMC2,
886 .end = IRQ_MMC2,
887 .flags = IORESOURCE_IRQ,
888 },
889 [2] = {
890 .start = 93,
891 .end = 93,
892 .flags = IORESOURCE_DMA,
893 },
894 [3] = {
895 .start = 94,
896 .end = 94,
897 .flags = IORESOURCE_DMA,
898 },
899};
900
901struct platform_device pxa3xx_device_mci2 = {
902 .name = "pxa2xx-mci",
903 .id = 1,
904 .dev = {
905 .dma_mask = &pxamci_dmamask,
906 .coherent_dma_mask = 0xffffffff,
907 },
908 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
909 .resource = pxa3xx_resources_mci2,
910};
911
912void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
913{
914 pxa_register_device(&pxa3xx_device_mci2, info);
915}
916
917static struct resource pxa3xx_resources_mci3[] = {
918 [0] = {
919 .start = 0x42500000,
920 .end = 0x42500fff,
921 .flags = IORESOURCE_MEM,
922 },
923 [1] = {
924 .start = IRQ_MMC3,
925 .end = IRQ_MMC3,
926 .flags = IORESOURCE_IRQ,
927 },
928 [2] = {
929 .start = 100,
930 .end = 100,
931 .flags = IORESOURCE_DMA,
932 },
933 [3] = {
934 .start = 101,
935 .end = 101,
936 .flags = IORESOURCE_DMA,
937 },
938};
939
940struct platform_device pxa3xx_device_mci3 = {
941 .name = "pxa2xx-mci",
942 .id = 2,
943 .dev = {
944 .dma_mask = &pxamci_dmamask,
945 .coherent_dma_mask = 0xffffffff,
946 },
947 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
948 .resource = pxa3xx_resources_mci3,
949};
950
951void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
952{
953 pxa_register_device(&pxa3xx_device_mci3, info);
954}
955
956static struct resource pxa3xx_resources_gcu[] = {
957 {
958 .start = 0x54000000,
959 .end = 0x54000fff,
960 .flags = IORESOURCE_MEM,
961 },
962 {
963 .start = IRQ_GCU,
964 .end = IRQ_GCU,
965 .flags = IORESOURCE_IRQ,
966 },
967};
968
969static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
970
971struct platform_device pxa3xx_device_gcu = {
972 .name = "pxa3xx-gcu",
973 .id = -1,
974 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
975 .resource = pxa3xx_resources_gcu,
976 .dev = {
977 .dma_mask = &pxa3xx_gcu_dmamask,
978 .coherent_dma_mask = 0xffffffff,
979 },
980};
981
982#endif /* CONFIG_PXA3xx */
983
984#if defined(CONFIG_PXA3xx)
985static struct resource pxa3xx_resources_i2c_power[] = {
986 {
987 .start = 0x40f500c0,
988 .end = 0x40f500d3,
989 .flags = IORESOURCE_MEM,
990 }, {
991 .start = IRQ_PWRI2C,
992 .end = IRQ_PWRI2C,
993 .flags = IORESOURCE_IRQ,
994 },
995};
996
997struct platform_device pxa3xx_device_i2c_power = {
998 .name = "pxa3xx-pwri2c",
999 .id = 1,
1000 .resource = pxa3xx_resources_i2c_power,
1001 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
1002};
1003
1004static struct resource pxa3xx_resources_nand[] = {
1005 [0] = {
1006 .start = 0x43100000,
1007 .end = 0x43100053,
1008 .flags = IORESOURCE_MEM,
1009 },
1010 [1] = {
1011 .start = IRQ_NAND,
1012 .end = IRQ_NAND,
1013 .flags = IORESOURCE_IRQ,
1014 },
1015 [2] = {
1016 /* DRCMR for Data DMA */
1017 .start = 97,
1018 .end = 97,
1019 .flags = IORESOURCE_DMA,
1020 },
1021 [3] = {
1022 /* DRCMR for Command DMA */
1023 .start = 99,
1024 .end = 99,
1025 .flags = IORESOURCE_DMA,
1026 },
1027};
1028
1029static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1030
1031struct platform_device pxa3xx_device_nand = {
1032 .name = "pxa3xx-nand",
1033 .id = -1,
1034 .dev = {
1035 .dma_mask = &pxa3xx_nand_dma_mask,
1036 .coherent_dma_mask = DMA_BIT_MASK(32),
1037 },
1038 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1039 .resource = pxa3xx_resources_nand,
1040};
1041
1042void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1043{
1044 pxa_register_device(&pxa3xx_device_nand, info);
1045}
1046
1047static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1048
1049static struct resource pxa3xx_resource_ssp4[] = {
1050 [0] = {
1051 .start = 0x41a00000,
1052 .end = 0x41a0003f,
1053 .flags = IORESOURCE_MEM,
1054 },
1055 [1] = {
1056 .start = IRQ_SSP4,
1057 .end = IRQ_SSP4,
1058 .flags = IORESOURCE_IRQ,
1059 },
1060 [2] = {
1061 /* DRCMR for RX */
1062 .start = 2,
1063 .end = 2,
1064 .flags = IORESOURCE_DMA,
1065 },
1066 [3] = {
1067 /* DRCMR for TX */
1068 .start = 3,
1069 .end = 3,
1070 .flags = IORESOURCE_DMA,
1071 },
1072};
1073
1074struct platform_device pxa3xx_device_ssp4 = {
1075 /* PXA3xx SSP is basically equivalent to PXA27x */
1076 .name = "pxa27x-ssp",
1077 .id = 3,
1078 .dev = {
1079 .dma_mask = &pxa3xx_ssp4_dma_mask,
1080 .coherent_dma_mask = DMA_BIT_MASK(32),
1081 },
1082 .resource = pxa3xx_resource_ssp4,
1083 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1084};
1085#endif /* CONFIG_PXA3xx */
1086
1087struct resource pxa_resource_gpio[] = {
1088 {
1089 .start = 0x40e00000,
1090 .end = 0x40e0ffff,
1091 .flags = IORESOURCE_MEM,
1092 }, {
1093 .start = IRQ_GPIO0,
1094 .end = IRQ_GPIO0,
1095 .name = "gpio0",
1096 .flags = IORESOURCE_IRQ,
1097 }, {
1098 .start = IRQ_GPIO1,
1099 .end = IRQ_GPIO1,
1100 .name = "gpio1",
1101 .flags = IORESOURCE_IRQ,
1102 }, {
1103 .start = IRQ_GPIO_2_x,
1104 .end = IRQ_GPIO_2_x,
1105 .name = "gpio_mux",
1106 .flags = IORESOURCE_IRQ,
1107 },
1108};
1109
1110struct platform_device pxa25x_device_gpio = {
1111#ifdef CONFIG_CPU_PXA26x
1112 .name = "pxa26x-gpio",
1113#else
1114 .name = "pxa25x-gpio",
1115#endif
1116 .id = -1,
1117 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1118 .resource = pxa_resource_gpio,
1119};
1120
1121struct platform_device pxa27x_device_gpio = {
1122 .name = "pxa27x-gpio",
1123 .id = -1,
1124 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1125 .resource = pxa_resource_gpio,
1126};
1127
1128struct platform_device pxa3xx_device_gpio = {
1129 .name = "pxa3xx-gpio",
1130 .id = -1,
1131 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1132 .resource = pxa_resource_gpio,
1133};
1134
1135struct platform_device pxa93x_device_gpio = {
1136 .name = "pxa93x-gpio",
1137 .id = -1,
1138 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1139 .resource = pxa_resource_gpio,
1140};
1141
1142/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1143 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1144void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1145{
1146 struct platform_device *pd;
1147
1148 pd = platform_device_alloc("pxa2xx-spi", id);
1149 if (pd == NULL) {
1150 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1151 id);
1152 return;
1153 }
1154
1155 pd->dev.platform_data = info;
1156 platform_device_add(pd);
1157}
1#include <linux/module.h>
2#include <linux/kernel.h>
3#include <linux/init.h>
4#include <linux/platform_device.h>
5#include <linux/dma-mapping.h>
6#include <linux/spi/pxa2xx_spi.h>
7#include <linux/i2c/pxa-i2c.h>
8
9#include "udc.h"
10#include <linux/platform_data/usb-pxa3xx-ulpi.h>
11#include <linux/platform_data/video-pxafb.h>
12#include <linux/platform_data/mmc-pxamci.h>
13#include <linux/platform_data/irda-pxaficp.h>
14#include <mach/irqs.h>
15#include <linux/platform_data/usb-ohci-pxa27x.h>
16#include <linux/platform_data/keypad-pxa27x.h>
17#include <linux/platform_data/media/camera-pxa.h>
18#include <mach/audio.h>
19#include <mach/hardware.h>
20#include <linux/platform_data/mmp_dma.h>
21#include <linux/platform_data/mtd-nand-pxa3xx.h>
22
23#include "devices.h"
24#include "generic.h"
25
26void __init pxa_register_device(struct platform_device *dev, void *data)
27{
28 int ret;
29
30 dev->dev.platform_data = data;
31
32 ret = platform_device_register(dev);
33 if (ret)
34 dev_err(&dev->dev, "unable to register device: %d\n", ret);
35}
36
37static struct resource pxa_resource_pmu = {
38 .start = IRQ_PMU,
39 .end = IRQ_PMU,
40 .flags = IORESOURCE_IRQ,
41};
42
43struct platform_device pxa_device_pmu = {
44 .name = "xscale-pmu",
45 .id = -1,
46 .resource = &pxa_resource_pmu,
47 .num_resources = 1,
48};
49
50static struct resource pxamci_resources[] = {
51 [0] = {
52 .start = 0x41100000,
53 .end = 0x41100fff,
54 .flags = IORESOURCE_MEM,
55 },
56 [1] = {
57 .start = IRQ_MMC,
58 .end = IRQ_MMC,
59 .flags = IORESOURCE_IRQ,
60 },
61 [2] = {
62 .start = 21,
63 .end = 21,
64 .flags = IORESOURCE_DMA,
65 },
66 [3] = {
67 .start = 22,
68 .end = 22,
69 .flags = IORESOURCE_DMA,
70 },
71};
72
73static u64 pxamci_dmamask = 0xffffffffUL;
74
75struct platform_device pxa_device_mci = {
76 .name = "pxa2xx-mci",
77 .id = 0,
78 .dev = {
79 .dma_mask = &pxamci_dmamask,
80 .coherent_dma_mask = 0xffffffff,
81 },
82 .num_resources = ARRAY_SIZE(pxamci_resources),
83 .resource = pxamci_resources,
84};
85
86void __init pxa_set_mci_info(struct pxamci_platform_data *info)
87{
88 pxa_register_device(&pxa_device_mci, info);
89}
90
91
92static struct pxa2xx_udc_mach_info pxa_udc_info = {
93 .gpio_pullup = -1,
94};
95
96void __init pxa_set_udc_info(struct pxa2xx_udc_mach_info *info)
97{
98 memcpy(&pxa_udc_info, info, sizeof *info);
99}
100
101static struct resource pxa2xx_udc_resources[] = {
102 [0] = {
103 .start = 0x40600000,
104 .end = 0x4060ffff,
105 .flags = IORESOURCE_MEM,
106 },
107 [1] = {
108 .start = IRQ_USB,
109 .end = IRQ_USB,
110 .flags = IORESOURCE_IRQ,
111 },
112};
113
114static u64 udc_dma_mask = ~(u32)0;
115
116struct platform_device pxa25x_device_udc = {
117 .name = "pxa25x-udc",
118 .id = -1,
119 .resource = pxa2xx_udc_resources,
120 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
121 .dev = {
122 .platform_data = &pxa_udc_info,
123 .dma_mask = &udc_dma_mask,
124 }
125};
126
127struct platform_device pxa27x_device_udc = {
128 .name = "pxa27x-udc",
129 .id = -1,
130 .resource = pxa2xx_udc_resources,
131 .num_resources = ARRAY_SIZE(pxa2xx_udc_resources),
132 .dev = {
133 .platform_data = &pxa_udc_info,
134 .dma_mask = &udc_dma_mask,
135 }
136};
137
138#ifdef CONFIG_PXA3xx
139static struct resource pxa3xx_u2d_resources[] = {
140 [0] = {
141 .start = 0x54100000,
142 .end = 0x54100fff,
143 .flags = IORESOURCE_MEM,
144 },
145 [1] = {
146 .start = IRQ_USB2,
147 .end = IRQ_USB2,
148 .flags = IORESOURCE_IRQ,
149 },
150};
151
152struct platform_device pxa3xx_device_u2d = {
153 .name = "pxa3xx-u2d",
154 .id = -1,
155 .resource = pxa3xx_u2d_resources,
156 .num_resources = ARRAY_SIZE(pxa3xx_u2d_resources),
157};
158
159void __init pxa3xx_set_u2d_info(struct pxa3xx_u2d_platform_data *info)
160{
161 pxa_register_device(&pxa3xx_device_u2d, info);
162}
163#endif /* CONFIG_PXA3xx */
164
165static struct resource pxafb_resources[] = {
166 [0] = {
167 .start = 0x44000000,
168 .end = 0x4400ffff,
169 .flags = IORESOURCE_MEM,
170 },
171 [1] = {
172 .start = IRQ_LCD,
173 .end = IRQ_LCD,
174 .flags = IORESOURCE_IRQ,
175 },
176};
177
178static u64 fb_dma_mask = ~(u64)0;
179
180struct platform_device pxa_device_fb = {
181 .name = "pxa2xx-fb",
182 .id = -1,
183 .dev = {
184 .dma_mask = &fb_dma_mask,
185 .coherent_dma_mask = 0xffffffff,
186 },
187 .num_resources = ARRAY_SIZE(pxafb_resources),
188 .resource = pxafb_resources,
189};
190
191void __init pxa_set_fb_info(struct device *parent, struct pxafb_mach_info *info)
192{
193 pxa_device_fb.dev.parent = parent;
194 pxa_register_device(&pxa_device_fb, info);
195}
196
197static struct resource pxa_resource_ffuart[] = {
198 {
199 .start = 0x40100000,
200 .end = 0x40100023,
201 .flags = IORESOURCE_MEM,
202 }, {
203 .start = IRQ_FFUART,
204 .end = IRQ_FFUART,
205 .flags = IORESOURCE_IRQ,
206 }
207};
208
209struct platform_device pxa_device_ffuart = {
210 .name = "pxa2xx-uart",
211 .id = 0,
212 .resource = pxa_resource_ffuart,
213 .num_resources = ARRAY_SIZE(pxa_resource_ffuart),
214};
215
216void __init pxa_set_ffuart_info(void *info)
217{
218 pxa_register_device(&pxa_device_ffuart, info);
219}
220
221static struct resource pxa_resource_btuart[] = {
222 {
223 .start = 0x40200000,
224 .end = 0x40200023,
225 .flags = IORESOURCE_MEM,
226 }, {
227 .start = IRQ_BTUART,
228 .end = IRQ_BTUART,
229 .flags = IORESOURCE_IRQ,
230 }
231};
232
233struct platform_device pxa_device_btuart = {
234 .name = "pxa2xx-uart",
235 .id = 1,
236 .resource = pxa_resource_btuart,
237 .num_resources = ARRAY_SIZE(pxa_resource_btuart),
238};
239
240void __init pxa_set_btuart_info(void *info)
241{
242 pxa_register_device(&pxa_device_btuart, info);
243}
244
245static struct resource pxa_resource_stuart[] = {
246 {
247 .start = 0x40700000,
248 .end = 0x40700023,
249 .flags = IORESOURCE_MEM,
250 }, {
251 .start = IRQ_STUART,
252 .end = IRQ_STUART,
253 .flags = IORESOURCE_IRQ,
254 }
255};
256
257struct platform_device pxa_device_stuart = {
258 .name = "pxa2xx-uart",
259 .id = 2,
260 .resource = pxa_resource_stuart,
261 .num_resources = ARRAY_SIZE(pxa_resource_stuart),
262};
263
264void __init pxa_set_stuart_info(void *info)
265{
266 pxa_register_device(&pxa_device_stuart, info);
267}
268
269static struct resource pxa_resource_hwuart[] = {
270 {
271 .start = 0x41600000,
272 .end = 0x4160002F,
273 .flags = IORESOURCE_MEM,
274 }, {
275 .start = IRQ_HWUART,
276 .end = IRQ_HWUART,
277 .flags = IORESOURCE_IRQ,
278 }
279};
280
281struct platform_device pxa_device_hwuart = {
282 .name = "pxa2xx-uart",
283 .id = 3,
284 .resource = pxa_resource_hwuart,
285 .num_resources = ARRAY_SIZE(pxa_resource_hwuart),
286};
287
288void __init pxa_set_hwuart_info(void *info)
289{
290 if (cpu_is_pxa255())
291 pxa_register_device(&pxa_device_hwuart, info);
292 else
293 pr_info("UART: Ignoring attempt to register HWUART on non-PXA255 hardware");
294}
295
296static struct resource pxai2c_resources[] = {
297 {
298 .start = 0x40301680,
299 .end = 0x403016a3,
300 .flags = IORESOURCE_MEM,
301 }, {
302 .start = IRQ_I2C,
303 .end = IRQ_I2C,
304 .flags = IORESOURCE_IRQ,
305 },
306};
307
308struct platform_device pxa_device_i2c = {
309 .name = "pxa2xx-i2c",
310 .id = 0,
311 .resource = pxai2c_resources,
312 .num_resources = ARRAY_SIZE(pxai2c_resources),
313};
314
315void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info)
316{
317 pxa_register_device(&pxa_device_i2c, info);
318}
319
320#ifdef CONFIG_PXA27x
321static struct resource pxa27x_resources_i2c_power[] = {
322 {
323 .start = 0x40f00180,
324 .end = 0x40f001a3,
325 .flags = IORESOURCE_MEM,
326 }, {
327 .start = IRQ_PWRI2C,
328 .end = IRQ_PWRI2C,
329 .flags = IORESOURCE_IRQ,
330 },
331};
332
333struct platform_device pxa27x_device_i2c_power = {
334 .name = "pxa2xx-i2c",
335 .id = 1,
336 .resource = pxa27x_resources_i2c_power,
337 .num_resources = ARRAY_SIZE(pxa27x_resources_i2c_power),
338};
339#endif
340
341static struct resource pxai2s_resources[] = {
342 {
343 .start = 0x40400000,
344 .end = 0x40400083,
345 .flags = IORESOURCE_MEM,
346 }, {
347 .start = IRQ_I2S,
348 .end = IRQ_I2S,
349 .flags = IORESOURCE_IRQ,
350 },
351};
352
353struct platform_device pxa_device_i2s = {
354 .name = "pxa2xx-i2s",
355 .id = -1,
356 .resource = pxai2s_resources,
357 .num_resources = ARRAY_SIZE(pxai2s_resources),
358};
359
360struct platform_device pxa_device_asoc_ssp1 = {
361 .name = "pxa-ssp-dai",
362 .id = 0,
363};
364
365struct platform_device pxa_device_asoc_ssp2= {
366 .name = "pxa-ssp-dai",
367 .id = 1,
368};
369
370struct platform_device pxa_device_asoc_ssp3 = {
371 .name = "pxa-ssp-dai",
372 .id = 2,
373};
374
375struct platform_device pxa_device_asoc_ssp4 = {
376 .name = "pxa-ssp-dai",
377 .id = 3,
378};
379
380struct platform_device pxa_device_asoc_platform = {
381 .name = "pxa-pcm-audio",
382 .id = -1,
383};
384
385static u64 pxaficp_dmamask = ~(u32)0;
386
387static struct resource pxa_ir_resources[] = {
388 [0] = {
389 .start = IRQ_STUART,
390 .end = IRQ_STUART,
391 .flags = IORESOURCE_IRQ,
392 },
393 [1] = {
394 .start = IRQ_ICP,
395 .end = IRQ_ICP,
396 .flags = IORESOURCE_IRQ,
397 },
398 [3] = {
399 .start = 0x40800000,
400 .end = 0x4080001b,
401 .flags = IORESOURCE_MEM,
402 },
403 [4] = {
404 .start = 0x40700000,
405 .end = 0x40700023,
406 .flags = IORESOURCE_MEM,
407 },
408 [5] = {
409 .start = 17,
410 .end = 17,
411 .flags = IORESOURCE_DMA,
412 },
413 [6] = {
414 .start = 18,
415 .end = 18,
416 .flags = IORESOURCE_DMA,
417 },
418};
419
420struct platform_device pxa_device_ficp = {
421 .name = "pxa2xx-ir",
422 .id = -1,
423 .num_resources = ARRAY_SIZE(pxa_ir_resources),
424 .resource = pxa_ir_resources,
425 .dev = {
426 .dma_mask = &pxaficp_dmamask,
427 .coherent_dma_mask = 0xffffffff,
428 },
429};
430
431void __init pxa_set_ficp_info(struct pxaficp_platform_data *info)
432{
433 pxa_register_device(&pxa_device_ficp, info);
434}
435
436static struct resource pxa_rtc_resources[] = {
437 [0] = {
438 .start = 0x40900000,
439 .end = 0x40900000 + 0x3b,
440 .flags = IORESOURCE_MEM,
441 },
442 [1] = {
443 .start = IRQ_RTC1Hz,
444 .end = IRQ_RTC1Hz,
445 .name = "rtc 1Hz",
446 .flags = IORESOURCE_IRQ,
447 },
448 [2] = {
449 .start = IRQ_RTCAlrm,
450 .end = IRQ_RTCAlrm,
451 .name = "rtc alarm",
452 .flags = IORESOURCE_IRQ,
453 },
454};
455
456struct platform_device pxa_device_rtc = {
457 .name = "pxa-rtc",
458 .id = -1,
459 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
460 .resource = pxa_rtc_resources,
461};
462
463struct platform_device sa1100_device_rtc = {
464 .name = "sa1100-rtc",
465 .id = -1,
466 .num_resources = ARRAY_SIZE(pxa_rtc_resources),
467 .resource = pxa_rtc_resources,
468};
469
470static struct resource pxa_ac97_resources[] = {
471 [0] = {
472 .start = 0x40500000,
473 .end = 0x40500000 + 0xfff,
474 .flags = IORESOURCE_MEM,
475 },
476 [1] = {
477 .start = IRQ_AC97,
478 .end = IRQ_AC97,
479 .flags = IORESOURCE_IRQ,
480 },
481};
482
483static u64 pxa_ac97_dmamask = 0xffffffffUL;
484
485struct platform_device pxa_device_ac97 = {
486 .name = "pxa2xx-ac97",
487 .id = -1,
488 .dev = {
489 .dma_mask = &pxa_ac97_dmamask,
490 .coherent_dma_mask = 0xffffffff,
491 },
492 .num_resources = ARRAY_SIZE(pxa_ac97_resources),
493 .resource = pxa_ac97_resources,
494};
495
496void __init pxa_set_ac97_info(pxa2xx_audio_ops_t *ops)
497{
498 pxa_register_device(&pxa_device_ac97, ops);
499}
500
501#ifdef CONFIG_PXA25x
502
503static struct resource pxa25x_resource_pwm0[] = {
504 [0] = {
505 .start = 0x40b00000,
506 .end = 0x40b0000f,
507 .flags = IORESOURCE_MEM,
508 },
509};
510
511struct platform_device pxa25x_device_pwm0 = {
512 .name = "pxa25x-pwm",
513 .id = 0,
514 .resource = pxa25x_resource_pwm0,
515 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm0),
516};
517
518static struct resource pxa25x_resource_pwm1[] = {
519 [0] = {
520 .start = 0x40c00000,
521 .end = 0x40c0000f,
522 .flags = IORESOURCE_MEM,
523 },
524};
525
526struct platform_device pxa25x_device_pwm1 = {
527 .name = "pxa25x-pwm",
528 .id = 1,
529 .resource = pxa25x_resource_pwm1,
530 .num_resources = ARRAY_SIZE(pxa25x_resource_pwm1),
531};
532
533static u64 pxa25x_ssp_dma_mask = DMA_BIT_MASK(32);
534
535static struct resource pxa25x_resource_ssp[] = {
536 [0] = {
537 .start = 0x41000000,
538 .end = 0x4100001f,
539 .flags = IORESOURCE_MEM,
540 },
541 [1] = {
542 .start = IRQ_SSP,
543 .end = IRQ_SSP,
544 .flags = IORESOURCE_IRQ,
545 },
546 [2] = {
547 /* DRCMR for RX */
548 .start = 13,
549 .end = 13,
550 .flags = IORESOURCE_DMA,
551 },
552 [3] = {
553 /* DRCMR for TX */
554 .start = 14,
555 .end = 14,
556 .flags = IORESOURCE_DMA,
557 },
558};
559
560struct platform_device pxa25x_device_ssp = {
561 .name = "pxa25x-ssp",
562 .id = 0,
563 .dev = {
564 .dma_mask = &pxa25x_ssp_dma_mask,
565 .coherent_dma_mask = DMA_BIT_MASK(32),
566 },
567 .resource = pxa25x_resource_ssp,
568 .num_resources = ARRAY_SIZE(pxa25x_resource_ssp),
569};
570
571static u64 pxa25x_nssp_dma_mask = DMA_BIT_MASK(32);
572
573static struct resource pxa25x_resource_nssp[] = {
574 [0] = {
575 .start = 0x41400000,
576 .end = 0x4140002f,
577 .flags = IORESOURCE_MEM,
578 },
579 [1] = {
580 .start = IRQ_NSSP,
581 .end = IRQ_NSSP,
582 .flags = IORESOURCE_IRQ,
583 },
584 [2] = {
585 /* DRCMR for RX */
586 .start = 15,
587 .end = 15,
588 .flags = IORESOURCE_DMA,
589 },
590 [3] = {
591 /* DRCMR for TX */
592 .start = 16,
593 .end = 16,
594 .flags = IORESOURCE_DMA,
595 },
596};
597
598struct platform_device pxa25x_device_nssp = {
599 .name = "pxa25x-nssp",
600 .id = 1,
601 .dev = {
602 .dma_mask = &pxa25x_nssp_dma_mask,
603 .coherent_dma_mask = DMA_BIT_MASK(32),
604 },
605 .resource = pxa25x_resource_nssp,
606 .num_resources = ARRAY_SIZE(pxa25x_resource_nssp),
607};
608
609static u64 pxa25x_assp_dma_mask = DMA_BIT_MASK(32);
610
611static struct resource pxa25x_resource_assp[] = {
612 [0] = {
613 .start = 0x41500000,
614 .end = 0x4150002f,
615 .flags = IORESOURCE_MEM,
616 },
617 [1] = {
618 .start = IRQ_ASSP,
619 .end = IRQ_ASSP,
620 .flags = IORESOURCE_IRQ,
621 },
622 [2] = {
623 /* DRCMR for RX */
624 .start = 23,
625 .end = 23,
626 .flags = IORESOURCE_DMA,
627 },
628 [3] = {
629 /* DRCMR for TX */
630 .start = 24,
631 .end = 24,
632 .flags = IORESOURCE_DMA,
633 },
634};
635
636struct platform_device pxa25x_device_assp = {
637 /* ASSP is basically equivalent to NSSP */
638 .name = "pxa25x-nssp",
639 .id = 2,
640 .dev = {
641 .dma_mask = &pxa25x_assp_dma_mask,
642 .coherent_dma_mask = DMA_BIT_MASK(32),
643 },
644 .resource = pxa25x_resource_assp,
645 .num_resources = ARRAY_SIZE(pxa25x_resource_assp),
646};
647#endif /* CONFIG_PXA25x */
648
649#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
650static struct resource pxa27x_resource_camera[] = {
651 [0] = {
652 .start = 0x50000000,
653 .end = 0x50000fff,
654 .flags = IORESOURCE_MEM,
655 },
656 [1] = {
657 .start = IRQ_CAMERA,
658 .end = IRQ_CAMERA,
659 .flags = IORESOURCE_IRQ,
660 },
661};
662
663static u64 pxa27x_dma_mask_camera = DMA_BIT_MASK(32);
664
665static struct platform_device pxa27x_device_camera = {
666 .name = "pxa27x-camera",
667 .id = 0, /* This is used to put cameras on this interface */
668 .dev = {
669 .dma_mask = &pxa27x_dma_mask_camera,
670 .coherent_dma_mask = 0xffffffff,
671 },
672 .num_resources = ARRAY_SIZE(pxa27x_resource_camera),
673 .resource = pxa27x_resource_camera,
674};
675
676void __init pxa_set_camera_info(struct pxacamera_platform_data *info)
677{
678 pxa_register_device(&pxa27x_device_camera, info);
679}
680
681static u64 pxa27x_ohci_dma_mask = DMA_BIT_MASK(32);
682
683static struct resource pxa27x_resource_ohci[] = {
684 [0] = {
685 .start = 0x4C000000,
686 .end = 0x4C00ff6f,
687 .flags = IORESOURCE_MEM,
688 },
689 [1] = {
690 .start = IRQ_USBH1,
691 .end = IRQ_USBH1,
692 .flags = IORESOURCE_IRQ,
693 },
694};
695
696struct platform_device pxa27x_device_ohci = {
697 .name = "pxa27x-ohci",
698 .id = -1,
699 .dev = {
700 .dma_mask = &pxa27x_ohci_dma_mask,
701 .coherent_dma_mask = DMA_BIT_MASK(32),
702 },
703 .num_resources = ARRAY_SIZE(pxa27x_resource_ohci),
704 .resource = pxa27x_resource_ohci,
705};
706
707void __init pxa_set_ohci_info(struct pxaohci_platform_data *info)
708{
709 pxa_register_device(&pxa27x_device_ohci, info);
710}
711#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
712
713#if defined(CONFIG_PXA27x) || defined(CONFIG_PXA3xx)
714static struct resource pxa27x_resource_keypad[] = {
715 [0] = {
716 .start = 0x41500000,
717 .end = 0x4150004c,
718 .flags = IORESOURCE_MEM,
719 },
720 [1] = {
721 .start = IRQ_KEYPAD,
722 .end = IRQ_KEYPAD,
723 .flags = IORESOURCE_IRQ,
724 },
725};
726
727struct platform_device pxa27x_device_keypad = {
728 .name = "pxa27x-keypad",
729 .id = -1,
730 .resource = pxa27x_resource_keypad,
731 .num_resources = ARRAY_SIZE(pxa27x_resource_keypad),
732};
733
734void __init pxa_set_keypad_info(struct pxa27x_keypad_platform_data *info)
735{
736 pxa_register_device(&pxa27x_device_keypad, info);
737}
738
739static u64 pxa27x_ssp1_dma_mask = DMA_BIT_MASK(32);
740
741static struct resource pxa27x_resource_ssp1[] = {
742 [0] = {
743 .start = 0x41000000,
744 .end = 0x4100003f,
745 .flags = IORESOURCE_MEM,
746 },
747 [1] = {
748 .start = IRQ_SSP,
749 .end = IRQ_SSP,
750 .flags = IORESOURCE_IRQ,
751 },
752 [2] = {
753 /* DRCMR for RX */
754 .start = 13,
755 .end = 13,
756 .flags = IORESOURCE_DMA,
757 },
758 [3] = {
759 /* DRCMR for TX */
760 .start = 14,
761 .end = 14,
762 .flags = IORESOURCE_DMA,
763 },
764};
765
766struct platform_device pxa27x_device_ssp1 = {
767 .name = "pxa27x-ssp",
768 .id = 0,
769 .dev = {
770 .dma_mask = &pxa27x_ssp1_dma_mask,
771 .coherent_dma_mask = DMA_BIT_MASK(32),
772 },
773 .resource = pxa27x_resource_ssp1,
774 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
775};
776
777static u64 pxa27x_ssp2_dma_mask = DMA_BIT_MASK(32);
778
779static struct resource pxa27x_resource_ssp2[] = {
780 [0] = {
781 .start = 0x41700000,
782 .end = 0x4170003f,
783 .flags = IORESOURCE_MEM,
784 },
785 [1] = {
786 .start = IRQ_SSP2,
787 .end = IRQ_SSP2,
788 .flags = IORESOURCE_IRQ,
789 },
790 [2] = {
791 /* DRCMR for RX */
792 .start = 15,
793 .end = 15,
794 .flags = IORESOURCE_DMA,
795 },
796 [3] = {
797 /* DRCMR for TX */
798 .start = 16,
799 .end = 16,
800 .flags = IORESOURCE_DMA,
801 },
802};
803
804struct platform_device pxa27x_device_ssp2 = {
805 .name = "pxa27x-ssp",
806 .id = 1,
807 .dev = {
808 .dma_mask = &pxa27x_ssp2_dma_mask,
809 .coherent_dma_mask = DMA_BIT_MASK(32),
810 },
811 .resource = pxa27x_resource_ssp2,
812 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
813};
814
815static u64 pxa27x_ssp3_dma_mask = DMA_BIT_MASK(32);
816
817static struct resource pxa27x_resource_ssp3[] = {
818 [0] = {
819 .start = 0x41900000,
820 .end = 0x4190003f,
821 .flags = IORESOURCE_MEM,
822 },
823 [1] = {
824 .start = IRQ_SSP3,
825 .end = IRQ_SSP3,
826 .flags = IORESOURCE_IRQ,
827 },
828 [2] = {
829 /* DRCMR for RX */
830 .start = 66,
831 .end = 66,
832 .flags = IORESOURCE_DMA,
833 },
834 [3] = {
835 /* DRCMR for TX */
836 .start = 67,
837 .end = 67,
838 .flags = IORESOURCE_DMA,
839 },
840};
841
842struct platform_device pxa27x_device_ssp3 = {
843 .name = "pxa27x-ssp",
844 .id = 2,
845 .dev = {
846 .dma_mask = &pxa27x_ssp3_dma_mask,
847 .coherent_dma_mask = DMA_BIT_MASK(32),
848 },
849 .resource = pxa27x_resource_ssp3,
850 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
851};
852
853static struct resource pxa27x_resource_pwm0[] = {
854 [0] = {
855 .start = 0x40b00000,
856 .end = 0x40b0001f,
857 .flags = IORESOURCE_MEM,
858 },
859};
860
861struct platform_device pxa27x_device_pwm0 = {
862 .name = "pxa27x-pwm",
863 .id = 0,
864 .resource = pxa27x_resource_pwm0,
865 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm0),
866};
867
868static struct resource pxa27x_resource_pwm1[] = {
869 [0] = {
870 .start = 0x40c00000,
871 .end = 0x40c0001f,
872 .flags = IORESOURCE_MEM,
873 },
874};
875
876struct platform_device pxa27x_device_pwm1 = {
877 .name = "pxa27x-pwm",
878 .id = 1,
879 .resource = pxa27x_resource_pwm1,
880 .num_resources = ARRAY_SIZE(pxa27x_resource_pwm1),
881};
882#endif /* CONFIG_PXA27x || CONFIG_PXA3xx */
883
884#ifdef CONFIG_PXA3xx
885static struct resource pxa3xx_resources_mci2[] = {
886 [0] = {
887 .start = 0x42000000,
888 .end = 0x42000fff,
889 .flags = IORESOURCE_MEM,
890 },
891 [1] = {
892 .start = IRQ_MMC2,
893 .end = IRQ_MMC2,
894 .flags = IORESOURCE_IRQ,
895 },
896 [2] = {
897 .start = 93,
898 .end = 93,
899 .flags = IORESOURCE_DMA,
900 },
901 [3] = {
902 .start = 94,
903 .end = 94,
904 .flags = IORESOURCE_DMA,
905 },
906};
907
908struct platform_device pxa3xx_device_mci2 = {
909 .name = "pxa2xx-mci",
910 .id = 1,
911 .dev = {
912 .dma_mask = &pxamci_dmamask,
913 .coherent_dma_mask = 0xffffffff,
914 },
915 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci2),
916 .resource = pxa3xx_resources_mci2,
917};
918
919void __init pxa3xx_set_mci2_info(struct pxamci_platform_data *info)
920{
921 pxa_register_device(&pxa3xx_device_mci2, info);
922}
923
924static struct resource pxa3xx_resources_mci3[] = {
925 [0] = {
926 .start = 0x42500000,
927 .end = 0x42500fff,
928 .flags = IORESOURCE_MEM,
929 },
930 [1] = {
931 .start = IRQ_MMC3,
932 .end = IRQ_MMC3,
933 .flags = IORESOURCE_IRQ,
934 },
935 [2] = {
936 .start = 100,
937 .end = 100,
938 .flags = IORESOURCE_DMA,
939 },
940 [3] = {
941 .start = 101,
942 .end = 101,
943 .flags = IORESOURCE_DMA,
944 },
945};
946
947struct platform_device pxa3xx_device_mci3 = {
948 .name = "pxa2xx-mci",
949 .id = 2,
950 .dev = {
951 .dma_mask = &pxamci_dmamask,
952 .coherent_dma_mask = 0xffffffff,
953 },
954 .num_resources = ARRAY_SIZE(pxa3xx_resources_mci3),
955 .resource = pxa3xx_resources_mci3,
956};
957
958void __init pxa3xx_set_mci3_info(struct pxamci_platform_data *info)
959{
960 pxa_register_device(&pxa3xx_device_mci3, info);
961}
962
963static struct resource pxa3xx_resources_gcu[] = {
964 {
965 .start = 0x54000000,
966 .end = 0x54000fff,
967 .flags = IORESOURCE_MEM,
968 },
969 {
970 .start = IRQ_GCU,
971 .end = IRQ_GCU,
972 .flags = IORESOURCE_IRQ,
973 },
974};
975
976static u64 pxa3xx_gcu_dmamask = DMA_BIT_MASK(32);
977
978struct platform_device pxa3xx_device_gcu = {
979 .name = "pxa3xx-gcu",
980 .id = -1,
981 .num_resources = ARRAY_SIZE(pxa3xx_resources_gcu),
982 .resource = pxa3xx_resources_gcu,
983 .dev = {
984 .dma_mask = &pxa3xx_gcu_dmamask,
985 .coherent_dma_mask = 0xffffffff,
986 },
987};
988
989#endif /* CONFIG_PXA3xx */
990
991#if defined(CONFIG_PXA3xx)
992static struct resource pxa3xx_resources_i2c_power[] = {
993 {
994 .start = 0x40f500c0,
995 .end = 0x40f500d3,
996 .flags = IORESOURCE_MEM,
997 }, {
998 .start = IRQ_PWRI2C,
999 .end = IRQ_PWRI2C,
1000 .flags = IORESOURCE_IRQ,
1001 },
1002};
1003
1004struct platform_device pxa3xx_device_i2c_power = {
1005 .name = "pxa3xx-pwri2c",
1006 .id = 1,
1007 .resource = pxa3xx_resources_i2c_power,
1008 .num_resources = ARRAY_SIZE(pxa3xx_resources_i2c_power),
1009};
1010
1011static struct resource pxa3xx_resources_nand[] = {
1012 [0] = {
1013 .start = 0x43100000,
1014 .end = 0x43100053,
1015 .flags = IORESOURCE_MEM,
1016 },
1017 [1] = {
1018 .start = IRQ_NAND,
1019 .end = IRQ_NAND,
1020 .flags = IORESOURCE_IRQ,
1021 },
1022 [2] = {
1023 /* DRCMR for Data DMA */
1024 .start = 97,
1025 .end = 97,
1026 .flags = IORESOURCE_DMA,
1027 },
1028 [3] = {
1029 /* DRCMR for Command DMA */
1030 .start = 99,
1031 .end = 99,
1032 .flags = IORESOURCE_DMA,
1033 },
1034};
1035
1036static u64 pxa3xx_nand_dma_mask = DMA_BIT_MASK(32);
1037
1038struct platform_device pxa3xx_device_nand = {
1039 .name = "pxa3xx-nand",
1040 .id = -1,
1041 .dev = {
1042 .dma_mask = &pxa3xx_nand_dma_mask,
1043 .coherent_dma_mask = DMA_BIT_MASK(32),
1044 },
1045 .num_resources = ARRAY_SIZE(pxa3xx_resources_nand),
1046 .resource = pxa3xx_resources_nand,
1047};
1048
1049void __init pxa3xx_set_nand_info(struct pxa3xx_nand_platform_data *info)
1050{
1051 pxa_register_device(&pxa3xx_device_nand, info);
1052}
1053
1054static u64 pxa3xx_ssp4_dma_mask = DMA_BIT_MASK(32);
1055
1056static struct resource pxa3xx_resource_ssp4[] = {
1057 [0] = {
1058 .start = 0x41a00000,
1059 .end = 0x41a0003f,
1060 .flags = IORESOURCE_MEM,
1061 },
1062 [1] = {
1063 .start = IRQ_SSP4,
1064 .end = IRQ_SSP4,
1065 .flags = IORESOURCE_IRQ,
1066 },
1067 [2] = {
1068 /* DRCMR for RX */
1069 .start = 2,
1070 .end = 2,
1071 .flags = IORESOURCE_DMA,
1072 },
1073 [3] = {
1074 /* DRCMR for TX */
1075 .start = 3,
1076 .end = 3,
1077 .flags = IORESOURCE_DMA,
1078 },
1079};
1080
1081/*
1082 * PXA3xx SSP is basically equivalent to PXA27x.
1083 * However, we need to register the device by the correct name in order to
1084 * make the driver set the correct internal type, hence we provide specific
1085 * platform_devices for each of them.
1086 */
1087struct platform_device pxa3xx_device_ssp1 = {
1088 .name = "pxa3xx-ssp",
1089 .id = 0,
1090 .dev = {
1091 .dma_mask = &pxa27x_ssp1_dma_mask,
1092 .coherent_dma_mask = DMA_BIT_MASK(32),
1093 },
1094 .resource = pxa27x_resource_ssp1,
1095 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp1),
1096};
1097
1098struct platform_device pxa3xx_device_ssp2 = {
1099 .name = "pxa3xx-ssp",
1100 .id = 1,
1101 .dev = {
1102 .dma_mask = &pxa27x_ssp2_dma_mask,
1103 .coherent_dma_mask = DMA_BIT_MASK(32),
1104 },
1105 .resource = pxa27x_resource_ssp2,
1106 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp2),
1107};
1108
1109struct platform_device pxa3xx_device_ssp3 = {
1110 .name = "pxa3xx-ssp",
1111 .id = 2,
1112 .dev = {
1113 .dma_mask = &pxa27x_ssp3_dma_mask,
1114 .coherent_dma_mask = DMA_BIT_MASK(32),
1115 },
1116 .resource = pxa27x_resource_ssp3,
1117 .num_resources = ARRAY_SIZE(pxa27x_resource_ssp3),
1118};
1119
1120struct platform_device pxa3xx_device_ssp4 = {
1121 .name = "pxa3xx-ssp",
1122 .id = 3,
1123 .dev = {
1124 .dma_mask = &pxa3xx_ssp4_dma_mask,
1125 .coherent_dma_mask = DMA_BIT_MASK(32),
1126 },
1127 .resource = pxa3xx_resource_ssp4,
1128 .num_resources = ARRAY_SIZE(pxa3xx_resource_ssp4),
1129};
1130#endif /* CONFIG_PXA3xx */
1131
1132struct resource pxa_resource_gpio[] = {
1133 {
1134 .start = 0x40e00000,
1135 .end = 0x40e0ffff,
1136 .flags = IORESOURCE_MEM,
1137 }, {
1138 .start = IRQ_GPIO0,
1139 .end = IRQ_GPIO0,
1140 .name = "gpio0",
1141 .flags = IORESOURCE_IRQ,
1142 }, {
1143 .start = IRQ_GPIO1,
1144 .end = IRQ_GPIO1,
1145 .name = "gpio1",
1146 .flags = IORESOURCE_IRQ,
1147 }, {
1148 .start = IRQ_GPIO_2_x,
1149 .end = IRQ_GPIO_2_x,
1150 .name = "gpio_mux",
1151 .flags = IORESOURCE_IRQ,
1152 },
1153};
1154
1155struct platform_device pxa25x_device_gpio = {
1156#ifdef CONFIG_CPU_PXA26x
1157 .name = "pxa26x-gpio",
1158#else
1159 .name = "pxa25x-gpio",
1160#endif
1161 .id = -1,
1162 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1163 .resource = pxa_resource_gpio,
1164};
1165
1166struct platform_device pxa27x_device_gpio = {
1167 .name = "pxa27x-gpio",
1168 .id = -1,
1169 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1170 .resource = pxa_resource_gpio,
1171};
1172
1173struct platform_device pxa3xx_device_gpio = {
1174 .name = "pxa3xx-gpio",
1175 .id = -1,
1176 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1177 .resource = pxa_resource_gpio,
1178};
1179
1180struct platform_device pxa93x_device_gpio = {
1181 .name = "pxa93x-gpio",
1182 .id = -1,
1183 .num_resources = ARRAY_SIZE(pxa_resource_gpio),
1184 .resource = pxa_resource_gpio,
1185};
1186
1187/* pxa2xx-spi platform-device ID equals respective SSP platform-device ID + 1.
1188 * See comment in arch/arm/mach-pxa/ssp.c::ssp_probe() */
1189void __init pxa2xx_set_spi_info(unsigned id, struct pxa2xx_spi_master *info)
1190{
1191 struct platform_device *pd;
1192
1193 pd = platform_device_alloc("pxa2xx-spi", id);
1194 if (pd == NULL) {
1195 printk(KERN_ERR "pxa2xx-spi: failed to allocate device id %d\n",
1196 id);
1197 return;
1198 }
1199
1200 pd->dev.platform_data = info;
1201 platform_device_add(pd);
1202}
1203
1204static struct mmp_dma_platdata pxa_dma_pdata = {
1205 .dma_channels = 0,
1206 .nb_requestors = 0,
1207};
1208
1209static struct resource pxa_dma_resource[] = {
1210 [0] = {
1211 .start = 0x40000000,
1212 .end = 0x4000ffff,
1213 .flags = IORESOURCE_MEM,
1214 },
1215 [1] = {
1216 .start = IRQ_DMA,
1217 .end = IRQ_DMA,
1218 .flags = IORESOURCE_IRQ,
1219 },
1220};
1221
1222static u64 pxadma_dmamask = 0xffffffffUL;
1223
1224static struct platform_device pxa2xx_pxa_dma = {
1225 .name = "pxa-dma",
1226 .id = 0,
1227 .dev = {
1228 .dma_mask = &pxadma_dmamask,
1229 .coherent_dma_mask = 0xffffffff,
1230 },
1231 .num_resources = ARRAY_SIZE(pxa_dma_resource),
1232 .resource = pxa_dma_resource,
1233};
1234
1235void __init pxa2xx_set_dmac_info(int nb_channels, int nb_requestors)
1236{
1237 pxa_dma_pdata.dma_channels = nb_channels;
1238 pxa_dma_pdata.nb_requestors = nb_requestors;
1239 pxa_register_device(&pxa2xx_pxa_dma, &pxa_dma_pdata);
1240}