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1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/export.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32
33#include <asm/io.h>
34#include <asm/dma.h>
35#include <asm/scatterlist.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define CREATE_TRACE_POINTS
42#include <trace/events/swiotlb.h>
43
44#define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
46
47#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
48
49/*
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
53 */
54#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
55
56int swiotlb_force;
57
58/*
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
62 */
63static phys_addr_t io_tlb_start, io_tlb_end;
64
65/*
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
68 */
69static unsigned long io_tlb_nslabs;
70
71/*
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
73 */
74static unsigned long io_tlb_overflow = 32*1024;
75
76static phys_addr_t io_tlb_overflow_buffer;
77
78/*
79 * This is a free list describing the number of free entries available from
80 * each index
81 */
82static unsigned int *io_tlb_list;
83static unsigned int io_tlb_index;
84
85/*
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
88 */
89static phys_addr_t *io_tlb_orig_addr;
90
91/*
92 * Protect the above data structures in the map and unmap calls
93 */
94static DEFINE_SPINLOCK(io_tlb_lock);
95
96static int late_alloc;
97
98static int __init
99setup_io_tlb_npages(char *str)
100{
101 if (isdigit(*str)) {
102 io_tlb_nslabs = simple_strtoul(str, &str, 0);
103 /* avoid tail segment of size < IO_TLB_SEGSIZE */
104 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
105 }
106 if (*str == ',')
107 ++str;
108 if (!strcmp(str, "force"))
109 swiotlb_force = 1;
110
111 return 0;
112}
113early_param("swiotlb", setup_io_tlb_npages);
114/* make io_tlb_overflow tunable too? */
115
116unsigned long swiotlb_nr_tbl(void)
117{
118 return io_tlb_nslabs;
119}
120EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
121
122/* default to 64MB */
123#define IO_TLB_DEFAULT_SIZE (64UL<<20)
124unsigned long swiotlb_size_or_default(void)
125{
126 unsigned long size;
127
128 size = io_tlb_nslabs << IO_TLB_SHIFT;
129
130 return size ? size : (IO_TLB_DEFAULT_SIZE);
131}
132
133/* Note that this doesn't work with highmem page */
134static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
135 volatile void *address)
136{
137 return phys_to_dma(hwdev, virt_to_phys(address));
138}
139
140static bool no_iotlb_memory;
141
142void swiotlb_print_info(void)
143{
144 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
145 unsigned char *vstart, *vend;
146
147 if (no_iotlb_memory) {
148 pr_warn("software IO TLB: No low mem\n");
149 return;
150 }
151
152 vstart = phys_to_virt(io_tlb_start);
153 vend = phys_to_virt(io_tlb_end);
154
155 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
156 (unsigned long long)io_tlb_start,
157 (unsigned long long)io_tlb_end,
158 bytes >> 20, vstart, vend - 1);
159}
160
161int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
162{
163 void *v_overflow_buffer;
164 unsigned long i, bytes;
165
166 bytes = nslabs << IO_TLB_SHIFT;
167
168 io_tlb_nslabs = nslabs;
169 io_tlb_start = __pa(tlb);
170 io_tlb_end = io_tlb_start + bytes;
171
172 /*
173 * Get the overflow emergency buffer
174 */
175 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
176 PAGE_ALIGN(io_tlb_overflow),
177 PAGE_SIZE);
178 if (!v_overflow_buffer)
179 return -ENOMEM;
180
181 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
182
183 /*
184 * Allocate and initialize the free list array. This array is used
185 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
186 * between io_tlb_start and io_tlb_end.
187 */
188 io_tlb_list = memblock_virt_alloc(
189 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
190 PAGE_SIZE);
191 for (i = 0; i < io_tlb_nslabs; i++)
192 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
193 io_tlb_index = 0;
194 io_tlb_orig_addr = memblock_virt_alloc(
195 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
196 PAGE_SIZE);
197
198 if (verbose)
199 swiotlb_print_info();
200
201 return 0;
202}
203
204/*
205 * Statically reserve bounce buffer space and initialize bounce buffer data
206 * structures for the software IO TLB used to implement the DMA API.
207 */
208void __init
209swiotlb_init(int verbose)
210{
211 size_t default_size = IO_TLB_DEFAULT_SIZE;
212 unsigned char *vstart;
213 unsigned long bytes;
214
215 if (!io_tlb_nslabs) {
216 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
217 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
218 }
219
220 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
221
222 /* Get IO TLB memory from the low pages */
223 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
224 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
225 return;
226
227 if (io_tlb_start)
228 memblock_free_early(io_tlb_start,
229 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
230 pr_warn("Cannot allocate SWIOTLB buffer");
231 no_iotlb_memory = true;
232}
233
234/*
235 * Systems with larger DMA zones (those that don't support ISA) can
236 * initialize the swiotlb later using the slab allocator if needed.
237 * This should be just like above, but with some error catching.
238 */
239int
240swiotlb_late_init_with_default_size(size_t default_size)
241{
242 unsigned long bytes, req_nslabs = io_tlb_nslabs;
243 unsigned char *vstart = NULL;
244 unsigned int order;
245 int rc = 0;
246
247 if (!io_tlb_nslabs) {
248 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
249 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
250 }
251
252 /*
253 * Get IO TLB memory from the low pages
254 */
255 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
256 io_tlb_nslabs = SLABS_PER_PAGE << order;
257 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
258
259 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
260 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
261 order);
262 if (vstart)
263 break;
264 order--;
265 }
266
267 if (!vstart) {
268 io_tlb_nslabs = req_nslabs;
269 return -ENOMEM;
270 }
271 if (order != get_order(bytes)) {
272 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
273 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
274 io_tlb_nslabs = SLABS_PER_PAGE << order;
275 }
276 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
277 if (rc)
278 free_pages((unsigned long)vstart, order);
279 return rc;
280}
281
282int
283swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
284{
285 unsigned long i, bytes;
286 unsigned char *v_overflow_buffer;
287
288 bytes = nslabs << IO_TLB_SHIFT;
289
290 io_tlb_nslabs = nslabs;
291 io_tlb_start = virt_to_phys(tlb);
292 io_tlb_end = io_tlb_start + bytes;
293
294 memset(tlb, 0, bytes);
295
296 /*
297 * Get the overflow emergency buffer
298 */
299 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
300 get_order(io_tlb_overflow));
301 if (!v_overflow_buffer)
302 goto cleanup2;
303
304 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
305
306 /*
307 * Allocate and initialize the free list array. This array is used
308 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
309 * between io_tlb_start and io_tlb_end.
310 */
311 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
312 get_order(io_tlb_nslabs * sizeof(int)));
313 if (!io_tlb_list)
314 goto cleanup3;
315
316 for (i = 0; i < io_tlb_nslabs; i++)
317 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
318 io_tlb_index = 0;
319
320 io_tlb_orig_addr = (phys_addr_t *)
321 __get_free_pages(GFP_KERNEL,
322 get_order(io_tlb_nslabs *
323 sizeof(phys_addr_t)));
324 if (!io_tlb_orig_addr)
325 goto cleanup4;
326
327 memset(io_tlb_orig_addr, 0, io_tlb_nslabs * sizeof(phys_addr_t));
328
329 swiotlb_print_info();
330
331 late_alloc = 1;
332
333 return 0;
334
335cleanup4:
336 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
337 sizeof(int)));
338 io_tlb_list = NULL;
339cleanup3:
340 free_pages((unsigned long)v_overflow_buffer,
341 get_order(io_tlb_overflow));
342 io_tlb_overflow_buffer = 0;
343cleanup2:
344 io_tlb_end = 0;
345 io_tlb_start = 0;
346 io_tlb_nslabs = 0;
347 return -ENOMEM;
348}
349
350void __init swiotlb_free(void)
351{
352 if (!io_tlb_orig_addr)
353 return;
354
355 if (late_alloc) {
356 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
357 get_order(io_tlb_overflow));
358 free_pages((unsigned long)io_tlb_orig_addr,
359 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
360 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
361 sizeof(int)));
362 free_pages((unsigned long)phys_to_virt(io_tlb_start),
363 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
364 } else {
365 memblock_free_late(io_tlb_overflow_buffer,
366 PAGE_ALIGN(io_tlb_overflow));
367 memblock_free_late(__pa(io_tlb_orig_addr),
368 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
369 memblock_free_late(__pa(io_tlb_list),
370 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
371 memblock_free_late(io_tlb_start,
372 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
373 }
374 io_tlb_nslabs = 0;
375}
376
377static int is_swiotlb_buffer(phys_addr_t paddr)
378{
379 return paddr >= io_tlb_start && paddr < io_tlb_end;
380}
381
382/*
383 * Bounce: copy the swiotlb buffer back to the original dma location
384 */
385static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
386 size_t size, enum dma_data_direction dir)
387{
388 unsigned long pfn = PFN_DOWN(orig_addr);
389 unsigned char *vaddr = phys_to_virt(tlb_addr);
390
391 if (PageHighMem(pfn_to_page(pfn))) {
392 /* The buffer does not have a mapping. Map it in and copy */
393 unsigned int offset = orig_addr & ~PAGE_MASK;
394 char *buffer;
395 unsigned int sz = 0;
396 unsigned long flags;
397
398 while (size) {
399 sz = min_t(size_t, PAGE_SIZE - offset, size);
400
401 local_irq_save(flags);
402 buffer = kmap_atomic(pfn_to_page(pfn));
403 if (dir == DMA_TO_DEVICE)
404 memcpy(vaddr, buffer + offset, sz);
405 else
406 memcpy(buffer + offset, vaddr, sz);
407 kunmap_atomic(buffer);
408 local_irq_restore(flags);
409
410 size -= sz;
411 pfn++;
412 vaddr += sz;
413 offset = 0;
414 }
415 } else if (dir == DMA_TO_DEVICE) {
416 memcpy(vaddr, phys_to_virt(orig_addr), size);
417 } else {
418 memcpy(phys_to_virt(orig_addr), vaddr, size);
419 }
420}
421
422phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
423 dma_addr_t tbl_dma_addr,
424 phys_addr_t orig_addr, size_t size,
425 enum dma_data_direction dir)
426{
427 unsigned long flags;
428 phys_addr_t tlb_addr;
429 unsigned int nslots, stride, index, wrap;
430 int i;
431 unsigned long mask;
432 unsigned long offset_slots;
433 unsigned long max_slots;
434
435 if (no_iotlb_memory)
436 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
437
438 mask = dma_get_seg_boundary(hwdev);
439
440 tbl_dma_addr &= mask;
441
442 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
443
444 /*
445 * Carefully handle integer overflow which can occur when mask == ~0UL.
446 */
447 max_slots = mask + 1
448 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
449 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
450
451 /*
452 * For mappings greater than a page, we limit the stride (and
453 * hence alignment) to a page size.
454 */
455 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
456 if (size > PAGE_SIZE)
457 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
458 else
459 stride = 1;
460
461 BUG_ON(!nslots);
462
463 /*
464 * Find suitable number of IO TLB entries size that will fit this
465 * request and allocate a buffer from that IO TLB pool.
466 */
467 spin_lock_irqsave(&io_tlb_lock, flags);
468 index = ALIGN(io_tlb_index, stride);
469 if (index >= io_tlb_nslabs)
470 index = 0;
471 wrap = index;
472
473 do {
474 while (iommu_is_span_boundary(index, nslots, offset_slots,
475 max_slots)) {
476 index += stride;
477 if (index >= io_tlb_nslabs)
478 index = 0;
479 if (index == wrap)
480 goto not_found;
481 }
482
483 /*
484 * If we find a slot that indicates we have 'nslots' number of
485 * contiguous buffers, we allocate the buffers from that slot
486 * and mark the entries as '0' indicating unavailable.
487 */
488 if (io_tlb_list[index] >= nslots) {
489 int count = 0;
490
491 for (i = index; i < (int) (index + nslots); i++)
492 io_tlb_list[i] = 0;
493 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
494 io_tlb_list[i] = ++count;
495 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
496
497 /*
498 * Update the indices to avoid searching in the next
499 * round.
500 */
501 io_tlb_index = ((index + nslots) < io_tlb_nslabs
502 ? (index + nslots) : 0);
503
504 goto found;
505 }
506 index += stride;
507 if (index >= io_tlb_nslabs)
508 index = 0;
509 } while (index != wrap);
510
511not_found:
512 spin_unlock_irqrestore(&io_tlb_lock, flags);
513 if (printk_ratelimit())
514 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
515 return SWIOTLB_MAP_ERROR;
516found:
517 spin_unlock_irqrestore(&io_tlb_lock, flags);
518
519 /*
520 * Save away the mapping from the original address to the DMA address.
521 * This is needed when we sync the memory. Then we sync the buffer if
522 * needed.
523 */
524 for (i = 0; i < nslots; i++)
525 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
526 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
527 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
528
529 return tlb_addr;
530}
531EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
532
533/*
534 * Allocates bounce buffer and returns its kernel virtual address.
535 */
536
537phys_addr_t map_single(struct device *hwdev, phys_addr_t phys, size_t size,
538 enum dma_data_direction dir)
539{
540 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
541
542 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
543}
544
545/*
546 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
547 */
548void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
549 size_t size, enum dma_data_direction dir)
550{
551 unsigned long flags;
552 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
553 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
554 phys_addr_t orig_addr = io_tlb_orig_addr[index];
555
556 /*
557 * First, sync the memory before unmapping the entry
558 */
559 if (orig_addr && ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
560 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
561
562 /*
563 * Return the buffer to the free list by setting the corresponding
564 * entries to indicate the number of contiguous entries available.
565 * While returning the entries to the free list, we merge the entries
566 * with slots below and above the pool being returned.
567 */
568 spin_lock_irqsave(&io_tlb_lock, flags);
569 {
570 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
571 io_tlb_list[index + nslots] : 0);
572 /*
573 * Step 1: return the slots to the free list, merging the
574 * slots with superceeding slots
575 */
576 for (i = index + nslots - 1; i >= index; i--)
577 io_tlb_list[i] = ++count;
578 /*
579 * Step 2: merge the returned slots with the preceding slots,
580 * if available (non zero)
581 */
582 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
583 io_tlb_list[i] = ++count;
584 }
585 spin_unlock_irqrestore(&io_tlb_lock, flags);
586}
587EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
588
589void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
590 size_t size, enum dma_data_direction dir,
591 enum dma_sync_target target)
592{
593 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
594 phys_addr_t orig_addr = io_tlb_orig_addr[index];
595
596 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
597
598 switch (target) {
599 case SYNC_FOR_CPU:
600 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
601 swiotlb_bounce(orig_addr, tlb_addr,
602 size, DMA_FROM_DEVICE);
603 else
604 BUG_ON(dir != DMA_TO_DEVICE);
605 break;
606 case SYNC_FOR_DEVICE:
607 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
608 swiotlb_bounce(orig_addr, tlb_addr,
609 size, DMA_TO_DEVICE);
610 else
611 BUG_ON(dir != DMA_FROM_DEVICE);
612 break;
613 default:
614 BUG();
615 }
616}
617EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
618
619void *
620swiotlb_alloc_coherent(struct device *hwdev, size_t size,
621 dma_addr_t *dma_handle, gfp_t flags)
622{
623 dma_addr_t dev_addr;
624 void *ret;
625 int order = get_order(size);
626 u64 dma_mask = DMA_BIT_MASK(32);
627
628 if (hwdev && hwdev->coherent_dma_mask)
629 dma_mask = hwdev->coherent_dma_mask;
630
631 ret = (void *)__get_free_pages(flags, order);
632 if (ret) {
633 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
634 if (dev_addr + size - 1 > dma_mask) {
635 /*
636 * The allocated memory isn't reachable by the device.
637 */
638 free_pages((unsigned long) ret, order);
639 ret = NULL;
640 }
641 }
642 if (!ret) {
643 /*
644 * We are either out of memory or the device can't DMA to
645 * GFP_DMA memory; fall back on map_single(), which
646 * will grab memory from the lowest available address range.
647 */
648 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
649 if (paddr == SWIOTLB_MAP_ERROR)
650 return NULL;
651
652 ret = phys_to_virt(paddr);
653 dev_addr = phys_to_dma(hwdev, paddr);
654
655 /* Confirm address can be DMA'd by device */
656 if (dev_addr + size - 1 > dma_mask) {
657 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
658 (unsigned long long)dma_mask,
659 (unsigned long long)dev_addr);
660
661 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
662 swiotlb_tbl_unmap_single(hwdev, paddr,
663 size, DMA_TO_DEVICE);
664 return NULL;
665 }
666 }
667
668 *dma_handle = dev_addr;
669 memset(ret, 0, size);
670
671 return ret;
672}
673EXPORT_SYMBOL(swiotlb_alloc_coherent);
674
675void
676swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
677 dma_addr_t dev_addr)
678{
679 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
680
681 WARN_ON(irqs_disabled());
682 if (!is_swiotlb_buffer(paddr))
683 free_pages((unsigned long)vaddr, get_order(size));
684 else
685 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
686 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
687}
688EXPORT_SYMBOL(swiotlb_free_coherent);
689
690static void
691swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
692 int do_panic)
693{
694 /*
695 * Ran out of IOMMU space for this operation. This is very bad.
696 * Unfortunately the drivers cannot handle this operation properly.
697 * unless they check for dma_mapping_error (most don't)
698 * When the mapping is small enough return a static buffer to limit
699 * the damage, or panic when the transfer is too big.
700 */
701 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
702 "device %s\n", size, dev ? dev_name(dev) : "?");
703
704 if (size <= io_tlb_overflow || !do_panic)
705 return;
706
707 if (dir == DMA_BIDIRECTIONAL)
708 panic("DMA: Random memory could be DMA accessed\n");
709 if (dir == DMA_FROM_DEVICE)
710 panic("DMA: Random memory could be DMA written\n");
711 if (dir == DMA_TO_DEVICE)
712 panic("DMA: Random memory could be DMA read\n");
713}
714
715/*
716 * Map a single buffer of the indicated size for DMA in streaming mode. The
717 * physical address to use is returned.
718 *
719 * Once the device is given the dma address, the device owns this memory until
720 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
721 */
722dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
723 unsigned long offset, size_t size,
724 enum dma_data_direction dir,
725 struct dma_attrs *attrs)
726{
727 phys_addr_t map, phys = page_to_phys(page) + offset;
728 dma_addr_t dev_addr = phys_to_dma(dev, phys);
729
730 BUG_ON(dir == DMA_NONE);
731 /*
732 * If the address happens to be in the device's DMA window,
733 * we can safely return the device addr and not worry about bounce
734 * buffering it.
735 */
736 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
737 return dev_addr;
738
739 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
740
741 /* Oh well, have to allocate and map a bounce buffer. */
742 map = map_single(dev, phys, size, dir);
743 if (map == SWIOTLB_MAP_ERROR) {
744 swiotlb_full(dev, size, dir, 1);
745 return phys_to_dma(dev, io_tlb_overflow_buffer);
746 }
747
748 dev_addr = phys_to_dma(dev, map);
749
750 /* Ensure that the address returned is DMA'ble */
751 if (!dma_capable(dev, dev_addr, size)) {
752 swiotlb_tbl_unmap_single(dev, map, size, dir);
753 return phys_to_dma(dev, io_tlb_overflow_buffer);
754 }
755
756 return dev_addr;
757}
758EXPORT_SYMBOL_GPL(swiotlb_map_page);
759
760/*
761 * Unmap a single streaming mode DMA translation. The dma_addr and size must
762 * match what was provided for in a previous swiotlb_map_page call. All
763 * other usages are undefined.
764 *
765 * After this call, reads by the cpu to the buffer are guaranteed to see
766 * whatever the device wrote there.
767 */
768static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
769 size_t size, enum dma_data_direction dir)
770{
771 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
772
773 BUG_ON(dir == DMA_NONE);
774
775 if (is_swiotlb_buffer(paddr)) {
776 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
777 return;
778 }
779
780 if (dir != DMA_FROM_DEVICE)
781 return;
782
783 /*
784 * phys_to_virt doesn't work with hihgmem page but we could
785 * call dma_mark_clean() with hihgmem page here. However, we
786 * are fine since dma_mark_clean() is null on POWERPC. We can
787 * make dma_mark_clean() take a physical address if necessary.
788 */
789 dma_mark_clean(phys_to_virt(paddr), size);
790}
791
792void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
793 size_t size, enum dma_data_direction dir,
794 struct dma_attrs *attrs)
795{
796 unmap_single(hwdev, dev_addr, size, dir);
797}
798EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
799
800/*
801 * Make physical memory consistent for a single streaming mode DMA translation
802 * after a transfer.
803 *
804 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
805 * using the cpu, yet do not wish to teardown the dma mapping, you must
806 * call this function before doing so. At the next point you give the dma
807 * address back to the card, you must first perform a
808 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
809 */
810static void
811swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
812 size_t size, enum dma_data_direction dir,
813 enum dma_sync_target target)
814{
815 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
816
817 BUG_ON(dir == DMA_NONE);
818
819 if (is_swiotlb_buffer(paddr)) {
820 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
821 return;
822 }
823
824 if (dir != DMA_FROM_DEVICE)
825 return;
826
827 dma_mark_clean(phys_to_virt(paddr), size);
828}
829
830void
831swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
832 size_t size, enum dma_data_direction dir)
833{
834 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
835}
836EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
837
838void
839swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
840 size_t size, enum dma_data_direction dir)
841{
842 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
843}
844EXPORT_SYMBOL(swiotlb_sync_single_for_device);
845
846/*
847 * Map a set of buffers described by scatterlist in streaming mode for DMA.
848 * This is the scatter-gather version of the above swiotlb_map_page
849 * interface. Here the scatter gather list elements are each tagged with the
850 * appropriate dma address and length. They are obtained via
851 * sg_dma_{address,length}(SG).
852 *
853 * NOTE: An implementation may be able to use a smaller number of
854 * DMA address/length pairs than there are SG table elements.
855 * (for example via virtual mapping capabilities)
856 * The routine returns the number of addr/length pairs actually
857 * used, at most nents.
858 *
859 * Device ownership issues as mentioned above for swiotlb_map_page are the
860 * same here.
861 */
862int
863swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
864 enum dma_data_direction dir, struct dma_attrs *attrs)
865{
866 struct scatterlist *sg;
867 int i;
868
869 BUG_ON(dir == DMA_NONE);
870
871 for_each_sg(sgl, sg, nelems, i) {
872 phys_addr_t paddr = sg_phys(sg);
873 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
874
875 if (swiotlb_force ||
876 !dma_capable(hwdev, dev_addr, sg->length)) {
877 phys_addr_t map = map_single(hwdev, sg_phys(sg),
878 sg->length, dir);
879 if (map == SWIOTLB_MAP_ERROR) {
880 /* Don't panic here, we expect map_sg users
881 to do proper error handling. */
882 swiotlb_full(hwdev, sg->length, dir, 0);
883 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
884 attrs);
885 sg_dma_len(sgl) = 0;
886 return 0;
887 }
888 sg->dma_address = phys_to_dma(hwdev, map);
889 } else
890 sg->dma_address = dev_addr;
891 sg_dma_len(sg) = sg->length;
892 }
893 return nelems;
894}
895EXPORT_SYMBOL(swiotlb_map_sg_attrs);
896
897int
898swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
899 enum dma_data_direction dir)
900{
901 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
902}
903EXPORT_SYMBOL(swiotlb_map_sg);
904
905/*
906 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
907 * concerning calls here are the same as for swiotlb_unmap_page() above.
908 */
909void
910swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
911 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
912{
913 struct scatterlist *sg;
914 int i;
915
916 BUG_ON(dir == DMA_NONE);
917
918 for_each_sg(sgl, sg, nelems, i)
919 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
920
921}
922EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
923
924void
925swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
926 enum dma_data_direction dir)
927{
928 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
929}
930EXPORT_SYMBOL(swiotlb_unmap_sg);
931
932/*
933 * Make physical memory consistent for a set of streaming mode DMA translations
934 * after a transfer.
935 *
936 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
937 * and usage.
938 */
939static void
940swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
941 int nelems, enum dma_data_direction dir,
942 enum dma_sync_target target)
943{
944 struct scatterlist *sg;
945 int i;
946
947 for_each_sg(sgl, sg, nelems, i)
948 swiotlb_sync_single(hwdev, sg->dma_address,
949 sg_dma_len(sg), dir, target);
950}
951
952void
953swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
954 int nelems, enum dma_data_direction dir)
955{
956 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
957}
958EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
959
960void
961swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
962 int nelems, enum dma_data_direction dir)
963{
964 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
965}
966EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
967
968int
969swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
970{
971 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
972}
973EXPORT_SYMBOL(swiotlb_dma_mapping_error);
974
975/*
976 * Return whether the given device DMA address mask can be supported
977 * properly. For example, if your device can only drive the low 24-bits
978 * during bus mastering, then you would pass 0x00ffffff as the mask to
979 * this function.
980 */
981int
982swiotlb_dma_supported(struct device *hwdev, u64 mask)
983{
984 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
985}
986EXPORT_SYMBOL(swiotlb_dma_supported);
1/*
2 * Dynamic DMA mapping support.
3 *
4 * This implementation is a fallback for platforms that do not support
5 * I/O TLBs (aka DMA address translation hardware).
6 * Copyright (C) 2000 Asit Mallick <Asit.K.Mallick@intel.com>
7 * Copyright (C) 2000 Goutham Rao <goutham.rao@intel.com>
8 * Copyright (C) 2000, 2003 Hewlett-Packard Co
9 * David Mosberger-Tang <davidm@hpl.hp.com>
10 *
11 * 03/05/07 davidm Switch from PCI-DMA to generic device DMA API.
12 * 00/12/13 davidm Rename to swiotlb.c and add mark_clean() to avoid
13 * unnecessary i-cache flushing.
14 * 04/07/.. ak Better overflow handling. Assorted fixes.
15 * 05/09/10 linville Add support for syncing ranges, support syncing for
16 * DMA_BIDIRECTIONAL mappings, miscellaneous cleanup.
17 * 08/12/11 beckyb Add highmem support
18 */
19
20#include <linux/cache.h>
21#include <linux/dma-mapping.h>
22#include <linux/mm.h>
23#include <linux/export.h>
24#include <linux/spinlock.h>
25#include <linux/string.h>
26#include <linux/swiotlb.h>
27#include <linux/pfn.h>
28#include <linux/types.h>
29#include <linux/ctype.h>
30#include <linux/highmem.h>
31#include <linux/gfp.h>
32#include <linux/scatterlist.h>
33
34#include <asm/io.h>
35#include <asm/dma.h>
36
37#include <linux/init.h>
38#include <linux/bootmem.h>
39#include <linux/iommu-helper.h>
40
41#define CREATE_TRACE_POINTS
42#include <trace/events/swiotlb.h>
43
44#define OFFSET(val,align) ((unsigned long) \
45 ( (val) & ( (align) - 1)))
46
47#define SLABS_PER_PAGE (1 << (PAGE_SHIFT - IO_TLB_SHIFT))
48
49/*
50 * Minimum IO TLB size to bother booting with. Systems with mainly
51 * 64bit capable cards will only lightly use the swiotlb. If we can't
52 * allocate a contiguous 1MB, we're probably in trouble anyway.
53 */
54#define IO_TLB_MIN_SLABS ((1<<20) >> IO_TLB_SHIFT)
55
56int swiotlb_force;
57
58/*
59 * Used to do a quick range check in swiotlb_tbl_unmap_single and
60 * swiotlb_tbl_sync_single_*, to see if the memory was in fact allocated by this
61 * API.
62 */
63static phys_addr_t io_tlb_start, io_tlb_end;
64
65/*
66 * The number of IO TLB blocks (in groups of 64) between io_tlb_start and
67 * io_tlb_end. This is command line adjustable via setup_io_tlb_npages.
68 */
69static unsigned long io_tlb_nslabs;
70
71/*
72 * When the IOMMU overflows we return a fallback buffer. This sets the size.
73 */
74static unsigned long io_tlb_overflow = 32*1024;
75
76static phys_addr_t io_tlb_overflow_buffer;
77
78/*
79 * This is a free list describing the number of free entries available from
80 * each index
81 */
82static unsigned int *io_tlb_list;
83static unsigned int io_tlb_index;
84
85/*
86 * We need to save away the original address corresponding to a mapped entry
87 * for the sync operations.
88 */
89#define INVALID_PHYS_ADDR (~(phys_addr_t)0)
90static phys_addr_t *io_tlb_orig_addr;
91
92/*
93 * Protect the above data structures in the map and unmap calls
94 */
95static DEFINE_SPINLOCK(io_tlb_lock);
96
97static int late_alloc;
98
99static int __init
100setup_io_tlb_npages(char *str)
101{
102 if (isdigit(*str)) {
103 io_tlb_nslabs = simple_strtoul(str, &str, 0);
104 /* avoid tail segment of size < IO_TLB_SEGSIZE */
105 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
106 }
107 if (*str == ',')
108 ++str;
109 if (!strcmp(str, "force"))
110 swiotlb_force = 1;
111
112 return 0;
113}
114early_param("swiotlb", setup_io_tlb_npages);
115/* make io_tlb_overflow tunable too? */
116
117unsigned long swiotlb_nr_tbl(void)
118{
119 return io_tlb_nslabs;
120}
121EXPORT_SYMBOL_GPL(swiotlb_nr_tbl);
122
123/* default to 64MB */
124#define IO_TLB_DEFAULT_SIZE (64UL<<20)
125unsigned long swiotlb_size_or_default(void)
126{
127 unsigned long size;
128
129 size = io_tlb_nslabs << IO_TLB_SHIFT;
130
131 return size ? size : (IO_TLB_DEFAULT_SIZE);
132}
133
134/* Note that this doesn't work with highmem page */
135static dma_addr_t swiotlb_virt_to_bus(struct device *hwdev,
136 volatile void *address)
137{
138 return phys_to_dma(hwdev, virt_to_phys(address));
139}
140
141static bool no_iotlb_memory;
142
143void swiotlb_print_info(void)
144{
145 unsigned long bytes = io_tlb_nslabs << IO_TLB_SHIFT;
146 unsigned char *vstart, *vend;
147
148 if (no_iotlb_memory) {
149 pr_warn("software IO TLB: No low mem\n");
150 return;
151 }
152
153 vstart = phys_to_virt(io_tlb_start);
154 vend = phys_to_virt(io_tlb_end);
155
156 printk(KERN_INFO "software IO TLB [mem %#010llx-%#010llx] (%luMB) mapped at [%p-%p]\n",
157 (unsigned long long)io_tlb_start,
158 (unsigned long long)io_tlb_end,
159 bytes >> 20, vstart, vend - 1);
160}
161
162int __init swiotlb_init_with_tbl(char *tlb, unsigned long nslabs, int verbose)
163{
164 void *v_overflow_buffer;
165 unsigned long i, bytes;
166
167 bytes = nslabs << IO_TLB_SHIFT;
168
169 io_tlb_nslabs = nslabs;
170 io_tlb_start = __pa(tlb);
171 io_tlb_end = io_tlb_start + bytes;
172
173 /*
174 * Get the overflow emergency buffer
175 */
176 v_overflow_buffer = memblock_virt_alloc_low_nopanic(
177 PAGE_ALIGN(io_tlb_overflow),
178 PAGE_SIZE);
179 if (!v_overflow_buffer)
180 return -ENOMEM;
181
182 io_tlb_overflow_buffer = __pa(v_overflow_buffer);
183
184 /*
185 * Allocate and initialize the free list array. This array is used
186 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
187 * between io_tlb_start and io_tlb_end.
188 */
189 io_tlb_list = memblock_virt_alloc(
190 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)),
191 PAGE_SIZE);
192 io_tlb_orig_addr = memblock_virt_alloc(
193 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)),
194 PAGE_SIZE);
195 for (i = 0; i < io_tlb_nslabs; i++) {
196 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
197 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
198 }
199 io_tlb_index = 0;
200
201 if (verbose)
202 swiotlb_print_info();
203
204 return 0;
205}
206
207/*
208 * Statically reserve bounce buffer space and initialize bounce buffer data
209 * structures for the software IO TLB used to implement the DMA API.
210 */
211void __init
212swiotlb_init(int verbose)
213{
214 size_t default_size = IO_TLB_DEFAULT_SIZE;
215 unsigned char *vstart;
216 unsigned long bytes;
217
218 if (!io_tlb_nslabs) {
219 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
220 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
221 }
222
223 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
224
225 /* Get IO TLB memory from the low pages */
226 vstart = memblock_virt_alloc_low_nopanic(PAGE_ALIGN(bytes), PAGE_SIZE);
227 if (vstart && !swiotlb_init_with_tbl(vstart, io_tlb_nslabs, verbose))
228 return;
229
230 if (io_tlb_start)
231 memblock_free_early(io_tlb_start,
232 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
233 pr_warn("Cannot allocate SWIOTLB buffer");
234 no_iotlb_memory = true;
235}
236
237/*
238 * Systems with larger DMA zones (those that don't support ISA) can
239 * initialize the swiotlb later using the slab allocator if needed.
240 * This should be just like above, but with some error catching.
241 */
242int
243swiotlb_late_init_with_default_size(size_t default_size)
244{
245 unsigned long bytes, req_nslabs = io_tlb_nslabs;
246 unsigned char *vstart = NULL;
247 unsigned int order;
248 int rc = 0;
249
250 if (!io_tlb_nslabs) {
251 io_tlb_nslabs = (default_size >> IO_TLB_SHIFT);
252 io_tlb_nslabs = ALIGN(io_tlb_nslabs, IO_TLB_SEGSIZE);
253 }
254
255 /*
256 * Get IO TLB memory from the low pages
257 */
258 order = get_order(io_tlb_nslabs << IO_TLB_SHIFT);
259 io_tlb_nslabs = SLABS_PER_PAGE << order;
260 bytes = io_tlb_nslabs << IO_TLB_SHIFT;
261
262 while ((SLABS_PER_PAGE << order) > IO_TLB_MIN_SLABS) {
263 vstart = (void *)__get_free_pages(GFP_DMA | __GFP_NOWARN,
264 order);
265 if (vstart)
266 break;
267 order--;
268 }
269
270 if (!vstart) {
271 io_tlb_nslabs = req_nslabs;
272 return -ENOMEM;
273 }
274 if (order != get_order(bytes)) {
275 printk(KERN_WARNING "Warning: only able to allocate %ld MB "
276 "for software IO TLB\n", (PAGE_SIZE << order) >> 20);
277 io_tlb_nslabs = SLABS_PER_PAGE << order;
278 }
279 rc = swiotlb_late_init_with_tbl(vstart, io_tlb_nslabs);
280 if (rc)
281 free_pages((unsigned long)vstart, order);
282 return rc;
283}
284
285int
286swiotlb_late_init_with_tbl(char *tlb, unsigned long nslabs)
287{
288 unsigned long i, bytes;
289 unsigned char *v_overflow_buffer;
290
291 bytes = nslabs << IO_TLB_SHIFT;
292
293 io_tlb_nslabs = nslabs;
294 io_tlb_start = virt_to_phys(tlb);
295 io_tlb_end = io_tlb_start + bytes;
296
297 memset(tlb, 0, bytes);
298
299 /*
300 * Get the overflow emergency buffer
301 */
302 v_overflow_buffer = (void *)__get_free_pages(GFP_DMA,
303 get_order(io_tlb_overflow));
304 if (!v_overflow_buffer)
305 goto cleanup2;
306
307 io_tlb_overflow_buffer = virt_to_phys(v_overflow_buffer);
308
309 /*
310 * Allocate and initialize the free list array. This array is used
311 * to find contiguous free memory regions of size up to IO_TLB_SEGSIZE
312 * between io_tlb_start and io_tlb_end.
313 */
314 io_tlb_list = (unsigned int *)__get_free_pages(GFP_KERNEL,
315 get_order(io_tlb_nslabs * sizeof(int)));
316 if (!io_tlb_list)
317 goto cleanup3;
318
319 io_tlb_orig_addr = (phys_addr_t *)
320 __get_free_pages(GFP_KERNEL,
321 get_order(io_tlb_nslabs *
322 sizeof(phys_addr_t)));
323 if (!io_tlb_orig_addr)
324 goto cleanup4;
325
326 for (i = 0; i < io_tlb_nslabs; i++) {
327 io_tlb_list[i] = IO_TLB_SEGSIZE - OFFSET(i, IO_TLB_SEGSIZE);
328 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
329 }
330 io_tlb_index = 0;
331
332 swiotlb_print_info();
333
334 late_alloc = 1;
335
336 return 0;
337
338cleanup4:
339 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
340 sizeof(int)));
341 io_tlb_list = NULL;
342cleanup3:
343 free_pages((unsigned long)v_overflow_buffer,
344 get_order(io_tlb_overflow));
345 io_tlb_overflow_buffer = 0;
346cleanup2:
347 io_tlb_end = 0;
348 io_tlb_start = 0;
349 io_tlb_nslabs = 0;
350 return -ENOMEM;
351}
352
353void __init swiotlb_free(void)
354{
355 if (!io_tlb_orig_addr)
356 return;
357
358 if (late_alloc) {
359 free_pages((unsigned long)phys_to_virt(io_tlb_overflow_buffer),
360 get_order(io_tlb_overflow));
361 free_pages((unsigned long)io_tlb_orig_addr,
362 get_order(io_tlb_nslabs * sizeof(phys_addr_t)));
363 free_pages((unsigned long)io_tlb_list, get_order(io_tlb_nslabs *
364 sizeof(int)));
365 free_pages((unsigned long)phys_to_virt(io_tlb_start),
366 get_order(io_tlb_nslabs << IO_TLB_SHIFT));
367 } else {
368 memblock_free_late(io_tlb_overflow_buffer,
369 PAGE_ALIGN(io_tlb_overflow));
370 memblock_free_late(__pa(io_tlb_orig_addr),
371 PAGE_ALIGN(io_tlb_nslabs * sizeof(phys_addr_t)));
372 memblock_free_late(__pa(io_tlb_list),
373 PAGE_ALIGN(io_tlb_nslabs * sizeof(int)));
374 memblock_free_late(io_tlb_start,
375 PAGE_ALIGN(io_tlb_nslabs << IO_TLB_SHIFT));
376 }
377 io_tlb_nslabs = 0;
378}
379
380int is_swiotlb_buffer(phys_addr_t paddr)
381{
382 return paddr >= io_tlb_start && paddr < io_tlb_end;
383}
384
385/*
386 * Bounce: copy the swiotlb buffer back to the original dma location
387 */
388static void swiotlb_bounce(phys_addr_t orig_addr, phys_addr_t tlb_addr,
389 size_t size, enum dma_data_direction dir)
390{
391 unsigned long pfn = PFN_DOWN(orig_addr);
392 unsigned char *vaddr = phys_to_virt(tlb_addr);
393
394 if (PageHighMem(pfn_to_page(pfn))) {
395 /* The buffer does not have a mapping. Map it in and copy */
396 unsigned int offset = orig_addr & ~PAGE_MASK;
397 char *buffer;
398 unsigned int sz = 0;
399 unsigned long flags;
400
401 while (size) {
402 sz = min_t(size_t, PAGE_SIZE - offset, size);
403
404 local_irq_save(flags);
405 buffer = kmap_atomic(pfn_to_page(pfn));
406 if (dir == DMA_TO_DEVICE)
407 memcpy(vaddr, buffer + offset, sz);
408 else
409 memcpy(buffer + offset, vaddr, sz);
410 kunmap_atomic(buffer);
411 local_irq_restore(flags);
412
413 size -= sz;
414 pfn++;
415 vaddr += sz;
416 offset = 0;
417 }
418 } else if (dir == DMA_TO_DEVICE) {
419 memcpy(vaddr, phys_to_virt(orig_addr), size);
420 } else {
421 memcpy(phys_to_virt(orig_addr), vaddr, size);
422 }
423}
424
425phys_addr_t swiotlb_tbl_map_single(struct device *hwdev,
426 dma_addr_t tbl_dma_addr,
427 phys_addr_t orig_addr, size_t size,
428 enum dma_data_direction dir)
429{
430 unsigned long flags;
431 phys_addr_t tlb_addr;
432 unsigned int nslots, stride, index, wrap;
433 int i;
434 unsigned long mask;
435 unsigned long offset_slots;
436 unsigned long max_slots;
437
438 if (no_iotlb_memory)
439 panic("Can not allocate SWIOTLB buffer earlier and can't now provide you with the DMA bounce buffer");
440
441 mask = dma_get_seg_boundary(hwdev);
442
443 tbl_dma_addr &= mask;
444
445 offset_slots = ALIGN(tbl_dma_addr, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
446
447 /*
448 * Carefully handle integer overflow which can occur when mask == ~0UL.
449 */
450 max_slots = mask + 1
451 ? ALIGN(mask + 1, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT
452 : 1UL << (BITS_PER_LONG - IO_TLB_SHIFT);
453
454 /*
455 * For mappings greater than a page, we limit the stride (and
456 * hence alignment) to a page size.
457 */
458 nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
459 if (size > PAGE_SIZE)
460 stride = (1 << (PAGE_SHIFT - IO_TLB_SHIFT));
461 else
462 stride = 1;
463
464 BUG_ON(!nslots);
465
466 /*
467 * Find suitable number of IO TLB entries size that will fit this
468 * request and allocate a buffer from that IO TLB pool.
469 */
470 spin_lock_irqsave(&io_tlb_lock, flags);
471 index = ALIGN(io_tlb_index, stride);
472 if (index >= io_tlb_nslabs)
473 index = 0;
474 wrap = index;
475
476 do {
477 while (iommu_is_span_boundary(index, nslots, offset_slots,
478 max_slots)) {
479 index += stride;
480 if (index >= io_tlb_nslabs)
481 index = 0;
482 if (index == wrap)
483 goto not_found;
484 }
485
486 /*
487 * If we find a slot that indicates we have 'nslots' number of
488 * contiguous buffers, we allocate the buffers from that slot
489 * and mark the entries as '0' indicating unavailable.
490 */
491 if (io_tlb_list[index] >= nslots) {
492 int count = 0;
493
494 for (i = index; i < (int) (index + nslots); i++)
495 io_tlb_list[i] = 0;
496 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE - 1) && io_tlb_list[i]; i--)
497 io_tlb_list[i] = ++count;
498 tlb_addr = io_tlb_start + (index << IO_TLB_SHIFT);
499
500 /*
501 * Update the indices to avoid searching in the next
502 * round.
503 */
504 io_tlb_index = ((index + nslots) < io_tlb_nslabs
505 ? (index + nslots) : 0);
506
507 goto found;
508 }
509 index += stride;
510 if (index >= io_tlb_nslabs)
511 index = 0;
512 } while (index != wrap);
513
514not_found:
515 spin_unlock_irqrestore(&io_tlb_lock, flags);
516 if (printk_ratelimit())
517 dev_warn(hwdev, "swiotlb buffer is full (sz: %zd bytes)\n", size);
518 return SWIOTLB_MAP_ERROR;
519found:
520 spin_unlock_irqrestore(&io_tlb_lock, flags);
521
522 /*
523 * Save away the mapping from the original address to the DMA address.
524 * This is needed when we sync the memory. Then we sync the buffer if
525 * needed.
526 */
527 for (i = 0; i < nslots; i++)
528 io_tlb_orig_addr[index+i] = orig_addr + (i << IO_TLB_SHIFT);
529 if (dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL)
530 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_TO_DEVICE);
531
532 return tlb_addr;
533}
534EXPORT_SYMBOL_GPL(swiotlb_tbl_map_single);
535
536/*
537 * Allocates bounce buffer and returns its kernel virtual address.
538 */
539
540static phys_addr_t
541map_single(struct device *hwdev, phys_addr_t phys, size_t size,
542 enum dma_data_direction dir)
543{
544 dma_addr_t start_dma_addr = phys_to_dma(hwdev, io_tlb_start);
545
546 return swiotlb_tbl_map_single(hwdev, start_dma_addr, phys, size, dir);
547}
548
549/*
550 * dma_addr is the kernel virtual address of the bounce buffer to unmap.
551 */
552void swiotlb_tbl_unmap_single(struct device *hwdev, phys_addr_t tlb_addr,
553 size_t size, enum dma_data_direction dir)
554{
555 unsigned long flags;
556 int i, count, nslots = ALIGN(size, 1 << IO_TLB_SHIFT) >> IO_TLB_SHIFT;
557 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
558 phys_addr_t orig_addr = io_tlb_orig_addr[index];
559
560 /*
561 * First, sync the memory before unmapping the entry
562 */
563 if (orig_addr != INVALID_PHYS_ADDR &&
564 ((dir == DMA_FROM_DEVICE) || (dir == DMA_BIDIRECTIONAL)))
565 swiotlb_bounce(orig_addr, tlb_addr, size, DMA_FROM_DEVICE);
566
567 /*
568 * Return the buffer to the free list by setting the corresponding
569 * entries to indicate the number of contiguous entries available.
570 * While returning the entries to the free list, we merge the entries
571 * with slots below and above the pool being returned.
572 */
573 spin_lock_irqsave(&io_tlb_lock, flags);
574 {
575 count = ((index + nslots) < ALIGN(index + 1, IO_TLB_SEGSIZE) ?
576 io_tlb_list[index + nslots] : 0);
577 /*
578 * Step 1: return the slots to the free list, merging the
579 * slots with superceeding slots
580 */
581 for (i = index + nslots - 1; i >= index; i--) {
582 io_tlb_list[i] = ++count;
583 io_tlb_orig_addr[i] = INVALID_PHYS_ADDR;
584 }
585 /*
586 * Step 2: merge the returned slots with the preceding slots,
587 * if available (non zero)
588 */
589 for (i = index - 1; (OFFSET(i, IO_TLB_SEGSIZE) != IO_TLB_SEGSIZE -1) && io_tlb_list[i]; i--)
590 io_tlb_list[i] = ++count;
591 }
592 spin_unlock_irqrestore(&io_tlb_lock, flags);
593}
594EXPORT_SYMBOL_GPL(swiotlb_tbl_unmap_single);
595
596void swiotlb_tbl_sync_single(struct device *hwdev, phys_addr_t tlb_addr,
597 size_t size, enum dma_data_direction dir,
598 enum dma_sync_target target)
599{
600 int index = (tlb_addr - io_tlb_start) >> IO_TLB_SHIFT;
601 phys_addr_t orig_addr = io_tlb_orig_addr[index];
602
603 if (orig_addr == INVALID_PHYS_ADDR)
604 return;
605 orig_addr += (unsigned long)tlb_addr & ((1 << IO_TLB_SHIFT) - 1);
606
607 switch (target) {
608 case SYNC_FOR_CPU:
609 if (likely(dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL))
610 swiotlb_bounce(orig_addr, tlb_addr,
611 size, DMA_FROM_DEVICE);
612 else
613 BUG_ON(dir != DMA_TO_DEVICE);
614 break;
615 case SYNC_FOR_DEVICE:
616 if (likely(dir == DMA_TO_DEVICE || dir == DMA_BIDIRECTIONAL))
617 swiotlb_bounce(orig_addr, tlb_addr,
618 size, DMA_TO_DEVICE);
619 else
620 BUG_ON(dir != DMA_FROM_DEVICE);
621 break;
622 default:
623 BUG();
624 }
625}
626EXPORT_SYMBOL_GPL(swiotlb_tbl_sync_single);
627
628void *
629swiotlb_alloc_coherent(struct device *hwdev, size_t size,
630 dma_addr_t *dma_handle, gfp_t flags)
631{
632 dma_addr_t dev_addr;
633 void *ret;
634 int order = get_order(size);
635 u64 dma_mask = DMA_BIT_MASK(32);
636
637 if (hwdev && hwdev->coherent_dma_mask)
638 dma_mask = hwdev->coherent_dma_mask;
639
640 ret = (void *)__get_free_pages(flags, order);
641 if (ret) {
642 dev_addr = swiotlb_virt_to_bus(hwdev, ret);
643 if (dev_addr + size - 1 > dma_mask) {
644 /*
645 * The allocated memory isn't reachable by the device.
646 */
647 free_pages((unsigned long) ret, order);
648 ret = NULL;
649 }
650 }
651 if (!ret) {
652 /*
653 * We are either out of memory or the device can't DMA to
654 * GFP_DMA memory; fall back on map_single(), which
655 * will grab memory from the lowest available address range.
656 */
657 phys_addr_t paddr = map_single(hwdev, 0, size, DMA_FROM_DEVICE);
658 if (paddr == SWIOTLB_MAP_ERROR)
659 goto err_warn;
660
661 ret = phys_to_virt(paddr);
662 dev_addr = phys_to_dma(hwdev, paddr);
663
664 /* Confirm address can be DMA'd by device */
665 if (dev_addr + size - 1 > dma_mask) {
666 printk("hwdev DMA mask = 0x%016Lx, dev_addr = 0x%016Lx\n",
667 (unsigned long long)dma_mask,
668 (unsigned long long)dev_addr);
669
670 /* DMA_TO_DEVICE to avoid memcpy in unmap_single */
671 swiotlb_tbl_unmap_single(hwdev, paddr,
672 size, DMA_TO_DEVICE);
673 goto err_warn;
674 }
675 }
676
677 *dma_handle = dev_addr;
678 memset(ret, 0, size);
679
680 return ret;
681
682err_warn:
683 pr_warn("swiotlb: coherent allocation failed for device %s size=%zu\n",
684 dev_name(hwdev), size);
685 dump_stack();
686
687 return NULL;
688}
689EXPORT_SYMBOL(swiotlb_alloc_coherent);
690
691void
692swiotlb_free_coherent(struct device *hwdev, size_t size, void *vaddr,
693 dma_addr_t dev_addr)
694{
695 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
696
697 WARN_ON(irqs_disabled());
698 if (!is_swiotlb_buffer(paddr))
699 free_pages((unsigned long)vaddr, get_order(size));
700 else
701 /* DMA_TO_DEVICE to avoid memcpy in swiotlb_tbl_unmap_single */
702 swiotlb_tbl_unmap_single(hwdev, paddr, size, DMA_TO_DEVICE);
703}
704EXPORT_SYMBOL(swiotlb_free_coherent);
705
706static void
707swiotlb_full(struct device *dev, size_t size, enum dma_data_direction dir,
708 int do_panic)
709{
710 /*
711 * Ran out of IOMMU space for this operation. This is very bad.
712 * Unfortunately the drivers cannot handle this operation properly.
713 * unless they check for dma_mapping_error (most don't)
714 * When the mapping is small enough return a static buffer to limit
715 * the damage, or panic when the transfer is too big.
716 */
717 printk(KERN_ERR "DMA: Out of SW-IOMMU space for %zu bytes at "
718 "device %s\n", size, dev ? dev_name(dev) : "?");
719
720 if (size <= io_tlb_overflow || !do_panic)
721 return;
722
723 if (dir == DMA_BIDIRECTIONAL)
724 panic("DMA: Random memory could be DMA accessed\n");
725 if (dir == DMA_FROM_DEVICE)
726 panic("DMA: Random memory could be DMA written\n");
727 if (dir == DMA_TO_DEVICE)
728 panic("DMA: Random memory could be DMA read\n");
729}
730
731/*
732 * Map a single buffer of the indicated size for DMA in streaming mode. The
733 * physical address to use is returned.
734 *
735 * Once the device is given the dma address, the device owns this memory until
736 * either swiotlb_unmap_page or swiotlb_dma_sync_single is performed.
737 */
738dma_addr_t swiotlb_map_page(struct device *dev, struct page *page,
739 unsigned long offset, size_t size,
740 enum dma_data_direction dir,
741 struct dma_attrs *attrs)
742{
743 phys_addr_t map, phys = page_to_phys(page) + offset;
744 dma_addr_t dev_addr = phys_to_dma(dev, phys);
745
746 BUG_ON(dir == DMA_NONE);
747 /*
748 * If the address happens to be in the device's DMA window,
749 * we can safely return the device addr and not worry about bounce
750 * buffering it.
751 */
752 if (dma_capable(dev, dev_addr, size) && !swiotlb_force)
753 return dev_addr;
754
755 trace_swiotlb_bounced(dev, dev_addr, size, swiotlb_force);
756
757 /* Oh well, have to allocate and map a bounce buffer. */
758 map = map_single(dev, phys, size, dir);
759 if (map == SWIOTLB_MAP_ERROR) {
760 swiotlb_full(dev, size, dir, 1);
761 return phys_to_dma(dev, io_tlb_overflow_buffer);
762 }
763
764 dev_addr = phys_to_dma(dev, map);
765
766 /* Ensure that the address returned is DMA'ble */
767 if (!dma_capable(dev, dev_addr, size)) {
768 swiotlb_tbl_unmap_single(dev, map, size, dir);
769 return phys_to_dma(dev, io_tlb_overflow_buffer);
770 }
771
772 return dev_addr;
773}
774EXPORT_SYMBOL_GPL(swiotlb_map_page);
775
776/*
777 * Unmap a single streaming mode DMA translation. The dma_addr and size must
778 * match what was provided for in a previous swiotlb_map_page call. All
779 * other usages are undefined.
780 *
781 * After this call, reads by the cpu to the buffer are guaranteed to see
782 * whatever the device wrote there.
783 */
784static void unmap_single(struct device *hwdev, dma_addr_t dev_addr,
785 size_t size, enum dma_data_direction dir)
786{
787 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
788
789 BUG_ON(dir == DMA_NONE);
790
791 if (is_swiotlb_buffer(paddr)) {
792 swiotlb_tbl_unmap_single(hwdev, paddr, size, dir);
793 return;
794 }
795
796 if (dir != DMA_FROM_DEVICE)
797 return;
798
799 /*
800 * phys_to_virt doesn't work with hihgmem page but we could
801 * call dma_mark_clean() with hihgmem page here. However, we
802 * are fine since dma_mark_clean() is null on POWERPC. We can
803 * make dma_mark_clean() take a physical address if necessary.
804 */
805 dma_mark_clean(phys_to_virt(paddr), size);
806}
807
808void swiotlb_unmap_page(struct device *hwdev, dma_addr_t dev_addr,
809 size_t size, enum dma_data_direction dir,
810 struct dma_attrs *attrs)
811{
812 unmap_single(hwdev, dev_addr, size, dir);
813}
814EXPORT_SYMBOL_GPL(swiotlb_unmap_page);
815
816/*
817 * Make physical memory consistent for a single streaming mode DMA translation
818 * after a transfer.
819 *
820 * If you perform a swiotlb_map_page() but wish to interrogate the buffer
821 * using the cpu, yet do not wish to teardown the dma mapping, you must
822 * call this function before doing so. At the next point you give the dma
823 * address back to the card, you must first perform a
824 * swiotlb_dma_sync_for_device, and then the device again owns the buffer
825 */
826static void
827swiotlb_sync_single(struct device *hwdev, dma_addr_t dev_addr,
828 size_t size, enum dma_data_direction dir,
829 enum dma_sync_target target)
830{
831 phys_addr_t paddr = dma_to_phys(hwdev, dev_addr);
832
833 BUG_ON(dir == DMA_NONE);
834
835 if (is_swiotlb_buffer(paddr)) {
836 swiotlb_tbl_sync_single(hwdev, paddr, size, dir, target);
837 return;
838 }
839
840 if (dir != DMA_FROM_DEVICE)
841 return;
842
843 dma_mark_clean(phys_to_virt(paddr), size);
844}
845
846void
847swiotlb_sync_single_for_cpu(struct device *hwdev, dma_addr_t dev_addr,
848 size_t size, enum dma_data_direction dir)
849{
850 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_CPU);
851}
852EXPORT_SYMBOL(swiotlb_sync_single_for_cpu);
853
854void
855swiotlb_sync_single_for_device(struct device *hwdev, dma_addr_t dev_addr,
856 size_t size, enum dma_data_direction dir)
857{
858 swiotlb_sync_single(hwdev, dev_addr, size, dir, SYNC_FOR_DEVICE);
859}
860EXPORT_SYMBOL(swiotlb_sync_single_for_device);
861
862/*
863 * Map a set of buffers described by scatterlist in streaming mode for DMA.
864 * This is the scatter-gather version of the above swiotlb_map_page
865 * interface. Here the scatter gather list elements are each tagged with the
866 * appropriate dma address and length. They are obtained via
867 * sg_dma_{address,length}(SG).
868 *
869 * NOTE: An implementation may be able to use a smaller number of
870 * DMA address/length pairs than there are SG table elements.
871 * (for example via virtual mapping capabilities)
872 * The routine returns the number of addr/length pairs actually
873 * used, at most nents.
874 *
875 * Device ownership issues as mentioned above for swiotlb_map_page are the
876 * same here.
877 */
878int
879swiotlb_map_sg_attrs(struct device *hwdev, struct scatterlist *sgl, int nelems,
880 enum dma_data_direction dir, struct dma_attrs *attrs)
881{
882 struct scatterlist *sg;
883 int i;
884
885 BUG_ON(dir == DMA_NONE);
886
887 for_each_sg(sgl, sg, nelems, i) {
888 phys_addr_t paddr = sg_phys(sg);
889 dma_addr_t dev_addr = phys_to_dma(hwdev, paddr);
890
891 if (swiotlb_force ||
892 !dma_capable(hwdev, dev_addr, sg->length)) {
893 phys_addr_t map = map_single(hwdev, sg_phys(sg),
894 sg->length, dir);
895 if (map == SWIOTLB_MAP_ERROR) {
896 /* Don't panic here, we expect map_sg users
897 to do proper error handling. */
898 swiotlb_full(hwdev, sg->length, dir, 0);
899 swiotlb_unmap_sg_attrs(hwdev, sgl, i, dir,
900 attrs);
901 sg_dma_len(sgl) = 0;
902 return 0;
903 }
904 sg->dma_address = phys_to_dma(hwdev, map);
905 } else
906 sg->dma_address = dev_addr;
907 sg_dma_len(sg) = sg->length;
908 }
909 return nelems;
910}
911EXPORT_SYMBOL(swiotlb_map_sg_attrs);
912
913int
914swiotlb_map_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
915 enum dma_data_direction dir)
916{
917 return swiotlb_map_sg_attrs(hwdev, sgl, nelems, dir, NULL);
918}
919EXPORT_SYMBOL(swiotlb_map_sg);
920
921/*
922 * Unmap a set of streaming mode DMA translations. Again, cpu read rules
923 * concerning calls here are the same as for swiotlb_unmap_page() above.
924 */
925void
926swiotlb_unmap_sg_attrs(struct device *hwdev, struct scatterlist *sgl,
927 int nelems, enum dma_data_direction dir, struct dma_attrs *attrs)
928{
929 struct scatterlist *sg;
930 int i;
931
932 BUG_ON(dir == DMA_NONE);
933
934 for_each_sg(sgl, sg, nelems, i)
935 unmap_single(hwdev, sg->dma_address, sg_dma_len(sg), dir);
936
937}
938EXPORT_SYMBOL(swiotlb_unmap_sg_attrs);
939
940void
941swiotlb_unmap_sg(struct device *hwdev, struct scatterlist *sgl, int nelems,
942 enum dma_data_direction dir)
943{
944 return swiotlb_unmap_sg_attrs(hwdev, sgl, nelems, dir, NULL);
945}
946EXPORT_SYMBOL(swiotlb_unmap_sg);
947
948/*
949 * Make physical memory consistent for a set of streaming mode DMA translations
950 * after a transfer.
951 *
952 * The same as swiotlb_sync_single_* but for a scatter-gather list, same rules
953 * and usage.
954 */
955static void
956swiotlb_sync_sg(struct device *hwdev, struct scatterlist *sgl,
957 int nelems, enum dma_data_direction dir,
958 enum dma_sync_target target)
959{
960 struct scatterlist *sg;
961 int i;
962
963 for_each_sg(sgl, sg, nelems, i)
964 swiotlb_sync_single(hwdev, sg->dma_address,
965 sg_dma_len(sg), dir, target);
966}
967
968void
969swiotlb_sync_sg_for_cpu(struct device *hwdev, struct scatterlist *sg,
970 int nelems, enum dma_data_direction dir)
971{
972 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_CPU);
973}
974EXPORT_SYMBOL(swiotlb_sync_sg_for_cpu);
975
976void
977swiotlb_sync_sg_for_device(struct device *hwdev, struct scatterlist *sg,
978 int nelems, enum dma_data_direction dir)
979{
980 swiotlb_sync_sg(hwdev, sg, nelems, dir, SYNC_FOR_DEVICE);
981}
982EXPORT_SYMBOL(swiotlb_sync_sg_for_device);
983
984int
985swiotlb_dma_mapping_error(struct device *hwdev, dma_addr_t dma_addr)
986{
987 return (dma_addr == phys_to_dma(hwdev, io_tlb_overflow_buffer));
988}
989EXPORT_SYMBOL(swiotlb_dma_mapping_error);
990
991/*
992 * Return whether the given device DMA address mask can be supported
993 * properly. For example, if your device can only drive the low 24-bits
994 * during bus mastering, then you would pass 0x00ffffff as the mask to
995 * this function.
996 */
997int
998swiotlb_dma_supported(struct device *hwdev, u64 mask)
999{
1000 return phys_to_dma(hwdev, io_tlb_end - 1) <= mask;
1001}
1002EXPORT_SYMBOL(swiotlb_dma_supported);