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1/*
2 * GPIO driver for Fintek Super-I/O F71882 and F71889
3 *
4 * Copyright (C) 2010-2013 LaCie
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18#include <linux/gpio.h>
19
20#define DRVNAME "gpio-f7188x"
21
22/*
23 * Super-I/O registers
24 */
25#define SIO_LDSEL 0x07 /* Logical device select */
26#define SIO_DEVID 0x20 /* Device ID (2 bytes) */
27#define SIO_DEVREV 0x22 /* Device revision */
28#define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
29
30#define SIO_LD_GPIO 0x06 /* GPIO logical device */
31#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
32#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
33
34#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
35#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
36#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
37
38enum chips { f71882fg, f71889f };
39
40static const char * const f7188x_names[] = {
41 "f71882fg",
42 "f71889f",
43};
44
45struct f7188x_sio {
46 int addr;
47 enum chips type;
48};
49
50struct f7188x_gpio_bank {
51 struct gpio_chip chip;
52 unsigned int regbase;
53 struct f7188x_gpio_data *data;
54};
55
56struct f7188x_gpio_data {
57 struct f7188x_sio *sio;
58 int nr_bank;
59 struct f7188x_gpio_bank *bank;
60};
61
62/*
63 * Super-I/O functions.
64 */
65
66static inline int superio_inb(int base, int reg)
67{
68 outb(reg, base);
69 return inb(base + 1);
70}
71
72static int superio_inw(int base, int reg)
73{
74 int val;
75
76 outb(reg++, base);
77 val = inb(base + 1) << 8;
78 outb(reg, base);
79 val |= inb(base + 1);
80
81 return val;
82}
83
84static inline void superio_outb(int base, int reg, int val)
85{
86 outb(reg, base);
87 outb(val, base + 1);
88}
89
90static inline int superio_enter(int base)
91{
92 /* Don't step on other drivers' I/O space by accident. */
93 if (!request_muxed_region(base, 2, DRVNAME)) {
94 pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
95 return -EBUSY;
96 }
97
98 /* According to the datasheet the key must be send twice. */
99 outb(SIO_UNLOCK_KEY, base);
100 outb(SIO_UNLOCK_KEY, base);
101
102 return 0;
103}
104
105static inline void superio_select(int base, int ld)
106{
107 outb(SIO_LDSEL, base);
108 outb(ld, base + 1);
109}
110
111static inline void superio_exit(int base)
112{
113 outb(SIO_LOCK_KEY, base);
114 release_region(base, 2);
115}
116
117/*
118 * GPIO chip.
119 */
120
121static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
122static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
123static int f7188x_gpio_direction_out(struct gpio_chip *chip,
124 unsigned offset, int value);
125static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
126
127#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
128 { \
129 .chip = { \
130 .label = DRVNAME, \
131 .owner = THIS_MODULE, \
132 .direction_input = f7188x_gpio_direction_in, \
133 .get = f7188x_gpio_get, \
134 .direction_output = f7188x_gpio_direction_out, \
135 .set = f7188x_gpio_set, \
136 .base = _base, \
137 .ngpio = _ngpio, \
138 .can_sleep = true, \
139 }, \
140 .regbase = _regbase, \
141 }
142
143#define gpio_dir(base) (base + 0)
144#define gpio_data_out(base) (base + 1)
145#define gpio_data_in(base) (base + 2)
146/* Output mode register (0:open drain 1:push-pull). */
147#define gpio_out_mode(base) (base + 3)
148
149static struct f7188x_gpio_bank f71882_gpio_bank[] = {
150 F7188X_GPIO_BANK(0 , 8, 0xF0),
151 F7188X_GPIO_BANK(10, 8, 0xE0),
152 F7188X_GPIO_BANK(20, 8, 0xD0),
153 F7188X_GPIO_BANK(30, 4, 0xC0),
154 F7188X_GPIO_BANK(40, 4, 0xB0),
155};
156
157static struct f7188x_gpio_bank f71889_gpio_bank[] = {
158 F7188X_GPIO_BANK(0 , 7, 0xF0),
159 F7188X_GPIO_BANK(10, 7, 0xE0),
160 F7188X_GPIO_BANK(20, 8, 0xD0),
161 F7188X_GPIO_BANK(30, 8, 0xC0),
162 F7188X_GPIO_BANK(40, 8, 0xB0),
163 F7188X_GPIO_BANK(50, 5, 0xA0),
164 F7188X_GPIO_BANK(60, 8, 0x90),
165 F7188X_GPIO_BANK(70, 8, 0x80),
166};
167
168static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
169{
170 int err;
171 struct f7188x_gpio_bank *bank =
172 container_of(chip, struct f7188x_gpio_bank, chip);
173 struct f7188x_sio *sio = bank->data->sio;
174 u8 dir;
175
176 err = superio_enter(sio->addr);
177 if (err)
178 return err;
179 superio_select(sio->addr, SIO_LD_GPIO);
180
181 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
182 dir &= ~(1 << offset);
183 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
184
185 superio_exit(sio->addr);
186
187 return 0;
188}
189
190static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
191{
192 int err;
193 struct f7188x_gpio_bank *bank =
194 container_of(chip, struct f7188x_gpio_bank, chip);
195 struct f7188x_sio *sio = bank->data->sio;
196 u8 dir, data;
197
198 err = superio_enter(sio->addr);
199 if (err)
200 return err;
201 superio_select(sio->addr, SIO_LD_GPIO);
202
203 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
204 dir = !!(dir & (1 << offset));
205 if (dir)
206 data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
207 else
208 data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
209
210 superio_exit(sio->addr);
211
212 return !!(data & 1 << offset);
213}
214
215static int f7188x_gpio_direction_out(struct gpio_chip *chip,
216 unsigned offset, int value)
217{
218 int err;
219 struct f7188x_gpio_bank *bank =
220 container_of(chip, struct f7188x_gpio_bank, chip);
221 struct f7188x_sio *sio = bank->data->sio;
222 u8 dir, data_out;
223
224 err = superio_enter(sio->addr);
225 if (err)
226 return err;
227 superio_select(sio->addr, SIO_LD_GPIO);
228
229 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
230 if (value)
231 data_out |= (1 << offset);
232 else
233 data_out &= ~(1 << offset);
234 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
235
236 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
237 dir |= (1 << offset);
238 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
239
240 superio_exit(sio->addr);
241
242 return 0;
243}
244
245static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
246{
247 int err;
248 struct f7188x_gpio_bank *bank =
249 container_of(chip, struct f7188x_gpio_bank, chip);
250 struct f7188x_sio *sio = bank->data->sio;
251 u8 data_out;
252
253 err = superio_enter(sio->addr);
254 if (err)
255 return;
256 superio_select(sio->addr, SIO_LD_GPIO);
257
258 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
259 if (value)
260 data_out |= (1 << offset);
261 else
262 data_out &= ~(1 << offset);
263 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
264
265 superio_exit(sio->addr);
266}
267
268/*
269 * Platform device and driver.
270 */
271
272static int f7188x_gpio_probe(struct platform_device *pdev)
273{
274 int err;
275 int i;
276 struct f7188x_sio *sio = pdev->dev.platform_data;
277 struct f7188x_gpio_data *data;
278
279 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
280 if (!data)
281 return -ENOMEM;
282
283 switch (sio->type) {
284 case f71882fg:
285 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
286 data->bank = f71882_gpio_bank;
287 break;
288 case f71889f:
289 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
290 data->bank = f71889_gpio_bank;
291 break;
292 default:
293 return -ENODEV;
294 }
295 data->sio = sio;
296
297 platform_set_drvdata(pdev, data);
298
299 /* For each GPIO bank, register a GPIO chip. */
300 for (i = 0; i < data->nr_bank; i++) {
301 struct f7188x_gpio_bank *bank = &data->bank[i];
302
303 bank->chip.dev = &pdev->dev;
304 bank->data = data;
305
306 err = gpiochip_add(&bank->chip);
307 if (err) {
308 dev_err(&pdev->dev,
309 "Failed to register gpiochip %d: %d\n",
310 i, err);
311 goto err_gpiochip;
312 }
313 }
314
315 return 0;
316
317err_gpiochip:
318 for (i = i - 1; i >= 0; i--) {
319 struct f7188x_gpio_bank *bank = &data->bank[i];
320 int tmp;
321
322 tmp = gpiochip_remove(&bank->chip);
323 if (tmp < 0)
324 dev_err(&pdev->dev,
325 "Failed to remove gpiochip %d: %d\n",
326 i, tmp);
327 }
328
329 return err;
330}
331
332static int f7188x_gpio_remove(struct platform_device *pdev)
333{
334 int err;
335 int i;
336 struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
337
338 for (i = 0; i < data->nr_bank; i++) {
339 struct f7188x_gpio_bank *bank = &data->bank[i];
340
341 err = gpiochip_remove(&bank->chip);
342 if (err) {
343 dev_err(&pdev->dev,
344 "Failed to remove GPIO gpiochip %d: %d\n",
345 i, err);
346 return err;
347 }
348 }
349
350 return 0;
351}
352
353static int __init f7188x_find(int addr, struct f7188x_sio *sio)
354{
355 int err;
356 u16 devid;
357
358 err = superio_enter(addr);
359 if (err)
360 return err;
361
362 err = -ENODEV;
363 devid = superio_inw(addr, SIO_MANID);
364 if (devid != SIO_FINTEK_ID) {
365 pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
366 goto err;
367 }
368
369 devid = superio_inw(addr, SIO_DEVID);
370 switch (devid) {
371 case SIO_F71882_ID:
372 sio->type = f71882fg;
373 break;
374 case SIO_F71889_ID:
375 sio->type = f71889f;
376 break;
377 default:
378 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
379 goto err;
380 }
381 sio->addr = addr;
382 err = 0;
383
384 pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
385 f7188x_names[sio->type],
386 (unsigned int) addr,
387 (int) superio_inb(addr, SIO_DEVREV));
388
389err:
390 superio_exit(addr);
391 return err;
392}
393
394static struct platform_device *f7188x_gpio_pdev;
395
396static int __init
397f7188x_gpio_device_add(const struct f7188x_sio *sio)
398{
399 int err;
400
401 f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
402 if (!f7188x_gpio_pdev)
403 return -ENOMEM;
404
405 err = platform_device_add_data(f7188x_gpio_pdev,
406 sio, sizeof(*sio));
407 if (err) {
408 pr_err(DRVNAME "Platform data allocation failed\n");
409 goto err;
410 }
411
412 err = platform_device_add(f7188x_gpio_pdev);
413 if (err) {
414 pr_err(DRVNAME "Device addition failed\n");
415 goto err;
416 }
417
418 return 0;
419
420err:
421 platform_device_put(f7188x_gpio_pdev);
422
423 return err;
424}
425
426/*
427 * Try to match a supported Fintech device by reading the (hard-wired)
428 * configuration I/O ports. If available, then register both the platform
429 * device and driver to support the GPIOs.
430 */
431
432static struct platform_driver f7188x_gpio_driver = {
433 .driver = {
434 .owner = THIS_MODULE,
435 .name = DRVNAME,
436 },
437 .probe = f7188x_gpio_probe,
438 .remove = f7188x_gpio_remove,
439};
440
441static int __init f7188x_gpio_init(void)
442{
443 int err;
444 struct f7188x_sio sio;
445
446 if (f7188x_find(0x2e, &sio) &&
447 f7188x_find(0x4e, &sio))
448 return -ENODEV;
449
450 err = platform_driver_register(&f7188x_gpio_driver);
451 if (!err) {
452 err = f7188x_gpio_device_add(&sio);
453 if (err)
454 platform_driver_unregister(&f7188x_gpio_driver);
455 }
456
457 return err;
458}
459subsys_initcall(f7188x_gpio_init);
460
461static void __exit f7188x_gpio_exit(void)
462{
463 platform_device_unregister(f7188x_gpio_pdev);
464 platform_driver_unregister(&f7188x_gpio_driver);
465}
466module_exit(f7188x_gpio_exit);
467
468MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71882FG and F71889F");
469MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
470MODULE_LICENSE("GPL");
1/*
2 * GPIO driver for Fintek Super-I/O F71869, F71869A, F71882, F71889 and F81866
3 *
4 * Copyright (C) 2010-2013 LaCie
5 *
6 * Author: Simon Guinot <simon.guinot@sequanux.org>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 */
13
14#include <linux/module.h>
15#include <linux/init.h>
16#include <linux/platform_device.h>
17#include <linux/io.h>
18#include <linux/gpio/driver.h>
19#include <linux/bitops.h>
20
21#define DRVNAME "gpio-f7188x"
22
23/*
24 * Super-I/O registers
25 */
26#define SIO_LDSEL 0x07 /* Logical device select */
27#define SIO_DEVID 0x20 /* Device ID (2 bytes) */
28#define SIO_DEVREV 0x22 /* Device revision */
29#define SIO_MANID 0x23 /* Fintek ID (2 bytes) */
30
31#define SIO_LD_GPIO 0x06 /* GPIO logical device */
32#define SIO_UNLOCK_KEY 0x87 /* Key to enable Super-I/O */
33#define SIO_LOCK_KEY 0xAA /* Key to disable Super-I/O */
34
35#define SIO_FINTEK_ID 0x1934 /* Manufacturer ID */
36#define SIO_F71869_ID 0x0814 /* F71869 chipset ID */
37#define SIO_F71869A_ID 0x1007 /* F71869A chipset ID */
38#define SIO_F71882_ID 0x0541 /* F71882 chipset ID */
39#define SIO_F71889_ID 0x0909 /* F71889 chipset ID */
40#define SIO_F71889A_ID 0x1005 /* F71889A chipset ID */
41#define SIO_F81866_ID 0x1010 /* F81866 chipset ID */
42
43enum chips { f71869, f71869a, f71882fg, f71889a, f71889f, f81866 };
44
45static const char * const f7188x_names[] = {
46 "f71869",
47 "f71869a",
48 "f71882fg",
49 "f71889a",
50 "f71889f",
51 "f81866",
52};
53
54struct f7188x_sio {
55 int addr;
56 enum chips type;
57};
58
59struct f7188x_gpio_bank {
60 struct gpio_chip chip;
61 unsigned int regbase;
62 struct f7188x_gpio_data *data;
63};
64
65struct f7188x_gpio_data {
66 struct f7188x_sio *sio;
67 int nr_bank;
68 struct f7188x_gpio_bank *bank;
69};
70
71/*
72 * Super-I/O functions.
73 */
74
75static inline int superio_inb(int base, int reg)
76{
77 outb(reg, base);
78 return inb(base + 1);
79}
80
81static int superio_inw(int base, int reg)
82{
83 int val;
84
85 outb(reg++, base);
86 val = inb(base + 1) << 8;
87 outb(reg, base);
88 val |= inb(base + 1);
89
90 return val;
91}
92
93static inline void superio_outb(int base, int reg, int val)
94{
95 outb(reg, base);
96 outb(val, base + 1);
97}
98
99static inline int superio_enter(int base)
100{
101 /* Don't step on other drivers' I/O space by accident. */
102 if (!request_muxed_region(base, 2, DRVNAME)) {
103 pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
104 return -EBUSY;
105 }
106
107 /* According to the datasheet the key must be send twice. */
108 outb(SIO_UNLOCK_KEY, base);
109 outb(SIO_UNLOCK_KEY, base);
110
111 return 0;
112}
113
114static inline void superio_select(int base, int ld)
115{
116 outb(SIO_LDSEL, base);
117 outb(ld, base + 1);
118}
119
120static inline void superio_exit(int base)
121{
122 outb(SIO_LOCK_KEY, base);
123 release_region(base, 2);
124}
125
126/*
127 * GPIO chip.
128 */
129
130static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset);
131static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
132static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
133static int f7188x_gpio_direction_out(struct gpio_chip *chip,
134 unsigned offset, int value);
135static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
136static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
137 unsigned long config);
138
139#define F7188X_GPIO_BANK(_base, _ngpio, _regbase) \
140 { \
141 .chip = { \
142 .label = DRVNAME, \
143 .owner = THIS_MODULE, \
144 .get_direction = f7188x_gpio_get_direction, \
145 .direction_input = f7188x_gpio_direction_in, \
146 .get = f7188x_gpio_get, \
147 .direction_output = f7188x_gpio_direction_out, \
148 .set = f7188x_gpio_set, \
149 .set_config = f7188x_gpio_set_config, \
150 .base = _base, \
151 .ngpio = _ngpio, \
152 .can_sleep = true, \
153 }, \
154 .regbase = _regbase, \
155 }
156
157#define gpio_dir(base) (base + 0)
158#define gpio_data_out(base) (base + 1)
159#define gpio_data_in(base) (base + 2)
160/* Output mode register (0:open drain 1:push-pull). */
161#define gpio_out_mode(base) (base + 3)
162
163static struct f7188x_gpio_bank f71869_gpio_bank[] = {
164 F7188X_GPIO_BANK(0, 6, 0xF0),
165 F7188X_GPIO_BANK(10, 8, 0xE0),
166 F7188X_GPIO_BANK(20, 8, 0xD0),
167 F7188X_GPIO_BANK(30, 8, 0xC0),
168 F7188X_GPIO_BANK(40, 8, 0xB0),
169 F7188X_GPIO_BANK(50, 5, 0xA0),
170 F7188X_GPIO_BANK(60, 6, 0x90),
171};
172
173static struct f7188x_gpio_bank f71869a_gpio_bank[] = {
174 F7188X_GPIO_BANK(0, 6, 0xF0),
175 F7188X_GPIO_BANK(10, 8, 0xE0),
176 F7188X_GPIO_BANK(20, 8, 0xD0),
177 F7188X_GPIO_BANK(30, 8, 0xC0),
178 F7188X_GPIO_BANK(40, 8, 0xB0),
179 F7188X_GPIO_BANK(50, 5, 0xA0),
180 F7188X_GPIO_BANK(60, 8, 0x90),
181 F7188X_GPIO_BANK(70, 8, 0x80),
182};
183
184static struct f7188x_gpio_bank f71882_gpio_bank[] = {
185 F7188X_GPIO_BANK(0, 8, 0xF0),
186 F7188X_GPIO_BANK(10, 8, 0xE0),
187 F7188X_GPIO_BANK(20, 8, 0xD0),
188 F7188X_GPIO_BANK(30, 4, 0xC0),
189 F7188X_GPIO_BANK(40, 4, 0xB0),
190};
191
192static struct f7188x_gpio_bank f71889a_gpio_bank[] = {
193 F7188X_GPIO_BANK(0, 7, 0xF0),
194 F7188X_GPIO_BANK(10, 7, 0xE0),
195 F7188X_GPIO_BANK(20, 8, 0xD0),
196 F7188X_GPIO_BANK(30, 8, 0xC0),
197 F7188X_GPIO_BANK(40, 8, 0xB0),
198 F7188X_GPIO_BANK(50, 5, 0xA0),
199 F7188X_GPIO_BANK(60, 8, 0x90),
200 F7188X_GPIO_BANK(70, 8, 0x80),
201};
202
203static struct f7188x_gpio_bank f71889_gpio_bank[] = {
204 F7188X_GPIO_BANK(0, 7, 0xF0),
205 F7188X_GPIO_BANK(10, 7, 0xE0),
206 F7188X_GPIO_BANK(20, 8, 0xD0),
207 F7188X_GPIO_BANK(30, 8, 0xC0),
208 F7188X_GPIO_BANK(40, 8, 0xB0),
209 F7188X_GPIO_BANK(50, 5, 0xA0),
210 F7188X_GPIO_BANK(60, 8, 0x90),
211 F7188X_GPIO_BANK(70, 8, 0x80),
212};
213
214static struct f7188x_gpio_bank f81866_gpio_bank[] = {
215 F7188X_GPIO_BANK(0, 8, 0xF0),
216 F7188X_GPIO_BANK(10, 8, 0xE0),
217 F7188X_GPIO_BANK(20, 8, 0xD0),
218 F7188X_GPIO_BANK(30, 8, 0xC0),
219 F7188X_GPIO_BANK(40, 8, 0xB0),
220 F7188X_GPIO_BANK(50, 8, 0xA0),
221 F7188X_GPIO_BANK(60, 8, 0x90),
222 F7188X_GPIO_BANK(70, 8, 0x80),
223 F7188X_GPIO_BANK(80, 8, 0x88),
224};
225
226static int f7188x_gpio_get_direction(struct gpio_chip *chip, unsigned offset)
227{
228 int err;
229 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
230 struct f7188x_sio *sio = bank->data->sio;
231 u8 dir;
232
233 err = superio_enter(sio->addr);
234 if (err)
235 return err;
236 superio_select(sio->addr, SIO_LD_GPIO);
237
238 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
239
240 superio_exit(sio->addr);
241
242 return !(dir & 1 << offset);
243}
244
245static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
246{
247 int err;
248 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
249 struct f7188x_sio *sio = bank->data->sio;
250 u8 dir;
251
252 err = superio_enter(sio->addr);
253 if (err)
254 return err;
255 superio_select(sio->addr, SIO_LD_GPIO);
256
257 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
258 dir &= ~BIT(offset);
259 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
260
261 superio_exit(sio->addr);
262
263 return 0;
264}
265
266static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
267{
268 int err;
269 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
270 struct f7188x_sio *sio = bank->data->sio;
271 u8 dir, data;
272
273 err = superio_enter(sio->addr);
274 if (err)
275 return err;
276 superio_select(sio->addr, SIO_LD_GPIO);
277
278 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
279 dir = !!(dir & BIT(offset));
280 if (dir)
281 data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
282 else
283 data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
284
285 superio_exit(sio->addr);
286
287 return !!(data & BIT(offset));
288}
289
290static int f7188x_gpio_direction_out(struct gpio_chip *chip,
291 unsigned offset, int value)
292{
293 int err;
294 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
295 struct f7188x_sio *sio = bank->data->sio;
296 u8 dir, data_out;
297
298 err = superio_enter(sio->addr);
299 if (err)
300 return err;
301 superio_select(sio->addr, SIO_LD_GPIO);
302
303 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
304 if (value)
305 data_out |= BIT(offset);
306 else
307 data_out &= ~BIT(offset);
308 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
309
310 dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
311 dir |= BIT(offset);
312 superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
313
314 superio_exit(sio->addr);
315
316 return 0;
317}
318
319static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
320{
321 int err;
322 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
323 struct f7188x_sio *sio = bank->data->sio;
324 u8 data_out;
325
326 err = superio_enter(sio->addr);
327 if (err)
328 return;
329 superio_select(sio->addr, SIO_LD_GPIO);
330
331 data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
332 if (value)
333 data_out |= BIT(offset);
334 else
335 data_out &= ~BIT(offset);
336 superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
337
338 superio_exit(sio->addr);
339}
340
341static int f7188x_gpio_set_config(struct gpio_chip *chip, unsigned offset,
342 unsigned long config)
343{
344 int err;
345 enum pin_config_param param = pinconf_to_config_param(config);
346 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip);
347 struct f7188x_sio *sio = bank->data->sio;
348 u8 data;
349
350 if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN &&
351 param != PIN_CONFIG_DRIVE_PUSH_PULL)
352 return -ENOTSUPP;
353
354 err = superio_enter(sio->addr);
355 if (err)
356 return err;
357 superio_select(sio->addr, SIO_LD_GPIO);
358
359 data = superio_inb(sio->addr, gpio_out_mode(bank->regbase));
360 if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
361 data &= ~BIT(offset);
362 else
363 data |= BIT(offset);
364 superio_outb(sio->addr, gpio_out_mode(bank->regbase), data);
365
366 superio_exit(sio->addr);
367 return 0;
368}
369
370/*
371 * Platform device and driver.
372 */
373
374static int f7188x_gpio_probe(struct platform_device *pdev)
375{
376 int err;
377 int i;
378 struct f7188x_sio *sio = dev_get_platdata(&pdev->dev);
379 struct f7188x_gpio_data *data;
380
381 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
382 if (!data)
383 return -ENOMEM;
384
385 switch (sio->type) {
386 case f71869:
387 data->nr_bank = ARRAY_SIZE(f71869_gpio_bank);
388 data->bank = f71869_gpio_bank;
389 break;
390 case f71869a:
391 data->nr_bank = ARRAY_SIZE(f71869a_gpio_bank);
392 data->bank = f71869a_gpio_bank;
393 break;
394 case f71882fg:
395 data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
396 data->bank = f71882_gpio_bank;
397 break;
398 case f71889a:
399 data->nr_bank = ARRAY_SIZE(f71889a_gpio_bank);
400 data->bank = f71889a_gpio_bank;
401 break;
402 case f71889f:
403 data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
404 data->bank = f71889_gpio_bank;
405 break;
406 case f81866:
407 data->nr_bank = ARRAY_SIZE(f81866_gpio_bank);
408 data->bank = f81866_gpio_bank;
409 break;
410 default:
411 return -ENODEV;
412 }
413 data->sio = sio;
414
415 platform_set_drvdata(pdev, data);
416
417 /* For each GPIO bank, register a GPIO chip. */
418 for (i = 0; i < data->nr_bank; i++) {
419 struct f7188x_gpio_bank *bank = &data->bank[i];
420
421 bank->chip.parent = &pdev->dev;
422 bank->data = data;
423
424 err = devm_gpiochip_add_data(&pdev->dev, &bank->chip, bank);
425 if (err) {
426 dev_err(&pdev->dev,
427 "Failed to register gpiochip %d: %d\n",
428 i, err);
429 return err;
430 }
431 }
432
433 return 0;
434}
435
436static int __init f7188x_find(int addr, struct f7188x_sio *sio)
437{
438 int err;
439 u16 devid;
440
441 err = superio_enter(addr);
442 if (err)
443 return err;
444
445 err = -ENODEV;
446 devid = superio_inw(addr, SIO_MANID);
447 if (devid != SIO_FINTEK_ID) {
448 pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
449 goto err;
450 }
451
452 devid = superio_inw(addr, SIO_DEVID);
453 switch (devid) {
454 case SIO_F71869_ID:
455 sio->type = f71869;
456 break;
457 case SIO_F71869A_ID:
458 sio->type = f71869a;
459 break;
460 case SIO_F71882_ID:
461 sio->type = f71882fg;
462 break;
463 case SIO_F71889A_ID:
464 sio->type = f71889a;
465 break;
466 case SIO_F71889_ID:
467 sio->type = f71889f;
468 break;
469 case SIO_F81866_ID:
470 sio->type = f81866;
471 break;
472 default:
473 pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
474 goto err;
475 }
476 sio->addr = addr;
477 err = 0;
478
479 pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
480 f7188x_names[sio->type],
481 (unsigned int) addr,
482 (int) superio_inb(addr, SIO_DEVREV));
483
484err:
485 superio_exit(addr);
486 return err;
487}
488
489static struct platform_device *f7188x_gpio_pdev;
490
491static int __init
492f7188x_gpio_device_add(const struct f7188x_sio *sio)
493{
494 int err;
495
496 f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
497 if (!f7188x_gpio_pdev)
498 return -ENOMEM;
499
500 err = platform_device_add_data(f7188x_gpio_pdev,
501 sio, sizeof(*sio));
502 if (err) {
503 pr_err(DRVNAME "Platform data allocation failed\n");
504 goto err;
505 }
506
507 err = platform_device_add(f7188x_gpio_pdev);
508 if (err) {
509 pr_err(DRVNAME "Device addition failed\n");
510 goto err;
511 }
512
513 return 0;
514
515err:
516 platform_device_put(f7188x_gpio_pdev);
517
518 return err;
519}
520
521/*
522 * Try to match a supported Fintek device by reading the (hard-wired)
523 * configuration I/O ports. If available, then register both the platform
524 * device and driver to support the GPIOs.
525 */
526
527static struct platform_driver f7188x_gpio_driver = {
528 .driver = {
529 .name = DRVNAME,
530 },
531 .probe = f7188x_gpio_probe,
532};
533
534static int __init f7188x_gpio_init(void)
535{
536 int err;
537 struct f7188x_sio sio;
538
539 if (f7188x_find(0x2e, &sio) &&
540 f7188x_find(0x4e, &sio))
541 return -ENODEV;
542
543 err = platform_driver_register(&f7188x_gpio_driver);
544 if (!err) {
545 err = f7188x_gpio_device_add(&sio);
546 if (err)
547 platform_driver_unregister(&f7188x_gpio_driver);
548 }
549
550 return err;
551}
552subsys_initcall(f7188x_gpio_init);
553
554static void __exit f7188x_gpio_exit(void)
555{
556 platform_device_unregister(f7188x_gpio_pdev);
557 platform_driver_unregister(&f7188x_gpio_driver);
558}
559module_exit(f7188x_gpio_exit);
560
561MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71869, F71869A, F71882FG, F71889A, F71889F and F81866");
562MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
563MODULE_LICENSE("GPL");