1/*
  2 * GPIO driver for Fintek Super-I/O F71882 and F71889
  3 *
  4 * Copyright (C) 2010-2013 LaCie
  5 *
  6 * Author: Simon Guinot <simon.guinot@sequanux.org>
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License as published by
 10 * the Free Software Foundation; either version 2 of the License, or
 11 * (at your option) any later version.
 12 */
 13
 14#include <linux/module.h>
 15#include <linux/init.h>
 16#include <linux/platform_device.h>
 17#include <linux/io.h>
 18#include <linux/gpio.h>
 19
 20#define DRVNAME "gpio-f7188x"
 21
 22/*
 23 * Super-I/O registers
 24 */
 25#define SIO_LDSEL		0x07	/* Logical device select */
 26#define SIO_DEVID		0x20	/* Device ID (2 bytes) */
 27#define SIO_DEVREV		0x22	/* Device revision */
 28#define SIO_MANID		0x23	/* Fintek ID (2 bytes) */
 29
 30#define SIO_LD_GPIO		0x06	/* GPIO logical device */
 31#define SIO_UNLOCK_KEY		0x87	/* Key to enable Super-I/O */
 32#define SIO_LOCK_KEY		0xAA	/* Key to disable Super-I/O */
 33
 34#define SIO_FINTEK_ID		0x1934	/* Manufacturer ID */
 35#define SIO_F71882_ID		0x0541	/* F71882 chipset ID */
 36#define SIO_F71889_ID		0x0909	/* F71889 chipset ID */
 37
 38enum chips { f71882fg, f71889f };
 39
 40static const char * const f7188x_names[] = {
 41	"f71882fg",
 42	"f71889f",
 43};
 44
 45struct f7188x_sio {
 46	int addr;
 47	enum chips type;
 48};
 49
 50struct f7188x_gpio_bank {
 51	struct gpio_chip chip;
 52	unsigned int regbase;
 53	struct f7188x_gpio_data *data;
 54};
 55
 56struct f7188x_gpio_data {
 57	struct f7188x_sio *sio;
 58	int nr_bank;
 59	struct f7188x_gpio_bank *bank;
 60};
 61
 62/*
 63 * Super-I/O functions.
 64 */
 65
 66static inline int superio_inb(int base, int reg)
 67{
 68	outb(reg, base);
 69	return inb(base + 1);
 70}
 71
 72static int superio_inw(int base, int reg)
 73{
 74	int val;
 75
 76	outb(reg++, base);
 77	val = inb(base + 1) << 8;
 78	outb(reg, base);
 79	val |= inb(base + 1);
 80
 81	return val;
 82}
 83
 84static inline void superio_outb(int base, int reg, int val)
 85{
 86	outb(reg, base);
 87	outb(val, base + 1);
 88}
 89
 90static inline int superio_enter(int base)
 91{
 92	/* Don't step on other drivers' I/O space by accident. */
 93	if (!request_muxed_region(base, 2, DRVNAME)) {
 94		pr_err(DRVNAME "I/O address 0x%04x already in use\n", base);
 95		return -EBUSY;
 96	}
 97
 98	/* According to the datasheet the key must be send twice. */
 99	outb(SIO_UNLOCK_KEY, base);
100	outb(SIO_UNLOCK_KEY, base);
101
102	return 0;
103}
104
105static inline void superio_select(int base, int ld)
106{
107	outb(SIO_LDSEL, base);
108	outb(ld, base + 1);
109}
110
111static inline void superio_exit(int base)
112{
113	outb(SIO_LOCK_KEY, base);
114	release_region(base, 2);
115}
116
117/*
118 * GPIO chip.
119 */
120
121static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset);
122static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset);
123static int f7188x_gpio_direction_out(struct gpio_chip *chip,
124				     unsigned offset, int value);
125static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value);
126
127#define F7188X_GPIO_BANK(_base, _ngpio, _regbase)			\
128	{								\
129		.chip = {						\
130			.label            = DRVNAME,			\
131			.owner            = THIS_MODULE,		\
132			.direction_input  = f7188x_gpio_direction_in,	\
133			.get              = f7188x_gpio_get,		\
134			.direction_output = f7188x_gpio_direction_out,	\
135			.set              = f7188x_gpio_set,		\
136			.base             = _base,			\
137			.ngpio            = _ngpio,			\
138			.can_sleep        = true,			\
139		},							\
140		.regbase = _regbase,					\
141	}
142
143#define gpio_dir(base) (base + 0)
144#define gpio_data_out(base) (base + 1)
145#define gpio_data_in(base) (base + 2)
146/* Output mode register (0:open drain 1:push-pull). */
147#define gpio_out_mode(base) (base + 3)
148
149static struct f7188x_gpio_bank f71882_gpio_bank[] = {
150	F7188X_GPIO_BANK(0 , 8, 0xF0),
151	F7188X_GPIO_BANK(10, 8, 0xE0),
152	F7188X_GPIO_BANK(20, 8, 0xD0),
153	F7188X_GPIO_BANK(30, 4, 0xC0),
154	F7188X_GPIO_BANK(40, 4, 0xB0),
155};
156
157static struct f7188x_gpio_bank f71889_gpio_bank[] = {
158	F7188X_GPIO_BANK(0 , 7, 0xF0),
159	F7188X_GPIO_BANK(10, 7, 0xE0),
160	F7188X_GPIO_BANK(20, 8, 0xD0),
161	F7188X_GPIO_BANK(30, 8, 0xC0),
162	F7188X_GPIO_BANK(40, 8, 0xB0),
163	F7188X_GPIO_BANK(50, 5, 0xA0),
164	F7188X_GPIO_BANK(60, 8, 0x90),
165	F7188X_GPIO_BANK(70, 8, 0x80),
166};
167
168static int f7188x_gpio_direction_in(struct gpio_chip *chip, unsigned offset)
169{
170	int err;
171	struct f7188x_gpio_bank *bank =
172		container_of(chip, struct f7188x_gpio_bank, chip);
173	struct f7188x_sio *sio = bank->data->sio;
174	u8 dir;
175
176	err = superio_enter(sio->addr);
177	if (err)
178		return err;
179	superio_select(sio->addr, SIO_LD_GPIO);
180
181	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
182	dir &= ~(1 << offset);
183	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
184
185	superio_exit(sio->addr);
186
187	return 0;
188}
189
190static int f7188x_gpio_get(struct gpio_chip *chip, unsigned offset)
191{
192	int err;
193	struct f7188x_gpio_bank *bank =
194		container_of(chip, struct f7188x_gpio_bank, chip);
195	struct f7188x_sio *sio = bank->data->sio;
196	u8 dir, data;
197
198	err = superio_enter(sio->addr);
199	if (err)
200		return err;
201	superio_select(sio->addr, SIO_LD_GPIO);
202
203	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
204	dir = !!(dir & (1 << offset));
205	if (dir)
206		data = superio_inb(sio->addr, gpio_data_out(bank->regbase));
207	else
208		data = superio_inb(sio->addr, gpio_data_in(bank->regbase));
209
210	superio_exit(sio->addr);
211
212	return !!(data & 1 << offset);
213}
214
215static int f7188x_gpio_direction_out(struct gpio_chip *chip,
216				     unsigned offset, int value)
217{
218	int err;
219	struct f7188x_gpio_bank *bank =
220		container_of(chip, struct f7188x_gpio_bank, chip);
221	struct f7188x_sio *sio = bank->data->sio;
222	u8 dir, data_out;
223
224	err = superio_enter(sio->addr);
225	if (err)
226		return err;
227	superio_select(sio->addr, SIO_LD_GPIO);
228
229	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
230	if (value)
231		data_out |= (1 << offset);
232	else
233		data_out &= ~(1 << offset);
234	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
235
236	dir = superio_inb(sio->addr, gpio_dir(bank->regbase));
237	dir |= (1 << offset);
238	superio_outb(sio->addr, gpio_dir(bank->regbase), dir);
239
240	superio_exit(sio->addr);
241
242	return 0;
243}
244
245static void f7188x_gpio_set(struct gpio_chip *chip, unsigned offset, int value)
246{
247	int err;
248	struct f7188x_gpio_bank *bank =
249		container_of(chip, struct f7188x_gpio_bank, chip);
250	struct f7188x_sio *sio = bank->data->sio;
251	u8 data_out;
252
253	err = superio_enter(sio->addr);
254	if (err)
255		return;
256	superio_select(sio->addr, SIO_LD_GPIO);
257
258	data_out = superio_inb(sio->addr, gpio_data_out(bank->regbase));
259	if (value)
260		data_out |= (1 << offset);
261	else
262		data_out &= ~(1 << offset);
263	superio_outb(sio->addr, gpio_data_out(bank->regbase), data_out);
264
265	superio_exit(sio->addr);
266}
267
268/*
269 * Platform device and driver.
270 */
271
272static int f7188x_gpio_probe(struct platform_device *pdev)
273{
274	int err;
275	int i;
276	struct f7188x_sio *sio = pdev->dev.platform_data;
277	struct f7188x_gpio_data *data;
278
279	data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
280	if (!data)
281		return -ENOMEM;
282
283	switch (sio->type) {
284	case f71882fg:
285		data->nr_bank = ARRAY_SIZE(f71882_gpio_bank);
286		data->bank = f71882_gpio_bank;
287		break;
288	case f71889f:
289		data->nr_bank = ARRAY_SIZE(f71889_gpio_bank);
290		data->bank = f71889_gpio_bank;
291		break;
292	default:
293		return -ENODEV;
294	}
295	data->sio = sio;
296
297	platform_set_drvdata(pdev, data);
298
299	/* For each GPIO bank, register a GPIO chip. */
300	for (i = 0; i < data->nr_bank; i++) {
301		struct f7188x_gpio_bank *bank = &data->bank[i];
302
303		bank->chip.dev = &pdev->dev;
304		bank->data = data;
305
306		err = gpiochip_add(&bank->chip);
307		if (err) {
308			dev_err(&pdev->dev,
309				"Failed to register gpiochip %d: %d\n",
310				i, err);
311			goto err_gpiochip;
312		}
313	}
314
315	return 0;
316
317err_gpiochip:
318	for (i = i - 1; i >= 0; i--) {
319		struct f7188x_gpio_bank *bank = &data->bank[i];
320		int tmp;
321
322		tmp = gpiochip_remove(&bank->chip);
323		if (tmp < 0)
324			dev_err(&pdev->dev,
325				"Failed to remove gpiochip %d: %d\n",
326				i, tmp);
327	}
328
329	return err;
330}
331
332static int f7188x_gpio_remove(struct platform_device *pdev)
333{
334	int err;
335	int i;
336	struct f7188x_gpio_data *data = platform_get_drvdata(pdev);
337
338	for (i = 0; i < data->nr_bank; i++) {
339		struct f7188x_gpio_bank *bank = &data->bank[i];
340
341		err = gpiochip_remove(&bank->chip);
342		if (err) {
343			dev_err(&pdev->dev,
344				"Failed to remove GPIO gpiochip %d: %d\n",
345				i, err);
346			return err;
347		}
348	}
349
350	return 0;
351}
352
353static int __init f7188x_find(int addr, struct f7188x_sio *sio)
354{
355	int err;
356	u16 devid;
357
358	err = superio_enter(addr);
359	if (err)
360		return err;
361
362	err = -ENODEV;
363	devid = superio_inw(addr, SIO_MANID);
364	if (devid != SIO_FINTEK_ID) {
365		pr_debug(DRVNAME ": Not a Fintek device at 0x%08x\n", addr);
366		goto err;
367	}
368
369	devid = superio_inw(addr, SIO_DEVID);
370	switch (devid) {
371	case SIO_F71882_ID:
372		sio->type = f71882fg;
373		break;
374	case SIO_F71889_ID:
375		sio->type = f71889f;
376		break;
377	default:
378		pr_info(DRVNAME ": Unsupported Fintek device 0x%04x\n", devid);
379		goto err;
380	}
381	sio->addr = addr;
382	err = 0;
383
384	pr_info(DRVNAME ": Found %s at %#x, revision %d\n",
385		f7188x_names[sio->type],
386		(unsigned int) addr,
387		(int) superio_inb(addr, SIO_DEVREV));
388
389err:
390	superio_exit(addr);
391	return err;
392}
393
394static struct platform_device *f7188x_gpio_pdev;
395
396static int __init
397f7188x_gpio_device_add(const struct f7188x_sio *sio)
398{
399	int err;
400
401	f7188x_gpio_pdev = platform_device_alloc(DRVNAME, -1);
402	if (!f7188x_gpio_pdev)
403		return -ENOMEM;
404
405	err = platform_device_add_data(f7188x_gpio_pdev,
406				       sio, sizeof(*sio));
407	if (err) {
408		pr_err(DRVNAME "Platform data allocation failed\n");
409		goto err;
410	}
411
412	err = platform_device_add(f7188x_gpio_pdev);
413	if (err) {
414		pr_err(DRVNAME "Device addition failed\n");
415		goto err;
416	}
417
418	return 0;
419
420err:
421	platform_device_put(f7188x_gpio_pdev);
422
423	return err;
424}
425
426/*
427 * Try to match a supported Fintech device by reading the (hard-wired)
428 * configuration I/O ports. If available, then register both the platform
429 * device and driver to support the GPIOs.
430 */
431
432static struct platform_driver f7188x_gpio_driver = {
433	.driver = {
434		.owner	= THIS_MODULE,
435		.name	= DRVNAME,
436	},
437	.probe		= f7188x_gpio_probe,
438	.remove		= f7188x_gpio_remove,
439};
440
441static int __init f7188x_gpio_init(void)
442{
443	int err;
444	struct f7188x_sio sio;
445
446	if (f7188x_find(0x2e, &sio) &&
447	    f7188x_find(0x4e, &sio))
448		return -ENODEV;
449
450	err = platform_driver_register(&f7188x_gpio_driver);
451	if (!err) {
452		err = f7188x_gpio_device_add(&sio);
453		if (err)
454			platform_driver_unregister(&f7188x_gpio_driver);
455	}
456
457	return err;
458}
459subsys_initcall(f7188x_gpio_init);
460
461static void __exit f7188x_gpio_exit(void)
462{
463	platform_device_unregister(f7188x_gpio_pdev);
464	platform_driver_unregister(&f7188x_gpio_driver);
465}
466module_exit(f7188x_gpio_exit);
467
468MODULE_DESCRIPTION("GPIO driver for Super-I/O chips F71882FG and F71889F");
469MODULE_AUTHOR("Simon Guinot <simon.guinot@sequanux.org>");
470MODULE_LICENSE("GPL");