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1// SPDX-License-Identifier: GPL-2.0+
2/* Copyright (C) 2014-2018 Broadcom */
3
4#include <linux/device.h>
5#include <linux/dma-mapping.h>
6#include <linux/io.h>
7#include <linux/module.h>
8#include <linux/platform_device.h>
9#include <linux/reset.h>
10#include <linux/sched/signal.h>
11#include <linux/uaccess.h>
12
13#include <drm/drm_managed.h>
14#include <drm/drm_syncobj.h>
15#include <uapi/drm/v3d_drm.h>
16
17#include "v3d_drv.h"
18#include "v3d_regs.h"
19#include "v3d_trace.h"
20
21static void
22v3d_init_core(struct v3d_dev *v3d, int core)
23{
24 /* Set OVRTMUOUT, which means that the texture sampler uniform
25 * configuration's tmu output type field is used, instead of
26 * using the hardware default behavior based on the texture
27 * type. If you want the default behavior, you can still put
28 * "2" in the indirect texture state's output_type field.
29 */
30 if (v3d->ver < 40)
31 V3D_CORE_WRITE(core, V3D_CTL_MISCCFG, V3D_MISCCFG_OVRTMUOUT);
32
33 /* Whenever we flush the L2T cache, we always want to flush
34 * the whole thing.
35 */
36 V3D_CORE_WRITE(core, V3D_CTL_L2TFLSTA, 0);
37 V3D_CORE_WRITE(core, V3D_CTL_L2TFLEND, ~0);
38}
39
40/* Sets invariant state for the HW. */
41static void
42v3d_init_hw_state(struct v3d_dev *v3d)
43{
44 v3d_init_core(v3d, 0);
45}
46
47static void
48v3d_idle_axi(struct v3d_dev *v3d, int core)
49{
50 V3D_CORE_WRITE(core, V3D_GMP_CFG, V3D_GMP_CFG_STOP_REQ);
51
52 if (wait_for((V3D_CORE_READ(core, V3D_GMP_STATUS) &
53 (V3D_GMP_STATUS_RD_COUNT_MASK |
54 V3D_GMP_STATUS_WR_COUNT_MASK |
55 V3D_GMP_STATUS_CFG_BUSY)) == 0, 100)) {
56 DRM_ERROR("Failed to wait for safe GMP shutdown\n");
57 }
58}
59
60static void
61v3d_idle_gca(struct v3d_dev *v3d)
62{
63 if (v3d->ver >= 41)
64 return;
65
66 V3D_GCA_WRITE(V3D_GCA_SAFE_SHUTDOWN, V3D_GCA_SAFE_SHUTDOWN_EN);
67
68 if (wait_for((V3D_GCA_READ(V3D_GCA_SAFE_SHUTDOWN_ACK) &
69 V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED) ==
70 V3D_GCA_SAFE_SHUTDOWN_ACK_ACKED, 100)) {
71 DRM_ERROR("Failed to wait for safe GCA shutdown\n");
72 }
73}
74
75static void
76v3d_reset_by_bridge(struct v3d_dev *v3d)
77{
78 int version = V3D_BRIDGE_READ(V3D_TOP_GR_BRIDGE_REVISION);
79
80 if (V3D_GET_FIELD(version, V3D_TOP_GR_BRIDGE_MAJOR) == 2) {
81 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0,
82 V3D_TOP_GR_BRIDGE_SW_INIT_0_V3D_CLK_108_SW_INIT);
83 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_0, 0);
84
85 /* GFXH-1383: The SW_INIT may cause a stray write to address 0
86 * of the unit, so reset it to its power-on value here.
87 */
88 V3D_WRITE(V3D_HUB_AXICFG, V3D_HUB_AXICFG_MAX_LEN_MASK);
89 } else {
90 WARN_ON_ONCE(V3D_GET_FIELD(version,
91 V3D_TOP_GR_BRIDGE_MAJOR) != 7);
92 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1,
93 V3D_TOP_GR_BRIDGE_SW_INIT_1_V3D_CLK_108_SW_INIT);
94 V3D_BRIDGE_WRITE(V3D_TOP_GR_BRIDGE_SW_INIT_1, 0);
95 }
96}
97
98static void
99v3d_reset_v3d(struct v3d_dev *v3d)
100{
101 if (v3d->reset)
102 reset_control_reset(v3d->reset);
103 else
104 v3d_reset_by_bridge(v3d);
105
106 v3d_init_hw_state(v3d);
107}
108
109void
110v3d_reset(struct v3d_dev *v3d)
111{
112 struct drm_device *dev = &v3d->drm;
113
114 DRM_DEV_ERROR(dev->dev, "Resetting GPU for hang.\n");
115 DRM_DEV_ERROR(dev->dev, "V3D_ERR_STAT: 0x%08x\n",
116 V3D_CORE_READ(0, V3D_ERR_STAT));
117 trace_v3d_reset_begin(dev);
118
119 /* XXX: only needed for safe powerdown, not reset. */
120 if (false)
121 v3d_idle_axi(v3d, 0);
122
123 v3d_idle_gca(v3d);
124 v3d_reset_v3d(v3d);
125
126 v3d_mmu_set_page_table(v3d);
127 v3d_irq_reset(v3d);
128
129 v3d_perfmon_stop(v3d, v3d->active_perfmon, false);
130
131 trace_v3d_reset_end(dev);
132}
133
134static void
135v3d_flush_l3(struct v3d_dev *v3d)
136{
137 if (v3d->ver < 41) {
138 u32 gca_ctrl = V3D_GCA_READ(V3D_GCA_CACHE_CTRL);
139
140 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
141 gca_ctrl | V3D_GCA_CACHE_CTRL_FLUSH);
142
143 if (v3d->ver < 33) {
144 V3D_GCA_WRITE(V3D_GCA_CACHE_CTRL,
145 gca_ctrl & ~V3D_GCA_CACHE_CTRL_FLUSH);
146 }
147 }
148}
149
150/* Invalidates the (read-only) L2C cache. This was the L2 cache for
151 * uniforms and instructions on V3D 3.2.
152 */
153static void
154v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
155{
156 if (v3d->ver > 32)
157 return;
158
159 V3D_CORE_WRITE(core, V3D_CTL_L2CACTL,
160 V3D_L2CACTL_L2CCLR |
161 V3D_L2CACTL_L2CENA);
162}
163
164/* Invalidates texture L2 cachelines */
165static void
166v3d_flush_l2t(struct v3d_dev *v3d, int core)
167{
168 /* While there is a busy bit (V3D_L2TCACTL_L2TFLS), we don't
169 * need to wait for completion before dispatching the job --
170 * L2T accesses will be stalled until the flush has completed.
171 * However, we do need to make sure we don't try to trigger a
172 * new flush while the L2_CLEAN queue is trying to
173 * synchronously clean after a job.
174 */
175 mutex_lock(&v3d->cache_clean_lock);
176 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
177 V3D_L2TCACTL_L2TFLS |
178 V3D_SET_FIELD(V3D_L2TCACTL_FLM_FLUSH, V3D_L2TCACTL_FLM));
179 mutex_unlock(&v3d->cache_clean_lock);
180}
181
182/* Cleans texture L1 and L2 cachelines (writing back dirty data).
183 *
184 * For cleaning, which happens from the CACHE_CLEAN queue after CSD has
185 * executed, we need to make sure that the clean is done before
186 * signaling job completion. So, we synchronously wait before
187 * returning, and we make sure that L2 invalidates don't happen in the
188 * meantime to confuse our are-we-done checks.
189 */
190void
191v3d_clean_caches(struct v3d_dev *v3d)
192{
193 struct drm_device *dev = &v3d->drm;
194 int core = 0;
195
196 trace_v3d_cache_clean_begin(dev);
197
198 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL, V3D_L2TCACTL_TMUWCF);
199 if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
200 V3D_L2TCACTL_TMUWCF), 100)) {
201 DRM_ERROR("Timeout waiting for TMU write combiner flush\n");
202 }
203
204 mutex_lock(&v3d->cache_clean_lock);
205 V3D_CORE_WRITE(core, V3D_CTL_L2TCACTL,
206 V3D_L2TCACTL_L2TFLS |
207 V3D_SET_FIELD(V3D_L2TCACTL_FLM_CLEAN, V3D_L2TCACTL_FLM));
208
209 if (wait_for(!(V3D_CORE_READ(core, V3D_CTL_L2TCACTL) &
210 V3D_L2TCACTL_L2TFLS), 100)) {
211 DRM_ERROR("Timeout waiting for L2T clean\n");
212 }
213
214 mutex_unlock(&v3d->cache_clean_lock);
215
216 trace_v3d_cache_clean_end(dev);
217}
218
219/* Invalidates the slice caches. These are read-only caches. */
220static void
221v3d_invalidate_slices(struct v3d_dev *v3d, int core)
222{
223 V3D_CORE_WRITE(core, V3D_CTL_SLCACTL,
224 V3D_SET_FIELD(0xf, V3D_SLCACTL_TVCCS) |
225 V3D_SET_FIELD(0xf, V3D_SLCACTL_TDCCS) |
226 V3D_SET_FIELD(0xf, V3D_SLCACTL_UCC) |
227 V3D_SET_FIELD(0xf, V3D_SLCACTL_ICC));
228}
229
230void
231v3d_invalidate_caches(struct v3d_dev *v3d)
232{
233 /* Invalidate the caches from the outside in. That way if
234 * another CL's concurrent use of nearby memory were to pull
235 * an invalidated cacheline back in, we wouldn't leave stale
236 * data in the inner cache.
237 */
238 v3d_flush_l3(v3d);
239 v3d_invalidate_l2c(v3d, 0);
240 v3d_flush_l2t(v3d, 0);
241 v3d_invalidate_slices(v3d, 0);
242}
243
244/* Takes the reservation lock on all the BOs being referenced, so that
245 * at queue submit time we can update the reservations.
246 *
247 * We don't lock the RCL the tile alloc/state BOs, or overflow memory
248 * (all of which are on exec->unref_list). They're entirely private
249 * to v3d, so we don't attach dma-buf fences to them.
250 */
251static int
252v3d_lock_bo_reservations(struct v3d_job *job,
253 struct ww_acquire_ctx *acquire_ctx)
254{
255 int i, ret;
256
257 ret = drm_gem_lock_reservations(job->bo, job->bo_count, acquire_ctx);
258 if (ret)
259 return ret;
260
261 for (i = 0; i < job->bo_count; i++) {
262 ret = dma_resv_reserve_fences(job->bo[i]->resv, 1);
263 if (ret)
264 goto fail;
265
266 ret = drm_sched_job_add_implicit_dependencies(&job->base,
267 job->bo[i], true);
268 if (ret)
269 goto fail;
270 }
271
272 return 0;
273
274fail:
275 drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
276 return ret;
277}
278
279/**
280 * v3d_lookup_bos() - Sets up job->bo[] with the GEM objects
281 * referenced by the job.
282 * @dev: DRM device
283 * @file_priv: DRM file for this fd
284 * @job: V3D job being set up
285 * @bo_handles: GEM handles
286 * @bo_count: Number of GEM handles passed in
287 *
288 * The command validator needs to reference BOs by their index within
289 * the submitted job's BO list. This does the validation of the job's
290 * BO list and reference counting for the lifetime of the job.
291 *
292 * Note that this function doesn't need to unreference the BOs on
293 * failure, because that will happen at v3d_exec_cleanup() time.
294 */
295static int
296v3d_lookup_bos(struct drm_device *dev,
297 struct drm_file *file_priv,
298 struct v3d_job *job,
299 u64 bo_handles,
300 u32 bo_count)
301{
302 u32 *handles;
303 int ret = 0;
304 int i;
305
306 job->bo_count = bo_count;
307
308 if (!job->bo_count) {
309 /* See comment on bo_index for why we have to check
310 * this.
311 */
312 DRM_DEBUG("Rendering requires BOs\n");
313 return -EINVAL;
314 }
315
316 job->bo = kvmalloc_array(job->bo_count,
317 sizeof(struct drm_gem_dma_object *),
318 GFP_KERNEL | __GFP_ZERO);
319 if (!job->bo) {
320 DRM_DEBUG("Failed to allocate validated BO pointers\n");
321 return -ENOMEM;
322 }
323
324 handles = kvmalloc_array(job->bo_count, sizeof(u32), GFP_KERNEL);
325 if (!handles) {
326 ret = -ENOMEM;
327 DRM_DEBUG("Failed to allocate incoming GEM handles\n");
328 goto fail;
329 }
330
331 if (copy_from_user(handles,
332 (void __user *)(uintptr_t)bo_handles,
333 job->bo_count * sizeof(u32))) {
334 ret = -EFAULT;
335 DRM_DEBUG("Failed to copy in GEM handles\n");
336 goto fail;
337 }
338
339 spin_lock(&file_priv->table_lock);
340 for (i = 0; i < job->bo_count; i++) {
341 struct drm_gem_object *bo = idr_find(&file_priv->object_idr,
342 handles[i]);
343 if (!bo) {
344 DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
345 i, handles[i]);
346 ret = -ENOENT;
347 spin_unlock(&file_priv->table_lock);
348 goto fail;
349 }
350 drm_gem_object_get(bo);
351 job->bo[i] = bo;
352 }
353 spin_unlock(&file_priv->table_lock);
354
355fail:
356 kvfree(handles);
357 return ret;
358}
359
360static void
361v3d_job_free(struct kref *ref)
362{
363 struct v3d_job *job = container_of(ref, struct v3d_job, refcount);
364 int i;
365
366 for (i = 0; i < job->bo_count; i++) {
367 if (job->bo[i])
368 drm_gem_object_put(job->bo[i]);
369 }
370 kvfree(job->bo);
371
372 dma_fence_put(job->irq_fence);
373 dma_fence_put(job->done_fence);
374
375 if (job->perfmon)
376 v3d_perfmon_put(job->perfmon);
377
378 kfree(job);
379}
380
381static void
382v3d_render_job_free(struct kref *ref)
383{
384 struct v3d_render_job *job = container_of(ref, struct v3d_render_job,
385 base.refcount);
386 struct v3d_bo *bo, *save;
387
388 list_for_each_entry_safe(bo, save, &job->unref_list, unref_head) {
389 drm_gem_object_put(&bo->base.base);
390 }
391
392 v3d_job_free(ref);
393}
394
395void v3d_job_cleanup(struct v3d_job *job)
396{
397 if (!job)
398 return;
399
400 drm_sched_job_cleanup(&job->base);
401 v3d_job_put(job);
402}
403
404void v3d_job_put(struct v3d_job *job)
405{
406 kref_put(&job->refcount, job->free);
407}
408
409int
410v3d_wait_bo_ioctl(struct drm_device *dev, void *data,
411 struct drm_file *file_priv)
412{
413 int ret;
414 struct drm_v3d_wait_bo *args = data;
415 ktime_t start = ktime_get();
416 u64 delta_ns;
417 unsigned long timeout_jiffies =
418 nsecs_to_jiffies_timeout(args->timeout_ns);
419
420 if (args->pad != 0)
421 return -EINVAL;
422
423 ret = drm_gem_dma_resv_wait(file_priv, args->handle,
424 true, timeout_jiffies);
425
426 /* Decrement the user's timeout, in case we got interrupted
427 * such that the ioctl will be restarted.
428 */
429 delta_ns = ktime_to_ns(ktime_sub(ktime_get(), start));
430 if (delta_ns < args->timeout_ns)
431 args->timeout_ns -= delta_ns;
432 else
433 args->timeout_ns = 0;
434
435 /* Asked to wait beyond the jiffie/scheduler precision? */
436 if (ret == -ETIME && args->timeout_ns)
437 ret = -EAGAIN;
438
439 return ret;
440}
441
442static int
443v3d_job_add_deps(struct drm_file *file_priv, struct v3d_job *job,
444 u32 in_sync, u32 point)
445{
446 struct dma_fence *in_fence = NULL;
447 int ret;
448
449 ret = drm_syncobj_find_fence(file_priv, in_sync, point, 0, &in_fence);
450 if (ret == -EINVAL)
451 return ret;
452
453 return drm_sched_job_add_dependency(&job->base, in_fence);
454}
455
456static int
457v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
458 void **container, size_t size, void (*free)(struct kref *ref),
459 u32 in_sync, struct v3d_submit_ext *se, enum v3d_queue queue)
460{
461 struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
462 struct v3d_job *job;
463 bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC);
464 int ret, i;
465
466 *container = kcalloc(1, size, GFP_KERNEL);
467 if (!*container) {
468 DRM_ERROR("Cannot allocate memory for v3d job.");
469 return -ENOMEM;
470 }
471
472 job = *container;
473 job->v3d = v3d;
474 job->free = free;
475
476 ret = drm_sched_job_init(&job->base, &v3d_priv->sched_entity[queue],
477 v3d_priv);
478 if (ret)
479 goto fail;
480
481 if (has_multisync) {
482 if (se->in_sync_count && se->wait_stage == queue) {
483 struct drm_v3d_sem __user *handle = u64_to_user_ptr(se->in_syncs);
484
485 for (i = 0; i < se->in_sync_count; i++) {
486 struct drm_v3d_sem in;
487
488 if (copy_from_user(&in, handle++, sizeof(in))) {
489 ret = -EFAULT;
490 DRM_DEBUG("Failed to copy wait dep handle.\n");
491 goto fail_deps;
492 }
493 ret = v3d_job_add_deps(file_priv, job, in.handle, 0);
494 if (ret)
495 goto fail_deps;
496 }
497 }
498 } else {
499 ret = v3d_job_add_deps(file_priv, job, in_sync, 0);
500 if (ret)
501 goto fail_deps;
502 }
503
504 kref_init(&job->refcount);
505
506 return 0;
507
508fail_deps:
509 drm_sched_job_cleanup(&job->base);
510fail:
511 kfree(*container);
512 *container = NULL;
513
514 return ret;
515}
516
517static void
518v3d_push_job(struct v3d_job *job)
519{
520 drm_sched_job_arm(&job->base);
521
522 job->done_fence = dma_fence_get(&job->base.s_fence->finished);
523
524 /* put by scheduler job completion */
525 kref_get(&job->refcount);
526
527 drm_sched_entity_push_job(&job->base);
528}
529
530static void
531v3d_attach_fences_and_unlock_reservation(struct drm_file *file_priv,
532 struct v3d_job *job,
533 struct ww_acquire_ctx *acquire_ctx,
534 u32 out_sync,
535 struct v3d_submit_ext *se,
536 struct dma_fence *done_fence)
537{
538 struct drm_syncobj *sync_out;
539 bool has_multisync = se && (se->flags & DRM_V3D_EXT_ID_MULTI_SYNC);
540 int i;
541
542 for (i = 0; i < job->bo_count; i++) {
543 /* XXX: Use shared fences for read-only objects. */
544 dma_resv_add_fence(job->bo[i]->resv, job->done_fence,
545 DMA_RESV_USAGE_WRITE);
546 }
547
548 drm_gem_unlock_reservations(job->bo, job->bo_count, acquire_ctx);
549
550 /* Update the return sync object for the job */
551 /* If it only supports a single signal semaphore*/
552 if (!has_multisync) {
553 sync_out = drm_syncobj_find(file_priv, out_sync);
554 if (sync_out) {
555 drm_syncobj_replace_fence(sync_out, done_fence);
556 drm_syncobj_put(sync_out);
557 }
558 return;
559 }
560
561 /* If multiple semaphores extension is supported */
562 if (se->out_sync_count) {
563 for (i = 0; i < se->out_sync_count; i++) {
564 drm_syncobj_replace_fence(se->out_syncs[i].syncobj,
565 done_fence);
566 drm_syncobj_put(se->out_syncs[i].syncobj);
567 }
568 kvfree(se->out_syncs);
569 }
570}
571
572static void
573v3d_put_multisync_post_deps(struct v3d_submit_ext *se)
574{
575 unsigned int i;
576
577 if (!(se && se->out_sync_count))
578 return;
579
580 for (i = 0; i < se->out_sync_count; i++)
581 drm_syncobj_put(se->out_syncs[i].syncobj);
582 kvfree(se->out_syncs);
583}
584
585static int
586v3d_get_multisync_post_deps(struct drm_file *file_priv,
587 struct v3d_submit_ext *se,
588 u32 count, u64 handles)
589{
590 struct drm_v3d_sem __user *post_deps;
591 int i, ret;
592
593 if (!count)
594 return 0;
595
596 se->out_syncs = (struct v3d_submit_outsync *)
597 kvmalloc_array(count,
598 sizeof(struct v3d_submit_outsync),
599 GFP_KERNEL);
600 if (!se->out_syncs)
601 return -ENOMEM;
602
603 post_deps = u64_to_user_ptr(handles);
604
605 for (i = 0; i < count; i++) {
606 struct drm_v3d_sem out;
607
608 if (copy_from_user(&out, post_deps++, sizeof(out))) {
609 ret = -EFAULT;
610 DRM_DEBUG("Failed to copy post dep handles\n");
611 goto fail;
612 }
613
614 se->out_syncs[i].syncobj = drm_syncobj_find(file_priv,
615 out.handle);
616 if (!se->out_syncs[i].syncobj) {
617 ret = -EINVAL;
618 goto fail;
619 }
620 }
621 se->out_sync_count = count;
622
623 return 0;
624
625fail:
626 for (i--; i >= 0; i--)
627 drm_syncobj_put(se->out_syncs[i].syncobj);
628 kvfree(se->out_syncs);
629
630 return ret;
631}
632
633/* Get data for multiple binary semaphores synchronization. Parse syncobj
634 * to be signaled when job completes (out_sync).
635 */
636static int
637v3d_get_multisync_submit_deps(struct drm_file *file_priv,
638 struct drm_v3d_extension __user *ext,
639 void *data)
640{
641 struct drm_v3d_multi_sync multisync;
642 struct v3d_submit_ext *se = data;
643 int ret;
644
645 if (copy_from_user(&multisync, ext, sizeof(multisync)))
646 return -EFAULT;
647
648 if (multisync.pad)
649 return -EINVAL;
650
651 ret = v3d_get_multisync_post_deps(file_priv, data, multisync.out_sync_count,
652 multisync.out_syncs);
653 if (ret)
654 return ret;
655
656 se->in_sync_count = multisync.in_sync_count;
657 se->in_syncs = multisync.in_syncs;
658 se->flags |= DRM_V3D_EXT_ID_MULTI_SYNC;
659 se->wait_stage = multisync.wait_stage;
660
661 return 0;
662}
663
664/* Whenever userspace sets ioctl extensions, v3d_get_extensions parses data
665 * according to the extension id (name).
666 */
667static int
668v3d_get_extensions(struct drm_file *file_priv,
669 u64 ext_handles,
670 void *data)
671{
672 struct drm_v3d_extension __user *user_ext;
673 int ret;
674
675 user_ext = u64_to_user_ptr(ext_handles);
676 while (user_ext) {
677 struct drm_v3d_extension ext;
678
679 if (copy_from_user(&ext, user_ext, sizeof(ext))) {
680 DRM_DEBUG("Failed to copy submit extension\n");
681 return -EFAULT;
682 }
683
684 switch (ext.id) {
685 case DRM_V3D_EXT_ID_MULTI_SYNC:
686 ret = v3d_get_multisync_submit_deps(file_priv, user_ext, data);
687 if (ret)
688 return ret;
689 break;
690 default:
691 DRM_DEBUG_DRIVER("Unknown extension id: %d\n", ext.id);
692 return -EINVAL;
693 }
694
695 user_ext = u64_to_user_ptr(ext.next);
696 }
697
698 return 0;
699}
700
701/**
702 * v3d_submit_cl_ioctl() - Submits a job (frame) to the V3D.
703 * @dev: DRM device
704 * @data: ioctl argument
705 * @file_priv: DRM file for this fd
706 *
707 * This is the main entrypoint for userspace to submit a 3D frame to
708 * the GPU. Userspace provides the binner command list (if
709 * applicable), and the kernel sets up the render command list to draw
710 * to the framebuffer described in the ioctl, using the command lists
711 * that the 3D engine's binner will produce.
712 */
713int
714v3d_submit_cl_ioctl(struct drm_device *dev, void *data,
715 struct drm_file *file_priv)
716{
717 struct v3d_dev *v3d = to_v3d_dev(dev);
718 struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
719 struct drm_v3d_submit_cl *args = data;
720 struct v3d_submit_ext se = {0};
721 struct v3d_bin_job *bin = NULL;
722 struct v3d_render_job *render = NULL;
723 struct v3d_job *clean_job = NULL;
724 struct v3d_job *last_job;
725 struct ww_acquire_ctx acquire_ctx;
726 int ret = 0;
727
728 trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
729
730 if (args->pad)
731 return -EINVAL;
732
733 if (args->flags &&
734 args->flags & ~(DRM_V3D_SUBMIT_CL_FLUSH_CACHE |
735 DRM_V3D_SUBMIT_EXTENSION)) {
736 DRM_INFO("invalid flags: %d\n", args->flags);
737 return -EINVAL;
738 }
739
740 if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
741 ret = v3d_get_extensions(file_priv, args->extensions, &se);
742 if (ret) {
743 DRM_DEBUG("Failed to get extensions.\n");
744 return ret;
745 }
746 }
747
748 ret = v3d_job_init(v3d, file_priv, (void *)&render, sizeof(*render),
749 v3d_render_job_free, args->in_sync_rcl, &se, V3D_RENDER);
750 if (ret)
751 goto fail;
752
753 render->start = args->rcl_start;
754 render->end = args->rcl_end;
755 INIT_LIST_HEAD(&render->unref_list);
756
757 if (args->bcl_start != args->bcl_end) {
758 ret = v3d_job_init(v3d, file_priv, (void *)&bin, sizeof(*bin),
759 v3d_job_free, args->in_sync_bcl, &se, V3D_BIN);
760 if (ret)
761 goto fail;
762
763 bin->start = args->bcl_start;
764 bin->end = args->bcl_end;
765 bin->qma = args->qma;
766 bin->qms = args->qms;
767 bin->qts = args->qts;
768 bin->render = render;
769 }
770
771 if (args->flags & DRM_V3D_SUBMIT_CL_FLUSH_CACHE) {
772 ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job),
773 v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
774 if (ret)
775 goto fail;
776
777 last_job = clean_job;
778 } else {
779 last_job = &render->base;
780 }
781
782 ret = v3d_lookup_bos(dev, file_priv, last_job,
783 args->bo_handles, args->bo_handle_count);
784 if (ret)
785 goto fail;
786
787 ret = v3d_lock_bo_reservations(last_job, &acquire_ctx);
788 if (ret)
789 goto fail;
790
791 if (args->perfmon_id) {
792 render->base.perfmon = v3d_perfmon_find(v3d_priv,
793 args->perfmon_id);
794
795 if (!render->base.perfmon) {
796 ret = -ENOENT;
797 goto fail_perfmon;
798 }
799 }
800
801 mutex_lock(&v3d->sched_lock);
802 if (bin) {
803 bin->base.perfmon = render->base.perfmon;
804 v3d_perfmon_get(bin->base.perfmon);
805 v3d_push_job(&bin->base);
806
807 ret = drm_sched_job_add_dependency(&render->base.base,
808 dma_fence_get(bin->base.done_fence));
809 if (ret)
810 goto fail_unreserve;
811 }
812
813 v3d_push_job(&render->base);
814
815 if (clean_job) {
816 struct dma_fence *render_fence =
817 dma_fence_get(render->base.done_fence);
818 ret = drm_sched_job_add_dependency(&clean_job->base,
819 render_fence);
820 if (ret)
821 goto fail_unreserve;
822 clean_job->perfmon = render->base.perfmon;
823 v3d_perfmon_get(clean_job->perfmon);
824 v3d_push_job(clean_job);
825 }
826
827 mutex_unlock(&v3d->sched_lock);
828
829 v3d_attach_fences_and_unlock_reservation(file_priv,
830 last_job,
831 &acquire_ctx,
832 args->out_sync,
833 &se,
834 last_job->done_fence);
835
836 if (bin)
837 v3d_job_put(&bin->base);
838 v3d_job_put(&render->base);
839 if (clean_job)
840 v3d_job_put(clean_job);
841
842 return 0;
843
844fail_unreserve:
845 mutex_unlock(&v3d->sched_lock);
846fail_perfmon:
847 drm_gem_unlock_reservations(last_job->bo,
848 last_job->bo_count, &acquire_ctx);
849fail:
850 v3d_job_cleanup((void *)bin);
851 v3d_job_cleanup((void *)render);
852 v3d_job_cleanup(clean_job);
853 v3d_put_multisync_post_deps(&se);
854
855 return ret;
856}
857
858/**
859 * v3d_submit_tfu_ioctl() - Submits a TFU (texture formatting) job to the V3D.
860 * @dev: DRM device
861 * @data: ioctl argument
862 * @file_priv: DRM file for this fd
863 *
864 * Userspace provides the register setup for the TFU, which we don't
865 * need to validate since the TFU is behind the MMU.
866 */
867int
868v3d_submit_tfu_ioctl(struct drm_device *dev, void *data,
869 struct drm_file *file_priv)
870{
871 struct v3d_dev *v3d = to_v3d_dev(dev);
872 struct drm_v3d_submit_tfu *args = data;
873 struct v3d_submit_ext se = {0};
874 struct v3d_tfu_job *job = NULL;
875 struct ww_acquire_ctx acquire_ctx;
876 int ret = 0;
877
878 trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
879
880 if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) {
881 DRM_DEBUG("invalid flags: %d\n", args->flags);
882 return -EINVAL;
883 }
884
885 if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
886 ret = v3d_get_extensions(file_priv, args->extensions, &se);
887 if (ret) {
888 DRM_DEBUG("Failed to get extensions.\n");
889 return ret;
890 }
891 }
892
893 ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job),
894 v3d_job_free, args->in_sync, &se, V3D_TFU);
895 if (ret)
896 goto fail;
897
898 job->base.bo = kcalloc(ARRAY_SIZE(args->bo_handles),
899 sizeof(*job->base.bo), GFP_KERNEL);
900 if (!job->base.bo) {
901 ret = -ENOMEM;
902 goto fail;
903 }
904
905 job->args = *args;
906
907 spin_lock(&file_priv->table_lock);
908 for (job->base.bo_count = 0;
909 job->base.bo_count < ARRAY_SIZE(args->bo_handles);
910 job->base.bo_count++) {
911 struct drm_gem_object *bo;
912
913 if (!args->bo_handles[job->base.bo_count])
914 break;
915
916 bo = idr_find(&file_priv->object_idr,
917 args->bo_handles[job->base.bo_count]);
918 if (!bo) {
919 DRM_DEBUG("Failed to look up GEM BO %d: %d\n",
920 job->base.bo_count,
921 args->bo_handles[job->base.bo_count]);
922 ret = -ENOENT;
923 spin_unlock(&file_priv->table_lock);
924 goto fail;
925 }
926 drm_gem_object_get(bo);
927 job->base.bo[job->base.bo_count] = bo;
928 }
929 spin_unlock(&file_priv->table_lock);
930
931 ret = v3d_lock_bo_reservations(&job->base, &acquire_ctx);
932 if (ret)
933 goto fail;
934
935 mutex_lock(&v3d->sched_lock);
936 v3d_push_job(&job->base);
937 mutex_unlock(&v3d->sched_lock);
938
939 v3d_attach_fences_and_unlock_reservation(file_priv,
940 &job->base, &acquire_ctx,
941 args->out_sync,
942 &se,
943 job->base.done_fence);
944
945 v3d_job_put(&job->base);
946
947 return 0;
948
949fail:
950 v3d_job_cleanup((void *)job);
951 v3d_put_multisync_post_deps(&se);
952
953 return ret;
954}
955
956/**
957 * v3d_submit_csd_ioctl() - Submits a CSD (texture formatting) job to the V3D.
958 * @dev: DRM device
959 * @data: ioctl argument
960 * @file_priv: DRM file for this fd
961 *
962 * Userspace provides the register setup for the CSD, which we don't
963 * need to validate since the CSD is behind the MMU.
964 */
965int
966v3d_submit_csd_ioctl(struct drm_device *dev, void *data,
967 struct drm_file *file_priv)
968{
969 struct v3d_dev *v3d = to_v3d_dev(dev);
970 struct v3d_file_priv *v3d_priv = file_priv->driver_priv;
971 struct drm_v3d_submit_csd *args = data;
972 struct v3d_submit_ext se = {0};
973 struct v3d_csd_job *job = NULL;
974 struct v3d_job *clean_job = NULL;
975 struct ww_acquire_ctx acquire_ctx;
976 int ret;
977
978 trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]);
979
980 if (args->pad)
981 return -EINVAL;
982
983 if (!v3d_has_csd(v3d)) {
984 DRM_DEBUG("Attempting CSD submit on non-CSD hardware\n");
985 return -EINVAL;
986 }
987
988 if (args->flags && !(args->flags & DRM_V3D_SUBMIT_EXTENSION)) {
989 DRM_INFO("invalid flags: %d\n", args->flags);
990 return -EINVAL;
991 }
992
993 if (args->flags & DRM_V3D_SUBMIT_EXTENSION) {
994 ret = v3d_get_extensions(file_priv, args->extensions, &se);
995 if (ret) {
996 DRM_DEBUG("Failed to get extensions.\n");
997 return ret;
998 }
999 }
1000
1001 ret = v3d_job_init(v3d, file_priv, (void *)&job, sizeof(*job),
1002 v3d_job_free, args->in_sync, &se, V3D_CSD);
1003 if (ret)
1004 goto fail;
1005
1006 ret = v3d_job_init(v3d, file_priv, (void *)&clean_job, sizeof(*clean_job),
1007 v3d_job_free, 0, NULL, V3D_CACHE_CLEAN);
1008 if (ret)
1009 goto fail;
1010
1011 job->args = *args;
1012
1013 ret = v3d_lookup_bos(dev, file_priv, clean_job,
1014 args->bo_handles, args->bo_handle_count);
1015 if (ret)
1016 goto fail;
1017
1018 ret = v3d_lock_bo_reservations(clean_job, &acquire_ctx);
1019 if (ret)
1020 goto fail;
1021
1022 if (args->perfmon_id) {
1023 job->base.perfmon = v3d_perfmon_find(v3d_priv,
1024 args->perfmon_id);
1025 if (!job->base.perfmon) {
1026 ret = -ENOENT;
1027 goto fail_perfmon;
1028 }
1029 }
1030
1031 mutex_lock(&v3d->sched_lock);
1032 v3d_push_job(&job->base);
1033
1034 ret = drm_sched_job_add_dependency(&clean_job->base,
1035 dma_fence_get(job->base.done_fence));
1036 if (ret)
1037 goto fail_unreserve;
1038
1039 v3d_push_job(clean_job);
1040 mutex_unlock(&v3d->sched_lock);
1041
1042 v3d_attach_fences_and_unlock_reservation(file_priv,
1043 clean_job,
1044 &acquire_ctx,
1045 args->out_sync,
1046 &se,
1047 clean_job->done_fence);
1048
1049 v3d_job_put(&job->base);
1050 v3d_job_put(clean_job);
1051
1052 return 0;
1053
1054fail_unreserve:
1055 mutex_unlock(&v3d->sched_lock);
1056fail_perfmon:
1057 drm_gem_unlock_reservations(clean_job->bo, clean_job->bo_count,
1058 &acquire_ctx);
1059fail:
1060 v3d_job_cleanup((void *)job);
1061 v3d_job_cleanup(clean_job);
1062 v3d_put_multisync_post_deps(&se);
1063
1064 return ret;
1065}
1066
1067int
1068v3d_gem_init(struct drm_device *dev)
1069{
1070 struct v3d_dev *v3d = to_v3d_dev(dev);
1071 u32 pt_size = 4096 * 1024;
1072 int ret, i;
1073
1074 for (i = 0; i < V3D_MAX_QUEUES; i++)
1075 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
1076
1077 spin_lock_init(&v3d->mm_lock);
1078 spin_lock_init(&v3d->job_lock);
1079 ret = drmm_mutex_init(dev, &v3d->bo_lock);
1080 if (ret)
1081 return ret;
1082 ret = drmm_mutex_init(dev, &v3d->reset_lock);
1083 if (ret)
1084 return ret;
1085 ret = drmm_mutex_init(dev, &v3d->sched_lock);
1086 if (ret)
1087 return ret;
1088 ret = drmm_mutex_init(dev, &v3d->cache_clean_lock);
1089 if (ret)
1090 return ret;
1091
1092 /* Note: We don't allocate address 0. Various bits of HW
1093 * treat 0 as special, such as the occlusion query counters
1094 * where 0 means "disabled".
1095 */
1096 drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
1097
1098 v3d->pt = dma_alloc_wc(v3d->drm.dev, pt_size,
1099 &v3d->pt_paddr,
1100 GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
1101 if (!v3d->pt) {
1102 drm_mm_takedown(&v3d->mm);
1103 dev_err(v3d->drm.dev,
1104 "Failed to allocate page tables. Please ensure you have DMA enabled.\n");
1105 return -ENOMEM;
1106 }
1107
1108 v3d_init_hw_state(v3d);
1109 v3d_mmu_set_page_table(v3d);
1110
1111 ret = v3d_sched_init(v3d);
1112 if (ret) {
1113 drm_mm_takedown(&v3d->mm);
1114 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
1115 v3d->pt_paddr);
1116 }
1117
1118 return 0;
1119}
1120
1121void
1122v3d_gem_destroy(struct drm_device *dev)
1123{
1124 struct v3d_dev *v3d = to_v3d_dev(dev);
1125
1126 v3d_sched_fini(v3d);
1127
1128 /* Waiting for jobs to finish would need to be done before
1129 * unregistering V3D.
1130 */
1131 WARN_ON(v3d->bin_job);
1132 WARN_ON(v3d->render_job);
1133
1134 drm_mm_takedown(&v3d->mm);
1135
1136 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
1137 v3d->pt_paddr);
1138}