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1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
24#include <linux/fs.h>
25#include <linux/capability.h>
26#include <linux/security.h>
27#include <linux/pci-aspm.h>
28#include <linux/slab.h>
29#include "pci.h"
30
31static int sysfs_initialized; /* = 0 */
32
33/* show configuration fields */
34#define pci_config_attr(field, format_string) \
35static ssize_t \
36field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
37{ \
38 struct pci_dev *pdev; \
39 \
40 pdev = to_pci_dev (dev); \
41 return sprintf (buf, format_string, pdev->field); \
42}
43
44pci_config_attr(vendor, "0x%04x\n");
45pci_config_attr(device, "0x%04x\n");
46pci_config_attr(subsystem_vendor, "0x%04x\n");
47pci_config_attr(subsystem_device, "0x%04x\n");
48pci_config_attr(class, "0x%06x\n");
49pci_config_attr(irq, "%u\n");
50
51static ssize_t broken_parity_status_show(struct device *dev,
52 struct device_attribute *attr,
53 char *buf)
54{
55 struct pci_dev *pdev = to_pci_dev(dev);
56 return sprintf (buf, "%u\n", pdev->broken_parity_status);
57}
58
59static ssize_t broken_parity_status_store(struct device *dev,
60 struct device_attribute *attr,
61 const char *buf, size_t count)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
64 unsigned long val;
65
66 if (strict_strtoul(buf, 0, &val) < 0)
67 return -EINVAL;
68
69 pdev->broken_parity_status = !!val;
70
71 return count;
72}
73
74static ssize_t local_cpus_show(struct device *dev,
75 struct device_attribute *attr, char *buf)
76{
77 const struct cpumask *mask;
78 int len;
79
80#ifdef CONFIG_NUMA
81 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
82 cpumask_of_node(dev_to_node(dev));
83#else
84 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
85#endif
86 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
87 buf[len++] = '\n';
88 buf[len] = '\0';
89 return len;
90}
91
92
93static ssize_t local_cpulist_show(struct device *dev,
94 struct device_attribute *attr, char *buf)
95{
96 const struct cpumask *mask;
97 int len;
98
99#ifdef CONFIG_NUMA
100 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
101 cpumask_of_node(dev_to_node(dev));
102#else
103 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
104#endif
105 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
106 buf[len++] = '\n';
107 buf[len] = '\0';
108 return len;
109}
110
111/*
112 * PCI Bus Class Devices
113 */
114static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
115 int type,
116 struct device_attribute *attr,
117 char *buf)
118{
119 int ret;
120 const struct cpumask *cpumask;
121
122 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
123 ret = type ?
124 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
125 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
126 buf[ret++] = '\n';
127 buf[ret] = '\0';
128 return ret;
129}
130
131static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
132 struct device_attribute *attr,
133 char *buf)
134{
135 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
136}
137
138static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
139 struct device_attribute *attr,
140 char *buf)
141{
142 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
143}
144
145/* show resources */
146static ssize_t
147resource_show(struct device * dev, struct device_attribute *attr, char * buf)
148{
149 struct pci_dev * pci_dev = to_pci_dev(dev);
150 char * str = buf;
151 int i;
152 int max;
153 resource_size_t start, end;
154
155 if (pci_dev->subordinate)
156 max = DEVICE_COUNT_RESOURCE;
157 else
158 max = PCI_BRIDGE_RESOURCES;
159
160 for (i = 0; i < max; i++) {
161 struct resource *res = &pci_dev->resource[i];
162 pci_resource_to_user(pci_dev, i, res, &start, &end);
163 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
164 (unsigned long long)start,
165 (unsigned long long)end,
166 (unsigned long long)res->flags);
167 }
168 return (str - buf);
169}
170
171static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
172{
173 struct pci_dev *pci_dev = to_pci_dev(dev);
174
175 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
176 pci_dev->vendor, pci_dev->device,
177 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
178 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
179 (u8)(pci_dev->class));
180}
181
182static ssize_t is_enabled_store(struct device *dev,
183 struct device_attribute *attr, const char *buf,
184 size_t count)
185{
186 struct pci_dev *pdev = to_pci_dev(dev);
187 unsigned long val;
188 ssize_t result = strict_strtoul(buf, 0, &val);
189
190 if (result < 0)
191 return result;
192
193 /* this can crash the machine when done on the "wrong" device */
194 if (!capable(CAP_SYS_ADMIN))
195 return -EPERM;
196
197 if (!val) {
198 if (pci_is_enabled(pdev))
199 pci_disable_device(pdev);
200 else
201 result = -EIO;
202 } else
203 result = pci_enable_device(pdev);
204
205 return result < 0 ? result : count;
206}
207
208static ssize_t is_enabled_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pdev;
212
213 pdev = to_pci_dev (dev);
214 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
215}
216
217#ifdef CONFIG_NUMA
218static ssize_t
219numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
220{
221 return sprintf (buf, "%d\n", dev->numa_node);
222}
223#endif
224
225static ssize_t
226dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
227{
228 struct pci_dev *pdev = to_pci_dev(dev);
229
230 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
231}
232
233static ssize_t
234consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
235 char *buf)
236{
237 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
238}
239
240static ssize_t
241msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
242{
243 struct pci_dev *pdev = to_pci_dev(dev);
244
245 if (!pdev->subordinate)
246 return 0;
247
248 return sprintf (buf, "%u\n",
249 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
250}
251
252static ssize_t
253msi_bus_store(struct device *dev, struct device_attribute *attr,
254 const char *buf, size_t count)
255{
256 struct pci_dev *pdev = to_pci_dev(dev);
257 unsigned long val;
258
259 if (strict_strtoul(buf, 0, &val) < 0)
260 return -EINVAL;
261
262 /* bad things may happen if the no_msi flag is changed
263 * while some drivers are loaded */
264 if (!capable(CAP_SYS_ADMIN))
265 return -EPERM;
266
267 /* Maybe pci devices without subordinate busses shouldn't even have this
268 * attribute in the first place? */
269 if (!pdev->subordinate)
270 return count;
271
272 /* Is the flag going to change, or keep the value it already had? */
273 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
274 !!val) {
275 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
276
277 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
278 " bad things could happen\n", val ? "" : " not");
279 }
280
281 return count;
282}
283
284#ifdef CONFIG_HOTPLUG
285static DEFINE_MUTEX(pci_remove_rescan_mutex);
286static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
287 size_t count)
288{
289 unsigned long val;
290 struct pci_bus *b = NULL;
291
292 if (strict_strtoul(buf, 0, &val) < 0)
293 return -EINVAL;
294
295 if (val) {
296 mutex_lock(&pci_remove_rescan_mutex);
297 while ((b = pci_find_next_bus(b)) != NULL)
298 pci_rescan_bus(b);
299 mutex_unlock(&pci_remove_rescan_mutex);
300 }
301 return count;
302}
303
304struct bus_attribute pci_bus_attrs[] = {
305 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
306 __ATTR_NULL
307};
308
309static ssize_t
310dev_rescan_store(struct device *dev, struct device_attribute *attr,
311 const char *buf, size_t count)
312{
313 unsigned long val;
314 struct pci_dev *pdev = to_pci_dev(dev);
315
316 if (strict_strtoul(buf, 0, &val) < 0)
317 return -EINVAL;
318
319 if (val) {
320 mutex_lock(&pci_remove_rescan_mutex);
321 pci_rescan_bus(pdev->bus);
322 mutex_unlock(&pci_remove_rescan_mutex);
323 }
324 return count;
325}
326
327static void remove_callback(struct device *dev)
328{
329 struct pci_dev *pdev = to_pci_dev(dev);
330
331 mutex_lock(&pci_remove_rescan_mutex);
332 pci_remove_bus_device(pdev);
333 mutex_unlock(&pci_remove_rescan_mutex);
334}
335
336static ssize_t
337remove_store(struct device *dev, struct device_attribute *dummy,
338 const char *buf, size_t count)
339{
340 int ret = 0;
341 unsigned long val;
342
343 if (strict_strtoul(buf, 0, &val) < 0)
344 return -EINVAL;
345
346 /* An attribute cannot be unregistered by one of its own methods,
347 * so we have to use this roundabout approach.
348 */
349 if (val)
350 ret = device_schedule_callback(dev, remove_callback);
351 if (ret)
352 count = ret;
353 return count;
354}
355
356static ssize_t
357dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
358 const char *buf, size_t count)
359{
360 unsigned long val;
361 struct pci_bus *bus = to_pci_bus(dev);
362
363 if (strict_strtoul(buf, 0, &val) < 0)
364 return -EINVAL;
365
366 if (val) {
367 mutex_lock(&pci_remove_rescan_mutex);
368 pci_rescan_bus(bus);
369 mutex_unlock(&pci_remove_rescan_mutex);
370 }
371 return count;
372}
373
374#endif
375
376struct device_attribute pci_dev_attrs[] = {
377 __ATTR_RO(resource),
378 __ATTR_RO(vendor),
379 __ATTR_RO(device),
380 __ATTR_RO(subsystem_vendor),
381 __ATTR_RO(subsystem_device),
382 __ATTR_RO(class),
383 __ATTR_RO(irq),
384 __ATTR_RO(local_cpus),
385 __ATTR_RO(local_cpulist),
386 __ATTR_RO(modalias),
387#ifdef CONFIG_NUMA
388 __ATTR_RO(numa_node),
389#endif
390 __ATTR_RO(dma_mask_bits),
391 __ATTR_RO(consistent_dma_mask_bits),
392 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
393 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
394 broken_parity_status_show,broken_parity_status_store),
395 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
396#ifdef CONFIG_HOTPLUG
397 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
398 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
399#endif
400 __ATTR_NULL,
401};
402
403struct device_attribute pcibus_dev_attrs[] = {
404#ifdef CONFIG_HOTPLUG
405 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
406#endif
407 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
408 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
409 __ATTR_NULL,
410};
411
412static ssize_t
413boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
414{
415 struct pci_dev *pdev = to_pci_dev(dev);
416
417 return sprintf(buf, "%u\n",
418 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
419 IORESOURCE_ROM_SHADOW));
420}
421struct device_attribute vga_attr = __ATTR_RO(boot_vga);
422
423static ssize_t
424pci_read_config(struct file *filp, struct kobject *kobj,
425 struct bin_attribute *bin_attr,
426 char *buf, loff_t off, size_t count)
427{
428 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
429 unsigned int size = 64;
430 loff_t init_off = off;
431 u8 *data = (u8*) buf;
432
433 /* Several chips lock up trying to read undefined config space */
434 if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
435 size = dev->cfg_size;
436 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
437 size = 128;
438 }
439
440 if (off > size)
441 return 0;
442 if (off + count > size) {
443 size -= off;
444 count = size;
445 } else {
446 size = count;
447 }
448
449 if ((off & 1) && size) {
450 u8 val;
451 pci_user_read_config_byte(dev, off, &val);
452 data[off - init_off] = val;
453 off++;
454 size--;
455 }
456
457 if ((off & 3) && size > 2) {
458 u16 val;
459 pci_user_read_config_word(dev, off, &val);
460 data[off - init_off] = val & 0xff;
461 data[off - init_off + 1] = (val >> 8) & 0xff;
462 off += 2;
463 size -= 2;
464 }
465
466 while (size > 3) {
467 u32 val;
468 pci_user_read_config_dword(dev, off, &val);
469 data[off - init_off] = val & 0xff;
470 data[off - init_off + 1] = (val >> 8) & 0xff;
471 data[off - init_off + 2] = (val >> 16) & 0xff;
472 data[off - init_off + 3] = (val >> 24) & 0xff;
473 off += 4;
474 size -= 4;
475 }
476
477 if (size >= 2) {
478 u16 val;
479 pci_user_read_config_word(dev, off, &val);
480 data[off - init_off] = val & 0xff;
481 data[off - init_off + 1] = (val >> 8) & 0xff;
482 off += 2;
483 size -= 2;
484 }
485
486 if (size > 0) {
487 u8 val;
488 pci_user_read_config_byte(dev, off, &val);
489 data[off - init_off] = val;
490 off++;
491 --size;
492 }
493
494 return count;
495}
496
497static ssize_t
498pci_write_config(struct file* filp, struct kobject *kobj,
499 struct bin_attribute *bin_attr,
500 char *buf, loff_t off, size_t count)
501{
502 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
503 unsigned int size = count;
504 loff_t init_off = off;
505 u8 *data = (u8*) buf;
506
507 if (off > dev->cfg_size)
508 return 0;
509 if (off + count > dev->cfg_size) {
510 size = dev->cfg_size - off;
511 count = size;
512 }
513
514 if ((off & 1) && size) {
515 pci_user_write_config_byte(dev, off, data[off - init_off]);
516 off++;
517 size--;
518 }
519
520 if ((off & 3) && size > 2) {
521 u16 val = data[off - init_off];
522 val |= (u16) data[off - init_off + 1] << 8;
523 pci_user_write_config_word(dev, off, val);
524 off += 2;
525 size -= 2;
526 }
527
528 while (size > 3) {
529 u32 val = data[off - init_off];
530 val |= (u32) data[off - init_off + 1] << 8;
531 val |= (u32) data[off - init_off + 2] << 16;
532 val |= (u32) data[off - init_off + 3] << 24;
533 pci_user_write_config_dword(dev, off, val);
534 off += 4;
535 size -= 4;
536 }
537
538 if (size >= 2) {
539 u16 val = data[off - init_off];
540 val |= (u16) data[off - init_off + 1] << 8;
541 pci_user_write_config_word(dev, off, val);
542 off += 2;
543 size -= 2;
544 }
545
546 if (size) {
547 pci_user_write_config_byte(dev, off, data[off - init_off]);
548 off++;
549 --size;
550 }
551
552 return count;
553}
554
555static ssize_t
556read_vpd_attr(struct file *filp, struct kobject *kobj,
557 struct bin_attribute *bin_attr,
558 char *buf, loff_t off, size_t count)
559{
560 struct pci_dev *dev =
561 to_pci_dev(container_of(kobj, struct device, kobj));
562
563 if (off > bin_attr->size)
564 count = 0;
565 else if (count > bin_attr->size - off)
566 count = bin_attr->size - off;
567
568 return pci_read_vpd(dev, off, count, buf);
569}
570
571static ssize_t
572write_vpd_attr(struct file *filp, struct kobject *kobj,
573 struct bin_attribute *bin_attr,
574 char *buf, loff_t off, size_t count)
575{
576 struct pci_dev *dev =
577 to_pci_dev(container_of(kobj, struct device, kobj));
578
579 if (off > bin_attr->size)
580 count = 0;
581 else if (count > bin_attr->size - off)
582 count = bin_attr->size - off;
583
584 return pci_write_vpd(dev, off, count, buf);
585}
586
587#ifdef HAVE_PCI_LEGACY
588/**
589 * pci_read_legacy_io - read byte(s) from legacy I/O port space
590 * @filp: open sysfs file
591 * @kobj: kobject corresponding to file to read from
592 * @bin_attr: struct bin_attribute for this file
593 * @buf: buffer to store results
594 * @off: offset into legacy I/O port space
595 * @count: number of bytes to read
596 *
597 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
598 * callback routine (pci_legacy_read).
599 */
600static ssize_t
601pci_read_legacy_io(struct file *filp, struct kobject *kobj,
602 struct bin_attribute *bin_attr,
603 char *buf, loff_t off, size_t count)
604{
605 struct pci_bus *bus = to_pci_bus(container_of(kobj,
606 struct device,
607 kobj));
608
609 /* Only support 1, 2 or 4 byte accesses */
610 if (count != 1 && count != 2 && count != 4)
611 return -EINVAL;
612
613 return pci_legacy_read(bus, off, (u32 *)buf, count);
614}
615
616/**
617 * pci_write_legacy_io - write byte(s) to legacy I/O port space
618 * @filp: open sysfs file
619 * @kobj: kobject corresponding to file to read from
620 * @bin_attr: struct bin_attribute for this file
621 * @buf: buffer containing value to be written
622 * @off: offset into legacy I/O port space
623 * @count: number of bytes to write
624 *
625 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
626 * callback routine (pci_legacy_write).
627 */
628static ssize_t
629pci_write_legacy_io(struct file *filp, struct kobject *kobj,
630 struct bin_attribute *bin_attr,
631 char *buf, loff_t off, size_t count)
632{
633 struct pci_bus *bus = to_pci_bus(container_of(kobj,
634 struct device,
635 kobj));
636 /* Only support 1, 2 or 4 byte accesses */
637 if (count != 1 && count != 2 && count != 4)
638 return -EINVAL;
639
640 return pci_legacy_write(bus, off, *(u32 *)buf, count);
641}
642
643/**
644 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
645 * @filp: open sysfs file
646 * @kobj: kobject corresponding to device to be mapped
647 * @attr: struct bin_attribute for this file
648 * @vma: struct vm_area_struct passed to mmap
649 *
650 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
651 * legacy memory space (first meg of bus space) into application virtual
652 * memory space.
653 */
654static int
655pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
656 struct bin_attribute *attr,
657 struct vm_area_struct *vma)
658{
659 struct pci_bus *bus = to_pci_bus(container_of(kobj,
660 struct device,
661 kobj));
662
663 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
664}
665
666/**
667 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
668 * @filp: open sysfs file
669 * @kobj: kobject corresponding to device to be mapped
670 * @attr: struct bin_attribute for this file
671 * @vma: struct vm_area_struct passed to mmap
672 *
673 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
674 * legacy IO space (first meg of bus space) into application virtual
675 * memory space. Returns -ENOSYS if the operation isn't supported
676 */
677static int
678pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
679 struct bin_attribute *attr,
680 struct vm_area_struct *vma)
681{
682 struct pci_bus *bus = to_pci_bus(container_of(kobj,
683 struct device,
684 kobj));
685
686 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
687}
688
689/**
690 * pci_adjust_legacy_attr - adjustment of legacy file attributes
691 * @b: bus to create files under
692 * @mmap_type: I/O port or memory
693 *
694 * Stub implementation. Can be overridden by arch if necessary.
695 */
696void __weak
697pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
698{
699 return;
700}
701
702/**
703 * pci_create_legacy_files - create legacy I/O port and memory files
704 * @b: bus to create files under
705 *
706 * Some platforms allow access to legacy I/O port and ISA memory space on
707 * a per-bus basis. This routine creates the files and ties them into
708 * their associated read, write and mmap files from pci-sysfs.c
709 *
710 * On error unwind, but don't propagate the error to the caller
711 * as it is ok to set up the PCI bus without these files.
712 */
713void pci_create_legacy_files(struct pci_bus *b)
714{
715 int error;
716
717 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
718 GFP_ATOMIC);
719 if (!b->legacy_io)
720 goto kzalloc_err;
721
722 sysfs_bin_attr_init(b->legacy_io);
723 b->legacy_io->attr.name = "legacy_io";
724 b->legacy_io->size = 0xffff;
725 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
726 b->legacy_io->read = pci_read_legacy_io;
727 b->legacy_io->write = pci_write_legacy_io;
728 b->legacy_io->mmap = pci_mmap_legacy_io;
729 pci_adjust_legacy_attr(b, pci_mmap_io);
730 error = device_create_bin_file(&b->dev, b->legacy_io);
731 if (error)
732 goto legacy_io_err;
733
734 /* Allocated above after the legacy_io struct */
735 b->legacy_mem = b->legacy_io + 1;
736 sysfs_bin_attr_init(b->legacy_mem);
737 b->legacy_mem->attr.name = "legacy_mem";
738 b->legacy_mem->size = 1024*1024;
739 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
740 b->legacy_mem->mmap = pci_mmap_legacy_mem;
741 pci_adjust_legacy_attr(b, pci_mmap_mem);
742 error = device_create_bin_file(&b->dev, b->legacy_mem);
743 if (error)
744 goto legacy_mem_err;
745
746 return;
747
748legacy_mem_err:
749 device_remove_bin_file(&b->dev, b->legacy_io);
750legacy_io_err:
751 kfree(b->legacy_io);
752 b->legacy_io = NULL;
753kzalloc_err:
754 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
755 "and ISA memory resources to sysfs\n");
756 return;
757}
758
759void pci_remove_legacy_files(struct pci_bus *b)
760{
761 if (b->legacy_io) {
762 device_remove_bin_file(&b->dev, b->legacy_io);
763 device_remove_bin_file(&b->dev, b->legacy_mem);
764 kfree(b->legacy_io); /* both are allocated here */
765 }
766}
767#endif /* HAVE_PCI_LEGACY */
768
769#ifdef HAVE_PCI_MMAP
770
771int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
772 enum pci_mmap_api mmap_api)
773{
774 unsigned long nr, start, size, pci_start;
775
776 if (pci_resource_len(pdev, resno) == 0)
777 return 0;
778 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
779 start = vma->vm_pgoff;
780 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
781 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
782 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
783 if (start >= pci_start && start < pci_start + size &&
784 start + nr <= pci_start + size)
785 return 1;
786 return 0;
787}
788
789/**
790 * pci_mmap_resource - map a PCI resource into user memory space
791 * @kobj: kobject for mapping
792 * @attr: struct bin_attribute for the file being mapped
793 * @vma: struct vm_area_struct passed into the mmap
794 * @write_combine: 1 for write_combine mapping
795 *
796 * Use the regular PCI mapping routines to map a PCI resource into userspace.
797 */
798static int
799pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
800 struct vm_area_struct *vma, int write_combine)
801{
802 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
803 struct device, kobj));
804 struct resource *res = attr->private;
805 enum pci_mmap_state mmap_type;
806 resource_size_t start, end;
807 int i;
808
809 for (i = 0; i < PCI_ROM_RESOURCE; i++)
810 if (res == &pdev->resource[i])
811 break;
812 if (i >= PCI_ROM_RESOURCE)
813 return -ENODEV;
814
815 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
816 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
817 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
818 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
819 pci_name(pdev), i,
820 (u64)pci_resource_start(pdev, i),
821 (u64)pci_resource_len(pdev, i));
822 return -EINVAL;
823 }
824
825 /* pci_mmap_page_range() expects the same kind of entry as coming
826 * from /proc/bus/pci/ which is a "user visible" value. If this is
827 * different from the resource itself, arch will do necessary fixup.
828 */
829 pci_resource_to_user(pdev, i, res, &start, &end);
830 vma->vm_pgoff += start >> PAGE_SHIFT;
831 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
832
833 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
834 return -EINVAL;
835
836 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
837}
838
839static int
840pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
841 struct bin_attribute *attr,
842 struct vm_area_struct *vma)
843{
844 return pci_mmap_resource(kobj, attr, vma, 0);
845}
846
847static int
848pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
849 struct bin_attribute *attr,
850 struct vm_area_struct *vma)
851{
852 return pci_mmap_resource(kobj, attr, vma, 1);
853}
854
855static ssize_t
856pci_resource_io(struct file *filp, struct kobject *kobj,
857 struct bin_attribute *attr, char *buf,
858 loff_t off, size_t count, bool write)
859{
860 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
861 struct device, kobj));
862 struct resource *res = attr->private;
863 unsigned long port = off;
864 int i;
865
866 for (i = 0; i < PCI_ROM_RESOURCE; i++)
867 if (res == &pdev->resource[i])
868 break;
869 if (i >= PCI_ROM_RESOURCE)
870 return -ENODEV;
871
872 port += pci_resource_start(pdev, i);
873
874 if (port > pci_resource_end(pdev, i))
875 return 0;
876
877 if (port + count - 1 > pci_resource_end(pdev, i))
878 return -EINVAL;
879
880 switch (count) {
881 case 1:
882 if (write)
883 outb(*(u8 *)buf, port);
884 else
885 *(u8 *)buf = inb(port);
886 return 1;
887 case 2:
888 if (write)
889 outw(*(u16 *)buf, port);
890 else
891 *(u16 *)buf = inw(port);
892 return 2;
893 case 4:
894 if (write)
895 outl(*(u32 *)buf, port);
896 else
897 *(u32 *)buf = inl(port);
898 return 4;
899 }
900 return -EINVAL;
901}
902
903static ssize_t
904pci_read_resource_io(struct file *filp, struct kobject *kobj,
905 struct bin_attribute *attr, char *buf,
906 loff_t off, size_t count)
907{
908 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
909}
910
911static ssize_t
912pci_write_resource_io(struct file *filp, struct kobject *kobj,
913 struct bin_attribute *attr, char *buf,
914 loff_t off, size_t count)
915{
916 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
917}
918
919/**
920 * pci_remove_resource_files - cleanup resource files
921 * @pdev: dev to cleanup
922 *
923 * If we created resource files for @pdev, remove them from sysfs and
924 * free their resources.
925 */
926static void
927pci_remove_resource_files(struct pci_dev *pdev)
928{
929 int i;
930
931 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
932 struct bin_attribute *res_attr;
933
934 res_attr = pdev->res_attr[i];
935 if (res_attr) {
936 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
937 kfree(res_attr);
938 }
939
940 res_attr = pdev->res_attr_wc[i];
941 if (res_attr) {
942 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
943 kfree(res_attr);
944 }
945 }
946}
947
948static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
949{
950 /* allocate attribute structure, piggyback attribute name */
951 int name_len = write_combine ? 13 : 10;
952 struct bin_attribute *res_attr;
953 int retval;
954
955 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
956 if (res_attr) {
957 char *res_attr_name = (char *)(res_attr + 1);
958
959 sysfs_bin_attr_init(res_attr);
960 if (write_combine) {
961 pdev->res_attr_wc[num] = res_attr;
962 sprintf(res_attr_name, "resource%d_wc", num);
963 res_attr->mmap = pci_mmap_resource_wc;
964 } else {
965 pdev->res_attr[num] = res_attr;
966 sprintf(res_attr_name, "resource%d", num);
967 res_attr->mmap = pci_mmap_resource_uc;
968 }
969 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
970 res_attr->read = pci_read_resource_io;
971 res_attr->write = pci_write_resource_io;
972 }
973 res_attr->attr.name = res_attr_name;
974 res_attr->attr.mode = S_IRUSR | S_IWUSR;
975 res_attr->size = pci_resource_len(pdev, num);
976 res_attr->private = &pdev->resource[num];
977 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
978 } else
979 retval = -ENOMEM;
980
981 return retval;
982}
983
984/**
985 * pci_create_resource_files - create resource files in sysfs for @dev
986 * @pdev: dev in question
987 *
988 * Walk the resources in @pdev creating files for each resource available.
989 */
990static int pci_create_resource_files(struct pci_dev *pdev)
991{
992 int i;
993 int retval;
994
995 /* Expose the PCI resources from this device as files */
996 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
997
998 /* skip empty resources */
999 if (!pci_resource_len(pdev, i))
1000 continue;
1001
1002 retval = pci_create_attr(pdev, i, 0);
1003 /* for prefetchable resources, create a WC mappable file */
1004 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1005 retval = pci_create_attr(pdev, i, 1);
1006
1007 if (retval) {
1008 pci_remove_resource_files(pdev);
1009 return retval;
1010 }
1011 }
1012 return 0;
1013}
1014#else /* !HAVE_PCI_MMAP */
1015int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1016void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1017#endif /* HAVE_PCI_MMAP */
1018
1019/**
1020 * pci_write_rom - used to enable access to the PCI ROM display
1021 * @filp: sysfs file
1022 * @kobj: kernel object handle
1023 * @bin_attr: struct bin_attribute for this file
1024 * @buf: user input
1025 * @off: file offset
1026 * @count: number of byte in input
1027 *
1028 * writing anything except 0 enables it
1029 */
1030static ssize_t
1031pci_write_rom(struct file *filp, struct kobject *kobj,
1032 struct bin_attribute *bin_attr,
1033 char *buf, loff_t off, size_t count)
1034{
1035 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1036
1037 if ((off == 0) && (*buf == '0') && (count == 2))
1038 pdev->rom_attr_enabled = 0;
1039 else
1040 pdev->rom_attr_enabled = 1;
1041
1042 return count;
1043}
1044
1045/**
1046 * pci_read_rom - read a PCI ROM
1047 * @filp: sysfs file
1048 * @kobj: kernel object handle
1049 * @bin_attr: struct bin_attribute for this file
1050 * @buf: where to put the data we read from the ROM
1051 * @off: file offset
1052 * @count: number of bytes to read
1053 *
1054 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1055 * device corresponding to @kobj.
1056 */
1057static ssize_t
1058pci_read_rom(struct file *filp, struct kobject *kobj,
1059 struct bin_attribute *bin_attr,
1060 char *buf, loff_t off, size_t count)
1061{
1062 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1063 void __iomem *rom;
1064 size_t size;
1065
1066 if (!pdev->rom_attr_enabled)
1067 return -EINVAL;
1068
1069 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1070 if (!rom || !size)
1071 return -EIO;
1072
1073 if (off >= size)
1074 count = 0;
1075 else {
1076 if (off + count > size)
1077 count = size - off;
1078
1079 memcpy_fromio(buf, rom + off, count);
1080 }
1081 pci_unmap_rom(pdev, rom);
1082
1083 return count;
1084}
1085
1086static struct bin_attribute pci_config_attr = {
1087 .attr = {
1088 .name = "config",
1089 .mode = S_IRUGO | S_IWUSR,
1090 },
1091 .size = PCI_CFG_SPACE_SIZE,
1092 .read = pci_read_config,
1093 .write = pci_write_config,
1094};
1095
1096static struct bin_attribute pcie_config_attr = {
1097 .attr = {
1098 .name = "config",
1099 .mode = S_IRUGO | S_IWUSR,
1100 },
1101 .size = PCI_CFG_SPACE_EXP_SIZE,
1102 .read = pci_read_config,
1103 .write = pci_write_config,
1104};
1105
1106int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
1107{
1108 return 0;
1109}
1110
1111static ssize_t reset_store(struct device *dev,
1112 struct device_attribute *attr, const char *buf,
1113 size_t count)
1114{
1115 struct pci_dev *pdev = to_pci_dev(dev);
1116 unsigned long val;
1117 ssize_t result = strict_strtoul(buf, 0, &val);
1118
1119 if (result < 0)
1120 return result;
1121
1122 if (val != 1)
1123 return -EINVAL;
1124
1125 result = pci_reset_function(pdev);
1126 if (result < 0)
1127 return result;
1128
1129 return count;
1130}
1131
1132static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1133
1134static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1135{
1136 int retval;
1137 struct bin_attribute *attr;
1138
1139 /* If the device has VPD, try to expose it in sysfs. */
1140 if (dev->vpd) {
1141 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1142 if (!attr)
1143 return -ENOMEM;
1144
1145 sysfs_bin_attr_init(attr);
1146 attr->size = dev->vpd->len;
1147 attr->attr.name = "vpd";
1148 attr->attr.mode = S_IRUSR | S_IWUSR;
1149 attr->read = read_vpd_attr;
1150 attr->write = write_vpd_attr;
1151 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1152 if (retval) {
1153 kfree(attr);
1154 return retval;
1155 }
1156 dev->vpd->attr = attr;
1157 }
1158
1159 /* Active State Power Management */
1160 pcie_aspm_create_sysfs_dev_files(dev);
1161
1162 if (!pci_probe_reset_function(dev)) {
1163 retval = device_create_file(&dev->dev, &reset_attr);
1164 if (retval)
1165 goto error;
1166 dev->reset_fn = 1;
1167 }
1168 return 0;
1169
1170error:
1171 pcie_aspm_remove_sysfs_dev_files(dev);
1172 if (dev->vpd && dev->vpd->attr) {
1173 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1174 kfree(dev->vpd->attr);
1175 }
1176
1177 return retval;
1178}
1179
1180int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1181{
1182 int retval;
1183 int rom_size = 0;
1184 struct bin_attribute *attr;
1185
1186 if (!sysfs_initialized)
1187 return -EACCES;
1188
1189 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1190 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1191 else
1192 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1193 if (retval)
1194 goto err;
1195
1196 retval = pci_create_resource_files(pdev);
1197 if (retval)
1198 goto err_config_file;
1199
1200 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1201 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1202 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1203 rom_size = 0x20000;
1204
1205 /* If the device has a ROM, try to expose it in sysfs. */
1206 if (rom_size) {
1207 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1208 if (!attr) {
1209 retval = -ENOMEM;
1210 goto err_resource_files;
1211 }
1212 sysfs_bin_attr_init(attr);
1213 attr->size = rom_size;
1214 attr->attr.name = "rom";
1215 attr->attr.mode = S_IRUSR | S_IWUSR;
1216 attr->read = pci_read_rom;
1217 attr->write = pci_write_rom;
1218 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1219 if (retval) {
1220 kfree(attr);
1221 goto err_resource_files;
1222 }
1223 pdev->rom_attr = attr;
1224 }
1225
1226 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1227 retval = device_create_file(&pdev->dev, &vga_attr);
1228 if (retval)
1229 goto err_rom_file;
1230 }
1231
1232 /* add platform-specific attributes */
1233 retval = pcibios_add_platform_entries(pdev);
1234 if (retval)
1235 goto err_vga_file;
1236
1237 /* add sysfs entries for various capabilities */
1238 retval = pci_create_capabilities_sysfs(pdev);
1239 if (retval)
1240 goto err_vga_file;
1241
1242 pci_create_firmware_label_files(pdev);
1243
1244 return 0;
1245
1246err_vga_file:
1247 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1248 device_remove_file(&pdev->dev, &vga_attr);
1249err_rom_file:
1250 if (rom_size) {
1251 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1252 kfree(pdev->rom_attr);
1253 pdev->rom_attr = NULL;
1254 }
1255err_resource_files:
1256 pci_remove_resource_files(pdev);
1257err_config_file:
1258 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1259 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1260 else
1261 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1262err:
1263 return retval;
1264}
1265
1266static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1267{
1268 if (dev->vpd && dev->vpd->attr) {
1269 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1270 kfree(dev->vpd->attr);
1271 }
1272
1273 pcie_aspm_remove_sysfs_dev_files(dev);
1274 if (dev->reset_fn) {
1275 device_remove_file(&dev->dev, &reset_attr);
1276 dev->reset_fn = 0;
1277 }
1278}
1279
1280/**
1281 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1282 * @pdev: device whose entries we should free
1283 *
1284 * Cleanup when @pdev is removed from sysfs.
1285 */
1286void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1287{
1288 int rom_size = 0;
1289
1290 if (!sysfs_initialized)
1291 return;
1292
1293 pci_remove_capabilities_sysfs(pdev);
1294
1295 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1296 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1297 else
1298 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1299
1300 pci_remove_resource_files(pdev);
1301
1302 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1303 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1304 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1305 rom_size = 0x20000;
1306
1307 if (rom_size && pdev->rom_attr) {
1308 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1309 kfree(pdev->rom_attr);
1310 }
1311
1312 pci_remove_firmware_label_files(pdev);
1313
1314}
1315
1316static int __init pci_sysfs_init(void)
1317{
1318 struct pci_dev *pdev = NULL;
1319 int retval;
1320
1321 sysfs_initialized = 1;
1322 for_each_pci_dev(pdev) {
1323 retval = pci_create_sysfs_dev_files(pdev);
1324 if (retval) {
1325 pci_dev_put(pdev);
1326 return retval;
1327 }
1328 }
1329
1330 return 0;
1331}
1332
1333late_initcall(pci_sysfs_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15#include <linux/bitfield.h>
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/msi.h>
30#include <linux/of.h>
31#include <linux/aperture.h>
32#include "pci.h"
33
34#ifndef ARCH_PCI_DEV_GROUPS
35#define ARCH_PCI_DEV_GROUPS
36#endif
37
38static int sysfs_initialized; /* = 0 */
39
40/* show configuration fields */
41#define pci_config_attr(field, format_string) \
42static ssize_t \
43field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
44{ \
45 struct pci_dev *pdev; \
46 \
47 pdev = to_pci_dev(dev); \
48 return sysfs_emit(buf, format_string, pdev->field); \
49} \
50static DEVICE_ATTR_RO(field)
51
52pci_config_attr(vendor, "0x%04x\n");
53pci_config_attr(device, "0x%04x\n");
54pci_config_attr(subsystem_vendor, "0x%04x\n");
55pci_config_attr(subsystem_device, "0x%04x\n");
56pci_config_attr(revision, "0x%02x\n");
57pci_config_attr(class, "0x%06x\n");
58
59static ssize_t irq_show(struct device *dev,
60 struct device_attribute *attr,
61 char *buf)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
64
65#ifdef CONFIG_PCI_MSI
66 /*
67 * For MSI, show the first MSI IRQ; for all other cases including
68 * MSI-X, show the legacy INTx IRQ.
69 */
70 if (pdev->msi_enabled)
71 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
72#endif
73
74 return sysfs_emit(buf, "%u\n", pdev->irq);
75}
76static DEVICE_ATTR_RO(irq);
77
78static ssize_t broken_parity_status_show(struct device *dev,
79 struct device_attribute *attr,
80 char *buf)
81{
82 struct pci_dev *pdev = to_pci_dev(dev);
83 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
84}
85
86static ssize_t broken_parity_status_store(struct device *dev,
87 struct device_attribute *attr,
88 const char *buf, size_t count)
89{
90 struct pci_dev *pdev = to_pci_dev(dev);
91 unsigned long val;
92
93 if (kstrtoul(buf, 0, &val) < 0)
94 return -EINVAL;
95
96 pdev->broken_parity_status = !!val;
97
98 return count;
99}
100static DEVICE_ATTR_RW(broken_parity_status);
101
102static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
103 struct device_attribute *attr, char *buf)
104{
105 const struct cpumask *mask;
106
107#ifdef CONFIG_NUMA
108 if (dev_to_node(dev) == NUMA_NO_NODE)
109 mask = cpu_online_mask;
110 else
111 mask = cpumask_of_node(dev_to_node(dev));
112#else
113 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
114#endif
115 return cpumap_print_to_pagebuf(list, buf, mask);
116}
117
118static ssize_t local_cpus_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 return pci_dev_show_local_cpu(dev, false, attr, buf);
122}
123static DEVICE_ATTR_RO(local_cpus);
124
125static ssize_t local_cpulist_show(struct device *dev,
126 struct device_attribute *attr, char *buf)
127{
128 return pci_dev_show_local_cpu(dev, true, attr, buf);
129}
130static DEVICE_ATTR_RO(local_cpulist);
131
132/*
133 * PCI Bus Class Devices
134 */
135static ssize_t cpuaffinity_show(struct device *dev,
136 struct device_attribute *attr, char *buf)
137{
138 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
139
140 return cpumap_print_to_pagebuf(false, buf, cpumask);
141}
142static DEVICE_ATTR_RO(cpuaffinity);
143
144static ssize_t cpulistaffinity_show(struct device *dev,
145 struct device_attribute *attr, char *buf)
146{
147 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
148
149 return cpumap_print_to_pagebuf(true, buf, cpumask);
150}
151static DEVICE_ATTR_RO(cpulistaffinity);
152
153static ssize_t power_state_show(struct device *dev,
154 struct device_attribute *attr, char *buf)
155{
156 struct pci_dev *pdev = to_pci_dev(dev);
157
158 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
159}
160static DEVICE_ATTR_RO(power_state);
161
162/* show resources */
163static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
164 char *buf)
165{
166 struct pci_dev *pci_dev = to_pci_dev(dev);
167 int i;
168 int max;
169 resource_size_t start, end;
170 size_t len = 0;
171
172 if (pci_dev->subordinate)
173 max = DEVICE_COUNT_RESOURCE;
174 else
175 max = PCI_BRIDGE_RESOURCES;
176
177 for (i = 0; i < max; i++) {
178 struct resource *res = &pci_dev->resource[i];
179 pci_resource_to_user(pci_dev, i, res, &start, &end);
180 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
181 (unsigned long long)start,
182 (unsigned long long)end,
183 (unsigned long long)res->flags);
184 }
185 return len;
186}
187static DEVICE_ATTR_RO(resource);
188
189static ssize_t max_link_speed_show(struct device *dev,
190 struct device_attribute *attr, char *buf)
191{
192 struct pci_dev *pdev = to_pci_dev(dev);
193
194 return sysfs_emit(buf, "%s\n",
195 pci_speed_string(pcie_get_speed_cap(pdev)));
196}
197static DEVICE_ATTR_RO(max_link_speed);
198
199static ssize_t max_link_width_show(struct device *dev,
200 struct device_attribute *attr, char *buf)
201{
202 struct pci_dev *pdev = to_pci_dev(dev);
203
204 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
205}
206static DEVICE_ATTR_RO(max_link_width);
207
208static ssize_t current_link_speed_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u16 linkstat;
213 int err;
214 enum pci_bus_speed speed;
215
216 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
217 if (err)
218 return -EINVAL;
219
220 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
221
222 return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
223}
224static DEVICE_ATTR_RO(current_link_speed);
225
226static ssize_t current_link_width_show(struct device *dev,
227 struct device_attribute *attr, char *buf)
228{
229 struct pci_dev *pci_dev = to_pci_dev(dev);
230 u16 linkstat;
231 int err;
232
233 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
234 if (err)
235 return -EINVAL;
236
237 return sysfs_emit(buf, "%u\n", FIELD_GET(PCI_EXP_LNKSTA_NLW, linkstat));
238}
239static DEVICE_ATTR_RO(current_link_width);
240
241static ssize_t secondary_bus_number_show(struct device *dev,
242 struct device_attribute *attr,
243 char *buf)
244{
245 struct pci_dev *pci_dev = to_pci_dev(dev);
246 u8 sec_bus;
247 int err;
248
249 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
250 if (err)
251 return -EINVAL;
252
253 return sysfs_emit(buf, "%u\n", sec_bus);
254}
255static DEVICE_ATTR_RO(secondary_bus_number);
256
257static ssize_t subordinate_bus_number_show(struct device *dev,
258 struct device_attribute *attr,
259 char *buf)
260{
261 struct pci_dev *pci_dev = to_pci_dev(dev);
262 u8 sub_bus;
263 int err;
264
265 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
266 if (err)
267 return -EINVAL;
268
269 return sysfs_emit(buf, "%u\n", sub_bus);
270}
271static DEVICE_ATTR_RO(subordinate_bus_number);
272
273static ssize_t ari_enabled_show(struct device *dev,
274 struct device_attribute *attr,
275 char *buf)
276{
277 struct pci_dev *pci_dev = to_pci_dev(dev);
278
279 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
280}
281static DEVICE_ATTR_RO(ari_enabled);
282
283static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
284 char *buf)
285{
286 struct pci_dev *pci_dev = to_pci_dev(dev);
287
288 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
289 pci_dev->vendor, pci_dev->device,
290 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
291 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
292 (u8)(pci_dev->class));
293}
294static DEVICE_ATTR_RO(modalias);
295
296static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
297 const char *buf, size_t count)
298{
299 struct pci_dev *pdev = to_pci_dev(dev);
300 unsigned long val;
301 ssize_t result = 0;
302
303 /* this can crash the machine when done on the "wrong" device */
304 if (!capable(CAP_SYS_ADMIN))
305 return -EPERM;
306
307 if (kstrtoul(buf, 0, &val) < 0)
308 return -EINVAL;
309
310 device_lock(dev);
311 if (dev->driver)
312 result = -EBUSY;
313 else if (val)
314 result = pci_enable_device(pdev);
315 else if (pci_is_enabled(pdev))
316 pci_disable_device(pdev);
317 else
318 result = -EIO;
319 device_unlock(dev);
320
321 return result < 0 ? result : count;
322}
323
324static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
325 char *buf)
326{
327 struct pci_dev *pdev;
328
329 pdev = to_pci_dev(dev);
330 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
331}
332static DEVICE_ATTR_RW(enable);
333
334#ifdef CONFIG_NUMA
335static ssize_t numa_node_store(struct device *dev,
336 struct device_attribute *attr, const char *buf,
337 size_t count)
338{
339 struct pci_dev *pdev = to_pci_dev(dev);
340 int node;
341
342 if (!capable(CAP_SYS_ADMIN))
343 return -EPERM;
344
345 if (kstrtoint(buf, 0, &node) < 0)
346 return -EINVAL;
347
348 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
349 return -EINVAL;
350
351 if (node != NUMA_NO_NODE && !node_online(node))
352 return -EINVAL;
353
354 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
355 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
356 node);
357
358 dev->numa_node = node;
359 return count;
360}
361
362static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
363 char *buf)
364{
365 return sysfs_emit(buf, "%d\n", dev->numa_node);
366}
367static DEVICE_ATTR_RW(numa_node);
368#endif
369
370static ssize_t dma_mask_bits_show(struct device *dev,
371 struct device_attribute *attr, char *buf)
372{
373 struct pci_dev *pdev = to_pci_dev(dev);
374
375 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
376}
377static DEVICE_ATTR_RO(dma_mask_bits);
378
379static ssize_t consistent_dma_mask_bits_show(struct device *dev,
380 struct device_attribute *attr,
381 char *buf)
382{
383 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
384}
385static DEVICE_ATTR_RO(consistent_dma_mask_bits);
386
387static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
388 char *buf)
389{
390 struct pci_dev *pdev = to_pci_dev(dev);
391 struct pci_bus *subordinate = pdev->subordinate;
392
393 return sysfs_emit(buf, "%u\n", subordinate ?
394 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
395 : !pdev->no_msi);
396}
397
398static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
399 const char *buf, size_t count)
400{
401 struct pci_dev *pdev = to_pci_dev(dev);
402 struct pci_bus *subordinate = pdev->subordinate;
403 unsigned long val;
404
405 if (!capable(CAP_SYS_ADMIN))
406 return -EPERM;
407
408 if (kstrtoul(buf, 0, &val) < 0)
409 return -EINVAL;
410
411 /*
412 * "no_msi" and "bus_flags" only affect what happens when a driver
413 * requests MSI or MSI-X. They don't affect any drivers that have
414 * already requested MSI or MSI-X.
415 */
416 if (!subordinate) {
417 pdev->no_msi = !val;
418 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
419 val ? "allowed" : "disallowed");
420 return count;
421 }
422
423 if (val)
424 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
425 else
426 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
427
428 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
429 val ? "allowed" : "disallowed");
430 return count;
431}
432static DEVICE_ATTR_RW(msi_bus);
433
434static ssize_t rescan_store(const struct bus_type *bus, const char *buf, size_t count)
435{
436 unsigned long val;
437 struct pci_bus *b = NULL;
438
439 if (kstrtoul(buf, 0, &val) < 0)
440 return -EINVAL;
441
442 if (val) {
443 pci_lock_rescan_remove();
444 while ((b = pci_find_next_bus(b)) != NULL)
445 pci_rescan_bus(b);
446 pci_unlock_rescan_remove();
447 }
448 return count;
449}
450static BUS_ATTR_WO(rescan);
451
452static struct attribute *pci_bus_attrs[] = {
453 &bus_attr_rescan.attr,
454 NULL,
455};
456
457static const struct attribute_group pci_bus_group = {
458 .attrs = pci_bus_attrs,
459};
460
461const struct attribute_group *pci_bus_groups[] = {
462 &pci_bus_group,
463 NULL,
464};
465
466static ssize_t dev_rescan_store(struct device *dev,
467 struct device_attribute *attr, const char *buf,
468 size_t count)
469{
470 unsigned long val;
471 struct pci_dev *pdev = to_pci_dev(dev);
472
473 if (kstrtoul(buf, 0, &val) < 0)
474 return -EINVAL;
475
476 if (val) {
477 pci_lock_rescan_remove();
478 pci_rescan_bus(pdev->bus);
479 pci_unlock_rescan_remove();
480 }
481 return count;
482}
483static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
484 dev_rescan_store);
485
486static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
487 const char *buf, size_t count)
488{
489 unsigned long val;
490
491 if (kstrtoul(buf, 0, &val) < 0)
492 return -EINVAL;
493
494 if (val && device_remove_file_self(dev, attr))
495 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
496 return count;
497}
498static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
499 remove_store);
500
501static ssize_t bus_rescan_store(struct device *dev,
502 struct device_attribute *attr,
503 const char *buf, size_t count)
504{
505 unsigned long val;
506 struct pci_bus *bus = to_pci_bus(dev);
507
508 if (kstrtoul(buf, 0, &val) < 0)
509 return -EINVAL;
510
511 if (val) {
512 pci_lock_rescan_remove();
513 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
514 pci_rescan_bus_bridge_resize(bus->self);
515 else
516 pci_rescan_bus(bus);
517 pci_unlock_rescan_remove();
518 }
519 return count;
520}
521static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
522 bus_rescan_store);
523
524static ssize_t reset_subordinate_store(struct device *dev,
525 struct device_attribute *attr,
526 const char *buf, size_t count)
527{
528 struct pci_dev *pdev = to_pci_dev(dev);
529 struct pci_bus *bus = pdev->subordinate;
530 unsigned long val;
531
532 if (!capable(CAP_SYS_ADMIN))
533 return -EPERM;
534
535 if (kstrtoul(buf, 0, &val) < 0)
536 return -EINVAL;
537
538 if (val) {
539 int ret = __pci_reset_bus(bus);
540
541 if (ret)
542 return ret;
543 }
544
545 return count;
546}
547static DEVICE_ATTR_WO(reset_subordinate);
548
549#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
550static ssize_t d3cold_allowed_store(struct device *dev,
551 struct device_attribute *attr,
552 const char *buf, size_t count)
553{
554 struct pci_dev *pdev = to_pci_dev(dev);
555 unsigned long val;
556
557 if (kstrtoul(buf, 0, &val) < 0)
558 return -EINVAL;
559
560 pdev->d3cold_allowed = !!val;
561 pci_bridge_d3_update(pdev);
562
563 pm_runtime_resume(dev);
564
565 return count;
566}
567
568static ssize_t d3cold_allowed_show(struct device *dev,
569 struct device_attribute *attr, char *buf)
570{
571 struct pci_dev *pdev = to_pci_dev(dev);
572 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
573}
574static DEVICE_ATTR_RW(d3cold_allowed);
575#endif
576
577#ifdef CONFIG_OF
578static ssize_t devspec_show(struct device *dev,
579 struct device_attribute *attr, char *buf)
580{
581 struct pci_dev *pdev = to_pci_dev(dev);
582 struct device_node *np = pci_device_to_OF_node(pdev);
583
584 if (np == NULL)
585 return 0;
586 return sysfs_emit(buf, "%pOF\n", np);
587}
588static DEVICE_ATTR_RO(devspec);
589#endif
590
591static ssize_t driver_override_store(struct device *dev,
592 struct device_attribute *attr,
593 const char *buf, size_t count)
594{
595 struct pci_dev *pdev = to_pci_dev(dev);
596 int ret;
597
598 ret = driver_set_override(dev, &pdev->driver_override, buf, count);
599 if (ret)
600 return ret;
601
602 return count;
603}
604
605static ssize_t driver_override_show(struct device *dev,
606 struct device_attribute *attr, char *buf)
607{
608 struct pci_dev *pdev = to_pci_dev(dev);
609 ssize_t len;
610
611 device_lock(dev);
612 len = sysfs_emit(buf, "%s\n", pdev->driver_override);
613 device_unlock(dev);
614 return len;
615}
616static DEVICE_ATTR_RW(driver_override);
617
618static struct attribute *pci_dev_attrs[] = {
619 &dev_attr_power_state.attr,
620 &dev_attr_resource.attr,
621 &dev_attr_vendor.attr,
622 &dev_attr_device.attr,
623 &dev_attr_subsystem_vendor.attr,
624 &dev_attr_subsystem_device.attr,
625 &dev_attr_revision.attr,
626 &dev_attr_class.attr,
627 &dev_attr_irq.attr,
628 &dev_attr_local_cpus.attr,
629 &dev_attr_local_cpulist.attr,
630 &dev_attr_modalias.attr,
631#ifdef CONFIG_NUMA
632 &dev_attr_numa_node.attr,
633#endif
634 &dev_attr_dma_mask_bits.attr,
635 &dev_attr_consistent_dma_mask_bits.attr,
636 &dev_attr_enable.attr,
637 &dev_attr_broken_parity_status.attr,
638 &dev_attr_msi_bus.attr,
639#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
640 &dev_attr_d3cold_allowed.attr,
641#endif
642#ifdef CONFIG_OF
643 &dev_attr_devspec.attr,
644#endif
645 &dev_attr_driver_override.attr,
646 &dev_attr_ari_enabled.attr,
647 NULL,
648};
649
650static struct attribute *pci_bridge_attrs[] = {
651 &dev_attr_subordinate_bus_number.attr,
652 &dev_attr_secondary_bus_number.attr,
653 &dev_attr_reset_subordinate.attr,
654 NULL,
655};
656
657static struct attribute *pcie_dev_attrs[] = {
658 &dev_attr_current_link_speed.attr,
659 &dev_attr_current_link_width.attr,
660 &dev_attr_max_link_width.attr,
661 &dev_attr_max_link_speed.attr,
662 NULL,
663};
664
665static struct attribute *pcibus_attrs[] = {
666 &dev_attr_bus_rescan.attr,
667 &dev_attr_cpuaffinity.attr,
668 &dev_attr_cpulistaffinity.attr,
669 NULL,
670};
671
672static const struct attribute_group pcibus_group = {
673 .attrs = pcibus_attrs,
674};
675
676const struct attribute_group *pcibus_groups[] = {
677 &pcibus_group,
678 NULL,
679};
680
681static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
682 char *buf)
683{
684 struct pci_dev *pdev = to_pci_dev(dev);
685 struct pci_dev *vga_dev = vga_default_device();
686
687 if (vga_dev)
688 return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
689
690 return sysfs_emit(buf, "%u\n",
691 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
692 IORESOURCE_ROM_SHADOW));
693}
694static DEVICE_ATTR_RO(boot_vga);
695
696static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
697 struct bin_attribute *bin_attr, char *buf,
698 loff_t off, size_t count)
699{
700 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
701 unsigned int size = 64;
702 loff_t init_off = off;
703 u8 *data = (u8 *) buf;
704
705 /* Several chips lock up trying to read undefined config space */
706 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
707 size = dev->cfg_size;
708 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
709 size = 128;
710
711 if (off > size)
712 return 0;
713 if (off + count > size) {
714 size -= off;
715 count = size;
716 } else {
717 size = count;
718 }
719
720 pci_config_pm_runtime_get(dev);
721
722 if ((off & 1) && size) {
723 u8 val;
724 pci_user_read_config_byte(dev, off, &val);
725 data[off - init_off] = val;
726 off++;
727 size--;
728 }
729
730 if ((off & 3) && size > 2) {
731 u16 val;
732 pci_user_read_config_word(dev, off, &val);
733 data[off - init_off] = val & 0xff;
734 data[off - init_off + 1] = (val >> 8) & 0xff;
735 off += 2;
736 size -= 2;
737 }
738
739 while (size > 3) {
740 u32 val;
741 pci_user_read_config_dword(dev, off, &val);
742 data[off - init_off] = val & 0xff;
743 data[off - init_off + 1] = (val >> 8) & 0xff;
744 data[off - init_off + 2] = (val >> 16) & 0xff;
745 data[off - init_off + 3] = (val >> 24) & 0xff;
746 off += 4;
747 size -= 4;
748 cond_resched();
749 }
750
751 if (size >= 2) {
752 u16 val;
753 pci_user_read_config_word(dev, off, &val);
754 data[off - init_off] = val & 0xff;
755 data[off - init_off + 1] = (val >> 8) & 0xff;
756 off += 2;
757 size -= 2;
758 }
759
760 if (size > 0) {
761 u8 val;
762 pci_user_read_config_byte(dev, off, &val);
763 data[off - init_off] = val;
764 }
765
766 pci_config_pm_runtime_put(dev);
767
768 return count;
769}
770
771static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
772 struct bin_attribute *bin_attr, char *buf,
773 loff_t off, size_t count)
774{
775 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
776 unsigned int size = count;
777 loff_t init_off = off;
778 u8 *data = (u8 *) buf;
779 int ret;
780
781 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
782 if (ret)
783 return ret;
784
785 if (resource_is_exclusive(&dev->driver_exclusive_resource, off,
786 count)) {
787 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",
788 current->comm, off);
789 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
790 }
791
792 if (off > dev->cfg_size)
793 return 0;
794 if (off + count > dev->cfg_size) {
795 size = dev->cfg_size - off;
796 count = size;
797 }
798
799 pci_config_pm_runtime_get(dev);
800
801 if ((off & 1) && size) {
802 pci_user_write_config_byte(dev, off, data[off - init_off]);
803 off++;
804 size--;
805 }
806
807 if ((off & 3) && size > 2) {
808 u16 val = data[off - init_off];
809 val |= (u16) data[off - init_off + 1] << 8;
810 pci_user_write_config_word(dev, off, val);
811 off += 2;
812 size -= 2;
813 }
814
815 while (size > 3) {
816 u32 val = data[off - init_off];
817 val |= (u32) data[off - init_off + 1] << 8;
818 val |= (u32) data[off - init_off + 2] << 16;
819 val |= (u32) data[off - init_off + 3] << 24;
820 pci_user_write_config_dword(dev, off, val);
821 off += 4;
822 size -= 4;
823 }
824
825 if (size >= 2) {
826 u16 val = data[off - init_off];
827 val |= (u16) data[off - init_off + 1] << 8;
828 pci_user_write_config_word(dev, off, val);
829 off += 2;
830 size -= 2;
831 }
832
833 if (size)
834 pci_user_write_config_byte(dev, off, data[off - init_off]);
835
836 pci_config_pm_runtime_put(dev);
837
838 return count;
839}
840static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
841
842static struct bin_attribute *pci_dev_config_attrs[] = {
843 &bin_attr_config,
844 NULL,
845};
846
847static size_t pci_dev_config_attr_bin_size(struct kobject *kobj,
848 const struct bin_attribute *a,
849 int n)
850{
851 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
852
853 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
854 return PCI_CFG_SPACE_EXP_SIZE;
855 return PCI_CFG_SPACE_SIZE;
856}
857
858static const struct attribute_group pci_dev_config_attr_group = {
859 .bin_attrs = pci_dev_config_attrs,
860 .bin_size = pci_dev_config_attr_bin_size,
861};
862
863/*
864 * llseek operation for mmappable PCI resources.
865 * May be left unused if the arch doesn't provide them.
866 */
867static __maybe_unused loff_t
868pci_llseek_resource(struct file *filep,
869 struct kobject *kobj __always_unused,
870 const struct bin_attribute *attr,
871 loff_t offset, int whence)
872{
873 return fixed_size_llseek(filep, offset, whence, attr->size);
874}
875
876#ifdef HAVE_PCI_LEGACY
877/**
878 * pci_read_legacy_io - read byte(s) from legacy I/O port space
879 * @filp: open sysfs file
880 * @kobj: kobject corresponding to file to read from
881 * @bin_attr: struct bin_attribute for this file
882 * @buf: buffer to store results
883 * @off: offset into legacy I/O port space
884 * @count: number of bytes to read
885 *
886 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
887 * callback routine (pci_legacy_read).
888 */
889static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
890 struct bin_attribute *bin_attr, char *buf,
891 loff_t off, size_t count)
892{
893 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
894
895 /* Only support 1, 2 or 4 byte accesses */
896 if (count != 1 && count != 2 && count != 4)
897 return -EINVAL;
898
899 return pci_legacy_read(bus, off, (u32 *)buf, count);
900}
901
902/**
903 * pci_write_legacy_io - write byte(s) to legacy I/O port space
904 * @filp: open sysfs file
905 * @kobj: kobject corresponding to file to read from
906 * @bin_attr: struct bin_attribute for this file
907 * @buf: buffer containing value to be written
908 * @off: offset into legacy I/O port space
909 * @count: number of bytes to write
910 *
911 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
912 * callback routine (pci_legacy_write).
913 */
914static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
915 struct bin_attribute *bin_attr, char *buf,
916 loff_t off, size_t count)
917{
918 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
919
920 /* Only support 1, 2 or 4 byte accesses */
921 if (count != 1 && count != 2 && count != 4)
922 return -EINVAL;
923
924 return pci_legacy_write(bus, off, *(u32 *)buf, count);
925}
926
927/**
928 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
929 * @filp: open sysfs file
930 * @kobj: kobject corresponding to device to be mapped
931 * @attr: struct bin_attribute for this file
932 * @vma: struct vm_area_struct passed to mmap
933 *
934 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
935 * legacy memory space (first meg of bus space) into application virtual
936 * memory space.
937 */
938static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
939 const struct bin_attribute *attr,
940 struct vm_area_struct *vma)
941{
942 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
943
944 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
945}
946
947/**
948 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
949 * @filp: open sysfs file
950 * @kobj: kobject corresponding to device to be mapped
951 * @attr: struct bin_attribute for this file
952 * @vma: struct vm_area_struct passed to mmap
953 *
954 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
955 * legacy IO space (first meg of bus space) into application virtual
956 * memory space. Returns -ENOSYS if the operation isn't supported
957 */
958static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
959 const struct bin_attribute *attr,
960 struct vm_area_struct *vma)
961{
962 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
963
964 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
965}
966
967/**
968 * pci_adjust_legacy_attr - adjustment of legacy file attributes
969 * @b: bus to create files under
970 * @mmap_type: I/O port or memory
971 *
972 * Stub implementation. Can be overridden by arch if necessary.
973 */
974void __weak pci_adjust_legacy_attr(struct pci_bus *b,
975 enum pci_mmap_state mmap_type)
976{
977}
978
979/**
980 * pci_create_legacy_files - create legacy I/O port and memory files
981 * @b: bus to create files under
982 *
983 * Some platforms allow access to legacy I/O port and ISA memory space on
984 * a per-bus basis. This routine creates the files and ties them into
985 * their associated read, write and mmap files from pci-sysfs.c
986 *
987 * On error unwind, but don't propagate the error to the caller
988 * as it is ok to set up the PCI bus without these files.
989 */
990void pci_create_legacy_files(struct pci_bus *b)
991{
992 int error;
993
994 if (!sysfs_initialized)
995 return;
996
997 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
998 GFP_ATOMIC);
999 if (!b->legacy_io)
1000 goto kzalloc_err;
1001
1002 sysfs_bin_attr_init(b->legacy_io);
1003 b->legacy_io->attr.name = "legacy_io";
1004 b->legacy_io->size = 0xffff;
1005 b->legacy_io->attr.mode = 0600;
1006 b->legacy_io->read = pci_read_legacy_io;
1007 b->legacy_io->write = pci_write_legacy_io;
1008 /* See pci_create_attr() for motivation */
1009 b->legacy_io->llseek = pci_llseek_resource;
1010 b->legacy_io->mmap = pci_mmap_legacy_io;
1011 b->legacy_io->f_mapping = iomem_get_mapping;
1012 pci_adjust_legacy_attr(b, pci_mmap_io);
1013 error = device_create_bin_file(&b->dev, b->legacy_io);
1014 if (error)
1015 goto legacy_io_err;
1016
1017 /* Allocated above after the legacy_io struct */
1018 b->legacy_mem = b->legacy_io + 1;
1019 sysfs_bin_attr_init(b->legacy_mem);
1020 b->legacy_mem->attr.name = "legacy_mem";
1021 b->legacy_mem->size = 1024*1024;
1022 b->legacy_mem->attr.mode = 0600;
1023 b->legacy_mem->mmap = pci_mmap_legacy_mem;
1024 /* See pci_create_attr() for motivation */
1025 b->legacy_mem->llseek = pci_llseek_resource;
1026 b->legacy_mem->f_mapping = iomem_get_mapping;
1027 pci_adjust_legacy_attr(b, pci_mmap_mem);
1028 error = device_create_bin_file(&b->dev, b->legacy_mem);
1029 if (error)
1030 goto legacy_mem_err;
1031
1032 return;
1033
1034legacy_mem_err:
1035 device_remove_bin_file(&b->dev, b->legacy_io);
1036legacy_io_err:
1037 kfree(b->legacy_io);
1038 b->legacy_io = NULL;
1039kzalloc_err:
1040 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
1041}
1042
1043void pci_remove_legacy_files(struct pci_bus *b)
1044{
1045 if (b->legacy_io) {
1046 device_remove_bin_file(&b->dev, b->legacy_io);
1047 device_remove_bin_file(&b->dev, b->legacy_mem);
1048 kfree(b->legacy_io); /* both are allocated here */
1049 }
1050}
1051#endif /* HAVE_PCI_LEGACY */
1052
1053#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1054/**
1055 * pci_mmap_resource - map a PCI resource into user memory space
1056 * @kobj: kobject for mapping
1057 * @attr: struct bin_attribute for the file being mapped
1058 * @vma: struct vm_area_struct passed into the mmap
1059 * @write_combine: 1 for write_combine mapping
1060 *
1061 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1062 */
1063static int pci_mmap_resource(struct kobject *kobj, const struct bin_attribute *attr,
1064 struct vm_area_struct *vma, int write_combine)
1065{
1066 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1067 int bar = (unsigned long)attr->private;
1068 enum pci_mmap_state mmap_type;
1069 struct resource *res = &pdev->resource[bar];
1070 int ret;
1071
1072 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1073 if (ret)
1074 return ret;
1075
1076 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1077 return -EINVAL;
1078
1079 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1080 return -EINVAL;
1081
1082 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1083
1084 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1085}
1086
1087static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1088 const struct bin_attribute *attr,
1089 struct vm_area_struct *vma)
1090{
1091 return pci_mmap_resource(kobj, attr, vma, 0);
1092}
1093
1094static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1095 const struct bin_attribute *attr,
1096 struct vm_area_struct *vma)
1097{
1098 return pci_mmap_resource(kobj, attr, vma, 1);
1099}
1100
1101static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1102 struct bin_attribute *attr, char *buf,
1103 loff_t off, size_t count, bool write)
1104{
1105#ifdef CONFIG_HAS_IOPORT
1106 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1107 int bar = (unsigned long)attr->private;
1108 unsigned long port = off;
1109
1110 port += pci_resource_start(pdev, bar);
1111
1112 if (port > pci_resource_end(pdev, bar))
1113 return 0;
1114
1115 if (port + count - 1 > pci_resource_end(pdev, bar))
1116 return -EINVAL;
1117
1118 switch (count) {
1119 case 1:
1120 if (write)
1121 outb(*(u8 *)buf, port);
1122 else
1123 *(u8 *)buf = inb(port);
1124 return 1;
1125 case 2:
1126 if (write)
1127 outw(*(u16 *)buf, port);
1128 else
1129 *(u16 *)buf = inw(port);
1130 return 2;
1131 case 4:
1132 if (write)
1133 outl(*(u32 *)buf, port);
1134 else
1135 *(u32 *)buf = inl(port);
1136 return 4;
1137 }
1138 return -EINVAL;
1139#else
1140 return -ENXIO;
1141#endif
1142}
1143
1144static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1145 struct bin_attribute *attr, char *buf,
1146 loff_t off, size_t count)
1147{
1148 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1149}
1150
1151static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1152 struct bin_attribute *attr, char *buf,
1153 loff_t off, size_t count)
1154{
1155 int ret;
1156
1157 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1158 if (ret)
1159 return ret;
1160
1161 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1162}
1163
1164/**
1165 * pci_remove_resource_files - cleanup resource files
1166 * @pdev: dev to cleanup
1167 *
1168 * If we created resource files for @pdev, remove them from sysfs and
1169 * free their resources.
1170 */
1171static void pci_remove_resource_files(struct pci_dev *pdev)
1172{
1173 int i;
1174
1175 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1176 struct bin_attribute *res_attr;
1177
1178 res_attr = pdev->res_attr[i];
1179 if (res_attr) {
1180 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1181 kfree(res_attr);
1182 }
1183
1184 res_attr = pdev->res_attr_wc[i];
1185 if (res_attr) {
1186 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1187 kfree(res_attr);
1188 }
1189 }
1190}
1191
1192static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1193{
1194 /* allocate attribute structure, piggyback attribute name */
1195 int name_len = write_combine ? 13 : 10;
1196 struct bin_attribute *res_attr;
1197 char *res_attr_name;
1198 int retval;
1199
1200 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1201 if (!res_attr)
1202 return -ENOMEM;
1203
1204 res_attr_name = (char *)(res_attr + 1);
1205
1206 sysfs_bin_attr_init(res_attr);
1207 if (write_combine) {
1208 sprintf(res_attr_name, "resource%d_wc", num);
1209 res_attr->mmap = pci_mmap_resource_wc;
1210 } else {
1211 sprintf(res_attr_name, "resource%d", num);
1212 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1213 res_attr->read = pci_read_resource_io;
1214 res_attr->write = pci_write_resource_io;
1215 if (arch_can_pci_mmap_io())
1216 res_attr->mmap = pci_mmap_resource_uc;
1217 } else {
1218 res_attr->mmap = pci_mmap_resource_uc;
1219 }
1220 }
1221 if (res_attr->mmap) {
1222 res_attr->f_mapping = iomem_get_mapping;
1223 /*
1224 * generic_file_llseek() consults f_mapping->host to determine
1225 * the file size. As iomem_inode knows nothing about the
1226 * attribute, it's not going to work, so override it as well.
1227 */
1228 res_attr->llseek = pci_llseek_resource;
1229 }
1230 res_attr->attr.name = res_attr_name;
1231 res_attr->attr.mode = 0600;
1232 res_attr->size = pci_resource_len(pdev, num);
1233 res_attr->private = (void *)(unsigned long)num;
1234 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1235 if (retval) {
1236 kfree(res_attr);
1237 return retval;
1238 }
1239
1240 if (write_combine)
1241 pdev->res_attr_wc[num] = res_attr;
1242 else
1243 pdev->res_attr[num] = res_attr;
1244
1245 return 0;
1246}
1247
1248/**
1249 * pci_create_resource_files - create resource files in sysfs for @dev
1250 * @pdev: dev in question
1251 *
1252 * Walk the resources in @pdev creating files for each resource available.
1253 */
1254static int pci_create_resource_files(struct pci_dev *pdev)
1255{
1256 int i;
1257 int retval;
1258
1259 /* Expose the PCI resources from this device as files */
1260 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1261
1262 /* skip empty resources */
1263 if (!pci_resource_len(pdev, i))
1264 continue;
1265
1266 retval = pci_create_attr(pdev, i, 0);
1267 /* for prefetchable resources, create a WC mappable file */
1268 if (!retval && arch_can_pci_mmap_wc() &&
1269 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1270 retval = pci_create_attr(pdev, i, 1);
1271 if (retval) {
1272 pci_remove_resource_files(pdev);
1273 return retval;
1274 }
1275 }
1276 return 0;
1277}
1278#else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
1279int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1280void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1281#endif
1282
1283/**
1284 * pci_write_rom - used to enable access to the PCI ROM display
1285 * @filp: sysfs file
1286 * @kobj: kernel object handle
1287 * @bin_attr: struct bin_attribute for this file
1288 * @buf: user input
1289 * @off: file offset
1290 * @count: number of byte in input
1291 *
1292 * writing anything except 0 enables it
1293 */
1294static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1295 struct bin_attribute *bin_attr, char *buf,
1296 loff_t off, size_t count)
1297{
1298 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1299
1300 if ((off == 0) && (*buf == '0') && (count == 2))
1301 pdev->rom_attr_enabled = 0;
1302 else
1303 pdev->rom_attr_enabled = 1;
1304
1305 return count;
1306}
1307
1308/**
1309 * pci_read_rom - read a PCI ROM
1310 * @filp: sysfs file
1311 * @kobj: kernel object handle
1312 * @bin_attr: struct bin_attribute for this file
1313 * @buf: where to put the data we read from the ROM
1314 * @off: file offset
1315 * @count: number of bytes to read
1316 *
1317 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1318 * device corresponding to @kobj.
1319 */
1320static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1321 struct bin_attribute *bin_attr, char *buf,
1322 loff_t off, size_t count)
1323{
1324 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1325 void __iomem *rom;
1326 size_t size;
1327
1328 if (!pdev->rom_attr_enabled)
1329 return -EINVAL;
1330
1331 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1332 if (!rom || !size)
1333 return -EIO;
1334
1335 if (off >= size)
1336 count = 0;
1337 else {
1338 if (off + count > size)
1339 count = size - off;
1340
1341 memcpy_fromio(buf, rom + off, count);
1342 }
1343 pci_unmap_rom(pdev, rom);
1344
1345 return count;
1346}
1347static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
1348
1349static struct bin_attribute *pci_dev_rom_attrs[] = {
1350 &bin_attr_rom,
1351 NULL,
1352};
1353
1354static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
1355 const struct bin_attribute *a, int n)
1356{
1357 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1358
1359 /* If the device has a ROM, try to expose it in sysfs. */
1360 if (!pci_resource_end(pdev, PCI_ROM_RESOURCE))
1361 return 0;
1362
1363 return a->attr.mode;
1364}
1365
1366static size_t pci_dev_rom_attr_bin_size(struct kobject *kobj,
1367 const struct bin_attribute *a, int n)
1368{
1369 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1370
1371 return pci_resource_len(pdev, PCI_ROM_RESOURCE);
1372}
1373
1374static const struct attribute_group pci_dev_rom_attr_group = {
1375 .bin_attrs = pci_dev_rom_attrs,
1376 .is_bin_visible = pci_dev_rom_attr_is_visible,
1377 .bin_size = pci_dev_rom_attr_bin_size,
1378};
1379
1380static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1381 const char *buf, size_t count)
1382{
1383 struct pci_dev *pdev = to_pci_dev(dev);
1384 unsigned long val;
1385 ssize_t result;
1386
1387 if (kstrtoul(buf, 0, &val) < 0)
1388 return -EINVAL;
1389
1390 if (val != 1)
1391 return -EINVAL;
1392
1393 pm_runtime_get_sync(dev);
1394 result = pci_reset_function(pdev);
1395 pm_runtime_put(dev);
1396 if (result < 0)
1397 return result;
1398
1399 return count;
1400}
1401static DEVICE_ATTR_WO(reset);
1402
1403static struct attribute *pci_dev_reset_attrs[] = {
1404 &dev_attr_reset.attr,
1405 NULL,
1406};
1407
1408static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
1409 struct attribute *a, int n)
1410{
1411 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1412
1413 if (!pci_reset_supported(pdev))
1414 return 0;
1415
1416 return a->mode;
1417}
1418
1419static const struct attribute_group pci_dev_reset_attr_group = {
1420 .attrs = pci_dev_reset_attrs,
1421 .is_visible = pci_dev_reset_attr_is_visible,
1422};
1423
1424static ssize_t __resource_resize_show(struct device *dev, int n, char *buf)
1425{
1426 struct pci_dev *pdev = to_pci_dev(dev);
1427 ssize_t ret;
1428
1429 pci_config_pm_runtime_get(pdev);
1430
1431 ret = sysfs_emit(buf, "%016llx\n",
1432 (u64)pci_rebar_get_possible_sizes(pdev, n));
1433
1434 pci_config_pm_runtime_put(pdev);
1435
1436 return ret;
1437}
1438
1439static ssize_t __resource_resize_store(struct device *dev, int n,
1440 const char *buf, size_t count)
1441{
1442 struct pci_dev *pdev = to_pci_dev(dev);
1443 unsigned long size, flags;
1444 int ret, i;
1445 u16 cmd;
1446
1447 if (kstrtoul(buf, 0, &size) < 0)
1448 return -EINVAL;
1449
1450 device_lock(dev);
1451 if (dev->driver) {
1452 ret = -EBUSY;
1453 goto unlock;
1454 }
1455
1456 pci_config_pm_runtime_get(pdev);
1457
1458 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1459 ret = aperture_remove_conflicting_pci_devices(pdev,
1460 "resourceN_resize");
1461 if (ret)
1462 goto pm_put;
1463 }
1464
1465 pci_read_config_word(pdev, PCI_COMMAND, &cmd);
1466 pci_write_config_word(pdev, PCI_COMMAND,
1467 cmd & ~PCI_COMMAND_MEMORY);
1468
1469 flags = pci_resource_flags(pdev, n);
1470
1471 pci_remove_resource_files(pdev);
1472
1473 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1474 if (pci_resource_len(pdev, i) &&
1475 pci_resource_flags(pdev, i) == flags)
1476 pci_release_resource(pdev, i);
1477 }
1478
1479 ret = pci_resize_resource(pdev, n, size);
1480
1481 pci_assign_unassigned_bus_resources(pdev->bus);
1482
1483 if (pci_create_resource_files(pdev))
1484 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");
1485
1486 pci_write_config_word(pdev, PCI_COMMAND, cmd);
1487pm_put:
1488 pci_config_pm_runtime_put(pdev);
1489unlock:
1490 device_unlock(dev);
1491
1492 return ret ? ret : count;
1493}
1494
1495#define pci_dev_resource_resize_attr(n) \
1496static ssize_t resource##n##_resize_show(struct device *dev, \
1497 struct device_attribute *attr, \
1498 char *buf) \
1499{ \
1500 return __resource_resize_show(dev, n, buf); \
1501} \
1502static ssize_t resource##n##_resize_store(struct device *dev, \
1503 struct device_attribute *attr,\
1504 const char *buf, size_t count)\
1505{ \
1506 return __resource_resize_store(dev, n, buf, count); \
1507} \
1508static DEVICE_ATTR_RW(resource##n##_resize)
1509
1510pci_dev_resource_resize_attr(0);
1511pci_dev_resource_resize_attr(1);
1512pci_dev_resource_resize_attr(2);
1513pci_dev_resource_resize_attr(3);
1514pci_dev_resource_resize_attr(4);
1515pci_dev_resource_resize_attr(5);
1516
1517static struct attribute *resource_resize_attrs[] = {
1518 &dev_attr_resource0_resize.attr,
1519 &dev_attr_resource1_resize.attr,
1520 &dev_attr_resource2_resize.attr,
1521 &dev_attr_resource3_resize.attr,
1522 &dev_attr_resource4_resize.attr,
1523 &dev_attr_resource5_resize.attr,
1524 NULL,
1525};
1526
1527static umode_t resource_resize_is_visible(struct kobject *kobj,
1528 struct attribute *a, int n)
1529{
1530 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1531
1532 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
1533}
1534
1535static const struct attribute_group pci_dev_resource_resize_group = {
1536 .attrs = resource_resize_attrs,
1537 .is_visible = resource_resize_is_visible,
1538};
1539
1540int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1541{
1542 if (!sysfs_initialized)
1543 return -EACCES;
1544
1545 return pci_create_resource_files(pdev);
1546}
1547
1548/**
1549 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1550 * @pdev: device whose entries we should free
1551 *
1552 * Cleanup when @pdev is removed from sysfs.
1553 */
1554void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1555{
1556 if (!sysfs_initialized)
1557 return;
1558
1559 pci_remove_resource_files(pdev);
1560}
1561
1562static int __init pci_sysfs_init(void)
1563{
1564 struct pci_dev *pdev = NULL;
1565 struct pci_bus *pbus = NULL;
1566 int retval;
1567
1568 sysfs_initialized = 1;
1569 for_each_pci_dev(pdev) {
1570 retval = pci_create_sysfs_dev_files(pdev);
1571 if (retval) {
1572 pci_dev_put(pdev);
1573 return retval;
1574 }
1575 }
1576
1577 while ((pbus = pci_find_next_bus(pbus)))
1578 pci_create_legacy_files(pbus);
1579
1580 return 0;
1581}
1582late_initcall(pci_sysfs_init);
1583
1584static struct attribute *pci_dev_dev_attrs[] = {
1585 &dev_attr_boot_vga.attr,
1586 NULL,
1587};
1588
1589static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1590 struct attribute *a, int n)
1591{
1592 struct device *dev = kobj_to_dev(kobj);
1593 struct pci_dev *pdev = to_pci_dev(dev);
1594
1595 if (a == &dev_attr_boot_vga.attr && pci_is_vga(pdev))
1596 return a->mode;
1597
1598 return 0;
1599}
1600
1601static struct attribute *pci_dev_hp_attrs[] = {
1602 &dev_attr_remove.attr,
1603 &dev_attr_dev_rescan.attr,
1604 NULL,
1605};
1606
1607static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1608 struct attribute *a, int n)
1609{
1610 struct device *dev = kobj_to_dev(kobj);
1611 struct pci_dev *pdev = to_pci_dev(dev);
1612
1613 if (pdev->is_virtfn)
1614 return 0;
1615
1616 return a->mode;
1617}
1618
1619static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1620 struct attribute *a, int n)
1621{
1622 struct device *dev = kobj_to_dev(kobj);
1623 struct pci_dev *pdev = to_pci_dev(dev);
1624
1625 if (pci_is_bridge(pdev))
1626 return a->mode;
1627
1628 return 0;
1629}
1630
1631static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1632 struct attribute *a, int n)
1633{
1634 struct device *dev = kobj_to_dev(kobj);
1635 struct pci_dev *pdev = to_pci_dev(dev);
1636
1637 if (pci_is_pcie(pdev))
1638 return a->mode;
1639
1640 return 0;
1641}
1642
1643static const struct attribute_group pci_dev_group = {
1644 .attrs = pci_dev_attrs,
1645};
1646
1647const struct attribute_group *pci_dev_groups[] = {
1648 &pci_dev_group,
1649 &pci_dev_config_attr_group,
1650 &pci_dev_rom_attr_group,
1651 &pci_dev_reset_attr_group,
1652 &pci_dev_reset_method_attr_group,
1653 &pci_dev_vpd_attr_group,
1654#ifdef CONFIG_DMI
1655 &pci_dev_smbios_attr_group,
1656#endif
1657#ifdef CONFIG_ACPI
1658 &pci_dev_acpi_attr_group,
1659#endif
1660 &pci_dev_resource_resize_group,
1661 ARCH_PCI_DEV_GROUPS
1662 NULL,
1663};
1664
1665static const struct attribute_group pci_dev_hp_attr_group = {
1666 .attrs = pci_dev_hp_attrs,
1667 .is_visible = pci_dev_hp_attrs_are_visible,
1668};
1669
1670static const struct attribute_group pci_dev_attr_group = {
1671 .attrs = pci_dev_dev_attrs,
1672 .is_visible = pci_dev_attrs_are_visible,
1673};
1674
1675static const struct attribute_group pci_bridge_attr_group = {
1676 .attrs = pci_bridge_attrs,
1677 .is_visible = pci_bridge_attrs_are_visible,
1678};
1679
1680static const struct attribute_group pcie_dev_attr_group = {
1681 .attrs = pcie_dev_attrs,
1682 .is_visible = pcie_dev_attrs_are_visible,
1683};
1684
1685const struct attribute_group *pci_dev_attr_groups[] = {
1686 &pci_dev_attr_group,
1687 &pci_dev_hp_attr_group,
1688#ifdef CONFIG_PCI_IOV
1689 &sriov_pf_dev_attr_group,
1690 &sriov_vf_dev_attr_group,
1691#endif
1692 &pci_bridge_attr_group,
1693 &pcie_dev_attr_group,
1694#ifdef CONFIG_PCIEAER
1695 &aer_stats_attr_group,
1696#endif
1697#ifdef CONFIG_PCIEASPM
1698 &aspm_ctrl_attr_group,
1699#endif
1700 NULL,
1701};