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1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
24#include <linux/fs.h>
25#include <linux/capability.h>
26#include <linux/security.h>
27#include <linux/pci-aspm.h>
28#include <linux/slab.h>
29#include "pci.h"
30
31static int sysfs_initialized; /* = 0 */
32
33/* show configuration fields */
34#define pci_config_attr(field, format_string) \
35static ssize_t \
36field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
37{ \
38 struct pci_dev *pdev; \
39 \
40 pdev = to_pci_dev (dev); \
41 return sprintf (buf, format_string, pdev->field); \
42}
43
44pci_config_attr(vendor, "0x%04x\n");
45pci_config_attr(device, "0x%04x\n");
46pci_config_attr(subsystem_vendor, "0x%04x\n");
47pci_config_attr(subsystem_device, "0x%04x\n");
48pci_config_attr(class, "0x%06x\n");
49pci_config_attr(irq, "%u\n");
50
51static ssize_t broken_parity_status_show(struct device *dev,
52 struct device_attribute *attr,
53 char *buf)
54{
55 struct pci_dev *pdev = to_pci_dev(dev);
56 return sprintf (buf, "%u\n", pdev->broken_parity_status);
57}
58
59static ssize_t broken_parity_status_store(struct device *dev,
60 struct device_attribute *attr,
61 const char *buf, size_t count)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
64 unsigned long val;
65
66 if (strict_strtoul(buf, 0, &val) < 0)
67 return -EINVAL;
68
69 pdev->broken_parity_status = !!val;
70
71 return count;
72}
73
74static ssize_t local_cpus_show(struct device *dev,
75 struct device_attribute *attr, char *buf)
76{
77 const struct cpumask *mask;
78 int len;
79
80#ifdef CONFIG_NUMA
81 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
82 cpumask_of_node(dev_to_node(dev));
83#else
84 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
85#endif
86 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
87 buf[len++] = '\n';
88 buf[len] = '\0';
89 return len;
90}
91
92
93static ssize_t local_cpulist_show(struct device *dev,
94 struct device_attribute *attr, char *buf)
95{
96 const struct cpumask *mask;
97 int len;
98
99#ifdef CONFIG_NUMA
100 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
101 cpumask_of_node(dev_to_node(dev));
102#else
103 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
104#endif
105 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
106 buf[len++] = '\n';
107 buf[len] = '\0';
108 return len;
109}
110
111/*
112 * PCI Bus Class Devices
113 */
114static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
115 int type,
116 struct device_attribute *attr,
117 char *buf)
118{
119 int ret;
120 const struct cpumask *cpumask;
121
122 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
123 ret = type ?
124 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
125 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
126 buf[ret++] = '\n';
127 buf[ret] = '\0';
128 return ret;
129}
130
131static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
132 struct device_attribute *attr,
133 char *buf)
134{
135 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
136}
137
138static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
139 struct device_attribute *attr,
140 char *buf)
141{
142 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
143}
144
145/* show resources */
146static ssize_t
147resource_show(struct device * dev, struct device_attribute *attr, char * buf)
148{
149 struct pci_dev * pci_dev = to_pci_dev(dev);
150 char * str = buf;
151 int i;
152 int max;
153 resource_size_t start, end;
154
155 if (pci_dev->subordinate)
156 max = DEVICE_COUNT_RESOURCE;
157 else
158 max = PCI_BRIDGE_RESOURCES;
159
160 for (i = 0; i < max; i++) {
161 struct resource *res = &pci_dev->resource[i];
162 pci_resource_to_user(pci_dev, i, res, &start, &end);
163 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
164 (unsigned long long)start,
165 (unsigned long long)end,
166 (unsigned long long)res->flags);
167 }
168 return (str - buf);
169}
170
171static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
172{
173 struct pci_dev *pci_dev = to_pci_dev(dev);
174
175 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
176 pci_dev->vendor, pci_dev->device,
177 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
178 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
179 (u8)(pci_dev->class));
180}
181
182static ssize_t is_enabled_store(struct device *dev,
183 struct device_attribute *attr, const char *buf,
184 size_t count)
185{
186 struct pci_dev *pdev = to_pci_dev(dev);
187 unsigned long val;
188 ssize_t result = strict_strtoul(buf, 0, &val);
189
190 if (result < 0)
191 return result;
192
193 /* this can crash the machine when done on the "wrong" device */
194 if (!capable(CAP_SYS_ADMIN))
195 return -EPERM;
196
197 if (!val) {
198 if (pci_is_enabled(pdev))
199 pci_disable_device(pdev);
200 else
201 result = -EIO;
202 } else
203 result = pci_enable_device(pdev);
204
205 return result < 0 ? result : count;
206}
207
208static ssize_t is_enabled_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pdev;
212
213 pdev = to_pci_dev (dev);
214 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
215}
216
217#ifdef CONFIG_NUMA
218static ssize_t
219numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
220{
221 return sprintf (buf, "%d\n", dev->numa_node);
222}
223#endif
224
225static ssize_t
226dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
227{
228 struct pci_dev *pdev = to_pci_dev(dev);
229
230 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
231}
232
233static ssize_t
234consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
235 char *buf)
236{
237 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
238}
239
240static ssize_t
241msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
242{
243 struct pci_dev *pdev = to_pci_dev(dev);
244
245 if (!pdev->subordinate)
246 return 0;
247
248 return sprintf (buf, "%u\n",
249 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
250}
251
252static ssize_t
253msi_bus_store(struct device *dev, struct device_attribute *attr,
254 const char *buf, size_t count)
255{
256 struct pci_dev *pdev = to_pci_dev(dev);
257 unsigned long val;
258
259 if (strict_strtoul(buf, 0, &val) < 0)
260 return -EINVAL;
261
262 /* bad things may happen if the no_msi flag is changed
263 * while some drivers are loaded */
264 if (!capable(CAP_SYS_ADMIN))
265 return -EPERM;
266
267 /* Maybe pci devices without subordinate busses shouldn't even have this
268 * attribute in the first place? */
269 if (!pdev->subordinate)
270 return count;
271
272 /* Is the flag going to change, or keep the value it already had? */
273 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
274 !!val) {
275 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
276
277 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
278 " bad things could happen\n", val ? "" : " not");
279 }
280
281 return count;
282}
283
284#ifdef CONFIG_HOTPLUG
285static DEFINE_MUTEX(pci_remove_rescan_mutex);
286static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
287 size_t count)
288{
289 unsigned long val;
290 struct pci_bus *b = NULL;
291
292 if (strict_strtoul(buf, 0, &val) < 0)
293 return -EINVAL;
294
295 if (val) {
296 mutex_lock(&pci_remove_rescan_mutex);
297 while ((b = pci_find_next_bus(b)) != NULL)
298 pci_rescan_bus(b);
299 mutex_unlock(&pci_remove_rescan_mutex);
300 }
301 return count;
302}
303
304struct bus_attribute pci_bus_attrs[] = {
305 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
306 __ATTR_NULL
307};
308
309static ssize_t
310dev_rescan_store(struct device *dev, struct device_attribute *attr,
311 const char *buf, size_t count)
312{
313 unsigned long val;
314 struct pci_dev *pdev = to_pci_dev(dev);
315
316 if (strict_strtoul(buf, 0, &val) < 0)
317 return -EINVAL;
318
319 if (val) {
320 mutex_lock(&pci_remove_rescan_mutex);
321 pci_rescan_bus(pdev->bus);
322 mutex_unlock(&pci_remove_rescan_mutex);
323 }
324 return count;
325}
326
327static void remove_callback(struct device *dev)
328{
329 struct pci_dev *pdev = to_pci_dev(dev);
330
331 mutex_lock(&pci_remove_rescan_mutex);
332 pci_remove_bus_device(pdev);
333 mutex_unlock(&pci_remove_rescan_mutex);
334}
335
336static ssize_t
337remove_store(struct device *dev, struct device_attribute *dummy,
338 const char *buf, size_t count)
339{
340 int ret = 0;
341 unsigned long val;
342
343 if (strict_strtoul(buf, 0, &val) < 0)
344 return -EINVAL;
345
346 /* An attribute cannot be unregistered by one of its own methods,
347 * so we have to use this roundabout approach.
348 */
349 if (val)
350 ret = device_schedule_callback(dev, remove_callback);
351 if (ret)
352 count = ret;
353 return count;
354}
355
356static ssize_t
357dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
358 const char *buf, size_t count)
359{
360 unsigned long val;
361 struct pci_bus *bus = to_pci_bus(dev);
362
363 if (strict_strtoul(buf, 0, &val) < 0)
364 return -EINVAL;
365
366 if (val) {
367 mutex_lock(&pci_remove_rescan_mutex);
368 pci_rescan_bus(bus);
369 mutex_unlock(&pci_remove_rescan_mutex);
370 }
371 return count;
372}
373
374#endif
375
376struct device_attribute pci_dev_attrs[] = {
377 __ATTR_RO(resource),
378 __ATTR_RO(vendor),
379 __ATTR_RO(device),
380 __ATTR_RO(subsystem_vendor),
381 __ATTR_RO(subsystem_device),
382 __ATTR_RO(class),
383 __ATTR_RO(irq),
384 __ATTR_RO(local_cpus),
385 __ATTR_RO(local_cpulist),
386 __ATTR_RO(modalias),
387#ifdef CONFIG_NUMA
388 __ATTR_RO(numa_node),
389#endif
390 __ATTR_RO(dma_mask_bits),
391 __ATTR_RO(consistent_dma_mask_bits),
392 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
393 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
394 broken_parity_status_show,broken_parity_status_store),
395 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
396#ifdef CONFIG_HOTPLUG
397 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
398 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
399#endif
400 __ATTR_NULL,
401};
402
403struct device_attribute pcibus_dev_attrs[] = {
404#ifdef CONFIG_HOTPLUG
405 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
406#endif
407 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
408 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
409 __ATTR_NULL,
410};
411
412static ssize_t
413boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
414{
415 struct pci_dev *pdev = to_pci_dev(dev);
416
417 return sprintf(buf, "%u\n",
418 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
419 IORESOURCE_ROM_SHADOW));
420}
421struct device_attribute vga_attr = __ATTR_RO(boot_vga);
422
423static ssize_t
424pci_read_config(struct file *filp, struct kobject *kobj,
425 struct bin_attribute *bin_attr,
426 char *buf, loff_t off, size_t count)
427{
428 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
429 unsigned int size = 64;
430 loff_t init_off = off;
431 u8 *data = (u8*) buf;
432
433 /* Several chips lock up trying to read undefined config space */
434 if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
435 size = dev->cfg_size;
436 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
437 size = 128;
438 }
439
440 if (off > size)
441 return 0;
442 if (off + count > size) {
443 size -= off;
444 count = size;
445 } else {
446 size = count;
447 }
448
449 if ((off & 1) && size) {
450 u8 val;
451 pci_user_read_config_byte(dev, off, &val);
452 data[off - init_off] = val;
453 off++;
454 size--;
455 }
456
457 if ((off & 3) && size > 2) {
458 u16 val;
459 pci_user_read_config_word(dev, off, &val);
460 data[off - init_off] = val & 0xff;
461 data[off - init_off + 1] = (val >> 8) & 0xff;
462 off += 2;
463 size -= 2;
464 }
465
466 while (size > 3) {
467 u32 val;
468 pci_user_read_config_dword(dev, off, &val);
469 data[off - init_off] = val & 0xff;
470 data[off - init_off + 1] = (val >> 8) & 0xff;
471 data[off - init_off + 2] = (val >> 16) & 0xff;
472 data[off - init_off + 3] = (val >> 24) & 0xff;
473 off += 4;
474 size -= 4;
475 }
476
477 if (size >= 2) {
478 u16 val;
479 pci_user_read_config_word(dev, off, &val);
480 data[off - init_off] = val & 0xff;
481 data[off - init_off + 1] = (val >> 8) & 0xff;
482 off += 2;
483 size -= 2;
484 }
485
486 if (size > 0) {
487 u8 val;
488 pci_user_read_config_byte(dev, off, &val);
489 data[off - init_off] = val;
490 off++;
491 --size;
492 }
493
494 return count;
495}
496
497static ssize_t
498pci_write_config(struct file* filp, struct kobject *kobj,
499 struct bin_attribute *bin_attr,
500 char *buf, loff_t off, size_t count)
501{
502 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
503 unsigned int size = count;
504 loff_t init_off = off;
505 u8 *data = (u8*) buf;
506
507 if (off > dev->cfg_size)
508 return 0;
509 if (off + count > dev->cfg_size) {
510 size = dev->cfg_size - off;
511 count = size;
512 }
513
514 if ((off & 1) && size) {
515 pci_user_write_config_byte(dev, off, data[off - init_off]);
516 off++;
517 size--;
518 }
519
520 if ((off & 3) && size > 2) {
521 u16 val = data[off - init_off];
522 val |= (u16) data[off - init_off + 1] << 8;
523 pci_user_write_config_word(dev, off, val);
524 off += 2;
525 size -= 2;
526 }
527
528 while (size > 3) {
529 u32 val = data[off - init_off];
530 val |= (u32) data[off - init_off + 1] << 8;
531 val |= (u32) data[off - init_off + 2] << 16;
532 val |= (u32) data[off - init_off + 3] << 24;
533 pci_user_write_config_dword(dev, off, val);
534 off += 4;
535 size -= 4;
536 }
537
538 if (size >= 2) {
539 u16 val = data[off - init_off];
540 val |= (u16) data[off - init_off + 1] << 8;
541 pci_user_write_config_word(dev, off, val);
542 off += 2;
543 size -= 2;
544 }
545
546 if (size) {
547 pci_user_write_config_byte(dev, off, data[off - init_off]);
548 off++;
549 --size;
550 }
551
552 return count;
553}
554
555static ssize_t
556read_vpd_attr(struct file *filp, struct kobject *kobj,
557 struct bin_attribute *bin_attr,
558 char *buf, loff_t off, size_t count)
559{
560 struct pci_dev *dev =
561 to_pci_dev(container_of(kobj, struct device, kobj));
562
563 if (off > bin_attr->size)
564 count = 0;
565 else if (count > bin_attr->size - off)
566 count = bin_attr->size - off;
567
568 return pci_read_vpd(dev, off, count, buf);
569}
570
571static ssize_t
572write_vpd_attr(struct file *filp, struct kobject *kobj,
573 struct bin_attribute *bin_attr,
574 char *buf, loff_t off, size_t count)
575{
576 struct pci_dev *dev =
577 to_pci_dev(container_of(kobj, struct device, kobj));
578
579 if (off > bin_attr->size)
580 count = 0;
581 else if (count > bin_attr->size - off)
582 count = bin_attr->size - off;
583
584 return pci_write_vpd(dev, off, count, buf);
585}
586
587#ifdef HAVE_PCI_LEGACY
588/**
589 * pci_read_legacy_io - read byte(s) from legacy I/O port space
590 * @filp: open sysfs file
591 * @kobj: kobject corresponding to file to read from
592 * @bin_attr: struct bin_attribute for this file
593 * @buf: buffer to store results
594 * @off: offset into legacy I/O port space
595 * @count: number of bytes to read
596 *
597 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
598 * callback routine (pci_legacy_read).
599 */
600static ssize_t
601pci_read_legacy_io(struct file *filp, struct kobject *kobj,
602 struct bin_attribute *bin_attr,
603 char *buf, loff_t off, size_t count)
604{
605 struct pci_bus *bus = to_pci_bus(container_of(kobj,
606 struct device,
607 kobj));
608
609 /* Only support 1, 2 or 4 byte accesses */
610 if (count != 1 && count != 2 && count != 4)
611 return -EINVAL;
612
613 return pci_legacy_read(bus, off, (u32 *)buf, count);
614}
615
616/**
617 * pci_write_legacy_io - write byte(s) to legacy I/O port space
618 * @filp: open sysfs file
619 * @kobj: kobject corresponding to file to read from
620 * @bin_attr: struct bin_attribute for this file
621 * @buf: buffer containing value to be written
622 * @off: offset into legacy I/O port space
623 * @count: number of bytes to write
624 *
625 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
626 * callback routine (pci_legacy_write).
627 */
628static ssize_t
629pci_write_legacy_io(struct file *filp, struct kobject *kobj,
630 struct bin_attribute *bin_attr,
631 char *buf, loff_t off, size_t count)
632{
633 struct pci_bus *bus = to_pci_bus(container_of(kobj,
634 struct device,
635 kobj));
636 /* Only support 1, 2 or 4 byte accesses */
637 if (count != 1 && count != 2 && count != 4)
638 return -EINVAL;
639
640 return pci_legacy_write(bus, off, *(u32 *)buf, count);
641}
642
643/**
644 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
645 * @filp: open sysfs file
646 * @kobj: kobject corresponding to device to be mapped
647 * @attr: struct bin_attribute for this file
648 * @vma: struct vm_area_struct passed to mmap
649 *
650 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
651 * legacy memory space (first meg of bus space) into application virtual
652 * memory space.
653 */
654static int
655pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
656 struct bin_attribute *attr,
657 struct vm_area_struct *vma)
658{
659 struct pci_bus *bus = to_pci_bus(container_of(kobj,
660 struct device,
661 kobj));
662
663 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
664}
665
666/**
667 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
668 * @filp: open sysfs file
669 * @kobj: kobject corresponding to device to be mapped
670 * @attr: struct bin_attribute for this file
671 * @vma: struct vm_area_struct passed to mmap
672 *
673 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
674 * legacy IO space (first meg of bus space) into application virtual
675 * memory space. Returns -ENOSYS if the operation isn't supported
676 */
677static int
678pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
679 struct bin_attribute *attr,
680 struct vm_area_struct *vma)
681{
682 struct pci_bus *bus = to_pci_bus(container_of(kobj,
683 struct device,
684 kobj));
685
686 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
687}
688
689/**
690 * pci_adjust_legacy_attr - adjustment of legacy file attributes
691 * @b: bus to create files under
692 * @mmap_type: I/O port or memory
693 *
694 * Stub implementation. Can be overridden by arch if necessary.
695 */
696void __weak
697pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
698{
699 return;
700}
701
702/**
703 * pci_create_legacy_files - create legacy I/O port and memory files
704 * @b: bus to create files under
705 *
706 * Some platforms allow access to legacy I/O port and ISA memory space on
707 * a per-bus basis. This routine creates the files and ties them into
708 * their associated read, write and mmap files from pci-sysfs.c
709 *
710 * On error unwind, but don't propagate the error to the caller
711 * as it is ok to set up the PCI bus without these files.
712 */
713void pci_create_legacy_files(struct pci_bus *b)
714{
715 int error;
716
717 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
718 GFP_ATOMIC);
719 if (!b->legacy_io)
720 goto kzalloc_err;
721
722 sysfs_bin_attr_init(b->legacy_io);
723 b->legacy_io->attr.name = "legacy_io";
724 b->legacy_io->size = 0xffff;
725 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
726 b->legacy_io->read = pci_read_legacy_io;
727 b->legacy_io->write = pci_write_legacy_io;
728 b->legacy_io->mmap = pci_mmap_legacy_io;
729 pci_adjust_legacy_attr(b, pci_mmap_io);
730 error = device_create_bin_file(&b->dev, b->legacy_io);
731 if (error)
732 goto legacy_io_err;
733
734 /* Allocated above after the legacy_io struct */
735 b->legacy_mem = b->legacy_io + 1;
736 sysfs_bin_attr_init(b->legacy_mem);
737 b->legacy_mem->attr.name = "legacy_mem";
738 b->legacy_mem->size = 1024*1024;
739 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
740 b->legacy_mem->mmap = pci_mmap_legacy_mem;
741 pci_adjust_legacy_attr(b, pci_mmap_mem);
742 error = device_create_bin_file(&b->dev, b->legacy_mem);
743 if (error)
744 goto legacy_mem_err;
745
746 return;
747
748legacy_mem_err:
749 device_remove_bin_file(&b->dev, b->legacy_io);
750legacy_io_err:
751 kfree(b->legacy_io);
752 b->legacy_io = NULL;
753kzalloc_err:
754 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
755 "and ISA memory resources to sysfs\n");
756 return;
757}
758
759void pci_remove_legacy_files(struct pci_bus *b)
760{
761 if (b->legacy_io) {
762 device_remove_bin_file(&b->dev, b->legacy_io);
763 device_remove_bin_file(&b->dev, b->legacy_mem);
764 kfree(b->legacy_io); /* both are allocated here */
765 }
766}
767#endif /* HAVE_PCI_LEGACY */
768
769#ifdef HAVE_PCI_MMAP
770
771int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
772 enum pci_mmap_api mmap_api)
773{
774 unsigned long nr, start, size, pci_start;
775
776 if (pci_resource_len(pdev, resno) == 0)
777 return 0;
778 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
779 start = vma->vm_pgoff;
780 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
781 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
782 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
783 if (start >= pci_start && start < pci_start + size &&
784 start + nr <= pci_start + size)
785 return 1;
786 return 0;
787}
788
789/**
790 * pci_mmap_resource - map a PCI resource into user memory space
791 * @kobj: kobject for mapping
792 * @attr: struct bin_attribute for the file being mapped
793 * @vma: struct vm_area_struct passed into the mmap
794 * @write_combine: 1 for write_combine mapping
795 *
796 * Use the regular PCI mapping routines to map a PCI resource into userspace.
797 */
798static int
799pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
800 struct vm_area_struct *vma, int write_combine)
801{
802 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
803 struct device, kobj));
804 struct resource *res = attr->private;
805 enum pci_mmap_state mmap_type;
806 resource_size_t start, end;
807 int i;
808
809 for (i = 0; i < PCI_ROM_RESOURCE; i++)
810 if (res == &pdev->resource[i])
811 break;
812 if (i >= PCI_ROM_RESOURCE)
813 return -ENODEV;
814
815 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
816 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
817 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
818 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
819 pci_name(pdev), i,
820 (u64)pci_resource_start(pdev, i),
821 (u64)pci_resource_len(pdev, i));
822 return -EINVAL;
823 }
824
825 /* pci_mmap_page_range() expects the same kind of entry as coming
826 * from /proc/bus/pci/ which is a "user visible" value. If this is
827 * different from the resource itself, arch will do necessary fixup.
828 */
829 pci_resource_to_user(pdev, i, res, &start, &end);
830 vma->vm_pgoff += start >> PAGE_SHIFT;
831 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
832
833 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
834 return -EINVAL;
835
836 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
837}
838
839static int
840pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
841 struct bin_attribute *attr,
842 struct vm_area_struct *vma)
843{
844 return pci_mmap_resource(kobj, attr, vma, 0);
845}
846
847static int
848pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
849 struct bin_attribute *attr,
850 struct vm_area_struct *vma)
851{
852 return pci_mmap_resource(kobj, attr, vma, 1);
853}
854
855static ssize_t
856pci_resource_io(struct file *filp, struct kobject *kobj,
857 struct bin_attribute *attr, char *buf,
858 loff_t off, size_t count, bool write)
859{
860 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
861 struct device, kobj));
862 struct resource *res = attr->private;
863 unsigned long port = off;
864 int i;
865
866 for (i = 0; i < PCI_ROM_RESOURCE; i++)
867 if (res == &pdev->resource[i])
868 break;
869 if (i >= PCI_ROM_RESOURCE)
870 return -ENODEV;
871
872 port += pci_resource_start(pdev, i);
873
874 if (port > pci_resource_end(pdev, i))
875 return 0;
876
877 if (port + count - 1 > pci_resource_end(pdev, i))
878 return -EINVAL;
879
880 switch (count) {
881 case 1:
882 if (write)
883 outb(*(u8 *)buf, port);
884 else
885 *(u8 *)buf = inb(port);
886 return 1;
887 case 2:
888 if (write)
889 outw(*(u16 *)buf, port);
890 else
891 *(u16 *)buf = inw(port);
892 return 2;
893 case 4:
894 if (write)
895 outl(*(u32 *)buf, port);
896 else
897 *(u32 *)buf = inl(port);
898 return 4;
899 }
900 return -EINVAL;
901}
902
903static ssize_t
904pci_read_resource_io(struct file *filp, struct kobject *kobj,
905 struct bin_attribute *attr, char *buf,
906 loff_t off, size_t count)
907{
908 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
909}
910
911static ssize_t
912pci_write_resource_io(struct file *filp, struct kobject *kobj,
913 struct bin_attribute *attr, char *buf,
914 loff_t off, size_t count)
915{
916 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
917}
918
919/**
920 * pci_remove_resource_files - cleanup resource files
921 * @pdev: dev to cleanup
922 *
923 * If we created resource files for @pdev, remove them from sysfs and
924 * free their resources.
925 */
926static void
927pci_remove_resource_files(struct pci_dev *pdev)
928{
929 int i;
930
931 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
932 struct bin_attribute *res_attr;
933
934 res_attr = pdev->res_attr[i];
935 if (res_attr) {
936 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
937 kfree(res_attr);
938 }
939
940 res_attr = pdev->res_attr_wc[i];
941 if (res_attr) {
942 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
943 kfree(res_attr);
944 }
945 }
946}
947
948static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
949{
950 /* allocate attribute structure, piggyback attribute name */
951 int name_len = write_combine ? 13 : 10;
952 struct bin_attribute *res_attr;
953 int retval;
954
955 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
956 if (res_attr) {
957 char *res_attr_name = (char *)(res_attr + 1);
958
959 sysfs_bin_attr_init(res_attr);
960 if (write_combine) {
961 pdev->res_attr_wc[num] = res_attr;
962 sprintf(res_attr_name, "resource%d_wc", num);
963 res_attr->mmap = pci_mmap_resource_wc;
964 } else {
965 pdev->res_attr[num] = res_attr;
966 sprintf(res_attr_name, "resource%d", num);
967 res_attr->mmap = pci_mmap_resource_uc;
968 }
969 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
970 res_attr->read = pci_read_resource_io;
971 res_attr->write = pci_write_resource_io;
972 }
973 res_attr->attr.name = res_attr_name;
974 res_attr->attr.mode = S_IRUSR | S_IWUSR;
975 res_attr->size = pci_resource_len(pdev, num);
976 res_attr->private = &pdev->resource[num];
977 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
978 } else
979 retval = -ENOMEM;
980
981 return retval;
982}
983
984/**
985 * pci_create_resource_files - create resource files in sysfs for @dev
986 * @pdev: dev in question
987 *
988 * Walk the resources in @pdev creating files for each resource available.
989 */
990static int pci_create_resource_files(struct pci_dev *pdev)
991{
992 int i;
993 int retval;
994
995 /* Expose the PCI resources from this device as files */
996 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
997
998 /* skip empty resources */
999 if (!pci_resource_len(pdev, i))
1000 continue;
1001
1002 retval = pci_create_attr(pdev, i, 0);
1003 /* for prefetchable resources, create a WC mappable file */
1004 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1005 retval = pci_create_attr(pdev, i, 1);
1006
1007 if (retval) {
1008 pci_remove_resource_files(pdev);
1009 return retval;
1010 }
1011 }
1012 return 0;
1013}
1014#else /* !HAVE_PCI_MMAP */
1015int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1016void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1017#endif /* HAVE_PCI_MMAP */
1018
1019/**
1020 * pci_write_rom - used to enable access to the PCI ROM display
1021 * @filp: sysfs file
1022 * @kobj: kernel object handle
1023 * @bin_attr: struct bin_attribute for this file
1024 * @buf: user input
1025 * @off: file offset
1026 * @count: number of byte in input
1027 *
1028 * writing anything except 0 enables it
1029 */
1030static ssize_t
1031pci_write_rom(struct file *filp, struct kobject *kobj,
1032 struct bin_attribute *bin_attr,
1033 char *buf, loff_t off, size_t count)
1034{
1035 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1036
1037 if ((off == 0) && (*buf == '0') && (count == 2))
1038 pdev->rom_attr_enabled = 0;
1039 else
1040 pdev->rom_attr_enabled = 1;
1041
1042 return count;
1043}
1044
1045/**
1046 * pci_read_rom - read a PCI ROM
1047 * @filp: sysfs file
1048 * @kobj: kernel object handle
1049 * @bin_attr: struct bin_attribute for this file
1050 * @buf: where to put the data we read from the ROM
1051 * @off: file offset
1052 * @count: number of bytes to read
1053 *
1054 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1055 * device corresponding to @kobj.
1056 */
1057static ssize_t
1058pci_read_rom(struct file *filp, struct kobject *kobj,
1059 struct bin_attribute *bin_attr,
1060 char *buf, loff_t off, size_t count)
1061{
1062 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1063 void __iomem *rom;
1064 size_t size;
1065
1066 if (!pdev->rom_attr_enabled)
1067 return -EINVAL;
1068
1069 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1070 if (!rom || !size)
1071 return -EIO;
1072
1073 if (off >= size)
1074 count = 0;
1075 else {
1076 if (off + count > size)
1077 count = size - off;
1078
1079 memcpy_fromio(buf, rom + off, count);
1080 }
1081 pci_unmap_rom(pdev, rom);
1082
1083 return count;
1084}
1085
1086static struct bin_attribute pci_config_attr = {
1087 .attr = {
1088 .name = "config",
1089 .mode = S_IRUGO | S_IWUSR,
1090 },
1091 .size = PCI_CFG_SPACE_SIZE,
1092 .read = pci_read_config,
1093 .write = pci_write_config,
1094};
1095
1096static struct bin_attribute pcie_config_attr = {
1097 .attr = {
1098 .name = "config",
1099 .mode = S_IRUGO | S_IWUSR,
1100 },
1101 .size = PCI_CFG_SPACE_EXP_SIZE,
1102 .read = pci_read_config,
1103 .write = pci_write_config,
1104};
1105
1106int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
1107{
1108 return 0;
1109}
1110
1111static ssize_t reset_store(struct device *dev,
1112 struct device_attribute *attr, const char *buf,
1113 size_t count)
1114{
1115 struct pci_dev *pdev = to_pci_dev(dev);
1116 unsigned long val;
1117 ssize_t result = strict_strtoul(buf, 0, &val);
1118
1119 if (result < 0)
1120 return result;
1121
1122 if (val != 1)
1123 return -EINVAL;
1124
1125 result = pci_reset_function(pdev);
1126 if (result < 0)
1127 return result;
1128
1129 return count;
1130}
1131
1132static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1133
1134static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1135{
1136 int retval;
1137 struct bin_attribute *attr;
1138
1139 /* If the device has VPD, try to expose it in sysfs. */
1140 if (dev->vpd) {
1141 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1142 if (!attr)
1143 return -ENOMEM;
1144
1145 sysfs_bin_attr_init(attr);
1146 attr->size = dev->vpd->len;
1147 attr->attr.name = "vpd";
1148 attr->attr.mode = S_IRUSR | S_IWUSR;
1149 attr->read = read_vpd_attr;
1150 attr->write = write_vpd_attr;
1151 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1152 if (retval) {
1153 kfree(attr);
1154 return retval;
1155 }
1156 dev->vpd->attr = attr;
1157 }
1158
1159 /* Active State Power Management */
1160 pcie_aspm_create_sysfs_dev_files(dev);
1161
1162 if (!pci_probe_reset_function(dev)) {
1163 retval = device_create_file(&dev->dev, &reset_attr);
1164 if (retval)
1165 goto error;
1166 dev->reset_fn = 1;
1167 }
1168 return 0;
1169
1170error:
1171 pcie_aspm_remove_sysfs_dev_files(dev);
1172 if (dev->vpd && dev->vpd->attr) {
1173 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1174 kfree(dev->vpd->attr);
1175 }
1176
1177 return retval;
1178}
1179
1180int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1181{
1182 int retval;
1183 int rom_size = 0;
1184 struct bin_attribute *attr;
1185
1186 if (!sysfs_initialized)
1187 return -EACCES;
1188
1189 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1190 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1191 else
1192 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1193 if (retval)
1194 goto err;
1195
1196 retval = pci_create_resource_files(pdev);
1197 if (retval)
1198 goto err_config_file;
1199
1200 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1201 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1202 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1203 rom_size = 0x20000;
1204
1205 /* If the device has a ROM, try to expose it in sysfs. */
1206 if (rom_size) {
1207 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1208 if (!attr) {
1209 retval = -ENOMEM;
1210 goto err_resource_files;
1211 }
1212 sysfs_bin_attr_init(attr);
1213 attr->size = rom_size;
1214 attr->attr.name = "rom";
1215 attr->attr.mode = S_IRUSR | S_IWUSR;
1216 attr->read = pci_read_rom;
1217 attr->write = pci_write_rom;
1218 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1219 if (retval) {
1220 kfree(attr);
1221 goto err_resource_files;
1222 }
1223 pdev->rom_attr = attr;
1224 }
1225
1226 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1227 retval = device_create_file(&pdev->dev, &vga_attr);
1228 if (retval)
1229 goto err_rom_file;
1230 }
1231
1232 /* add platform-specific attributes */
1233 retval = pcibios_add_platform_entries(pdev);
1234 if (retval)
1235 goto err_vga_file;
1236
1237 /* add sysfs entries for various capabilities */
1238 retval = pci_create_capabilities_sysfs(pdev);
1239 if (retval)
1240 goto err_vga_file;
1241
1242 pci_create_firmware_label_files(pdev);
1243
1244 return 0;
1245
1246err_vga_file:
1247 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1248 device_remove_file(&pdev->dev, &vga_attr);
1249err_rom_file:
1250 if (rom_size) {
1251 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1252 kfree(pdev->rom_attr);
1253 pdev->rom_attr = NULL;
1254 }
1255err_resource_files:
1256 pci_remove_resource_files(pdev);
1257err_config_file:
1258 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1259 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1260 else
1261 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1262err:
1263 return retval;
1264}
1265
1266static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1267{
1268 if (dev->vpd && dev->vpd->attr) {
1269 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1270 kfree(dev->vpd->attr);
1271 }
1272
1273 pcie_aspm_remove_sysfs_dev_files(dev);
1274 if (dev->reset_fn) {
1275 device_remove_file(&dev->dev, &reset_attr);
1276 dev->reset_fn = 0;
1277 }
1278}
1279
1280/**
1281 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1282 * @pdev: device whose entries we should free
1283 *
1284 * Cleanup when @pdev is removed from sysfs.
1285 */
1286void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1287{
1288 int rom_size = 0;
1289
1290 if (!sysfs_initialized)
1291 return;
1292
1293 pci_remove_capabilities_sysfs(pdev);
1294
1295 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1296 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1297 else
1298 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1299
1300 pci_remove_resource_files(pdev);
1301
1302 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1303 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1304 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1305 rom_size = 0x20000;
1306
1307 if (rom_size && pdev->rom_attr) {
1308 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1309 kfree(pdev->rom_attr);
1310 }
1311
1312 pci_remove_firmware_label_files(pdev);
1313
1314}
1315
1316static int __init pci_sysfs_init(void)
1317{
1318 struct pci_dev *pdev = NULL;
1319 int retval;
1320
1321 sysfs_initialized = 1;
1322 for_each_pci_dev(pdev) {
1323 retval = pci_create_sysfs_dev_files(pdev);
1324 if (retval) {
1325 pci_dev_put(pdev);
1326 return retval;
1327 }
1328 }
1329
1330 return 0;
1331}
1332
1333late_initcall(pci_sysfs_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/msi.h>
30#include <linux/of.h>
31#include <linux/aperture.h>
32#include "pci.h"
33
34static int sysfs_initialized; /* = 0 */
35
36/* show configuration fields */
37#define pci_config_attr(field, format_string) \
38static ssize_t \
39field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
40{ \
41 struct pci_dev *pdev; \
42 \
43 pdev = to_pci_dev(dev); \
44 return sysfs_emit(buf, format_string, pdev->field); \
45} \
46static DEVICE_ATTR_RO(field)
47
48pci_config_attr(vendor, "0x%04x\n");
49pci_config_attr(device, "0x%04x\n");
50pci_config_attr(subsystem_vendor, "0x%04x\n");
51pci_config_attr(subsystem_device, "0x%04x\n");
52pci_config_attr(revision, "0x%02x\n");
53pci_config_attr(class, "0x%06x\n");
54
55static ssize_t irq_show(struct device *dev,
56 struct device_attribute *attr,
57 char *buf)
58{
59 struct pci_dev *pdev = to_pci_dev(dev);
60
61#ifdef CONFIG_PCI_MSI
62 /*
63 * For MSI, show the first MSI IRQ; for all other cases including
64 * MSI-X, show the legacy INTx IRQ.
65 */
66 if (pdev->msi_enabled)
67 return sysfs_emit(buf, "%u\n", pci_irq_vector(pdev, 0));
68#endif
69
70 return sysfs_emit(buf, "%u\n", pdev->irq);
71}
72static DEVICE_ATTR_RO(irq);
73
74static ssize_t broken_parity_status_show(struct device *dev,
75 struct device_attribute *attr,
76 char *buf)
77{
78 struct pci_dev *pdev = to_pci_dev(dev);
79 return sysfs_emit(buf, "%u\n", pdev->broken_parity_status);
80}
81
82static ssize_t broken_parity_status_store(struct device *dev,
83 struct device_attribute *attr,
84 const char *buf, size_t count)
85{
86 struct pci_dev *pdev = to_pci_dev(dev);
87 unsigned long val;
88
89 if (kstrtoul(buf, 0, &val) < 0)
90 return -EINVAL;
91
92 pdev->broken_parity_status = !!val;
93
94 return count;
95}
96static DEVICE_ATTR_RW(broken_parity_status);
97
98static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
99 struct device_attribute *attr, char *buf)
100{
101 const struct cpumask *mask;
102
103#ifdef CONFIG_NUMA
104 if (dev_to_node(dev) == NUMA_NO_NODE)
105 mask = cpu_online_mask;
106 else
107 mask = cpumask_of_node(dev_to_node(dev));
108#else
109 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
110#endif
111 return cpumap_print_to_pagebuf(list, buf, mask);
112}
113
114static ssize_t local_cpus_show(struct device *dev,
115 struct device_attribute *attr, char *buf)
116{
117 return pci_dev_show_local_cpu(dev, false, attr, buf);
118}
119static DEVICE_ATTR_RO(local_cpus);
120
121static ssize_t local_cpulist_show(struct device *dev,
122 struct device_attribute *attr, char *buf)
123{
124 return pci_dev_show_local_cpu(dev, true, attr, buf);
125}
126static DEVICE_ATTR_RO(local_cpulist);
127
128/*
129 * PCI Bus Class Devices
130 */
131static ssize_t cpuaffinity_show(struct device *dev,
132 struct device_attribute *attr, char *buf)
133{
134 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
135
136 return cpumap_print_to_pagebuf(false, buf, cpumask);
137}
138static DEVICE_ATTR_RO(cpuaffinity);
139
140static ssize_t cpulistaffinity_show(struct device *dev,
141 struct device_attribute *attr, char *buf)
142{
143 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
144
145 return cpumap_print_to_pagebuf(true, buf, cpumask);
146}
147static DEVICE_ATTR_RO(cpulistaffinity);
148
149static ssize_t power_state_show(struct device *dev,
150 struct device_attribute *attr, char *buf)
151{
152 struct pci_dev *pdev = to_pci_dev(dev);
153
154 return sysfs_emit(buf, "%s\n", pci_power_name(pdev->current_state));
155}
156static DEVICE_ATTR_RO(power_state);
157
158/* show resources */
159static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
160 char *buf)
161{
162 struct pci_dev *pci_dev = to_pci_dev(dev);
163 int i;
164 int max;
165 resource_size_t start, end;
166 size_t len = 0;
167
168 if (pci_dev->subordinate)
169 max = DEVICE_COUNT_RESOURCE;
170 else
171 max = PCI_BRIDGE_RESOURCES;
172
173 for (i = 0; i < max; i++) {
174 struct resource *res = &pci_dev->resource[i];
175 pci_resource_to_user(pci_dev, i, res, &start, &end);
176 len += sysfs_emit_at(buf, len, "0x%016llx 0x%016llx 0x%016llx\n",
177 (unsigned long long)start,
178 (unsigned long long)end,
179 (unsigned long long)res->flags);
180 }
181 return len;
182}
183static DEVICE_ATTR_RO(resource);
184
185static ssize_t max_link_speed_show(struct device *dev,
186 struct device_attribute *attr, char *buf)
187{
188 struct pci_dev *pdev = to_pci_dev(dev);
189
190 return sysfs_emit(buf, "%s\n",
191 pci_speed_string(pcie_get_speed_cap(pdev)));
192}
193static DEVICE_ATTR_RO(max_link_speed);
194
195static ssize_t max_link_width_show(struct device *dev,
196 struct device_attribute *attr, char *buf)
197{
198 struct pci_dev *pdev = to_pci_dev(dev);
199
200 return sysfs_emit(buf, "%u\n", pcie_get_width_cap(pdev));
201}
202static DEVICE_ATTR_RO(max_link_width);
203
204static ssize_t current_link_speed_show(struct device *dev,
205 struct device_attribute *attr, char *buf)
206{
207 struct pci_dev *pci_dev = to_pci_dev(dev);
208 u16 linkstat;
209 int err;
210 enum pci_bus_speed speed;
211
212 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
213 if (err)
214 return -EINVAL;
215
216 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
217
218 return sysfs_emit(buf, "%s\n", pci_speed_string(speed));
219}
220static DEVICE_ATTR_RO(current_link_speed);
221
222static ssize_t current_link_width_show(struct device *dev,
223 struct device_attribute *attr, char *buf)
224{
225 struct pci_dev *pci_dev = to_pci_dev(dev);
226 u16 linkstat;
227 int err;
228
229 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
230 if (err)
231 return -EINVAL;
232
233 return sysfs_emit(buf, "%u\n",
234 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
235}
236static DEVICE_ATTR_RO(current_link_width);
237
238static ssize_t secondary_bus_number_show(struct device *dev,
239 struct device_attribute *attr,
240 char *buf)
241{
242 struct pci_dev *pci_dev = to_pci_dev(dev);
243 u8 sec_bus;
244 int err;
245
246 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
247 if (err)
248 return -EINVAL;
249
250 return sysfs_emit(buf, "%u\n", sec_bus);
251}
252static DEVICE_ATTR_RO(secondary_bus_number);
253
254static ssize_t subordinate_bus_number_show(struct device *dev,
255 struct device_attribute *attr,
256 char *buf)
257{
258 struct pci_dev *pci_dev = to_pci_dev(dev);
259 u8 sub_bus;
260 int err;
261
262 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
263 if (err)
264 return -EINVAL;
265
266 return sysfs_emit(buf, "%u\n", sub_bus);
267}
268static DEVICE_ATTR_RO(subordinate_bus_number);
269
270static ssize_t ari_enabled_show(struct device *dev,
271 struct device_attribute *attr,
272 char *buf)
273{
274 struct pci_dev *pci_dev = to_pci_dev(dev);
275
276 return sysfs_emit(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
277}
278static DEVICE_ATTR_RO(ari_enabled);
279
280static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
281 char *buf)
282{
283 struct pci_dev *pci_dev = to_pci_dev(dev);
284
285 return sysfs_emit(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
286 pci_dev->vendor, pci_dev->device,
287 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
288 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
289 (u8)(pci_dev->class));
290}
291static DEVICE_ATTR_RO(modalias);
292
293static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
294 const char *buf, size_t count)
295{
296 struct pci_dev *pdev = to_pci_dev(dev);
297 unsigned long val;
298 ssize_t result = 0;
299
300 /* this can crash the machine when done on the "wrong" device */
301 if (!capable(CAP_SYS_ADMIN))
302 return -EPERM;
303
304 if (kstrtoul(buf, 0, &val) < 0)
305 return -EINVAL;
306
307 device_lock(dev);
308 if (dev->driver)
309 result = -EBUSY;
310 else if (val)
311 result = pci_enable_device(pdev);
312 else if (pci_is_enabled(pdev))
313 pci_disable_device(pdev);
314 else
315 result = -EIO;
316 device_unlock(dev);
317
318 return result < 0 ? result : count;
319}
320
321static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
322 char *buf)
323{
324 struct pci_dev *pdev;
325
326 pdev = to_pci_dev(dev);
327 return sysfs_emit(buf, "%u\n", atomic_read(&pdev->enable_cnt));
328}
329static DEVICE_ATTR_RW(enable);
330
331#ifdef CONFIG_NUMA
332static ssize_t numa_node_store(struct device *dev,
333 struct device_attribute *attr, const char *buf,
334 size_t count)
335{
336 struct pci_dev *pdev = to_pci_dev(dev);
337 int node;
338
339 if (!capable(CAP_SYS_ADMIN))
340 return -EPERM;
341
342 if (kstrtoint(buf, 0, &node) < 0)
343 return -EINVAL;
344
345 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
346 return -EINVAL;
347
348 if (node != NUMA_NO_NODE && !node_online(node))
349 return -EINVAL;
350
351 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
352 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
353 node);
354
355 dev->numa_node = node;
356 return count;
357}
358
359static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
360 char *buf)
361{
362 return sysfs_emit(buf, "%d\n", dev->numa_node);
363}
364static DEVICE_ATTR_RW(numa_node);
365#endif
366
367static ssize_t dma_mask_bits_show(struct device *dev,
368 struct device_attribute *attr, char *buf)
369{
370 struct pci_dev *pdev = to_pci_dev(dev);
371
372 return sysfs_emit(buf, "%d\n", fls64(pdev->dma_mask));
373}
374static DEVICE_ATTR_RO(dma_mask_bits);
375
376static ssize_t consistent_dma_mask_bits_show(struct device *dev,
377 struct device_attribute *attr,
378 char *buf)
379{
380 return sysfs_emit(buf, "%d\n", fls64(dev->coherent_dma_mask));
381}
382static DEVICE_ATTR_RO(consistent_dma_mask_bits);
383
384static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
385 char *buf)
386{
387 struct pci_dev *pdev = to_pci_dev(dev);
388 struct pci_bus *subordinate = pdev->subordinate;
389
390 return sysfs_emit(buf, "%u\n", subordinate ?
391 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
392 : !pdev->no_msi);
393}
394
395static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
396 const char *buf, size_t count)
397{
398 struct pci_dev *pdev = to_pci_dev(dev);
399 struct pci_bus *subordinate = pdev->subordinate;
400 unsigned long val;
401
402 if (!capable(CAP_SYS_ADMIN))
403 return -EPERM;
404
405 if (kstrtoul(buf, 0, &val) < 0)
406 return -EINVAL;
407
408 /*
409 * "no_msi" and "bus_flags" only affect what happens when a driver
410 * requests MSI or MSI-X. They don't affect any drivers that have
411 * already requested MSI or MSI-X.
412 */
413 if (!subordinate) {
414 pdev->no_msi = !val;
415 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
416 val ? "allowed" : "disallowed");
417 return count;
418 }
419
420 if (val)
421 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
422 else
423 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
424
425 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
426 val ? "allowed" : "disallowed");
427 return count;
428}
429static DEVICE_ATTR_RW(msi_bus);
430
431static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
432{
433 unsigned long val;
434 struct pci_bus *b = NULL;
435
436 if (kstrtoul(buf, 0, &val) < 0)
437 return -EINVAL;
438
439 if (val) {
440 pci_lock_rescan_remove();
441 while ((b = pci_find_next_bus(b)) != NULL)
442 pci_rescan_bus(b);
443 pci_unlock_rescan_remove();
444 }
445 return count;
446}
447static BUS_ATTR_WO(rescan);
448
449static struct attribute *pci_bus_attrs[] = {
450 &bus_attr_rescan.attr,
451 NULL,
452};
453
454static const struct attribute_group pci_bus_group = {
455 .attrs = pci_bus_attrs,
456};
457
458const struct attribute_group *pci_bus_groups[] = {
459 &pci_bus_group,
460 NULL,
461};
462
463static ssize_t dev_rescan_store(struct device *dev,
464 struct device_attribute *attr, const char *buf,
465 size_t count)
466{
467 unsigned long val;
468 struct pci_dev *pdev = to_pci_dev(dev);
469
470 if (kstrtoul(buf, 0, &val) < 0)
471 return -EINVAL;
472
473 if (val) {
474 pci_lock_rescan_remove();
475 pci_rescan_bus(pdev->bus);
476 pci_unlock_rescan_remove();
477 }
478 return count;
479}
480static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
481 dev_rescan_store);
482
483static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
484 const char *buf, size_t count)
485{
486 unsigned long val;
487
488 if (kstrtoul(buf, 0, &val) < 0)
489 return -EINVAL;
490
491 if (val && device_remove_file_self(dev, attr))
492 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
493 return count;
494}
495static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
496 remove_store);
497
498static ssize_t bus_rescan_store(struct device *dev,
499 struct device_attribute *attr,
500 const char *buf, size_t count)
501{
502 unsigned long val;
503 struct pci_bus *bus = to_pci_bus(dev);
504
505 if (kstrtoul(buf, 0, &val) < 0)
506 return -EINVAL;
507
508 if (val) {
509 pci_lock_rescan_remove();
510 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
511 pci_rescan_bus_bridge_resize(bus->self);
512 else
513 pci_rescan_bus(bus);
514 pci_unlock_rescan_remove();
515 }
516 return count;
517}
518static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
519 bus_rescan_store);
520
521#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
522static ssize_t d3cold_allowed_store(struct device *dev,
523 struct device_attribute *attr,
524 const char *buf, size_t count)
525{
526 struct pci_dev *pdev = to_pci_dev(dev);
527 unsigned long val;
528
529 if (kstrtoul(buf, 0, &val) < 0)
530 return -EINVAL;
531
532 pdev->d3cold_allowed = !!val;
533 if (pdev->d3cold_allowed)
534 pci_d3cold_enable(pdev);
535 else
536 pci_d3cold_disable(pdev);
537
538 pm_runtime_resume(dev);
539
540 return count;
541}
542
543static ssize_t d3cold_allowed_show(struct device *dev,
544 struct device_attribute *attr, char *buf)
545{
546 struct pci_dev *pdev = to_pci_dev(dev);
547 return sysfs_emit(buf, "%u\n", pdev->d3cold_allowed);
548}
549static DEVICE_ATTR_RW(d3cold_allowed);
550#endif
551
552#ifdef CONFIG_OF
553static ssize_t devspec_show(struct device *dev,
554 struct device_attribute *attr, char *buf)
555{
556 struct pci_dev *pdev = to_pci_dev(dev);
557 struct device_node *np = pci_device_to_OF_node(pdev);
558
559 if (np == NULL)
560 return 0;
561 return sysfs_emit(buf, "%pOF\n", np);
562}
563static DEVICE_ATTR_RO(devspec);
564#endif
565
566static ssize_t driver_override_store(struct device *dev,
567 struct device_attribute *attr,
568 const char *buf, size_t count)
569{
570 struct pci_dev *pdev = to_pci_dev(dev);
571 int ret;
572
573 ret = driver_set_override(dev, &pdev->driver_override, buf, count);
574 if (ret)
575 return ret;
576
577 return count;
578}
579
580static ssize_t driver_override_show(struct device *dev,
581 struct device_attribute *attr, char *buf)
582{
583 struct pci_dev *pdev = to_pci_dev(dev);
584 ssize_t len;
585
586 device_lock(dev);
587 len = sysfs_emit(buf, "%s\n", pdev->driver_override);
588 device_unlock(dev);
589 return len;
590}
591static DEVICE_ATTR_RW(driver_override);
592
593static struct attribute *pci_dev_attrs[] = {
594 &dev_attr_power_state.attr,
595 &dev_attr_resource.attr,
596 &dev_attr_vendor.attr,
597 &dev_attr_device.attr,
598 &dev_attr_subsystem_vendor.attr,
599 &dev_attr_subsystem_device.attr,
600 &dev_attr_revision.attr,
601 &dev_attr_class.attr,
602 &dev_attr_irq.attr,
603 &dev_attr_local_cpus.attr,
604 &dev_attr_local_cpulist.attr,
605 &dev_attr_modalias.attr,
606#ifdef CONFIG_NUMA
607 &dev_attr_numa_node.attr,
608#endif
609 &dev_attr_dma_mask_bits.attr,
610 &dev_attr_consistent_dma_mask_bits.attr,
611 &dev_attr_enable.attr,
612 &dev_attr_broken_parity_status.attr,
613 &dev_attr_msi_bus.attr,
614#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
615 &dev_attr_d3cold_allowed.attr,
616#endif
617#ifdef CONFIG_OF
618 &dev_attr_devspec.attr,
619#endif
620 &dev_attr_driver_override.attr,
621 &dev_attr_ari_enabled.attr,
622 NULL,
623};
624
625static struct attribute *pci_bridge_attrs[] = {
626 &dev_attr_subordinate_bus_number.attr,
627 &dev_attr_secondary_bus_number.attr,
628 NULL,
629};
630
631static struct attribute *pcie_dev_attrs[] = {
632 &dev_attr_current_link_speed.attr,
633 &dev_attr_current_link_width.attr,
634 &dev_attr_max_link_width.attr,
635 &dev_attr_max_link_speed.attr,
636 NULL,
637};
638
639static struct attribute *pcibus_attrs[] = {
640 &dev_attr_bus_rescan.attr,
641 &dev_attr_cpuaffinity.attr,
642 &dev_attr_cpulistaffinity.attr,
643 NULL,
644};
645
646static const struct attribute_group pcibus_group = {
647 .attrs = pcibus_attrs,
648};
649
650const struct attribute_group *pcibus_groups[] = {
651 &pcibus_group,
652 NULL,
653};
654
655static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
656 char *buf)
657{
658 struct pci_dev *pdev = to_pci_dev(dev);
659 struct pci_dev *vga_dev = vga_default_device();
660
661 if (vga_dev)
662 return sysfs_emit(buf, "%u\n", (pdev == vga_dev));
663
664 return sysfs_emit(buf, "%u\n",
665 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
666 IORESOURCE_ROM_SHADOW));
667}
668static DEVICE_ATTR_RO(boot_vga);
669
670static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
671 struct bin_attribute *bin_attr, char *buf,
672 loff_t off, size_t count)
673{
674 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
675 unsigned int size = 64;
676 loff_t init_off = off;
677 u8 *data = (u8 *) buf;
678
679 /* Several chips lock up trying to read undefined config space */
680 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
681 size = dev->cfg_size;
682 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
683 size = 128;
684
685 if (off > size)
686 return 0;
687 if (off + count > size) {
688 size -= off;
689 count = size;
690 } else {
691 size = count;
692 }
693
694 pci_config_pm_runtime_get(dev);
695
696 if ((off & 1) && size) {
697 u8 val;
698 pci_user_read_config_byte(dev, off, &val);
699 data[off - init_off] = val;
700 off++;
701 size--;
702 }
703
704 if ((off & 3) && size > 2) {
705 u16 val;
706 pci_user_read_config_word(dev, off, &val);
707 data[off - init_off] = val & 0xff;
708 data[off - init_off + 1] = (val >> 8) & 0xff;
709 off += 2;
710 size -= 2;
711 }
712
713 while (size > 3) {
714 u32 val;
715 pci_user_read_config_dword(dev, off, &val);
716 data[off - init_off] = val & 0xff;
717 data[off - init_off + 1] = (val >> 8) & 0xff;
718 data[off - init_off + 2] = (val >> 16) & 0xff;
719 data[off - init_off + 3] = (val >> 24) & 0xff;
720 off += 4;
721 size -= 4;
722 cond_resched();
723 }
724
725 if (size >= 2) {
726 u16 val;
727 pci_user_read_config_word(dev, off, &val);
728 data[off - init_off] = val & 0xff;
729 data[off - init_off + 1] = (val >> 8) & 0xff;
730 off += 2;
731 size -= 2;
732 }
733
734 if (size > 0) {
735 u8 val;
736 pci_user_read_config_byte(dev, off, &val);
737 data[off - init_off] = val;
738 }
739
740 pci_config_pm_runtime_put(dev);
741
742 return count;
743}
744
745static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
746 struct bin_attribute *bin_attr, char *buf,
747 loff_t off, size_t count)
748{
749 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
750 unsigned int size = count;
751 loff_t init_off = off;
752 u8 *data = (u8 *) buf;
753 int ret;
754
755 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
756 if (ret)
757 return ret;
758
759 if (resource_is_exclusive(&dev->driver_exclusive_resource, off,
760 count)) {
761 pci_warn_once(dev, "%s: Unexpected write to kernel-exclusive config offset %llx",
762 current->comm, off);
763 add_taint(TAINT_USER, LOCKDEP_STILL_OK);
764 }
765
766 if (off > dev->cfg_size)
767 return 0;
768 if (off + count > dev->cfg_size) {
769 size = dev->cfg_size - off;
770 count = size;
771 }
772
773 pci_config_pm_runtime_get(dev);
774
775 if ((off & 1) && size) {
776 pci_user_write_config_byte(dev, off, data[off - init_off]);
777 off++;
778 size--;
779 }
780
781 if ((off & 3) && size > 2) {
782 u16 val = data[off - init_off];
783 val |= (u16) data[off - init_off + 1] << 8;
784 pci_user_write_config_word(dev, off, val);
785 off += 2;
786 size -= 2;
787 }
788
789 while (size > 3) {
790 u32 val = data[off - init_off];
791 val |= (u32) data[off - init_off + 1] << 8;
792 val |= (u32) data[off - init_off + 2] << 16;
793 val |= (u32) data[off - init_off + 3] << 24;
794 pci_user_write_config_dword(dev, off, val);
795 off += 4;
796 size -= 4;
797 }
798
799 if (size >= 2) {
800 u16 val = data[off - init_off];
801 val |= (u16) data[off - init_off + 1] << 8;
802 pci_user_write_config_word(dev, off, val);
803 off += 2;
804 size -= 2;
805 }
806
807 if (size)
808 pci_user_write_config_byte(dev, off, data[off - init_off]);
809
810 pci_config_pm_runtime_put(dev);
811
812 return count;
813}
814static BIN_ATTR(config, 0644, pci_read_config, pci_write_config, 0);
815
816static struct bin_attribute *pci_dev_config_attrs[] = {
817 &bin_attr_config,
818 NULL,
819};
820
821static umode_t pci_dev_config_attr_is_visible(struct kobject *kobj,
822 struct bin_attribute *a, int n)
823{
824 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
825
826 a->size = PCI_CFG_SPACE_SIZE;
827 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
828 a->size = PCI_CFG_SPACE_EXP_SIZE;
829
830 return a->attr.mode;
831}
832
833static const struct attribute_group pci_dev_config_attr_group = {
834 .bin_attrs = pci_dev_config_attrs,
835 .is_bin_visible = pci_dev_config_attr_is_visible,
836};
837
838#ifdef HAVE_PCI_LEGACY
839/**
840 * pci_read_legacy_io - read byte(s) from legacy I/O port space
841 * @filp: open sysfs file
842 * @kobj: kobject corresponding to file to read from
843 * @bin_attr: struct bin_attribute for this file
844 * @buf: buffer to store results
845 * @off: offset into legacy I/O port space
846 * @count: number of bytes to read
847 *
848 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
849 * callback routine (pci_legacy_read).
850 */
851static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
852 struct bin_attribute *bin_attr, char *buf,
853 loff_t off, size_t count)
854{
855 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
856
857 /* Only support 1, 2 or 4 byte accesses */
858 if (count != 1 && count != 2 && count != 4)
859 return -EINVAL;
860
861 return pci_legacy_read(bus, off, (u32 *)buf, count);
862}
863
864/**
865 * pci_write_legacy_io - write byte(s) to legacy I/O port space
866 * @filp: open sysfs file
867 * @kobj: kobject corresponding to file to read from
868 * @bin_attr: struct bin_attribute for this file
869 * @buf: buffer containing value to be written
870 * @off: offset into legacy I/O port space
871 * @count: number of bytes to write
872 *
873 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
874 * callback routine (pci_legacy_write).
875 */
876static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
877 struct bin_attribute *bin_attr, char *buf,
878 loff_t off, size_t count)
879{
880 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
881
882 /* Only support 1, 2 or 4 byte accesses */
883 if (count != 1 && count != 2 && count != 4)
884 return -EINVAL;
885
886 return pci_legacy_write(bus, off, *(u32 *)buf, count);
887}
888
889/**
890 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
891 * @filp: open sysfs file
892 * @kobj: kobject corresponding to device to be mapped
893 * @attr: struct bin_attribute for this file
894 * @vma: struct vm_area_struct passed to mmap
895 *
896 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
897 * legacy memory space (first meg of bus space) into application virtual
898 * memory space.
899 */
900static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
901 struct bin_attribute *attr,
902 struct vm_area_struct *vma)
903{
904 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
905
906 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
907}
908
909/**
910 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
911 * @filp: open sysfs file
912 * @kobj: kobject corresponding to device to be mapped
913 * @attr: struct bin_attribute for this file
914 * @vma: struct vm_area_struct passed to mmap
915 *
916 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
917 * legacy IO space (first meg of bus space) into application virtual
918 * memory space. Returns -ENOSYS if the operation isn't supported
919 */
920static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
921 struct bin_attribute *attr,
922 struct vm_area_struct *vma)
923{
924 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
925
926 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
927}
928
929/**
930 * pci_adjust_legacy_attr - adjustment of legacy file attributes
931 * @b: bus to create files under
932 * @mmap_type: I/O port or memory
933 *
934 * Stub implementation. Can be overridden by arch if necessary.
935 */
936void __weak pci_adjust_legacy_attr(struct pci_bus *b,
937 enum pci_mmap_state mmap_type)
938{
939}
940
941/**
942 * pci_create_legacy_files - create legacy I/O port and memory files
943 * @b: bus to create files under
944 *
945 * Some platforms allow access to legacy I/O port and ISA memory space on
946 * a per-bus basis. This routine creates the files and ties them into
947 * their associated read, write and mmap files from pci-sysfs.c
948 *
949 * On error unwind, but don't propagate the error to the caller
950 * as it is ok to set up the PCI bus without these files.
951 */
952void pci_create_legacy_files(struct pci_bus *b)
953{
954 int error;
955
956 if (!sysfs_initialized)
957 return;
958
959 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
960 GFP_ATOMIC);
961 if (!b->legacy_io)
962 goto kzalloc_err;
963
964 sysfs_bin_attr_init(b->legacy_io);
965 b->legacy_io->attr.name = "legacy_io";
966 b->legacy_io->size = 0xffff;
967 b->legacy_io->attr.mode = 0600;
968 b->legacy_io->read = pci_read_legacy_io;
969 b->legacy_io->write = pci_write_legacy_io;
970 b->legacy_io->mmap = pci_mmap_legacy_io;
971 b->legacy_io->f_mapping = iomem_get_mapping;
972 pci_adjust_legacy_attr(b, pci_mmap_io);
973 error = device_create_bin_file(&b->dev, b->legacy_io);
974 if (error)
975 goto legacy_io_err;
976
977 /* Allocated above after the legacy_io struct */
978 b->legacy_mem = b->legacy_io + 1;
979 sysfs_bin_attr_init(b->legacy_mem);
980 b->legacy_mem->attr.name = "legacy_mem";
981 b->legacy_mem->size = 1024*1024;
982 b->legacy_mem->attr.mode = 0600;
983 b->legacy_mem->mmap = pci_mmap_legacy_mem;
984 b->legacy_mem->f_mapping = iomem_get_mapping;
985 pci_adjust_legacy_attr(b, pci_mmap_mem);
986 error = device_create_bin_file(&b->dev, b->legacy_mem);
987 if (error)
988 goto legacy_mem_err;
989
990 return;
991
992legacy_mem_err:
993 device_remove_bin_file(&b->dev, b->legacy_io);
994legacy_io_err:
995 kfree(b->legacy_io);
996 b->legacy_io = NULL;
997kzalloc_err:
998 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
999}
1000
1001void pci_remove_legacy_files(struct pci_bus *b)
1002{
1003 if (b->legacy_io) {
1004 device_remove_bin_file(&b->dev, b->legacy_io);
1005 device_remove_bin_file(&b->dev, b->legacy_mem);
1006 kfree(b->legacy_io); /* both are allocated here */
1007 }
1008}
1009#endif /* HAVE_PCI_LEGACY */
1010
1011#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
1012
1013int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
1014 enum pci_mmap_api mmap_api)
1015{
1016 unsigned long nr, start, size;
1017 resource_size_t pci_start = 0, pci_end;
1018
1019 if (pci_resource_len(pdev, resno) == 0)
1020 return 0;
1021 nr = vma_pages(vma);
1022 start = vma->vm_pgoff;
1023 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
1024 if (mmap_api == PCI_MMAP_PROCFS) {
1025 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
1026 &pci_start, &pci_end);
1027 pci_start >>= PAGE_SHIFT;
1028 }
1029 if (start >= pci_start && start < pci_start + size &&
1030 start + nr <= pci_start + size)
1031 return 1;
1032 return 0;
1033}
1034
1035/**
1036 * pci_mmap_resource - map a PCI resource into user memory space
1037 * @kobj: kobject for mapping
1038 * @attr: struct bin_attribute for the file being mapped
1039 * @vma: struct vm_area_struct passed into the mmap
1040 * @write_combine: 1 for write_combine mapping
1041 *
1042 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1043 */
1044static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1045 struct vm_area_struct *vma, int write_combine)
1046{
1047 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1048 int bar = (unsigned long)attr->private;
1049 enum pci_mmap_state mmap_type;
1050 struct resource *res = &pdev->resource[bar];
1051 int ret;
1052
1053 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1054 if (ret)
1055 return ret;
1056
1057 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1058 return -EINVAL;
1059
1060 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1061 return -EINVAL;
1062
1063 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1064
1065 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1066}
1067
1068static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1069 struct bin_attribute *attr,
1070 struct vm_area_struct *vma)
1071{
1072 return pci_mmap_resource(kobj, attr, vma, 0);
1073}
1074
1075static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1076 struct bin_attribute *attr,
1077 struct vm_area_struct *vma)
1078{
1079 return pci_mmap_resource(kobj, attr, vma, 1);
1080}
1081
1082static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1083 struct bin_attribute *attr, char *buf,
1084 loff_t off, size_t count, bool write)
1085{
1086 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1087 int bar = (unsigned long)attr->private;
1088 unsigned long port = off;
1089
1090 port += pci_resource_start(pdev, bar);
1091
1092 if (port > pci_resource_end(pdev, bar))
1093 return 0;
1094
1095 if (port + count - 1 > pci_resource_end(pdev, bar))
1096 return -EINVAL;
1097
1098 switch (count) {
1099 case 1:
1100 if (write)
1101 outb(*(u8 *)buf, port);
1102 else
1103 *(u8 *)buf = inb(port);
1104 return 1;
1105 case 2:
1106 if (write)
1107 outw(*(u16 *)buf, port);
1108 else
1109 *(u16 *)buf = inw(port);
1110 return 2;
1111 case 4:
1112 if (write)
1113 outl(*(u32 *)buf, port);
1114 else
1115 *(u32 *)buf = inl(port);
1116 return 4;
1117 }
1118 return -EINVAL;
1119}
1120
1121static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1122 struct bin_attribute *attr, char *buf,
1123 loff_t off, size_t count)
1124{
1125 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1126}
1127
1128static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1129 struct bin_attribute *attr, char *buf,
1130 loff_t off, size_t count)
1131{
1132 int ret;
1133
1134 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1135 if (ret)
1136 return ret;
1137
1138 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1139}
1140
1141/**
1142 * pci_remove_resource_files - cleanup resource files
1143 * @pdev: dev to cleanup
1144 *
1145 * If we created resource files for @pdev, remove them from sysfs and
1146 * free their resources.
1147 */
1148static void pci_remove_resource_files(struct pci_dev *pdev)
1149{
1150 int i;
1151
1152 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1153 struct bin_attribute *res_attr;
1154
1155 res_attr = pdev->res_attr[i];
1156 if (res_attr) {
1157 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1158 kfree(res_attr);
1159 }
1160
1161 res_attr = pdev->res_attr_wc[i];
1162 if (res_attr) {
1163 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1164 kfree(res_attr);
1165 }
1166 }
1167}
1168
1169static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1170{
1171 /* allocate attribute structure, piggyback attribute name */
1172 int name_len = write_combine ? 13 : 10;
1173 struct bin_attribute *res_attr;
1174 char *res_attr_name;
1175 int retval;
1176
1177 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1178 if (!res_attr)
1179 return -ENOMEM;
1180
1181 res_attr_name = (char *)(res_attr + 1);
1182
1183 sysfs_bin_attr_init(res_attr);
1184 if (write_combine) {
1185 sprintf(res_attr_name, "resource%d_wc", num);
1186 res_attr->mmap = pci_mmap_resource_wc;
1187 } else {
1188 sprintf(res_attr_name, "resource%d", num);
1189 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1190 res_attr->read = pci_read_resource_io;
1191 res_attr->write = pci_write_resource_io;
1192 if (arch_can_pci_mmap_io())
1193 res_attr->mmap = pci_mmap_resource_uc;
1194 } else {
1195 res_attr->mmap = pci_mmap_resource_uc;
1196 }
1197 }
1198 if (res_attr->mmap)
1199 res_attr->f_mapping = iomem_get_mapping;
1200 res_attr->attr.name = res_attr_name;
1201 res_attr->attr.mode = 0600;
1202 res_attr->size = pci_resource_len(pdev, num);
1203 res_attr->private = (void *)(unsigned long)num;
1204 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1205 if (retval) {
1206 kfree(res_attr);
1207 return retval;
1208 }
1209
1210 if (write_combine)
1211 pdev->res_attr_wc[num] = res_attr;
1212 else
1213 pdev->res_attr[num] = res_attr;
1214
1215 return 0;
1216}
1217
1218/**
1219 * pci_create_resource_files - create resource files in sysfs for @dev
1220 * @pdev: dev in question
1221 *
1222 * Walk the resources in @pdev creating files for each resource available.
1223 */
1224static int pci_create_resource_files(struct pci_dev *pdev)
1225{
1226 int i;
1227 int retval;
1228
1229 /* Expose the PCI resources from this device as files */
1230 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1231
1232 /* skip empty resources */
1233 if (!pci_resource_len(pdev, i))
1234 continue;
1235
1236 retval = pci_create_attr(pdev, i, 0);
1237 /* for prefetchable resources, create a WC mappable file */
1238 if (!retval && arch_can_pci_mmap_wc() &&
1239 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1240 retval = pci_create_attr(pdev, i, 1);
1241 if (retval) {
1242 pci_remove_resource_files(pdev);
1243 return retval;
1244 }
1245 }
1246 return 0;
1247}
1248#else /* !(defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)) */
1249int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1250void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1251#endif
1252
1253/**
1254 * pci_write_rom - used to enable access to the PCI ROM display
1255 * @filp: sysfs file
1256 * @kobj: kernel object handle
1257 * @bin_attr: struct bin_attribute for this file
1258 * @buf: user input
1259 * @off: file offset
1260 * @count: number of byte in input
1261 *
1262 * writing anything except 0 enables it
1263 */
1264static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1265 struct bin_attribute *bin_attr, char *buf,
1266 loff_t off, size_t count)
1267{
1268 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1269
1270 if ((off == 0) && (*buf == '0') && (count == 2))
1271 pdev->rom_attr_enabled = 0;
1272 else
1273 pdev->rom_attr_enabled = 1;
1274
1275 return count;
1276}
1277
1278/**
1279 * pci_read_rom - read a PCI ROM
1280 * @filp: sysfs file
1281 * @kobj: kernel object handle
1282 * @bin_attr: struct bin_attribute for this file
1283 * @buf: where to put the data we read from the ROM
1284 * @off: file offset
1285 * @count: number of bytes to read
1286 *
1287 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1288 * device corresponding to @kobj.
1289 */
1290static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1291 struct bin_attribute *bin_attr, char *buf,
1292 loff_t off, size_t count)
1293{
1294 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1295 void __iomem *rom;
1296 size_t size;
1297
1298 if (!pdev->rom_attr_enabled)
1299 return -EINVAL;
1300
1301 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1302 if (!rom || !size)
1303 return -EIO;
1304
1305 if (off >= size)
1306 count = 0;
1307 else {
1308 if (off + count > size)
1309 count = size - off;
1310
1311 memcpy_fromio(buf, rom + off, count);
1312 }
1313 pci_unmap_rom(pdev, rom);
1314
1315 return count;
1316}
1317static BIN_ATTR(rom, 0600, pci_read_rom, pci_write_rom, 0);
1318
1319static struct bin_attribute *pci_dev_rom_attrs[] = {
1320 &bin_attr_rom,
1321 NULL,
1322};
1323
1324static umode_t pci_dev_rom_attr_is_visible(struct kobject *kobj,
1325 struct bin_attribute *a, int n)
1326{
1327 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1328 size_t rom_size;
1329
1330 /* If the device has a ROM, try to expose it in sysfs. */
1331 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1332 if (!rom_size)
1333 return 0;
1334
1335 a->size = rom_size;
1336
1337 return a->attr.mode;
1338}
1339
1340static const struct attribute_group pci_dev_rom_attr_group = {
1341 .bin_attrs = pci_dev_rom_attrs,
1342 .is_bin_visible = pci_dev_rom_attr_is_visible,
1343};
1344
1345static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1346 const char *buf, size_t count)
1347{
1348 struct pci_dev *pdev = to_pci_dev(dev);
1349 unsigned long val;
1350 ssize_t result;
1351
1352 if (kstrtoul(buf, 0, &val) < 0)
1353 return -EINVAL;
1354
1355 if (val != 1)
1356 return -EINVAL;
1357
1358 pm_runtime_get_sync(dev);
1359 result = pci_reset_function(pdev);
1360 pm_runtime_put(dev);
1361 if (result < 0)
1362 return result;
1363
1364 return count;
1365}
1366static DEVICE_ATTR_WO(reset);
1367
1368static struct attribute *pci_dev_reset_attrs[] = {
1369 &dev_attr_reset.attr,
1370 NULL,
1371};
1372
1373static umode_t pci_dev_reset_attr_is_visible(struct kobject *kobj,
1374 struct attribute *a, int n)
1375{
1376 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1377
1378 if (!pci_reset_supported(pdev))
1379 return 0;
1380
1381 return a->mode;
1382}
1383
1384static const struct attribute_group pci_dev_reset_attr_group = {
1385 .attrs = pci_dev_reset_attrs,
1386 .is_visible = pci_dev_reset_attr_is_visible,
1387};
1388
1389#define pci_dev_resource_resize_attr(n) \
1390static ssize_t resource##n##_resize_show(struct device *dev, \
1391 struct device_attribute *attr, \
1392 char * buf) \
1393{ \
1394 struct pci_dev *pdev = to_pci_dev(dev); \
1395 ssize_t ret; \
1396 \
1397 pci_config_pm_runtime_get(pdev); \
1398 \
1399 ret = sysfs_emit(buf, "%016llx\n", \
1400 (u64)pci_rebar_get_possible_sizes(pdev, n)); \
1401 \
1402 pci_config_pm_runtime_put(pdev); \
1403 \
1404 return ret; \
1405} \
1406 \
1407static ssize_t resource##n##_resize_store(struct device *dev, \
1408 struct device_attribute *attr,\
1409 const char *buf, size_t count)\
1410{ \
1411 struct pci_dev *pdev = to_pci_dev(dev); \
1412 unsigned long size, flags; \
1413 int ret, i; \
1414 u16 cmd; \
1415 \
1416 if (kstrtoul(buf, 0, &size) < 0) \
1417 return -EINVAL; \
1418 \
1419 device_lock(dev); \
1420 if (dev->driver) { \
1421 ret = -EBUSY; \
1422 goto unlock; \
1423 } \
1424 \
1425 pci_config_pm_runtime_get(pdev); \
1426 \
1427 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { \
1428 ret = aperture_remove_conflicting_pci_devices(pdev, \
1429 "resourceN_resize"); \
1430 if (ret) \
1431 goto pm_put; \
1432 } \
1433 \
1434 pci_read_config_word(pdev, PCI_COMMAND, &cmd); \
1435 pci_write_config_word(pdev, PCI_COMMAND, \
1436 cmd & ~PCI_COMMAND_MEMORY); \
1437 \
1438 flags = pci_resource_flags(pdev, n); \
1439 \
1440 pci_remove_resource_files(pdev); \
1441 \
1442 for (i = 0; i < PCI_STD_NUM_BARS; i++) { \
1443 if (pci_resource_len(pdev, i) && \
1444 pci_resource_flags(pdev, i) == flags) \
1445 pci_release_resource(pdev, i); \
1446 } \
1447 \
1448 ret = pci_resize_resource(pdev, n, size); \
1449 \
1450 pci_assign_unassigned_bus_resources(pdev->bus); \
1451 \
1452 if (pci_create_resource_files(pdev)) \
1453 pci_warn(pdev, "Failed to recreate resource files after BAR resizing\n");\
1454 \
1455 pci_write_config_word(pdev, PCI_COMMAND, cmd); \
1456pm_put: \
1457 pci_config_pm_runtime_put(pdev); \
1458unlock: \
1459 device_unlock(dev); \
1460 \
1461 return ret ? ret : count; \
1462} \
1463static DEVICE_ATTR_RW(resource##n##_resize)
1464
1465pci_dev_resource_resize_attr(0);
1466pci_dev_resource_resize_attr(1);
1467pci_dev_resource_resize_attr(2);
1468pci_dev_resource_resize_attr(3);
1469pci_dev_resource_resize_attr(4);
1470pci_dev_resource_resize_attr(5);
1471
1472static struct attribute *resource_resize_attrs[] = {
1473 &dev_attr_resource0_resize.attr,
1474 &dev_attr_resource1_resize.attr,
1475 &dev_attr_resource2_resize.attr,
1476 &dev_attr_resource3_resize.attr,
1477 &dev_attr_resource4_resize.attr,
1478 &dev_attr_resource5_resize.attr,
1479 NULL,
1480};
1481
1482static umode_t resource_resize_is_visible(struct kobject *kobj,
1483 struct attribute *a, int n)
1484{
1485 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1486
1487 return pci_rebar_get_current_size(pdev, n) < 0 ? 0 : a->mode;
1488}
1489
1490static const struct attribute_group pci_dev_resource_resize_group = {
1491 .attrs = resource_resize_attrs,
1492 .is_visible = resource_resize_is_visible,
1493};
1494
1495int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1496{
1497 if (!sysfs_initialized)
1498 return -EACCES;
1499
1500 return pci_create_resource_files(pdev);
1501}
1502
1503/**
1504 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1505 * @pdev: device whose entries we should free
1506 *
1507 * Cleanup when @pdev is removed from sysfs.
1508 */
1509void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1510{
1511 if (!sysfs_initialized)
1512 return;
1513
1514 pci_remove_resource_files(pdev);
1515}
1516
1517static int __init pci_sysfs_init(void)
1518{
1519 struct pci_dev *pdev = NULL;
1520 struct pci_bus *pbus = NULL;
1521 int retval;
1522
1523 sysfs_initialized = 1;
1524 for_each_pci_dev(pdev) {
1525 retval = pci_create_sysfs_dev_files(pdev);
1526 if (retval) {
1527 pci_dev_put(pdev);
1528 return retval;
1529 }
1530 }
1531
1532 while ((pbus = pci_find_next_bus(pbus)))
1533 pci_create_legacy_files(pbus);
1534
1535 return 0;
1536}
1537late_initcall(pci_sysfs_init);
1538
1539static struct attribute *pci_dev_dev_attrs[] = {
1540 &dev_attr_boot_vga.attr,
1541 NULL,
1542};
1543
1544static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1545 struct attribute *a, int n)
1546{
1547 struct device *dev = kobj_to_dev(kobj);
1548 struct pci_dev *pdev = to_pci_dev(dev);
1549
1550 if (a == &dev_attr_boot_vga.attr)
1551 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1552 return 0;
1553
1554 return a->mode;
1555}
1556
1557static struct attribute *pci_dev_hp_attrs[] = {
1558 &dev_attr_remove.attr,
1559 &dev_attr_dev_rescan.attr,
1560 NULL,
1561};
1562
1563static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1564 struct attribute *a, int n)
1565{
1566 struct device *dev = kobj_to_dev(kobj);
1567 struct pci_dev *pdev = to_pci_dev(dev);
1568
1569 if (pdev->is_virtfn)
1570 return 0;
1571
1572 return a->mode;
1573}
1574
1575static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1576 struct attribute *a, int n)
1577{
1578 struct device *dev = kobj_to_dev(kobj);
1579 struct pci_dev *pdev = to_pci_dev(dev);
1580
1581 if (pci_is_bridge(pdev))
1582 return a->mode;
1583
1584 return 0;
1585}
1586
1587static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1588 struct attribute *a, int n)
1589{
1590 struct device *dev = kobj_to_dev(kobj);
1591 struct pci_dev *pdev = to_pci_dev(dev);
1592
1593 if (pci_is_pcie(pdev))
1594 return a->mode;
1595
1596 return 0;
1597}
1598
1599static const struct attribute_group pci_dev_group = {
1600 .attrs = pci_dev_attrs,
1601};
1602
1603const struct attribute_group *pci_dev_groups[] = {
1604 &pci_dev_group,
1605 &pci_dev_config_attr_group,
1606 &pci_dev_rom_attr_group,
1607 &pci_dev_reset_attr_group,
1608 &pci_dev_reset_method_attr_group,
1609 &pci_dev_vpd_attr_group,
1610#ifdef CONFIG_DMI
1611 &pci_dev_smbios_attr_group,
1612#endif
1613#ifdef CONFIG_ACPI
1614 &pci_dev_acpi_attr_group,
1615#endif
1616 &pci_dev_resource_resize_group,
1617 NULL,
1618};
1619
1620static const struct attribute_group pci_dev_hp_attr_group = {
1621 .attrs = pci_dev_hp_attrs,
1622 .is_visible = pci_dev_hp_attrs_are_visible,
1623};
1624
1625static const struct attribute_group pci_dev_attr_group = {
1626 .attrs = pci_dev_dev_attrs,
1627 .is_visible = pci_dev_attrs_are_visible,
1628};
1629
1630static const struct attribute_group pci_bridge_attr_group = {
1631 .attrs = pci_bridge_attrs,
1632 .is_visible = pci_bridge_attrs_are_visible,
1633};
1634
1635static const struct attribute_group pcie_dev_attr_group = {
1636 .attrs = pcie_dev_attrs,
1637 .is_visible = pcie_dev_attrs_are_visible,
1638};
1639
1640static const struct attribute_group *pci_dev_attr_groups[] = {
1641 &pci_dev_attr_group,
1642 &pci_dev_hp_attr_group,
1643#ifdef CONFIG_PCI_IOV
1644 &sriov_pf_dev_attr_group,
1645 &sriov_vf_dev_attr_group,
1646#endif
1647 &pci_bridge_attr_group,
1648 &pcie_dev_attr_group,
1649#ifdef CONFIG_PCIEAER
1650 &aer_stats_attr_group,
1651#endif
1652#ifdef CONFIG_PCIEASPM
1653 &aspm_ctrl_attr_group,
1654#endif
1655 NULL,
1656};
1657
1658const struct device_type pci_dev_type = {
1659 .groups = pci_dev_attr_groups,
1660};