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1/*
2 * drivers/pci/pci-sysfs.c
3 *
4 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
5 * (C) Copyright 2002-2004 IBM Corp.
6 * (C) Copyright 2003 Matthew Wilcox
7 * (C) Copyright 2003 Hewlett-Packard
8 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
9 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
10 *
11 * File attributes for PCI devices
12 *
13 * Modeled after usb's driverfs.c
14 *
15 */
16
17
18#include <linux/kernel.h>
19#include <linux/sched.h>
20#include <linux/pci.h>
21#include <linux/stat.h>
22#include <linux/topology.h>
23#include <linux/mm.h>
24#include <linux/fs.h>
25#include <linux/capability.h>
26#include <linux/security.h>
27#include <linux/pci-aspm.h>
28#include <linux/slab.h>
29#include "pci.h"
30
31static int sysfs_initialized; /* = 0 */
32
33/* show configuration fields */
34#define pci_config_attr(field, format_string) \
35static ssize_t \
36field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
37{ \
38 struct pci_dev *pdev; \
39 \
40 pdev = to_pci_dev (dev); \
41 return sprintf (buf, format_string, pdev->field); \
42}
43
44pci_config_attr(vendor, "0x%04x\n");
45pci_config_attr(device, "0x%04x\n");
46pci_config_attr(subsystem_vendor, "0x%04x\n");
47pci_config_attr(subsystem_device, "0x%04x\n");
48pci_config_attr(class, "0x%06x\n");
49pci_config_attr(irq, "%u\n");
50
51static ssize_t broken_parity_status_show(struct device *dev,
52 struct device_attribute *attr,
53 char *buf)
54{
55 struct pci_dev *pdev = to_pci_dev(dev);
56 return sprintf (buf, "%u\n", pdev->broken_parity_status);
57}
58
59static ssize_t broken_parity_status_store(struct device *dev,
60 struct device_attribute *attr,
61 const char *buf, size_t count)
62{
63 struct pci_dev *pdev = to_pci_dev(dev);
64 unsigned long val;
65
66 if (strict_strtoul(buf, 0, &val) < 0)
67 return -EINVAL;
68
69 pdev->broken_parity_status = !!val;
70
71 return count;
72}
73
74static ssize_t local_cpus_show(struct device *dev,
75 struct device_attribute *attr, char *buf)
76{
77 const struct cpumask *mask;
78 int len;
79
80#ifdef CONFIG_NUMA
81 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
82 cpumask_of_node(dev_to_node(dev));
83#else
84 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
85#endif
86 len = cpumask_scnprintf(buf, PAGE_SIZE-2, mask);
87 buf[len++] = '\n';
88 buf[len] = '\0';
89 return len;
90}
91
92
93static ssize_t local_cpulist_show(struct device *dev,
94 struct device_attribute *attr, char *buf)
95{
96 const struct cpumask *mask;
97 int len;
98
99#ifdef CONFIG_NUMA
100 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
101 cpumask_of_node(dev_to_node(dev));
102#else
103 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
104#endif
105 len = cpulist_scnprintf(buf, PAGE_SIZE-2, mask);
106 buf[len++] = '\n';
107 buf[len] = '\0';
108 return len;
109}
110
111/*
112 * PCI Bus Class Devices
113 */
114static ssize_t pci_bus_show_cpuaffinity(struct device *dev,
115 int type,
116 struct device_attribute *attr,
117 char *buf)
118{
119 int ret;
120 const struct cpumask *cpumask;
121
122 cpumask = cpumask_of_pcibus(to_pci_bus(dev));
123 ret = type ?
124 cpulist_scnprintf(buf, PAGE_SIZE-2, cpumask) :
125 cpumask_scnprintf(buf, PAGE_SIZE-2, cpumask);
126 buf[ret++] = '\n';
127 buf[ret] = '\0';
128 return ret;
129}
130
131static inline ssize_t pci_bus_show_cpumaskaffinity(struct device *dev,
132 struct device_attribute *attr,
133 char *buf)
134{
135 return pci_bus_show_cpuaffinity(dev, 0, attr, buf);
136}
137
138static inline ssize_t pci_bus_show_cpulistaffinity(struct device *dev,
139 struct device_attribute *attr,
140 char *buf)
141{
142 return pci_bus_show_cpuaffinity(dev, 1, attr, buf);
143}
144
145/* show resources */
146static ssize_t
147resource_show(struct device * dev, struct device_attribute *attr, char * buf)
148{
149 struct pci_dev * pci_dev = to_pci_dev(dev);
150 char * str = buf;
151 int i;
152 int max;
153 resource_size_t start, end;
154
155 if (pci_dev->subordinate)
156 max = DEVICE_COUNT_RESOURCE;
157 else
158 max = PCI_BRIDGE_RESOURCES;
159
160 for (i = 0; i < max; i++) {
161 struct resource *res = &pci_dev->resource[i];
162 pci_resource_to_user(pci_dev, i, res, &start, &end);
163 str += sprintf(str,"0x%016llx 0x%016llx 0x%016llx\n",
164 (unsigned long long)start,
165 (unsigned long long)end,
166 (unsigned long long)res->flags);
167 }
168 return (str - buf);
169}
170
171static ssize_t modalias_show(struct device *dev, struct device_attribute *attr, char *buf)
172{
173 struct pci_dev *pci_dev = to_pci_dev(dev);
174
175 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02x\n",
176 pci_dev->vendor, pci_dev->device,
177 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
178 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
179 (u8)(pci_dev->class));
180}
181
182static ssize_t is_enabled_store(struct device *dev,
183 struct device_attribute *attr, const char *buf,
184 size_t count)
185{
186 struct pci_dev *pdev = to_pci_dev(dev);
187 unsigned long val;
188 ssize_t result = strict_strtoul(buf, 0, &val);
189
190 if (result < 0)
191 return result;
192
193 /* this can crash the machine when done on the "wrong" device */
194 if (!capable(CAP_SYS_ADMIN))
195 return -EPERM;
196
197 if (!val) {
198 if (pci_is_enabled(pdev))
199 pci_disable_device(pdev);
200 else
201 result = -EIO;
202 } else
203 result = pci_enable_device(pdev);
204
205 return result < 0 ? result : count;
206}
207
208static ssize_t is_enabled_show(struct device *dev,
209 struct device_attribute *attr, char *buf)
210{
211 struct pci_dev *pdev;
212
213 pdev = to_pci_dev (dev);
214 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
215}
216
217#ifdef CONFIG_NUMA
218static ssize_t
219numa_node_show(struct device *dev, struct device_attribute *attr, char *buf)
220{
221 return sprintf (buf, "%d\n", dev->numa_node);
222}
223#endif
224
225static ssize_t
226dma_mask_bits_show(struct device *dev, struct device_attribute *attr, char *buf)
227{
228 struct pci_dev *pdev = to_pci_dev(dev);
229
230 return sprintf (buf, "%d\n", fls64(pdev->dma_mask));
231}
232
233static ssize_t
234consistent_dma_mask_bits_show(struct device *dev, struct device_attribute *attr,
235 char *buf)
236{
237 return sprintf (buf, "%d\n", fls64(dev->coherent_dma_mask));
238}
239
240static ssize_t
241msi_bus_show(struct device *dev, struct device_attribute *attr, char *buf)
242{
243 struct pci_dev *pdev = to_pci_dev(dev);
244
245 if (!pdev->subordinate)
246 return 0;
247
248 return sprintf (buf, "%u\n",
249 !(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI));
250}
251
252static ssize_t
253msi_bus_store(struct device *dev, struct device_attribute *attr,
254 const char *buf, size_t count)
255{
256 struct pci_dev *pdev = to_pci_dev(dev);
257 unsigned long val;
258
259 if (strict_strtoul(buf, 0, &val) < 0)
260 return -EINVAL;
261
262 /* bad things may happen if the no_msi flag is changed
263 * while some drivers are loaded */
264 if (!capable(CAP_SYS_ADMIN))
265 return -EPERM;
266
267 /* Maybe pci devices without subordinate busses shouldn't even have this
268 * attribute in the first place? */
269 if (!pdev->subordinate)
270 return count;
271
272 /* Is the flag going to change, or keep the value it already had? */
273 if (!(pdev->subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI) ^
274 !!val) {
275 pdev->subordinate->bus_flags ^= PCI_BUS_FLAGS_NO_MSI;
276
277 dev_warn(&pdev->dev, "forced subordinate bus to%s support MSI,"
278 " bad things could happen\n", val ? "" : " not");
279 }
280
281 return count;
282}
283
284#ifdef CONFIG_HOTPLUG
285static DEFINE_MUTEX(pci_remove_rescan_mutex);
286static ssize_t bus_rescan_store(struct bus_type *bus, const char *buf,
287 size_t count)
288{
289 unsigned long val;
290 struct pci_bus *b = NULL;
291
292 if (strict_strtoul(buf, 0, &val) < 0)
293 return -EINVAL;
294
295 if (val) {
296 mutex_lock(&pci_remove_rescan_mutex);
297 while ((b = pci_find_next_bus(b)) != NULL)
298 pci_rescan_bus(b);
299 mutex_unlock(&pci_remove_rescan_mutex);
300 }
301 return count;
302}
303
304struct bus_attribute pci_bus_attrs[] = {
305 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, bus_rescan_store),
306 __ATTR_NULL
307};
308
309static ssize_t
310dev_rescan_store(struct device *dev, struct device_attribute *attr,
311 const char *buf, size_t count)
312{
313 unsigned long val;
314 struct pci_dev *pdev = to_pci_dev(dev);
315
316 if (strict_strtoul(buf, 0, &val) < 0)
317 return -EINVAL;
318
319 if (val) {
320 mutex_lock(&pci_remove_rescan_mutex);
321 pci_rescan_bus(pdev->bus);
322 mutex_unlock(&pci_remove_rescan_mutex);
323 }
324 return count;
325}
326
327static void remove_callback(struct device *dev)
328{
329 struct pci_dev *pdev = to_pci_dev(dev);
330
331 mutex_lock(&pci_remove_rescan_mutex);
332 pci_remove_bus_device(pdev);
333 mutex_unlock(&pci_remove_rescan_mutex);
334}
335
336static ssize_t
337remove_store(struct device *dev, struct device_attribute *dummy,
338 const char *buf, size_t count)
339{
340 int ret = 0;
341 unsigned long val;
342
343 if (strict_strtoul(buf, 0, &val) < 0)
344 return -EINVAL;
345
346 /* An attribute cannot be unregistered by one of its own methods,
347 * so we have to use this roundabout approach.
348 */
349 if (val)
350 ret = device_schedule_callback(dev, remove_callback);
351 if (ret)
352 count = ret;
353 return count;
354}
355
356static ssize_t
357dev_bus_rescan_store(struct device *dev, struct device_attribute *attr,
358 const char *buf, size_t count)
359{
360 unsigned long val;
361 struct pci_bus *bus = to_pci_bus(dev);
362
363 if (strict_strtoul(buf, 0, &val) < 0)
364 return -EINVAL;
365
366 if (val) {
367 mutex_lock(&pci_remove_rescan_mutex);
368 pci_rescan_bus(bus);
369 mutex_unlock(&pci_remove_rescan_mutex);
370 }
371 return count;
372}
373
374#endif
375
376struct device_attribute pci_dev_attrs[] = {
377 __ATTR_RO(resource),
378 __ATTR_RO(vendor),
379 __ATTR_RO(device),
380 __ATTR_RO(subsystem_vendor),
381 __ATTR_RO(subsystem_device),
382 __ATTR_RO(class),
383 __ATTR_RO(irq),
384 __ATTR_RO(local_cpus),
385 __ATTR_RO(local_cpulist),
386 __ATTR_RO(modalias),
387#ifdef CONFIG_NUMA
388 __ATTR_RO(numa_node),
389#endif
390 __ATTR_RO(dma_mask_bits),
391 __ATTR_RO(consistent_dma_mask_bits),
392 __ATTR(enable, 0600, is_enabled_show, is_enabled_store),
393 __ATTR(broken_parity_status,(S_IRUGO|S_IWUSR),
394 broken_parity_status_show,broken_parity_status_store),
395 __ATTR(msi_bus, 0644, msi_bus_show, msi_bus_store),
396#ifdef CONFIG_HOTPLUG
397 __ATTR(remove, (S_IWUSR|S_IWGRP), NULL, remove_store),
398 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_rescan_store),
399#endif
400 __ATTR_NULL,
401};
402
403struct device_attribute pcibus_dev_attrs[] = {
404#ifdef CONFIG_HOTPLUG
405 __ATTR(rescan, (S_IWUSR|S_IWGRP), NULL, dev_bus_rescan_store),
406#endif
407 __ATTR(cpuaffinity, S_IRUGO, pci_bus_show_cpumaskaffinity, NULL),
408 __ATTR(cpulistaffinity, S_IRUGO, pci_bus_show_cpulistaffinity, NULL),
409 __ATTR_NULL,
410};
411
412static ssize_t
413boot_vga_show(struct device *dev, struct device_attribute *attr, char *buf)
414{
415 struct pci_dev *pdev = to_pci_dev(dev);
416
417 return sprintf(buf, "%u\n",
418 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
419 IORESOURCE_ROM_SHADOW));
420}
421struct device_attribute vga_attr = __ATTR_RO(boot_vga);
422
423static ssize_t
424pci_read_config(struct file *filp, struct kobject *kobj,
425 struct bin_attribute *bin_attr,
426 char *buf, loff_t off, size_t count)
427{
428 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
429 unsigned int size = 64;
430 loff_t init_off = off;
431 u8 *data = (u8*) buf;
432
433 /* Several chips lock up trying to read undefined config space */
434 if (security_capable(&init_user_ns, filp->f_cred, CAP_SYS_ADMIN) == 0) {
435 size = dev->cfg_size;
436 } else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS) {
437 size = 128;
438 }
439
440 if (off > size)
441 return 0;
442 if (off + count > size) {
443 size -= off;
444 count = size;
445 } else {
446 size = count;
447 }
448
449 if ((off & 1) && size) {
450 u8 val;
451 pci_user_read_config_byte(dev, off, &val);
452 data[off - init_off] = val;
453 off++;
454 size--;
455 }
456
457 if ((off & 3) && size > 2) {
458 u16 val;
459 pci_user_read_config_word(dev, off, &val);
460 data[off - init_off] = val & 0xff;
461 data[off - init_off + 1] = (val >> 8) & 0xff;
462 off += 2;
463 size -= 2;
464 }
465
466 while (size > 3) {
467 u32 val;
468 pci_user_read_config_dword(dev, off, &val);
469 data[off - init_off] = val & 0xff;
470 data[off - init_off + 1] = (val >> 8) & 0xff;
471 data[off - init_off + 2] = (val >> 16) & 0xff;
472 data[off - init_off + 3] = (val >> 24) & 0xff;
473 off += 4;
474 size -= 4;
475 }
476
477 if (size >= 2) {
478 u16 val;
479 pci_user_read_config_word(dev, off, &val);
480 data[off - init_off] = val & 0xff;
481 data[off - init_off + 1] = (val >> 8) & 0xff;
482 off += 2;
483 size -= 2;
484 }
485
486 if (size > 0) {
487 u8 val;
488 pci_user_read_config_byte(dev, off, &val);
489 data[off - init_off] = val;
490 off++;
491 --size;
492 }
493
494 return count;
495}
496
497static ssize_t
498pci_write_config(struct file* filp, struct kobject *kobj,
499 struct bin_attribute *bin_attr,
500 char *buf, loff_t off, size_t count)
501{
502 struct pci_dev *dev = to_pci_dev(container_of(kobj,struct device,kobj));
503 unsigned int size = count;
504 loff_t init_off = off;
505 u8 *data = (u8*) buf;
506
507 if (off > dev->cfg_size)
508 return 0;
509 if (off + count > dev->cfg_size) {
510 size = dev->cfg_size - off;
511 count = size;
512 }
513
514 if ((off & 1) && size) {
515 pci_user_write_config_byte(dev, off, data[off - init_off]);
516 off++;
517 size--;
518 }
519
520 if ((off & 3) && size > 2) {
521 u16 val = data[off - init_off];
522 val |= (u16) data[off - init_off + 1] << 8;
523 pci_user_write_config_word(dev, off, val);
524 off += 2;
525 size -= 2;
526 }
527
528 while (size > 3) {
529 u32 val = data[off - init_off];
530 val |= (u32) data[off - init_off + 1] << 8;
531 val |= (u32) data[off - init_off + 2] << 16;
532 val |= (u32) data[off - init_off + 3] << 24;
533 pci_user_write_config_dword(dev, off, val);
534 off += 4;
535 size -= 4;
536 }
537
538 if (size >= 2) {
539 u16 val = data[off - init_off];
540 val |= (u16) data[off - init_off + 1] << 8;
541 pci_user_write_config_word(dev, off, val);
542 off += 2;
543 size -= 2;
544 }
545
546 if (size) {
547 pci_user_write_config_byte(dev, off, data[off - init_off]);
548 off++;
549 --size;
550 }
551
552 return count;
553}
554
555static ssize_t
556read_vpd_attr(struct file *filp, struct kobject *kobj,
557 struct bin_attribute *bin_attr,
558 char *buf, loff_t off, size_t count)
559{
560 struct pci_dev *dev =
561 to_pci_dev(container_of(kobj, struct device, kobj));
562
563 if (off > bin_attr->size)
564 count = 0;
565 else if (count > bin_attr->size - off)
566 count = bin_attr->size - off;
567
568 return pci_read_vpd(dev, off, count, buf);
569}
570
571static ssize_t
572write_vpd_attr(struct file *filp, struct kobject *kobj,
573 struct bin_attribute *bin_attr,
574 char *buf, loff_t off, size_t count)
575{
576 struct pci_dev *dev =
577 to_pci_dev(container_of(kobj, struct device, kobj));
578
579 if (off > bin_attr->size)
580 count = 0;
581 else if (count > bin_attr->size - off)
582 count = bin_attr->size - off;
583
584 return pci_write_vpd(dev, off, count, buf);
585}
586
587#ifdef HAVE_PCI_LEGACY
588/**
589 * pci_read_legacy_io - read byte(s) from legacy I/O port space
590 * @filp: open sysfs file
591 * @kobj: kobject corresponding to file to read from
592 * @bin_attr: struct bin_attribute for this file
593 * @buf: buffer to store results
594 * @off: offset into legacy I/O port space
595 * @count: number of bytes to read
596 *
597 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
598 * callback routine (pci_legacy_read).
599 */
600static ssize_t
601pci_read_legacy_io(struct file *filp, struct kobject *kobj,
602 struct bin_attribute *bin_attr,
603 char *buf, loff_t off, size_t count)
604{
605 struct pci_bus *bus = to_pci_bus(container_of(kobj,
606 struct device,
607 kobj));
608
609 /* Only support 1, 2 or 4 byte accesses */
610 if (count != 1 && count != 2 && count != 4)
611 return -EINVAL;
612
613 return pci_legacy_read(bus, off, (u32 *)buf, count);
614}
615
616/**
617 * pci_write_legacy_io - write byte(s) to legacy I/O port space
618 * @filp: open sysfs file
619 * @kobj: kobject corresponding to file to read from
620 * @bin_attr: struct bin_attribute for this file
621 * @buf: buffer containing value to be written
622 * @off: offset into legacy I/O port space
623 * @count: number of bytes to write
624 *
625 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
626 * callback routine (pci_legacy_write).
627 */
628static ssize_t
629pci_write_legacy_io(struct file *filp, struct kobject *kobj,
630 struct bin_attribute *bin_attr,
631 char *buf, loff_t off, size_t count)
632{
633 struct pci_bus *bus = to_pci_bus(container_of(kobj,
634 struct device,
635 kobj));
636 /* Only support 1, 2 or 4 byte accesses */
637 if (count != 1 && count != 2 && count != 4)
638 return -EINVAL;
639
640 return pci_legacy_write(bus, off, *(u32 *)buf, count);
641}
642
643/**
644 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
645 * @filp: open sysfs file
646 * @kobj: kobject corresponding to device to be mapped
647 * @attr: struct bin_attribute for this file
648 * @vma: struct vm_area_struct passed to mmap
649 *
650 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
651 * legacy memory space (first meg of bus space) into application virtual
652 * memory space.
653 */
654static int
655pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
656 struct bin_attribute *attr,
657 struct vm_area_struct *vma)
658{
659 struct pci_bus *bus = to_pci_bus(container_of(kobj,
660 struct device,
661 kobj));
662
663 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
664}
665
666/**
667 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
668 * @filp: open sysfs file
669 * @kobj: kobject corresponding to device to be mapped
670 * @attr: struct bin_attribute for this file
671 * @vma: struct vm_area_struct passed to mmap
672 *
673 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
674 * legacy IO space (first meg of bus space) into application virtual
675 * memory space. Returns -ENOSYS if the operation isn't supported
676 */
677static int
678pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
679 struct bin_attribute *attr,
680 struct vm_area_struct *vma)
681{
682 struct pci_bus *bus = to_pci_bus(container_of(kobj,
683 struct device,
684 kobj));
685
686 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
687}
688
689/**
690 * pci_adjust_legacy_attr - adjustment of legacy file attributes
691 * @b: bus to create files under
692 * @mmap_type: I/O port or memory
693 *
694 * Stub implementation. Can be overridden by arch if necessary.
695 */
696void __weak
697pci_adjust_legacy_attr(struct pci_bus *b, enum pci_mmap_state mmap_type)
698{
699 return;
700}
701
702/**
703 * pci_create_legacy_files - create legacy I/O port and memory files
704 * @b: bus to create files under
705 *
706 * Some platforms allow access to legacy I/O port and ISA memory space on
707 * a per-bus basis. This routine creates the files and ties them into
708 * their associated read, write and mmap files from pci-sysfs.c
709 *
710 * On error unwind, but don't propagate the error to the caller
711 * as it is ok to set up the PCI bus without these files.
712 */
713void pci_create_legacy_files(struct pci_bus *b)
714{
715 int error;
716
717 b->legacy_io = kzalloc(sizeof(struct bin_attribute) * 2,
718 GFP_ATOMIC);
719 if (!b->legacy_io)
720 goto kzalloc_err;
721
722 sysfs_bin_attr_init(b->legacy_io);
723 b->legacy_io->attr.name = "legacy_io";
724 b->legacy_io->size = 0xffff;
725 b->legacy_io->attr.mode = S_IRUSR | S_IWUSR;
726 b->legacy_io->read = pci_read_legacy_io;
727 b->legacy_io->write = pci_write_legacy_io;
728 b->legacy_io->mmap = pci_mmap_legacy_io;
729 pci_adjust_legacy_attr(b, pci_mmap_io);
730 error = device_create_bin_file(&b->dev, b->legacy_io);
731 if (error)
732 goto legacy_io_err;
733
734 /* Allocated above after the legacy_io struct */
735 b->legacy_mem = b->legacy_io + 1;
736 sysfs_bin_attr_init(b->legacy_mem);
737 b->legacy_mem->attr.name = "legacy_mem";
738 b->legacy_mem->size = 1024*1024;
739 b->legacy_mem->attr.mode = S_IRUSR | S_IWUSR;
740 b->legacy_mem->mmap = pci_mmap_legacy_mem;
741 pci_adjust_legacy_attr(b, pci_mmap_mem);
742 error = device_create_bin_file(&b->dev, b->legacy_mem);
743 if (error)
744 goto legacy_mem_err;
745
746 return;
747
748legacy_mem_err:
749 device_remove_bin_file(&b->dev, b->legacy_io);
750legacy_io_err:
751 kfree(b->legacy_io);
752 b->legacy_io = NULL;
753kzalloc_err:
754 printk(KERN_WARNING "pci: warning: could not create legacy I/O port "
755 "and ISA memory resources to sysfs\n");
756 return;
757}
758
759void pci_remove_legacy_files(struct pci_bus *b)
760{
761 if (b->legacy_io) {
762 device_remove_bin_file(&b->dev, b->legacy_io);
763 device_remove_bin_file(&b->dev, b->legacy_mem);
764 kfree(b->legacy_io); /* both are allocated here */
765 }
766}
767#endif /* HAVE_PCI_LEGACY */
768
769#ifdef HAVE_PCI_MMAP
770
771int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
772 enum pci_mmap_api mmap_api)
773{
774 unsigned long nr, start, size, pci_start;
775
776 if (pci_resource_len(pdev, resno) == 0)
777 return 0;
778 nr = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
779 start = vma->vm_pgoff;
780 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
781 pci_start = (mmap_api == PCI_MMAP_PROCFS) ?
782 pci_resource_start(pdev, resno) >> PAGE_SHIFT : 0;
783 if (start >= pci_start && start < pci_start + size &&
784 start + nr <= pci_start + size)
785 return 1;
786 return 0;
787}
788
789/**
790 * pci_mmap_resource - map a PCI resource into user memory space
791 * @kobj: kobject for mapping
792 * @attr: struct bin_attribute for the file being mapped
793 * @vma: struct vm_area_struct passed into the mmap
794 * @write_combine: 1 for write_combine mapping
795 *
796 * Use the regular PCI mapping routines to map a PCI resource into userspace.
797 */
798static int
799pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
800 struct vm_area_struct *vma, int write_combine)
801{
802 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
803 struct device, kobj));
804 struct resource *res = attr->private;
805 enum pci_mmap_state mmap_type;
806 resource_size_t start, end;
807 int i;
808
809 for (i = 0; i < PCI_ROM_RESOURCE; i++)
810 if (res == &pdev->resource[i])
811 break;
812 if (i >= PCI_ROM_RESOURCE)
813 return -ENODEV;
814
815 if (!pci_mmap_fits(pdev, i, vma, PCI_MMAP_SYSFS)) {
816 WARN(1, "process \"%s\" tried to map 0x%08lx bytes "
817 "at page 0x%08lx on %s BAR %d (start 0x%16Lx, size 0x%16Lx)\n",
818 current->comm, vma->vm_end-vma->vm_start, vma->vm_pgoff,
819 pci_name(pdev), i,
820 (u64)pci_resource_start(pdev, i),
821 (u64)pci_resource_len(pdev, i));
822 return -EINVAL;
823 }
824
825 /* pci_mmap_page_range() expects the same kind of entry as coming
826 * from /proc/bus/pci/ which is a "user visible" value. If this is
827 * different from the resource itself, arch will do necessary fixup.
828 */
829 pci_resource_to_user(pdev, i, res, &start, &end);
830 vma->vm_pgoff += start >> PAGE_SHIFT;
831 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
832
833 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(start))
834 return -EINVAL;
835
836 return pci_mmap_page_range(pdev, vma, mmap_type, write_combine);
837}
838
839static int
840pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
841 struct bin_attribute *attr,
842 struct vm_area_struct *vma)
843{
844 return pci_mmap_resource(kobj, attr, vma, 0);
845}
846
847static int
848pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
849 struct bin_attribute *attr,
850 struct vm_area_struct *vma)
851{
852 return pci_mmap_resource(kobj, attr, vma, 1);
853}
854
855static ssize_t
856pci_resource_io(struct file *filp, struct kobject *kobj,
857 struct bin_attribute *attr, char *buf,
858 loff_t off, size_t count, bool write)
859{
860 struct pci_dev *pdev = to_pci_dev(container_of(kobj,
861 struct device, kobj));
862 struct resource *res = attr->private;
863 unsigned long port = off;
864 int i;
865
866 for (i = 0; i < PCI_ROM_RESOURCE; i++)
867 if (res == &pdev->resource[i])
868 break;
869 if (i >= PCI_ROM_RESOURCE)
870 return -ENODEV;
871
872 port += pci_resource_start(pdev, i);
873
874 if (port > pci_resource_end(pdev, i))
875 return 0;
876
877 if (port + count - 1 > pci_resource_end(pdev, i))
878 return -EINVAL;
879
880 switch (count) {
881 case 1:
882 if (write)
883 outb(*(u8 *)buf, port);
884 else
885 *(u8 *)buf = inb(port);
886 return 1;
887 case 2:
888 if (write)
889 outw(*(u16 *)buf, port);
890 else
891 *(u16 *)buf = inw(port);
892 return 2;
893 case 4:
894 if (write)
895 outl(*(u32 *)buf, port);
896 else
897 *(u32 *)buf = inl(port);
898 return 4;
899 }
900 return -EINVAL;
901}
902
903static ssize_t
904pci_read_resource_io(struct file *filp, struct kobject *kobj,
905 struct bin_attribute *attr, char *buf,
906 loff_t off, size_t count)
907{
908 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
909}
910
911static ssize_t
912pci_write_resource_io(struct file *filp, struct kobject *kobj,
913 struct bin_attribute *attr, char *buf,
914 loff_t off, size_t count)
915{
916 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
917}
918
919/**
920 * pci_remove_resource_files - cleanup resource files
921 * @pdev: dev to cleanup
922 *
923 * If we created resource files for @pdev, remove them from sysfs and
924 * free their resources.
925 */
926static void
927pci_remove_resource_files(struct pci_dev *pdev)
928{
929 int i;
930
931 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
932 struct bin_attribute *res_attr;
933
934 res_attr = pdev->res_attr[i];
935 if (res_attr) {
936 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
937 kfree(res_attr);
938 }
939
940 res_attr = pdev->res_attr_wc[i];
941 if (res_attr) {
942 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
943 kfree(res_attr);
944 }
945 }
946}
947
948static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
949{
950 /* allocate attribute structure, piggyback attribute name */
951 int name_len = write_combine ? 13 : 10;
952 struct bin_attribute *res_attr;
953 int retval;
954
955 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
956 if (res_attr) {
957 char *res_attr_name = (char *)(res_attr + 1);
958
959 sysfs_bin_attr_init(res_attr);
960 if (write_combine) {
961 pdev->res_attr_wc[num] = res_attr;
962 sprintf(res_attr_name, "resource%d_wc", num);
963 res_attr->mmap = pci_mmap_resource_wc;
964 } else {
965 pdev->res_attr[num] = res_attr;
966 sprintf(res_attr_name, "resource%d", num);
967 res_attr->mmap = pci_mmap_resource_uc;
968 }
969 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
970 res_attr->read = pci_read_resource_io;
971 res_attr->write = pci_write_resource_io;
972 }
973 res_attr->attr.name = res_attr_name;
974 res_attr->attr.mode = S_IRUSR | S_IWUSR;
975 res_attr->size = pci_resource_len(pdev, num);
976 res_attr->private = &pdev->resource[num];
977 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
978 } else
979 retval = -ENOMEM;
980
981 return retval;
982}
983
984/**
985 * pci_create_resource_files - create resource files in sysfs for @dev
986 * @pdev: dev in question
987 *
988 * Walk the resources in @pdev creating files for each resource available.
989 */
990static int pci_create_resource_files(struct pci_dev *pdev)
991{
992 int i;
993 int retval;
994
995 /* Expose the PCI resources from this device as files */
996 for (i = 0; i < PCI_ROM_RESOURCE; i++) {
997
998 /* skip empty resources */
999 if (!pci_resource_len(pdev, i))
1000 continue;
1001
1002 retval = pci_create_attr(pdev, i, 0);
1003 /* for prefetchable resources, create a WC mappable file */
1004 if (!retval && pdev->resource[i].flags & IORESOURCE_PREFETCH)
1005 retval = pci_create_attr(pdev, i, 1);
1006
1007 if (retval) {
1008 pci_remove_resource_files(pdev);
1009 return retval;
1010 }
1011 }
1012 return 0;
1013}
1014#else /* !HAVE_PCI_MMAP */
1015int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1016void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1017#endif /* HAVE_PCI_MMAP */
1018
1019/**
1020 * pci_write_rom - used to enable access to the PCI ROM display
1021 * @filp: sysfs file
1022 * @kobj: kernel object handle
1023 * @bin_attr: struct bin_attribute for this file
1024 * @buf: user input
1025 * @off: file offset
1026 * @count: number of byte in input
1027 *
1028 * writing anything except 0 enables it
1029 */
1030static ssize_t
1031pci_write_rom(struct file *filp, struct kobject *kobj,
1032 struct bin_attribute *bin_attr,
1033 char *buf, loff_t off, size_t count)
1034{
1035 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1036
1037 if ((off == 0) && (*buf == '0') && (count == 2))
1038 pdev->rom_attr_enabled = 0;
1039 else
1040 pdev->rom_attr_enabled = 1;
1041
1042 return count;
1043}
1044
1045/**
1046 * pci_read_rom - read a PCI ROM
1047 * @filp: sysfs file
1048 * @kobj: kernel object handle
1049 * @bin_attr: struct bin_attribute for this file
1050 * @buf: where to put the data we read from the ROM
1051 * @off: file offset
1052 * @count: number of bytes to read
1053 *
1054 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1055 * device corresponding to @kobj.
1056 */
1057static ssize_t
1058pci_read_rom(struct file *filp, struct kobject *kobj,
1059 struct bin_attribute *bin_attr,
1060 char *buf, loff_t off, size_t count)
1061{
1062 struct pci_dev *pdev = to_pci_dev(container_of(kobj, struct device, kobj));
1063 void __iomem *rom;
1064 size_t size;
1065
1066 if (!pdev->rom_attr_enabled)
1067 return -EINVAL;
1068
1069 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1070 if (!rom || !size)
1071 return -EIO;
1072
1073 if (off >= size)
1074 count = 0;
1075 else {
1076 if (off + count > size)
1077 count = size - off;
1078
1079 memcpy_fromio(buf, rom + off, count);
1080 }
1081 pci_unmap_rom(pdev, rom);
1082
1083 return count;
1084}
1085
1086static struct bin_attribute pci_config_attr = {
1087 .attr = {
1088 .name = "config",
1089 .mode = S_IRUGO | S_IWUSR,
1090 },
1091 .size = PCI_CFG_SPACE_SIZE,
1092 .read = pci_read_config,
1093 .write = pci_write_config,
1094};
1095
1096static struct bin_attribute pcie_config_attr = {
1097 .attr = {
1098 .name = "config",
1099 .mode = S_IRUGO | S_IWUSR,
1100 },
1101 .size = PCI_CFG_SPACE_EXP_SIZE,
1102 .read = pci_read_config,
1103 .write = pci_write_config,
1104};
1105
1106int __attribute__ ((weak)) pcibios_add_platform_entries(struct pci_dev *dev)
1107{
1108 return 0;
1109}
1110
1111static ssize_t reset_store(struct device *dev,
1112 struct device_attribute *attr, const char *buf,
1113 size_t count)
1114{
1115 struct pci_dev *pdev = to_pci_dev(dev);
1116 unsigned long val;
1117 ssize_t result = strict_strtoul(buf, 0, &val);
1118
1119 if (result < 0)
1120 return result;
1121
1122 if (val != 1)
1123 return -EINVAL;
1124
1125 result = pci_reset_function(pdev);
1126 if (result < 0)
1127 return result;
1128
1129 return count;
1130}
1131
1132static struct device_attribute reset_attr = __ATTR(reset, 0200, NULL, reset_store);
1133
1134static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1135{
1136 int retval;
1137 struct bin_attribute *attr;
1138
1139 /* If the device has VPD, try to expose it in sysfs. */
1140 if (dev->vpd) {
1141 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1142 if (!attr)
1143 return -ENOMEM;
1144
1145 sysfs_bin_attr_init(attr);
1146 attr->size = dev->vpd->len;
1147 attr->attr.name = "vpd";
1148 attr->attr.mode = S_IRUSR | S_IWUSR;
1149 attr->read = read_vpd_attr;
1150 attr->write = write_vpd_attr;
1151 retval = sysfs_create_bin_file(&dev->dev.kobj, attr);
1152 if (retval) {
1153 kfree(attr);
1154 return retval;
1155 }
1156 dev->vpd->attr = attr;
1157 }
1158
1159 /* Active State Power Management */
1160 pcie_aspm_create_sysfs_dev_files(dev);
1161
1162 if (!pci_probe_reset_function(dev)) {
1163 retval = device_create_file(&dev->dev, &reset_attr);
1164 if (retval)
1165 goto error;
1166 dev->reset_fn = 1;
1167 }
1168 return 0;
1169
1170error:
1171 pcie_aspm_remove_sysfs_dev_files(dev);
1172 if (dev->vpd && dev->vpd->attr) {
1173 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1174 kfree(dev->vpd->attr);
1175 }
1176
1177 return retval;
1178}
1179
1180int __must_check pci_create_sysfs_dev_files (struct pci_dev *pdev)
1181{
1182 int retval;
1183 int rom_size = 0;
1184 struct bin_attribute *attr;
1185
1186 if (!sysfs_initialized)
1187 return -EACCES;
1188
1189 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1190 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1191 else
1192 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1193 if (retval)
1194 goto err;
1195
1196 retval = pci_create_resource_files(pdev);
1197 if (retval)
1198 goto err_config_file;
1199
1200 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1201 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1202 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1203 rom_size = 0x20000;
1204
1205 /* If the device has a ROM, try to expose it in sysfs. */
1206 if (rom_size) {
1207 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1208 if (!attr) {
1209 retval = -ENOMEM;
1210 goto err_resource_files;
1211 }
1212 sysfs_bin_attr_init(attr);
1213 attr->size = rom_size;
1214 attr->attr.name = "rom";
1215 attr->attr.mode = S_IRUSR | S_IWUSR;
1216 attr->read = pci_read_rom;
1217 attr->write = pci_write_rom;
1218 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1219 if (retval) {
1220 kfree(attr);
1221 goto err_resource_files;
1222 }
1223 pdev->rom_attr = attr;
1224 }
1225
1226 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA) {
1227 retval = device_create_file(&pdev->dev, &vga_attr);
1228 if (retval)
1229 goto err_rom_file;
1230 }
1231
1232 /* add platform-specific attributes */
1233 retval = pcibios_add_platform_entries(pdev);
1234 if (retval)
1235 goto err_vga_file;
1236
1237 /* add sysfs entries for various capabilities */
1238 retval = pci_create_capabilities_sysfs(pdev);
1239 if (retval)
1240 goto err_vga_file;
1241
1242 pci_create_firmware_label_files(pdev);
1243
1244 return 0;
1245
1246err_vga_file:
1247 if ((pdev->class >> 8) == PCI_CLASS_DISPLAY_VGA)
1248 device_remove_file(&pdev->dev, &vga_attr);
1249err_rom_file:
1250 if (rom_size) {
1251 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1252 kfree(pdev->rom_attr);
1253 pdev->rom_attr = NULL;
1254 }
1255err_resource_files:
1256 pci_remove_resource_files(pdev);
1257err_config_file:
1258 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1259 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1260 else
1261 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1262err:
1263 return retval;
1264}
1265
1266static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1267{
1268 if (dev->vpd && dev->vpd->attr) {
1269 sysfs_remove_bin_file(&dev->dev.kobj, dev->vpd->attr);
1270 kfree(dev->vpd->attr);
1271 }
1272
1273 pcie_aspm_remove_sysfs_dev_files(dev);
1274 if (dev->reset_fn) {
1275 device_remove_file(&dev->dev, &reset_attr);
1276 dev->reset_fn = 0;
1277 }
1278}
1279
1280/**
1281 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1282 * @pdev: device whose entries we should free
1283 *
1284 * Cleanup when @pdev is removed from sysfs.
1285 */
1286void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1287{
1288 int rom_size = 0;
1289
1290 if (!sysfs_initialized)
1291 return;
1292
1293 pci_remove_capabilities_sysfs(pdev);
1294
1295 if (pdev->cfg_size < PCI_CFG_SPACE_EXP_SIZE)
1296 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1297 else
1298 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1299
1300 pci_remove_resource_files(pdev);
1301
1302 if (pci_resource_len(pdev, PCI_ROM_RESOURCE))
1303 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1304 else if (pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW)
1305 rom_size = 0x20000;
1306
1307 if (rom_size && pdev->rom_attr) {
1308 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1309 kfree(pdev->rom_attr);
1310 }
1311
1312 pci_remove_firmware_label_files(pdev);
1313
1314}
1315
1316static int __init pci_sysfs_init(void)
1317{
1318 struct pci_dev *pdev = NULL;
1319 int retval;
1320
1321 sysfs_initialized = 1;
1322 for_each_pci_dev(pdev) {
1323 retval = pci_create_sysfs_dev_files(pdev);
1324 if (retval) {
1325 pci_dev_put(pdev);
1326 return retval;
1327 }
1328 }
1329
1330 return 0;
1331}
1332
1333late_initcall(pci_sysfs_init);
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * (C) Copyright 2002-2004 Greg Kroah-Hartman <greg@kroah.com>
4 * (C) Copyright 2002-2004 IBM Corp.
5 * (C) Copyright 2003 Matthew Wilcox
6 * (C) Copyright 2003 Hewlett-Packard
7 * (C) Copyright 2004 Jon Smirl <jonsmirl@yahoo.com>
8 * (C) Copyright 2004 Silicon Graphics, Inc. Jesse Barnes <jbarnes@sgi.com>
9 *
10 * File attributes for PCI devices
11 *
12 * Modeled after usb's driverfs.c
13 */
14
15
16#include <linux/kernel.h>
17#include <linux/sched.h>
18#include <linux/pci.h>
19#include <linux/stat.h>
20#include <linux/export.h>
21#include <linux/topology.h>
22#include <linux/mm.h>
23#include <linux/fs.h>
24#include <linux/capability.h>
25#include <linux/security.h>
26#include <linux/slab.h>
27#include <linux/vgaarb.h>
28#include <linux/pm_runtime.h>
29#include <linux/of.h>
30#include "pci.h"
31
32static int sysfs_initialized; /* = 0 */
33
34/* show configuration fields */
35#define pci_config_attr(field, format_string) \
36static ssize_t \
37field##_show(struct device *dev, struct device_attribute *attr, char *buf) \
38{ \
39 struct pci_dev *pdev; \
40 \
41 pdev = to_pci_dev(dev); \
42 return sprintf(buf, format_string, pdev->field); \
43} \
44static DEVICE_ATTR_RO(field)
45
46pci_config_attr(vendor, "0x%04x\n");
47pci_config_attr(device, "0x%04x\n");
48pci_config_attr(subsystem_vendor, "0x%04x\n");
49pci_config_attr(subsystem_device, "0x%04x\n");
50pci_config_attr(revision, "0x%02x\n");
51pci_config_attr(class, "0x%06x\n");
52pci_config_attr(irq, "%u\n");
53
54static ssize_t broken_parity_status_show(struct device *dev,
55 struct device_attribute *attr,
56 char *buf)
57{
58 struct pci_dev *pdev = to_pci_dev(dev);
59 return sprintf(buf, "%u\n", pdev->broken_parity_status);
60}
61
62static ssize_t broken_parity_status_store(struct device *dev,
63 struct device_attribute *attr,
64 const char *buf, size_t count)
65{
66 struct pci_dev *pdev = to_pci_dev(dev);
67 unsigned long val;
68
69 if (kstrtoul(buf, 0, &val) < 0)
70 return -EINVAL;
71
72 pdev->broken_parity_status = !!val;
73
74 return count;
75}
76static DEVICE_ATTR_RW(broken_parity_status);
77
78static ssize_t pci_dev_show_local_cpu(struct device *dev, bool list,
79 struct device_attribute *attr, char *buf)
80{
81 const struct cpumask *mask;
82
83#ifdef CONFIG_NUMA
84 mask = (dev_to_node(dev) == -1) ? cpu_online_mask :
85 cpumask_of_node(dev_to_node(dev));
86#else
87 mask = cpumask_of_pcibus(to_pci_dev(dev)->bus);
88#endif
89 return cpumap_print_to_pagebuf(list, buf, mask);
90}
91
92static ssize_t local_cpus_show(struct device *dev,
93 struct device_attribute *attr, char *buf)
94{
95 return pci_dev_show_local_cpu(dev, false, attr, buf);
96}
97static DEVICE_ATTR_RO(local_cpus);
98
99static ssize_t local_cpulist_show(struct device *dev,
100 struct device_attribute *attr, char *buf)
101{
102 return pci_dev_show_local_cpu(dev, true, attr, buf);
103}
104static DEVICE_ATTR_RO(local_cpulist);
105
106/*
107 * PCI Bus Class Devices
108 */
109static ssize_t cpuaffinity_show(struct device *dev,
110 struct device_attribute *attr, char *buf)
111{
112 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
113
114 return cpumap_print_to_pagebuf(false, buf, cpumask);
115}
116static DEVICE_ATTR_RO(cpuaffinity);
117
118static ssize_t cpulistaffinity_show(struct device *dev,
119 struct device_attribute *attr, char *buf)
120{
121 const struct cpumask *cpumask = cpumask_of_pcibus(to_pci_bus(dev));
122
123 return cpumap_print_to_pagebuf(true, buf, cpumask);
124}
125static DEVICE_ATTR_RO(cpulistaffinity);
126
127/* show resources */
128static ssize_t resource_show(struct device *dev, struct device_attribute *attr,
129 char *buf)
130{
131 struct pci_dev *pci_dev = to_pci_dev(dev);
132 char *str = buf;
133 int i;
134 int max;
135 resource_size_t start, end;
136
137 if (pci_dev->subordinate)
138 max = DEVICE_COUNT_RESOURCE;
139 else
140 max = PCI_BRIDGE_RESOURCES;
141
142 for (i = 0; i < max; i++) {
143 struct resource *res = &pci_dev->resource[i];
144 pci_resource_to_user(pci_dev, i, res, &start, &end);
145 str += sprintf(str, "0x%016llx 0x%016llx 0x%016llx\n",
146 (unsigned long long)start,
147 (unsigned long long)end,
148 (unsigned long long)res->flags);
149 }
150 return (str - buf);
151}
152static DEVICE_ATTR_RO(resource);
153
154static ssize_t max_link_speed_show(struct device *dev,
155 struct device_attribute *attr, char *buf)
156{
157 struct pci_dev *pdev = to_pci_dev(dev);
158
159 return sprintf(buf, "%s\n",
160 pci_speed_string(pcie_get_speed_cap(pdev)));
161}
162static DEVICE_ATTR_RO(max_link_speed);
163
164static ssize_t max_link_width_show(struct device *dev,
165 struct device_attribute *attr, char *buf)
166{
167 struct pci_dev *pdev = to_pci_dev(dev);
168
169 return sprintf(buf, "%u\n", pcie_get_width_cap(pdev));
170}
171static DEVICE_ATTR_RO(max_link_width);
172
173static ssize_t current_link_speed_show(struct device *dev,
174 struct device_attribute *attr, char *buf)
175{
176 struct pci_dev *pci_dev = to_pci_dev(dev);
177 u16 linkstat;
178 int err;
179 enum pci_bus_speed speed;
180
181 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
182 if (err)
183 return -EINVAL;
184
185 speed = pcie_link_speed[linkstat & PCI_EXP_LNKSTA_CLS];
186
187 return sprintf(buf, "%s\n", pci_speed_string(speed));
188}
189static DEVICE_ATTR_RO(current_link_speed);
190
191static ssize_t current_link_width_show(struct device *dev,
192 struct device_attribute *attr, char *buf)
193{
194 struct pci_dev *pci_dev = to_pci_dev(dev);
195 u16 linkstat;
196 int err;
197
198 err = pcie_capability_read_word(pci_dev, PCI_EXP_LNKSTA, &linkstat);
199 if (err)
200 return -EINVAL;
201
202 return sprintf(buf, "%u\n",
203 (linkstat & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT);
204}
205static DEVICE_ATTR_RO(current_link_width);
206
207static ssize_t secondary_bus_number_show(struct device *dev,
208 struct device_attribute *attr,
209 char *buf)
210{
211 struct pci_dev *pci_dev = to_pci_dev(dev);
212 u8 sec_bus;
213 int err;
214
215 err = pci_read_config_byte(pci_dev, PCI_SECONDARY_BUS, &sec_bus);
216 if (err)
217 return -EINVAL;
218
219 return sprintf(buf, "%u\n", sec_bus);
220}
221static DEVICE_ATTR_RO(secondary_bus_number);
222
223static ssize_t subordinate_bus_number_show(struct device *dev,
224 struct device_attribute *attr,
225 char *buf)
226{
227 struct pci_dev *pci_dev = to_pci_dev(dev);
228 u8 sub_bus;
229 int err;
230
231 err = pci_read_config_byte(pci_dev, PCI_SUBORDINATE_BUS, &sub_bus);
232 if (err)
233 return -EINVAL;
234
235 return sprintf(buf, "%u\n", sub_bus);
236}
237static DEVICE_ATTR_RO(subordinate_bus_number);
238
239static ssize_t ari_enabled_show(struct device *dev,
240 struct device_attribute *attr,
241 char *buf)
242{
243 struct pci_dev *pci_dev = to_pci_dev(dev);
244
245 return sprintf(buf, "%u\n", pci_ari_enabled(pci_dev->bus));
246}
247static DEVICE_ATTR_RO(ari_enabled);
248
249static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
250 char *buf)
251{
252 struct pci_dev *pci_dev = to_pci_dev(dev);
253
254 return sprintf(buf, "pci:v%08Xd%08Xsv%08Xsd%08Xbc%02Xsc%02Xi%02X\n",
255 pci_dev->vendor, pci_dev->device,
256 pci_dev->subsystem_vendor, pci_dev->subsystem_device,
257 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
258 (u8)(pci_dev->class));
259}
260static DEVICE_ATTR_RO(modalias);
261
262static ssize_t enable_store(struct device *dev, struct device_attribute *attr,
263 const char *buf, size_t count)
264{
265 struct pci_dev *pdev = to_pci_dev(dev);
266 unsigned long val;
267 ssize_t result = kstrtoul(buf, 0, &val);
268
269 if (result < 0)
270 return result;
271
272 /* this can crash the machine when done on the "wrong" device */
273 if (!capable(CAP_SYS_ADMIN))
274 return -EPERM;
275
276 device_lock(dev);
277 if (dev->driver)
278 result = -EBUSY;
279 else if (val)
280 result = pci_enable_device(pdev);
281 else if (pci_is_enabled(pdev))
282 pci_disable_device(pdev);
283 else
284 result = -EIO;
285 device_unlock(dev);
286
287 return result < 0 ? result : count;
288}
289
290static ssize_t enable_show(struct device *dev, struct device_attribute *attr,
291 char *buf)
292{
293 struct pci_dev *pdev;
294
295 pdev = to_pci_dev(dev);
296 return sprintf(buf, "%u\n", atomic_read(&pdev->enable_cnt));
297}
298static DEVICE_ATTR_RW(enable);
299
300#ifdef CONFIG_NUMA
301static ssize_t numa_node_store(struct device *dev,
302 struct device_attribute *attr, const char *buf,
303 size_t count)
304{
305 struct pci_dev *pdev = to_pci_dev(dev);
306 int node, ret;
307
308 if (!capable(CAP_SYS_ADMIN))
309 return -EPERM;
310
311 ret = kstrtoint(buf, 0, &node);
312 if (ret)
313 return ret;
314
315 if ((node < 0 && node != NUMA_NO_NODE) || node >= MAX_NUMNODES)
316 return -EINVAL;
317
318 if (node != NUMA_NO_NODE && !node_online(node))
319 return -EINVAL;
320
321 add_taint(TAINT_FIRMWARE_WORKAROUND, LOCKDEP_STILL_OK);
322 pci_alert(pdev, FW_BUG "Overriding NUMA node to %d. Contact your vendor for updates.",
323 node);
324
325 dev->numa_node = node;
326 return count;
327}
328
329static ssize_t numa_node_show(struct device *dev, struct device_attribute *attr,
330 char *buf)
331{
332 return sprintf(buf, "%d\n", dev->numa_node);
333}
334static DEVICE_ATTR_RW(numa_node);
335#endif
336
337static ssize_t dma_mask_bits_show(struct device *dev,
338 struct device_attribute *attr, char *buf)
339{
340 struct pci_dev *pdev = to_pci_dev(dev);
341
342 return sprintf(buf, "%d\n", fls64(pdev->dma_mask));
343}
344static DEVICE_ATTR_RO(dma_mask_bits);
345
346static ssize_t consistent_dma_mask_bits_show(struct device *dev,
347 struct device_attribute *attr,
348 char *buf)
349{
350 return sprintf(buf, "%d\n", fls64(dev->coherent_dma_mask));
351}
352static DEVICE_ATTR_RO(consistent_dma_mask_bits);
353
354static ssize_t msi_bus_show(struct device *dev, struct device_attribute *attr,
355 char *buf)
356{
357 struct pci_dev *pdev = to_pci_dev(dev);
358 struct pci_bus *subordinate = pdev->subordinate;
359
360 return sprintf(buf, "%u\n", subordinate ?
361 !(subordinate->bus_flags & PCI_BUS_FLAGS_NO_MSI)
362 : !pdev->no_msi);
363}
364
365static ssize_t msi_bus_store(struct device *dev, struct device_attribute *attr,
366 const char *buf, size_t count)
367{
368 struct pci_dev *pdev = to_pci_dev(dev);
369 struct pci_bus *subordinate = pdev->subordinate;
370 unsigned long val;
371
372 if (kstrtoul(buf, 0, &val) < 0)
373 return -EINVAL;
374
375 if (!capable(CAP_SYS_ADMIN))
376 return -EPERM;
377
378 /*
379 * "no_msi" and "bus_flags" only affect what happens when a driver
380 * requests MSI or MSI-X. They don't affect any drivers that have
381 * already requested MSI or MSI-X.
382 */
383 if (!subordinate) {
384 pdev->no_msi = !val;
385 pci_info(pdev, "MSI/MSI-X %s for future drivers\n",
386 val ? "allowed" : "disallowed");
387 return count;
388 }
389
390 if (val)
391 subordinate->bus_flags &= ~PCI_BUS_FLAGS_NO_MSI;
392 else
393 subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
394
395 dev_info(&subordinate->dev, "MSI/MSI-X %s for future drivers of devices on this bus\n",
396 val ? "allowed" : "disallowed");
397 return count;
398}
399static DEVICE_ATTR_RW(msi_bus);
400
401static ssize_t rescan_store(struct bus_type *bus, const char *buf, size_t count)
402{
403 unsigned long val;
404 struct pci_bus *b = NULL;
405
406 if (kstrtoul(buf, 0, &val) < 0)
407 return -EINVAL;
408
409 if (val) {
410 pci_lock_rescan_remove();
411 while ((b = pci_find_next_bus(b)) != NULL)
412 pci_rescan_bus(b);
413 pci_unlock_rescan_remove();
414 }
415 return count;
416}
417static BUS_ATTR_WO(rescan);
418
419static struct attribute *pci_bus_attrs[] = {
420 &bus_attr_rescan.attr,
421 NULL,
422};
423
424static const struct attribute_group pci_bus_group = {
425 .attrs = pci_bus_attrs,
426};
427
428const struct attribute_group *pci_bus_groups[] = {
429 &pci_bus_group,
430 NULL,
431};
432
433static ssize_t dev_rescan_store(struct device *dev,
434 struct device_attribute *attr, const char *buf,
435 size_t count)
436{
437 unsigned long val;
438 struct pci_dev *pdev = to_pci_dev(dev);
439
440 if (kstrtoul(buf, 0, &val) < 0)
441 return -EINVAL;
442
443 if (val) {
444 pci_lock_rescan_remove();
445 pci_rescan_bus(pdev->bus);
446 pci_unlock_rescan_remove();
447 }
448 return count;
449}
450static struct device_attribute dev_attr_dev_rescan = __ATTR(rescan, 0200, NULL,
451 dev_rescan_store);
452
453static ssize_t remove_store(struct device *dev, struct device_attribute *attr,
454 const char *buf, size_t count)
455{
456 unsigned long val;
457
458 if (kstrtoul(buf, 0, &val) < 0)
459 return -EINVAL;
460
461 if (val && device_remove_file_self(dev, attr))
462 pci_stop_and_remove_bus_device_locked(to_pci_dev(dev));
463 return count;
464}
465static DEVICE_ATTR_IGNORE_LOCKDEP(remove, 0220, NULL,
466 remove_store);
467
468static ssize_t bus_rescan_store(struct device *dev,
469 struct device_attribute *attr,
470 const char *buf, size_t count)
471{
472 unsigned long val;
473 struct pci_bus *bus = to_pci_bus(dev);
474
475 if (kstrtoul(buf, 0, &val) < 0)
476 return -EINVAL;
477
478 if (val) {
479 pci_lock_rescan_remove();
480 if (!pci_is_root_bus(bus) && list_empty(&bus->devices))
481 pci_rescan_bus_bridge_resize(bus->self);
482 else
483 pci_rescan_bus(bus);
484 pci_unlock_rescan_remove();
485 }
486 return count;
487}
488static struct device_attribute dev_attr_bus_rescan = __ATTR(rescan, 0200, NULL,
489 bus_rescan_store);
490
491#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
492static ssize_t d3cold_allowed_store(struct device *dev,
493 struct device_attribute *attr,
494 const char *buf, size_t count)
495{
496 struct pci_dev *pdev = to_pci_dev(dev);
497 unsigned long val;
498
499 if (kstrtoul(buf, 0, &val) < 0)
500 return -EINVAL;
501
502 pdev->d3cold_allowed = !!val;
503 if (pdev->d3cold_allowed)
504 pci_d3cold_enable(pdev);
505 else
506 pci_d3cold_disable(pdev);
507
508 pm_runtime_resume(dev);
509
510 return count;
511}
512
513static ssize_t d3cold_allowed_show(struct device *dev,
514 struct device_attribute *attr, char *buf)
515{
516 struct pci_dev *pdev = to_pci_dev(dev);
517 return sprintf(buf, "%u\n", pdev->d3cold_allowed);
518}
519static DEVICE_ATTR_RW(d3cold_allowed);
520#endif
521
522#ifdef CONFIG_OF
523static ssize_t devspec_show(struct device *dev,
524 struct device_attribute *attr, char *buf)
525{
526 struct pci_dev *pdev = to_pci_dev(dev);
527 struct device_node *np = pci_device_to_OF_node(pdev);
528
529 if (np == NULL)
530 return 0;
531 return sprintf(buf, "%pOF", np);
532}
533static DEVICE_ATTR_RO(devspec);
534#endif
535
536static ssize_t driver_override_store(struct device *dev,
537 struct device_attribute *attr,
538 const char *buf, size_t count)
539{
540 struct pci_dev *pdev = to_pci_dev(dev);
541 char *driver_override, *old, *cp;
542
543 /* We need to keep extra room for a newline */
544 if (count >= (PAGE_SIZE - 1))
545 return -EINVAL;
546
547 driver_override = kstrndup(buf, count, GFP_KERNEL);
548 if (!driver_override)
549 return -ENOMEM;
550
551 cp = strchr(driver_override, '\n');
552 if (cp)
553 *cp = '\0';
554
555 device_lock(dev);
556 old = pdev->driver_override;
557 if (strlen(driver_override)) {
558 pdev->driver_override = driver_override;
559 } else {
560 kfree(driver_override);
561 pdev->driver_override = NULL;
562 }
563 device_unlock(dev);
564
565 kfree(old);
566
567 return count;
568}
569
570static ssize_t driver_override_show(struct device *dev,
571 struct device_attribute *attr, char *buf)
572{
573 struct pci_dev *pdev = to_pci_dev(dev);
574 ssize_t len;
575
576 device_lock(dev);
577 len = snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
578 device_unlock(dev);
579 return len;
580}
581static DEVICE_ATTR_RW(driver_override);
582
583static struct attribute *pci_dev_attrs[] = {
584 &dev_attr_resource.attr,
585 &dev_attr_vendor.attr,
586 &dev_attr_device.attr,
587 &dev_attr_subsystem_vendor.attr,
588 &dev_attr_subsystem_device.attr,
589 &dev_attr_revision.attr,
590 &dev_attr_class.attr,
591 &dev_attr_irq.attr,
592 &dev_attr_local_cpus.attr,
593 &dev_attr_local_cpulist.attr,
594 &dev_attr_modalias.attr,
595#ifdef CONFIG_NUMA
596 &dev_attr_numa_node.attr,
597#endif
598 &dev_attr_dma_mask_bits.attr,
599 &dev_attr_consistent_dma_mask_bits.attr,
600 &dev_attr_enable.attr,
601 &dev_attr_broken_parity_status.attr,
602 &dev_attr_msi_bus.attr,
603#if defined(CONFIG_PM) && defined(CONFIG_ACPI)
604 &dev_attr_d3cold_allowed.attr,
605#endif
606#ifdef CONFIG_OF
607 &dev_attr_devspec.attr,
608#endif
609 &dev_attr_driver_override.attr,
610 &dev_attr_ari_enabled.attr,
611 NULL,
612};
613
614static struct attribute *pci_bridge_attrs[] = {
615 &dev_attr_subordinate_bus_number.attr,
616 &dev_attr_secondary_bus_number.attr,
617 NULL,
618};
619
620static struct attribute *pcie_dev_attrs[] = {
621 &dev_attr_current_link_speed.attr,
622 &dev_attr_current_link_width.attr,
623 &dev_attr_max_link_width.attr,
624 &dev_attr_max_link_speed.attr,
625 NULL,
626};
627
628static struct attribute *pcibus_attrs[] = {
629 &dev_attr_bus_rescan.attr,
630 &dev_attr_cpuaffinity.attr,
631 &dev_attr_cpulistaffinity.attr,
632 NULL,
633};
634
635static const struct attribute_group pcibus_group = {
636 .attrs = pcibus_attrs,
637};
638
639const struct attribute_group *pcibus_groups[] = {
640 &pcibus_group,
641 NULL,
642};
643
644static ssize_t boot_vga_show(struct device *dev, struct device_attribute *attr,
645 char *buf)
646{
647 struct pci_dev *pdev = to_pci_dev(dev);
648 struct pci_dev *vga_dev = vga_default_device();
649
650 if (vga_dev)
651 return sprintf(buf, "%u\n", (pdev == vga_dev));
652
653 return sprintf(buf, "%u\n",
654 !!(pdev->resource[PCI_ROM_RESOURCE].flags &
655 IORESOURCE_ROM_SHADOW));
656}
657static DEVICE_ATTR_RO(boot_vga);
658
659static ssize_t pci_read_config(struct file *filp, struct kobject *kobj,
660 struct bin_attribute *bin_attr, char *buf,
661 loff_t off, size_t count)
662{
663 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
664 unsigned int size = 64;
665 loff_t init_off = off;
666 u8 *data = (u8 *) buf;
667
668 /* Several chips lock up trying to read undefined config space */
669 if (file_ns_capable(filp, &init_user_ns, CAP_SYS_ADMIN))
670 size = dev->cfg_size;
671 else if (dev->hdr_type == PCI_HEADER_TYPE_CARDBUS)
672 size = 128;
673
674 if (off > size)
675 return 0;
676 if (off + count > size) {
677 size -= off;
678 count = size;
679 } else {
680 size = count;
681 }
682
683 pci_config_pm_runtime_get(dev);
684
685 if ((off & 1) && size) {
686 u8 val;
687 pci_user_read_config_byte(dev, off, &val);
688 data[off - init_off] = val;
689 off++;
690 size--;
691 }
692
693 if ((off & 3) && size > 2) {
694 u16 val;
695 pci_user_read_config_word(dev, off, &val);
696 data[off - init_off] = val & 0xff;
697 data[off - init_off + 1] = (val >> 8) & 0xff;
698 off += 2;
699 size -= 2;
700 }
701
702 while (size > 3) {
703 u32 val;
704 pci_user_read_config_dword(dev, off, &val);
705 data[off - init_off] = val & 0xff;
706 data[off - init_off + 1] = (val >> 8) & 0xff;
707 data[off - init_off + 2] = (val >> 16) & 0xff;
708 data[off - init_off + 3] = (val >> 24) & 0xff;
709 off += 4;
710 size -= 4;
711 }
712
713 if (size >= 2) {
714 u16 val;
715 pci_user_read_config_word(dev, off, &val);
716 data[off - init_off] = val & 0xff;
717 data[off - init_off + 1] = (val >> 8) & 0xff;
718 off += 2;
719 size -= 2;
720 }
721
722 if (size > 0) {
723 u8 val;
724 pci_user_read_config_byte(dev, off, &val);
725 data[off - init_off] = val;
726 off++;
727 --size;
728 }
729
730 pci_config_pm_runtime_put(dev);
731
732 return count;
733}
734
735static ssize_t pci_write_config(struct file *filp, struct kobject *kobj,
736 struct bin_attribute *bin_attr, char *buf,
737 loff_t off, size_t count)
738{
739 struct pci_dev *dev = to_pci_dev(kobj_to_dev(kobj));
740 unsigned int size = count;
741 loff_t init_off = off;
742 u8 *data = (u8 *) buf;
743 int ret;
744
745 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
746 if (ret)
747 return ret;
748
749 if (off > dev->cfg_size)
750 return 0;
751 if (off + count > dev->cfg_size) {
752 size = dev->cfg_size - off;
753 count = size;
754 }
755
756 pci_config_pm_runtime_get(dev);
757
758 if ((off & 1) && size) {
759 pci_user_write_config_byte(dev, off, data[off - init_off]);
760 off++;
761 size--;
762 }
763
764 if ((off & 3) && size > 2) {
765 u16 val = data[off - init_off];
766 val |= (u16) data[off - init_off + 1] << 8;
767 pci_user_write_config_word(dev, off, val);
768 off += 2;
769 size -= 2;
770 }
771
772 while (size > 3) {
773 u32 val = data[off - init_off];
774 val |= (u32) data[off - init_off + 1] << 8;
775 val |= (u32) data[off - init_off + 2] << 16;
776 val |= (u32) data[off - init_off + 3] << 24;
777 pci_user_write_config_dword(dev, off, val);
778 off += 4;
779 size -= 4;
780 }
781
782 if (size >= 2) {
783 u16 val = data[off - init_off];
784 val |= (u16) data[off - init_off + 1] << 8;
785 pci_user_write_config_word(dev, off, val);
786 off += 2;
787 size -= 2;
788 }
789
790 if (size) {
791 pci_user_write_config_byte(dev, off, data[off - init_off]);
792 off++;
793 --size;
794 }
795
796 pci_config_pm_runtime_put(dev);
797
798 return count;
799}
800
801#ifdef HAVE_PCI_LEGACY
802/**
803 * pci_read_legacy_io - read byte(s) from legacy I/O port space
804 * @filp: open sysfs file
805 * @kobj: kobject corresponding to file to read from
806 * @bin_attr: struct bin_attribute for this file
807 * @buf: buffer to store results
808 * @off: offset into legacy I/O port space
809 * @count: number of bytes to read
810 *
811 * Reads 1, 2, or 4 bytes from legacy I/O port space using an arch specific
812 * callback routine (pci_legacy_read).
813 */
814static ssize_t pci_read_legacy_io(struct file *filp, struct kobject *kobj,
815 struct bin_attribute *bin_attr, char *buf,
816 loff_t off, size_t count)
817{
818 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
819
820 /* Only support 1, 2 or 4 byte accesses */
821 if (count != 1 && count != 2 && count != 4)
822 return -EINVAL;
823
824 return pci_legacy_read(bus, off, (u32 *)buf, count);
825}
826
827/**
828 * pci_write_legacy_io - write byte(s) to legacy I/O port space
829 * @filp: open sysfs file
830 * @kobj: kobject corresponding to file to read from
831 * @bin_attr: struct bin_attribute for this file
832 * @buf: buffer containing value to be written
833 * @off: offset into legacy I/O port space
834 * @count: number of bytes to write
835 *
836 * Writes 1, 2, or 4 bytes from legacy I/O port space using an arch specific
837 * callback routine (pci_legacy_write).
838 */
839static ssize_t pci_write_legacy_io(struct file *filp, struct kobject *kobj,
840 struct bin_attribute *bin_attr, char *buf,
841 loff_t off, size_t count)
842{
843 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
844
845 /* Only support 1, 2 or 4 byte accesses */
846 if (count != 1 && count != 2 && count != 4)
847 return -EINVAL;
848
849 return pci_legacy_write(bus, off, *(u32 *)buf, count);
850}
851
852/**
853 * pci_mmap_legacy_mem - map legacy PCI memory into user memory space
854 * @filp: open sysfs file
855 * @kobj: kobject corresponding to device to be mapped
856 * @attr: struct bin_attribute for this file
857 * @vma: struct vm_area_struct passed to mmap
858 *
859 * Uses an arch specific callback, pci_mmap_legacy_mem_page_range, to mmap
860 * legacy memory space (first meg of bus space) into application virtual
861 * memory space.
862 */
863static int pci_mmap_legacy_mem(struct file *filp, struct kobject *kobj,
864 struct bin_attribute *attr,
865 struct vm_area_struct *vma)
866{
867 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
868
869 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_mem);
870}
871
872/**
873 * pci_mmap_legacy_io - map legacy PCI IO into user memory space
874 * @filp: open sysfs file
875 * @kobj: kobject corresponding to device to be mapped
876 * @attr: struct bin_attribute for this file
877 * @vma: struct vm_area_struct passed to mmap
878 *
879 * Uses an arch specific callback, pci_mmap_legacy_io_page_range, to mmap
880 * legacy IO space (first meg of bus space) into application virtual
881 * memory space. Returns -ENOSYS if the operation isn't supported
882 */
883static int pci_mmap_legacy_io(struct file *filp, struct kobject *kobj,
884 struct bin_attribute *attr,
885 struct vm_area_struct *vma)
886{
887 struct pci_bus *bus = to_pci_bus(kobj_to_dev(kobj));
888
889 return pci_mmap_legacy_page_range(bus, vma, pci_mmap_io);
890}
891
892/**
893 * pci_adjust_legacy_attr - adjustment of legacy file attributes
894 * @b: bus to create files under
895 * @mmap_type: I/O port or memory
896 *
897 * Stub implementation. Can be overridden by arch if necessary.
898 */
899void __weak pci_adjust_legacy_attr(struct pci_bus *b,
900 enum pci_mmap_state mmap_type)
901{
902}
903
904/**
905 * pci_create_legacy_files - create legacy I/O port and memory files
906 * @b: bus to create files under
907 *
908 * Some platforms allow access to legacy I/O port and ISA memory space on
909 * a per-bus basis. This routine creates the files and ties them into
910 * their associated read, write and mmap files from pci-sysfs.c
911 *
912 * On error unwind, but don't propagate the error to the caller
913 * as it is ok to set up the PCI bus without these files.
914 */
915void pci_create_legacy_files(struct pci_bus *b)
916{
917 int error;
918
919 b->legacy_io = kcalloc(2, sizeof(struct bin_attribute),
920 GFP_ATOMIC);
921 if (!b->legacy_io)
922 goto kzalloc_err;
923
924 sysfs_bin_attr_init(b->legacy_io);
925 b->legacy_io->attr.name = "legacy_io";
926 b->legacy_io->size = 0xffff;
927 b->legacy_io->attr.mode = 0600;
928 b->legacy_io->read = pci_read_legacy_io;
929 b->legacy_io->write = pci_write_legacy_io;
930 b->legacy_io->mmap = pci_mmap_legacy_io;
931 pci_adjust_legacy_attr(b, pci_mmap_io);
932 error = device_create_bin_file(&b->dev, b->legacy_io);
933 if (error)
934 goto legacy_io_err;
935
936 /* Allocated above after the legacy_io struct */
937 b->legacy_mem = b->legacy_io + 1;
938 sysfs_bin_attr_init(b->legacy_mem);
939 b->legacy_mem->attr.name = "legacy_mem";
940 b->legacy_mem->size = 1024*1024;
941 b->legacy_mem->attr.mode = 0600;
942 b->legacy_mem->mmap = pci_mmap_legacy_mem;
943 pci_adjust_legacy_attr(b, pci_mmap_mem);
944 error = device_create_bin_file(&b->dev, b->legacy_mem);
945 if (error)
946 goto legacy_mem_err;
947
948 return;
949
950legacy_mem_err:
951 device_remove_bin_file(&b->dev, b->legacy_io);
952legacy_io_err:
953 kfree(b->legacy_io);
954 b->legacy_io = NULL;
955kzalloc_err:
956 dev_warn(&b->dev, "could not create legacy I/O port and ISA memory resources in sysfs\n");
957}
958
959void pci_remove_legacy_files(struct pci_bus *b)
960{
961 if (b->legacy_io) {
962 device_remove_bin_file(&b->dev, b->legacy_io);
963 device_remove_bin_file(&b->dev, b->legacy_mem);
964 kfree(b->legacy_io); /* both are allocated here */
965 }
966}
967#endif /* HAVE_PCI_LEGACY */
968
969#if defined(HAVE_PCI_MMAP) || defined(ARCH_GENERIC_PCI_MMAP_RESOURCE)
970
971int pci_mmap_fits(struct pci_dev *pdev, int resno, struct vm_area_struct *vma,
972 enum pci_mmap_api mmap_api)
973{
974 unsigned long nr, start, size;
975 resource_size_t pci_start = 0, pci_end;
976
977 if (pci_resource_len(pdev, resno) == 0)
978 return 0;
979 nr = vma_pages(vma);
980 start = vma->vm_pgoff;
981 size = ((pci_resource_len(pdev, resno) - 1) >> PAGE_SHIFT) + 1;
982 if (mmap_api == PCI_MMAP_PROCFS) {
983 pci_resource_to_user(pdev, resno, &pdev->resource[resno],
984 &pci_start, &pci_end);
985 pci_start >>= PAGE_SHIFT;
986 }
987 if (start >= pci_start && start < pci_start + size &&
988 start + nr <= pci_start + size)
989 return 1;
990 return 0;
991}
992
993/**
994 * pci_mmap_resource - map a PCI resource into user memory space
995 * @kobj: kobject for mapping
996 * @attr: struct bin_attribute for the file being mapped
997 * @vma: struct vm_area_struct passed into the mmap
998 * @write_combine: 1 for write_combine mapping
999 *
1000 * Use the regular PCI mapping routines to map a PCI resource into userspace.
1001 */
1002static int pci_mmap_resource(struct kobject *kobj, struct bin_attribute *attr,
1003 struct vm_area_struct *vma, int write_combine)
1004{
1005 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1006 int bar = (unsigned long)attr->private;
1007 enum pci_mmap_state mmap_type;
1008 struct resource *res = &pdev->resource[bar];
1009 int ret;
1010
1011 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1012 if (ret)
1013 return ret;
1014
1015 if (res->flags & IORESOURCE_MEM && iomem_is_exclusive(res->start))
1016 return -EINVAL;
1017
1018 if (!pci_mmap_fits(pdev, bar, vma, PCI_MMAP_SYSFS))
1019 return -EINVAL;
1020
1021 mmap_type = res->flags & IORESOURCE_MEM ? pci_mmap_mem : pci_mmap_io;
1022
1023 return pci_mmap_resource_range(pdev, bar, vma, mmap_type, write_combine);
1024}
1025
1026static int pci_mmap_resource_uc(struct file *filp, struct kobject *kobj,
1027 struct bin_attribute *attr,
1028 struct vm_area_struct *vma)
1029{
1030 return pci_mmap_resource(kobj, attr, vma, 0);
1031}
1032
1033static int pci_mmap_resource_wc(struct file *filp, struct kobject *kobj,
1034 struct bin_attribute *attr,
1035 struct vm_area_struct *vma)
1036{
1037 return pci_mmap_resource(kobj, attr, vma, 1);
1038}
1039
1040static ssize_t pci_resource_io(struct file *filp, struct kobject *kobj,
1041 struct bin_attribute *attr, char *buf,
1042 loff_t off, size_t count, bool write)
1043{
1044 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1045 int bar = (unsigned long)attr->private;
1046 unsigned long port = off;
1047
1048 port += pci_resource_start(pdev, bar);
1049
1050 if (port > pci_resource_end(pdev, bar))
1051 return 0;
1052
1053 if (port + count - 1 > pci_resource_end(pdev, bar))
1054 return -EINVAL;
1055
1056 switch (count) {
1057 case 1:
1058 if (write)
1059 outb(*(u8 *)buf, port);
1060 else
1061 *(u8 *)buf = inb(port);
1062 return 1;
1063 case 2:
1064 if (write)
1065 outw(*(u16 *)buf, port);
1066 else
1067 *(u16 *)buf = inw(port);
1068 return 2;
1069 case 4:
1070 if (write)
1071 outl(*(u32 *)buf, port);
1072 else
1073 *(u32 *)buf = inl(port);
1074 return 4;
1075 }
1076 return -EINVAL;
1077}
1078
1079static ssize_t pci_read_resource_io(struct file *filp, struct kobject *kobj,
1080 struct bin_attribute *attr, char *buf,
1081 loff_t off, size_t count)
1082{
1083 return pci_resource_io(filp, kobj, attr, buf, off, count, false);
1084}
1085
1086static ssize_t pci_write_resource_io(struct file *filp, struct kobject *kobj,
1087 struct bin_attribute *attr, char *buf,
1088 loff_t off, size_t count)
1089{
1090 int ret;
1091
1092 ret = security_locked_down(LOCKDOWN_PCI_ACCESS);
1093 if (ret)
1094 return ret;
1095
1096 return pci_resource_io(filp, kobj, attr, buf, off, count, true);
1097}
1098
1099/**
1100 * pci_remove_resource_files - cleanup resource files
1101 * @pdev: dev to cleanup
1102 *
1103 * If we created resource files for @pdev, remove them from sysfs and
1104 * free their resources.
1105 */
1106static void pci_remove_resource_files(struct pci_dev *pdev)
1107{
1108 int i;
1109
1110 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1111 struct bin_attribute *res_attr;
1112
1113 res_attr = pdev->res_attr[i];
1114 if (res_attr) {
1115 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1116 kfree(res_attr);
1117 }
1118
1119 res_attr = pdev->res_attr_wc[i];
1120 if (res_attr) {
1121 sysfs_remove_bin_file(&pdev->dev.kobj, res_attr);
1122 kfree(res_attr);
1123 }
1124 }
1125}
1126
1127static int pci_create_attr(struct pci_dev *pdev, int num, int write_combine)
1128{
1129 /* allocate attribute structure, piggyback attribute name */
1130 int name_len = write_combine ? 13 : 10;
1131 struct bin_attribute *res_attr;
1132 char *res_attr_name;
1133 int retval;
1134
1135 res_attr = kzalloc(sizeof(*res_attr) + name_len, GFP_ATOMIC);
1136 if (!res_attr)
1137 return -ENOMEM;
1138
1139 res_attr_name = (char *)(res_attr + 1);
1140
1141 sysfs_bin_attr_init(res_attr);
1142 if (write_combine) {
1143 pdev->res_attr_wc[num] = res_attr;
1144 sprintf(res_attr_name, "resource%d_wc", num);
1145 res_attr->mmap = pci_mmap_resource_wc;
1146 } else {
1147 pdev->res_attr[num] = res_attr;
1148 sprintf(res_attr_name, "resource%d", num);
1149 if (pci_resource_flags(pdev, num) & IORESOURCE_IO) {
1150 res_attr->read = pci_read_resource_io;
1151 res_attr->write = pci_write_resource_io;
1152 if (arch_can_pci_mmap_io())
1153 res_attr->mmap = pci_mmap_resource_uc;
1154 } else {
1155 res_attr->mmap = pci_mmap_resource_uc;
1156 }
1157 }
1158 res_attr->attr.name = res_attr_name;
1159 res_attr->attr.mode = 0600;
1160 res_attr->size = pci_resource_len(pdev, num);
1161 res_attr->private = (void *)(unsigned long)num;
1162 retval = sysfs_create_bin_file(&pdev->dev.kobj, res_attr);
1163 if (retval)
1164 kfree(res_attr);
1165
1166 return retval;
1167}
1168
1169/**
1170 * pci_create_resource_files - create resource files in sysfs for @dev
1171 * @pdev: dev in question
1172 *
1173 * Walk the resources in @pdev creating files for each resource available.
1174 */
1175static int pci_create_resource_files(struct pci_dev *pdev)
1176{
1177 int i;
1178 int retval;
1179
1180 /* Expose the PCI resources from this device as files */
1181 for (i = 0; i < PCI_STD_NUM_BARS; i++) {
1182
1183 /* skip empty resources */
1184 if (!pci_resource_len(pdev, i))
1185 continue;
1186
1187 retval = pci_create_attr(pdev, i, 0);
1188 /* for prefetchable resources, create a WC mappable file */
1189 if (!retval && arch_can_pci_mmap_wc() &&
1190 pdev->resource[i].flags & IORESOURCE_PREFETCH)
1191 retval = pci_create_attr(pdev, i, 1);
1192 if (retval) {
1193 pci_remove_resource_files(pdev);
1194 return retval;
1195 }
1196 }
1197 return 0;
1198}
1199#else /* !HAVE_PCI_MMAP */
1200int __weak pci_create_resource_files(struct pci_dev *dev) { return 0; }
1201void __weak pci_remove_resource_files(struct pci_dev *dev) { return; }
1202#endif /* HAVE_PCI_MMAP */
1203
1204/**
1205 * pci_write_rom - used to enable access to the PCI ROM display
1206 * @filp: sysfs file
1207 * @kobj: kernel object handle
1208 * @bin_attr: struct bin_attribute for this file
1209 * @buf: user input
1210 * @off: file offset
1211 * @count: number of byte in input
1212 *
1213 * writing anything except 0 enables it
1214 */
1215static ssize_t pci_write_rom(struct file *filp, struct kobject *kobj,
1216 struct bin_attribute *bin_attr, char *buf,
1217 loff_t off, size_t count)
1218{
1219 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1220
1221 if ((off == 0) && (*buf == '0') && (count == 2))
1222 pdev->rom_attr_enabled = 0;
1223 else
1224 pdev->rom_attr_enabled = 1;
1225
1226 return count;
1227}
1228
1229/**
1230 * pci_read_rom - read a PCI ROM
1231 * @filp: sysfs file
1232 * @kobj: kernel object handle
1233 * @bin_attr: struct bin_attribute for this file
1234 * @buf: where to put the data we read from the ROM
1235 * @off: file offset
1236 * @count: number of bytes to read
1237 *
1238 * Put @count bytes starting at @off into @buf from the ROM in the PCI
1239 * device corresponding to @kobj.
1240 */
1241static ssize_t pci_read_rom(struct file *filp, struct kobject *kobj,
1242 struct bin_attribute *bin_attr, char *buf,
1243 loff_t off, size_t count)
1244{
1245 struct pci_dev *pdev = to_pci_dev(kobj_to_dev(kobj));
1246 void __iomem *rom;
1247 size_t size;
1248
1249 if (!pdev->rom_attr_enabled)
1250 return -EINVAL;
1251
1252 rom = pci_map_rom(pdev, &size); /* size starts out as PCI window size */
1253 if (!rom || !size)
1254 return -EIO;
1255
1256 if (off >= size)
1257 count = 0;
1258 else {
1259 if (off + count > size)
1260 count = size - off;
1261
1262 memcpy_fromio(buf, rom + off, count);
1263 }
1264 pci_unmap_rom(pdev, rom);
1265
1266 return count;
1267}
1268
1269static const struct bin_attribute pci_config_attr = {
1270 .attr = {
1271 .name = "config",
1272 .mode = 0644,
1273 },
1274 .size = PCI_CFG_SPACE_SIZE,
1275 .read = pci_read_config,
1276 .write = pci_write_config,
1277};
1278
1279static const struct bin_attribute pcie_config_attr = {
1280 .attr = {
1281 .name = "config",
1282 .mode = 0644,
1283 },
1284 .size = PCI_CFG_SPACE_EXP_SIZE,
1285 .read = pci_read_config,
1286 .write = pci_write_config,
1287};
1288
1289static ssize_t reset_store(struct device *dev, struct device_attribute *attr,
1290 const char *buf, size_t count)
1291{
1292 struct pci_dev *pdev = to_pci_dev(dev);
1293 unsigned long val;
1294 ssize_t result = kstrtoul(buf, 0, &val);
1295
1296 if (result < 0)
1297 return result;
1298
1299 if (val != 1)
1300 return -EINVAL;
1301
1302 pm_runtime_get_sync(dev);
1303 result = pci_reset_function(pdev);
1304 pm_runtime_put(dev);
1305 if (result < 0)
1306 return result;
1307
1308 return count;
1309}
1310
1311static DEVICE_ATTR(reset, 0200, NULL, reset_store);
1312
1313static int pci_create_capabilities_sysfs(struct pci_dev *dev)
1314{
1315 int retval;
1316
1317 pcie_vpd_create_sysfs_dev_files(dev);
1318
1319 if (dev->reset_fn) {
1320 retval = device_create_file(&dev->dev, &dev_attr_reset);
1321 if (retval)
1322 goto error;
1323 }
1324 return 0;
1325
1326error:
1327 pcie_vpd_remove_sysfs_dev_files(dev);
1328 return retval;
1329}
1330
1331int __must_check pci_create_sysfs_dev_files(struct pci_dev *pdev)
1332{
1333 int retval;
1334 int rom_size;
1335 struct bin_attribute *attr;
1336
1337 if (!sysfs_initialized)
1338 return -EACCES;
1339
1340 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1341 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1342 else
1343 retval = sysfs_create_bin_file(&pdev->dev.kobj, &pci_config_attr);
1344 if (retval)
1345 goto err;
1346
1347 retval = pci_create_resource_files(pdev);
1348 if (retval)
1349 goto err_config_file;
1350
1351 /* If the device has a ROM, try to expose it in sysfs. */
1352 rom_size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
1353 if (rom_size) {
1354 attr = kzalloc(sizeof(*attr), GFP_ATOMIC);
1355 if (!attr) {
1356 retval = -ENOMEM;
1357 goto err_resource_files;
1358 }
1359 sysfs_bin_attr_init(attr);
1360 attr->size = rom_size;
1361 attr->attr.name = "rom";
1362 attr->attr.mode = 0600;
1363 attr->read = pci_read_rom;
1364 attr->write = pci_write_rom;
1365 retval = sysfs_create_bin_file(&pdev->dev.kobj, attr);
1366 if (retval) {
1367 kfree(attr);
1368 goto err_resource_files;
1369 }
1370 pdev->rom_attr = attr;
1371 }
1372
1373 /* add sysfs entries for various capabilities */
1374 retval = pci_create_capabilities_sysfs(pdev);
1375 if (retval)
1376 goto err_rom_file;
1377
1378 pci_create_firmware_label_files(pdev);
1379
1380 return 0;
1381
1382err_rom_file:
1383 if (pdev->rom_attr) {
1384 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1385 kfree(pdev->rom_attr);
1386 pdev->rom_attr = NULL;
1387 }
1388err_resource_files:
1389 pci_remove_resource_files(pdev);
1390err_config_file:
1391 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1392 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1393 else
1394 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1395err:
1396 return retval;
1397}
1398
1399static void pci_remove_capabilities_sysfs(struct pci_dev *dev)
1400{
1401 pcie_vpd_remove_sysfs_dev_files(dev);
1402 if (dev->reset_fn) {
1403 device_remove_file(&dev->dev, &dev_attr_reset);
1404 dev->reset_fn = 0;
1405 }
1406}
1407
1408/**
1409 * pci_remove_sysfs_dev_files - cleanup PCI specific sysfs files
1410 * @pdev: device whose entries we should free
1411 *
1412 * Cleanup when @pdev is removed from sysfs.
1413 */
1414void pci_remove_sysfs_dev_files(struct pci_dev *pdev)
1415{
1416 if (!sysfs_initialized)
1417 return;
1418
1419 pci_remove_capabilities_sysfs(pdev);
1420
1421 if (pdev->cfg_size > PCI_CFG_SPACE_SIZE)
1422 sysfs_remove_bin_file(&pdev->dev.kobj, &pcie_config_attr);
1423 else
1424 sysfs_remove_bin_file(&pdev->dev.kobj, &pci_config_attr);
1425
1426 pci_remove_resource_files(pdev);
1427
1428 if (pdev->rom_attr) {
1429 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
1430 kfree(pdev->rom_attr);
1431 pdev->rom_attr = NULL;
1432 }
1433
1434 pci_remove_firmware_label_files(pdev);
1435}
1436
1437static int __init pci_sysfs_init(void)
1438{
1439 struct pci_dev *pdev = NULL;
1440 int retval;
1441
1442 sysfs_initialized = 1;
1443 for_each_pci_dev(pdev) {
1444 retval = pci_create_sysfs_dev_files(pdev);
1445 if (retval) {
1446 pci_dev_put(pdev);
1447 return retval;
1448 }
1449 }
1450
1451 return 0;
1452}
1453late_initcall(pci_sysfs_init);
1454
1455static struct attribute *pci_dev_dev_attrs[] = {
1456 &dev_attr_boot_vga.attr,
1457 NULL,
1458};
1459
1460static umode_t pci_dev_attrs_are_visible(struct kobject *kobj,
1461 struct attribute *a, int n)
1462{
1463 struct device *dev = kobj_to_dev(kobj);
1464 struct pci_dev *pdev = to_pci_dev(dev);
1465
1466 if (a == &dev_attr_boot_vga.attr)
1467 if ((pdev->class >> 8) != PCI_CLASS_DISPLAY_VGA)
1468 return 0;
1469
1470 return a->mode;
1471}
1472
1473static struct attribute *pci_dev_hp_attrs[] = {
1474 &dev_attr_remove.attr,
1475 &dev_attr_dev_rescan.attr,
1476 NULL,
1477};
1478
1479static umode_t pci_dev_hp_attrs_are_visible(struct kobject *kobj,
1480 struct attribute *a, int n)
1481{
1482 struct device *dev = kobj_to_dev(kobj);
1483 struct pci_dev *pdev = to_pci_dev(dev);
1484
1485 if (pdev->is_virtfn)
1486 return 0;
1487
1488 return a->mode;
1489}
1490
1491static umode_t pci_bridge_attrs_are_visible(struct kobject *kobj,
1492 struct attribute *a, int n)
1493{
1494 struct device *dev = kobj_to_dev(kobj);
1495 struct pci_dev *pdev = to_pci_dev(dev);
1496
1497 if (pci_is_bridge(pdev))
1498 return a->mode;
1499
1500 return 0;
1501}
1502
1503static umode_t pcie_dev_attrs_are_visible(struct kobject *kobj,
1504 struct attribute *a, int n)
1505{
1506 struct device *dev = kobj_to_dev(kobj);
1507 struct pci_dev *pdev = to_pci_dev(dev);
1508
1509 if (pci_is_pcie(pdev))
1510 return a->mode;
1511
1512 return 0;
1513}
1514
1515static const struct attribute_group pci_dev_group = {
1516 .attrs = pci_dev_attrs,
1517};
1518
1519const struct attribute_group *pci_dev_groups[] = {
1520 &pci_dev_group,
1521 NULL,
1522};
1523
1524static const struct attribute_group pci_dev_hp_attr_group = {
1525 .attrs = pci_dev_hp_attrs,
1526 .is_visible = pci_dev_hp_attrs_are_visible,
1527};
1528
1529static const struct attribute_group pci_dev_attr_group = {
1530 .attrs = pci_dev_dev_attrs,
1531 .is_visible = pci_dev_attrs_are_visible,
1532};
1533
1534static const struct attribute_group pci_bridge_attr_group = {
1535 .attrs = pci_bridge_attrs,
1536 .is_visible = pci_bridge_attrs_are_visible,
1537};
1538
1539static const struct attribute_group pcie_dev_attr_group = {
1540 .attrs = pcie_dev_attrs,
1541 .is_visible = pcie_dev_attrs_are_visible,
1542};
1543
1544static const struct attribute_group *pci_dev_attr_groups[] = {
1545 &pci_dev_attr_group,
1546 &pci_dev_hp_attr_group,
1547#ifdef CONFIG_PCI_IOV
1548 &sriov_dev_attr_group,
1549#endif
1550 &pci_bridge_attr_group,
1551 &pcie_dev_attr_group,
1552#ifdef CONFIG_PCIEAER
1553 &aer_stats_attr_group,
1554#endif
1555#ifdef CONFIG_PCIEASPM
1556 &aspm_ctrl_attr_group,
1557#endif
1558 NULL,
1559};
1560
1561const struct device_type pci_dev_type = {
1562 .groups = pci_dev_attr_groups,
1563};