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1/*
2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
3 *
4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
5 *
6 * Adapted from mac_scsinew.c:
7 */
8/*
9 * Generic Macintosh NCR5380 driver
10 *
11 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
12 *
13 * derived in part from:
14 */
15/*
16 * Generic Generic NCR5380 driver
17 *
18 * Copyright 1995, Russell King
19 *
20 * ALPHA RELEASE 1.
21 *
22 * For more information, please consult
23 *
24 * NCR 5380 Family
25 * SCSI Protocol Controller
26 * Databook
27 *
28 * NCR Microelectronics
29 * 1635 Aeroplaza Drive
30 * Colorado Springs, CO 80916
31 * 1+ (719) 578-3400
32 * 1+ (800) 334-5454
33 */
34
35
36/*
37 * This is from mac_scsi.h, but hey, maybe this is useful for Sun3 too! :)
38 *
39 * Options :
40 *
41 * PARITY - enable parity checking. Not supported.
42 *
43 * SCSI2 - enable support for SCSI-II tagged queueing. Untested.
44 *
45 * USLEEP - enable support for devices that don't disconnect. Untested.
46 */
47
48/*
49 * $Log: sun3_NCR5380.c,v $
50 */
51
52#define AUTOSENSE
53
54#include <linux/types.h>
55#include <linux/stddef.h>
56#include <linux/ctype.h>
57#include <linux/delay.h>
58
59#include <linux/module.h>
60#include <linux/signal.h>
61#include <linux/ioport.h>
62#include <linux/init.h>
63#include <linux/blkdev.h>
64
65#include <asm/io.h>
66#include <asm/system.h>
67
68#include <asm/sun3ints.h>
69#include <asm/dvma.h>
70#include <asm/idprom.h>
71#include <asm/machines.h>
72
73#define NDEBUG 0
74
75#define NDEBUG_ABORT 0x00100000
76#define NDEBUG_TAGS 0x00200000
77#define NDEBUG_MERGING 0x00400000
78
79/* dma on! */
80#define REAL_DMA
81
82#include "scsi.h"
83#include "initio.h"
84#include <scsi/scsi_host.h>
85#include "sun3_scsi.h"
86
87static void NCR5380_print(struct Scsi_Host *instance);
88
89/* #define OLDDMA */
90
91#define USE_WRAPPER
92/*#define RESET_BOOT */
93#define DRIVER_SETUP
94
95/*
96 * BUG can be used to trigger a strange code-size related hang on 2.1 kernels
97 */
98#ifdef BUG
99#undef RESET_BOOT
100#undef DRIVER_SETUP
101#endif
102
103/* #define SUPPORT_TAGS */
104
105#define ENABLE_IRQ() enable_irq( IRQ_SUN3_SCSI );
106
107
108static irqreturn_t scsi_sun3_intr(int irq, void *dummy);
109static inline unsigned char sun3scsi_read(int reg);
110static inline void sun3scsi_write(int reg, int value);
111
112static int setup_can_queue = -1;
113module_param(setup_can_queue, int, 0);
114static int setup_cmd_per_lun = -1;
115module_param(setup_cmd_per_lun, int, 0);
116static int setup_sg_tablesize = -1;
117module_param(setup_sg_tablesize, int, 0);
118#ifdef SUPPORT_TAGS
119static int setup_use_tagged_queuing = -1;
120module_param(setup_use_tagged_queuing, int, 0);
121#endif
122static int setup_hostid = -1;
123module_param(setup_hostid, int, 0);
124
125static struct scsi_cmnd *sun3_dma_setup_done = NULL;
126
127#define AFTER_RESET_DELAY (HZ/2)
128
129/* ms to wait after hitting dma regs */
130#define SUN3_DMA_DELAY 10
131
132/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
133#define SUN3_DVMA_BUFSIZE 0xe000
134
135/* minimum number of bytes to do dma on */
136#define SUN3_DMA_MINSIZE 128
137
138static volatile unsigned char *sun3_scsi_regp;
139static volatile struct sun3_dma_regs *dregs;
140#ifdef OLDDMA
141static unsigned char *dmabuf = NULL; /* dma memory buffer */
142#endif
143static struct sun3_udc_regs *udc_regs = NULL;
144static unsigned char *sun3_dma_orig_addr = NULL;
145static unsigned long sun3_dma_orig_count = 0;
146static int sun3_dma_active = 0;
147static unsigned long last_residual = 0;
148
149/*
150 * NCR 5380 register access functions
151 */
152
153static inline unsigned char sun3scsi_read(int reg)
154{
155 return( sun3_scsi_regp[reg] );
156}
157
158static inline void sun3scsi_write(int reg, int value)
159{
160 sun3_scsi_regp[reg] = value;
161}
162
163/* dma controller register access functions */
164
165static inline unsigned short sun3_udc_read(unsigned char reg)
166{
167 unsigned short ret;
168
169 dregs->udc_addr = UDC_CSR;
170 udelay(SUN3_DMA_DELAY);
171 ret = dregs->udc_data;
172 udelay(SUN3_DMA_DELAY);
173
174 return ret;
175}
176
177static inline void sun3_udc_write(unsigned short val, unsigned char reg)
178{
179 dregs->udc_addr = reg;
180 udelay(SUN3_DMA_DELAY);
181 dregs->udc_data = val;
182 udelay(SUN3_DMA_DELAY);
183}
184
185/*
186 * XXX: status debug
187 */
188static struct Scsi_Host *default_instance;
189
190/*
191 * Function : int sun3scsi_detect(struct scsi_host_template * tpnt)
192 *
193 * Purpose : initializes mac NCR5380 driver based on the
194 * command line / compile time port and irq definitions.
195 *
196 * Inputs : tpnt - template for this SCSI adapter.
197 *
198 * Returns : 1 if a host adapter was found, 0 if not.
199 *
200 */
201
202int __init sun3scsi_detect(struct scsi_host_template * tpnt)
203{
204 unsigned long ioaddr;
205 static int called = 0;
206 struct Scsi_Host *instance;
207
208 /* check that this machine has an onboard 5380 */
209 switch(idprom->id_machtype) {
210 case SM_SUN3|SM_3_50:
211 case SM_SUN3|SM_3_60:
212 break;
213
214 default:
215 return 0;
216 }
217
218 if(called)
219 return 0;
220
221 tpnt->proc_name = "Sun3 5380 SCSI";
222
223 /* setup variables */
224 tpnt->can_queue =
225 (setup_can_queue > 0) ? setup_can_queue : CAN_QUEUE;
226 tpnt->cmd_per_lun =
227 (setup_cmd_per_lun > 0) ? setup_cmd_per_lun : CMD_PER_LUN;
228 tpnt->sg_tablesize =
229 (setup_sg_tablesize >= 0) ? setup_sg_tablesize : SG_TABLESIZE;
230
231 if (setup_hostid >= 0)
232 tpnt->this_id = setup_hostid;
233 else {
234 /* use 7 as default */
235 tpnt->this_id = 7;
236 }
237
238 ioaddr = (unsigned long)ioremap(IOBASE_SUN3_SCSI, PAGE_SIZE);
239 sun3_scsi_regp = (unsigned char *)ioaddr;
240
241 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8);
242
243 if((udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs)))
244 == NULL) {
245 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
246 return 0;
247 }
248#ifdef OLDDMA
249 if((dmabuf = dvma_malloc_align(SUN3_DVMA_BUFSIZE, 0x10000)) == NULL) {
250 printk("SUN3 Scsi couldn't allocate DVMA memory!\n");
251 return 0;
252 }
253#endif
254#ifdef SUPPORT_TAGS
255 if (setup_use_tagged_queuing < 0)
256 setup_use_tagged_queuing = USE_TAGGED_QUEUING;
257#endif
258
259 instance = scsi_register (tpnt, sizeof(struct NCR5380_hostdata));
260 if(instance == NULL)
261 return 0;
262
263 default_instance = instance;
264
265 instance->io_port = (unsigned long) ioaddr;
266 instance->irq = IRQ_SUN3_SCSI;
267
268 NCR5380_init(instance, 0);
269
270 instance->n_io_port = 32;
271
272 ((struct NCR5380_hostdata *)instance->hostdata)->ctrl = 0;
273
274 if (request_irq(instance->irq, scsi_sun3_intr,
275 0, "Sun3SCSI-5380", instance)) {
276#ifndef REAL_DMA
277 printk("scsi%d: IRQ%d not free, interrupts disabled\n",
278 instance->host_no, instance->irq);
279 instance->irq = SCSI_IRQ_NONE;
280#else
281 printk("scsi%d: IRQ%d not free, bailing out\n",
282 instance->host_no, instance->irq);
283 return 0;
284#endif
285 }
286
287 printk("scsi%d: Sun3 5380 at port %lX irq", instance->host_no, instance->io_port);
288 if (instance->irq == SCSI_IRQ_NONE)
289 printk ("s disabled");
290 else
291 printk (" %d", instance->irq);
292 printk(" options CAN_QUEUE=%d CMD_PER_LUN=%d release=%d",
293 instance->can_queue, instance->cmd_per_lun,
294 SUN3SCSI_PUBLIC_RELEASE);
295 printk("\nscsi%d:", instance->host_no);
296 NCR5380_print_options(instance);
297 printk("\n");
298
299 dregs->csr = 0;
300 udelay(SUN3_DMA_DELAY);
301 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
302 udelay(SUN3_DMA_DELAY);
303 dregs->fifo_count = 0;
304
305 called = 1;
306
307#ifdef RESET_BOOT
308 sun3_scsi_reset_boot(instance);
309#endif
310
311 return 1;
312}
313
314int sun3scsi_release (struct Scsi_Host *shpnt)
315{
316 if (shpnt->irq != SCSI_IRQ_NONE)
317 free_irq(shpnt->irq, shpnt);
318
319 iounmap((void *)sun3_scsi_regp);
320
321 NCR5380_exit(shpnt);
322 return 0;
323}
324
325#ifdef RESET_BOOT
326/*
327 * Our 'bus reset on boot' function
328 */
329
330static void sun3_scsi_reset_boot(struct Scsi_Host *instance)
331{
332 unsigned long end;
333
334 NCR5380_local_declare();
335 NCR5380_setup(instance);
336
337 /*
338 * Do a SCSI reset to clean up the bus during initialization. No
339 * messing with the queues, interrupts, or locks necessary here.
340 */
341
342 printk( "Sun3 SCSI: resetting the SCSI bus..." );
343
344 /* switch off SCSI IRQ - catch an interrupt without IRQ bit set else */
345// sun3_disable_irq( IRQ_SUN3_SCSI );
346
347 /* get in phase */
348 NCR5380_write( TARGET_COMMAND_REG,
349 PHASE_SR_TO_TCR( NCR5380_read(STATUS_REG) ));
350
351 /* assert RST */
352 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE | ICR_ASSERT_RST );
353
354 /* The min. reset hold time is 25us, so 40us should be enough */
355 udelay( 50 );
356
357 /* reset RST and interrupt */
358 NCR5380_write( INITIATOR_COMMAND_REG, ICR_BASE );
359 NCR5380_read( RESET_PARITY_INTERRUPT_REG );
360
361 for( end = jiffies + AFTER_RESET_DELAY; time_before(jiffies, end); )
362 barrier();
363
364 /* switch on SCSI IRQ again */
365// sun3_enable_irq( IRQ_SUN3_SCSI );
366
367 printk( " done\n" );
368}
369#endif
370
371const char * sun3scsi_info (struct Scsi_Host *spnt) {
372 return "";
373}
374
375// safe bits for the CSR
376#define CSR_GOOD 0x060f
377
378static irqreturn_t scsi_sun3_intr(int irq, void *dummy)
379{
380 unsigned short csr = dregs->csr;
381 int handled = 0;
382
383 if(csr & ~CSR_GOOD) {
384 if(csr & CSR_DMA_BUSERR) {
385 printk("scsi%d: bus error in dma\n", default_instance->host_no);
386 }
387
388 if(csr & CSR_DMA_CONFLICT) {
389 printk("scsi%d: dma conflict\n", default_instance->host_no);
390 }
391 handled = 1;
392 }
393
394 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
395 NCR5380_intr(irq, dummy);
396 handled = 1;
397 }
398
399 return IRQ_RETVAL(handled);
400}
401
402/*
403 * Debug stuff - to be called on NMI, or sysrq key. Use at your own risk;
404 * reentering NCR5380_print_status seems to have ugly side effects
405 */
406
407/* this doesn't seem to get used at all -- sam */
408#if 0
409void sun3_sun3_debug (void)
410{
411 unsigned long flags;
412 NCR5380_local_declare();
413
414 if (default_instance) {
415 local_irq_save(flags);
416 NCR5380_print_status(default_instance);
417 local_irq_restore(flags);
418 }
419}
420#endif
421
422
423/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
424static unsigned long sun3scsi_dma_setup(void *data, unsigned long count, int write_flag)
425{
426#ifdef OLDDMA
427 if(write_flag)
428 memcpy(dmabuf, data, count);
429 else {
430 sun3_dma_orig_addr = data;
431 sun3_dma_orig_count = count;
432 }
433#else
434 void *addr;
435
436 if(sun3_dma_orig_addr != NULL)
437 dvma_unmap(sun3_dma_orig_addr);
438
439// addr = sun3_dvma_page((unsigned long)data, (unsigned long)dmabuf);
440 addr = (void *)dvma_map((unsigned long) data, count);
441
442 sun3_dma_orig_addr = addr;
443 sun3_dma_orig_count = count;
444#endif
445 dregs->fifo_count = 0;
446 sun3_udc_write(UDC_RESET, UDC_CSR);
447
448 /* reset fifo */
449 dregs->csr &= ~CSR_FIFO;
450 dregs->csr |= CSR_FIFO;
451
452 /* set direction */
453 if(write_flag)
454 dregs->csr |= CSR_SEND;
455 else
456 dregs->csr &= ~CSR_SEND;
457
458 /* byte count for fifo */
459 dregs->fifo_count = count;
460
461 sun3_udc_write(UDC_RESET, UDC_CSR);
462
463 /* reset fifo */
464 dregs->csr &= ~CSR_FIFO;
465 dregs->csr |= CSR_FIFO;
466
467 if(dregs->fifo_count != count) {
468 printk("scsi%d: fifo_mismatch %04x not %04x\n",
469 default_instance->host_no, dregs->fifo_count,
470 (unsigned int) count);
471 NCR5380_print(default_instance);
472 }
473
474 /* setup udc */
475#ifdef OLDDMA
476 udc_regs->addr_hi = ((dvma_vtob(dmabuf) & 0xff0000) >> 8);
477 udc_regs->addr_lo = (dvma_vtob(dmabuf) & 0xffff);
478#else
479 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
480 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
481#endif
482 udc_regs->count = count/2; /* count in words */
483 udc_regs->mode_hi = UDC_MODE_HIWORD;
484 if(write_flag) {
485 if(count & 1)
486 udc_regs->count++;
487 udc_regs->mode_lo = UDC_MODE_LSEND;
488 udc_regs->rsel = UDC_RSEL_SEND;
489 } else {
490 udc_regs->mode_lo = UDC_MODE_LRECV;
491 udc_regs->rsel = UDC_RSEL_RECV;
492 }
493
494 /* announce location of regs block */
495 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
496 UDC_CHN_HI);
497
498 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
499
500 /* set dma master on */
501 sun3_udc_write(0xd, UDC_MODE);
502
503 /* interrupt enable */
504 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
505
506 return count;
507
508}
509
510static inline unsigned long sun3scsi_dma_count(struct Scsi_Host *instance)
511{
512 unsigned short resid;
513
514 dregs->udc_addr = 0x32;
515 udelay(SUN3_DMA_DELAY);
516 resid = dregs->udc_data;
517 udelay(SUN3_DMA_DELAY);
518 resid *= 2;
519
520 return (unsigned long) resid;
521}
522
523static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
524{
525 return last_residual;
526}
527
528static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
529 struct scsi_cmnd *cmd,
530 int write_flag)
531{
532 if (cmd->request->cmd_type == REQ_TYPE_FS)
533 return wanted;
534 else
535 return 0;
536}
537
538static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
539{
540
541 sun3_udc_write(UDC_CHN_START, UDC_CSR);
542
543 return 0;
544}
545
546/* clean up after our dma is done */
547static int sun3scsi_dma_finish(int write_flag)
548{
549 unsigned short count;
550 unsigned short fifo;
551 int ret = 0;
552
553 sun3_dma_active = 0;
554#if 1
555 // check to empty the fifo on a read
556 if(!write_flag) {
557 int tmo = 20000; /* .2 sec */
558
559 while(1) {
560 if(dregs->csr & CSR_FIFO_EMPTY)
561 break;
562
563 if(--tmo <= 0) {
564 printk("sun3scsi: fifo failed to empty!\n");
565 return 1;
566 }
567 udelay(10);
568 }
569 }
570
571#endif
572
573 count = sun3scsi_dma_count(default_instance);
574#ifdef OLDDMA
575
576 /* if we've finished a read, copy out the data we read */
577 if(sun3_dma_orig_addr) {
578 /* check for residual bytes after dma end */
579 if(count && (NCR5380_read(BUS_AND_STATUS_REG) &
580 (BASR_PHASE_MATCH | BASR_ACK))) {
581 printk("scsi%d: sun3_scsi_finish: read overrun baby... ", default_instance->host_no);
582 printk("basr now %02x\n", NCR5380_read(BUS_AND_STATUS_REG));
583 ret = count;
584 }
585
586 /* copy in what we dma'd no matter what */
587 memcpy(sun3_dma_orig_addr, dmabuf, sun3_dma_orig_count);
588 sun3_dma_orig_addr = NULL;
589
590 }
591#else
592
593 fifo = dregs->fifo_count;
594 last_residual = fifo;
595
596 /* empty bytes from the fifo which didn't make it */
597 if((!write_flag) && (count - fifo) == 2) {
598 unsigned short data;
599 unsigned char *vaddr;
600
601 data = dregs->fifo_data;
602 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
603
604 vaddr += (sun3_dma_orig_count - fifo);
605
606 vaddr[-2] = (data & 0xff00) >> 8;
607 vaddr[-1] = (data & 0xff);
608 }
609
610 dvma_unmap(sun3_dma_orig_addr);
611 sun3_dma_orig_addr = NULL;
612#endif
613 sun3_udc_write(UDC_RESET, UDC_CSR);
614 dregs->fifo_count = 0;
615 dregs->csr &= ~CSR_SEND;
616
617 /* reset fifo */
618 dregs->csr &= ~CSR_FIFO;
619 dregs->csr |= CSR_FIFO;
620
621 sun3_dma_setup_done = NULL;
622
623 return ret;
624
625}
626
627#include "sun3_NCR5380.c"
628
629static struct scsi_host_template driver_template = {
630 .name = SUN3_SCSI_NAME,
631 .detect = sun3scsi_detect,
632 .release = sun3scsi_release,
633 .info = sun3scsi_info,
634 .queuecommand = sun3scsi_queue_command,
635 .eh_abort_handler = sun3scsi_abort,
636 .eh_bus_reset_handler = sun3scsi_bus_reset,
637 .can_queue = CAN_QUEUE,
638 .this_id = 7,
639 .sg_tablesize = SG_TABLESIZE,
640 .cmd_per_lun = CMD_PER_LUN,
641 .use_clustering = DISABLE_CLUSTERING
642};
643
644
645#include "scsi_module.c"
646
647MODULE_LICENSE("GPL");
1/*
2 * Sun3 SCSI stuff by Erik Verbruggen (erik@bigmama.xtdnet.nl)
3 *
4 * Sun3 DMA routines added by Sam Creasey (sammy@sammy.net)
5 *
6 * VME support added by Sam Creasey
7 *
8 * TODO: modify this driver to support multiple Sun3 SCSI VME boards
9 *
10 * Adapted from mac_scsinew.c:
11 */
12/*
13 * Generic Macintosh NCR5380 driver
14 *
15 * Copyright 1998, Michael Schmitz <mschmitz@lbl.gov>
16 *
17 * derived in part from:
18 */
19/*
20 * Generic Generic NCR5380 driver
21 *
22 * Copyright 1995, Russell King
23 */
24
25#include <linux/types.h>
26#include <linux/delay.h>
27#include <linux/module.h>
28#include <linux/ioport.h>
29#include <linux/init.h>
30#include <linux/blkdev.h>
31#include <linux/platform_device.h>
32
33#include <asm/io.h>
34#include <asm/dvma.h>
35
36#include <scsi/scsi_host.h>
37#include "sun3_scsi.h"
38
39/* Definitions for the core NCR5380 driver. */
40
41#define REAL_DMA
42/* #define SUPPORT_TAGS */
43/* minimum number of bytes to do dma on */
44#define DMA_MIN_SIZE 129
45
46/* #define MAX_TAGS 32 */
47
48#define NCR5380_implementation_fields /* none */
49
50#define NCR5380_read(reg) sun3scsi_read(reg)
51#define NCR5380_write(reg, value) sun3scsi_write(reg, value)
52
53#define NCR5380_queue_command sun3scsi_queue_command
54#define NCR5380_bus_reset sun3scsi_bus_reset
55#define NCR5380_abort sun3scsi_abort
56#define NCR5380_info sun3scsi_info
57
58#define NCR5380_dma_read_setup(instance, data, count) \
59 sun3scsi_dma_setup(instance, data, count, 0)
60#define NCR5380_dma_write_setup(instance, data, count) \
61 sun3scsi_dma_setup(instance, data, count, 1)
62#define NCR5380_dma_residual(instance) \
63 sun3scsi_dma_residual(instance)
64#define NCR5380_dma_xfer_len(instance, cmd, phase) \
65 sun3scsi_dma_xfer_len(cmd->SCp.this_residual, cmd, !((phase) & SR_IO))
66
67#define NCR5380_acquire_dma_irq(instance) (1)
68#define NCR5380_release_dma_irq(instance)
69
70#include "NCR5380.h"
71
72
73extern int sun3_map_test(unsigned long, char *);
74
75static int setup_can_queue = -1;
76module_param(setup_can_queue, int, 0);
77static int setup_cmd_per_lun = -1;
78module_param(setup_cmd_per_lun, int, 0);
79static int setup_sg_tablesize = -1;
80module_param(setup_sg_tablesize, int, 0);
81#ifdef SUPPORT_TAGS
82static int setup_use_tagged_queuing = -1;
83module_param(setup_use_tagged_queuing, int, 0);
84#endif
85static int setup_hostid = -1;
86module_param(setup_hostid, int, 0);
87
88/* ms to wait after hitting dma regs */
89#define SUN3_DMA_DELAY 10
90
91/* dvma buffer to allocate -- 32k should hopefully be more than sufficient */
92#define SUN3_DVMA_BUFSIZE 0xe000
93
94static struct scsi_cmnd *sun3_dma_setup_done;
95static unsigned char *sun3_scsi_regp;
96static volatile struct sun3_dma_regs *dregs;
97static struct sun3_udc_regs *udc_regs;
98static unsigned char *sun3_dma_orig_addr;
99static unsigned long sun3_dma_orig_count;
100static int sun3_dma_active;
101static unsigned long last_residual;
102
103/*
104 * NCR 5380 register access functions
105 */
106
107static inline unsigned char sun3scsi_read(int reg)
108{
109 return in_8(sun3_scsi_regp + reg);
110}
111
112static inline void sun3scsi_write(int reg, int value)
113{
114 out_8(sun3_scsi_regp + reg, value);
115}
116
117#ifndef SUN3_SCSI_VME
118/* dma controller register access functions */
119
120static inline unsigned short sun3_udc_read(unsigned char reg)
121{
122 unsigned short ret;
123
124 dregs->udc_addr = UDC_CSR;
125 udelay(SUN3_DMA_DELAY);
126 ret = dregs->udc_data;
127 udelay(SUN3_DMA_DELAY);
128
129 return ret;
130}
131
132static inline void sun3_udc_write(unsigned short val, unsigned char reg)
133{
134 dregs->udc_addr = reg;
135 udelay(SUN3_DMA_DELAY);
136 dregs->udc_data = val;
137 udelay(SUN3_DMA_DELAY);
138}
139#endif
140
141// safe bits for the CSR
142#define CSR_GOOD 0x060f
143
144static irqreturn_t scsi_sun3_intr(int irq, void *dev)
145{
146 struct Scsi_Host *instance = dev;
147 unsigned short csr = dregs->csr;
148 int handled = 0;
149
150#ifdef SUN3_SCSI_VME
151 dregs->csr &= ~CSR_DMA_ENABLE;
152#endif
153
154 if(csr & ~CSR_GOOD) {
155 if (csr & CSR_DMA_BUSERR)
156 shost_printk(KERN_ERR, instance, "bus error in DMA\n");
157 if (csr & CSR_DMA_CONFLICT)
158 shost_printk(KERN_ERR, instance, "DMA conflict\n");
159 handled = 1;
160 }
161
162 if(csr & (CSR_SDB_INT | CSR_DMA_INT)) {
163 NCR5380_intr(irq, dev);
164 handled = 1;
165 }
166
167 return IRQ_RETVAL(handled);
168}
169
170/* sun3scsi_dma_setup() -- initialize the dma controller for a read/write */
171static unsigned long sun3scsi_dma_setup(struct Scsi_Host *instance,
172 void *data, unsigned long count, int write_flag)
173{
174 void *addr;
175
176 if(sun3_dma_orig_addr != NULL)
177 dvma_unmap(sun3_dma_orig_addr);
178
179#ifdef SUN3_SCSI_VME
180 addr = (void *)dvma_map_vme((unsigned long) data, count);
181#else
182 addr = (void *)dvma_map((unsigned long) data, count);
183#endif
184
185 sun3_dma_orig_addr = addr;
186 sun3_dma_orig_count = count;
187
188#ifndef SUN3_SCSI_VME
189 dregs->fifo_count = 0;
190 sun3_udc_write(UDC_RESET, UDC_CSR);
191
192 /* reset fifo */
193 dregs->csr &= ~CSR_FIFO;
194 dregs->csr |= CSR_FIFO;
195#endif
196
197 /* set direction */
198 if(write_flag)
199 dregs->csr |= CSR_SEND;
200 else
201 dregs->csr &= ~CSR_SEND;
202
203#ifdef SUN3_SCSI_VME
204 dregs->csr |= CSR_PACK_ENABLE;
205
206 dregs->dma_addr_hi = ((unsigned long)addr >> 16);
207 dregs->dma_addr_lo = ((unsigned long)addr & 0xffff);
208
209 dregs->dma_count_hi = 0;
210 dregs->dma_count_lo = 0;
211 dregs->fifo_count_hi = 0;
212 dregs->fifo_count = 0;
213#else
214 /* byte count for fifo */
215 dregs->fifo_count = count;
216
217 sun3_udc_write(UDC_RESET, UDC_CSR);
218
219 /* reset fifo */
220 dregs->csr &= ~CSR_FIFO;
221 dregs->csr |= CSR_FIFO;
222
223 if(dregs->fifo_count != count) {
224 shost_printk(KERN_ERR, instance, "FIFO mismatch %04x not %04x\n",
225 dregs->fifo_count, (unsigned int) count);
226 NCR5380_dprint(NDEBUG_DMA, instance);
227 }
228
229 /* setup udc */
230 udc_regs->addr_hi = (((unsigned long)(addr) & 0xff0000) >> 8);
231 udc_regs->addr_lo = ((unsigned long)(addr) & 0xffff);
232 udc_regs->count = count/2; /* count in words */
233 udc_regs->mode_hi = UDC_MODE_HIWORD;
234 if(write_flag) {
235 if(count & 1)
236 udc_regs->count++;
237 udc_regs->mode_lo = UDC_MODE_LSEND;
238 udc_regs->rsel = UDC_RSEL_SEND;
239 } else {
240 udc_regs->mode_lo = UDC_MODE_LRECV;
241 udc_regs->rsel = UDC_RSEL_RECV;
242 }
243
244 /* announce location of regs block */
245 sun3_udc_write(((dvma_vtob(udc_regs) & 0xff0000) >> 8),
246 UDC_CHN_HI);
247
248 sun3_udc_write((dvma_vtob(udc_regs) & 0xffff), UDC_CHN_LO);
249
250 /* set dma master on */
251 sun3_udc_write(0xd, UDC_MODE);
252
253 /* interrupt enable */
254 sun3_udc_write(UDC_INT_ENABLE, UDC_CSR);
255#endif
256
257 return count;
258
259}
260
261static inline unsigned long sun3scsi_dma_residual(struct Scsi_Host *instance)
262{
263 return last_residual;
264}
265
266static inline unsigned long sun3scsi_dma_xfer_len(unsigned long wanted,
267 struct scsi_cmnd *cmd,
268 int write_flag)
269{
270 if (cmd->request->cmd_type == REQ_TYPE_FS)
271 return wanted;
272 else
273 return 0;
274}
275
276static inline int sun3scsi_dma_start(unsigned long count, unsigned char *data)
277{
278#ifdef SUN3_SCSI_VME
279 unsigned short csr;
280
281 csr = dregs->csr;
282
283 dregs->dma_count_hi = (sun3_dma_orig_count >> 16);
284 dregs->dma_count_lo = (sun3_dma_orig_count & 0xffff);
285
286 dregs->fifo_count_hi = (sun3_dma_orig_count >> 16);
287 dregs->fifo_count = (sun3_dma_orig_count & 0xffff);
288
289/* if(!(csr & CSR_DMA_ENABLE))
290 * dregs->csr |= CSR_DMA_ENABLE;
291 */
292#else
293 sun3_udc_write(UDC_CHN_START, UDC_CSR);
294#endif
295
296 return 0;
297}
298
299/* clean up after our dma is done */
300static int sun3scsi_dma_finish(int write_flag)
301{
302 unsigned short __maybe_unused count;
303 unsigned short fifo;
304 int ret = 0;
305
306 sun3_dma_active = 0;
307
308#ifdef SUN3_SCSI_VME
309 dregs->csr &= ~CSR_DMA_ENABLE;
310
311 fifo = dregs->fifo_count;
312 if (write_flag) {
313 if ((fifo > 0) && (fifo < sun3_dma_orig_count))
314 fifo++;
315 }
316
317 last_residual = fifo;
318 /* empty bytes from the fifo which didn't make it */
319 if ((!write_flag) && (dregs->csr & CSR_LEFT)) {
320 unsigned char *vaddr;
321
322 vaddr = (unsigned char *)dvma_vmetov(sun3_dma_orig_addr);
323
324 vaddr += (sun3_dma_orig_count - fifo);
325 vaddr--;
326
327 switch (dregs->csr & CSR_LEFT) {
328 case CSR_LEFT_3:
329 *vaddr = (dregs->bpack_lo & 0xff00) >> 8;
330 vaddr--;
331
332 case CSR_LEFT_2:
333 *vaddr = (dregs->bpack_hi & 0x00ff);
334 vaddr--;
335
336 case CSR_LEFT_1:
337 *vaddr = (dregs->bpack_hi & 0xff00) >> 8;
338 break;
339 }
340 }
341#else
342 // check to empty the fifo on a read
343 if(!write_flag) {
344 int tmo = 20000; /* .2 sec */
345
346 while(1) {
347 if(dregs->csr & CSR_FIFO_EMPTY)
348 break;
349
350 if(--tmo <= 0) {
351 printk("sun3scsi: fifo failed to empty!\n");
352 return 1;
353 }
354 udelay(10);
355 }
356 }
357
358 dregs->udc_addr = 0x32;
359 udelay(SUN3_DMA_DELAY);
360 count = 2 * dregs->udc_data;
361 udelay(SUN3_DMA_DELAY);
362
363 fifo = dregs->fifo_count;
364 last_residual = fifo;
365
366 /* empty bytes from the fifo which didn't make it */
367 if((!write_flag) && (count - fifo) == 2) {
368 unsigned short data;
369 unsigned char *vaddr;
370
371 data = dregs->fifo_data;
372 vaddr = (unsigned char *)dvma_btov(sun3_dma_orig_addr);
373
374 vaddr += (sun3_dma_orig_count - fifo);
375
376 vaddr[-2] = (data & 0xff00) >> 8;
377 vaddr[-1] = (data & 0xff);
378 }
379#endif
380
381 dvma_unmap(sun3_dma_orig_addr);
382 sun3_dma_orig_addr = NULL;
383
384#ifdef SUN3_SCSI_VME
385 dregs->dma_addr_hi = 0;
386 dregs->dma_addr_lo = 0;
387 dregs->dma_count_hi = 0;
388 dregs->dma_count_lo = 0;
389
390 dregs->fifo_count = 0;
391 dregs->fifo_count_hi = 0;
392
393 dregs->csr &= ~CSR_SEND;
394/* dregs->csr |= CSR_DMA_ENABLE; */
395#else
396 sun3_udc_write(UDC_RESET, UDC_CSR);
397 dregs->fifo_count = 0;
398 dregs->csr &= ~CSR_SEND;
399
400 /* reset fifo */
401 dregs->csr &= ~CSR_FIFO;
402 dregs->csr |= CSR_FIFO;
403#endif
404
405 sun3_dma_setup_done = NULL;
406
407 return ret;
408
409}
410
411#include "atari_NCR5380.c"
412
413#ifdef SUN3_SCSI_VME
414#define SUN3_SCSI_NAME "Sun3 NCR5380 VME SCSI"
415#define DRV_MODULE_NAME "sun3_scsi_vme"
416#else
417#define SUN3_SCSI_NAME "Sun3 NCR5380 SCSI"
418#define DRV_MODULE_NAME "sun3_scsi"
419#endif
420
421#define PFX DRV_MODULE_NAME ": "
422
423static struct scsi_host_template sun3_scsi_template = {
424 .module = THIS_MODULE,
425 .proc_name = DRV_MODULE_NAME,
426 .name = SUN3_SCSI_NAME,
427 .info = sun3scsi_info,
428 .queuecommand = sun3scsi_queue_command,
429 .eh_abort_handler = sun3scsi_abort,
430 .eh_bus_reset_handler = sun3scsi_bus_reset,
431 .can_queue = 16,
432 .this_id = 7,
433 .sg_tablesize = SG_NONE,
434 .cmd_per_lun = 2,
435 .use_clustering = DISABLE_CLUSTERING,
436 .cmd_size = NCR5380_CMD_SIZE,
437};
438
439static int __init sun3_scsi_probe(struct platform_device *pdev)
440{
441 struct Scsi_Host *instance;
442 int error;
443 struct resource *irq, *mem;
444 unsigned char *ioaddr;
445 int host_flags = 0;
446#ifdef SUN3_SCSI_VME
447 int i;
448#endif
449
450 if (setup_can_queue > 0)
451 sun3_scsi_template.can_queue = setup_can_queue;
452 if (setup_cmd_per_lun > 0)
453 sun3_scsi_template.cmd_per_lun = setup_cmd_per_lun;
454 if (setup_sg_tablesize >= 0)
455 sun3_scsi_template.sg_tablesize = setup_sg_tablesize;
456 if (setup_hostid >= 0)
457 sun3_scsi_template.this_id = setup_hostid & 7;
458
459#ifdef SUN3_SCSI_VME
460 ioaddr = NULL;
461 for (i = 0; i < 2; i++) {
462 unsigned char x;
463
464 irq = platform_get_resource(pdev, IORESOURCE_IRQ, i);
465 mem = platform_get_resource(pdev, IORESOURCE_MEM, i);
466 if (!irq || !mem)
467 break;
468
469 ioaddr = sun3_ioremap(mem->start, resource_size(mem),
470 SUN3_PAGE_TYPE_VME16);
471 dregs = (struct sun3_dma_regs *)(ioaddr + 8);
472
473 if (sun3_map_test((unsigned long)dregs, &x)) {
474 unsigned short oldcsr;
475
476 oldcsr = dregs->csr;
477 dregs->csr = 0;
478 udelay(SUN3_DMA_DELAY);
479 if (dregs->csr == 0x1400)
480 break;
481
482 dregs->csr = oldcsr;
483 }
484
485 iounmap(ioaddr);
486 ioaddr = NULL;
487 }
488 if (!ioaddr)
489 return -ENODEV;
490#else
491 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
492 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
493 if (!irq || !mem)
494 return -ENODEV;
495
496 ioaddr = ioremap(mem->start, resource_size(mem));
497 dregs = (struct sun3_dma_regs *)(ioaddr + 8);
498
499 udc_regs = dvma_malloc(sizeof(struct sun3_udc_regs));
500 if (!udc_regs) {
501 pr_err(PFX "couldn't allocate DVMA memory!\n");
502 iounmap(ioaddr);
503 return -ENOMEM;
504 }
505#endif
506
507 sun3_scsi_regp = ioaddr;
508
509 instance = scsi_host_alloc(&sun3_scsi_template,
510 sizeof(struct NCR5380_hostdata));
511 if (!instance) {
512 error = -ENOMEM;
513 goto fail_alloc;
514 }
515
516 instance->io_port = (unsigned long)ioaddr;
517 instance->irq = irq->start;
518
519#ifdef SUPPORT_TAGS
520 host_flags |= setup_use_tagged_queuing > 0 ? FLAG_TAGGED_QUEUING : 0;
521#endif
522
523 error = NCR5380_init(instance, host_flags);
524 if (error)
525 goto fail_init;
526
527 error = request_irq(instance->irq, scsi_sun3_intr, 0,
528 "NCR5380", instance);
529 if (error) {
530#ifdef REAL_DMA
531 pr_err(PFX "scsi%d: IRQ %d not free, bailing out\n",
532 instance->host_no, instance->irq);
533 goto fail_irq;
534#else
535 pr_warn(PFX "scsi%d: IRQ %d not free, interrupts disabled\n",
536 instance->host_no, instance->irq);
537 instance->irq = NO_IRQ;
538#endif
539 }
540
541 dregs->csr = 0;
542 udelay(SUN3_DMA_DELAY);
543 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR;
544 udelay(SUN3_DMA_DELAY);
545 dregs->fifo_count = 0;
546#ifdef SUN3_SCSI_VME
547 dregs->fifo_count_hi = 0;
548 dregs->dma_addr_hi = 0;
549 dregs->dma_addr_lo = 0;
550 dregs->dma_count_hi = 0;
551 dregs->dma_count_lo = 0;
552
553 dregs->ivect = VME_DATA24 | (instance->irq & 0xff);
554#endif
555
556 NCR5380_maybe_reset_bus(instance);
557
558 error = scsi_add_host(instance, NULL);
559 if (error)
560 goto fail_host;
561
562 platform_set_drvdata(pdev, instance);
563
564 scsi_scan_host(instance);
565 return 0;
566
567fail_host:
568 if (instance->irq != NO_IRQ)
569 free_irq(instance->irq, instance);
570fail_irq:
571 NCR5380_exit(instance);
572fail_init:
573 scsi_host_put(instance);
574fail_alloc:
575 if (udc_regs)
576 dvma_free(udc_regs);
577 iounmap(sun3_scsi_regp);
578 return error;
579}
580
581static int __exit sun3_scsi_remove(struct platform_device *pdev)
582{
583 struct Scsi_Host *instance = platform_get_drvdata(pdev);
584
585 scsi_remove_host(instance);
586 if (instance->irq != NO_IRQ)
587 free_irq(instance->irq, instance);
588 NCR5380_exit(instance);
589 scsi_host_put(instance);
590 if (udc_regs)
591 dvma_free(udc_regs);
592 iounmap(sun3_scsi_regp);
593 return 0;
594}
595
596static struct platform_driver sun3_scsi_driver = {
597 .remove = __exit_p(sun3_scsi_remove),
598 .driver = {
599 .name = DRV_MODULE_NAME,
600 },
601};
602
603module_platform_driver_probe(sun3_scsi_driver, sun3_scsi_probe);
604
605MODULE_ALIAS("platform:" DRV_MODULE_NAME);
606MODULE_LICENSE("GPL");