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v3.1
   1/*
   2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
   3 * Copyright (c) 2007-2008 Intel Corporation
   4 *   Jesse Barnes <jesse.barnes@intel.com>
   5 * Copyright 2010 Red Hat, Inc.
   6 *
   7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
   8 * FB layer.
   9 *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  10 *
  11 * Permission is hereby granted, free of charge, to any person obtaining a
  12 * copy of this software and associated documentation files (the "Software"),
  13 * to deal in the Software without restriction, including without limitation
  14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
  15 * and/or sell copies of the Software, and to permit persons to whom the
  16 * Software is furnished to do so, subject to the following conditions:
  17 *
  18 * The above copyright notice and this permission notice (including the
  19 * next paragraph) shall be included in all copies or substantial portions
  20 * of the Software.
  21 *
  22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  28 * DEALINGS IN THE SOFTWARE.
  29 */
  30#include <linux/kernel.h>
  31#include <linux/slab.h>
 
  32#include <linux/i2c.h>
  33#include "drmP.h"
  34#include "drm_edid.h"
  35#include "drm_edid_modes.h"
 
 
  36
  37#define version_greater(edid, maj, min) \
  38	(((edid)->version > (maj)) || \
  39	 ((edid)->version == (maj) && (edid)->revision > (min)))
  40
  41#define EDID_EST_TIMINGS 16
  42#define EDID_STD_TIMINGS 8
  43#define EDID_DETAILED_TIMINGS 4
  44
  45/*
  46 * EDID blocks out in the wild have a variety of bugs, try to collect
  47 * them here (note that userspace may work around broken monitors first,
  48 * but fixes should make their way here so that the kernel "just works"
  49 * on as many displays as possible).
  50 */
  51
  52/* First detailed mode wrong, use largest 60Hz mode */
  53#define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
  54/* Reported 135MHz pixel clock is too high, needs adjustment */
  55#define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
  56/* Prefer the largest mode at 75 Hz */
  57#define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
  58/* Detail timing is in cm not mm */
  59#define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
  60/* Detailed timing descriptors have bogus size values, so just take the
  61 * maximum size and use that.
  62 */
  63#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
  64/* Monitor forgot to set the first detailed is preferred bit. */
  65#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
  66/* use +hsync +vsync for detailed mode */
  67#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
 
 
 
 
 
 
 
 
  68
  69struct detailed_mode_closure {
  70	struct drm_connector *connector;
  71	struct edid *edid;
  72	bool preferred;
  73	u32 quirks;
  74	int modes;
  75};
  76
  77#define LEVEL_DMT	0
  78#define LEVEL_GTF	1
  79#define LEVEL_GTF2	2
  80#define LEVEL_CVT	3
  81
  82static struct edid_quirk {
  83	char *vendor;
  84	int product_id;
  85	u32 quirks;
  86} edid_quirk_list[] = {
  87	/* Acer AL1706 */
  88	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
  89	/* Acer F51 */
  90	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
  91	/* Unknown Acer */
  92	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
  93
 
 
 
  94	/* Belinea 10 15 55 */
  95	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
  96	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
  97
  98	/* Envision Peripherals, Inc. EN-7100e */
  99	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
 100	/* Envision EN2028 */
 101	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
 102
 103	/* Funai Electronics PM36B */
 104	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
 105	  EDID_QUIRK_DETAILED_IN_CM },
 106
 107	/* LG Philips LCD LP154W01-A5 */
 108	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
 109	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
 110
 111	/* Philips 107p5 CRT */
 112	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
 113
 114	/* Proview AY765C */
 115	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
 116
 117	/* Samsung SyncMaster 205BW.  Note: irony */
 118	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
 119	/* Samsung SyncMaster 22[5-6]BW */
 120	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
 121	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 122};
 123
 124/*** DDC fetch and block validation ***/
 125
 126static const u8 edid_header[] = {
 127	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
 128};
 129
 130 /*
 131 * Sanity check the header of the base EDID block.  Return 8 if the header
 132 * is perfect, down to 0 if it's totally wrong.
 
 
 
 
 133 */
 134int drm_edid_header_is_valid(const u8 *raw_edid)
 135{
 136	int i, score = 0;
 137
 138	for (i = 0; i < sizeof(edid_header); i++)
 139		if (raw_edid[i] == edid_header[i])
 140			score++;
 141
 142	return score;
 143}
 144EXPORT_SYMBOL(drm_edid_header_is_valid);
 145
 
 
 
 
 146
 147/*
 148 * Sanity check the EDID block (base or extension).  Return 0 if the block
 149 * doesn't check out, or 1 if it's valid.
 150 */
 151static bool
 152drm_edid_block_valid(u8 *raw_edid)
 153{
 154	int i;
 155	u8 csum = 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 156	struct edid *edid = (struct edid *)raw_edid;
 157
 158	if (raw_edid[0] == 0x00) {
 
 
 
 
 
 
 159		int score = drm_edid_header_is_valid(raw_edid);
 160		if (score == 8) ;
 161		else if (score >= 6) {
 
 
 
 
 
 
 
 
 
 162			DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
 163			memcpy(raw_edid, edid_header, sizeof(edid_header));
 164		} else {
 
 
 165			goto bad;
 166		}
 167	}
 168
 169	for (i = 0; i < EDID_LENGTH; i++)
 170		csum += raw_edid[i];
 171	if (csum) {
 172		DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
 
 
 
 
 
 173
 174		/* allow CEA to slide through, switches mangle this */
 175		if (raw_edid[0] != 0x02)
 176			goto bad;
 177	}
 178
 179	/* per-block-type checks */
 180	switch (raw_edid[0]) {
 181	case 0: /* base */
 182		if (edid->version != 1) {
 183			DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
 184			goto bad;
 185		}
 186
 187		if (edid->revision > 4)
 188			DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
 189		break;
 190
 191	default:
 192		break;
 193	}
 194
 195	return 1;
 196
 197bad:
 198	if (raw_edid) {
 199		printk(KERN_ERR "Raw EDID:\n");
 200		print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
 
 
 
 201			       raw_edid, EDID_LENGTH, false);
 
 202	}
 203	return 0;
 204}
 
 205
 206/**
 207 * drm_edid_is_valid - sanity check EDID data
 208 * @edid: EDID data
 209 *
 210 * Sanity-check an entire EDID record (including extensions)
 
 
 211 */
 212bool drm_edid_is_valid(struct edid *edid)
 213{
 214	int i;
 215	u8 *raw = (u8 *)edid;
 216
 217	if (!edid)
 218		return false;
 219
 220	for (i = 0; i <= edid->extensions; i++)
 221		if (!drm_edid_block_valid(raw + i * EDID_LENGTH))
 222			return false;
 223
 224	return true;
 225}
 226EXPORT_SYMBOL(drm_edid_is_valid);
 227
 228#define DDC_ADDR 0x50
 229#define DDC_SEGMENT_ADDR 0x30
 230/**
 231 * Get EDID information via I2C.
 
 
 
 
 232 *
 233 * \param adapter : i2c device adaptor
 234 * \param buf     : EDID data buffer to be filled
 235 * \param len     : EDID data buffer length
 236 * \return 0 on success or -1 on failure.
 237 *
 238 * Try to fetch EDID information by calling i2c driver function.
 239 */
 240static int
 241drm_do_probe_ddc_edid(struct i2c_adapter *adapter, unsigned char *buf,
 242		      int block, int len)
 243{
 
 244	unsigned char start = block * EDID_LENGTH;
 
 
 245	int ret, retries = 5;
 246
 247	/* The core i2c driver will automatically retry the transfer if the
 
 248	 * adapter reports EAGAIN. However, we find that bit-banging transfers
 249	 * are susceptible to errors under a heavily loaded machine and
 250	 * generate spurious NAKs and timeouts. Retrying the transfer
 251	 * of the individual block a few times seems to overcome this.
 252	 */
 253	do {
 254		struct i2c_msg msgs[] = {
 255			{
 
 
 
 
 
 256				.addr	= DDC_ADDR,
 257				.flags	= 0,
 258				.len	= 1,
 259				.buf	= &start,
 260			}, {
 261				.addr	= DDC_ADDR,
 262				.flags	= I2C_M_RD,
 263				.len	= len,
 264				.buf	= buf,
 265			}
 266		};
 267		ret = i2c_transfer(adapter, msgs, 2);
 268	} while (ret != 2 && --retries);
 269
 270	return ret == 2 ? 0 : -1;
 
 
 
 
 
 
 
 
 
 
 
 
 
 271}
 272
 273static bool drm_edid_is_zero(u8 *in_edid, int length)
 
 274{
 275	int i;
 276	u32 *raw_edid = (u32 *)in_edid;
 277
 278	for (i = 0; i < length / 4; i++)
 279		if (*(raw_edid + i) != 0)
 280			return false;
 281	return true;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 282}
 283
 284static u8 *
 285drm_do_get_edid(struct drm_connector *connector, struct i2c_adapter *adapter)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 286{
 287	int i, j = 0, valid_extensions = 0;
 288	u8 *block, *new;
 289
 290	if ((block = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
 291		return NULL;
 292
 293	/* base block fetch */
 294	for (i = 0; i < 4; i++) {
 295		if (drm_do_probe_ddc_edid(adapter, block, 0, EDID_LENGTH))
 296			goto out;
 297		if (drm_edid_block_valid(block))
 
 298			break;
 299		if (i == 0 && drm_edid_is_zero(block, EDID_LENGTH)) {
 300			connector->null_edid_counter++;
 301			goto carp;
 302		}
 303	}
 304	if (i == 4)
 305		goto carp;
 306
 307	/* if there's no extensions, we're done */
 308	if (block[0x7e] == 0)
 309		return block;
 
 310
 311	new = krealloc(block, (block[0x7e] + 1) * EDID_LENGTH, GFP_KERNEL);
 312	if (!new)
 313		goto out;
 314	block = new;
 
 
 
 315
 316	for (j = 1; j <= block[0x7e]; j++) {
 317		for (i = 0; i < 4; i++) {
 318			if (drm_do_probe_ddc_edid(adapter,
 319				  block + (valid_extensions + 1) * EDID_LENGTH,
 320				  j, EDID_LENGTH))
 321				goto out;
 322			if (drm_edid_block_valid(block + (valid_extensions + 1) * EDID_LENGTH)) {
 323				valid_extensions++;
 324				break;
 325			}
 326		}
 
 327		if (i == 4)
 328			dev_warn(connector->dev->dev,
 329			 "%s: Ignoring invalid EDID block %d.\n",
 330			 drm_get_connector_name(connector), j);
 331	}
 332
 333	if (valid_extensions != block[0x7e]) {
 334		block[EDID_LENGTH-1] += block[0x7e] - valid_extensions;
 335		block[0x7e] = valid_extensions;
 336		new = krealloc(block, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
 
 
 
 
 
 337		if (!new)
 338			goto out;
 339		block = new;
 
 
 
 
 
 
 
 
 
 
 
 
 
 340	}
 341
 342	return block;
 343
 344carp:
 345	dev_warn(connector->dev->dev, "%s: EDID block %d invalid.\n",
 346		 drm_get_connector_name(connector), j);
 347
 348out:
 349	kfree(block);
 350	return NULL;
 351}
 
 352
 353/**
 354 * Probe DDC presence.
 
 355 *
 356 * \param adapter : i2c device adaptor
 357 * \return 1 on success
 358 */
 359static bool
 360drm_probe_ddc(struct i2c_adapter *adapter)
 361{
 362	unsigned char out;
 363
 364	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
 365}
 
 366
 367/**
 368 * drm_get_edid - get EDID data, if available
 369 * @connector: connector we're probing
 370 * @adapter: i2c adapter to use for DDC
 371 *
 372 * Poke the given i2c channel to grab EDID data if possible.  If found,
 373 * attach it to the connector.
 374 *
 375 * Return edid data or NULL if we couldn't find any.
 376 */
 377struct edid *drm_get_edid(struct drm_connector *connector,
 378			  struct i2c_adapter *adapter)
 379{
 380	struct edid *edid = NULL;
 381
 382	if (drm_probe_ddc(adapter))
 383		edid = (struct edid *)drm_do_get_edid(connector, adapter);
 384
 385	connector->display_info.raw_edid = (char *)edid;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 386
 387	return edid;
 
 
 388
 
 
 
 
 
 
 
 
 
 389}
 390EXPORT_SYMBOL(drm_get_edid);
 391
 392/*** EDID parsing ***/
 393
 394/**
 395 * edid_vendor - match a string against EDID's obfuscated vendor field
 396 * @edid: EDID to match
 397 * @vendor: vendor string
 398 *
 399 * Returns true if @vendor is in @edid, false otherwise
 400 */
 401static bool edid_vendor(struct edid *edid, char *vendor)
 402{
 403	char edid_vendor[3];
 404
 405	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
 406	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
 407			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
 408	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
 409
 410	return !strncmp(edid_vendor, vendor, 3);
 411}
 412
 413/**
 414 * edid_get_quirks - return quirk flags for a given EDID
 415 * @edid: EDID to process
 416 *
 417 * This tells subsequent routines what fixes they need to apply.
 418 */
 419static u32 edid_get_quirks(struct edid *edid)
 420{
 421	struct edid_quirk *quirk;
 422	int i;
 423
 424	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
 425		quirk = &edid_quirk_list[i];
 426
 427		if (edid_vendor(edid, quirk->vendor) &&
 428		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
 429			return quirk->quirks;
 430	}
 431
 432	return 0;
 433}
 434
 435#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
 436#define MODE_REFRESH_DIFF(m,r) (abs((m)->vrefresh - target_refresh))
 437
 438/**
 439 * edid_fixup_preferred - set preferred modes based on quirk list
 440 * @connector: has mode list to fix up
 441 * @quirks: quirks list
 442 *
 443 * Walk the mode list for @connector, clearing the preferred status
 444 * on existing modes and setting it anew for the right mode ala @quirks.
 445 */
 446static void edid_fixup_preferred(struct drm_connector *connector,
 447				 u32 quirks)
 448{
 449	struct drm_display_mode *t, *cur_mode, *preferred_mode;
 450	int target_refresh = 0;
 
 451
 452	if (list_empty(&connector->probed_modes))
 453		return;
 454
 455	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
 456		target_refresh = 60;
 457	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
 458		target_refresh = 75;
 459
 460	preferred_mode = list_first_entry(&connector->probed_modes,
 461					  struct drm_display_mode, head);
 462
 463	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
 464		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
 465
 466		if (cur_mode == preferred_mode)
 467			continue;
 468
 469		/* Largest mode is preferred */
 470		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
 471			preferred_mode = cur_mode;
 472
 
 
 
 
 473		/* At a given size, try to get closest to target refresh */
 474		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
 475		    MODE_REFRESH_DIFF(cur_mode, target_refresh) <
 476		    MODE_REFRESH_DIFF(preferred_mode, target_refresh)) {
 477			preferred_mode = cur_mode;
 478		}
 479	}
 480
 481	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
 482}
 483
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 484struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
 485					   int hsize, int vsize, int fresh)
 
 486{
 487	struct drm_display_mode *mode = NULL;
 488	int i;
 489
 490	for (i = 0; i < drm_num_dmt_modes; i++) {
 491		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
 492		if (hsize == ptr->hdisplay &&
 493			vsize == ptr->vdisplay &&
 494			fresh == drm_mode_vrefresh(ptr)) {
 495			/* get the expected default mode */
 496			mode = drm_mode_duplicate(dev, ptr);
 497			break;
 498		}
 
 
 
 499	}
 500	return mode;
 
 501}
 502EXPORT_SYMBOL(drm_mode_find_dmt);
 503
 504typedef void detailed_cb(struct detailed_timing *timing, void *closure);
 505
 506static void
 507cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 508{
 509	int i, n = 0;
 510	u8 rev = ext[0x01], d = ext[0x02];
 511	u8 *det_base = ext + d;
 512
 513	switch (rev) {
 514	case 0:
 515		/* can't happen */
 516		return;
 517	case 1:
 518		/* have to infer how many blocks we have, check pixel clock */
 519		for (i = 0; i < 6; i++)
 520			if (det_base[18*i] || det_base[18*i+1])
 521				n++;
 522		break;
 523	default:
 524		/* explicit count */
 525		n = min(ext[0x03] & 0x0f, 6);
 526		break;
 527	}
 528
 529	for (i = 0; i < n; i++)
 530		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 531}
 532
 533static void
 534vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
 535{
 536	unsigned int i, n = min((int)ext[0x02], 6);
 537	u8 *det_base = ext + 5;
 538
 539	if (ext[0x01] != 1)
 540		return; /* unknown version */
 541
 542	for (i = 0; i < n; i++)
 543		cb((struct detailed_timing *)(det_base + 18 * i), closure);
 544}
 545
 546static void
 547drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
 548{
 549	int i;
 550	struct edid *edid = (struct edid *)raw_edid;
 551
 552	if (edid == NULL)
 553		return;
 554
 555	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
 556		cb(&(edid->detailed_timings[i]), closure);
 557
 558	for (i = 1; i <= raw_edid[0x7e]; i++) {
 559		u8 *ext = raw_edid + (i * EDID_LENGTH);
 560		switch (*ext) {
 561		case CEA_EXT:
 562			cea_for_each_detailed_block(ext, cb, closure);
 563			break;
 564		case VTB_EXT:
 565			vtb_for_each_detailed_block(ext, cb, closure);
 566			break;
 567		default:
 568			break;
 569		}
 570	}
 571}
 572
 573static void
 574is_rb(struct detailed_timing *t, void *data)
 575{
 576	u8 *r = (u8 *)t;
 577	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
 578		if (r[15] & 0x10)
 579			*(bool *)data = true;
 580}
 581
 582/* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
 583static bool
 584drm_monitor_supports_rb(struct edid *edid)
 585{
 586	if (edid->revision >= 4) {
 587		bool ret;
 588		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
 589		return ret;
 590	}
 591
 592	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
 593}
 594
 595static void
 596find_gtf2(struct detailed_timing *t, void *data)
 597{
 598	u8 *r = (u8 *)t;
 599	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
 600		*(u8 **)data = r;
 601}
 602
 603/* Secondary GTF curve kicks in above some break frequency */
 604static int
 605drm_gtf2_hbreak(struct edid *edid)
 606{
 607	u8 *r = NULL;
 608	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
 609	return r ? (r[12] * 2) : 0;
 610}
 611
 612static int
 613drm_gtf2_2c(struct edid *edid)
 614{
 615	u8 *r = NULL;
 616	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
 617	return r ? r[13] : 0;
 618}
 619
 620static int
 621drm_gtf2_m(struct edid *edid)
 622{
 623	u8 *r = NULL;
 624	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
 625	return r ? (r[15] << 8) + r[14] : 0;
 626}
 627
 628static int
 629drm_gtf2_k(struct edid *edid)
 630{
 631	u8 *r = NULL;
 632	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
 633	return r ? r[16] : 0;
 634}
 635
 636static int
 637drm_gtf2_2j(struct edid *edid)
 638{
 639	u8 *r = NULL;
 640	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
 641	return r ? r[17] : 0;
 642}
 643
 644/**
 645 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
 646 * @edid: EDID block to scan
 647 */
 648static int standard_timing_level(struct edid *edid)
 649{
 650	if (edid->revision >= 2) {
 651		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
 652			return LEVEL_CVT;
 653		if (drm_gtf2_hbreak(edid))
 654			return LEVEL_GTF2;
 655		return LEVEL_GTF;
 656	}
 657	return LEVEL_DMT;
 658}
 659
 660/*
 661 * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
 662 * monitors fill with ascii space (0x20) instead.
 663 */
 664static int
 665bad_std_timing(u8 a, u8 b)
 666{
 667	return (a == 0x00 && b == 0x00) ||
 668	       (a == 0x01 && b == 0x01) ||
 669	       (a == 0x20 && b == 0x20);
 670}
 671
 672/**
 673 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
 
 
 674 * @t: standard timing params
 675 * @timing_level: standard timing level
 676 *
 677 * Take the standard timing params (in this case width, aspect, and refresh)
 678 * and convert them into a real mode using CVT/GTF/DMT.
 679 */
 680static struct drm_display_mode *
 681drm_mode_std(struct drm_connector *connector, struct edid *edid,
 682	     struct std_timing *t, int revision)
 683{
 684	struct drm_device *dev = connector->dev;
 685	struct drm_display_mode *m, *mode = NULL;
 686	int hsize, vsize;
 687	int vrefresh_rate;
 688	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
 689		>> EDID_TIMING_ASPECT_SHIFT;
 690	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
 691		>> EDID_TIMING_VFREQ_SHIFT;
 692	int timing_level = standard_timing_level(edid);
 693
 694	if (bad_std_timing(t->hsize, t->vfreq_aspect))
 695		return NULL;
 696
 697	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
 698	hsize = t->hsize * 8 + 248;
 699	/* vrefresh_rate = vfreq + 60 */
 700	vrefresh_rate = vfreq + 60;
 701	/* the vdisplay is calculated based on the aspect ratio */
 702	if (aspect_ratio == 0) {
 703		if (revision < 3)
 704			vsize = hsize;
 705		else
 706			vsize = (hsize * 10) / 16;
 707	} else if (aspect_ratio == 1)
 708		vsize = (hsize * 3) / 4;
 709	else if (aspect_ratio == 2)
 710		vsize = (hsize * 4) / 5;
 711	else
 712		vsize = (hsize * 9) / 16;
 713
 714	/* HDTV hack, part 1 */
 715	if (vrefresh_rate == 60 &&
 716	    ((hsize == 1360 && vsize == 765) ||
 717	     (hsize == 1368 && vsize == 769))) {
 718		hsize = 1366;
 719		vsize = 768;
 720	}
 721
 722	/*
 723	 * If this connector already has a mode for this size and refresh
 724	 * rate (because it came from detailed or CVT info), use that
 725	 * instead.  This way we don't have to guess at interlace or
 726	 * reduced blanking.
 727	 */
 728	list_for_each_entry(m, &connector->probed_modes, head)
 729		if (m->hdisplay == hsize && m->vdisplay == vsize &&
 730		    drm_mode_vrefresh(m) == vrefresh_rate)
 731			return NULL;
 732
 733	/* HDTV hack, part 2 */
 734	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
 735		mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
 736				    false);
 737		mode->hdisplay = 1366;
 738		mode->hsync_start = mode->hsync_start - 1;
 739		mode->hsync_end = mode->hsync_end - 1;
 740		return mode;
 741	}
 742
 743	/* check whether it can be found in default mode table */
 744	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate);
 
 
 
 
 
 
 745	if (mode)
 746		return mode;
 747
 
 748	switch (timing_level) {
 749	case LEVEL_DMT:
 750		break;
 751	case LEVEL_GTF:
 752		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
 753		break;
 754	case LEVEL_GTF2:
 755		/*
 756		 * This is potentially wrong if there's ever a monitor with
 757		 * more than one ranges section, each claiming a different
 758		 * secondary GTF curve.  Please don't do that.
 759		 */
 760		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
 
 
 761		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
 762			kfree(mode);
 763			mode = drm_gtf_mode_complex(dev, hsize, vsize,
 764						    vrefresh_rate, 0, 0,
 765						    drm_gtf2_m(edid),
 766						    drm_gtf2_2c(edid),
 767						    drm_gtf2_k(edid),
 768						    drm_gtf2_2j(edid));
 769		}
 770		break;
 771	case LEVEL_CVT:
 772		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
 773				    false);
 774		break;
 775	}
 776	return mode;
 777}
 778
 779/*
 780 * EDID is delightfully ambiguous about how interlaced modes are to be
 781 * encoded.  Our internal representation is of frame height, but some
 782 * HDTV detailed timings are encoded as field height.
 783 *
 784 * The format list here is from CEA, in frame size.  Technically we
 785 * should be checking refresh rate too.  Whatever.
 786 */
 787static void
 788drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
 789			    struct detailed_pixel_timing *pt)
 790{
 791	int i;
 792	static const struct {
 793		int w, h;
 794	} cea_interlaced[] = {
 795		{ 1920, 1080 },
 796		{  720,  480 },
 797		{ 1440,  480 },
 798		{ 2880,  480 },
 799		{  720,  576 },
 800		{ 1440,  576 },
 801		{ 2880,  576 },
 802	};
 803
 804	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
 805		return;
 806
 807	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
 808		if ((mode->hdisplay == cea_interlaced[i].w) &&
 809		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
 810			mode->vdisplay *= 2;
 811			mode->vsync_start *= 2;
 812			mode->vsync_end *= 2;
 813			mode->vtotal *= 2;
 814			mode->vtotal |= 1;
 815		}
 816	}
 817
 818	mode->flags |= DRM_MODE_FLAG_INTERLACE;
 819}
 820
 821/**
 822 * drm_mode_detailed - create a new mode from an EDID detailed timing section
 823 * @dev: DRM device (needed to create new mode)
 824 * @edid: EDID block
 825 * @timing: EDID detailed timing info
 826 * @quirks: quirks to apply
 827 *
 828 * An EDID detailed timing block contains enough info for us to create and
 829 * return a new struct drm_display_mode.
 830 */
 831static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
 832						  struct edid *edid,
 833						  struct detailed_timing *timing,
 834						  u32 quirks)
 835{
 836	struct drm_display_mode *mode;
 837	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
 838	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
 839	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
 840	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
 841	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
 842	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
 843	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
 844	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) >> 2 | pt->vsync_offset_pulse_width_lo >> 4;
 845	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
 846
 847	/* ignore tiny modes */
 848	if (hactive < 64 || vactive < 64)
 849		return NULL;
 850
 851	if (pt->misc & DRM_EDID_PT_STEREO) {
 852		printk(KERN_WARNING "stereo mode not supported\n");
 853		return NULL;
 854	}
 855	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
 856		printk(KERN_WARNING "composite sync not supported\n");
 857	}
 858
 859	/* it is incorrect if hsync/vsync width is zero */
 860	if (!hsync_pulse_width || !vsync_pulse_width) {
 861		DRM_DEBUG_KMS("Incorrect Detailed timing. "
 862				"Wrong Hsync/Vsync pulse width\n");
 863		return NULL;
 864	}
 
 
 
 
 
 
 
 
 
 865	mode = drm_mode_create(dev);
 866	if (!mode)
 867		return NULL;
 868
 869	mode->type = DRM_MODE_TYPE_DRIVER;
 870
 871	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
 872		timing->pixel_clock = cpu_to_le16(1088);
 873
 874	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
 875
 876	mode->hdisplay = hactive;
 877	mode->hsync_start = mode->hdisplay + hsync_offset;
 878	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
 879	mode->htotal = mode->hdisplay + hblank;
 880
 881	mode->vdisplay = vactive;
 882	mode->vsync_start = mode->vdisplay + vsync_offset;
 883	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
 884	mode->vtotal = mode->vdisplay + vblank;
 885
 886	/* Some EDIDs have bogus h/vtotal values */
 887	if (mode->hsync_end > mode->htotal)
 888		mode->htotal = mode->hsync_end + 1;
 889	if (mode->vsync_end > mode->vtotal)
 890		mode->vtotal = mode->vsync_end + 1;
 891
 892	drm_mode_do_interlace_quirk(mode, pt);
 893
 894	drm_mode_set_name(mode);
 895
 896	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
 897		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
 898	}
 899
 900	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
 901		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
 902	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
 903		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
 904
 
 905	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
 906	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
 907
 908	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
 909		mode->width_mm *= 10;
 910		mode->height_mm *= 10;
 911	}
 912
 913	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
 914		mode->width_mm = edid->width_cm * 10;
 915		mode->height_mm = edid->height_cm * 10;
 916	}
 917
 918	return mode;
 919}
 
 920
 921static bool
 922mode_is_rb(const struct drm_display_mode *mode)
 923{
 924	return (mode->htotal - mode->hdisplay == 160) &&
 925	       (mode->hsync_end - mode->hdisplay == 80) &&
 926	       (mode->hsync_end - mode->hsync_start == 32) &&
 927	       (mode->vsync_start - mode->vdisplay == 3);
 928}
 929
 930static bool
 931mode_in_hsync_range(const struct drm_display_mode *mode,
 932		    struct edid *edid, u8 *t)
 933{
 934	int hsync, hmin, hmax;
 935
 936	hmin = t[7];
 937	if (edid->revision >= 4)
 938	    hmin += ((t[4] & 0x04) ? 255 : 0);
 939	hmax = t[8];
 940	if (edid->revision >= 4)
 941	    hmax += ((t[4] & 0x08) ? 255 : 0);
 942	hsync = drm_mode_hsync(mode);
 943
 944	return (hsync <= hmax && hsync >= hmin);
 945}
 946
 947static bool
 948mode_in_vsync_range(const struct drm_display_mode *mode,
 949		    struct edid *edid, u8 *t)
 950{
 951	int vsync, vmin, vmax;
 952
 953	vmin = t[5];
 954	if (edid->revision >= 4)
 955	    vmin += ((t[4] & 0x01) ? 255 : 0);
 956	vmax = t[6];
 957	if (edid->revision >= 4)
 958	    vmax += ((t[4] & 0x02) ? 255 : 0);
 959	vsync = drm_mode_vrefresh(mode);
 960
 961	return (vsync <= vmax && vsync >= vmin);
 962}
 963
 964static u32
 965range_pixel_clock(struct edid *edid, u8 *t)
 966{
 967	/* unspecified */
 968	if (t[9] == 0 || t[9] == 255)
 969		return 0;
 970
 971	/* 1.4 with CVT support gives us real precision, yay */
 972	if (edid->revision >= 4 && t[10] == 0x04)
 973		return (t[9] * 10000) - ((t[12] >> 2) * 250);
 974
 975	/* 1.3 is pathetic, so fuzz up a bit */
 976	return t[9] * 10000 + 5001;
 977}
 978
 979static bool
 980mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
 981	      struct detailed_timing *timing)
 982{
 983	u32 max_clock;
 984	u8 *t = (u8 *)timing;
 985
 986	if (!mode_in_hsync_range(mode, edid, t))
 987		return false;
 988
 989	if (!mode_in_vsync_range(mode, edid, t))
 990		return false;
 991
 992	if ((max_clock = range_pixel_clock(edid, t)))
 993		if (mode->clock > max_clock)
 994			return false;
 995
 996	/* 1.4 max horizontal check */
 997	if (edid->revision >= 4 && t[10] == 0x04)
 998		if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
 999			return false;
1000
1001	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
1002		return false;
1003
1004	return true;
1005}
1006
1007/*
1008 * XXX If drm_dmt_modes ever regrows the CVT-R modes (and it will) this will
1009 * need to account for them.
1010 */
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1011static int
1012drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
1013			struct detailed_timing *timing)
1014{
1015	int i, modes = 0;
1016	struct drm_display_mode *newmode;
1017	struct drm_device *dev = connector->dev;
1018
1019	for (i = 0; i < drm_num_dmt_modes; i++) {
1020		if (mode_in_range(drm_dmt_modes + i, edid, timing)) {
 
1021			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
1022			if (newmode) {
1023				drm_mode_probed_add(connector, newmode);
1024				modes++;
1025			}
1026		}
1027	}
1028
1029	return modes;
1030}
1031
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1032static void
1033do_inferred_modes(struct detailed_timing *timing, void *c)
1034{
1035	struct detailed_mode_closure *closure = c;
1036	struct detailed_non_pixel *data = &timing->data.other_data;
1037	int gtf = (closure->edid->features & DRM_EDID_FEATURE_DEFAULT_GTF);
1038
1039	if (gtf && data->type == EDID_DETAIL_MONITOR_RANGE)
 
 
 
 
 
 
 
 
 
 
 
 
1040		closure->modes += drm_gtf_modes_for_range(closure->connector,
1041							  closure->edid,
1042							  timing);
 
 
 
 
 
 
 
 
 
 
 
 
 
1043}
1044
1045static int
1046add_inferred_modes(struct drm_connector *connector, struct edid *edid)
1047{
1048	struct detailed_mode_closure closure = {
1049		connector, edid, 0, 0, 0
 
1050	};
1051
1052	if (version_greater(edid, 1, 0))
1053		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
1054					    &closure);
1055
1056	return closure.modes;
1057}
1058
1059static int
1060drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
1061{
1062	int i, j, m, modes = 0;
1063	struct drm_display_mode *mode;
1064	u8 *est = ((u8 *)timing) + 5;
1065
1066	for (i = 0; i < 6; i++) {
1067		for (j = 7; j > 0; j--) {
1068			m = (i * 8) + (7 - j);
1069			if (m >= ARRAY_SIZE(est3_modes))
1070				break;
1071			if (est[i] & (1 << j)) {
1072				mode = drm_mode_find_dmt(connector->dev,
1073							 est3_modes[m].w,
1074							 est3_modes[m].h,
1075							 est3_modes[m].r
1076							 /*, est3_modes[m].rb */);
1077				if (mode) {
1078					drm_mode_probed_add(connector, mode);
1079					modes++;
1080				}
1081			}
1082		}
1083	}
1084
1085	return modes;
1086}
1087
1088static void
1089do_established_modes(struct detailed_timing *timing, void *c)
1090{
1091	struct detailed_mode_closure *closure = c;
1092	struct detailed_non_pixel *data = &timing->data.other_data;
1093
1094	if (data->type == EDID_DETAIL_EST_TIMINGS)
1095		closure->modes += drm_est3_modes(closure->connector, timing);
1096}
1097
1098/**
1099 * add_established_modes - get est. modes from EDID and add them
 
1100 * @edid: EDID block to scan
1101 *
1102 * Each EDID block contains a bitmap of the supported "established modes" list
1103 * (defined above).  Tease them out and add them to the global modes list.
1104 */
1105static int
1106add_established_modes(struct drm_connector *connector, struct edid *edid)
1107{
1108	struct drm_device *dev = connector->dev;
1109	unsigned long est_bits = edid->established_timings.t1 |
1110		(edid->established_timings.t2 << 8) |
1111		((edid->established_timings.mfg_rsvd & 0x80) << 9);
1112	int i, modes = 0;
1113	struct detailed_mode_closure closure = {
1114		connector, edid, 0, 0, 0
 
1115	};
1116
1117	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
1118		if (est_bits & (1<<i)) {
1119			struct drm_display_mode *newmode;
1120			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
1121			if (newmode) {
1122				drm_mode_probed_add(connector, newmode);
1123				modes++;
1124			}
1125		}
1126	}
1127
1128	if (version_greater(edid, 1, 0))
1129		    drm_for_each_detailed_block((u8 *)edid,
1130						do_established_modes, &closure);
1131
1132	return modes + closure.modes;
1133}
1134
1135static void
1136do_standard_modes(struct detailed_timing *timing, void *c)
1137{
1138	struct detailed_mode_closure *closure = c;
1139	struct detailed_non_pixel *data = &timing->data.other_data;
1140	struct drm_connector *connector = closure->connector;
1141	struct edid *edid = closure->edid;
1142
1143	if (data->type == EDID_DETAIL_STD_MODES) {
1144		int i;
1145		for (i = 0; i < 6; i++) {
1146			struct std_timing *std;
1147			struct drm_display_mode *newmode;
1148
1149			std = &data->data.timings[i];
1150			newmode = drm_mode_std(connector, edid, std,
1151					       edid->revision);
1152			if (newmode) {
1153				drm_mode_probed_add(connector, newmode);
1154				closure->modes++;
1155			}
1156		}
1157	}
1158}
1159
1160/**
1161 * add_standard_modes - get std. modes from EDID and add them
 
1162 * @edid: EDID block to scan
1163 *
1164 * Standard modes can be calculated using the appropriate standard (DMT,
1165 * GTF or CVT. Grab them from @edid and add them to the list.
1166 */
1167static int
1168add_standard_modes(struct drm_connector *connector, struct edid *edid)
1169{
1170	int i, modes = 0;
1171	struct detailed_mode_closure closure = {
1172		connector, edid, 0, 0, 0
 
1173	};
1174
1175	for (i = 0; i < EDID_STD_TIMINGS; i++) {
1176		struct drm_display_mode *newmode;
1177
1178		newmode = drm_mode_std(connector, edid,
1179				       &edid->standard_timings[i],
1180				       edid->revision);
1181		if (newmode) {
1182			drm_mode_probed_add(connector, newmode);
1183			modes++;
1184		}
1185	}
1186
1187	if (version_greater(edid, 1, 0))
1188		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
1189					    &closure);
1190
1191	/* XXX should also look for standard codes in VTB blocks */
1192
1193	return modes + closure.modes;
1194}
1195
1196static int drm_cvt_modes(struct drm_connector *connector,
1197			 struct detailed_timing *timing)
1198{
1199	int i, j, modes = 0;
1200	struct drm_display_mode *newmode;
1201	struct drm_device *dev = connector->dev;
1202	struct cvt_timing *cvt;
1203	const int rates[] = { 60, 85, 75, 60, 50 };
1204	const u8 empty[3] = { 0, 0, 0 };
1205
1206	for (i = 0; i < 4; i++) {
1207		int uninitialized_var(width), height;
1208		cvt = &(timing->data.other_data.data.cvt[i]);
1209
1210		if (!memcmp(cvt->code, empty, 3))
1211			continue;
1212
1213		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
1214		switch (cvt->code[1] & 0x0c) {
1215		case 0x00:
1216			width = height * 4 / 3;
1217			break;
1218		case 0x04:
1219			width = height * 16 / 9;
1220			break;
1221		case 0x08:
1222			width = height * 16 / 10;
1223			break;
1224		case 0x0c:
1225			width = height * 15 / 9;
1226			break;
1227		}
1228
1229		for (j = 1; j < 5; j++) {
1230			if (cvt->code[2] & (1 << j)) {
1231				newmode = drm_cvt_mode(dev, width, height,
1232						       rates[j], j == 0,
1233						       false, false);
1234				if (newmode) {
1235					drm_mode_probed_add(connector, newmode);
1236					modes++;
1237				}
1238			}
1239		}
1240	}
1241
1242	return modes;
1243}
1244
1245static void
1246do_cvt_mode(struct detailed_timing *timing, void *c)
1247{
1248	struct detailed_mode_closure *closure = c;
1249	struct detailed_non_pixel *data = &timing->data.other_data;
1250
1251	if (data->type == EDID_DETAIL_CVT_3BYTE)
1252		closure->modes += drm_cvt_modes(closure->connector, timing);
1253}
1254
1255static int
1256add_cvt_modes(struct drm_connector *connector, struct edid *edid)
1257{	
1258	struct detailed_mode_closure closure = {
1259		connector, edid, 0, 0, 0
 
1260	};
1261
1262	if (version_greater(edid, 1, 2))
1263		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
1264
1265	/* XXX should also look for CVT codes in VTB blocks */
1266
1267	return closure.modes;
1268}
1269
 
 
1270static void
1271do_detailed_mode(struct detailed_timing *timing, void *c)
1272{
1273	struct detailed_mode_closure *closure = c;
1274	struct drm_display_mode *newmode;
1275
1276	if (timing->pixel_clock) {
1277		newmode = drm_mode_detailed(closure->connector->dev,
1278					    closure->edid, timing,
1279					    closure->quirks);
1280		if (!newmode)
1281			return;
1282
1283		if (closure->preferred)
1284			newmode->type |= DRM_MODE_TYPE_PREFERRED;
1285
 
 
 
 
 
 
 
1286		drm_mode_probed_add(closure->connector, newmode);
1287		closure->modes++;
1288		closure->preferred = 0;
1289	}
1290}
1291
1292/*
1293 * add_detailed_modes - Add modes from detailed timings
1294 * @connector: attached connector
1295 * @edid: EDID block to scan
1296 * @quirks: quirks to apply
1297 */
1298static int
1299add_detailed_modes(struct drm_connector *connector, struct edid *edid,
1300		   u32 quirks)
1301{
1302	struct detailed_mode_closure closure = {
1303		connector,
1304		edid,
1305		1,
1306		quirks,
1307		0
1308	};
1309
1310	if (closure.preferred && !version_greater(edid, 1, 3))
1311		closure.preferred =
1312		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
1313
1314	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
1315
1316	return closure.modes;
1317}
1318
1319#define HDMI_IDENTIFIER 0x000C03
1320#define AUDIO_BLOCK	0x01
 
1321#define VENDOR_BLOCK    0x03
 
 
1322#define EDID_BASIC_AUDIO	(1 << 6)
 
 
 
1323
1324/**
1325 * Search EDID for CEA extension block.
1326 */
1327u8 *drm_find_cea_extension(struct edid *edid)
1328{
1329	u8 *edid_ext = NULL;
1330	int i;
1331
1332	/* No EDID or EDID extensions */
1333	if (edid == NULL || edid->extensions == 0)
1334		return NULL;
1335
1336	/* Find CEA extension */
1337	for (i = 0; i < edid->extensions; i++) {
1338		edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
1339		if (edid_ext[0] == CEA_EXT)
1340			break;
1341	}
1342
1343	if (i == edid->extensions)
1344		return NULL;
1345
1346	return edid_ext;
1347}
1348EXPORT_SYMBOL(drm_find_cea_extension);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1349
1350/**
1351 * drm_detect_hdmi_monitor - detect whether monitor is hdmi.
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1352 * @edid: monitor EDID information
1353 *
1354 * Parse the CEA extension according to CEA-861-B.
1355 * Return true if HDMI, false if not or unknown.
 
1356 */
1357bool drm_detect_hdmi_monitor(struct edid *edid)
1358{
1359	u8 *edid_ext;
1360	int i, hdmi_id;
1361	int start_offset, end_offset;
1362	bool is_hdmi = false;
1363
1364	edid_ext = drm_find_cea_extension(edid);
1365	if (!edid_ext)
1366		goto end;
1367
1368	/* Data block offset in CEA extension block */
1369	start_offset = 4;
1370	end_offset = edid_ext[2];
1371
1372	/*
1373	 * Because HDMI identifier is in Vendor Specific Block,
1374	 * search it from all data blocks of CEA extension.
1375	 */
1376	for (i = start_offset; i < end_offset;
1377		/* Increased by data block len */
1378		i += ((edid_ext[i] & 0x1f) + 1)) {
1379		/* Find vendor specific block */
1380		if ((edid_ext[i] >> 5) == VENDOR_BLOCK) {
1381			hdmi_id = edid_ext[i + 1] | (edid_ext[i + 2] << 8) |
1382				  edid_ext[i + 3] << 16;
1383			/* Find HDMI identifier */
1384			if (hdmi_id == HDMI_IDENTIFIER)
1385				is_hdmi = true;
1386			break;
1387		}
1388	}
1389
1390end:
1391	return is_hdmi;
1392}
1393EXPORT_SYMBOL(drm_detect_hdmi_monitor);
1394
1395/**
1396 * drm_detect_monitor_audio - check monitor audio capability
 
1397 *
1398 * Monitor should have CEA extension block.
1399 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
1400 * audio' only. If there is any audio extension block and supported
1401 * audio format, assume at least 'basic audio' support, even if 'basic
1402 * audio' is not defined in EDID.
1403 *
 
1404 */
1405bool drm_detect_monitor_audio(struct edid *edid)
1406{
1407	u8 *edid_ext;
1408	int i, j;
1409	bool has_audio = false;
1410	int start_offset, end_offset;
1411
1412	edid_ext = drm_find_cea_extension(edid);
1413	if (!edid_ext)
1414		goto end;
1415
1416	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
1417
1418	if (has_audio) {
1419		DRM_DEBUG_KMS("Monitor has basic audio support\n");
1420		goto end;
1421	}
1422
1423	/* Data block offset in CEA extension block */
1424	start_offset = 4;
1425	end_offset = edid_ext[2];
1426
1427	for (i = start_offset; i < end_offset;
1428			i += ((edid_ext[i] & 0x1f) + 1)) {
1429		if ((edid_ext[i] >> 5) == AUDIO_BLOCK) {
1430			has_audio = true;
1431			for (j = 1; j < (edid_ext[i] & 0x1f); j += 3)
1432				DRM_DEBUG_KMS("CEA audio format %d\n",
1433					      (edid_ext[i + j] >> 3) & 0xf);
1434			goto end;
1435		}
1436	}
1437end:
1438	return has_audio;
1439}
1440EXPORT_SYMBOL(drm_detect_monitor_audio);
1441
1442/**
1443 * drm_add_display_info - pull display info out if present
1444 * @edid: EDID data
1445 * @info: display info (attached to connector)
1446 *
1447 * Grab any available display info and stuff it into the drm_display_info
1448 * structure that's part of the connector.  Useful for tracking bpp and
1449 * color spaces.
 
 
1450 */
1451static void drm_add_display_info(struct edid *edid,
1452				 struct drm_display_info *info)
1453{
1454	u8 *edid_ext;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1455
1456	info->width_mm = edid->width_cm * 10;
1457	info->height_mm = edid->height_cm * 10;
1458
1459	/* driver figures it out in this case */
1460	info->bpc = 0;
1461	info->color_formats = 0;
 
 
 
1462
1463	/* Only defined for 1.4 with digital displays */
1464	if (edid->revision < 4)
1465		return;
1466
1467	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
1468		return;
1469
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1470	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
1471	case DRM_EDID_DIGITAL_DEPTH_6:
1472		info->bpc = 6;
1473		break;
1474	case DRM_EDID_DIGITAL_DEPTH_8:
1475		info->bpc = 8;
1476		break;
1477	case DRM_EDID_DIGITAL_DEPTH_10:
1478		info->bpc = 10;
1479		break;
1480	case DRM_EDID_DIGITAL_DEPTH_12:
1481		info->bpc = 12;
1482		break;
1483	case DRM_EDID_DIGITAL_DEPTH_14:
1484		info->bpc = 14;
1485		break;
1486	case DRM_EDID_DIGITAL_DEPTH_16:
1487		info->bpc = 16;
1488		break;
1489	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
1490	default:
1491		info->bpc = 0;
1492		break;
1493	}
1494
1495	info->color_formats = DRM_COLOR_FORMAT_RGB444;
1496	if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB444)
1497		info->color_formats = DRM_COLOR_FORMAT_YCRCB444;
1498	if (info->color_formats & DRM_EDID_FEATURE_RGB_YCRCB422)
1499		info->color_formats = DRM_COLOR_FORMAT_YCRCB422;
1500
1501	/* Get data from CEA blocks if present */
1502	edid_ext = drm_find_cea_extension(edid);
1503	if (!edid_ext)
1504		return;
 
 
1505
1506	info->cea_rev = edid_ext[1];
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1507}
1508
1509/**
1510 * drm_add_edid_modes - add modes from EDID data, if available
1511 * @connector: connector we're probing
1512 * @edid: edid data
1513 *
1514 * Add the specified modes to the connector's mode list.
 
 
1515 *
1516 * Return number of modes added or 0 if we couldn't find any.
1517 */
1518int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
1519{
1520	int num_modes = 0;
1521	u32 quirks;
1522
1523	if (edid == NULL) {
1524		return 0;
1525	}
1526	if (!drm_edid_is_valid(edid)) {
1527		dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
1528			 drm_get_connector_name(connector));
1529		return 0;
1530	}
1531
1532	quirks = edid_get_quirks(edid);
1533
1534	/*
1535	 * EDID spec says modes should be preferred in this order:
1536	 * - preferred detailed mode
1537	 * - other detailed modes from base block
1538	 * - detailed modes from extension blocks
1539	 * - CVT 3-byte code modes
1540	 * - standard timing codes
1541	 * - established timing codes
1542	 * - modes inferred from GTF or CVT range information
1543	 *
1544	 * We get this pretty much right.
1545	 *
1546	 * XXX order for additional mode types in extension blocks?
1547	 */
1548	num_modes += add_detailed_modes(connector, edid, quirks);
1549	num_modes += add_cvt_modes(connector, edid);
1550	num_modes += add_standard_modes(connector, edid);
1551	num_modes += add_established_modes(connector, edid);
1552	num_modes += add_inferred_modes(connector, edid);
 
 
 
 
1553
1554	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
1555		edid_fixup_preferred(connector, quirks);
1556
1557	drm_add_display_info(edid, &connector->display_info);
 
 
 
 
 
 
 
 
 
1558
1559	return num_modes;
1560}
1561EXPORT_SYMBOL(drm_add_edid_modes);
1562
1563/**
1564 * drm_add_modes_noedid - add modes for the connectors without EDID
1565 * @connector: connector we're probing
1566 * @hdisplay: the horizontal display limit
1567 * @vdisplay: the vertical display limit
1568 *
1569 * Add the specified modes to the connector's mode list. Only when the
1570 * hdisplay/vdisplay is not beyond the given limit, it will be added.
1571 *
1572 * Return number of modes added or 0 if we couldn't find any.
1573 */
1574int drm_add_modes_noedid(struct drm_connector *connector,
1575			int hdisplay, int vdisplay)
1576{
1577	int i, count, num_modes = 0;
1578	struct drm_display_mode *mode;
1579	struct drm_device *dev = connector->dev;
1580
1581	count = sizeof(drm_dmt_modes) / sizeof(struct drm_display_mode);
1582	if (hdisplay < 0)
1583		hdisplay = 0;
1584	if (vdisplay < 0)
1585		vdisplay = 0;
1586
1587	for (i = 0; i < count; i++) {
1588		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1589		if (hdisplay && vdisplay) {
1590			/*
1591			 * Only when two are valid, they will be used to check
1592			 * whether the mode should be added to the mode list of
1593			 * the connector.
1594			 */
1595			if (ptr->hdisplay > hdisplay ||
1596					ptr->vdisplay > vdisplay)
1597				continue;
1598		}
1599		if (drm_mode_vrefresh(ptr) > 61)
1600			continue;
1601		mode = drm_mode_duplicate(dev, ptr);
1602		if (mode) {
1603			drm_mode_probed_add(connector, mode);
1604			num_modes++;
1605		}
1606	}
1607	return num_modes;
1608}
1609EXPORT_SYMBOL(drm_add_modes_noedid);
v4.10.11
   1/*
   2 * Copyright (c) 2006 Luc Verhaegen (quirks list)
   3 * Copyright (c) 2007-2008 Intel Corporation
   4 *   Jesse Barnes <jesse.barnes@intel.com>
   5 * Copyright 2010 Red Hat, Inc.
   6 *
   7 * DDC probing routines (drm_ddc_read & drm_do_probe_ddc_edid) originally from
   8 * FB layer.
   9 *   Copyright (C) 2006 Dennis Munsie <dmunsie@cecropia.com>
  10 *
  11 * Permission is hereby granted, free of charge, to any person obtaining a
  12 * copy of this software and associated documentation files (the "Software"),
  13 * to deal in the Software without restriction, including without limitation
  14 * the rights to use, copy, modify, merge, publish, distribute, sub license,
  15 * and/or sell copies of the Software, and to permit persons to whom the
  16 * Software is furnished to do so, subject to the following conditions:
  17 *
  18 * The above copyright notice and this permission notice (including the
  19 * next paragraph) shall be included in all copies or substantial portions
  20 * of the Software.
  21 *
  22 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  23 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  24 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  25 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  26 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  27 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  28 * DEALINGS IN THE SOFTWARE.
  29 */
  30#include <linux/kernel.h>
  31#include <linux/slab.h>
  32#include <linux/hdmi.h>
  33#include <linux/i2c.h>
  34#include <linux/module.h>
  35#include <linux/vga_switcheroo.h>
  36#include <drm/drmP.h>
  37#include <drm/drm_edid.h>
  38#include <drm/drm_displayid.h>
  39
  40#define version_greater(edid, maj, min) \
  41	(((edid)->version > (maj)) || \
  42	 ((edid)->version == (maj) && (edid)->revision > (min)))
  43
  44#define EDID_EST_TIMINGS 16
  45#define EDID_STD_TIMINGS 8
  46#define EDID_DETAILED_TIMINGS 4
  47
  48/*
  49 * EDID blocks out in the wild have a variety of bugs, try to collect
  50 * them here (note that userspace may work around broken monitors first,
  51 * but fixes should make their way here so that the kernel "just works"
  52 * on as many displays as possible).
  53 */
  54
  55/* First detailed mode wrong, use largest 60Hz mode */
  56#define EDID_QUIRK_PREFER_LARGE_60		(1 << 0)
  57/* Reported 135MHz pixel clock is too high, needs adjustment */
  58#define EDID_QUIRK_135_CLOCK_TOO_HIGH		(1 << 1)
  59/* Prefer the largest mode at 75 Hz */
  60#define EDID_QUIRK_PREFER_LARGE_75		(1 << 2)
  61/* Detail timing is in cm not mm */
  62#define EDID_QUIRK_DETAILED_IN_CM		(1 << 3)
  63/* Detailed timing descriptors have bogus size values, so just take the
  64 * maximum size and use that.
  65 */
  66#define EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE	(1 << 4)
  67/* Monitor forgot to set the first detailed is preferred bit. */
  68#define EDID_QUIRK_FIRST_DETAILED_PREFERRED	(1 << 5)
  69/* use +hsync +vsync for detailed mode */
  70#define EDID_QUIRK_DETAILED_SYNC_PP		(1 << 6)
  71/* Force reduced-blanking timings for detailed modes */
  72#define EDID_QUIRK_FORCE_REDUCED_BLANKING	(1 << 7)
  73/* Force 8bpc */
  74#define EDID_QUIRK_FORCE_8BPC			(1 << 8)
  75/* Force 12bpc */
  76#define EDID_QUIRK_FORCE_12BPC			(1 << 9)
  77/* Force 6bpc */
  78#define EDID_QUIRK_FORCE_6BPC			(1 << 10)
  79
  80struct detailed_mode_closure {
  81	struct drm_connector *connector;
  82	struct edid *edid;
  83	bool preferred;
  84	u32 quirks;
  85	int modes;
  86};
  87
  88#define LEVEL_DMT	0
  89#define LEVEL_GTF	1
  90#define LEVEL_GTF2	2
  91#define LEVEL_CVT	3
  92
  93static const struct edid_quirk {
  94	char vendor[4];
  95	int product_id;
  96	u32 quirks;
  97} edid_quirk_list[] = {
  98	/* Acer AL1706 */
  99	{ "ACR", 44358, EDID_QUIRK_PREFER_LARGE_60 },
 100	/* Acer F51 */
 101	{ "API", 0x7602, EDID_QUIRK_PREFER_LARGE_60 },
 102	/* Unknown Acer */
 103	{ "ACR", 2423, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
 104
 105	/* AEO model 0 reports 8 bpc, but is a 6 bpc panel */
 106	{ "AEO", 0, EDID_QUIRK_FORCE_6BPC },
 107
 108	/* Belinea 10 15 55 */
 109	{ "MAX", 1516, EDID_QUIRK_PREFER_LARGE_60 },
 110	{ "MAX", 0x77e, EDID_QUIRK_PREFER_LARGE_60 },
 111
 112	/* Envision Peripherals, Inc. EN-7100e */
 113	{ "EPI", 59264, EDID_QUIRK_135_CLOCK_TOO_HIGH },
 114	/* Envision EN2028 */
 115	{ "EPI", 8232, EDID_QUIRK_PREFER_LARGE_60 },
 116
 117	/* Funai Electronics PM36B */
 118	{ "FCM", 13600, EDID_QUIRK_PREFER_LARGE_75 |
 119	  EDID_QUIRK_DETAILED_IN_CM },
 120
 121	/* LG Philips LCD LP154W01-A5 */
 122	{ "LPL", 0, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
 123	{ "LPL", 0x2a00, EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE },
 124
 125	/* Philips 107p5 CRT */
 126	{ "PHL", 57364, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
 127
 128	/* Proview AY765C */
 129	{ "PTS", 765, EDID_QUIRK_FIRST_DETAILED_PREFERRED },
 130
 131	/* Samsung SyncMaster 205BW.  Note: irony */
 132	{ "SAM", 541, EDID_QUIRK_DETAILED_SYNC_PP },
 133	/* Samsung SyncMaster 22[5-6]BW */
 134	{ "SAM", 596, EDID_QUIRK_PREFER_LARGE_60 },
 135	{ "SAM", 638, EDID_QUIRK_PREFER_LARGE_60 },
 136
 137	/* Sony PVM-2541A does up to 12 bpc, but only reports max 8 bpc */
 138	{ "SNY", 0x2541, EDID_QUIRK_FORCE_12BPC },
 139
 140	/* ViewSonic VA2026w */
 141	{ "VSC", 5020, EDID_QUIRK_FORCE_REDUCED_BLANKING },
 142
 143	/* Medion MD 30217 PG */
 144	{ "MED", 0x7b8, EDID_QUIRK_PREFER_LARGE_75 },
 145
 146	/* Panel in Samsung NP700G7A-S01PL notebook reports 6bpc */
 147	{ "SEC", 0xd033, EDID_QUIRK_FORCE_8BPC },
 148
 149	/* Rotel RSX-1058 forwards sink's EDID but only does HDMI 1.1*/
 150	{ "ETR", 13896, EDID_QUIRK_FORCE_8BPC },
 151};
 152
 153/*
 154 * Autogenerated from the DMT spec.
 155 * This table is copied from xfree86/modes/xf86EdidModes.c.
 156 */
 157static const struct drm_display_mode drm_dmt_modes[] = {
 158	/* 0x01 - 640x350@85Hz */
 159	{ DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 160		   736, 832, 0, 350, 382, 385, 445, 0,
 161		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 162	/* 0x02 - 640x400@85Hz */
 163	{ DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 31500, 640, 672,
 164		   736, 832, 0, 400, 401, 404, 445, 0,
 165		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 166	/* 0x03 - 720x400@85Hz */
 167	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 756,
 168		   828, 936, 0, 400, 401, 404, 446, 0,
 169		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 170	/* 0x04 - 640x480@60Hz */
 171	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 172		   752, 800, 0, 480, 490, 492, 525, 0,
 173		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 174	/* 0x05 - 640x480@72Hz */
 175	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 176		   704, 832, 0, 480, 489, 492, 520, 0,
 177		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 178	/* 0x06 - 640x480@75Hz */
 179	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 180		   720, 840, 0, 480, 481, 484, 500, 0,
 181		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 182	/* 0x07 - 640x480@85Hz */
 183	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 36000, 640, 696,
 184		   752, 832, 0, 480, 481, 484, 509, 0,
 185		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 186	/* 0x08 - 800x600@56Hz */
 187	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 188		   896, 1024, 0, 600, 601, 603, 625, 0,
 189		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 190	/* 0x09 - 800x600@60Hz */
 191	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 192		   968, 1056, 0, 600, 601, 605, 628, 0,
 193		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 194	/* 0x0a - 800x600@72Hz */
 195	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 196		   976, 1040, 0, 600, 637, 643, 666, 0,
 197		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 198	/* 0x0b - 800x600@75Hz */
 199	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 200		   896, 1056, 0, 600, 601, 604, 625, 0,
 201		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 202	/* 0x0c - 800x600@85Hz */
 203	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 56250, 800, 832,
 204		   896, 1048, 0, 600, 601, 604, 631, 0,
 205		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 206	/* 0x0d - 800x600@120Hz RB */
 207	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 73250, 800, 848,
 208		   880, 960, 0, 600, 603, 607, 636, 0,
 209		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 210	/* 0x0e - 848x480@60Hz */
 211	{ DRM_MODE("848x480", DRM_MODE_TYPE_DRIVER, 33750, 848, 864,
 212		   976, 1088, 0, 480, 486, 494, 517, 0,
 213		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 214	/* 0x0f - 1024x768@43Hz, interlace */
 215	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER, 44900, 1024, 1032,
 216		   1208, 1264, 0, 768, 768, 776, 817, 0,
 217		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 218		   DRM_MODE_FLAG_INTERLACE) },
 219	/* 0x10 - 1024x768@60Hz */
 220	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 221		   1184, 1344, 0, 768, 771, 777, 806, 0,
 222		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 223	/* 0x11 - 1024x768@70Hz */
 224	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 225		   1184, 1328, 0, 768, 771, 777, 806, 0,
 226		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 227	/* 0x12 - 1024x768@75Hz */
 228	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 229		   1136, 1312, 0, 768, 769, 772, 800, 0,
 230		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 231	/* 0x13 - 1024x768@85Hz */
 232	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 94500, 1024, 1072,
 233		   1168, 1376, 0, 768, 769, 772, 808, 0,
 234		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 235	/* 0x14 - 1024x768@120Hz RB */
 236	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 115500, 1024, 1072,
 237		   1104, 1184, 0, 768, 771, 775, 813, 0,
 238		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 239	/* 0x15 - 1152x864@75Hz */
 240	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 241		   1344, 1600, 0, 864, 865, 868, 900, 0,
 242		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 243	/* 0x55 - 1280x720@60Hz */
 244	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 245		   1430, 1650, 0, 720, 725, 730, 750, 0,
 246		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 247	/* 0x16 - 1280x768@60Hz RB */
 248	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 68250, 1280, 1328,
 249		   1360, 1440, 0, 768, 771, 778, 790, 0,
 250		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 251	/* 0x17 - 1280x768@60Hz */
 252	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 79500, 1280, 1344,
 253		   1472, 1664, 0, 768, 771, 778, 798, 0,
 254		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 255	/* 0x18 - 1280x768@75Hz */
 256	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 102250, 1280, 1360,
 257		   1488, 1696, 0, 768, 771, 778, 805, 0,
 258		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 259	/* 0x19 - 1280x768@85Hz */
 260	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 117500, 1280, 1360,
 261		   1496, 1712, 0, 768, 771, 778, 809, 0,
 262		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 263	/* 0x1a - 1280x768@120Hz RB */
 264	{ DRM_MODE("1280x768", DRM_MODE_TYPE_DRIVER, 140250, 1280, 1328,
 265		   1360, 1440, 0, 768, 771, 778, 813, 0,
 266		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 267	/* 0x1b - 1280x800@60Hz RB */
 268	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 71000, 1280, 1328,
 269		   1360, 1440, 0, 800, 803, 809, 823, 0,
 270		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 271	/* 0x1c - 1280x800@60Hz */
 272	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 83500, 1280, 1352,
 273		   1480, 1680, 0, 800, 803, 809, 831, 0,
 274		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 275	/* 0x1d - 1280x800@75Hz */
 276	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 106500, 1280, 1360,
 277		   1488, 1696, 0, 800, 803, 809, 838, 0,
 278		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 279	/* 0x1e - 1280x800@85Hz */
 280	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 122500, 1280, 1360,
 281		   1496, 1712, 0, 800, 803, 809, 843, 0,
 282		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 283	/* 0x1f - 1280x800@120Hz RB */
 284	{ DRM_MODE("1280x800", DRM_MODE_TYPE_DRIVER, 146250, 1280, 1328,
 285		   1360, 1440, 0, 800, 803, 809, 847, 0,
 286		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 287	/* 0x20 - 1280x960@60Hz */
 288	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1376,
 289		   1488, 1800, 0, 960, 961, 964, 1000, 0,
 290		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 291	/* 0x21 - 1280x960@85Hz */
 292	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1344,
 293		   1504, 1728, 0, 960, 961, 964, 1011, 0,
 294		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 295	/* 0x22 - 1280x960@120Hz RB */
 296	{ DRM_MODE("1280x960", DRM_MODE_TYPE_DRIVER, 175500, 1280, 1328,
 297		   1360, 1440, 0, 960, 963, 967, 1017, 0,
 298		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 299	/* 0x23 - 1280x1024@60Hz */
 300	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 108000, 1280, 1328,
 301		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
 302		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 303	/* 0x24 - 1280x1024@75Hz */
 304	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 305		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
 306		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 307	/* 0x25 - 1280x1024@85Hz */
 308	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 157500, 1280, 1344,
 309		   1504, 1728, 0, 1024, 1025, 1028, 1072, 0,
 310		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 311	/* 0x26 - 1280x1024@120Hz RB */
 312	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 187250, 1280, 1328,
 313		   1360, 1440, 0, 1024, 1027, 1034, 1084, 0,
 314		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 315	/* 0x27 - 1360x768@60Hz */
 316	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 85500, 1360, 1424,
 317		   1536, 1792, 0, 768, 771, 777, 795, 0,
 318		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 319	/* 0x28 - 1360x768@120Hz RB */
 320	{ DRM_MODE("1360x768", DRM_MODE_TYPE_DRIVER, 148250, 1360, 1408,
 321		   1440, 1520, 0, 768, 771, 776, 813, 0,
 322		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 323	/* 0x51 - 1366x768@60Hz */
 324	{ DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 85500, 1366, 1436,
 325		   1579, 1792, 0, 768, 771, 774, 798, 0,
 326		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 327	/* 0x56 - 1366x768@60Hz */
 328	{ DRM_MODE("1366x768", DRM_MODE_TYPE_DRIVER, 72000, 1366, 1380,
 329		   1436, 1500, 0, 768, 769, 772, 800, 0,
 330		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 331	/* 0x29 - 1400x1050@60Hz RB */
 332	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 101000, 1400, 1448,
 333		   1480, 1560, 0, 1050, 1053, 1057, 1080, 0,
 334		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 335	/* 0x2a - 1400x1050@60Hz */
 336	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 121750, 1400, 1488,
 337		   1632, 1864, 0, 1050, 1053, 1057, 1089, 0,
 338		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 339	/* 0x2b - 1400x1050@75Hz */
 340	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 156000, 1400, 1504,
 341		   1648, 1896, 0, 1050, 1053, 1057, 1099, 0,
 342		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 343	/* 0x2c - 1400x1050@85Hz */
 344	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 179500, 1400, 1504,
 345		   1656, 1912, 0, 1050, 1053, 1057, 1105, 0,
 346		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 347	/* 0x2d - 1400x1050@120Hz RB */
 348	{ DRM_MODE("1400x1050", DRM_MODE_TYPE_DRIVER, 208000, 1400, 1448,
 349		   1480, 1560, 0, 1050, 1053, 1057, 1112, 0,
 350		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 351	/* 0x2e - 1440x900@60Hz RB */
 352	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 88750, 1440, 1488,
 353		   1520, 1600, 0, 900, 903, 909, 926, 0,
 354		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 355	/* 0x2f - 1440x900@60Hz */
 356	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 106500, 1440, 1520,
 357		   1672, 1904, 0, 900, 903, 909, 934, 0,
 358		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 359	/* 0x30 - 1440x900@75Hz */
 360	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 136750, 1440, 1536,
 361		   1688, 1936, 0, 900, 903, 909, 942, 0,
 362		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 363	/* 0x31 - 1440x900@85Hz */
 364	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 157000, 1440, 1544,
 365		   1696, 1952, 0, 900, 903, 909, 948, 0,
 366		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 367	/* 0x32 - 1440x900@120Hz RB */
 368	{ DRM_MODE("1440x900", DRM_MODE_TYPE_DRIVER, 182750, 1440, 1488,
 369		   1520, 1600, 0, 900, 903, 909, 953, 0,
 370		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 371	/* 0x53 - 1600x900@60Hz */
 372	{ DRM_MODE("1600x900", DRM_MODE_TYPE_DRIVER, 108000, 1600, 1624,
 373		   1704, 1800, 0, 900, 901, 904, 1000, 0,
 374		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 375	/* 0x33 - 1600x1200@60Hz */
 376	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 162000, 1600, 1664,
 377		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
 378		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 379	/* 0x34 - 1600x1200@65Hz */
 380	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 175500, 1600, 1664,
 381		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
 382		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 383	/* 0x35 - 1600x1200@70Hz */
 384	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 189000, 1600, 1664,
 385		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
 386		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 387	/* 0x36 - 1600x1200@75Hz */
 388	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 202500, 1600, 1664,
 389		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
 390		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 391	/* 0x37 - 1600x1200@85Hz */
 392	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 229500, 1600, 1664,
 393		   1856, 2160, 0, 1200, 1201, 1204, 1250, 0,
 394		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 395	/* 0x38 - 1600x1200@120Hz RB */
 396	{ DRM_MODE("1600x1200", DRM_MODE_TYPE_DRIVER, 268250, 1600, 1648,
 397		   1680, 1760, 0, 1200, 1203, 1207, 1271, 0,
 398		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 399	/* 0x39 - 1680x1050@60Hz RB */
 400	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 119000, 1680, 1728,
 401		   1760, 1840, 0, 1050, 1053, 1059, 1080, 0,
 402		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 403	/* 0x3a - 1680x1050@60Hz */
 404	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 146250, 1680, 1784,
 405		   1960, 2240, 0, 1050, 1053, 1059, 1089, 0,
 406		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 407	/* 0x3b - 1680x1050@75Hz */
 408	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 187000, 1680, 1800,
 409		   1976, 2272, 0, 1050, 1053, 1059, 1099, 0,
 410		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 411	/* 0x3c - 1680x1050@85Hz */
 412	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 214750, 1680, 1808,
 413		   1984, 2288, 0, 1050, 1053, 1059, 1105, 0,
 414		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 415	/* 0x3d - 1680x1050@120Hz RB */
 416	{ DRM_MODE("1680x1050", DRM_MODE_TYPE_DRIVER, 245500, 1680, 1728,
 417		   1760, 1840, 0, 1050, 1053, 1059, 1112, 0,
 418		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 419	/* 0x3e - 1792x1344@60Hz */
 420	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 204750, 1792, 1920,
 421		   2120, 2448, 0, 1344, 1345, 1348, 1394, 0,
 422		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 423	/* 0x3f - 1792x1344@75Hz */
 424	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 261000, 1792, 1888,
 425		   2104, 2456, 0, 1344, 1345, 1348, 1417, 0,
 426		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 427	/* 0x40 - 1792x1344@120Hz RB */
 428	{ DRM_MODE("1792x1344", DRM_MODE_TYPE_DRIVER, 333250, 1792, 1840,
 429		   1872, 1952, 0, 1344, 1347, 1351, 1423, 0,
 430		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 431	/* 0x41 - 1856x1392@60Hz */
 432	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 218250, 1856, 1952,
 433		   2176, 2528, 0, 1392, 1393, 1396, 1439, 0,
 434		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 435	/* 0x42 - 1856x1392@75Hz */
 436	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 288000, 1856, 1984,
 437		   2208, 2560, 0, 1392, 1393, 1396, 1500, 0,
 438		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 439	/* 0x43 - 1856x1392@120Hz RB */
 440	{ DRM_MODE("1856x1392", DRM_MODE_TYPE_DRIVER, 356500, 1856, 1904,
 441		   1936, 2016, 0, 1392, 1395, 1399, 1474, 0,
 442		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 443	/* 0x52 - 1920x1080@60Hz */
 444	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 445		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
 446		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) },
 447	/* 0x44 - 1920x1200@60Hz RB */
 448	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 154000, 1920, 1968,
 449		   2000, 2080, 0, 1200, 1203, 1209, 1235, 0,
 450		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 451	/* 0x45 - 1920x1200@60Hz */
 452	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 193250, 1920, 2056,
 453		   2256, 2592, 0, 1200, 1203, 1209, 1245, 0,
 454		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 455	/* 0x46 - 1920x1200@75Hz */
 456	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 245250, 1920, 2056,
 457		   2264, 2608, 0, 1200, 1203, 1209, 1255, 0,
 458		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 459	/* 0x47 - 1920x1200@85Hz */
 460	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 281250, 1920, 2064,
 461		   2272, 2624, 0, 1200, 1203, 1209, 1262, 0,
 462		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 463	/* 0x48 - 1920x1200@120Hz RB */
 464	{ DRM_MODE("1920x1200", DRM_MODE_TYPE_DRIVER, 317000, 1920, 1968,
 465		   2000, 2080, 0, 1200, 1203, 1209, 1271, 0,
 466		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 467	/* 0x49 - 1920x1440@60Hz */
 468	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 234000, 1920, 2048,
 469		   2256, 2600, 0, 1440, 1441, 1444, 1500, 0,
 470		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 471	/* 0x4a - 1920x1440@75Hz */
 472	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2064,
 473		   2288, 2640, 0, 1440, 1441, 1444, 1500, 0,
 474		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 475	/* 0x4b - 1920x1440@120Hz RB */
 476	{ DRM_MODE("1920x1440", DRM_MODE_TYPE_DRIVER, 380500, 1920, 1968,
 477		   2000, 2080, 0, 1440, 1443, 1447, 1525, 0,
 478		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 479	/* 0x54 - 2048x1152@60Hz */
 480	{ DRM_MODE("2048x1152", DRM_MODE_TYPE_DRIVER, 162000, 2048, 2074,
 481		   2154, 2250, 0, 1152, 1153, 1156, 1200, 0,
 482		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
 483	/* 0x4c - 2560x1600@60Hz RB */
 484	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 268500, 2560, 2608,
 485		   2640, 2720, 0, 1600, 1603, 1609, 1646, 0,
 486		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 487	/* 0x4d - 2560x1600@60Hz */
 488	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 348500, 2560, 2752,
 489		   3032, 3504, 0, 1600, 1603, 1609, 1658, 0,
 490		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 491	/* 0x4e - 2560x1600@75Hz */
 492	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 443250, 2560, 2768,
 493		   3048, 3536, 0, 1600, 1603, 1609, 1672, 0,
 494		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 495	/* 0x4f - 2560x1600@85Hz */
 496	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 505250, 2560, 2768,
 497		   3048, 3536, 0, 1600, 1603, 1609, 1682, 0,
 498		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) },
 499	/* 0x50 - 2560x1600@120Hz RB */
 500	{ DRM_MODE("2560x1600", DRM_MODE_TYPE_DRIVER, 552750, 2560, 2608,
 501		   2640, 2720, 0, 1600, 1603, 1609, 1694, 0,
 502		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 503	/* 0x57 - 4096x2160@60Hz RB */
 504	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556744, 4096, 4104,
 505		   4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
 506		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 507	/* 0x58 - 4096x2160@59.94Hz RB */
 508	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 556188, 4096, 4104,
 509		   4136, 4176, 0, 2160, 2208, 2216, 2222, 0,
 510		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC) },
 511};
 512
 513/*
 514 * These more or less come from the DMT spec.  The 720x400 modes are
 515 * inferred from historical 80x25 practice.  The 640x480@67 and 832x624@75
 516 * modes are old-school Mac modes.  The EDID spec says the 1152x864@75 mode
 517 * should be 1152x870, again for the Mac, but instead we use the x864 DMT
 518 * mode.
 519 *
 520 * The DMT modes have been fact-checked; the rest are mild guesses.
 521 */
 522static const struct drm_display_mode edid_est_modes[] = {
 523	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 40000, 800, 840,
 524		   968, 1056, 0, 600, 601, 605, 628, 0,
 525		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@60Hz */
 526	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 36000, 800, 824,
 527		   896, 1024, 0, 600, 601, 603,  625, 0,
 528		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@56Hz */
 529	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 656,
 530		   720, 840, 0, 480, 481, 484, 500, 0,
 531		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@75Hz */
 532	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 31500, 640, 664,
 533		   704,  832, 0, 480, 489, 492, 520, 0,
 534		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@72Hz */
 535	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 30240, 640, 704,
 536		   768,  864, 0, 480, 483, 486, 525, 0,
 537		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@67Hz */
 538	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 539		   752, 800, 0, 480, 490, 492, 525, 0,
 540		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 640x480@60Hz */
 541	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 35500, 720, 738,
 542		   846, 900, 0, 400, 421, 423,  449, 0,
 543		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 720x400@88Hz */
 544	{ DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 28320, 720, 738,
 545		   846,  900, 0, 400, 412, 414, 449, 0,
 546		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 720x400@70Hz */
 547	{ DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 135000, 1280, 1296,
 548		   1440, 1688, 0, 1024, 1025, 1028, 1066, 0,
 549		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1280x1024@75Hz */
 550	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 78750, 1024, 1040,
 551		   1136, 1312, 0,  768, 769, 772, 800, 0,
 552		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1024x768@75Hz */
 553	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 75000, 1024, 1048,
 554		   1184, 1328, 0,  768, 771, 777, 806, 0,
 555		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@70Hz */
 556	{ DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 65000, 1024, 1048,
 557		   1184, 1344, 0,  768, 771, 777, 806, 0,
 558		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 1024x768@60Hz */
 559	{ DRM_MODE("1024x768i", DRM_MODE_TYPE_DRIVER,44900, 1024, 1032,
 560		   1208, 1264, 0, 768, 768, 776, 817, 0,
 561		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC | DRM_MODE_FLAG_INTERLACE) }, /* 1024x768@43Hz */
 562	{ DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 57284, 832, 864,
 563		   928, 1152, 0, 624, 625, 628, 667, 0,
 564		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC) }, /* 832x624@75Hz */
 565	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 49500, 800, 816,
 566		   896, 1056, 0, 600, 601, 604,  625, 0,
 567		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@75Hz */
 568	{ DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 50000, 800, 856,
 569		   976, 1040, 0, 600, 637, 643, 666, 0,
 570		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 800x600@72Hz */
 571	{ DRM_MODE("1152x864", DRM_MODE_TYPE_DRIVER, 108000, 1152, 1216,
 572		   1344, 1600, 0,  864, 865, 868, 900, 0,
 573		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) }, /* 1152x864@75Hz */
 574};
 575
 576struct minimode {
 577	short w;
 578	short h;
 579	short r;
 580	short rb;
 581};
 582
 583static const struct minimode est3_modes[] = {
 584	/* byte 6 */
 585	{ 640, 350, 85, 0 },
 586	{ 640, 400, 85, 0 },
 587	{ 720, 400, 85, 0 },
 588	{ 640, 480, 85, 0 },
 589	{ 848, 480, 60, 0 },
 590	{ 800, 600, 85, 0 },
 591	{ 1024, 768, 85, 0 },
 592	{ 1152, 864, 75, 0 },
 593	/* byte 7 */
 594	{ 1280, 768, 60, 1 },
 595	{ 1280, 768, 60, 0 },
 596	{ 1280, 768, 75, 0 },
 597	{ 1280, 768, 85, 0 },
 598	{ 1280, 960, 60, 0 },
 599	{ 1280, 960, 85, 0 },
 600	{ 1280, 1024, 60, 0 },
 601	{ 1280, 1024, 85, 0 },
 602	/* byte 8 */
 603	{ 1360, 768, 60, 0 },
 604	{ 1440, 900, 60, 1 },
 605	{ 1440, 900, 60, 0 },
 606	{ 1440, 900, 75, 0 },
 607	{ 1440, 900, 85, 0 },
 608	{ 1400, 1050, 60, 1 },
 609	{ 1400, 1050, 60, 0 },
 610	{ 1400, 1050, 75, 0 },
 611	/* byte 9 */
 612	{ 1400, 1050, 85, 0 },
 613	{ 1680, 1050, 60, 1 },
 614	{ 1680, 1050, 60, 0 },
 615	{ 1680, 1050, 75, 0 },
 616	{ 1680, 1050, 85, 0 },
 617	{ 1600, 1200, 60, 0 },
 618	{ 1600, 1200, 65, 0 },
 619	{ 1600, 1200, 70, 0 },
 620	/* byte 10 */
 621	{ 1600, 1200, 75, 0 },
 622	{ 1600, 1200, 85, 0 },
 623	{ 1792, 1344, 60, 0 },
 624	{ 1792, 1344, 75, 0 },
 625	{ 1856, 1392, 60, 0 },
 626	{ 1856, 1392, 75, 0 },
 627	{ 1920, 1200, 60, 1 },
 628	{ 1920, 1200, 60, 0 },
 629	/* byte 11 */
 630	{ 1920, 1200, 75, 0 },
 631	{ 1920, 1200, 85, 0 },
 632	{ 1920, 1440, 60, 0 },
 633	{ 1920, 1440, 75, 0 },
 634};
 635
 636static const struct minimode extra_modes[] = {
 637	{ 1024, 576,  60, 0 },
 638	{ 1366, 768,  60, 0 },
 639	{ 1600, 900,  60, 0 },
 640	{ 1680, 945,  60, 0 },
 641	{ 1920, 1080, 60, 0 },
 642	{ 2048, 1152, 60, 0 },
 643	{ 2048, 1536, 60, 0 },
 644};
 645
 646/*
 647 * Probably taken from CEA-861 spec.
 648 * This table is converted from xorg's hw/xfree86/modes/xf86EdidModes.c.
 649 *
 650 * Index using the VIC.
 651 */
 652static const struct drm_display_mode edid_cea_modes[] = {
 653	/* 0 - dummy, VICs start at 1 */
 654	{ },
 655	/* 1 - 640x480@60Hz */
 656	{ DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 25175, 640, 656,
 657		   752, 800, 0, 480, 490, 492, 525, 0,
 658		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 659	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 660	/* 2 - 720x480@60Hz */
 661	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 662		   798, 858, 0, 480, 489, 495, 525, 0,
 663		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 664	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 665	/* 3 - 720x480@60Hz */
 666	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 27000, 720, 736,
 667		   798, 858, 0, 480, 489, 495, 525, 0,
 668		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 669	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 670	/* 4 - 1280x720@60Hz */
 671	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1390,
 672		   1430, 1650, 0, 720, 725, 730, 750, 0,
 673		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 674	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 675	/* 5 - 1920x1080i@60Hz */
 676	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 677		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
 678		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 679			DRM_MODE_FLAG_INTERLACE),
 680	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 681	/* 6 - 720(1440)x480i@60Hz */
 682	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 683		   801, 858, 0, 480, 488, 494, 525, 0,
 684		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 685			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 686	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 687	/* 7 - 720(1440)x480i@60Hz */
 688	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 689		   801, 858, 0, 480, 488, 494, 525, 0,
 690		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 691			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 692	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 693	/* 8 - 720(1440)x240@60Hz */
 694	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 695		   801, 858, 0, 240, 244, 247, 262, 0,
 696		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 697			DRM_MODE_FLAG_DBLCLK),
 698	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 699	/* 9 - 720(1440)x240@60Hz */
 700	{ DRM_MODE("720x240", DRM_MODE_TYPE_DRIVER, 13500, 720, 739,
 701		   801, 858, 0, 240, 244, 247, 262, 0,
 702		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 703			DRM_MODE_FLAG_DBLCLK),
 704	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 705	/* 10 - 2880x480i@60Hz */
 706	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 707		   3204, 3432, 0, 480, 488, 494, 525, 0,
 708		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 709			DRM_MODE_FLAG_INTERLACE),
 710	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 711	/* 11 - 2880x480i@60Hz */
 712	{ DRM_MODE("2880x480i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 713		   3204, 3432, 0, 480, 488, 494, 525, 0,
 714		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 715			DRM_MODE_FLAG_INTERLACE),
 716	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 717	/* 12 - 2880x240@60Hz */
 718	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 719		   3204, 3432, 0, 240, 244, 247, 262, 0,
 720		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 721	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 722	/* 13 - 2880x240@60Hz */
 723	{ DRM_MODE("2880x240", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2956,
 724		   3204, 3432, 0, 240, 244, 247, 262, 0,
 725		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 726	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 727	/* 14 - 1440x480@60Hz */
 728	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 729		   1596, 1716, 0, 480, 489, 495, 525, 0,
 730		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 731	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 732	/* 15 - 1440x480@60Hz */
 733	{ DRM_MODE("1440x480", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1472,
 734		   1596, 1716, 0, 480, 489, 495, 525, 0,
 735		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 736	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 737	/* 16 - 1920x1080@60Hz */
 738	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 739		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
 740		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 741	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 742	/* 17 - 720x576@50Hz */
 743	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 744		   796, 864, 0, 576, 581, 586, 625, 0,
 745		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 746	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 747	/* 18 - 720x576@50Hz */
 748	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 749		   796, 864, 0, 576, 581, 586, 625, 0,
 750		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 751	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 752	/* 19 - 1280x720@50Hz */
 753	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 1720,
 754		   1760, 1980, 0, 720, 725, 730, 750, 0,
 755		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 756	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 757	/* 20 - 1920x1080i@50Hz */
 758	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 759		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
 760		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 761			DRM_MODE_FLAG_INTERLACE),
 762	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 763	/* 21 - 720(1440)x576i@50Hz */
 764	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 765		   795, 864, 0, 576, 580, 586, 625, 0,
 766		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 767			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 768	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 769	/* 22 - 720(1440)x576i@50Hz */
 770	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 771		   795, 864, 0, 576, 580, 586, 625, 0,
 772		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 773			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 774	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 775	/* 23 - 720(1440)x288@50Hz */
 776	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 777		   795, 864, 0, 288, 290, 293, 312, 0,
 778		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 779			DRM_MODE_FLAG_DBLCLK),
 780	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 781	/* 24 - 720(1440)x288@50Hz */
 782	{ DRM_MODE("720x288", DRM_MODE_TYPE_DRIVER, 13500, 720, 732,
 783		   795, 864, 0, 288, 290, 293, 312, 0,
 784		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 785			DRM_MODE_FLAG_DBLCLK),
 786	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 787	/* 25 - 2880x576i@50Hz */
 788	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 789		   3180, 3456, 0, 576, 580, 586, 625, 0,
 790		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 791			DRM_MODE_FLAG_INTERLACE),
 792	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 793	/* 26 - 2880x576i@50Hz */
 794	{ DRM_MODE("2880x576i", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 795		   3180, 3456, 0, 576, 580, 586, 625, 0,
 796		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 797			DRM_MODE_FLAG_INTERLACE),
 798	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 799	/* 27 - 2880x288@50Hz */
 800	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 801		   3180, 3456, 0, 288, 290, 293, 312, 0,
 802		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 803	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 804	/* 28 - 2880x288@50Hz */
 805	{ DRM_MODE("2880x288", DRM_MODE_TYPE_DRIVER, 54000, 2880, 2928,
 806		   3180, 3456, 0, 288, 290, 293, 312, 0,
 807		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 808	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 809	/* 29 - 1440x576@50Hz */
 810	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 811		   1592, 1728, 0, 576, 581, 586, 625, 0,
 812		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 813	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 814	/* 30 - 1440x576@50Hz */
 815	{ DRM_MODE("1440x576", DRM_MODE_TYPE_DRIVER, 54000, 1440, 1464,
 816		   1592, 1728, 0, 576, 581, 586, 625, 0,
 817		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 818	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 819	/* 31 - 1920x1080@50Hz */
 820	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 821		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
 822		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 823	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 824	/* 32 - 1920x1080@24Hz */
 825	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2558,
 826		   2602, 2750, 0, 1080, 1084, 1089, 1125, 0,
 827		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 828	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 829	/* 33 - 1920x1080@25Hz */
 830	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2448,
 831		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
 832		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 833	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 834	/* 34 - 1920x1080@30Hz */
 835	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 74250, 1920, 2008,
 836		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
 837		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 838	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 839	/* 35 - 2880x480@60Hz */
 840	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 841		   3192, 3432, 0, 480, 489, 495, 525, 0,
 842		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 843	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 844	/* 36 - 2880x480@60Hz */
 845	{ DRM_MODE("2880x480", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2944,
 846		   3192, 3432, 0, 480, 489, 495, 525, 0,
 847		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 848	  .vrefresh = 60, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 849	/* 37 - 2880x576@50Hz */
 850	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 851		   3184, 3456, 0, 576, 581, 586, 625, 0,
 852		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 853	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 854	/* 38 - 2880x576@50Hz */
 855	{ DRM_MODE("2880x576", DRM_MODE_TYPE_DRIVER, 108000, 2880, 2928,
 856		   3184, 3456, 0, 576, 581, 586, 625, 0,
 857		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 858	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 859	/* 39 - 1920x1080i@50Hz */
 860	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 72000, 1920, 1952,
 861		   2120, 2304, 0, 1080, 1126, 1136, 1250, 0,
 862		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC |
 863			DRM_MODE_FLAG_INTERLACE),
 864	  .vrefresh = 50, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 865	/* 40 - 1920x1080i@100Hz */
 866	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2448,
 867		   2492, 2640, 0, 1080, 1084, 1094, 1125, 0,
 868		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 869			DRM_MODE_FLAG_INTERLACE),
 870	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 871	/* 41 - 1280x720@100Hz */
 872	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1720,
 873		   1760, 1980, 0, 720, 725, 730, 750, 0,
 874		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 875	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 876	/* 42 - 720x576@100Hz */
 877	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 878		   796, 864, 0, 576, 581, 586, 625, 0,
 879		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 880	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 881	/* 43 - 720x576@100Hz */
 882	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 883		   796, 864, 0, 576, 581, 586, 625, 0,
 884		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 885	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 886	/* 44 - 720(1440)x576i@100Hz */
 887	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 888		   795, 864, 0, 576, 580, 586, 625, 0,
 889		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 890			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 891	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 892	/* 45 - 720(1440)x576i@100Hz */
 893	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 27000, 720, 732,
 894		   795, 864, 0, 576, 580, 586, 625, 0,
 895		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 896			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 897	  .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 898	/* 46 - 1920x1080i@120Hz */
 899	{ DRM_MODE("1920x1080i", DRM_MODE_TYPE_DRIVER, 148500, 1920, 2008,
 900		   2052, 2200, 0, 1080, 1084, 1094, 1125, 0,
 901		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC |
 902			DRM_MODE_FLAG_INTERLACE),
 903	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 904	/* 47 - 1280x720@120Hz */
 905	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 148500, 1280, 1390,
 906		   1430, 1650, 0, 720, 725, 730, 750, 0,
 907		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 908	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 909	/* 48 - 720x480@120Hz */
 910	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 911		   798, 858, 0, 480, 489, 495, 525, 0,
 912		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 913	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 914	/* 49 - 720x480@120Hz */
 915	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 54000, 720, 736,
 916		   798, 858, 0, 480, 489, 495, 525, 0,
 917		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 918	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 919	/* 50 - 720(1440)x480i@120Hz */
 920	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 921		   801, 858, 0, 480, 488, 494, 525, 0,
 922		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 923			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 924	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 925	/* 51 - 720(1440)x480i@120Hz */
 926	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 27000, 720, 739,
 927		   801, 858, 0, 480, 488, 494, 525, 0,
 928		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 929			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 930	  .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 931	/* 52 - 720x576@200Hz */
 932	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 933		   796, 864, 0, 576, 581, 586, 625, 0,
 934		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 935	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 936	/* 53 - 720x576@200Hz */
 937	{ DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 108000, 720, 732,
 938		   796, 864, 0, 576, 581, 586, 625, 0,
 939		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 940	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 941	/* 54 - 720(1440)x576i@200Hz */
 942	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 943		   795, 864, 0, 576, 580, 586, 625, 0,
 944		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 945			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 946	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 947	/* 55 - 720(1440)x576i@200Hz */
 948	{ DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 54000, 720, 732,
 949		   795, 864, 0, 576, 580, 586, 625, 0,
 950		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 951			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 952	  .vrefresh = 200, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 953	/* 56 - 720x480@240Hz */
 954	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 955		   798, 858, 0, 480, 489, 495, 525, 0,
 956		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 957	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 958	/* 57 - 720x480@240Hz */
 959	{ DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 108000, 720, 736,
 960		   798, 858, 0, 480, 489, 495, 525, 0,
 961		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC),
 962	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 963	/* 58 - 720(1440)x480i@240Hz */
 964	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 965		   801, 858, 0, 480, 488, 494, 525, 0,
 966		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 967			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 968	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_4_3, },
 969	/* 59 - 720(1440)x480i@240Hz */
 970	{ DRM_MODE("720x480i", DRM_MODE_TYPE_DRIVER, 54000, 720, 739,
 971		   801, 858, 0, 480, 488, 494, 525, 0,
 972		   DRM_MODE_FLAG_NHSYNC | DRM_MODE_FLAG_NVSYNC |
 973			DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_DBLCLK),
 974	  .vrefresh = 240, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 975	/* 60 - 1280x720@24Hz */
 976	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 59400, 1280, 3040,
 977		   3080, 3300, 0, 720, 725, 730, 750, 0,
 978		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 979	  .vrefresh = 24, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 980	/* 61 - 1280x720@25Hz */
 981	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3700,
 982		   3740, 3960, 0, 720, 725, 730, 750, 0,
 983		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 984	  .vrefresh = 25, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 985	/* 62 - 1280x720@30Hz */
 986	{ DRM_MODE("1280x720", DRM_MODE_TYPE_DRIVER, 74250, 1280, 3040,
 987		   3080, 3300, 0, 720, 725, 730, 750, 0,
 988		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 989	  .vrefresh = 30, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 990	/* 63 - 1920x1080@120Hz */
 991	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2008,
 992		   2052, 2200, 0, 1080, 1084, 1089, 1125, 0,
 993		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 994	 .vrefresh = 120, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
 995	/* 64 - 1920x1080@100Hz */
 996	{ DRM_MODE("1920x1080", DRM_MODE_TYPE_DRIVER, 297000, 1920, 2448,
 997		   2492, 2640, 0, 1080, 1084, 1089, 1125, 0,
 998		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
 999	 .vrefresh = 100, .picture_aspect_ratio = HDMI_PICTURE_ASPECT_16_9, },
1000};
1001
1002/*
1003 * HDMI 1.4 4k modes. Index using the VIC.
1004 */
1005static const struct drm_display_mode edid_4k_modes[] = {
1006	/* 0 - dummy, VICs start at 1 */
1007	{ },
1008	/* 1 - 3840x2160@30Hz */
1009	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1010		   3840, 4016, 4104, 4400, 0,
1011		   2160, 2168, 2178, 2250, 0,
1012		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1013	  .vrefresh = 30, },
1014	/* 2 - 3840x2160@25Hz */
1015	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1016		   3840, 4896, 4984, 5280, 0,
1017		   2160, 2168, 2178, 2250, 0,
1018		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1019	  .vrefresh = 25, },
1020	/* 3 - 3840x2160@24Hz */
1021	{ DRM_MODE("3840x2160", DRM_MODE_TYPE_DRIVER, 297000,
1022		   3840, 5116, 5204, 5500, 0,
1023		   2160, 2168, 2178, 2250, 0,
1024		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1025	  .vrefresh = 24, },
1026	/* 4 - 4096x2160@24Hz (SMPTE) */
1027	{ DRM_MODE("4096x2160", DRM_MODE_TYPE_DRIVER, 297000,
1028		   4096, 5116, 5204, 5500, 0,
1029		   2160, 2168, 2178, 2250, 0,
1030		   DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC),
1031	  .vrefresh = 24, },
1032};
1033
1034/*** DDC fetch and block validation ***/
1035
1036static const u8 edid_header[] = {
1037	0x00, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x00
1038};
1039
1040/**
1041 * drm_edid_header_is_valid - sanity check the header of the base EDID block
1042 * @raw_edid: pointer to raw base EDID block
1043 *
1044 * Sanity check the header of the base EDID block.
1045 *
1046 * Return: 8 if the header is perfect, down to 0 if it's totally wrong.
1047 */
1048int drm_edid_header_is_valid(const u8 *raw_edid)
1049{
1050	int i, score = 0;
1051
1052	for (i = 0; i < sizeof(edid_header); i++)
1053		if (raw_edid[i] == edid_header[i])
1054			score++;
1055
1056	return score;
1057}
1058EXPORT_SYMBOL(drm_edid_header_is_valid);
1059
1060static int edid_fixup __read_mostly = 6;
1061module_param_named(edid_fixup, edid_fixup, int, 0400);
1062MODULE_PARM_DESC(edid_fixup,
1063		 "Minimum number of valid EDID header bytes (0-8, default 6)");
1064
1065static void drm_get_displayid(struct drm_connector *connector,
1066			      struct edid *edid);
1067
1068static int drm_edid_block_checksum(const u8 *raw_edid)
 
 
1069{
1070	int i;
1071	u8 csum = 0;
1072	for (i = 0; i < EDID_LENGTH; i++)
1073		csum += raw_edid[i];
1074
1075	return csum;
1076}
1077
1078static bool drm_edid_is_zero(const u8 *in_edid, int length)
1079{
1080	if (memchr_inv(in_edid, 0, length))
1081		return false;
1082
1083	return true;
1084}
1085
1086/**
1087 * drm_edid_block_valid - Sanity check the EDID block (base or extension)
1088 * @raw_edid: pointer to raw EDID block
1089 * @block: type of block to validate (0 for base, extension otherwise)
1090 * @print_bad_edid: if true, dump bad EDID blocks to the console
1091 * @edid_corrupt: if true, the header or checksum is invalid
1092 *
1093 * Validate a base or extension EDID block and optionally dump bad blocks to
1094 * the console.
1095 *
1096 * Return: True if the block is valid, false otherwise.
1097 */
1098bool drm_edid_block_valid(u8 *raw_edid, int block, bool print_bad_edid,
1099			  bool *edid_corrupt)
1100{
1101	u8 csum;
1102	struct edid *edid = (struct edid *)raw_edid;
1103
1104	if (WARN_ON(!raw_edid))
1105		return false;
1106
1107	if (edid_fixup > 8 || edid_fixup < 0)
1108		edid_fixup = 6;
1109
1110	if (block == 0) {
1111		int score = drm_edid_header_is_valid(raw_edid);
1112		if (score == 8) {
1113			if (edid_corrupt)
1114				*edid_corrupt = false;
1115		} else if (score >= edid_fixup) {
1116			/* Displayport Link CTS Core 1.2 rev1.1 test 4.2.2.6
1117			 * The corrupt flag needs to be set here otherwise, the
1118			 * fix-up code here will correct the problem, the
1119			 * checksum is correct and the test fails
1120			 */
1121			if (edid_corrupt)
1122				*edid_corrupt = true;
1123			DRM_DEBUG("Fixing EDID header, your hardware may be failing\n");
1124			memcpy(raw_edid, edid_header, sizeof(edid_header));
1125		} else {
1126			if (edid_corrupt)
1127				*edid_corrupt = true;
1128			goto bad;
1129		}
1130	}
1131
1132	csum = drm_edid_block_checksum(raw_edid);
 
1133	if (csum) {
1134		if (print_bad_edid) {
1135			DRM_ERROR("EDID checksum is invalid, remainder is %d\n", csum);
1136		}
1137
1138		if (edid_corrupt)
1139			*edid_corrupt = true;
1140
1141		/* allow CEA to slide through, switches mangle this */
1142		if (raw_edid[0] != 0x02)
1143			goto bad;
1144	}
1145
1146	/* per-block-type checks */
1147	switch (raw_edid[0]) {
1148	case 0: /* base */
1149		if (edid->version != 1) {
1150			DRM_ERROR("EDID has major version %d, instead of 1\n", edid->version);
1151			goto bad;
1152		}
1153
1154		if (edid->revision > 4)
1155			DRM_DEBUG("EDID minor > 4, assuming backward compatibility\n");
1156		break;
1157
1158	default:
1159		break;
1160	}
1161
1162	return true;
1163
1164bad:
1165	if (print_bad_edid) {
1166		if (drm_edid_is_zero(raw_edid, EDID_LENGTH)) {
1167			printk(KERN_ERR "EDID block is all zeroes\n");
1168		} else {
1169			printk(KERN_ERR "Raw EDID:\n");
1170			print_hex_dump(KERN_ERR, " \t", DUMP_PREFIX_NONE, 16, 1,
1171			       raw_edid, EDID_LENGTH, false);
1172		}
1173	}
1174	return false;
1175}
1176EXPORT_SYMBOL(drm_edid_block_valid);
1177
1178/**
1179 * drm_edid_is_valid - sanity check EDID data
1180 * @edid: EDID data
1181 *
1182 * Sanity-check an entire EDID record (including extensions)
1183 *
1184 * Return: True if the EDID data is valid, false otherwise.
1185 */
1186bool drm_edid_is_valid(struct edid *edid)
1187{
1188	int i;
1189	u8 *raw = (u8 *)edid;
1190
1191	if (!edid)
1192		return false;
1193
1194	for (i = 0; i <= edid->extensions; i++)
1195		if (!drm_edid_block_valid(raw + i * EDID_LENGTH, i, true, NULL))
1196			return false;
1197
1198	return true;
1199}
1200EXPORT_SYMBOL(drm_edid_is_valid);
1201
 
1202#define DDC_SEGMENT_ADDR 0x30
1203/**
1204 * drm_do_probe_ddc_edid() - get EDID information via I2C
1205 * @data: I2C device adapter
1206 * @buf: EDID data buffer to be filled
1207 * @block: 128 byte EDID block to start fetching from
1208 * @len: EDID data buffer length to fetch
1209 *
1210 * Try to fetch EDID information by calling I2C driver functions.
 
 
 
1211 *
1212 * Return: 0 on success or -1 on failure.
1213 */
1214static int
1215drm_do_probe_ddc_edid(void *data, u8 *buf, unsigned int block, size_t len)
 
1216{
1217	struct i2c_adapter *adapter = data;
1218	unsigned char start = block * EDID_LENGTH;
1219	unsigned char segment = block >> 1;
1220	unsigned char xfers = segment ? 3 : 2;
1221	int ret, retries = 5;
1222
1223	/*
1224	 * The core I2C driver will automatically retry the transfer if the
1225	 * adapter reports EAGAIN. However, we find that bit-banging transfers
1226	 * are susceptible to errors under a heavily loaded machine and
1227	 * generate spurious NAKs and timeouts. Retrying the transfer
1228	 * of the individual block a few times seems to overcome this.
1229	 */
1230	do {
1231		struct i2c_msg msgs[] = {
1232			{
1233				.addr	= DDC_SEGMENT_ADDR,
1234				.flags	= 0,
1235				.len	= 1,
1236				.buf	= &segment,
1237			}, {
1238				.addr	= DDC_ADDR,
1239				.flags	= 0,
1240				.len	= 1,
1241				.buf	= &start,
1242			}, {
1243				.addr	= DDC_ADDR,
1244				.flags	= I2C_M_RD,
1245				.len	= len,
1246				.buf	= buf,
1247			}
1248		};
 
 
1249
1250		/*
1251		 * Avoid sending the segment addr to not upset non-compliant
1252		 * DDC monitors.
1253		 */
1254		ret = i2c_transfer(adapter, &msgs[3 - xfers], xfers);
1255
1256		if (ret == -ENXIO) {
1257			DRM_DEBUG_KMS("drm: skipping non-existent adapter %s\n",
1258					adapter->name);
1259			break;
1260		}
1261	} while (ret != xfers && --retries);
1262
1263	return ret == xfers ? 0 : -1;
1264}
1265
1266static void connector_bad_edid(struct drm_connector *connector,
1267			       u8 *edid, int num_blocks)
1268{
1269	int i;
 
1270
1271	if (connector->bad_edid_counter++ && !(drm_debug & DRM_UT_KMS))
1272		return;
1273
1274	dev_warn(connector->dev->dev,
1275		 "%s: EDID is invalid:\n",
1276		 connector->name);
1277	for (i = 0; i < num_blocks; i++) {
1278		u8 *block = edid + i * EDID_LENGTH;
1279		char prefix[20];
1280
1281		if (drm_edid_is_zero(block, EDID_LENGTH))
1282			sprintf(prefix, "\t[%02x] ZERO ", i);
1283		else if (!drm_edid_block_valid(block, i, false, NULL))
1284			sprintf(prefix, "\t[%02x] BAD  ", i);
1285		else
1286			sprintf(prefix, "\t[%02x] GOOD ", i);
1287
1288		print_hex_dump(KERN_WARNING,
1289			       prefix, DUMP_PREFIX_NONE, 16, 1,
1290			       block, EDID_LENGTH, false);
1291	}
1292}
1293
1294/**
1295 * drm_do_get_edid - get EDID data using a custom EDID block read function
1296 * @connector: connector we're probing
1297 * @get_edid_block: EDID block read function
1298 * @data: private data passed to the block read function
1299 *
1300 * When the I2C adapter connected to the DDC bus is hidden behind a device that
1301 * exposes a different interface to read EDID blocks this function can be used
1302 * to get EDID data using a custom block read function.
1303 *
1304 * As in the general case the DDC bus is accessible by the kernel at the I2C
1305 * level, drivers must make all reasonable efforts to expose it as an I2C
1306 * adapter and use drm_get_edid() instead of abusing this function.
1307 *
1308 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1309 */
1310struct edid *drm_do_get_edid(struct drm_connector *connector,
1311	int (*get_edid_block)(void *data, u8 *buf, unsigned int block,
1312			      size_t len),
1313	void *data)
1314{
1315	int i, j = 0, valid_extensions = 0;
1316	u8 *edid, *new;
1317
1318	if ((edid = kmalloc(EDID_LENGTH, GFP_KERNEL)) == NULL)
1319		return NULL;
1320
1321	/* base block fetch */
1322	for (i = 0; i < 4; i++) {
1323		if (get_edid_block(data, edid, 0, EDID_LENGTH))
1324			goto out;
1325		if (drm_edid_block_valid(edid, 0, false,
1326					 &connector->edid_corrupt))
1327			break;
1328		if (i == 0 && drm_edid_is_zero(edid, EDID_LENGTH)) {
1329			connector->null_edid_counter++;
1330			goto carp;
1331		}
1332	}
1333	if (i == 4)
1334		goto carp;
1335
1336	/* if there's no extensions, we're done */
1337	valid_extensions = edid[0x7e];
1338	if (valid_extensions == 0)
1339		return (struct edid *)edid;
1340
1341	new = krealloc(edid, (valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1342	if (!new)
1343		goto out;
1344	edid = new;
1345
1346	for (j = 1; j <= edid[0x7e]; j++) {
1347		u8 *block = edid + j * EDID_LENGTH;
1348
 
1349		for (i = 0; i < 4; i++) {
1350			if (get_edid_block(data, block, j, EDID_LENGTH))
 
 
1351				goto out;
1352			if (drm_edid_block_valid(block, j, false, NULL))
 
1353				break;
 
1354		}
1355
1356		if (i == 4)
1357			valid_extensions--;
 
 
1358	}
1359
1360	if (valid_extensions != edid[0x7e]) {
1361		u8 *base;
1362
1363		connector_bad_edid(connector, edid, edid[0x7e] + 1);
1364
1365		edid[EDID_LENGTH-1] += edid[0x7e] - valid_extensions;
1366		edid[0x7e] = valid_extensions;
1367
1368		new = kmalloc((valid_extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1369		if (!new)
1370			goto out;
1371
1372		base = new;
1373		for (i = 0; i <= edid[0x7e]; i++) {
1374			u8 *block = edid + i * EDID_LENGTH;
1375
1376			if (!drm_edid_block_valid(block, i, false, NULL))
1377				continue;
1378
1379			memcpy(base, block, EDID_LENGTH);
1380			base += EDID_LENGTH;
1381		}
1382
1383		kfree(edid);
1384		edid = new;
1385	}
1386
1387	return (struct edid *)edid;
1388
1389carp:
1390	connector_bad_edid(connector, edid, 1);
 
 
1391out:
1392	kfree(edid);
1393	return NULL;
1394}
1395EXPORT_SYMBOL_GPL(drm_do_get_edid);
1396
1397/**
1398 * drm_probe_ddc() - probe DDC presence
1399 * @adapter: I2C adapter to probe
1400 *
1401 * Return: True on success, false on failure.
 
1402 */
1403bool
1404drm_probe_ddc(struct i2c_adapter *adapter)
1405{
1406	unsigned char out;
1407
1408	return (drm_do_probe_ddc_edid(adapter, &out, 0, 1) == 0);
1409}
1410EXPORT_SYMBOL(drm_probe_ddc);
1411
1412/**
1413 * drm_get_edid - get EDID data, if available
1414 * @connector: connector we're probing
1415 * @adapter: I2C adapter to use for DDC
1416 *
1417 * Poke the given I2C channel to grab EDID data if possible.  If found,
1418 * attach it to the connector.
1419 *
1420 * Return: Pointer to valid EDID or NULL if we couldn't find any.
1421 */
1422struct edid *drm_get_edid(struct drm_connector *connector,
1423			  struct i2c_adapter *adapter)
1424{
1425	struct edid *edid;
1426
1427	if (!drm_probe_ddc(adapter))
1428		return NULL;
1429
1430	edid = drm_do_get_edid(connector, drm_do_probe_ddc_edid, adapter);
1431	if (edid)
1432		drm_get_displayid(connector, edid);
1433	return edid;
1434}
1435EXPORT_SYMBOL(drm_get_edid);
1436
1437/**
1438 * drm_get_edid_switcheroo - get EDID data for a vga_switcheroo output
1439 * @connector: connector we're probing
1440 * @adapter: I2C adapter to use for DDC
1441 *
1442 * Wrapper around drm_get_edid() for laptops with dual GPUs using one set of
1443 * outputs. The wrapper adds the requisite vga_switcheroo calls to temporarily
1444 * switch DDC to the GPU which is retrieving EDID.
1445 *
1446 * Return: Pointer to valid EDID or %NULL if we couldn't find any.
1447 */
1448struct edid *drm_get_edid_switcheroo(struct drm_connector *connector,
1449				     struct i2c_adapter *adapter)
1450{
1451	struct pci_dev *pdev = connector->dev->pdev;
1452	struct edid *edid;
1453
1454	vga_switcheroo_lock_ddc(pdev);
1455	edid = drm_get_edid(connector, adapter);
1456	vga_switcheroo_unlock_ddc(pdev);
1457
1458	return edid;
1459}
1460EXPORT_SYMBOL(drm_get_edid_switcheroo);
1461
1462/**
1463 * drm_edid_duplicate - duplicate an EDID and the extensions
1464 * @edid: EDID to duplicate
1465 *
1466 * Return: Pointer to duplicated EDID or NULL on allocation failure.
1467 */
1468struct edid *drm_edid_duplicate(const struct edid *edid)
1469{
1470	return kmemdup(edid, (edid->extensions + 1) * EDID_LENGTH, GFP_KERNEL);
1471}
1472EXPORT_SYMBOL(drm_edid_duplicate);
1473
1474/*** EDID parsing ***/
1475
1476/**
1477 * edid_vendor - match a string against EDID's obfuscated vendor field
1478 * @edid: EDID to match
1479 * @vendor: vendor string
1480 *
1481 * Returns true if @vendor is in @edid, false otherwise
1482 */
1483static bool edid_vendor(struct edid *edid, const char *vendor)
1484{
1485	char edid_vendor[3];
1486
1487	edid_vendor[0] = ((edid->mfg_id[0] & 0x7c) >> 2) + '@';
1488	edid_vendor[1] = (((edid->mfg_id[0] & 0x3) << 3) |
1489			  ((edid->mfg_id[1] & 0xe0) >> 5)) + '@';
1490	edid_vendor[2] = (edid->mfg_id[1] & 0x1f) + '@';
1491
1492	return !strncmp(edid_vendor, vendor, 3);
1493}
1494
1495/**
1496 * edid_get_quirks - return quirk flags for a given EDID
1497 * @edid: EDID to process
1498 *
1499 * This tells subsequent routines what fixes they need to apply.
1500 */
1501static u32 edid_get_quirks(struct edid *edid)
1502{
1503	const struct edid_quirk *quirk;
1504	int i;
1505
1506	for (i = 0; i < ARRAY_SIZE(edid_quirk_list); i++) {
1507		quirk = &edid_quirk_list[i];
1508
1509		if (edid_vendor(edid, quirk->vendor) &&
1510		    (EDID_PRODUCT_ID(edid) == quirk->product_id))
1511			return quirk->quirks;
1512	}
1513
1514	return 0;
1515}
1516
1517#define MODE_SIZE(m) ((m)->hdisplay * (m)->vdisplay)
1518#define MODE_REFRESH_DIFF(c,t) (abs((c) - (t)))
1519
1520/**
1521 * edid_fixup_preferred - set preferred modes based on quirk list
1522 * @connector: has mode list to fix up
1523 * @quirks: quirks list
1524 *
1525 * Walk the mode list for @connector, clearing the preferred status
1526 * on existing modes and setting it anew for the right mode ala @quirks.
1527 */
1528static void edid_fixup_preferred(struct drm_connector *connector,
1529				 u32 quirks)
1530{
1531	struct drm_display_mode *t, *cur_mode, *preferred_mode;
1532	int target_refresh = 0;
1533	int cur_vrefresh, preferred_vrefresh;
1534
1535	if (list_empty(&connector->probed_modes))
1536		return;
1537
1538	if (quirks & EDID_QUIRK_PREFER_LARGE_60)
1539		target_refresh = 60;
1540	if (quirks & EDID_QUIRK_PREFER_LARGE_75)
1541		target_refresh = 75;
1542
1543	preferred_mode = list_first_entry(&connector->probed_modes,
1544					  struct drm_display_mode, head);
1545
1546	list_for_each_entry_safe(cur_mode, t, &connector->probed_modes, head) {
1547		cur_mode->type &= ~DRM_MODE_TYPE_PREFERRED;
1548
1549		if (cur_mode == preferred_mode)
1550			continue;
1551
1552		/* Largest mode is preferred */
1553		if (MODE_SIZE(cur_mode) > MODE_SIZE(preferred_mode))
1554			preferred_mode = cur_mode;
1555
1556		cur_vrefresh = cur_mode->vrefresh ?
1557			cur_mode->vrefresh : drm_mode_vrefresh(cur_mode);
1558		preferred_vrefresh = preferred_mode->vrefresh ?
1559			preferred_mode->vrefresh : drm_mode_vrefresh(preferred_mode);
1560		/* At a given size, try to get closest to target refresh */
1561		if ((MODE_SIZE(cur_mode) == MODE_SIZE(preferred_mode)) &&
1562		    MODE_REFRESH_DIFF(cur_vrefresh, target_refresh) <
1563		    MODE_REFRESH_DIFF(preferred_vrefresh, target_refresh)) {
1564			preferred_mode = cur_mode;
1565		}
1566	}
1567
1568	preferred_mode->type |= DRM_MODE_TYPE_PREFERRED;
1569}
1570
1571static bool
1572mode_is_rb(const struct drm_display_mode *mode)
1573{
1574	return (mode->htotal - mode->hdisplay == 160) &&
1575	       (mode->hsync_end - mode->hdisplay == 80) &&
1576	       (mode->hsync_end - mode->hsync_start == 32) &&
1577	       (mode->vsync_start - mode->vdisplay == 3);
1578}
1579
1580/*
1581 * drm_mode_find_dmt - Create a copy of a mode if present in DMT
1582 * @dev: Device to duplicate against
1583 * @hsize: Mode width
1584 * @vsize: Mode height
1585 * @fresh: Mode refresh rate
1586 * @rb: Mode reduced-blanking-ness
1587 *
1588 * Walk the DMT mode list looking for a match for the given parameters.
1589 *
1590 * Return: A newly allocated copy of the mode, or NULL if not found.
1591 */
1592struct drm_display_mode *drm_mode_find_dmt(struct drm_device *dev,
1593					   int hsize, int vsize, int fresh,
1594					   bool rb)
1595{
 
1596	int i;
1597
1598	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
1599		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
1600		if (hsize != ptr->hdisplay)
1601			continue;
1602		if (vsize != ptr->vdisplay)
1603			continue;
1604		if (fresh != drm_mode_vrefresh(ptr))
1605			continue;
1606		if (rb != mode_is_rb(ptr))
1607			continue;
1608
1609		return drm_mode_duplicate(dev, ptr);
1610	}
1611
1612	return NULL;
1613}
1614EXPORT_SYMBOL(drm_mode_find_dmt);
1615
1616typedef void detailed_cb(struct detailed_timing *timing, void *closure);
1617
1618static void
1619cea_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1620{
1621	int i, n = 0;
1622	u8 d = ext[0x02];
1623	u8 *det_base = ext + d;
1624
1625	n = (127 - d) / 18;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1626	for (i = 0; i < n; i++)
1627		cb((struct detailed_timing *)(det_base + 18 * i), closure);
1628}
1629
1630static void
1631vtb_for_each_detailed_block(u8 *ext, detailed_cb *cb, void *closure)
1632{
1633	unsigned int i, n = min((int)ext[0x02], 6);
1634	u8 *det_base = ext + 5;
1635
1636	if (ext[0x01] != 1)
1637		return; /* unknown version */
1638
1639	for (i = 0; i < n; i++)
1640		cb((struct detailed_timing *)(det_base + 18 * i), closure);
1641}
1642
1643static void
1644drm_for_each_detailed_block(u8 *raw_edid, detailed_cb *cb, void *closure)
1645{
1646	int i;
1647	struct edid *edid = (struct edid *)raw_edid;
1648
1649	if (edid == NULL)
1650		return;
1651
1652	for (i = 0; i < EDID_DETAILED_TIMINGS; i++)
1653		cb(&(edid->detailed_timings[i]), closure);
1654
1655	for (i = 1; i <= raw_edid[0x7e]; i++) {
1656		u8 *ext = raw_edid + (i * EDID_LENGTH);
1657		switch (*ext) {
1658		case CEA_EXT:
1659			cea_for_each_detailed_block(ext, cb, closure);
1660			break;
1661		case VTB_EXT:
1662			vtb_for_each_detailed_block(ext, cb, closure);
1663			break;
1664		default:
1665			break;
1666		}
1667	}
1668}
1669
1670static void
1671is_rb(struct detailed_timing *t, void *data)
1672{
1673	u8 *r = (u8 *)t;
1674	if (r[3] == EDID_DETAIL_MONITOR_RANGE)
1675		if (r[15] & 0x10)
1676			*(bool *)data = true;
1677}
1678
1679/* EDID 1.4 defines this explicitly.  For EDID 1.3, we guess, badly. */
1680static bool
1681drm_monitor_supports_rb(struct edid *edid)
1682{
1683	if (edid->revision >= 4) {
1684		bool ret = false;
1685		drm_for_each_detailed_block((u8 *)edid, is_rb, &ret);
1686		return ret;
1687	}
1688
1689	return ((edid->input & DRM_EDID_INPUT_DIGITAL) != 0);
1690}
1691
1692static void
1693find_gtf2(struct detailed_timing *t, void *data)
1694{
1695	u8 *r = (u8 *)t;
1696	if (r[3] == EDID_DETAIL_MONITOR_RANGE && r[10] == 0x02)
1697		*(u8 **)data = r;
1698}
1699
1700/* Secondary GTF curve kicks in above some break frequency */
1701static int
1702drm_gtf2_hbreak(struct edid *edid)
1703{
1704	u8 *r = NULL;
1705	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1706	return r ? (r[12] * 2) : 0;
1707}
1708
1709static int
1710drm_gtf2_2c(struct edid *edid)
1711{
1712	u8 *r = NULL;
1713	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1714	return r ? r[13] : 0;
1715}
1716
1717static int
1718drm_gtf2_m(struct edid *edid)
1719{
1720	u8 *r = NULL;
1721	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1722	return r ? (r[15] << 8) + r[14] : 0;
1723}
1724
1725static int
1726drm_gtf2_k(struct edid *edid)
1727{
1728	u8 *r = NULL;
1729	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1730	return r ? r[16] : 0;
1731}
1732
1733static int
1734drm_gtf2_2j(struct edid *edid)
1735{
1736	u8 *r = NULL;
1737	drm_for_each_detailed_block((u8 *)edid, find_gtf2, &r);
1738	return r ? r[17] : 0;
1739}
1740
1741/**
1742 * standard_timing_level - get std. timing level(CVT/GTF/DMT)
1743 * @edid: EDID block to scan
1744 */
1745static int standard_timing_level(struct edid *edid)
1746{
1747	if (edid->revision >= 2) {
1748		if (edid->revision >= 4 && (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF))
1749			return LEVEL_CVT;
1750		if (drm_gtf2_hbreak(edid))
1751			return LEVEL_GTF2;
1752		return LEVEL_GTF;
1753	}
1754	return LEVEL_DMT;
1755}
1756
1757/*
1758 * 0 is reserved.  The spec says 0x01 fill for unused timings.  Some old
1759 * monitors fill with ascii space (0x20) instead.
1760 */
1761static int
1762bad_std_timing(u8 a, u8 b)
1763{
1764	return (a == 0x00 && b == 0x00) ||
1765	       (a == 0x01 && b == 0x01) ||
1766	       (a == 0x20 && b == 0x20);
1767}
1768
1769/**
1770 * drm_mode_std - convert standard mode info (width, height, refresh) into mode
1771 * @connector: connector of for the EDID block
1772 * @edid: EDID block to scan
1773 * @t: standard timing params
 
1774 *
1775 * Take the standard timing params (in this case width, aspect, and refresh)
1776 * and convert them into a real mode using CVT/GTF/DMT.
1777 */
1778static struct drm_display_mode *
1779drm_mode_std(struct drm_connector *connector, struct edid *edid,
1780	     struct std_timing *t)
1781{
1782	struct drm_device *dev = connector->dev;
1783	struct drm_display_mode *m, *mode = NULL;
1784	int hsize, vsize;
1785	int vrefresh_rate;
1786	unsigned aspect_ratio = (t->vfreq_aspect & EDID_TIMING_ASPECT_MASK)
1787		>> EDID_TIMING_ASPECT_SHIFT;
1788	unsigned vfreq = (t->vfreq_aspect & EDID_TIMING_VFREQ_MASK)
1789		>> EDID_TIMING_VFREQ_SHIFT;
1790	int timing_level = standard_timing_level(edid);
1791
1792	if (bad_std_timing(t->hsize, t->vfreq_aspect))
1793		return NULL;
1794
1795	/* According to the EDID spec, the hdisplay = hsize * 8 + 248 */
1796	hsize = t->hsize * 8 + 248;
1797	/* vrefresh_rate = vfreq + 60 */
1798	vrefresh_rate = vfreq + 60;
1799	/* the vdisplay is calculated based on the aspect ratio */
1800	if (aspect_ratio == 0) {
1801		if (edid->revision < 3)
1802			vsize = hsize;
1803		else
1804			vsize = (hsize * 10) / 16;
1805	} else if (aspect_ratio == 1)
1806		vsize = (hsize * 3) / 4;
1807	else if (aspect_ratio == 2)
1808		vsize = (hsize * 4) / 5;
1809	else
1810		vsize = (hsize * 9) / 16;
1811
1812	/* HDTV hack, part 1 */
1813	if (vrefresh_rate == 60 &&
1814	    ((hsize == 1360 && vsize == 765) ||
1815	     (hsize == 1368 && vsize == 769))) {
1816		hsize = 1366;
1817		vsize = 768;
1818	}
1819
1820	/*
1821	 * If this connector already has a mode for this size and refresh
1822	 * rate (because it came from detailed or CVT info), use that
1823	 * instead.  This way we don't have to guess at interlace or
1824	 * reduced blanking.
1825	 */
1826	list_for_each_entry(m, &connector->probed_modes, head)
1827		if (m->hdisplay == hsize && m->vdisplay == vsize &&
1828		    drm_mode_vrefresh(m) == vrefresh_rate)
1829			return NULL;
1830
1831	/* HDTV hack, part 2 */
1832	if (hsize == 1366 && vsize == 768 && vrefresh_rate == 60) {
1833		mode = drm_cvt_mode(dev, 1366, 768, vrefresh_rate, 0, 0,
1834				    false);
1835		mode->hdisplay = 1366;
1836		mode->hsync_start = mode->hsync_start - 1;
1837		mode->hsync_end = mode->hsync_end - 1;
1838		return mode;
1839	}
1840
1841	/* check whether it can be found in default mode table */
1842	if (drm_monitor_supports_rb(edid)) {
1843		mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate,
1844					 true);
1845		if (mode)
1846			return mode;
1847	}
1848	mode = drm_mode_find_dmt(dev, hsize, vsize, vrefresh_rate, false);
1849	if (mode)
1850		return mode;
1851
1852	/* okay, generate it */
1853	switch (timing_level) {
1854	case LEVEL_DMT:
1855		break;
1856	case LEVEL_GTF:
1857		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1858		break;
1859	case LEVEL_GTF2:
1860		/*
1861		 * This is potentially wrong if there's ever a monitor with
1862		 * more than one ranges section, each claiming a different
1863		 * secondary GTF curve.  Please don't do that.
1864		 */
1865		mode = drm_gtf_mode(dev, hsize, vsize, vrefresh_rate, 0, 0);
1866		if (!mode)
1867			return NULL;
1868		if (drm_mode_hsync(mode) > drm_gtf2_hbreak(edid)) {
1869			drm_mode_destroy(dev, mode);
1870			mode = drm_gtf_mode_complex(dev, hsize, vsize,
1871						    vrefresh_rate, 0, 0,
1872						    drm_gtf2_m(edid),
1873						    drm_gtf2_2c(edid),
1874						    drm_gtf2_k(edid),
1875						    drm_gtf2_2j(edid));
1876		}
1877		break;
1878	case LEVEL_CVT:
1879		mode = drm_cvt_mode(dev, hsize, vsize, vrefresh_rate, 0, 0,
1880				    false);
1881		break;
1882	}
1883	return mode;
1884}
1885
1886/*
1887 * EDID is delightfully ambiguous about how interlaced modes are to be
1888 * encoded.  Our internal representation is of frame height, but some
1889 * HDTV detailed timings are encoded as field height.
1890 *
1891 * The format list here is from CEA, in frame size.  Technically we
1892 * should be checking refresh rate too.  Whatever.
1893 */
1894static void
1895drm_mode_do_interlace_quirk(struct drm_display_mode *mode,
1896			    struct detailed_pixel_timing *pt)
1897{
1898	int i;
1899	static const struct {
1900		int w, h;
1901	} cea_interlaced[] = {
1902		{ 1920, 1080 },
1903		{  720,  480 },
1904		{ 1440,  480 },
1905		{ 2880,  480 },
1906		{  720,  576 },
1907		{ 1440,  576 },
1908		{ 2880,  576 },
1909	};
1910
1911	if (!(pt->misc & DRM_EDID_PT_INTERLACED))
1912		return;
1913
1914	for (i = 0; i < ARRAY_SIZE(cea_interlaced); i++) {
1915		if ((mode->hdisplay == cea_interlaced[i].w) &&
1916		    (mode->vdisplay == cea_interlaced[i].h / 2)) {
1917			mode->vdisplay *= 2;
1918			mode->vsync_start *= 2;
1919			mode->vsync_end *= 2;
1920			mode->vtotal *= 2;
1921			mode->vtotal |= 1;
1922		}
1923	}
1924
1925	mode->flags |= DRM_MODE_FLAG_INTERLACE;
1926}
1927
1928/**
1929 * drm_mode_detailed - create a new mode from an EDID detailed timing section
1930 * @dev: DRM device (needed to create new mode)
1931 * @edid: EDID block
1932 * @timing: EDID detailed timing info
1933 * @quirks: quirks to apply
1934 *
1935 * An EDID detailed timing block contains enough info for us to create and
1936 * return a new struct drm_display_mode.
1937 */
1938static struct drm_display_mode *drm_mode_detailed(struct drm_device *dev,
1939						  struct edid *edid,
1940						  struct detailed_timing *timing,
1941						  u32 quirks)
1942{
1943	struct drm_display_mode *mode;
1944	struct detailed_pixel_timing *pt = &timing->data.pixel_data;
1945	unsigned hactive = (pt->hactive_hblank_hi & 0xf0) << 4 | pt->hactive_lo;
1946	unsigned vactive = (pt->vactive_vblank_hi & 0xf0) << 4 | pt->vactive_lo;
1947	unsigned hblank = (pt->hactive_hblank_hi & 0xf) << 8 | pt->hblank_lo;
1948	unsigned vblank = (pt->vactive_vblank_hi & 0xf) << 8 | pt->vblank_lo;
1949	unsigned hsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc0) << 2 | pt->hsync_offset_lo;
1950	unsigned hsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x30) << 4 | pt->hsync_pulse_width_lo;
1951	unsigned vsync_offset = (pt->hsync_vsync_offset_pulse_width_hi & 0xc) << 2 | pt->vsync_offset_pulse_width_lo >> 4;
1952	unsigned vsync_pulse_width = (pt->hsync_vsync_offset_pulse_width_hi & 0x3) << 4 | (pt->vsync_offset_pulse_width_lo & 0xf);
1953
1954	/* ignore tiny modes */
1955	if (hactive < 64 || vactive < 64)
1956		return NULL;
1957
1958	if (pt->misc & DRM_EDID_PT_STEREO) {
1959		DRM_DEBUG_KMS("stereo mode not supported\n");
1960		return NULL;
1961	}
1962	if (!(pt->misc & DRM_EDID_PT_SEPARATE_SYNC)) {
1963		DRM_DEBUG_KMS("composite sync not supported\n");
1964	}
1965
1966	/* it is incorrect if hsync/vsync width is zero */
1967	if (!hsync_pulse_width || !vsync_pulse_width) {
1968		DRM_DEBUG_KMS("Incorrect Detailed timing. "
1969				"Wrong Hsync/Vsync pulse width\n");
1970		return NULL;
1971	}
1972
1973	if (quirks & EDID_QUIRK_FORCE_REDUCED_BLANKING) {
1974		mode = drm_cvt_mode(dev, hactive, vactive, 60, true, false, false);
1975		if (!mode)
1976			return NULL;
1977
1978		goto set_size;
1979	}
1980
1981	mode = drm_mode_create(dev);
1982	if (!mode)
1983		return NULL;
1984
 
 
1985	if (quirks & EDID_QUIRK_135_CLOCK_TOO_HIGH)
1986		timing->pixel_clock = cpu_to_le16(1088);
1987
1988	mode->clock = le16_to_cpu(timing->pixel_clock) * 10;
1989
1990	mode->hdisplay = hactive;
1991	mode->hsync_start = mode->hdisplay + hsync_offset;
1992	mode->hsync_end = mode->hsync_start + hsync_pulse_width;
1993	mode->htotal = mode->hdisplay + hblank;
1994
1995	mode->vdisplay = vactive;
1996	mode->vsync_start = mode->vdisplay + vsync_offset;
1997	mode->vsync_end = mode->vsync_start + vsync_pulse_width;
1998	mode->vtotal = mode->vdisplay + vblank;
1999
2000	/* Some EDIDs have bogus h/vtotal values */
2001	if (mode->hsync_end > mode->htotal)
2002		mode->htotal = mode->hsync_end + 1;
2003	if (mode->vsync_end > mode->vtotal)
2004		mode->vtotal = mode->vsync_end + 1;
2005
2006	drm_mode_do_interlace_quirk(mode, pt);
2007
 
 
2008	if (quirks & EDID_QUIRK_DETAILED_SYNC_PP) {
2009		pt->misc |= DRM_EDID_PT_HSYNC_POSITIVE | DRM_EDID_PT_VSYNC_POSITIVE;
2010	}
2011
2012	mode->flags |= (pt->misc & DRM_EDID_PT_HSYNC_POSITIVE) ?
2013		DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
2014	mode->flags |= (pt->misc & DRM_EDID_PT_VSYNC_POSITIVE) ?
2015		DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
2016
2017set_size:
2018	mode->width_mm = pt->width_mm_lo | (pt->width_height_mm_hi & 0xf0) << 4;
2019	mode->height_mm = pt->height_mm_lo | (pt->width_height_mm_hi & 0xf) << 8;
2020
2021	if (quirks & EDID_QUIRK_DETAILED_IN_CM) {
2022		mode->width_mm *= 10;
2023		mode->height_mm *= 10;
2024	}
2025
2026	if (quirks & EDID_QUIRK_DETAILED_USE_MAXIMUM_SIZE) {
2027		mode->width_mm = edid->width_cm * 10;
2028		mode->height_mm = edid->height_cm * 10;
2029	}
2030
2031	mode->type = DRM_MODE_TYPE_DRIVER;
2032	mode->vrefresh = drm_mode_vrefresh(mode);
2033	drm_mode_set_name(mode);
2034
2035	return mode;
 
 
 
 
 
 
2036}
2037
2038static bool
2039mode_in_hsync_range(const struct drm_display_mode *mode,
2040		    struct edid *edid, u8 *t)
2041{
2042	int hsync, hmin, hmax;
2043
2044	hmin = t[7];
2045	if (edid->revision >= 4)
2046	    hmin += ((t[4] & 0x04) ? 255 : 0);
2047	hmax = t[8];
2048	if (edid->revision >= 4)
2049	    hmax += ((t[4] & 0x08) ? 255 : 0);
2050	hsync = drm_mode_hsync(mode);
2051
2052	return (hsync <= hmax && hsync >= hmin);
2053}
2054
2055static bool
2056mode_in_vsync_range(const struct drm_display_mode *mode,
2057		    struct edid *edid, u8 *t)
2058{
2059	int vsync, vmin, vmax;
2060
2061	vmin = t[5];
2062	if (edid->revision >= 4)
2063	    vmin += ((t[4] & 0x01) ? 255 : 0);
2064	vmax = t[6];
2065	if (edid->revision >= 4)
2066	    vmax += ((t[4] & 0x02) ? 255 : 0);
2067	vsync = drm_mode_vrefresh(mode);
2068
2069	return (vsync <= vmax && vsync >= vmin);
2070}
2071
2072static u32
2073range_pixel_clock(struct edid *edid, u8 *t)
2074{
2075	/* unspecified */
2076	if (t[9] == 0 || t[9] == 255)
2077		return 0;
2078
2079	/* 1.4 with CVT support gives us real precision, yay */
2080	if (edid->revision >= 4 && t[10] == 0x04)
2081		return (t[9] * 10000) - ((t[12] >> 2) * 250);
2082
2083	/* 1.3 is pathetic, so fuzz up a bit */
2084	return t[9] * 10000 + 5001;
2085}
2086
2087static bool
2088mode_in_range(const struct drm_display_mode *mode, struct edid *edid,
2089	      struct detailed_timing *timing)
2090{
2091	u32 max_clock;
2092	u8 *t = (u8 *)timing;
2093
2094	if (!mode_in_hsync_range(mode, edid, t))
2095		return false;
2096
2097	if (!mode_in_vsync_range(mode, edid, t))
2098		return false;
2099
2100	if ((max_clock = range_pixel_clock(edid, t)))
2101		if (mode->clock > max_clock)
2102			return false;
2103
2104	/* 1.4 max horizontal check */
2105	if (edid->revision >= 4 && t[10] == 0x04)
2106		if (t[13] && mode->hdisplay > 8 * (t[13] + (256 * (t[12]&0x3))))
2107			return false;
2108
2109	if (mode_is_rb(mode) && !drm_monitor_supports_rb(edid))
2110		return false;
2111
2112	return true;
2113}
2114
2115static bool valid_inferred_mode(const struct drm_connector *connector,
2116				const struct drm_display_mode *mode)
2117{
2118	const struct drm_display_mode *m;
2119	bool ok = false;
2120
2121	list_for_each_entry(m, &connector->probed_modes, head) {
2122		if (mode->hdisplay == m->hdisplay &&
2123		    mode->vdisplay == m->vdisplay &&
2124		    drm_mode_vrefresh(mode) == drm_mode_vrefresh(m))
2125			return false; /* duplicated */
2126		if (mode->hdisplay <= m->hdisplay &&
2127		    mode->vdisplay <= m->vdisplay)
2128			ok = true;
2129	}
2130	return ok;
2131}
2132
2133static int
2134drm_dmt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2135			struct detailed_timing *timing)
2136{
2137	int i, modes = 0;
2138	struct drm_display_mode *newmode;
2139	struct drm_device *dev = connector->dev;
2140
2141	for (i = 0; i < ARRAY_SIZE(drm_dmt_modes); i++) {
2142		if (mode_in_range(drm_dmt_modes + i, edid, timing) &&
2143		    valid_inferred_mode(connector, drm_dmt_modes + i)) {
2144			newmode = drm_mode_duplicate(dev, &drm_dmt_modes[i]);
2145			if (newmode) {
2146				drm_mode_probed_add(connector, newmode);
2147				modes++;
2148			}
2149		}
2150	}
2151
2152	return modes;
2153}
2154
2155/* fix up 1366x768 mode from 1368x768;
2156 * GFT/CVT can't express 1366 width which isn't dividable by 8
2157 */
2158static void fixup_mode_1366x768(struct drm_display_mode *mode)
2159{
2160	if (mode->hdisplay == 1368 && mode->vdisplay == 768) {
2161		mode->hdisplay = 1366;
2162		mode->hsync_start--;
2163		mode->hsync_end--;
2164		drm_mode_set_name(mode);
2165	}
2166}
2167
2168static int
2169drm_gtf_modes_for_range(struct drm_connector *connector, struct edid *edid,
2170			struct detailed_timing *timing)
2171{
2172	int i, modes = 0;
2173	struct drm_display_mode *newmode;
2174	struct drm_device *dev = connector->dev;
2175
2176	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2177		const struct minimode *m = &extra_modes[i];
2178		newmode = drm_gtf_mode(dev, m->w, m->h, m->r, 0, 0);
2179		if (!newmode)
2180			return modes;
2181
2182		fixup_mode_1366x768(newmode);
2183		if (!mode_in_range(newmode, edid, timing) ||
2184		    !valid_inferred_mode(connector, newmode)) {
2185			drm_mode_destroy(dev, newmode);
2186			continue;
2187		}
2188
2189		drm_mode_probed_add(connector, newmode);
2190		modes++;
2191	}
2192
2193	return modes;
2194}
2195
2196static int
2197drm_cvt_modes_for_range(struct drm_connector *connector, struct edid *edid,
2198			struct detailed_timing *timing)
2199{
2200	int i, modes = 0;
2201	struct drm_display_mode *newmode;
2202	struct drm_device *dev = connector->dev;
2203	bool rb = drm_monitor_supports_rb(edid);
2204
2205	for (i = 0; i < ARRAY_SIZE(extra_modes); i++) {
2206		const struct minimode *m = &extra_modes[i];
2207		newmode = drm_cvt_mode(dev, m->w, m->h, m->r, rb, 0, 0);
2208		if (!newmode)
2209			return modes;
2210
2211		fixup_mode_1366x768(newmode);
2212		if (!mode_in_range(newmode, edid, timing) ||
2213		    !valid_inferred_mode(connector, newmode)) {
2214			drm_mode_destroy(dev, newmode);
2215			continue;
2216		}
2217
2218		drm_mode_probed_add(connector, newmode);
2219		modes++;
2220	}
2221
2222	return modes;
2223}
2224
2225static void
2226do_inferred_modes(struct detailed_timing *timing, void *c)
2227{
2228	struct detailed_mode_closure *closure = c;
2229	struct detailed_non_pixel *data = &timing->data.other_data;
2230	struct detailed_data_monitor_range *range = &data->data.range;
2231
2232	if (data->type != EDID_DETAIL_MONITOR_RANGE)
2233		return;
2234
2235	closure->modes += drm_dmt_modes_for_range(closure->connector,
2236						  closure->edid,
2237						  timing);
2238	
2239	if (!version_greater(closure->edid, 1, 1))
2240		return; /* GTF not defined yet */
2241
2242	switch (range->flags) {
2243	case 0x02: /* secondary gtf, XXX could do more */
2244	case 0x00: /* default gtf */
2245		closure->modes += drm_gtf_modes_for_range(closure->connector,
2246							  closure->edid,
2247							  timing);
2248		break;
2249	case 0x04: /* cvt, only in 1.4+ */
2250		if (!version_greater(closure->edid, 1, 3))
2251			break;
2252
2253		closure->modes += drm_cvt_modes_for_range(closure->connector,
2254							  closure->edid,
2255							  timing);
2256		break;
2257	case 0x01: /* just the ranges, no formula */
2258	default:
2259		break;
2260	}
2261}
2262
2263static int
2264add_inferred_modes(struct drm_connector *connector, struct edid *edid)
2265{
2266	struct detailed_mode_closure closure = {
2267		.connector = connector,
2268		.edid = edid,
2269	};
2270
2271	if (version_greater(edid, 1, 0))
2272		drm_for_each_detailed_block((u8 *)edid, do_inferred_modes,
2273					    &closure);
2274
2275	return closure.modes;
2276}
2277
2278static int
2279drm_est3_modes(struct drm_connector *connector, struct detailed_timing *timing)
2280{
2281	int i, j, m, modes = 0;
2282	struct drm_display_mode *mode;
2283	u8 *est = ((u8 *)timing) + 6;
2284
2285	for (i = 0; i < 6; i++) {
2286		for (j = 7; j >= 0; j--) {
2287			m = (i * 8) + (7 - j);
2288			if (m >= ARRAY_SIZE(est3_modes))
2289				break;
2290			if (est[i] & (1 << j)) {
2291				mode = drm_mode_find_dmt(connector->dev,
2292							 est3_modes[m].w,
2293							 est3_modes[m].h,
2294							 est3_modes[m].r,
2295							 est3_modes[m].rb);
2296				if (mode) {
2297					drm_mode_probed_add(connector, mode);
2298					modes++;
2299				}
2300			}
2301		}
2302	}
2303
2304	return modes;
2305}
2306
2307static void
2308do_established_modes(struct detailed_timing *timing, void *c)
2309{
2310	struct detailed_mode_closure *closure = c;
2311	struct detailed_non_pixel *data = &timing->data.other_data;
2312
2313	if (data->type == EDID_DETAIL_EST_TIMINGS)
2314		closure->modes += drm_est3_modes(closure->connector, timing);
2315}
2316
2317/**
2318 * add_established_modes - get est. modes from EDID and add them
2319 * @connector: connector to add mode(s) to
2320 * @edid: EDID block to scan
2321 *
2322 * Each EDID block contains a bitmap of the supported "established modes" list
2323 * (defined above).  Tease them out and add them to the global modes list.
2324 */
2325static int
2326add_established_modes(struct drm_connector *connector, struct edid *edid)
2327{
2328	struct drm_device *dev = connector->dev;
2329	unsigned long est_bits = edid->established_timings.t1 |
2330		(edid->established_timings.t2 << 8) |
2331		((edid->established_timings.mfg_rsvd & 0x80) << 9);
2332	int i, modes = 0;
2333	struct detailed_mode_closure closure = {
2334		.connector = connector,
2335		.edid = edid,
2336	};
2337
2338	for (i = 0; i <= EDID_EST_TIMINGS; i++) {
2339		if (est_bits & (1<<i)) {
2340			struct drm_display_mode *newmode;
2341			newmode = drm_mode_duplicate(dev, &edid_est_modes[i]);
2342			if (newmode) {
2343				drm_mode_probed_add(connector, newmode);
2344				modes++;
2345			}
2346		}
2347	}
2348
2349	if (version_greater(edid, 1, 0))
2350		    drm_for_each_detailed_block((u8 *)edid,
2351						do_established_modes, &closure);
2352
2353	return modes + closure.modes;
2354}
2355
2356static void
2357do_standard_modes(struct detailed_timing *timing, void *c)
2358{
2359	struct detailed_mode_closure *closure = c;
2360	struct detailed_non_pixel *data = &timing->data.other_data;
2361	struct drm_connector *connector = closure->connector;
2362	struct edid *edid = closure->edid;
2363
2364	if (data->type == EDID_DETAIL_STD_MODES) {
2365		int i;
2366		for (i = 0; i < 6; i++) {
2367			struct std_timing *std;
2368			struct drm_display_mode *newmode;
2369
2370			std = &data->data.timings[i];
2371			newmode = drm_mode_std(connector, edid, std);
 
2372			if (newmode) {
2373				drm_mode_probed_add(connector, newmode);
2374				closure->modes++;
2375			}
2376		}
2377	}
2378}
2379
2380/**
2381 * add_standard_modes - get std. modes from EDID and add them
2382 * @connector: connector to add mode(s) to
2383 * @edid: EDID block to scan
2384 *
2385 * Standard modes can be calculated using the appropriate standard (DMT,
2386 * GTF or CVT. Grab them from @edid and add them to the list.
2387 */
2388static int
2389add_standard_modes(struct drm_connector *connector, struct edid *edid)
2390{
2391	int i, modes = 0;
2392	struct detailed_mode_closure closure = {
2393		.connector = connector,
2394		.edid = edid,
2395	};
2396
2397	for (i = 0; i < EDID_STD_TIMINGS; i++) {
2398		struct drm_display_mode *newmode;
2399
2400		newmode = drm_mode_std(connector, edid,
2401				       &edid->standard_timings[i]);
 
2402		if (newmode) {
2403			drm_mode_probed_add(connector, newmode);
2404			modes++;
2405		}
2406	}
2407
2408	if (version_greater(edid, 1, 0))
2409		drm_for_each_detailed_block((u8 *)edid, do_standard_modes,
2410					    &closure);
2411
2412	/* XXX should also look for standard codes in VTB blocks */
2413
2414	return modes + closure.modes;
2415}
2416
2417static int drm_cvt_modes(struct drm_connector *connector,
2418			 struct detailed_timing *timing)
2419{
2420	int i, j, modes = 0;
2421	struct drm_display_mode *newmode;
2422	struct drm_device *dev = connector->dev;
2423	struct cvt_timing *cvt;
2424	const int rates[] = { 60, 85, 75, 60, 50 };
2425	const u8 empty[3] = { 0, 0, 0 };
2426
2427	for (i = 0; i < 4; i++) {
2428		int uninitialized_var(width), height;
2429		cvt = &(timing->data.other_data.data.cvt[i]);
2430
2431		if (!memcmp(cvt->code, empty, 3))
2432			continue;
2433
2434		height = (cvt->code[0] + ((cvt->code[1] & 0xf0) << 4) + 1) * 2;
2435		switch (cvt->code[1] & 0x0c) {
2436		case 0x00:
2437			width = height * 4 / 3;
2438			break;
2439		case 0x04:
2440			width = height * 16 / 9;
2441			break;
2442		case 0x08:
2443			width = height * 16 / 10;
2444			break;
2445		case 0x0c:
2446			width = height * 15 / 9;
2447			break;
2448		}
2449
2450		for (j = 1; j < 5; j++) {
2451			if (cvt->code[2] & (1 << j)) {
2452				newmode = drm_cvt_mode(dev, width, height,
2453						       rates[j], j == 0,
2454						       false, false);
2455				if (newmode) {
2456					drm_mode_probed_add(connector, newmode);
2457					modes++;
2458				}
2459			}
2460		}
2461	}
2462
2463	return modes;
2464}
2465
2466static void
2467do_cvt_mode(struct detailed_timing *timing, void *c)
2468{
2469	struct detailed_mode_closure *closure = c;
2470	struct detailed_non_pixel *data = &timing->data.other_data;
2471
2472	if (data->type == EDID_DETAIL_CVT_3BYTE)
2473		closure->modes += drm_cvt_modes(closure->connector, timing);
2474}
2475
2476static int
2477add_cvt_modes(struct drm_connector *connector, struct edid *edid)
2478{	
2479	struct detailed_mode_closure closure = {
2480		.connector = connector,
2481		.edid = edid,
2482	};
2483
2484	if (version_greater(edid, 1, 2))
2485		drm_for_each_detailed_block((u8 *)edid, do_cvt_mode, &closure);
2486
2487	/* XXX should also look for CVT codes in VTB blocks */
2488
2489	return closure.modes;
2490}
2491
2492static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode);
2493
2494static void
2495do_detailed_mode(struct detailed_timing *timing, void *c)
2496{
2497	struct detailed_mode_closure *closure = c;
2498	struct drm_display_mode *newmode;
2499
2500	if (timing->pixel_clock) {
2501		newmode = drm_mode_detailed(closure->connector->dev,
2502					    closure->edid, timing,
2503					    closure->quirks);
2504		if (!newmode)
2505			return;
2506
2507		if (closure->preferred)
2508			newmode->type |= DRM_MODE_TYPE_PREFERRED;
2509
2510		/*
2511		 * Detailed modes are limited to 10kHz pixel clock resolution,
2512		 * so fix up anything that looks like CEA/HDMI mode, but the clock
2513		 * is just slightly off.
2514		 */
2515		fixup_detailed_cea_mode_clock(newmode);
2516
2517		drm_mode_probed_add(closure->connector, newmode);
2518		closure->modes++;
2519		closure->preferred = 0;
2520	}
2521}
2522
2523/*
2524 * add_detailed_modes - Add modes from detailed timings
2525 * @connector: attached connector
2526 * @edid: EDID block to scan
2527 * @quirks: quirks to apply
2528 */
2529static int
2530add_detailed_modes(struct drm_connector *connector, struct edid *edid,
2531		   u32 quirks)
2532{
2533	struct detailed_mode_closure closure = {
2534		.connector = connector,
2535		.edid = edid,
2536		.preferred = 1,
2537		.quirks = quirks,
 
2538	};
2539
2540	if (closure.preferred && !version_greater(edid, 1, 3))
2541		closure.preferred =
2542		    (edid->features & DRM_EDID_FEATURE_PREFERRED_TIMING);
2543
2544	drm_for_each_detailed_block((u8 *)edid, do_detailed_mode, &closure);
2545
2546	return closure.modes;
2547}
2548
 
2549#define AUDIO_BLOCK	0x01
2550#define VIDEO_BLOCK     0x02
2551#define VENDOR_BLOCK    0x03
2552#define SPEAKER_BLOCK	0x04
2553#define VIDEO_CAPABILITY_BLOCK	0x07
2554#define EDID_BASIC_AUDIO	(1 << 6)
2555#define EDID_CEA_YCRCB444	(1 << 5)
2556#define EDID_CEA_YCRCB422	(1 << 4)
2557#define EDID_CEA_VCDB_QS	(1 << 6)
2558
2559/*
2560 * Search EDID for CEA extension block.
2561 */
2562static u8 *drm_find_edid_extension(struct edid *edid, int ext_id)
2563{
2564	u8 *edid_ext = NULL;
2565	int i;
2566
2567	/* No EDID or EDID extensions */
2568	if (edid == NULL || edid->extensions == 0)
2569		return NULL;
2570
2571	/* Find CEA extension */
2572	for (i = 0; i < edid->extensions; i++) {
2573		edid_ext = (u8 *)edid + EDID_LENGTH * (i + 1);
2574		if (edid_ext[0] == ext_id)
2575			break;
2576	}
2577
2578	if (i == edid->extensions)
2579		return NULL;
2580
2581	return edid_ext;
2582}
2583
2584static u8 *drm_find_cea_extension(struct edid *edid)
2585{
2586	return drm_find_edid_extension(edid, CEA_EXT);
2587}
2588
2589static u8 *drm_find_displayid_extension(struct edid *edid)
2590{
2591	return drm_find_edid_extension(edid, DISPLAYID_EXT);
2592}
2593
2594/*
2595 * Calculate the alternate clock for the CEA mode
2596 * (60Hz vs. 59.94Hz etc.)
2597 */
2598static unsigned int
2599cea_mode_alternate_clock(const struct drm_display_mode *cea_mode)
2600{
2601	unsigned int clock = cea_mode->clock;
2602
2603	if (cea_mode->vrefresh % 6 != 0)
2604		return clock;
2605
2606	/*
2607	 * edid_cea_modes contains the 59.94Hz
2608	 * variant for 240 and 480 line modes,
2609	 * and the 60Hz variant otherwise.
2610	 */
2611	if (cea_mode->vdisplay == 240 || cea_mode->vdisplay == 480)
2612		clock = DIV_ROUND_CLOSEST(clock * 1001, 1000);
2613	else
2614		clock = DIV_ROUND_CLOSEST(clock * 1000, 1001);
2615
2616	return clock;
2617}
2618
2619static bool
2620cea_mode_alternate_timings(u8 vic, struct drm_display_mode *mode)
2621{
2622	/*
2623	 * For certain VICs the spec allows the vertical
2624	 * front porch to vary by one or two lines.
2625	 *
2626	 * cea_modes[] stores the variant with the shortest
2627	 * vertical front porch. We can adjust the mode to
2628	 * get the other variants by simply increasing the
2629	 * vertical front porch length.
2630	 */
2631	BUILD_BUG_ON(edid_cea_modes[8].vtotal != 262 ||
2632		     edid_cea_modes[9].vtotal != 262 ||
2633		     edid_cea_modes[12].vtotal != 262 ||
2634		     edid_cea_modes[13].vtotal != 262 ||
2635		     edid_cea_modes[23].vtotal != 312 ||
2636		     edid_cea_modes[24].vtotal != 312 ||
2637		     edid_cea_modes[27].vtotal != 312 ||
2638		     edid_cea_modes[28].vtotal != 312);
2639
2640	if (((vic == 8 || vic == 9 ||
2641	      vic == 12 || vic == 13) && mode->vtotal < 263) ||
2642	    ((vic == 23 || vic == 24 ||
2643	      vic == 27 || vic == 28) && mode->vtotal < 314)) {
2644		mode->vsync_start++;
2645		mode->vsync_end++;
2646		mode->vtotal++;
2647
2648		return true;
2649	}
2650
2651	return false;
2652}
2653
2654static u8 drm_match_cea_mode_clock_tolerance(const struct drm_display_mode *to_match,
2655					     unsigned int clock_tolerance)
2656{
2657	u8 vic;
2658
2659	if (!to_match->clock)
2660		return 0;
2661
2662	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2663		struct drm_display_mode cea_mode = edid_cea_modes[vic];
2664		unsigned int clock1, clock2;
2665
2666		/* Check both 60Hz and 59.94Hz */
2667		clock1 = cea_mode.clock;
2668		clock2 = cea_mode_alternate_clock(&cea_mode);
2669
2670		if (abs(to_match->clock - clock1) > clock_tolerance &&
2671		    abs(to_match->clock - clock2) > clock_tolerance)
2672			continue;
2673
2674		do {
2675			if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2676				return vic;
2677		} while (cea_mode_alternate_timings(vic, &cea_mode));
2678	}
2679
2680	return 0;
2681}
2682
2683/**
2684 * drm_match_cea_mode - look for a CEA mode matching given mode
2685 * @to_match: display mode
2686 *
2687 * Return: The CEA Video ID (VIC) of the mode or 0 if it isn't a CEA-861
2688 * mode.
2689 */
2690u8 drm_match_cea_mode(const struct drm_display_mode *to_match)
2691{
2692	u8 vic;
2693
2694	if (!to_match->clock)
2695		return 0;
2696
2697	for (vic = 1; vic < ARRAY_SIZE(edid_cea_modes); vic++) {
2698		struct drm_display_mode cea_mode = edid_cea_modes[vic];
2699		unsigned int clock1, clock2;
2700
2701		/* Check both 60Hz and 59.94Hz */
2702		clock1 = cea_mode.clock;
2703		clock2 = cea_mode_alternate_clock(&cea_mode);
2704
2705		if (KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock1) &&
2706		    KHZ2PICOS(to_match->clock) != KHZ2PICOS(clock2))
2707			continue;
2708
2709		do {
2710			if (drm_mode_equal_no_clocks_no_stereo(to_match, &cea_mode))
2711				return vic;
2712		} while (cea_mode_alternate_timings(vic, &cea_mode));
2713	}
2714
2715	return 0;
2716}
2717EXPORT_SYMBOL(drm_match_cea_mode);
2718
2719static bool drm_valid_cea_vic(u8 vic)
2720{
2721	return vic > 0 && vic < ARRAY_SIZE(edid_cea_modes);
2722}
2723
2724/**
2725 * drm_get_cea_aspect_ratio - get the picture aspect ratio corresponding to
2726 * the input VIC from the CEA mode list
2727 * @video_code: ID given to each of the CEA modes
2728 *
2729 * Returns picture aspect ratio
2730 */
2731enum hdmi_picture_aspect drm_get_cea_aspect_ratio(const u8 video_code)
2732{
2733	return edid_cea_modes[video_code].picture_aspect_ratio;
2734}
2735EXPORT_SYMBOL(drm_get_cea_aspect_ratio);
2736
2737/*
2738 * Calculate the alternate clock for HDMI modes (those from the HDMI vendor
2739 * specific block).
2740 *
2741 * It's almost like cea_mode_alternate_clock(), we just need to add an
2742 * exception for the VIC 4 mode (4096x2160@24Hz): no alternate clock for this
2743 * one.
2744 */
2745static unsigned int
2746hdmi_mode_alternate_clock(const struct drm_display_mode *hdmi_mode)
2747{
2748	if (hdmi_mode->vdisplay == 4096 && hdmi_mode->hdisplay == 2160)
2749		return hdmi_mode->clock;
2750
2751	return cea_mode_alternate_clock(hdmi_mode);
2752}
2753
2754static u8 drm_match_hdmi_mode_clock_tolerance(const struct drm_display_mode *to_match,
2755					      unsigned int clock_tolerance)
2756{
2757	u8 vic;
2758
2759	if (!to_match->clock)
2760		return 0;
2761
2762	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2763		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2764		unsigned int clock1, clock2;
2765
2766		/* Make sure to also match alternate clocks */
2767		clock1 = hdmi_mode->clock;
2768		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2769
2770		if (abs(to_match->clock - clock1) > clock_tolerance &&
2771		    abs(to_match->clock - clock2) > clock_tolerance)
2772			continue;
2773
2774		if (drm_mode_equal_no_clocks(to_match, hdmi_mode))
2775			return vic;
2776	}
2777
2778	return 0;
2779}
2780
2781/*
2782 * drm_match_hdmi_mode - look for a HDMI mode matching given mode
2783 * @to_match: display mode
2784 *
2785 * An HDMI mode is one defined in the HDMI vendor specific block.
2786 *
2787 * Returns the HDMI Video ID (VIC) of the mode or 0 if it isn't one.
2788 */
2789static u8 drm_match_hdmi_mode(const struct drm_display_mode *to_match)
2790{
2791	u8 vic;
2792
2793	if (!to_match->clock)
2794		return 0;
2795
2796	for (vic = 1; vic < ARRAY_SIZE(edid_4k_modes); vic++) {
2797		const struct drm_display_mode *hdmi_mode = &edid_4k_modes[vic];
2798		unsigned int clock1, clock2;
2799
2800		/* Make sure to also match alternate clocks */
2801		clock1 = hdmi_mode->clock;
2802		clock2 = hdmi_mode_alternate_clock(hdmi_mode);
2803
2804		if ((KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock1) ||
2805		     KHZ2PICOS(to_match->clock) == KHZ2PICOS(clock2)) &&
2806		    drm_mode_equal_no_clocks_no_stereo(to_match, hdmi_mode))
2807			return vic;
2808	}
2809	return 0;
2810}
2811
2812static bool drm_valid_hdmi_vic(u8 vic)
2813{
2814	return vic > 0 && vic < ARRAY_SIZE(edid_4k_modes);
2815}
2816
2817static int
2818add_alternate_cea_modes(struct drm_connector *connector, struct edid *edid)
2819{
2820	struct drm_device *dev = connector->dev;
2821	struct drm_display_mode *mode, *tmp;
2822	LIST_HEAD(list);
2823	int modes = 0;
2824
2825	/* Don't add CEA modes if the CEA extension block is missing */
2826	if (!drm_find_cea_extension(edid))
2827		return 0;
2828
2829	/*
2830	 * Go through all probed modes and create a new mode
2831	 * with the alternate clock for certain CEA modes.
2832	 */
2833	list_for_each_entry(mode, &connector->probed_modes, head) {
2834		const struct drm_display_mode *cea_mode = NULL;
2835		struct drm_display_mode *newmode;
2836		u8 vic = drm_match_cea_mode(mode);
2837		unsigned int clock1, clock2;
2838
2839		if (drm_valid_cea_vic(vic)) {
2840			cea_mode = &edid_cea_modes[vic];
2841			clock2 = cea_mode_alternate_clock(cea_mode);
2842		} else {
2843			vic = drm_match_hdmi_mode(mode);
2844			if (drm_valid_hdmi_vic(vic)) {
2845				cea_mode = &edid_4k_modes[vic];
2846				clock2 = hdmi_mode_alternate_clock(cea_mode);
2847			}
2848		}
2849
2850		if (!cea_mode)
2851			continue;
2852
2853		clock1 = cea_mode->clock;
2854
2855		if (clock1 == clock2)
2856			continue;
2857
2858		if (mode->clock != clock1 && mode->clock != clock2)
2859			continue;
2860
2861		newmode = drm_mode_duplicate(dev, cea_mode);
2862		if (!newmode)
2863			continue;
2864
2865		/* Carry over the stereo flags */
2866		newmode->flags |= mode->flags & DRM_MODE_FLAG_3D_MASK;
2867
2868		/*
2869		 * The current mode could be either variant. Make
2870		 * sure to pick the "other" clock for the new mode.
2871		 */
2872		if (mode->clock != clock1)
2873			newmode->clock = clock1;
2874		else
2875			newmode->clock = clock2;
2876
2877		list_add_tail(&newmode->head, &list);
2878	}
2879
2880	list_for_each_entry_safe(mode, tmp, &list, head) {
2881		list_del(&mode->head);
2882		drm_mode_probed_add(connector, mode);
2883		modes++;
2884	}
2885
2886	return modes;
2887}
2888
2889static struct drm_display_mode *
2890drm_display_mode_from_vic_index(struct drm_connector *connector,
2891				const u8 *video_db, u8 video_len,
2892				u8 video_index)
2893{
2894	struct drm_device *dev = connector->dev;
2895	struct drm_display_mode *newmode;
2896	u8 vic;
2897
2898	if (video_db == NULL || video_index >= video_len)
2899		return NULL;
2900
2901	/* CEA modes are numbered 1..127 */
2902	vic = (video_db[video_index] & 127);
2903	if (!drm_valid_cea_vic(vic))
2904		return NULL;
2905
2906	newmode = drm_mode_duplicate(dev, &edid_cea_modes[vic]);
2907	if (!newmode)
2908		return NULL;
2909
2910	newmode->vrefresh = 0;
2911
2912	return newmode;
2913}
2914
2915static int
2916do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len)
2917{
2918	int i, modes = 0;
2919
2920	for (i = 0; i < len; i++) {
2921		struct drm_display_mode *mode;
2922		mode = drm_display_mode_from_vic_index(connector, db, len, i);
2923		if (mode) {
2924			drm_mode_probed_add(connector, mode);
2925			modes++;
2926		}
2927	}
2928
2929	return modes;
2930}
2931
2932struct stereo_mandatory_mode {
2933	int width, height, vrefresh;
2934	unsigned int flags;
2935};
2936
2937static const struct stereo_mandatory_mode stereo_mandatory_modes[] = {
2938	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2939	{ 1920, 1080, 24, DRM_MODE_FLAG_3D_FRAME_PACKING },
2940	{ 1920, 1080, 50,
2941	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2942	{ 1920, 1080, 60,
2943	  DRM_MODE_FLAG_INTERLACE | DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF },
2944	{ 1280, 720,  50, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2945	{ 1280, 720,  50, DRM_MODE_FLAG_3D_FRAME_PACKING },
2946	{ 1280, 720,  60, DRM_MODE_FLAG_3D_TOP_AND_BOTTOM },
2947	{ 1280, 720,  60, DRM_MODE_FLAG_3D_FRAME_PACKING }
2948};
2949
2950static bool
2951stereo_match_mandatory(const struct drm_display_mode *mode,
2952		       const struct stereo_mandatory_mode *stereo_mode)
2953{
2954	unsigned int interlaced = mode->flags & DRM_MODE_FLAG_INTERLACE;
2955
2956	return mode->hdisplay == stereo_mode->width &&
2957	       mode->vdisplay == stereo_mode->height &&
2958	       interlaced == (stereo_mode->flags & DRM_MODE_FLAG_INTERLACE) &&
2959	       drm_mode_vrefresh(mode) == stereo_mode->vrefresh;
2960}
2961
2962static int add_hdmi_mandatory_stereo_modes(struct drm_connector *connector)
2963{
2964	struct drm_device *dev = connector->dev;
2965	const struct drm_display_mode *mode;
2966	struct list_head stereo_modes;
2967	int modes = 0, i;
2968
2969	INIT_LIST_HEAD(&stereo_modes);
2970
2971	list_for_each_entry(mode, &connector->probed_modes, head) {
2972		for (i = 0; i < ARRAY_SIZE(stereo_mandatory_modes); i++) {
2973			const struct stereo_mandatory_mode *mandatory;
2974			struct drm_display_mode *new_mode;
2975
2976			if (!stereo_match_mandatory(mode,
2977						    &stereo_mandatory_modes[i]))
2978				continue;
2979
2980			mandatory = &stereo_mandatory_modes[i];
2981			new_mode = drm_mode_duplicate(dev, mode);
2982			if (!new_mode)
2983				continue;
2984
2985			new_mode->flags |= mandatory->flags;
2986			list_add_tail(&new_mode->head, &stereo_modes);
2987			modes++;
2988		}
2989	}
2990
2991	list_splice_tail(&stereo_modes, &connector->probed_modes);
2992
2993	return modes;
2994}
2995
2996static int add_hdmi_mode(struct drm_connector *connector, u8 vic)
2997{
2998	struct drm_device *dev = connector->dev;
2999	struct drm_display_mode *newmode;
3000
3001	if (!drm_valid_hdmi_vic(vic)) {
3002		DRM_ERROR("Unknown HDMI VIC: %d\n", vic);
3003		return 0;
3004	}
3005
3006	newmode = drm_mode_duplicate(dev, &edid_4k_modes[vic]);
3007	if (!newmode)
3008		return 0;
3009
3010	drm_mode_probed_add(connector, newmode);
3011
3012	return 1;
3013}
3014
3015static int add_3d_struct_modes(struct drm_connector *connector, u16 structure,
3016			       const u8 *video_db, u8 video_len, u8 video_index)
3017{
3018	struct drm_display_mode *newmode;
3019	int modes = 0;
3020
3021	if (structure & (1 << 0)) {
3022		newmode = drm_display_mode_from_vic_index(connector, video_db,
3023							  video_len,
3024							  video_index);
3025		if (newmode) {
3026			newmode->flags |= DRM_MODE_FLAG_3D_FRAME_PACKING;
3027			drm_mode_probed_add(connector, newmode);
3028			modes++;
3029		}
3030	}
3031	if (structure & (1 << 6)) {
3032		newmode = drm_display_mode_from_vic_index(connector, video_db,
3033							  video_len,
3034							  video_index);
3035		if (newmode) {
3036			newmode->flags |= DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3037			drm_mode_probed_add(connector, newmode);
3038			modes++;
3039		}
3040	}
3041	if (structure & (1 << 8)) {
3042		newmode = drm_display_mode_from_vic_index(connector, video_db,
3043							  video_len,
3044							  video_index);
3045		if (newmode) {
3046			newmode->flags |= DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3047			drm_mode_probed_add(connector, newmode);
3048			modes++;
3049		}
3050	}
3051
3052	return modes;
3053}
3054
3055/*
3056 * do_hdmi_vsdb_modes - Parse the HDMI Vendor Specific data block
3057 * @connector: connector corresponding to the HDMI sink
3058 * @db: start of the CEA vendor specific block
3059 * @len: length of the CEA block payload, ie. one can access up to db[len]
3060 *
3061 * Parses the HDMI VSDB looking for modes to add to @connector. This function
3062 * also adds the stereo 3d modes when applicable.
3063 */
3064static int
3065do_hdmi_vsdb_modes(struct drm_connector *connector, const u8 *db, u8 len,
3066		   const u8 *video_db, u8 video_len)
3067{
3068	int modes = 0, offset = 0, i, multi_present = 0, multi_len;
3069	u8 vic_len, hdmi_3d_len = 0;
3070	u16 mask;
3071	u16 structure_all;
3072
3073	if (len < 8)
3074		goto out;
3075
3076	/* no HDMI_Video_Present */
3077	if (!(db[8] & (1 << 5)))
3078		goto out;
3079
3080	/* Latency_Fields_Present */
3081	if (db[8] & (1 << 7))
3082		offset += 2;
3083
3084	/* I_Latency_Fields_Present */
3085	if (db[8] & (1 << 6))
3086		offset += 2;
3087
3088	/* the declared length is not long enough for the 2 first bytes
3089	 * of additional video format capabilities */
3090	if (len < (8 + offset + 2))
3091		goto out;
3092
3093	/* 3D_Present */
3094	offset++;
3095	if (db[8 + offset] & (1 << 7)) {
3096		modes += add_hdmi_mandatory_stereo_modes(connector);
3097
3098		/* 3D_Multi_present */
3099		multi_present = (db[8 + offset] & 0x60) >> 5;
3100	}
3101
3102	offset++;
3103	vic_len = db[8 + offset] >> 5;
3104	hdmi_3d_len = db[8 + offset] & 0x1f;
3105
3106	for (i = 0; i < vic_len && len >= (9 + offset + i); i++) {
3107		u8 vic;
3108
3109		vic = db[9 + offset + i];
3110		modes += add_hdmi_mode(connector, vic);
3111	}
3112	offset += 1 + vic_len;
3113
3114	if (multi_present == 1)
3115		multi_len = 2;
3116	else if (multi_present == 2)
3117		multi_len = 4;
3118	else
3119		multi_len = 0;
3120
3121	if (len < (8 + offset + hdmi_3d_len - 1))
3122		goto out;
3123
3124	if (hdmi_3d_len < multi_len)
3125		goto out;
3126
3127	if (multi_present == 1 || multi_present == 2) {
3128		/* 3D_Structure_ALL */
3129		structure_all = (db[8 + offset] << 8) | db[9 + offset];
3130
3131		/* check if 3D_MASK is present */
3132		if (multi_present == 2)
3133			mask = (db[10 + offset] << 8) | db[11 + offset];
3134		else
3135			mask = 0xffff;
3136
3137		for (i = 0; i < 16; i++) {
3138			if (mask & (1 << i))
3139				modes += add_3d_struct_modes(connector,
3140						structure_all,
3141						video_db,
3142						video_len, i);
3143		}
3144	}
3145
3146	offset += multi_len;
3147
3148	for (i = 0; i < (hdmi_3d_len - multi_len); i++) {
3149		int vic_index;
3150		struct drm_display_mode *newmode = NULL;
3151		unsigned int newflag = 0;
3152		bool detail_present;
3153
3154		detail_present = ((db[8 + offset + i] & 0x0f) > 7);
3155
3156		if (detail_present && (i + 1 == hdmi_3d_len - multi_len))
3157			break;
3158
3159		/* 2D_VIC_order_X */
3160		vic_index = db[8 + offset + i] >> 4;
3161
3162		/* 3D_Structure_X */
3163		switch (db[8 + offset + i] & 0x0f) {
3164		case 0:
3165			newflag = DRM_MODE_FLAG_3D_FRAME_PACKING;
3166			break;
3167		case 6:
3168			newflag = DRM_MODE_FLAG_3D_TOP_AND_BOTTOM;
3169			break;
3170		case 8:
3171			/* 3D_Detail_X */
3172			if ((db[9 + offset + i] >> 4) == 1)
3173				newflag = DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF;
3174			break;
3175		}
3176
3177		if (newflag != 0) {
3178			newmode = drm_display_mode_from_vic_index(connector,
3179								  video_db,
3180								  video_len,
3181								  vic_index);
3182
3183			if (newmode) {
3184				newmode->flags |= newflag;
3185				drm_mode_probed_add(connector, newmode);
3186				modes++;
3187			}
3188		}
3189
3190		if (detail_present)
3191			i++;
3192	}
3193
3194out:
3195	return modes;
3196}
3197
3198static int
3199cea_db_payload_len(const u8 *db)
3200{
3201	return db[0] & 0x1f;
3202}
3203
3204static int
3205cea_db_tag(const u8 *db)
3206{
3207	return db[0] >> 5;
3208}
3209
3210static int
3211cea_revision(const u8 *cea)
3212{
3213	return cea[1];
3214}
3215
3216static int
3217cea_db_offsets(const u8 *cea, int *start, int *end)
3218{
3219	/* Data block offset in CEA extension block */
3220	*start = 4;
3221	*end = cea[2];
3222	if (*end == 0)
3223		*end = 127;
3224	if (*end < 4 || *end > 127)
3225		return -ERANGE;
3226	return 0;
3227}
3228
3229static bool cea_db_is_hdmi_vsdb(const u8 *db)
3230{
3231	int hdmi_id;
3232
3233	if (cea_db_tag(db) != VENDOR_BLOCK)
3234		return false;
3235
3236	if (cea_db_payload_len(db) < 5)
3237		return false;
3238
3239	hdmi_id = db[1] | (db[2] << 8) | (db[3] << 16);
3240
3241	return hdmi_id == HDMI_IEEE_OUI;
3242}
3243
3244#define for_each_cea_db(cea, i, start, end) \
3245	for ((i) = (start); (i) < (end) && (i) + cea_db_payload_len(&(cea)[(i)]) < (end); (i) += cea_db_payload_len(&(cea)[(i)]) + 1)
3246
3247static int
3248add_cea_modes(struct drm_connector *connector, struct edid *edid)
3249{
3250	const u8 *cea = drm_find_cea_extension(edid);
3251	const u8 *db, *hdmi = NULL, *video = NULL;
3252	u8 dbl, hdmi_len, video_len = 0;
3253	int modes = 0;
3254
3255	if (cea && cea_revision(cea) >= 3) {
3256		int i, start, end;
3257
3258		if (cea_db_offsets(cea, &start, &end))
3259			return 0;
3260
3261		for_each_cea_db(cea, i, start, end) {
3262			db = &cea[i];
3263			dbl = cea_db_payload_len(db);
3264
3265			if (cea_db_tag(db) == VIDEO_BLOCK) {
3266				video = db + 1;
3267				video_len = dbl;
3268				modes += do_cea_modes(connector, video, dbl);
3269			}
3270			else if (cea_db_is_hdmi_vsdb(db)) {
3271				hdmi = db;
3272				hdmi_len = dbl;
3273			}
3274		}
3275	}
3276
3277	/*
3278	 * We parse the HDMI VSDB after having added the cea modes as we will
3279	 * be patching their flags when the sink supports stereo 3D.
3280	 */
3281	if (hdmi)
3282		modes += do_hdmi_vsdb_modes(connector, hdmi, hdmi_len, video,
3283					    video_len);
3284
3285	return modes;
3286}
3287
3288static void fixup_detailed_cea_mode_clock(struct drm_display_mode *mode)
3289{
3290	const struct drm_display_mode *cea_mode;
3291	int clock1, clock2, clock;
3292	u8 vic;
3293	const char *type;
3294
3295	/*
3296	 * allow 5kHz clock difference either way to account for
3297	 * the 10kHz clock resolution limit of detailed timings.
3298	 */
3299	vic = drm_match_cea_mode_clock_tolerance(mode, 5);
3300	if (drm_valid_cea_vic(vic)) {
3301		type = "CEA";
3302		cea_mode = &edid_cea_modes[vic];
3303		clock1 = cea_mode->clock;
3304		clock2 = cea_mode_alternate_clock(cea_mode);
3305	} else {
3306		vic = drm_match_hdmi_mode_clock_tolerance(mode, 5);
3307		if (drm_valid_hdmi_vic(vic)) {
3308			type = "HDMI";
3309			cea_mode = &edid_4k_modes[vic];
3310			clock1 = cea_mode->clock;
3311			clock2 = hdmi_mode_alternate_clock(cea_mode);
3312		} else {
3313			return;
3314		}
3315	}
3316
3317	/* pick whichever is closest */
3318	if (abs(mode->clock - clock1) < abs(mode->clock - clock2))
3319		clock = clock1;
3320	else
3321		clock = clock2;
3322
3323	if (mode->clock == clock)
3324		return;
3325
3326	DRM_DEBUG("detailed mode matches %s VIC %d, adjusting clock %d -> %d\n",
3327		  type, vic, mode->clock, clock);
3328	mode->clock = clock;
3329}
3330
3331static void
3332drm_parse_hdmi_vsdb_audio(struct drm_connector *connector, const u8 *db)
3333{
3334	u8 len = cea_db_payload_len(db);
3335
3336	if (len >= 6)
3337		connector->eld[5] |= (db[6] >> 7) << 1;  /* Supports_AI */
3338	if (len >= 8) {
3339		connector->latency_present[0] = db[8] >> 7;
3340		connector->latency_present[1] = (db[8] >> 6) & 1;
3341	}
3342	if (len >= 9)
3343		connector->video_latency[0] = db[9];
3344	if (len >= 10)
3345		connector->audio_latency[0] = db[10];
3346	if (len >= 11)
3347		connector->video_latency[1] = db[11];
3348	if (len >= 12)
3349		connector->audio_latency[1] = db[12];
3350
3351	DRM_DEBUG_KMS("HDMI: latency present %d %d, "
3352		      "video latency %d %d, "
3353		      "audio latency %d %d\n",
3354		      connector->latency_present[0],
3355		      connector->latency_present[1],
3356		      connector->video_latency[0],
3357		      connector->video_latency[1],
3358		      connector->audio_latency[0],
3359		      connector->audio_latency[1]);
3360}
3361
3362static void
3363monitor_name(struct detailed_timing *t, void *data)
3364{
3365	if (t->data.other_data.type == EDID_DETAIL_MONITOR_NAME)
3366		*(u8 **)data = t->data.other_data.data.str.str;
3367}
3368
3369static int get_monitor_name(struct edid *edid, char name[13])
3370{
3371	char *edid_name = NULL;
3372	int mnl;
3373
3374	if (!edid || !name)
3375		return 0;
3376
3377	drm_for_each_detailed_block((u8 *)edid, monitor_name, &edid_name);
3378	for (mnl = 0; edid_name && mnl < 13; mnl++) {
3379		if (edid_name[mnl] == 0x0a)
3380			break;
3381
3382		name[mnl] = edid_name[mnl];
3383	}
3384
3385	return mnl;
3386}
3387
3388/**
3389 * drm_edid_get_monitor_name - fetch the monitor name from the edid
3390 * @edid: monitor EDID information
3391 * @name: pointer to a character array to hold the name of the monitor
3392 * @bufsize: The size of the name buffer (should be at least 14 chars.)
3393 *
3394 */
3395void drm_edid_get_monitor_name(struct edid *edid, char *name, int bufsize)
3396{
3397	int name_length;
3398	char buf[13];
3399	
3400	if (bufsize <= 0)
3401		return;
3402
3403	name_length = min(get_monitor_name(edid, buf), bufsize - 1);
3404	memcpy(name, buf, name_length);
3405	name[name_length] = '\0';
3406}
3407EXPORT_SYMBOL(drm_edid_get_monitor_name);
3408
3409/**
3410 * drm_edid_to_eld - build ELD from EDID
3411 * @connector: connector corresponding to the HDMI/DP sink
3412 * @edid: EDID to parse
3413 *
3414 * Fill the ELD (EDID-Like Data) buffer for passing to the audio driver. The
3415 * Conn_Type, HDCP and Port_ID ELD fields are left for the graphics driver to
3416 * fill in.
3417 */
3418void drm_edid_to_eld(struct drm_connector *connector, struct edid *edid)
3419{
3420	uint8_t *eld = connector->eld;
3421	u8 *cea;
3422	u8 *db;
3423	int total_sad_count = 0;
3424	int mnl;
3425	int dbl;
3426
3427	memset(eld, 0, sizeof(connector->eld));
3428
3429	connector->latency_present[0] = false;
3430	connector->latency_present[1] = false;
3431	connector->video_latency[0] = 0;
3432	connector->audio_latency[0] = 0;
3433	connector->video_latency[1] = 0;
3434	connector->audio_latency[1] = 0;
3435
3436	cea = drm_find_cea_extension(edid);
3437	if (!cea) {
3438		DRM_DEBUG_KMS("ELD: no CEA Extension found\n");
3439		return;
3440	}
3441
3442	mnl = get_monitor_name(edid, eld + 20);
3443
3444	eld[4] = (cea[1] << 5) | mnl;
3445	DRM_DEBUG_KMS("ELD monitor %s\n", eld + 20);
3446
3447	eld[0] = 2 << 3;		/* ELD version: 2 */
3448
3449	eld[16] = edid->mfg_id[0];
3450	eld[17] = edid->mfg_id[1];
3451	eld[18] = edid->prod_code[0];
3452	eld[19] = edid->prod_code[1];
3453
3454	if (cea_revision(cea) >= 3) {
3455		int i, start, end;
3456
3457		if (cea_db_offsets(cea, &start, &end)) {
3458			start = 0;
3459			end = 0;
3460		}
3461
3462		for_each_cea_db(cea, i, start, end) {
3463			db = &cea[i];
3464			dbl = cea_db_payload_len(db);
3465
3466			switch (cea_db_tag(db)) {
3467				int sad_count;
3468
3469			case AUDIO_BLOCK:
3470				/* Audio Data Block, contains SADs */
3471				sad_count = min(dbl / 3, 15 - total_sad_count);
3472				if (sad_count >= 1)
3473					memcpy(eld + 20 + mnl + total_sad_count * 3,
3474					       &db[1], sad_count * 3);
3475				total_sad_count += sad_count;
3476				break;
3477			case SPEAKER_BLOCK:
3478				/* Speaker Allocation Data Block */
3479				if (dbl >= 1)
3480					eld[7] = db[1];
3481				break;
3482			case VENDOR_BLOCK:
3483				/* HDMI Vendor-Specific Data Block */
3484				if (cea_db_is_hdmi_vsdb(db))
3485					drm_parse_hdmi_vsdb_audio(connector, db);
3486				break;
3487			default:
3488				break;
3489			}
3490		}
3491	}
3492	eld[5] |= total_sad_count << 4;
3493
3494	eld[DRM_ELD_BASELINE_ELD_LEN] =
3495		DIV_ROUND_UP(drm_eld_calc_baseline_block_size(eld), 4);
3496
3497	DRM_DEBUG_KMS("ELD size %d, SAD count %d\n",
3498		      drm_eld_size(eld), total_sad_count);
3499}
3500EXPORT_SYMBOL(drm_edid_to_eld);
3501
3502/**
3503 * drm_edid_to_sad - extracts SADs from EDID
3504 * @edid: EDID to parse
3505 * @sads: pointer that will be set to the extracted SADs
3506 *
3507 * Looks for CEA EDID block and extracts SADs (Short Audio Descriptors) from it.
3508 *
3509 * Note: The returned pointer needs to be freed using kfree().
3510 *
3511 * Return: The number of found SADs or negative number on error.
3512 */
3513int drm_edid_to_sad(struct edid *edid, struct cea_sad **sads)
3514{
3515	int count = 0;
3516	int i, start, end, dbl;
3517	u8 *cea;
3518
3519	cea = drm_find_cea_extension(edid);
3520	if (!cea) {
3521		DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3522		return -ENOENT;
3523	}
3524
3525	if (cea_revision(cea) < 3) {
3526		DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3527		return -ENOTSUPP;
3528	}
3529
3530	if (cea_db_offsets(cea, &start, &end)) {
3531		DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3532		return -EPROTO;
3533	}
3534
3535	for_each_cea_db(cea, i, start, end) {
3536		u8 *db = &cea[i];
3537
3538		if (cea_db_tag(db) == AUDIO_BLOCK) {
3539			int j;
3540			dbl = cea_db_payload_len(db);
3541
3542			count = dbl / 3; /* SAD is 3B */
3543			*sads = kcalloc(count, sizeof(**sads), GFP_KERNEL);
3544			if (!*sads)
3545				return -ENOMEM;
3546			for (j = 0; j < count; j++) {
3547				u8 *sad = &db[1 + j * 3];
3548
3549				(*sads)[j].format = (sad[0] & 0x78) >> 3;
3550				(*sads)[j].channels = sad[0] & 0x7;
3551				(*sads)[j].freq = sad[1] & 0x7F;
3552				(*sads)[j].byte2 = sad[2];
3553			}
3554			break;
3555		}
3556	}
3557
3558	return count;
3559}
3560EXPORT_SYMBOL(drm_edid_to_sad);
3561
3562/**
3563 * drm_edid_to_speaker_allocation - extracts Speaker Allocation Data Blocks from EDID
3564 * @edid: EDID to parse
3565 * @sadb: pointer to the speaker block
3566 *
3567 * Looks for CEA EDID block and extracts the Speaker Allocation Data Block from it.
3568 *
3569 * Note: The returned pointer needs to be freed using kfree().
3570 *
3571 * Return: The number of found Speaker Allocation Blocks or negative number on
3572 * error.
3573 */
3574int drm_edid_to_speaker_allocation(struct edid *edid, u8 **sadb)
3575{
3576	int count = 0;
3577	int i, start, end, dbl;
3578	const u8 *cea;
3579
3580	cea = drm_find_cea_extension(edid);
3581	if (!cea) {
3582		DRM_DEBUG_KMS("SAD: no CEA Extension found\n");
3583		return -ENOENT;
3584	}
3585
3586	if (cea_revision(cea) < 3) {
3587		DRM_DEBUG_KMS("SAD: wrong CEA revision\n");
3588		return -ENOTSUPP;
3589	}
3590
3591	if (cea_db_offsets(cea, &start, &end)) {
3592		DRM_DEBUG_KMS("SAD: invalid data block offsets\n");
3593		return -EPROTO;
3594	}
3595
3596	for_each_cea_db(cea, i, start, end) {
3597		const u8 *db = &cea[i];
3598
3599		if (cea_db_tag(db) == SPEAKER_BLOCK) {
3600			dbl = cea_db_payload_len(db);
3601
3602			/* Speaker Allocation Data Block */
3603			if (dbl == 3) {
3604				*sadb = kmemdup(&db[1], dbl, GFP_KERNEL);
3605				if (!*sadb)
3606					return -ENOMEM;
3607				count = dbl;
3608				break;
3609			}
3610		}
3611	}
3612
3613	return count;
3614}
3615EXPORT_SYMBOL(drm_edid_to_speaker_allocation);
3616
3617/**
3618 * drm_av_sync_delay - compute the HDMI/DP sink audio-video sync delay
3619 * @connector: connector associated with the HDMI/DP sink
3620 * @mode: the display mode
3621 *
3622 * Return: The HDMI/DP sink's audio-video sync delay in milliseconds or 0 if
3623 * the sink doesn't support audio or video.
3624 */
3625int drm_av_sync_delay(struct drm_connector *connector,
3626		      const struct drm_display_mode *mode)
3627{
3628	int i = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
3629	int a, v;
3630
3631	if (!connector->latency_present[0])
3632		return 0;
3633	if (!connector->latency_present[1])
3634		i = 0;
3635
3636	a = connector->audio_latency[i];
3637	v = connector->video_latency[i];
3638
3639	/*
3640	 * HDMI/DP sink doesn't support audio or video?
3641	 */
3642	if (a == 255 || v == 255)
3643		return 0;
3644
3645	/*
3646	 * Convert raw EDID values to millisecond.
3647	 * Treat unknown latency as 0ms.
3648	 */
3649	if (a)
3650		a = min(2 * (a - 1), 500);
3651	if (v)
3652		v = min(2 * (v - 1), 500);
3653
3654	return max(v - a, 0);
3655}
3656EXPORT_SYMBOL(drm_av_sync_delay);
3657
3658/**
3659 * drm_detect_hdmi_monitor - detect whether monitor is HDMI
3660 * @edid: monitor EDID information
3661 *
3662 * Parse the CEA extension according to CEA-861-B.
3663 *
3664 * Return: True if the monitor is HDMI, false if not or unknown.
3665 */
3666bool drm_detect_hdmi_monitor(struct edid *edid)
3667{
3668	u8 *edid_ext;
3669	int i;
3670	int start_offset, end_offset;
 
3671
3672	edid_ext = drm_find_cea_extension(edid);
3673	if (!edid_ext)
3674		return false;
3675
3676	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3677		return false;
 
3678
3679	/*
3680	 * Because HDMI identifier is in Vendor Specific Block,
3681	 * search it from all data blocks of CEA extension.
3682	 */
3683	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3684		if (cea_db_is_hdmi_vsdb(&edid_ext[i]))
3685			return true;
 
 
 
 
 
 
 
 
 
3686	}
3687
3688	return false;
 
3689}
3690EXPORT_SYMBOL(drm_detect_hdmi_monitor);
3691
3692/**
3693 * drm_detect_monitor_audio - check monitor audio capability
3694 * @edid: EDID block to scan
3695 *
3696 * Monitor should have CEA extension block.
3697 * If monitor has 'basic audio', but no CEA audio blocks, it's 'basic
3698 * audio' only. If there is any audio extension block and supported
3699 * audio format, assume at least 'basic audio' support, even if 'basic
3700 * audio' is not defined in EDID.
3701 *
3702 * Return: True if the monitor supports audio, false otherwise.
3703 */
3704bool drm_detect_monitor_audio(struct edid *edid)
3705{
3706	u8 *edid_ext;
3707	int i, j;
3708	bool has_audio = false;
3709	int start_offset, end_offset;
3710
3711	edid_ext = drm_find_cea_extension(edid);
3712	if (!edid_ext)
3713		goto end;
3714
3715	has_audio = ((edid_ext[3] & EDID_BASIC_AUDIO) != 0);
3716
3717	if (has_audio) {
3718		DRM_DEBUG_KMS("Monitor has basic audio support\n");
3719		goto end;
3720	}
3721
3722	if (cea_db_offsets(edid_ext, &start_offset, &end_offset))
3723		goto end;
 
3724
3725	for_each_cea_db(edid_ext, i, start_offset, end_offset) {
3726		if (cea_db_tag(&edid_ext[i]) == AUDIO_BLOCK) {
 
3727			has_audio = true;
3728			for (j = 1; j < cea_db_payload_len(&edid_ext[i]) + 1; j += 3)
3729				DRM_DEBUG_KMS("CEA audio format %d\n",
3730					      (edid_ext[i + j] >> 3) & 0xf);
3731			goto end;
3732		}
3733	}
3734end:
3735	return has_audio;
3736}
3737EXPORT_SYMBOL(drm_detect_monitor_audio);
3738
3739/**
3740 * drm_rgb_quant_range_selectable - is RGB quantization range selectable?
3741 * @edid: EDID block to scan
 
3742 *
3743 * Check whether the monitor reports the RGB quantization range selection
3744 * as supported. The AVI infoframe can then be used to inform the monitor
3745 * which quantization range (full or limited) is used.
3746 *
3747 * Return: True if the RGB quantization range is selectable, false otherwise.
3748 */
3749bool drm_rgb_quant_range_selectable(struct edid *edid)
 
3750{
3751	u8 *edid_ext;
3752	int i, start, end;
3753
3754	edid_ext = drm_find_cea_extension(edid);
3755	if (!edid_ext)
3756		return false;
3757
3758	if (cea_db_offsets(edid_ext, &start, &end))
3759		return false;
3760
3761	for_each_cea_db(edid_ext, i, start, end) {
3762		if (cea_db_tag(&edid_ext[i]) == VIDEO_CAPABILITY_BLOCK &&
3763		    cea_db_payload_len(&edid_ext[i]) == 2) {
3764			DRM_DEBUG_KMS("CEA VCDB 0x%02x\n", edid_ext[i + 2]);
3765			return edid_ext[i + 2] & EDID_CEA_VCDB_QS;
3766		}
3767	}
3768
3769	return false;
3770}
3771EXPORT_SYMBOL(drm_rgb_quant_range_selectable);
3772
3773static void drm_parse_hdmi_deep_color_info(struct drm_connector *connector,
3774					   const u8 *hdmi)
3775{
3776	struct drm_display_info *info = &connector->display_info;
3777	unsigned int dc_bpc = 0;
3778
3779	/* HDMI supports at least 8 bpc */
3780	info->bpc = 8;
3781
3782	if (cea_db_payload_len(hdmi) < 6)
3783		return;
3784
3785	if (hdmi[6] & DRM_EDID_HDMI_DC_30) {
3786		dc_bpc = 10;
3787		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_30;
3788		DRM_DEBUG("%s: HDMI sink does deep color 30.\n",
3789			  connector->name);
3790	}
3791
3792	if (hdmi[6] & DRM_EDID_HDMI_DC_36) {
3793		dc_bpc = 12;
3794		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_36;
3795		DRM_DEBUG("%s: HDMI sink does deep color 36.\n",
3796			  connector->name);
3797	}
3798
3799	if (hdmi[6] & DRM_EDID_HDMI_DC_48) {
3800		dc_bpc = 16;
3801		info->edid_hdmi_dc_modes |= DRM_EDID_HDMI_DC_48;
3802		DRM_DEBUG("%s: HDMI sink does deep color 48.\n",
3803			  connector->name);
3804	}
3805
3806	if (dc_bpc == 0) {
3807		DRM_DEBUG("%s: No deep color support on this HDMI sink.\n",
3808			  connector->name);
3809		return;
3810	}
3811
3812	DRM_DEBUG("%s: Assigning HDMI sink color depth as %d bpc.\n",
3813		  connector->name, dc_bpc);
3814	info->bpc = dc_bpc;
3815
3816	/*
3817	 * Deep color support mandates RGB444 support for all video
3818	 * modes and forbids YCRCB422 support for all video modes per
3819	 * HDMI 1.3 spec.
3820	 */
3821	info->color_formats = DRM_COLOR_FORMAT_RGB444;
3822
3823	/* YCRCB444 is optional according to spec. */
3824	if (hdmi[6] & DRM_EDID_HDMI_DC_Y444) {
3825		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3826		DRM_DEBUG("%s: HDMI sink does YCRCB444 in deep color.\n",
3827			  connector->name);
3828	}
3829
3830	/*
3831	 * Spec says that if any deep color mode is supported at all,
3832	 * then deep color 36 bit must be supported.
3833	 */
3834	if (!(hdmi[6] & DRM_EDID_HDMI_DC_36)) {
3835		DRM_DEBUG("%s: HDMI sink should do DC_36, but does not!\n",
3836			  connector->name);
3837	}
3838}
3839
3840static void
3841drm_parse_hdmi_vsdb_video(struct drm_connector *connector, const u8 *db)
3842{
3843	struct drm_display_info *info = &connector->display_info;
3844	u8 len = cea_db_payload_len(db);
3845
3846	if (len >= 6)
3847		info->dvi_dual = db[6] & 1;
3848	if (len >= 7)
3849		info->max_tmds_clock = db[7] * 5000;
3850
3851	DRM_DEBUG_KMS("HDMI: DVI dual %d, "
3852		      "max TMDS clock %d kHz\n",
3853		      info->dvi_dual,
3854		      info->max_tmds_clock);
3855
3856	drm_parse_hdmi_deep_color_info(connector, db);
3857}
3858
3859static void drm_parse_cea_ext(struct drm_connector *connector,
3860			      struct edid *edid)
3861{
3862	struct drm_display_info *info = &connector->display_info;
3863	const u8 *edid_ext;
3864	int i, start, end;
3865
3866	edid_ext = drm_find_cea_extension(edid);
3867	if (!edid_ext)
3868		return;
3869
3870	info->cea_rev = edid_ext[1];
3871
3872	/* The existence of a CEA block should imply RGB support */
3873	info->color_formats = DRM_COLOR_FORMAT_RGB444;
3874	if (edid_ext[3] & EDID_CEA_YCRCB444)
3875		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3876	if (edid_ext[3] & EDID_CEA_YCRCB422)
3877		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3878
3879	if (cea_db_offsets(edid_ext, &start, &end))
3880		return;
3881
3882	for_each_cea_db(edid_ext, i, start, end) {
3883		const u8 *db = &edid_ext[i];
3884
3885		if (cea_db_is_hdmi_vsdb(db))
3886			drm_parse_hdmi_vsdb_video(connector, db);
3887	}
3888}
3889
3890static void drm_add_display_info(struct drm_connector *connector,
3891				 struct edid *edid)
3892{
3893	struct drm_display_info *info = &connector->display_info;
3894
3895	info->width_mm = edid->width_cm * 10;
3896	info->height_mm = edid->height_cm * 10;
3897
3898	/* driver figures it out in this case */
3899	info->bpc = 0;
3900	info->color_formats = 0;
3901	info->cea_rev = 0;
3902	info->max_tmds_clock = 0;
3903	info->dvi_dual = false;
3904
3905	if (edid->revision < 3)
 
3906		return;
3907
3908	if (!(edid->input & DRM_EDID_INPUT_DIGITAL))
3909		return;
3910
3911	drm_parse_cea_ext(connector, edid);
3912
3913	/*
3914	 * Digital sink with "DFP 1.x compliant TMDS" according to EDID 1.3?
3915	 *
3916	 * For such displays, the DFP spec 1.0, section 3.10 "EDID support"
3917	 * tells us to assume 8 bpc color depth if the EDID doesn't have
3918	 * extensions which tell otherwise.
3919	 */
3920	if ((info->bpc == 0) && (edid->revision < 4) &&
3921	    (edid->input & DRM_EDID_DIGITAL_TYPE_DVI)) {
3922		info->bpc = 8;
3923		DRM_DEBUG("%s: Assigning DFP sink color depth as %d bpc.\n",
3924			  connector->name, info->bpc);
3925	}
3926
3927	/* Only defined for 1.4 with digital displays */
3928	if (edid->revision < 4)
3929		return;
3930
3931	switch (edid->input & DRM_EDID_DIGITAL_DEPTH_MASK) {
3932	case DRM_EDID_DIGITAL_DEPTH_6:
3933		info->bpc = 6;
3934		break;
3935	case DRM_EDID_DIGITAL_DEPTH_8:
3936		info->bpc = 8;
3937		break;
3938	case DRM_EDID_DIGITAL_DEPTH_10:
3939		info->bpc = 10;
3940		break;
3941	case DRM_EDID_DIGITAL_DEPTH_12:
3942		info->bpc = 12;
3943		break;
3944	case DRM_EDID_DIGITAL_DEPTH_14:
3945		info->bpc = 14;
3946		break;
3947	case DRM_EDID_DIGITAL_DEPTH_16:
3948		info->bpc = 16;
3949		break;
3950	case DRM_EDID_DIGITAL_DEPTH_UNDEF:
3951	default:
3952		info->bpc = 0;
3953		break;
3954	}
3955
3956	DRM_DEBUG("%s: Assigning EDID-1.4 digital sink color depth as %d bpc.\n",
3957			  connector->name, info->bpc);
 
 
 
3958
3959	info->color_formats |= DRM_COLOR_FORMAT_RGB444;
3960	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB444)
3961		info->color_formats |= DRM_COLOR_FORMAT_YCRCB444;
3962	if (edid->features & DRM_EDID_FEATURE_RGB_YCRCB422)
3963		info->color_formats |= DRM_COLOR_FORMAT_YCRCB422;
3964}
3965
3966static int validate_displayid(u8 *displayid, int length, int idx)
3967{
3968	int i;
3969	u8 csum = 0;
3970	struct displayid_hdr *base;
3971
3972	base = (struct displayid_hdr *)&displayid[idx];
3973
3974	DRM_DEBUG_KMS("base revision 0x%x, length %d, %d %d\n",
3975		      base->rev, base->bytes, base->prod_id, base->ext_count);
3976
3977	if (base->bytes + 5 > length - idx)
3978		return -EINVAL;
3979	for (i = idx; i <= base->bytes + 5; i++) {
3980		csum += displayid[i];
3981	}
3982	if (csum) {
3983		DRM_ERROR("DisplayID checksum invalid, remainder is %d\n", csum);
3984		return -EINVAL;
3985	}
3986	return 0;
3987}
3988
3989static struct drm_display_mode *drm_mode_displayid_detailed(struct drm_device *dev,
3990							    struct displayid_detailed_timings_1 *timings)
3991{
3992	struct drm_display_mode *mode;
3993	unsigned pixel_clock = (timings->pixel_clock[0] |
3994				(timings->pixel_clock[1] << 8) |
3995				(timings->pixel_clock[2] << 16));
3996	unsigned hactive = (timings->hactive[0] | timings->hactive[1] << 8) + 1;
3997	unsigned hblank = (timings->hblank[0] | timings->hblank[1] << 8) + 1;
3998	unsigned hsync = (timings->hsync[0] | (timings->hsync[1] & 0x7f) << 8) + 1;
3999	unsigned hsync_width = (timings->hsw[0] | timings->hsw[1] << 8) + 1;
4000	unsigned vactive = (timings->vactive[0] | timings->vactive[1] << 8) + 1;
4001	unsigned vblank = (timings->vblank[0] | timings->vblank[1] << 8) + 1;
4002	unsigned vsync = (timings->vsync[0] | (timings->vsync[1] & 0x7f) << 8) + 1;
4003	unsigned vsync_width = (timings->vsw[0] | timings->vsw[1] << 8) + 1;
4004	bool hsync_positive = (timings->hsync[1] >> 7) & 0x1;
4005	bool vsync_positive = (timings->vsync[1] >> 7) & 0x1;
4006	mode = drm_mode_create(dev);
4007	if (!mode)
4008		return NULL;
4009
4010	mode->clock = pixel_clock * 10;
4011	mode->hdisplay = hactive;
4012	mode->hsync_start = mode->hdisplay + hsync;
4013	mode->hsync_end = mode->hsync_start + hsync_width;
4014	mode->htotal = mode->hdisplay + hblank;
4015
4016	mode->vdisplay = vactive;
4017	mode->vsync_start = mode->vdisplay + vsync;
4018	mode->vsync_end = mode->vsync_start + vsync_width;
4019	mode->vtotal = mode->vdisplay + vblank;
4020
4021	mode->flags = 0;
4022	mode->flags |= hsync_positive ? DRM_MODE_FLAG_PHSYNC : DRM_MODE_FLAG_NHSYNC;
4023	mode->flags |= vsync_positive ? DRM_MODE_FLAG_PVSYNC : DRM_MODE_FLAG_NVSYNC;
4024	mode->type = DRM_MODE_TYPE_DRIVER;
4025
4026	if (timings->flags & 0x80)
4027		mode->type |= DRM_MODE_TYPE_PREFERRED;
4028	mode->vrefresh = drm_mode_vrefresh(mode);
4029	drm_mode_set_name(mode);
4030
4031	return mode;
4032}
4033
4034static int add_displayid_detailed_1_modes(struct drm_connector *connector,
4035					  struct displayid_block *block)
4036{
4037	struct displayid_detailed_timing_block *det = (struct displayid_detailed_timing_block *)block;
4038	int i;
4039	int num_timings;
4040	struct drm_display_mode *newmode;
4041	int num_modes = 0;
4042	/* blocks must be multiple of 20 bytes length */
4043	if (block->num_bytes % 20)
4044		return 0;
4045
4046	num_timings = block->num_bytes / 20;
4047	for (i = 0; i < num_timings; i++) {
4048		struct displayid_detailed_timings_1 *timings = &det->timings[i];
4049
4050		newmode = drm_mode_displayid_detailed(connector->dev, timings);
4051		if (!newmode)
4052			continue;
4053
4054		drm_mode_probed_add(connector, newmode);
4055		num_modes++;
4056	}
4057	return num_modes;
4058}
4059
4060static int add_displayid_detailed_modes(struct drm_connector *connector,
4061					struct edid *edid)
4062{
4063	u8 *displayid;
4064	int ret;
4065	int idx = 1;
4066	int length = EDID_LENGTH;
4067	struct displayid_block *block;
4068	int num_modes = 0;
4069
4070	displayid = drm_find_displayid_extension(edid);
4071	if (!displayid)
4072		return 0;
4073
4074	ret = validate_displayid(displayid, length, idx);
4075	if (ret)
4076		return 0;
4077
4078	idx += sizeof(struct displayid_hdr);
4079	while (block = (struct displayid_block *)&displayid[idx],
4080	       idx + sizeof(struct displayid_block) <= length &&
4081	       idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4082	       block->num_bytes > 0) {
4083		idx += block->num_bytes + sizeof(struct displayid_block);
4084		switch (block->tag) {
4085		case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4086			num_modes += add_displayid_detailed_1_modes(connector, block);
4087			break;
4088		}
4089	}
4090	return num_modes;
4091}
4092
4093/**
4094 * drm_add_edid_modes - add modes from EDID data, if available
4095 * @connector: connector we're probing
4096 * @edid: EDID data
4097 *
4098 * Add the specified modes to the connector's mode list. Also fills out the
4099 * &drm_display_info structure in @connector with any information which can be
4100 * derived from the edid.
4101 *
4102 * Return: The number of modes added or 0 if we couldn't find any.
4103 */
4104int drm_add_edid_modes(struct drm_connector *connector, struct edid *edid)
4105{
4106	int num_modes = 0;
4107	u32 quirks;
4108
4109	if (edid == NULL) {
4110		return 0;
4111	}
4112	if (!drm_edid_is_valid(edid)) {
4113		dev_warn(connector->dev->dev, "%s: EDID invalid.\n",
4114			 connector->name);
4115		return 0;
4116	}
4117
4118	quirks = edid_get_quirks(edid);
4119
4120	/*
4121	 * EDID spec says modes should be preferred in this order:
4122	 * - preferred detailed mode
4123	 * - other detailed modes from base block
4124	 * - detailed modes from extension blocks
4125	 * - CVT 3-byte code modes
4126	 * - standard timing codes
4127	 * - established timing codes
4128	 * - modes inferred from GTF or CVT range information
4129	 *
4130	 * We get this pretty much right.
4131	 *
4132	 * XXX order for additional mode types in extension blocks?
4133	 */
4134	num_modes += add_detailed_modes(connector, edid, quirks);
4135	num_modes += add_cvt_modes(connector, edid);
4136	num_modes += add_standard_modes(connector, edid);
4137	num_modes += add_established_modes(connector, edid);
4138	num_modes += add_cea_modes(connector, edid);
4139	num_modes += add_alternate_cea_modes(connector, edid);
4140	num_modes += add_displayid_detailed_modes(connector, edid);
4141	if (edid->features & DRM_EDID_FEATURE_DEFAULT_GTF)
4142		num_modes += add_inferred_modes(connector, edid);
4143
4144	if (quirks & (EDID_QUIRK_PREFER_LARGE_60 | EDID_QUIRK_PREFER_LARGE_75))
4145		edid_fixup_preferred(connector, quirks);
4146
4147	drm_add_display_info(connector, edid);
4148
4149	if (quirks & EDID_QUIRK_FORCE_6BPC)
4150		connector->display_info.bpc = 6;
4151
4152	if (quirks & EDID_QUIRK_FORCE_8BPC)
4153		connector->display_info.bpc = 8;
4154
4155	if (quirks & EDID_QUIRK_FORCE_12BPC)
4156		connector->display_info.bpc = 12;
4157
4158	return num_modes;
4159}
4160EXPORT_SYMBOL(drm_add_edid_modes);
4161
4162/**
4163 * drm_add_modes_noedid - add modes for the connectors without EDID
4164 * @connector: connector we're probing
4165 * @hdisplay: the horizontal display limit
4166 * @vdisplay: the vertical display limit
4167 *
4168 * Add the specified modes to the connector's mode list. Only when the
4169 * hdisplay/vdisplay is not beyond the given limit, it will be added.
4170 *
4171 * Return: The number of modes added or 0 if we couldn't find any.
4172 */
4173int drm_add_modes_noedid(struct drm_connector *connector,
4174			int hdisplay, int vdisplay)
4175{
4176	int i, count, num_modes = 0;
4177	struct drm_display_mode *mode;
4178	struct drm_device *dev = connector->dev;
4179
4180	count = ARRAY_SIZE(drm_dmt_modes);
4181	if (hdisplay < 0)
4182		hdisplay = 0;
4183	if (vdisplay < 0)
4184		vdisplay = 0;
4185
4186	for (i = 0; i < count; i++) {
4187		const struct drm_display_mode *ptr = &drm_dmt_modes[i];
4188		if (hdisplay && vdisplay) {
4189			/*
4190			 * Only when two are valid, they will be used to check
4191			 * whether the mode should be added to the mode list of
4192			 * the connector.
4193			 */
4194			if (ptr->hdisplay > hdisplay ||
4195					ptr->vdisplay > vdisplay)
4196				continue;
4197		}
4198		if (drm_mode_vrefresh(ptr) > 61)
4199			continue;
4200		mode = drm_mode_duplicate(dev, ptr);
4201		if (mode) {
4202			drm_mode_probed_add(connector, mode);
4203			num_modes++;
4204		}
4205	}
4206	return num_modes;
4207}
4208EXPORT_SYMBOL(drm_add_modes_noedid);
4209
4210/**
4211 * drm_set_preferred_mode - Sets the preferred mode of a connector
4212 * @connector: connector whose mode list should be processed
4213 * @hpref: horizontal resolution of preferred mode
4214 * @vpref: vertical resolution of preferred mode
4215 *
4216 * Marks a mode as preferred if it matches the resolution specified by @hpref
4217 * and @vpref.
4218 */
4219void drm_set_preferred_mode(struct drm_connector *connector,
4220			   int hpref, int vpref)
4221{
4222	struct drm_display_mode *mode;
4223
4224	list_for_each_entry(mode, &connector->probed_modes, head) {
4225		if (mode->hdisplay == hpref &&
4226		    mode->vdisplay == vpref)
4227			mode->type |= DRM_MODE_TYPE_PREFERRED;
4228	}
4229}
4230EXPORT_SYMBOL(drm_set_preferred_mode);
4231
4232/**
4233 * drm_hdmi_avi_infoframe_from_display_mode() - fill an HDMI AVI infoframe with
4234 *                                              data from a DRM display mode
4235 * @frame: HDMI AVI infoframe
4236 * @mode: DRM display mode
4237 *
4238 * Return: 0 on success or a negative error code on failure.
4239 */
4240int
4241drm_hdmi_avi_infoframe_from_display_mode(struct hdmi_avi_infoframe *frame,
4242					 const struct drm_display_mode *mode)
4243{
4244	int err;
4245
4246	if (!frame || !mode)
4247		return -EINVAL;
4248
4249	err = hdmi_avi_infoframe_init(frame);
4250	if (err < 0)
4251		return err;
4252
4253	if (mode->flags & DRM_MODE_FLAG_DBLCLK)
4254		frame->pixel_repeat = 1;
4255
4256	frame->video_code = drm_match_cea_mode(mode);
4257
4258	frame->picture_aspect = HDMI_PICTURE_ASPECT_NONE;
4259
4260	/*
4261	 * Populate picture aspect ratio from either
4262	 * user input (if specified) or from the CEA mode list.
4263	 */
4264	if (mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_4_3 ||
4265		mode->picture_aspect_ratio == HDMI_PICTURE_ASPECT_16_9)
4266		frame->picture_aspect = mode->picture_aspect_ratio;
4267	else if (frame->video_code > 0)
4268		frame->picture_aspect = drm_get_cea_aspect_ratio(
4269						frame->video_code);
4270
4271	frame->active_aspect = HDMI_ACTIVE_ASPECT_PICTURE;
4272	frame->scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
4273
4274	return 0;
4275}
4276EXPORT_SYMBOL(drm_hdmi_avi_infoframe_from_display_mode);
4277
4278static enum hdmi_3d_structure
4279s3d_structure_from_display_mode(const struct drm_display_mode *mode)
4280{
4281	u32 layout = mode->flags & DRM_MODE_FLAG_3D_MASK;
4282
4283	switch (layout) {
4284	case DRM_MODE_FLAG_3D_FRAME_PACKING:
4285		return HDMI_3D_STRUCTURE_FRAME_PACKING;
4286	case DRM_MODE_FLAG_3D_FIELD_ALTERNATIVE:
4287		return HDMI_3D_STRUCTURE_FIELD_ALTERNATIVE;
4288	case DRM_MODE_FLAG_3D_LINE_ALTERNATIVE:
4289		return HDMI_3D_STRUCTURE_LINE_ALTERNATIVE;
4290	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_FULL:
4291		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_FULL;
4292	case DRM_MODE_FLAG_3D_L_DEPTH:
4293		return HDMI_3D_STRUCTURE_L_DEPTH;
4294	case DRM_MODE_FLAG_3D_L_DEPTH_GFX_GFX_DEPTH:
4295		return HDMI_3D_STRUCTURE_L_DEPTH_GFX_GFX_DEPTH;
4296	case DRM_MODE_FLAG_3D_TOP_AND_BOTTOM:
4297		return HDMI_3D_STRUCTURE_TOP_AND_BOTTOM;
4298	case DRM_MODE_FLAG_3D_SIDE_BY_SIDE_HALF:
4299		return HDMI_3D_STRUCTURE_SIDE_BY_SIDE_HALF;
4300	default:
4301		return HDMI_3D_STRUCTURE_INVALID;
4302	}
4303}
4304
4305/**
4306 * drm_hdmi_vendor_infoframe_from_display_mode() - fill an HDMI infoframe with
4307 * data from a DRM display mode
4308 * @frame: HDMI vendor infoframe
4309 * @mode: DRM display mode
4310 *
4311 * Note that there's is a need to send HDMI vendor infoframes only when using a
4312 * 4k or stereoscopic 3D mode. So when giving any other mode as input this
4313 * function will return -EINVAL, error that can be safely ignored.
4314 *
4315 * Return: 0 on success or a negative error code on failure.
4316 */
4317int
4318drm_hdmi_vendor_infoframe_from_display_mode(struct hdmi_vendor_infoframe *frame,
4319					    const struct drm_display_mode *mode)
4320{
4321	int err;
4322	u32 s3d_flags;
4323	u8 vic;
4324
4325	if (!frame || !mode)
4326		return -EINVAL;
4327
4328	vic = drm_match_hdmi_mode(mode);
4329	s3d_flags = mode->flags & DRM_MODE_FLAG_3D_MASK;
4330
4331	if (!vic && !s3d_flags)
4332		return -EINVAL;
4333
4334	if (vic && s3d_flags)
4335		return -EINVAL;
4336
4337	err = hdmi_vendor_infoframe_init(frame);
4338	if (err < 0)
4339		return err;
4340
4341	if (vic)
4342		frame->vic = vic;
4343	else
4344		frame->s3d_struct = s3d_structure_from_display_mode(mode);
4345
4346	return 0;
4347}
4348EXPORT_SYMBOL(drm_hdmi_vendor_infoframe_from_display_mode);
4349
4350static int drm_parse_tiled_block(struct drm_connector *connector,
4351				 struct displayid_block *block)
4352{
4353	struct displayid_tiled_block *tile = (struct displayid_tiled_block *)block;
4354	u16 w, h;
4355	u8 tile_v_loc, tile_h_loc;
4356	u8 num_v_tile, num_h_tile;
4357	struct drm_tile_group *tg;
4358
4359	w = tile->tile_size[0] | tile->tile_size[1] << 8;
4360	h = tile->tile_size[2] | tile->tile_size[3] << 8;
4361
4362	num_v_tile = (tile->topo[0] & 0xf) | (tile->topo[2] & 0x30);
4363	num_h_tile = (tile->topo[0] >> 4) | ((tile->topo[2] >> 2) & 0x30);
4364	tile_v_loc = (tile->topo[1] & 0xf) | ((tile->topo[2] & 0x3) << 4);
4365	tile_h_loc = (tile->topo[1] >> 4) | (((tile->topo[2] >> 2) & 0x3) << 4);
4366
4367	connector->has_tile = true;
4368	if (tile->tile_cap & 0x80)
4369		connector->tile_is_single_monitor = true;
4370
4371	connector->num_h_tile = num_h_tile + 1;
4372	connector->num_v_tile = num_v_tile + 1;
4373	connector->tile_h_loc = tile_h_loc;
4374	connector->tile_v_loc = tile_v_loc;
4375	connector->tile_h_size = w + 1;
4376	connector->tile_v_size = h + 1;
4377
4378	DRM_DEBUG_KMS("tile cap 0x%x\n", tile->tile_cap);
4379	DRM_DEBUG_KMS("tile_size %d x %d\n", w + 1, h + 1);
4380	DRM_DEBUG_KMS("topo num tiles %dx%d, location %dx%d\n",
4381		      num_h_tile + 1, num_v_tile + 1, tile_h_loc, tile_v_loc);
4382	DRM_DEBUG_KMS("vend %c%c%c\n", tile->topology_id[0], tile->topology_id[1], tile->topology_id[2]);
4383
4384	tg = drm_mode_get_tile_group(connector->dev, tile->topology_id);
4385	if (!tg) {
4386		tg = drm_mode_create_tile_group(connector->dev, tile->topology_id);
4387	}
4388	if (!tg)
4389		return -ENOMEM;
4390
4391	if (connector->tile_group != tg) {
4392		/* if we haven't got a pointer,
4393		   take the reference, drop ref to old tile group */
4394		if (connector->tile_group) {
4395			drm_mode_put_tile_group(connector->dev, connector->tile_group);
4396		}
4397		connector->tile_group = tg;
4398	} else
4399		/* if same tile group, then release the ref we just took. */
4400		drm_mode_put_tile_group(connector->dev, tg);
4401	return 0;
4402}
4403
4404static int drm_parse_display_id(struct drm_connector *connector,
4405				u8 *displayid, int length,
4406				bool is_edid_extension)
4407{
4408	/* if this is an EDID extension the first byte will be 0x70 */
4409	int idx = 0;
4410	struct displayid_block *block;
4411	int ret;
4412
4413	if (is_edid_extension)
4414		idx = 1;
4415
4416	ret = validate_displayid(displayid, length, idx);
4417	if (ret)
4418		return ret;
4419
4420	idx += sizeof(struct displayid_hdr);
4421	while (block = (struct displayid_block *)&displayid[idx],
4422	       idx + sizeof(struct displayid_block) <= length &&
4423	       idx + sizeof(struct displayid_block) + block->num_bytes <= length &&
4424	       block->num_bytes > 0) {
4425		idx += block->num_bytes + sizeof(struct displayid_block);
4426		DRM_DEBUG_KMS("block id 0x%x, rev %d, len %d\n",
4427			      block->tag, block->rev, block->num_bytes);
4428
4429		switch (block->tag) {
4430		case DATA_BLOCK_TILED_DISPLAY:
4431			ret = drm_parse_tiled_block(connector, block);
4432			if (ret)
4433				return ret;
4434			break;
4435		case DATA_BLOCK_TYPE_1_DETAILED_TIMING:
4436			/* handled in mode gathering code. */
4437			break;
4438		default:
4439			DRM_DEBUG_KMS("found DisplayID tag 0x%x, unhandled\n", block->tag);
4440			break;
4441		}
4442	}
4443	return 0;
4444}
4445
4446static void drm_get_displayid(struct drm_connector *connector,
4447			      struct edid *edid)
4448{
4449	void *displayid = NULL;
4450	int ret;
4451	connector->has_tile = false;
4452	displayid = drm_find_displayid_extension(edid);
4453	if (!displayid) {
4454		/* drop reference to any tile group we had */
4455		goto out_drop_ref;
4456	}
4457
4458	ret = drm_parse_display_id(connector, displayid, EDID_LENGTH, true);
4459	if (ret < 0)
4460		goto out_drop_ref;
4461	if (!connector->has_tile)
4462		goto out_drop_ref;
4463	return;
4464out_drop_ref:
4465	if (connector->tile_group) {
4466		drm_mode_put_tile_group(connector->dev, connector->tile_group);
4467		connector->tile_group = NULL;
4468	}
4469	return;
4470}