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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 201 202 203 204 205 206 207 208 209 210 211 212 213 214 215 216 217 218 219 220 221 222 223 224 225 226 227 228 229 230 231 232 233 234 235 236 237 238 239 240 241 242 243 244 245 246 247 248 249 250 251 252 253 254 255 256 257 258 259 260 261 262 263 264 265 266 267 268 269 270 271 272 273 274 275 276 277 278 279 280 281 282 | // SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause /* * Copyright(c) 2017 - 2018 Intel Corporation. */ /* * This file contains HFI1 support for VNIC SDMA functionality */ #include "sdma.h" #include "vnic.h" #define HFI1_VNIC_SDMA_Q_ACTIVE BIT(0) #define HFI1_VNIC_SDMA_Q_DEFERRED BIT(1) #define HFI1_VNIC_TXREQ_NAME_LEN 32 #define HFI1_VNIC_SDMA_DESC_WTRMRK 64 /* * struct vnic_txreq - VNIC transmit descriptor * @txreq: sdma transmit request * @sdma: vnic sdma pointer * @skb: skb to send * @pad: pad buffer * @plen: pad length * @pbc_val: pbc value */ struct vnic_txreq { struct sdma_txreq txreq; struct hfi1_vnic_sdma *sdma; struct sk_buff *skb; unsigned char pad[HFI1_VNIC_MAX_PAD]; u16 plen; __le64 pbc_val; }; static void vnic_sdma_complete(struct sdma_txreq *txreq, int status) { struct vnic_txreq *tx = container_of(txreq, struct vnic_txreq, txreq); struct hfi1_vnic_sdma *vnic_sdma = tx->sdma; sdma_txclean(vnic_sdma->dd, txreq); dev_kfree_skb_any(tx->skb); kmem_cache_free(vnic_sdma->dd->vnic.txreq_cache, tx); } static noinline int build_vnic_ulp_payload(struct sdma_engine *sde, struct vnic_txreq *tx) { int i, ret = 0; ret = sdma_txadd_kvaddr( sde->dd, &tx->txreq, tx->skb->data, skb_headlen(tx->skb)); if (unlikely(ret)) goto bail_txadd; for (i = 0; i < skb_shinfo(tx->skb)->nr_frags; i++) { skb_frag_t *frag = &skb_shinfo(tx->skb)->frags[i]; /* combine physically continuous fragments later? */ ret = sdma_txadd_page(sde->dd, &tx->txreq, skb_frag_page(frag), skb_frag_off(frag), skb_frag_size(frag), NULL, NULL, NULL); if (unlikely(ret)) goto bail_txadd; } if (tx->plen) ret = sdma_txadd_kvaddr(sde->dd, &tx->txreq, tx->pad + HFI1_VNIC_MAX_PAD - tx->plen, tx->plen); bail_txadd: return ret; } static int build_vnic_tx_desc(struct sdma_engine *sde, struct vnic_txreq *tx, u64 pbc) { int ret = 0; u16 hdrbytes = 2 << 2; /* PBC */ ret = sdma_txinit_ahg( &tx->txreq, 0, hdrbytes + tx->skb->len + tx->plen, 0, 0, NULL, 0, vnic_sdma_complete); if (unlikely(ret)) goto bail_txadd; /* add pbc */ tx->pbc_val = cpu_to_le64(pbc); ret = sdma_txadd_kvaddr( sde->dd, &tx->txreq, &tx->pbc_val, hdrbytes); if (unlikely(ret)) goto bail_txadd; /* add the ulp payload */ ret = build_vnic_ulp_payload(sde, tx); bail_txadd: return ret; } /* setup the last plen bypes of pad */ static inline void hfi1_vnic_update_pad(unsigned char *pad, u8 plen) { pad[HFI1_VNIC_MAX_PAD - 1] = plen - OPA_VNIC_ICRC_TAIL_LEN; } int hfi1_vnic_send_dma(struct hfi1_devdata *dd, u8 q_idx, struct hfi1_vnic_vport_info *vinfo, struct sk_buff *skb, u64 pbc, u8 plen) { struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; struct sdma_engine *sde = vnic_sdma->sde; struct vnic_txreq *tx; int ret = -ECOMM; if (unlikely(READ_ONCE(vnic_sdma->state) != HFI1_VNIC_SDMA_Q_ACTIVE)) goto tx_err; if (unlikely(!sde || !sdma_running(sde))) goto tx_err; tx = kmem_cache_alloc(dd->vnic.txreq_cache, GFP_ATOMIC); if (unlikely(!tx)) { ret = -ENOMEM; goto tx_err; } tx->sdma = vnic_sdma; tx->skb = skb; hfi1_vnic_update_pad(tx->pad, plen); tx->plen = plen; ret = build_vnic_tx_desc(sde, tx, pbc); if (unlikely(ret)) goto free_desc; ret = sdma_send_txreq(sde, iowait_get_ib_work(&vnic_sdma->wait), &tx->txreq, vnic_sdma->pkts_sent); /* When -ECOMM, sdma callback will be called with ABORT status */ if (unlikely(ret && unlikely(ret != -ECOMM))) goto free_desc; if (!ret) { vnic_sdma->pkts_sent = true; iowait_starve_clear(vnic_sdma->pkts_sent, &vnic_sdma->wait); } return ret; free_desc: sdma_txclean(dd, &tx->txreq); kmem_cache_free(dd->vnic.txreq_cache, tx); tx_err: if (ret != -EBUSY) dev_kfree_skb_any(skb); else vnic_sdma->pkts_sent = false; return ret; } /* * hfi1_vnic_sdma_sleep - vnic sdma sleep function * * This function gets called from sdma_send_txreq() when there are not enough * sdma descriptors available to send the packet. It adds Tx queue's wait * structure to sdma engine's dmawait list to be woken up when descriptors * become available. */ static int hfi1_vnic_sdma_sleep(struct sdma_engine *sde, struct iowait_work *wait, struct sdma_txreq *txreq, uint seq, bool pkts_sent) { struct hfi1_vnic_sdma *vnic_sdma = container_of(wait->iow, struct hfi1_vnic_sdma, wait); write_seqlock(&sde->waitlock); if (sdma_progress(sde, seq, txreq)) { write_sequnlock(&sde->waitlock); return -EAGAIN; } vnic_sdma->state = HFI1_VNIC_SDMA_Q_DEFERRED; if (list_empty(&vnic_sdma->wait.list)) { iowait_get_priority(wait->iow); iowait_queue(pkts_sent, wait->iow, &sde->dmawait); } write_sequnlock(&sde->waitlock); return -EBUSY; } /* * hfi1_vnic_sdma_wakeup - vnic sdma wakeup function * * This function gets called when SDMA descriptors becomes available and Tx * queue's wait structure was previously added to sdma engine's dmawait list. * It notifies the upper driver about Tx queue wakeup. */ static void hfi1_vnic_sdma_wakeup(struct iowait *wait, int reason) { struct hfi1_vnic_sdma *vnic_sdma = container_of(wait, struct hfi1_vnic_sdma, wait); struct hfi1_vnic_vport_info *vinfo = vnic_sdma->vinfo; vnic_sdma->state = HFI1_VNIC_SDMA_Q_ACTIVE; if (__netif_subqueue_stopped(vinfo->netdev, vnic_sdma->q_idx)) netif_wake_subqueue(vinfo->netdev, vnic_sdma->q_idx); }; inline bool hfi1_vnic_sdma_write_avail(struct hfi1_vnic_vport_info *vinfo, u8 q_idx) { struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[q_idx]; return (READ_ONCE(vnic_sdma->state) == HFI1_VNIC_SDMA_Q_ACTIVE); } void hfi1_vnic_sdma_init(struct hfi1_vnic_vport_info *vinfo) { int i; for (i = 0; i < vinfo->num_tx_q; i++) { struct hfi1_vnic_sdma *vnic_sdma = &vinfo->sdma[i]; iowait_init(&vnic_sdma->wait, 0, NULL, NULL, hfi1_vnic_sdma_sleep, hfi1_vnic_sdma_wakeup, NULL, NULL); vnic_sdma->sde = &vinfo->dd->per_sdma[i]; vnic_sdma->dd = vinfo->dd; vnic_sdma->vinfo = vinfo; vnic_sdma->q_idx = i; vnic_sdma->state = HFI1_VNIC_SDMA_Q_ACTIVE; /* Add a free descriptor watermark for wakeups */ if (vnic_sdma->sde->descq_cnt > HFI1_VNIC_SDMA_DESC_WTRMRK) { struct iowait_work *work; INIT_LIST_HEAD(&vnic_sdma->stx.list); vnic_sdma->stx.num_desc = HFI1_VNIC_SDMA_DESC_WTRMRK; work = iowait_get_ib_work(&vnic_sdma->wait); list_add_tail(&vnic_sdma->stx.list, &work->tx_head); } } } int hfi1_vnic_txreq_init(struct hfi1_devdata *dd) { char buf[HFI1_VNIC_TXREQ_NAME_LEN]; snprintf(buf, sizeof(buf), "hfi1_%u_vnic_txreq_cache", dd->unit); dd->vnic.txreq_cache = kmem_cache_create(buf, sizeof(struct vnic_txreq), 0, SLAB_HWCACHE_ALIGN, NULL); if (!dd->vnic.txreq_cache) return -ENOMEM; return 0; } void hfi1_vnic_txreq_deinit(struct hfi1_devdata *dd) { kmem_cache_destroy(dd->vnic.txreq_cache); dd->vnic.txreq_cache = NULL; } |