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v6.9.4
  1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DAL_HUBP_H__
 27#define __DAL_HUBP_H__
 28
 29/**
 30 * DOC: overview
 31 *
 32 * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port
 33 * (SDP) and DCN. This component has multiple features, such as memory
 34 * arbitration, rotation, and cursor manipulation.
 35 *
 36 * There is one HUBP allocated per pipe, which fetches data and converts
 37 * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved
 38 * and fixed-depth streams of pixel data.
 39 */
 40
 41#include "mem_input.h"
 42#include "cursor_reg_cache.h"
 43
 
 
 44#define OPP_ID_INVALID 0xf
 45#define MAX_TTU 0xffffff
 46
 47enum cursor_pitch {
 48	CURSOR_PITCH_64_PIXELS = 0,
 49	CURSOR_PITCH_128_PIXELS,
 50	CURSOR_PITCH_256_PIXELS
 51};
 52
 53enum cursor_lines_per_chunk {
 54	CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
 55	CURSOR_LINE_PER_CHUNK_2 = 1,
 56	CURSOR_LINE_PER_CHUNK_4,
 57	CURSOR_LINE_PER_CHUNK_8,
 58	CURSOR_LINE_PER_CHUNK_16
 59};
 60
 61enum hubp_ind_block_size {
 62	hubp_ind_block_unconstrained = 0,
 63	hubp_ind_block_64b,
 64	hubp_ind_block_128b,
 65	hubp_ind_block_64b_no_128bcl,
 66};
 67
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 68struct hubp {
 69	const struct hubp_funcs *funcs;
 70	struct dc_context *ctx;
 71	struct dc_plane_address request_address;
 72	int inst;
 73
 74	/* run time states */
 75	int opp_id;
 76	int mpcc_id;
 77	struct dc_cursor_attributes curs_attr;
 78	struct dc_cursor_position curs_pos;
 79	bool power_gated;
 80
 81	struct cursor_position_cache_hubp  pos;
 82	struct cursor_attribute_cache_hubp att;
 83	struct cursor_rect cur_rect;
 84};
 85
 86struct surface_flip_registers {
 87	uint32_t DCSURF_SURFACE_CONTROL;
 88	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
 89	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
 90	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
 91	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
 92	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
 93	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
 94	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
 95	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
 96	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
 97	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
 98	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
 99	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
100	bool tmz_surface;
101	bool immediate;
102	uint8_t vmid;
103	bool grph_stereo;
104};
105
106struct hubp_funcs {
107	void (*hubp_setup)(
108			struct hubp *hubp,
109			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
110			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
111			struct _vcs_dpi_display_rq_regs_st *rq_regs,
112			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
113
114	void (*hubp_setup_interdependent)(
115			struct hubp *hubp,
116			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
117			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
118
119	void (*dcc_control)(struct hubp *hubp, bool enable,
120			enum hubp_ind_block_size blk_size);
121
 
 
122	void (*mem_program_viewport)(
123			struct hubp *hubp,
124			const struct rect *viewport,
125			const struct rect *viewport_c);
126
127	bool (*hubp_program_surface_flip_and_addr)(
128		struct hubp *hubp,
129		const struct dc_plane_address *address,
130		bool flip_immediate);
131
132	void (*hubp_program_pte_vm)(
133		struct hubp *hubp,
134		enum surface_pixel_format format,
135		union dc_tiling_info *tiling_info,
136		enum dc_rotation_angle rotation);
137
138	void (*hubp_set_vm_system_aperture_settings)(
139			struct hubp *hubp,
140			struct vm_system_aperture_param *apt);
141
142	void (*hubp_set_vm_context0_settings)(
143			struct hubp *hubp,
144			const struct vm_context0_param *vm0);
145
146	void (*hubp_program_surface_config)(
147		struct hubp *hubp,
148		enum surface_pixel_format format,
149		union dc_tiling_info *tiling_info,
150		struct plane_size *plane_size,
151		enum dc_rotation_angle rotation,
152		struct dc_plane_dcc_param *dcc,
153		bool horizontal_mirror,
154		unsigned int compa_level);
155
156	bool (*hubp_is_flip_pending)(struct hubp *hubp);
157
158	void (*set_blank)(struct hubp *hubp, bool blank);
159	void (*set_blank_regs)(struct hubp *hubp, bool blank);
160	void (*phantom_hubp_post_enable)(struct hubp *hubp);
161	void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
162
163	void (*set_cursor_attributes)(
164			struct hubp *hubp,
165			const struct dc_cursor_attributes *attr);
166
167	void (*set_cursor_position)(
168			struct hubp *hubp,
169			const struct dc_cursor_position *pos,
170			const struct dc_cursor_mi_param *param);
171
172	void (*hubp_disconnect)(struct hubp *hubp);
173
174	void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
175	void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
176	void (*hubp_read_state)(struct hubp *hubp);
177	void (*hubp_clear_underflow)(struct hubp *hubp);
178	void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
179	unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
180	void (*hubp_init)(struct hubp *hubp);
181
182	void (*dmdata_set_attributes)(
183			struct hubp *hubp,
184			const struct dc_dmdata_attributes *attr);
185
186	void (*dmdata_load)(
187			struct hubp *hubp,
188			uint32_t dmdata_sw_size,
189			const uint32_t *dmdata_sw_data);
190	bool (*dmdata_status_done)(struct hubp *hubp);
191	void (*hubp_enable_tripleBuffer)(
192		struct hubp *hubp,
193		bool enable);
194
195	bool (*hubp_is_triplebuffer_enabled)(
196		struct hubp *hubp);
197
198	void (*hubp_set_flip_control_surface_gsl)(
199		struct hubp *hubp,
200		bool enable);
201
202	void (*validate_dml_output)(
203			struct hubp *hubp,
204			struct dc_context *ctx,
205			struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
206			struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
207			struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
208	void (*set_unbounded_requesting)(
209		struct hubp *hubp,
210		bool enable);
211	bool (*hubp_in_blank)(struct hubp *hubp);
212	void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
213
 
 
214	void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
215	void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow);
216	void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
217	void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
218
219	void (*hubp_set_flip_int)(struct hubp *hubp);
220
221	void (*program_extended_blank)(struct hubp *hubp,
222			unsigned int min_dst_y_next_start_optimized);
223
224	void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
225};
226
227#endif
v6.13.7
  1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DAL_HUBP_H__
 27#define __DAL_HUBP_H__
 28
 29/**
 30 * DOC: overview
 31 *
 32 * Display Controller Hub (DCHUB) is the gateway between the Scalable Data Port
 33 * (SDP) and DCN. This component has multiple features, such as memory
 34 * arbitration, rotation, and cursor manipulation.
 35 *
 36 * There is one HUBP allocated per pipe, which fetches data and converts
 37 * different pixel formats (i.e. ARGB8888, NV12, etc) into linear, interleaved
 38 * and fixed-depth streams of pixel data.
 39 */
 40
 41#include "mem_input.h"
 42#include "cursor_reg_cache.h"
 43
 44#include "dml2/dml21/inc/dml_top_dchub_registers.h"
 45
 46#define OPP_ID_INVALID 0xf
 47#define MAX_TTU 0xffffff
 48
 49enum cursor_pitch {
 50	CURSOR_PITCH_64_PIXELS = 0,
 51	CURSOR_PITCH_128_PIXELS,
 52	CURSOR_PITCH_256_PIXELS
 53};
 54
 55enum cursor_lines_per_chunk {
 56	CURSOR_LINE_PER_CHUNK_1 = 0, /* new for DCN2 */
 57	CURSOR_LINE_PER_CHUNK_2 = 1,
 58	CURSOR_LINE_PER_CHUNK_4,
 59	CURSOR_LINE_PER_CHUNK_8,
 60	CURSOR_LINE_PER_CHUNK_16
 61};
 62
 63enum hubp_ind_block_size {
 64	hubp_ind_block_unconstrained = 0,
 65	hubp_ind_block_64b,
 66	hubp_ind_block_128b,
 67	hubp_ind_block_64b_no_128bcl,
 68};
 69
 70enum hubp_3dlut_fl_mode {
 71	hubp_3dlut_fl_mode_disable = 0,
 72	hubp_3dlut_fl_mode_native_1 = 1,
 73	hubp_3dlut_fl_mode_native_2 = 2,
 74	hubp_3dlut_fl_mode_transform = 3
 75};
 76
 77enum hubp_3dlut_fl_format {
 78	hubp_3dlut_fl_format_unorm_12msb_bitslice = 0,
 79	hubp_3dlut_fl_format_unorm_12lsb_bitslice = 1,
 80	hubp_3dlut_fl_format_float_fp1_5_10 = 2
 81};
 82
 83enum hubp_3dlut_fl_addressing_mode {
 84	hubp_3dlut_fl_addressing_mode_sw_linear = 0,
 85	hubp_3dlut_fl_addressing_mode_simple_linear = 1
 86};
 87
 88enum hubp_3dlut_fl_width {
 89	hubp_3dlut_fl_width_17 = 17,
 90	hubp_3dlut_fl_width_33 = 33,
 91	hubp_3dlut_fl_width_transformed = 4916
 92};
 93
 94enum hubp_3dlut_fl_crossbar_bit_slice {
 95	hubp_3dlut_fl_crossbar_bit_slice_0_15 = 0,
 96	hubp_3dlut_fl_crossbar_bit_slice_16_31 = 1,
 97	hubp_3dlut_fl_crossbar_bit_slice_32_47 = 2,
 98	hubp_3dlut_fl_crossbar_bit_slice_48_63 = 3
 99};
100
101struct hubp {
102	const struct hubp_funcs *funcs;
103	struct dc_context *ctx;
104	struct dc_plane_address request_address;
105	int inst;
106
107	/* run time states */
108	int opp_id;
109	int mpcc_id;
110	struct dc_cursor_attributes curs_attr;
111	struct dc_cursor_position curs_pos;
112	bool power_gated;
113
114	struct cursor_position_cache_hubp  pos;
115	struct cursor_attribute_cache_hubp att;
116	struct cursor_rect cur_rect;
117};
118
119struct surface_flip_registers {
120	uint32_t DCSURF_SURFACE_CONTROL;
121	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH;
122	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS;
123	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH;
124	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS;
125	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_HIGH_C;
126	uint32_t DCSURF_PRIMARY_META_SURFACE_ADDRESS_C;
127	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_HIGH_C;
128	uint32_t DCSURF_PRIMARY_SURFACE_ADDRESS_C;
129	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS_HIGH;
130	uint32_t DCSURF_SECONDARY_META_SURFACE_ADDRESS;
131	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS_HIGH;
132	uint32_t DCSURF_SECONDARY_SURFACE_ADDRESS;
133	bool tmz_surface;
134	bool immediate;
135	uint8_t vmid;
136	bool grph_stereo;
137};
138
139struct hubp_funcs {
140	void (*hubp_setup)(
141			struct hubp *hubp,
142			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
143			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
144			struct _vcs_dpi_display_rq_regs_st *rq_regs,
145			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
146
147	void (*hubp_setup_interdependent)(
148			struct hubp *hubp,
149			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
150			struct _vcs_dpi_display_ttu_regs_st *ttu_regs);
151
152	void (*dcc_control)(struct hubp *hubp, bool enable,
153			enum hubp_ind_block_size blk_size);
154
155	void (*hubp_reset)(struct hubp *hubp);
156
157	void (*mem_program_viewport)(
158			struct hubp *hubp,
159			const struct rect *viewport,
160			const struct rect *viewport_c);
161
162	bool (*hubp_program_surface_flip_and_addr)(
163		struct hubp *hubp,
164		const struct dc_plane_address *address,
165		bool flip_immediate);
166
167	void (*hubp_program_pte_vm)(
168		struct hubp *hubp,
169		enum surface_pixel_format format,
170		union dc_tiling_info *tiling_info,
171		enum dc_rotation_angle rotation);
172
173	void (*hubp_set_vm_system_aperture_settings)(
174			struct hubp *hubp,
175			struct vm_system_aperture_param *apt);
176
177	void (*hubp_set_vm_context0_settings)(
178			struct hubp *hubp,
179			const struct vm_context0_param *vm0);
180
181	void (*hubp_program_surface_config)(
182		struct hubp *hubp,
183		enum surface_pixel_format format,
184		union dc_tiling_info *tiling_info,
185		struct plane_size *plane_size,
186		enum dc_rotation_angle rotation,
187		struct dc_plane_dcc_param *dcc,
188		bool horizontal_mirror,
189		unsigned int compa_level);
190
191	bool (*hubp_is_flip_pending)(struct hubp *hubp);
192
193	void (*set_blank)(struct hubp *hubp, bool blank);
194	void (*set_blank_regs)(struct hubp *hubp, bool blank);
195	void (*phantom_hubp_post_enable)(struct hubp *hubp);
196	void (*set_hubp_blank_en)(struct hubp *hubp, bool blank);
197
198	void (*set_cursor_attributes)(
199			struct hubp *hubp,
200			const struct dc_cursor_attributes *attr);
201
202	void (*set_cursor_position)(
203			struct hubp *hubp,
204			const struct dc_cursor_position *pos,
205			const struct dc_cursor_mi_param *param);
206
207	void (*hubp_disconnect)(struct hubp *hubp);
208
209	void (*hubp_clk_cntl)(struct hubp *hubp, bool enable);
210	void (*hubp_vtg_sel)(struct hubp *hubp, uint32_t otg_inst);
211	void (*hubp_read_state)(struct hubp *hubp);
212	void (*hubp_clear_underflow)(struct hubp *hubp);
213	void (*hubp_disable_control)(struct hubp *hubp, bool disable_hubp);
214	unsigned int (*hubp_get_underflow_status)(struct hubp *hubp);
215	void (*hubp_init)(struct hubp *hubp);
216
217	void (*dmdata_set_attributes)(
218			struct hubp *hubp,
219			const struct dc_dmdata_attributes *attr);
220
221	void (*dmdata_load)(
222			struct hubp *hubp,
223			uint32_t dmdata_sw_size,
224			const uint32_t *dmdata_sw_data);
225	bool (*dmdata_status_done)(struct hubp *hubp);
226	void (*hubp_enable_tripleBuffer)(
227		struct hubp *hubp,
228		bool enable);
229
230	bool (*hubp_is_triplebuffer_enabled)(
231		struct hubp *hubp);
232
233	void (*hubp_set_flip_control_surface_gsl)(
234		struct hubp *hubp,
235		bool enable);
236
237	void (*validate_dml_output)(
238			struct hubp *hubp,
239			struct dc_context *ctx,
240			struct _vcs_dpi_display_rq_regs_st *dml_rq_regs,
241			struct _vcs_dpi_display_dlg_regs_st *dml_dlg_attr,
242			struct _vcs_dpi_display_ttu_regs_st *dml_ttu_attr);
243	void (*set_unbounded_requesting)(
244		struct hubp *hubp,
245		bool enable);
246	bool (*hubp_in_blank)(struct hubp *hubp);
247	void (*hubp_soft_reset)(struct hubp *hubp, bool reset);
248
249	void (*hubp_set_flip_int)(struct hubp *hubp);
250
251	void (*hubp_update_force_pstate_disallow)(struct hubp *hubp, bool allow);
252	void (*hubp_update_force_cursor_pstate_disallow)(struct hubp *hubp, bool allow);
253	void (*hubp_update_mall_sel)(struct hubp *hubp, uint32_t mall_sel, bool c_cursor);
254	void (*hubp_prepare_subvp_buffering)(struct hubp *hubp, bool enable);
255	void (*hubp_surface_update_lock)(struct hubp *hubp,
256			bool lock);
257
258	void (*program_extended_blank)(struct hubp *hubp,
259			unsigned int min_dst_y_next_start_optimized);
260
261	void (*hubp_wait_pipe_read_start)(struct hubp *hubp);
262	void (*hubp_program_mcache_id_and_split_coordinate)(struct hubp *hubp, struct dml2_hubp_pipe_mcache_regs *mcache_regs);
263	void (*hubp_update_3dlut_fl_bias_scale)(struct hubp *hubp, uint16_t bias, uint16_t scale);
264	void (*hubp_program_3dlut_fl_mode)(struct hubp *hubp,
265			enum hubp_3dlut_fl_mode mode);
266	void (*hubp_program_3dlut_fl_format)(struct hubp *hubp,
267			enum hubp_3dlut_fl_format format);
268	void (*hubp_program_3dlut_fl_addr)(struct hubp *hubp,
269		const struct dc_plane_address address);
270	void (*hubp_program_3dlut_fl_dlg_param)(struct hubp *hubp, int refcyc_per_3dlut_group);
271	void (*hubp_enable_3dlut_fl)(struct hubp *hubp, bool enable);
272	void (*hubp_program_3dlut_fl_addressing_mode)(struct hubp *hubp, enum hubp_3dlut_fl_addressing_mode addr_mode);
273	void (*hubp_program_3dlut_fl_width)(struct hubp *hubp, enum hubp_3dlut_fl_width width);
274	void (*hubp_program_3dlut_fl_tmz_protected)(struct hubp *hubp, bool protection_enabled);
275	void (*hubp_program_3dlut_fl_crossbar)(struct hubp *hubp,
276			enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_y_g,
277			enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cb_b,
278			enum hubp_3dlut_fl_crossbar_bit_slice bit_slice_cr_r);
279	int (*hubp_get_3dlut_fl_done)(struct hubp *hubp);
280};
281
282#endif