1/*
  2 * Copyright 2012-15 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25#ifndef __DAL_MEM_INPUT_H__
 26#define __DAL_MEM_INPUT_H__
 27
 28#include "dc.h"
 29#include "include/grph_object_id.h"
 30
 31#include "dml/display_mode_structs.h"
 32
 33struct dchub_init_data;
 34struct cstate_pstate_watermarks_st {
 35	uint32_t cstate_exit_ns;
 36	uint32_t cstate_exit_z8_ns;
 37	uint32_t cstate_enter_plus_exit_z8_ns;
 38	uint32_t cstate_enter_plus_exit_ns;
 39	uint32_t pstate_change_ns;
 40	uint32_t fclk_pstate_change_ns;
 41};
 42
 43struct dcn_watermarks {
 44	uint32_t pte_meta_urgent_ns;
 45	uint32_t urgent_ns;
 46	uint32_t frac_urg_bw_nom;
 47	uint32_t frac_urg_bw_flip;
 48	int32_t urgent_latency_ns;
 49	struct cstate_pstate_watermarks_st cstate_pstate;
 50	uint32_t usr_retraining_ns;
 51};
 52
 53struct dcn_watermark_set {
 54	struct dcn_watermarks a;
 55	struct dcn_watermarks b;
 56	struct dcn_watermarks c;
 57	struct dcn_watermarks d;
 58};
 59
 60struct dce_watermarks {
 61	int a_mark;
 62	int b_mark;
 63	int c_mark;
 64	int d_mark;
 65};
 66
 67struct stutter_modes {
 68	bool enhanced;
 69	bool quad_dmif_buffer;
 70	bool watermark_nb_pstate;
 71};
 72
 73struct mem_input {
 74	const struct mem_input_funcs *funcs;
 75	struct dc_context *ctx;
 76	struct dc_plane_address request_address;
 77	struct dc_plane_address current_address;
 78	int inst;
 79	struct stutter_modes stutter_mode;
 80};
 81
 82struct vm_system_aperture_param {
 83	PHYSICAL_ADDRESS_LOC sys_default;
 84	PHYSICAL_ADDRESS_LOC sys_low;
 85	PHYSICAL_ADDRESS_LOC sys_high;
 86};
 87
 88struct vm_context0_param {
 89	PHYSICAL_ADDRESS_LOC pte_base;
 90	PHYSICAL_ADDRESS_LOC pte_start;
 91	PHYSICAL_ADDRESS_LOC pte_end;
 92	PHYSICAL_ADDRESS_LOC fault_default;
 93};
 94
 95struct mem_input_funcs {
 96	void (*mem_input_setup)(
 97			struct mem_input *mem_input,
 98			struct _vcs_dpi_display_dlg_regs_st *dlg_regs,
 99			struct _vcs_dpi_display_ttu_regs_st *ttu_regs,
100			struct _vcs_dpi_display_rq_regs_st *rq_regs,
101			struct _vcs_dpi_display_pipe_dest_params_st *pipe_dest);
102
103	void (*dcc_control)(struct mem_input *mem_input, bool enable,
104			bool independent_64b_blks);
105	void (*mem_program_viewport)(
106			struct mem_input *mem_input,
107			const struct rect *viewport,
108			const struct rect *viewport_c);
109
110	void (*mem_input_program_display_marks)(
111		struct mem_input *mem_input,
112		struct dce_watermarks nbp,
113		struct dce_watermarks stutter,
114		struct dce_watermarks stutter_enter,
115		struct dce_watermarks urgent,
116		uint32_t total_dest_line_time_ns);
117
118	void (*mem_input_program_chroma_display_marks)(
119			struct mem_input *mem_input,
120			struct dce_watermarks nbp,
121			struct dce_watermarks stutter,
122			struct dce_watermarks urgent,
123			uint32_t total_dest_line_time_ns);
124
125	void (*allocate_mem_input)(
126		struct mem_input *mem_input,
127		uint32_t h_total,/* for current target */
128		uint32_t v_total,/* for current target */
129		uint32_t pix_clk_khz,/* for current target */
130		uint32_t total_streams_num);
131
132	void (*free_mem_input)(
133		struct mem_input *mem_input,
134		uint32_t paths_num);
135
136	bool (*mem_input_program_surface_flip_and_addr)(
137		struct mem_input *mem_input,
138		const struct dc_plane_address *address,
139		bool flip_immediate);
140
141	void (*mem_input_program_pte_vm)(
142		struct mem_input *mem_input,
143		enum surface_pixel_format format,
144		union dc_tiling_info *tiling_info,
145		enum dc_rotation_angle rotation);
146
147	void (*mem_input_set_vm_system_aperture_settings)(
148			struct mem_input *mem_input,
149			struct vm_system_aperture_param *apt);
150
151	void (*mem_input_set_vm_context0_settings)(
152			struct mem_input *mem_input,
153			const struct vm_context0_param *vm0);
154
155	void (*mem_input_program_surface_config)(
156		struct mem_input *mem_input,
157		enum surface_pixel_format format,
158		union dc_tiling_info *tiling_info,
159		struct plane_size *plane_size,
160		enum dc_rotation_angle rotation,
161		struct dc_plane_dcc_param *dcc,
162		bool horizontal_mirror);
163
164	bool (*mem_input_is_flip_pending)(struct mem_input *mem_input);
165
166	void (*mem_input_update_dchub)(struct mem_input *mem_input,
167				struct dchub_init_data *dh_data);
168
169	void (*set_blank)(struct mem_input *mi, bool blank);
170	void (*set_hubp_blank_en)(struct mem_input *mi, bool blank);
171
172	void (*set_cursor_attributes)(
173			struct mem_input *mem_input,
174			const struct dc_cursor_attributes *attr);
175
176	void (*set_cursor_position)(
177			struct mem_input *mem_input,
178			const struct dc_cursor_position *pos,
179			const struct dc_cursor_mi_param *param);
180
181};
182
183#endif