1/*
  2 * Copyright 2015 Advanced Micro Devices, Inc.
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: AMD
 23 *
 24 */
 25
 26#ifndef __DC_HW_SEQUENCER_H__
 27#define __DC_HW_SEQUENCER_H__
 28#include "dc_types.h"
 29#include "clock_source.h"
 30#include "inc/hw/timing_generator.h"
 31#include "inc/hw/opp.h"
 32#include "inc/hw/link_encoder.h"
 33#include "core_status.h"
 34
 35enum vline_select {
 36	VLINE0,
 37	VLINE1
 38};
 39
 40struct pipe_ctx;
 41struct dc_state;
 42struct dc_stream_status;
 43struct dc_writeback_info;
 44struct dchub_init_data;
 45struct dc_static_screen_params;
 46struct resource_pool;
 47struct dc_phy_addr_space_config;
 48struct dc_virtual_addr_space_config;
 49struct dpp;
 50struct dce_hwseq;
 51
 52struct hw_sequencer_funcs {
 53	/* Embedded Display Related */
 54	void (*edp_power_control)(struct dc_link *link, bool enable);
 55	void (*edp_wait_for_hpd_ready)(struct dc_link *link, bool power_up);
 56
 57	/* Pipe Programming Related */
 58	void (*init_hw)(struct dc *dc);
 59	void (*power_down_on_boot)(struct dc *dc);
 60	void (*enable_accelerated_mode)(struct dc *dc,
 61			struct dc_state *context);
 62	enum dc_status (*apply_ctx_to_hw)(struct dc *dc,
 63			struct dc_state *context);
 64	void (*disable_plane)(struct dc *dc, struct pipe_ctx *pipe_ctx);
 65	void (*apply_ctx_for_surface)(struct dc *dc,
 66			const struct dc_stream_state *stream,
 67			int num_planes, struct dc_state *context);
 68	void (*program_front_end_for_ctx)(struct dc *dc,
 69			struct dc_state *context);
 70	void (*post_unlock_program_front_end)(struct dc *dc,
 71			struct dc_state *context);
 72	void (*update_plane_addr)(const struct dc *dc,
 73			struct pipe_ctx *pipe_ctx);
 74	void (*update_dchub)(struct dce_hwseq *hws,
 75			struct dchub_init_data *dh_data);
 76	void (*wait_for_mpcc_disconnect)(struct dc *dc,
 77			struct resource_pool *res_pool,
 78			struct pipe_ctx *pipe_ctx);
 79	void (*edp_backlight_control)(
 80			struct dc_link *link,
 81			bool enable);
 82	void (*program_triplebuffer)(const struct dc *dc,
 83		struct pipe_ctx *pipe_ctx, bool enableTripleBuffer);
 84	void (*update_pending_status)(struct pipe_ctx *pipe_ctx);
 85	void (*power_down)(struct dc *dc);
 86
 87	/* Pipe Lock Related */
 88	void (*pipe_control_lock)(struct dc *dc,
 89			struct pipe_ctx *pipe, bool lock);
 90	void (*interdependent_update_lock)(struct dc *dc,
 91			struct dc_state *context, bool lock);
 92	void (*set_flip_control_gsl)(struct pipe_ctx *pipe_ctx,
 93			bool flip_immediate);
 94	void (*cursor_lock)(struct dc *dc, struct pipe_ctx *pipe, bool lock);
 95
 96	/* Timing Related */
 97	void (*get_position)(struct pipe_ctx **pipe_ctx, int num_pipes,
 98			struct crtc_position *position);
 99	int (*get_vupdate_offset_from_vsync)(struct pipe_ctx *pipe_ctx);
100	void (*calc_vupdate_position)(
101			struct dc *dc,
102			struct pipe_ctx *pipe_ctx,
103			uint32_t *start_line,
104			uint32_t *end_line);
105	void (*enable_per_frame_crtc_position_reset)(struct dc *dc,
106			int group_size, struct pipe_ctx *grouped_pipes[]);
107	void (*enable_timing_synchronization)(struct dc *dc,
108			int group_index, int group_size,
109			struct pipe_ctx *grouped_pipes[]);
110	void (*setup_periodic_interrupt)(struct dc *dc,
111			struct pipe_ctx *pipe_ctx,
112			enum vline_select vline);
113	void (*set_drr)(struct pipe_ctx **pipe_ctx, int num_pipes,
114			unsigned int vmin, unsigned int vmax,
115			unsigned int vmid, unsigned int vmid_frame_number);
116	void (*set_static_screen_control)(struct pipe_ctx **pipe_ctx,
117			int num_pipes,
118			const struct dc_static_screen_params *events);
119#ifndef TRIM_FSFT
120	bool (*optimize_timing_for_fsft)(struct dc *dc,
121			struct dc_crtc_timing *timing,
122			unsigned int max_input_rate_in_khz);
123#endif
124
125	/* Stream Related */
126	void (*enable_stream)(struct pipe_ctx *pipe_ctx);
127	void (*disable_stream)(struct pipe_ctx *pipe_ctx);
128	void (*blank_stream)(struct pipe_ctx *pipe_ctx);
129	void (*unblank_stream)(struct pipe_ctx *pipe_ctx,
130			struct dc_link_settings *link_settings);
131
132	/* Bandwidth Related */
133	void (*prepare_bandwidth)(struct dc *dc, struct dc_state *context);
134	bool (*update_bandwidth)(struct dc *dc, struct dc_state *context);
135	void (*optimize_bandwidth)(struct dc *dc, struct dc_state *context);
136
137	/* Infopacket Related */
138	void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
139	void (*send_immediate_sdp_message)(
140			struct pipe_ctx *pipe_ctx,
141			const uint8_t *custom_sdp_message,
142			unsigned int sdp_message_size);
143	void (*update_info_frame)(struct pipe_ctx *pipe_ctx);
144	void (*set_dmdata_attributes)(struct pipe_ctx *pipe);
145	void (*program_dmdata_engine)(struct pipe_ctx *pipe_ctx);
146	bool (*dmdata_status_done)(struct pipe_ctx *pipe_ctx);
147
148	/* Cursor Related */
149	void (*set_cursor_position)(struct pipe_ctx *pipe);
150	void (*set_cursor_attribute)(struct pipe_ctx *pipe);
151	void (*set_cursor_sdr_white_level)(struct pipe_ctx *pipe);
152
153	/* Colour Related */
154	void (*program_gamut_remap)(struct pipe_ctx *pipe_ctx);
155	void (*program_output_csc)(struct dc *dc, struct pipe_ctx *pipe_ctx,
156			enum dc_color_space colorspace,
157			uint16_t *matrix, int opp_id);
158
159	/* VM Related */
160	int (*init_sys_ctx)(struct dce_hwseq *hws,
161			struct dc *dc,
162			struct dc_phy_addr_space_config *pa_config);
163	void (*init_vm_ctx)(struct dce_hwseq *hws,
164			struct dc *dc,
165			struct dc_virtual_addr_space_config *va_config,
166			int vmid);
167
168	/* Writeback Related */
169	void (*update_writeback)(struct dc *dc,
170			struct dc_writeback_info *wb_info,
171			struct dc_state *context);
172	void (*enable_writeback)(struct dc *dc,
173			struct dc_writeback_info *wb_info,
174			struct dc_state *context);
175	void (*disable_writeback)(struct dc *dc,
176			unsigned int dwb_pipe_inst);
177
178	bool (*mmhubbub_warmup)(struct dc *dc,
179			unsigned int num_dwb,
180			struct dc_writeback_info *wb_info);
181
182	/* Clock Related */
183	enum dc_status (*set_clock)(struct dc *dc,
184			enum dc_clock_type clock_type,
185			uint32_t clk_khz, uint32_t stepping);
186	void (*get_clock)(struct dc *dc, enum dc_clock_type clock_type,
187			struct dc_clock_config *clock_cfg);
188	void (*optimize_pwr_state)(const struct dc *dc,
189			struct dc_state *context);
190	void (*exit_optimized_pwr_state)(const struct dc *dc,
191			struct dc_state *context);
192
193	/* Audio Related */
194	void (*enable_audio_stream)(struct pipe_ctx *pipe_ctx);
195	void (*disable_audio_stream)(struct pipe_ctx *pipe_ctx);
196
197	/* Stereo 3D Related */
198	void (*setup_stereo)(struct pipe_ctx *pipe_ctx, struct dc *dc);
199
200	/* HW State Logging Related */
201	void (*log_hw_state)(struct dc *dc, struct dc_log_buffer_ctx *log_ctx);
202	void (*get_hw_state)(struct dc *dc, char *pBuf,
203			unsigned int bufSize, unsigned int mask);
204	void (*clear_status_bits)(struct dc *dc, unsigned int mask);
205
206	bool (*set_backlight_level)(struct pipe_ctx *pipe_ctx,
207			uint32_t backlight_pwm_u16_16,
208			uint32_t frame_ramp);
209
210	void (*set_abm_immediate_disable)(struct pipe_ctx *pipe_ctx);
211
212	void (*set_pipe)(struct pipe_ctx *pipe_ctx);
213
214#if defined(CONFIG_DRM_AMD_DC_DCN3_0)
215	/* Idle Optimization Related */
216	bool (*apply_idle_power_optimizations)(struct dc *dc, bool enable);
217#endif
218
219};
220
221void color_space_to_black_color(
222	const struct dc *dc,
223	enum dc_color_space colorspace,
224	struct tg_color *black_color);
225
226bool hwss_wait_for_blank_complete(
227		struct timing_generator *tg);
228
229const uint16_t *find_color_matrix(
230		enum dc_color_space color_space,
231		uint32_t *array_size);
232
233#endif /* __DC_HW_SEQUENCER_H__ */